1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause 2 /* 2 /* 3 * Copyright (c) 2020-2021, Linaro Limited 3 * Copyright (c) 2020-2021, Linaro Limited 4 */ 4 */ 5 5 6 /dts-v1/; 6 /dts-v1/; 7 7 >> 8 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/regulator/qcom,rpmh-regu 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9 #include "sm8350.dtsi" 10 #include "sm8350.dtsi" 10 #include "pm8350.dtsi" << 11 #include "pm8350b.dtsi" << 12 #include "pm8350c.dtsi" << 13 #include "pmk8350.dtsi" << 14 #include "pmr735a.dtsi" << 15 #include "pmr735b.dtsi" << 16 11 17 / { 12 / { 18 model = "Qualcomm Technologies, Inc. S 13 model = "Qualcomm Technologies, Inc. SM8350 HDK"; 19 compatible = "qcom,sm8350-hdk", "qcom, 14 compatible = "qcom,sm8350-hdk", "qcom,sm8350"; 20 chassis-type = "embedded"; << 21 15 22 aliases { 16 aliases { 23 serial0 = &uart2; 17 serial0 = &uart2; 24 }; 18 }; 25 19 26 chosen { 20 chosen { 27 stdout-path = "serial0:115200n 21 stdout-path = "serial0:115200n8"; 28 }; 22 }; 29 23 30 hdmi-connector { << 31 compatible = "hdmi-connector"; << 32 type = "a"; << 33 << 34 port { << 35 hdmi_con: endpoint { << 36 remote-endpoin << 37 }; << 38 }; << 39 }; << 40 << 41 pmic-glink { << 42 compatible = "qcom,sm8350-pmic << 43 #address-cells = <1>; << 44 #size-cells = <0>; << 45 orientation-gpios = <&tlmm 81 << 46 << 47 connector@0 { << 48 compatible = "usb-c-co << 49 reg = <0>; << 50 power-role = "dual"; << 51 data-role = "dual"; << 52 << 53 ports { << 54 #address-cells << 55 #size-cells = << 56 << 57 port@0 { << 58 reg = << 59 << 60 pmic_g << 61 << 62 }; << 63 }; << 64 << 65 port@1 { << 66 reg = << 67 << 68 pmic_g << 69 << 70 }; << 71 }; << 72 << 73 port@2 { << 74 reg = << 75 << 76 pmic_g << 77 << 78 }; << 79 }; << 80 }; << 81 }; << 82 }; << 83 << 84 vph_pwr: vph-pwr-regulator { 24 vph_pwr: vph-pwr-regulator { 85 compatible = "regulator-fixed" 25 compatible = "regulator-fixed"; 86 regulator-name = "vph_pwr"; 26 regulator-name = "vph_pwr"; 87 regulator-min-microvolt = <370 27 regulator-min-microvolt = <3700000>; 88 regulator-max-microvolt = <370 28 regulator-max-microvolt = <3700000>; 89 29 90 regulator-always-on; 30 regulator-always-on; 91 regulator-boot-on; 31 regulator-boot-on; 92 }; 32 }; 93 << 94 lt9611_1v2: lt9611-1v2-regulator { << 95 compatible = "regulator-fixed" << 96 regulator-name = "LT9611_1V2"; << 97 << 98 vin-supply = <&vph_pwr>; << 99 regulator-min-microvolt = <120 << 100 regulator-max-microvolt = <120 << 101 gpio = <&tlmm 49 GPIO_ACTIVE_H << 102 enable-active-high; << 103 regulator-boot-on; << 104 }; << 105 << 106 lt9611_3v3: lt9611-3v3-regulator { << 107 compatible = "regulator-fixed" << 108 regulator-name = "LT9611_3V3"; << 109 << 110 vin-supply = <&vreg_bob>; << 111 gpio = <&tlmm 47 GPIO_ACTIVE_H << 112 regulator-min-microvolt = <330 << 113 regulator-max-microvolt = <330 << 114 enable-active-high; << 115 regulator-boot-on; << 116 regulator-always-on; << 117 }; << 118 }; 33 }; 119 34 120 &adsp { 35 &adsp { 121 status = "okay"; 36 status = "okay"; 122 firmware-name = "qcom/sm8350/adsp.mbn" 37 firmware-name = "qcom/sm8350/adsp.mbn"; 123 }; 38 }; 124 39 125 &apps_rsc { 40 &apps_rsc { 126 regulators-0 { !! 41 pm8350-rpmh-regulators { 127 compatible = "qcom,pm8350-rpmh 42 compatible = "qcom,pm8350-rpmh-regulators"; 128 qcom,pmic-id = "b"; 43 qcom,pmic-id = "b"; 129 44 130 vdd-s1-supply = <&vph_pwr>; 45 vdd-s1-supply = <&vph_pwr>; 131 vdd-s2-supply = <&vph_pwr>; 46 vdd-s2-supply = <&vph_pwr>; 132 vdd-s3-supply = <&vph_pwr>; 47 vdd-s3-supply = <&vph_pwr>; 133 vdd-s4-supply = <&vph_pwr>; 48 vdd-s4-supply = <&vph_pwr>; 134 vdd-s5-supply = <&vph_pwr>; 49 vdd-s5-supply = <&vph_pwr>; 135 vdd-s6-supply = <&vph_pwr>; 50 vdd-s6-supply = <&vph_pwr>; 136 vdd-s7-supply = <&vph_pwr>; 51 vdd-s7-supply = <&vph_pwr>; 137 vdd-s8-supply = <&vph_pwr>; 52 vdd-s8-supply = <&vph_pwr>; 138 vdd-s9-supply = <&vph_pwr>; 53 vdd-s9-supply = <&vph_pwr>; 139 vdd-s10-supply = <&vph_pwr>; 54 vdd-s10-supply = <&vph_pwr>; 140 vdd-s11-supply = <&vph_pwr>; 55 vdd-s11-supply = <&vph_pwr>; 141 vdd-s12-supply = <&vph_pwr>; 56 vdd-s12-supply = <&vph_pwr>; 142 57 143 vdd-l1-l4-supply = <&vreg_s11b 58 vdd-l1-l4-supply = <&vreg_s11b_0p95>; 144 vdd-l2-l7-supply = <&vreg_bob> 59 vdd-l2-l7-supply = <&vreg_bob>; 145 vdd-l3-l5-supply = <&vreg_bob> 60 vdd-l3-l5-supply = <&vreg_bob>; 146 vdd-l6-l9-l10-supply = <&vreg_ 61 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; 147 62 148 vreg_s10b_1p8: smps10 { 63 vreg_s10b_1p8: smps10 { 149 regulator-name = "vreg 64 regulator-name = "vreg_s10b_1p8"; 150 regulator-min-microvol 65 regulator-min-microvolt = <1800000>; 151 regulator-max-microvol 66 regulator-max-microvolt = <1800000>; 152 regulator-initial-mode 67 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 153 }; 68 }; 154 69 155 vreg_s11b_0p95: smps11 { 70 vreg_s11b_0p95: smps11 { 156 regulator-name = "vreg 71 regulator-name = "vreg_s11b_0p95"; 157 regulator-min-microvol 72 regulator-min-microvolt = <952000>; 158 regulator-max-microvol 73 regulator-max-microvolt = <952000>; 159 regulator-initial-mode 74 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 160 }; 75 }; 161 76 162 vreg_s12b_1p25: smps12 { 77 vreg_s12b_1p25: smps12 { 163 regulator-name = "vreg 78 regulator-name = "vreg_s12b_1p25"; 164 regulator-min-microvol 79 regulator-min-microvolt = <1256000>; 165 regulator-max-microvol 80 regulator-max-microvolt = <1256000>; 166 regulator-initial-mode 81 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 167 }; 82 }; 168 83 169 vreg_l1b_0p88: ldo1 { 84 vreg_l1b_0p88: ldo1 { 170 regulator-name = "vreg 85 regulator-name = "vreg_l1b_0p88"; 171 regulator-min-microvol 86 regulator-min-microvolt = <912000>; 172 regulator-max-microvol 87 regulator-max-microvolt = <920000>; 173 regulator-initial-mode 88 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 174 }; 89 }; 175 90 176 vreg_l2b_3p07: ldo2 { 91 vreg_l2b_3p07: ldo2 { 177 regulator-name = "vreg 92 regulator-name = "vreg_l2b_3p07"; 178 regulator-min-microvol 93 regulator-min-microvolt = <3072000>; 179 regulator-max-microvol 94 regulator-max-microvolt = <3072000>; 180 regulator-initial-mode 95 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 181 }; 96 }; 182 97 183 vreg_l3b_0p9: ldo3 { 98 vreg_l3b_0p9: ldo3 { 184 regulator-name = "vreg 99 regulator-name = "vreg_l3b_0p9"; 185 regulator-min-microvol 100 regulator-min-microvolt = <904000>; 186 regulator-max-microvol 101 regulator-max-microvolt = <904000>; 187 regulator-initial-mode 102 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 188 }; 103 }; 189 104 190 vreg_l5b_0p88: ldo5 { 105 vreg_l5b_0p88: ldo5 { 191 regulator-name = "vreg 106 regulator-name = "vreg_l5b_0p88"; 192 regulator-min-microvol 107 regulator-min-microvolt = <880000>; 193 regulator-max-microvol 108 regulator-max-microvolt = <888000>; 194 regulator-initial-mode 109 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 195 regulator-allow-set-lo 110 regulator-allow-set-load; 196 regulator-allowed-mode << 197 << 198 }; 111 }; 199 112 200 vreg_l6b_1p2: ldo6 { 113 vreg_l6b_1p2: ldo6 { 201 regulator-name = "vreg 114 regulator-name = "vreg_l6b_1p2"; 202 regulator-min-microvol 115 regulator-min-microvolt = <1200000>; 203 regulator-max-microvol 116 regulator-max-microvolt = <1208000>; 204 regulator-initial-mode 117 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 205 regulator-allow-set-lo 118 regulator-allow-set-load; 206 regulator-allowed-mode << 207 << 208 }; 119 }; 209 120 210 vreg_l7b_2p96: ldo7 { 121 vreg_l7b_2p96: ldo7 { 211 regulator-name = "vreg 122 regulator-name = "vreg_l7b_2p96"; 212 regulator-min-microvol 123 regulator-min-microvolt = <2504000>; 213 regulator-max-microvol 124 regulator-max-microvolt = <2504000>; 214 regulator-initial-mode 125 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 215 regulator-allow-set-lo 126 regulator-allow-set-load; 216 regulator-allowed-mode << 217 << 218 }; 127 }; 219 128 220 vreg_l9b_1p2: ldo9 { 129 vreg_l9b_1p2: ldo9 { 221 regulator-name = "vreg 130 regulator-name = "vreg_l9b_1p2"; 222 regulator-min-microvol 131 regulator-min-microvolt = <1200000>; 223 regulator-max-microvol 132 regulator-max-microvolt = <1200000>; 224 regulator-initial-mode 133 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 225 regulator-allow-set-lo 134 regulator-allow-set-load; 226 regulator-allowed-mode << 227 << 228 }; 135 }; 229 }; 136 }; 230 137 231 regulators-1 { !! 138 pm8350c-rpmh-regulators { 232 compatible = "qcom,pm8350c-rpm 139 compatible = "qcom,pm8350c-rpmh-regulators"; 233 qcom,pmic-id = "c"; 140 qcom,pmic-id = "c"; 234 141 235 vdd-s1-supply = <&vph_pwr>; 142 vdd-s1-supply = <&vph_pwr>; 236 vdd-s2-supply = <&vph_pwr>; 143 vdd-s2-supply = <&vph_pwr>; 237 vdd-s3-supply = <&vph_pwr>; 144 vdd-s3-supply = <&vph_pwr>; 238 vdd-s4-supply = <&vph_pwr>; 145 vdd-s4-supply = <&vph_pwr>; 239 vdd-s5-supply = <&vph_pwr>; 146 vdd-s5-supply = <&vph_pwr>; 240 vdd-s6-supply = <&vph_pwr>; 147 vdd-s6-supply = <&vph_pwr>; 241 vdd-s7-supply = <&vph_pwr>; 148 vdd-s7-supply = <&vph_pwr>; 242 vdd-s8-supply = <&vph_pwr>; 149 vdd-s8-supply = <&vph_pwr>; 243 vdd-s9-supply = <&vph_pwr>; 150 vdd-s9-supply = <&vph_pwr>; 244 vdd-s10-supply = <&vph_pwr>; 151 vdd-s10-supply = <&vph_pwr>; 245 152 246 vdd-l1-l12-supply = <&vreg_s1c 153 vdd-l1-l12-supply = <&vreg_s1c_1p86>; 247 vdd-l2-l8-supply = <&vreg_s1c_ 154 vdd-l2-l8-supply = <&vreg_s1c_1p86>; 248 vdd-l3-l4-l5-l7-l13-supply = < 155 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 249 vdd-l6-l9-l11-supply = <&vreg_ 156 vdd-l6-l9-l11-supply = <&vreg_bob>; 250 vdd-l10-supply = <&vreg_s12b_1 157 vdd-l10-supply = <&vreg_s12b_1p25>; 251 158 252 vdd-bob-supply = <&vph_pwr>; 159 vdd-bob-supply = <&vph_pwr>; 253 160 254 vreg_s1c_1p86: smps1 { 161 vreg_s1c_1p86: smps1 { 255 regulator-name = "vreg 162 regulator-name = "vreg_s1c_1p86"; 256 regulator-min-microvol 163 regulator-min-microvolt = <1856000>; 257 regulator-max-microvol 164 regulator-max-microvolt = <1880000>; 258 regulator-initial-mode 165 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 259 }; 166 }; 260 167 261 vreg_bob: bob { 168 vreg_bob: bob { 262 regulator-name = "vreg 169 regulator-name = "vreg_bob"; 263 regulator-min-microvol 170 regulator-min-microvolt = <3008000>; 264 regulator-max-microvol 171 regulator-max-microvolt = <3960000>; 265 regulator-initial-mode 172 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 266 }; 173 }; 267 174 268 vreg_l1c_1p8: ldo1 { 175 vreg_l1c_1p8: ldo1 { 269 regulator-name = "vreg 176 regulator-name = "vreg_l1c_1p8"; 270 regulator-min-microvol 177 regulator-min-microvolt = <1800000>; 271 regulator-max-microvol 178 regulator-max-microvolt = <1800000>; 272 regulator-initial-mode 179 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 273 }; 180 }; 274 181 275 vreg_l2c_1p8: ldo2 { 182 vreg_l2c_1p8: ldo2 { 276 regulator-name = "vreg 183 regulator-name = "vreg_l2c_1p8"; 277 regulator-min-microvol 184 regulator-min-microvolt = <1800000>; 278 regulator-max-microvol 185 regulator-max-microvolt = <1800000>; 279 regulator-initial-mode 186 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 280 }; 187 }; 281 188 282 vreg_l6c_1p8: ldo6 { 189 vreg_l6c_1p8: ldo6 { 283 regulator-name = "vreg 190 regulator-name = "vreg_l6c_1p8"; 284 regulator-min-microvol 191 regulator-min-microvolt = <1800000>; 285 regulator-max-microvol 192 regulator-max-microvolt = <2960000>; 286 regulator-initial-mode 193 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 287 }; 194 }; 288 195 289 vreg_l9c_2p96: ldo9 { 196 vreg_l9c_2p96: ldo9 { 290 regulator-name = "vreg 197 regulator-name = "vreg_l9c_2p96"; 291 regulator-min-microvol 198 regulator-min-microvolt = <2960000>; 292 regulator-max-microvol 199 regulator-max-microvolt = <3008000>; 293 regulator-initial-mode 200 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 294 }; 201 }; 295 202 296 vreg_l10c_1p2: ldo10 { 203 vreg_l10c_1p2: ldo10 { 297 regulator-name = "vreg 204 regulator-name = "vreg_l10c_1p2"; 298 regulator-min-microvol 205 regulator-min-microvolt = <1200000>; 299 regulator-max-microvol 206 regulator-max-microvolt = <1200000>; 300 regulator-initial-mode 207 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 301 }; 208 }; 302 }; 209 }; 303 << 304 regulators-2 { << 305 compatible = "qcom,pmr735a-rpm << 306 qcom,pmic-id = "e"; << 307 << 308 vdd-s1-supply = <&vph_pwr>; << 309 vdd-s2-supply = <&vph_pwr>; << 310 vdd-s3-supply = <&vph_pwr>; << 311 << 312 vdd-l1-l2-supply = <&vreg_s2e_ << 313 vdd-l3-supply = <&vreg_s1e_1p2 << 314 vdd-l4-supply = <&vreg_s1c_1p8 << 315 vdd-l5-l6-supply = <&vreg_s1c_ << 316 vdd-l7-bob-supply = <&vreg_bob << 317 << 318 vreg_s1e_1p25: smps1 { << 319 regulator-name = "vreg << 320 regulator-min-microvol << 321 regulator-max-microvol << 322 }; << 323 << 324 vreg_s2e_0p85: smps2 { << 325 regulator-name = "vreg << 326 regulator-min-microvol << 327 regulator-max-microvol << 328 }; << 329 << 330 vreg_s3e_2p20: smps3 { << 331 regulator-name = "vreg << 332 regulator-min-microvol << 333 regulator-max-microvol << 334 }; << 335 << 336 vreg_l1e_0p9: ldo1 { << 337 regulator-name = "vreg << 338 regulator-min-microvol << 339 regulator-max-microvol << 340 }; << 341 << 342 vreg_l2e_1p2: ldo2 { << 343 regulator-name = "vreg << 344 regulator-min-microvol << 345 regulator-max-microvol << 346 }; << 347 << 348 vreg_l3e_1p2: ldo3 { << 349 regulator-name = "vreg << 350 regulator-min-microvol << 351 regulator-max-microvol << 352 }; << 353 << 354 vreg_l4e_1p7: ldo4 { << 355 regulator-name = "vreg << 356 regulator-min-microvol << 357 regulator-max-microvol << 358 }; << 359 << 360 vreg_l5e_0p8: ldo5 { << 361 regulator-name = "vreg << 362 regulator-min-microvol << 363 regulator-max-microvol << 364 }; << 365 << 366 vreg_l6e_0p8: ldo6 { << 367 regulator-name = "vreg << 368 regulator-min-microvol << 369 regulator-max-microvol << 370 }; << 371 << 372 vreg_l7e_2p8: ldo7 { << 373 regulator-name = "vreg << 374 regulator-min-microvol << 375 regulator-max-microvol << 376 }; << 377 }; << 378 }; 210 }; 379 211 380 &cdsp { 212 &cdsp { 381 status = "okay"; 213 status = "okay"; 382 firmware-name = "qcom/sm8350/cdsp.mbn" 214 firmware-name = "qcom/sm8350/cdsp.mbn"; 383 }; 215 }; 384 216 385 &dispcc { << 386 status = "okay"; << 387 }; << 388 << 389 &mdss_dsi0 { << 390 vdda-supply = <&vreg_l6b_1p2>; << 391 status = "okay"; << 392 << 393 ports { << 394 port@1 { << 395 endpoint { << 396 remote-endpoin << 397 data-lanes = < << 398 }; << 399 }; << 400 }; << 401 }; << 402 << 403 &mdss_dsi0_phy { << 404 vdds-supply = <&vreg_l5b_0p88>; << 405 status = "okay"; << 406 }; << 407 << 408 &gpi_dma1 { << 409 status = "okay"; << 410 }; << 411 << 412 &gpu { << 413 status = "okay"; << 414 << 415 zap-shader { << 416 firmware-name = "qcom/sm8350/a << 417 }; << 418 }; << 419 << 420 &i2c13 { << 421 clock-frequency = <100000>; << 422 << 423 status = "okay"; << 424 << 425 typec-mux@42 { << 426 compatible = "fcs,fsa4480"; << 427 reg = <0x42>; << 428 << 429 interrupts-extended = <&tlmm 2 << 430 << 431 vcc-supply = <&vreg_bob>; << 432 mode-switch; << 433 orientation-switch; << 434 << 435 port { << 436 fsa4480_sbu_mux: endpo << 437 remote-endpoin << 438 }; << 439 }; << 440 }; << 441 }; << 442 << 443 &i2c15 { << 444 clock-frequency = <400000>; << 445 status = "okay"; << 446 << 447 lt9611_codec: hdmi-bridge@2b { << 448 compatible = "lontium,lt9611ux << 449 reg = <0x2b>; << 450 << 451 interrupts-extended = <&tlmm 5 << 452 reset-gpios = <&tlmm 48 GPIO_A << 453 << 454 vdd-supply = <<9611_1v2>; << 455 vcc-supply = <<9611_3v3>; << 456 << 457 pinctrl-names = "default"; << 458 pinctrl-0 = <<9611_state>; << 459 << 460 ports { << 461 #address-cells = <1>; << 462 #size-cells = <0>; << 463 << 464 port@0 { << 465 reg = <0>; << 466 << 467 lt9611_a: endp << 468 remote << 469 }; << 470 }; << 471 << 472 port@2 { << 473 reg = <2>; << 474 << 475 lt9611_out: en << 476 remote << 477 }; << 478 }; << 479 }; << 480 }; << 481 }; << 482 << 483 &mdss { << 484 status = "okay"; << 485 }; << 486 << 487 &mdss_dp { << 488 status = "okay"; << 489 }; << 490 << 491 &mdss_dp_out { << 492 data-lanes = <0 1>; << 493 }; << 494 << 495 &mpss { 217 &mpss { 496 status = "okay"; 218 status = "okay"; 497 firmware-name = "qcom/sm8350/modem.mbn 219 firmware-name = "qcom/sm8350/modem.mbn"; 498 }; 220 }; 499 221 500 &pcie0 { << 501 pinctrl-names = "default"; << 502 pinctrl-0 = <&pcie0_default_state>; << 503 << 504 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LO << 505 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIG << 506 << 507 status = "okay"; << 508 }; << 509 << 510 &pcie0_phy { << 511 vdda-phy-supply = <&vreg_l5b_0p88>; << 512 vdda-pll-supply = <&vreg_l6b_1p2>; << 513 << 514 status = "okay"; << 515 }; << 516 << 517 &pcie1 { << 518 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LO << 519 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIG << 520 << 521 pinctrl-names = "default"; << 522 pinctrl-0 = <&pcie1_default_state>; << 523 << 524 status = "okay"; << 525 }; << 526 << 527 &pcie1_phy { << 528 status = "okay"; << 529 vdda-phy-supply = <&vreg_l5b_0p88>; << 530 vdda-pll-supply = <&vreg_l6b_1p2>; << 531 }; << 532 << 533 &qupv3_id_0 { 222 &qupv3_id_0 { 534 status = "okay"; 223 status = "okay"; 535 }; 224 }; 536 225 537 &qupv3_id_1 { << 538 status = "okay"; << 539 }; << 540 << 541 &qupv3_id_2 { << 542 status = "okay"; << 543 }; << 544 << 545 &sdhc_2 { << 546 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH> << 547 pinctrl-names = "default", "sleep"; << 548 pinctrl-0 = <&sdc2_default_state &sdc2 << 549 pinctrl-1 = <&sdc2_sleep_state &sdc2_c << 550 vmmc-supply = <&vreg_l9c_2p96>; << 551 vqmmc-supply = <&vreg_l6c_1p8>; << 552 no-sdio; << 553 no-mmc; << 554 status = "okay"; << 555 }; << 556 << 557 &slpi { 226 &slpi { 558 status = "okay"; 227 status = "okay"; 559 firmware-name = "qcom/sm8350/slpi.mbn" 228 firmware-name = "qcom/sm8350/slpi.mbn"; 560 }; 229 }; 561 230 562 &tlmm { 231 &tlmm { 563 gpio-reserved-ranges = <52 8>; 232 gpio-reserved-ranges = <52 8>; 564 << 565 gpio-line-names = << 566 "APPS_I2C_SDA", /* GPIO_0 */ << 567 "APPS_I2C_SCL", << 568 "FSA_INT_N", << 569 "USER_LED3_EN", << 570 "SMBUS_SDA_1P8", << 571 "SMBUS_SCL_1P8", << 572 "2M2_3P3_EN", << 573 "ALERT_DUAL_M2_N", << 574 "EXP_UART_CTS", << 575 "EXP_UART_RFR", << 576 "EXP_UART_TX", /* GPIO_10 */ << 577 "EXP_UART_RX", << 578 "NC", << 579 "NC", << 580 "RCM_MARKER1", << 581 "WSA0_EN", << 582 "CAM1_RESET_N", << 583 "CAM0_RESET_N", << 584 "DEBUG_UART_TX", << 585 "DEBUG_UART_RX", << 586 "TS_I2C_SDA", /* GPIO_20 */ << 587 "TS_I2C_SCL", << 588 "TS_RESET_N", << 589 "TS_INT_N", << 590 "DISP0_RESET_N", << 591 "DISP1_RESET_N", << 592 "ETH_RESET", << 593 "RCM_MARKER2", << 594 "CAM_DC_MIPI_MUX_EN", << 595 "CAM_DC_MIPI_MUX_SEL", << 596 "AFC_PHY_TA_D_PLUS", /* GPIO_3 << 597 "AFC_PHY_TA_D_MINUS", << 598 "PM8008_1_IRQ", << 599 "PM8008_1_RESET_N", << 600 "PM8008_2_IRQ", << 601 "PM8008_2_RESET_N", << 602 "CAM_DC_I3C_SDA", << 603 "CAM_DC_I3C_SCL", << 604 "FP_INT_N", << 605 "FP_WUHB_INT_N", << 606 "SMB_SPMI_DATA", /* GPIO_40 */ << 607 "SMB_SPMI_CLK", << 608 "USB_HUB_RESET", << 609 "FORCE_USB_BOOT", << 610 "LRF_IRQ", << 611 "NC", << 612 "IMU2_INT", << 613 "HDMI_3P3_EN", << 614 "HDMI_RSTN", << 615 "HDMI_1P2_EN", << 616 "HDMI_INT", /* GPIO_50 */ << 617 "USB1_ID", << 618 "FP_SPI_MISO", << 619 "FP_SPI_MOSI", << 620 "FP_SPI_CLK", << 621 "FP_SPI_CS_N", << 622 "NFC_ESE_SPI_MISO", << 623 "NFC_ESE_SPI_MOSI", << 624 "NFC_ESE_SPI_CLK", << 625 "NFC_ESE_SPI_CS", << 626 "NFC_I2C_SDA", /* GPIO_60 */ << 627 "NFC_I2C_SCLC", << 628 "NFC_EN", << 629 "NFC_CLK_REQ", << 630 "HST_WLAN_EN", << 631 "HST_BT_EN", << 632 "HST_SW_CTRL", << 633 "NC", << 634 "HST_BT_UART_CTS", << 635 "HST_BT_UART_RFR", << 636 "HST_BT_UART_TX", /* GPIO_70 * << 637 "HST_BT_UART_RX", << 638 "CAM_DC_SPI0_MISO", << 639 "CAM_DC_SPI0_MOSI", << 640 "CAM_DC_SPI0_CLK", << 641 "CAM_DC_SPI0_CS_N", << 642 "CAM_DC_SPI1_MISO", << 643 "CAM_DC_SPI1_MOSI", << 644 "CAM_DC_SPI1_CLK", << 645 "CAM_DC_SPI1_CS_N", << 646 "HALL_INT_N", /* GPIO_80 */ << 647 "USB_PHY_PS", << 648 "MDP_VSYNC_P", << 649 "MDP_VSYNC_S", << 650 "ETH_3P3_EN", << 651 "RADAR_INT", << 652 "NFC_DWL_REQ", << 653 "SM_GPIO_87", << 654 "WCD_RESET_N", << 655 "ALSP_INT_N", << 656 "PRESS_INT", /* GPIO_90 */ << 657 "SAR_INT_N", << 658 "SD_CARD_DET_N", << 659 "NC", << 660 "PCIE0_RESET_N", << 661 "PCIE0_CLK_REQ_N", << 662 "PCIE0_WAKE_N", << 663 "PCIE1_RESET_N", << 664 "PCIE1_CLK_REQ_N", << 665 "PCIE1_WAKE_N", << 666 "CAM_MCLK0", /* GPIO_100 */ << 667 "CAM_MCLK1", << 668 "CAM_MCLK2", << 669 "CAM_MCLK3", << 670 "CAM_MCLK4", << 671 "CAM_MCLK5", << 672 "CAM2_RESET_N", << 673 "CCI_I2C0_SDA", << 674 "CCI_I2C0_SCL", << 675 "CCI_I2C1_SDA", << 676 "CCI_I2C1_SCL", /* GPIO_110 */ << 677 "CCI_I2C2_SDA", << 678 "CCI_I2C2_SCL", << 679 "CCI_I2C3_SDA", << 680 "CCI_I2C3_SCL", << 681 "CAM5_RESET_N", << 682 "CAM4_RESET_N", << 683 "CAM3_RESET_N", << 684 "IMU1_INT", << 685 "MAG_INT_N", << 686 "MI2S2_I2S_SCK", /* GPIO_120 * << 687 "MI2S2_I2S_DAT0", << 688 "MI2S2_I2S_WS", << 689 "HIFI_DAC_I2S_MCLK", << 690 "MI2S2_I2S_DAT1", << 691 "HIFI_DAC_I2S_SCK", << 692 "HIFI_DAC_I2S_DAT0", << 693 "NC", << 694 "HIFI_DAC_I2S_WS", << 695 "HST_BT_WLAN_SLIMBUS_CLK", << 696 "HST_BT_WLAN_SLIMBUS_DAT0", /* << 697 "BT_LED_EN", << 698 "WLAN_LED_EN", << 699 "NC", << 700 "NC", << 701 "NC", << 702 "UIM2_PRESENT", << 703 "NC", << 704 "NC", << 705 "NC", << 706 "UIM1_PRESENT", /* GPIO_140 */ << 707 "NC", << 708 "SM_RFFE0_DATA", << 709 "NC", << 710 "SM_RFFE1_DATA", << 711 "SM_MSS_GRFC4", << 712 "SM_MSS_GRFC5", << 713 "SM_MSS_GRFC6", << 714 "SM_MSS_GRFC7", << 715 "SM_RFFE4_CLK", << 716 "SM_RFFE4_DATA", /* GPIO_150 * << 717 "WLAN_COEX_UART1_RX", << 718 "WLAN_COEX_UART1_TX", << 719 "HST_SW_CTRL", << 720 "DSI0_STATUS", << 721 "DSI1_STATUS", << 722 "APPS_PBL_BOOT_SPEED_1", << 723 "APPS_BOOT_FROM_ROM", << 724 "APPS_PBL_BOOT_SPEED_0", << 725 "QLINK0_REQ", << 726 "QLINK0_EN", /* GPIO_160 */ << 727 "QLINK0_WMSS_RESET_N", << 728 "NC", << 729 "NC", << 730 "NC", << 731 "NC", << 732 "NC", << 733 "NC", << 734 "WCD_SWR_TX_CLK", << 735 "WCD_SWR_TX_DATA0", << 736 "WCD_SWR_TX_DATA1", /* GPIO_17 << 737 "WCD_SWR_RX_CLK", << 738 "WCD_SWR_RX_DATA0", << 739 "WCD_SWR_RX_DATA1", << 740 "DMIC01_CLK", << 741 "DMIC01_DATA", << 742 "DMIC23_CLK", << 743 "DMIC23_DATA", << 744 "WSA_SWR_CLK", << 745 "WSA_SWR_DATA", << 746 "DMIC45_CLK", /* GPIO_180 */ << 747 "DMIC45_DATA", << 748 "WCD_SWR_TX_DATA2", << 749 "SENSOR_I3C_SDA", << 750 "SENSOR_I3C_SCL", << 751 "CAM_OIS0_I3C_SDA", << 752 "CAM_OIS0_I3C_SCL", << 753 "IMU_SPI_MISO", << 754 "IMU_SPI_MOSI", << 755 "IMU_SPI_CLK", << 756 "IMU_SPI_CS_N", /* GPIO_190 */ << 757 "MAG_I2C_SDA", << 758 "MAG_I2C_SCL", << 759 "SENSOR_I2C_SDA", << 760 "SENSOR_I2C_SCL", << 761 "RADAR_SPI_MISO", << 762 "RADAR_SPI_MOSI", << 763 "RADAR_SPI_CLK", << 764 "RADAR_SPI_CS_N", << 765 "HST_BLE_UART_TX", << 766 "HST_BLE_UART_RX", /* GPIO_200 << 767 "HST_WLAN_UART_TX", << 768 "HST_WLAN_UART_RX"; << 769 << 770 pcie0_default_state: pcie0-default-sta << 771 perst-pins { << 772 pins = "gpio94"; << 773 function = "gpio"; << 774 drive-strength = <2>; << 775 bias-pull-down; << 776 }; << 777 << 778 clkreq-pins { << 779 pins = "gpio95"; << 780 function = "pcie0_clkr << 781 drive-strength = <2>; << 782 bias-pull-up; << 783 }; << 784 << 785 wake-pins { << 786 pins = "gpio96"; << 787 function = "gpio"; << 788 drive-strength = <2>; << 789 bias-pull-up; << 790 }; << 791 }; << 792 << 793 pcie1_default_state: pcie1-default-sta << 794 perst-pins { << 795 pins = "gpio97"; << 796 function = "gpio"; << 797 drive-strength = <2>; << 798 bias-pull-down; << 799 }; << 800 << 801 clkreq-pins { << 802 pins = "gpio98"; << 803 function = "pcie1_clkr << 804 drive-strength = <2>; << 805 bias-pull-up; << 806 }; << 807 << 808 wake-pins { << 809 pins = "gpio99"; << 810 function = "gpio"; << 811 drive-strength = <2>; << 812 bias-pull-up; << 813 }; << 814 }; << 815 << 816 sdc2_card_det_n: sd-card-det-n-state { << 817 pins = "gpio92"; << 818 function = "gpio"; << 819 drive-strength = <2>; << 820 bias-pull-up; << 821 }; << 822 }; 233 }; 823 234 824 &uart2 { 235 &uart2 { 825 status = "okay"; 236 status = "okay"; 826 }; 237 }; 827 238 828 &ufs_mem_hc { 239 &ufs_mem_hc { 829 status = "okay"; 240 status = "okay"; 830 241 831 reset-gpios = <&tlmm 203 GPIO_ACTIVE_L 242 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; 832 243 833 vcc-supply = <&vreg_l7b_2p96>; 244 vcc-supply = <&vreg_l7b_2p96>; 834 vcc-max-microamp = <800000>; 245 vcc-max-microamp = <800000>; 835 vccq-supply = <&vreg_l9b_1p2>; 246 vccq-supply = <&vreg_l9b_1p2>; 836 vccq-max-microamp = <900000>; 247 vccq-max-microamp = <900000>; 837 vdd-hba-supply = <&vreg_l9b_1p2>; << 838 }; 248 }; 839 249 840 &ufs_mem_phy { 250 &ufs_mem_phy { 841 status = "okay"; 251 status = "okay"; 842 252 843 vdda-phy-supply = <&vreg_l5b_0p88>; 253 vdda-phy-supply = <&vreg_l5b_0p88>; 844 vdda-pll-supply = <&vreg_l6b_1p2>; 254 vdda-pll-supply = <&vreg_l6b_1p2>; 845 }; 255 }; 846 256 847 &usb_1 { 257 &usb_1 { 848 status = "okay"; 258 status = "okay"; 849 }; 259 }; 850 260 851 &usb_1_dwc3 { 261 &usb_1_dwc3 { 852 dr_mode = "otg"; !! 262 /* TODO: Define USB-C connector properly */ 853 usb-role-switch; !! 263 dr_mode = "peripheral"; 854 }; << 855 << 856 &usb_1_dwc3_hs { << 857 remote-endpoint = <&pmic_glink_hs_in>; << 858 }; 264 }; 859 265 860 &usb_1_hsphy { 266 &usb_1_hsphy { 861 status = "okay"; 267 status = "okay"; 862 268 863 vdda-pll-supply = <&vreg_l5b_0p88>; 269 vdda-pll-supply = <&vreg_l5b_0p88>; 864 vdda18-supply = <&vreg_l1c_1p8>; 270 vdda18-supply = <&vreg_l1c_1p8>; 865 vdda33-supply = <&vreg_l2b_3p07>; 271 vdda33-supply = <&vreg_l2b_3p07>; 866 }; 272 }; 867 273 868 &usb_1_qmpphy { 274 &usb_1_qmpphy { 869 status = "okay"; 275 status = "okay"; 870 276 871 vdda-phy-supply = <&vreg_l6b_1p2>; 277 vdda-phy-supply = <&vreg_l6b_1p2>; 872 vdda-pll-supply = <&vreg_l1b_0p88>; 278 vdda-pll-supply = <&vreg_l1b_0p88>; 873 }; 279 }; 874 280 875 &usb_1_qmpphy_out { << 876 remote-endpoint = <&pmic_glink_ss_in>; << 877 }; << 878 << 879 &usb_2 { 281 &usb_2 { 880 status = "okay"; 282 status = "okay"; 881 }; 283 }; 882 284 883 &usb_2_dwc3 { 285 &usb_2_dwc3 { 884 dr_mode = "host"; 286 dr_mode = "host"; 885 287 886 pinctrl-names = "default"; 288 pinctrl-names = "default"; 887 pinctrl-0 = <&usb_hub_enabled_state>; 289 pinctrl-0 = <&usb_hub_enabled_state>; 888 }; 290 }; 889 291 890 &usb_2_hsphy { 292 &usb_2_hsphy { 891 status = "okay"; 293 status = "okay"; 892 294 893 vdda-pll-supply = <&vreg_l5b_0p88>; 295 vdda-pll-supply = <&vreg_l5b_0p88>; 894 vdda18-supply = <&vreg_l1c_1p8>; 296 vdda18-supply = <&vreg_l1c_1p8>; 895 vdda33-supply = <&vreg_l2b_3p07>; 297 vdda33-supply = <&vreg_l2b_3p07>; 896 }; 298 }; 897 299 898 &usb_2_qmpphy { 300 &usb_2_qmpphy { 899 status = "okay"; 301 status = "okay"; 900 302 901 vdda-phy-supply = <&vreg_l6b_1p2>; 303 vdda-phy-supply = <&vreg_l6b_1p2>; 902 vdda-pll-supply = <&vreg_l5b_0p88>; 304 vdda-pll-supply = <&vreg_l5b_0p88>; 903 }; 305 }; 904 306 905 /* PINCTRL - additions to nodes defined in sm8 307 /* PINCTRL - additions to nodes defined in sm8350.dtsi */ 906 308 907 &tlmm { 309 &tlmm { 908 usb_hub_enabled_state: usb-hub-enabled 310 usb_hub_enabled_state: usb-hub-enabled-state { 909 pins = "gpio42"; 311 pins = "gpio42"; 910 function = "gpio"; 312 function = "gpio"; 911 313 912 drive-strength = <2>; 314 drive-strength = <2>; 913 output-low; 315 output-low; 914 }; << 915 << 916 lt9611_state: lt9611-state { << 917 rst-pins { << 918 pins = "gpio48"; << 919 function = "gpio"; << 920 << 921 output-high; << 922 input-disable; << 923 }; << 924 << 925 irq-pins { << 926 pins = "gpio50"; << 927 function = "gpio"; << 928 bias-disable; << 929 }; << 930 }; 316 }; 931 }; 317 };
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