1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2020-2021, Linaro Limited 3 * Copyright (c) 2020-2021, Linaro Limited
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/regulator/qcom,rpmh-regu 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include "sm8350.dtsi" 9 #include "sm8350.dtsi"
10 #include "pm8350.dtsi" <<
11 #include "pm8350b.dtsi" <<
12 #include "pm8350c.dtsi" <<
13 #include "pmk8350.dtsi" <<
14 #include "pmr735a.dtsi" <<
15 #include "pmr735b.dtsi" <<
16 10
17 / { 11 / {
18 model = "Qualcomm Technologies, Inc. S 12 model = "Qualcomm Technologies, Inc. SM8350 HDK";
19 compatible = "qcom,sm8350-hdk", "qcom, 13 compatible = "qcom,sm8350-hdk", "qcom,sm8350";
20 chassis-type = "embedded"; <<
21 14
22 aliases { 15 aliases {
23 serial0 = &uart2; 16 serial0 = &uart2;
24 }; 17 };
25 18
26 chosen { 19 chosen {
27 stdout-path = "serial0:115200n 20 stdout-path = "serial0:115200n8";
28 }; 21 };
29 22
30 hdmi-connector { <<
31 compatible = "hdmi-connector"; <<
32 type = "a"; <<
33 <<
34 port { <<
35 hdmi_con: endpoint { <<
36 remote-endpoin <<
37 }; <<
38 }; <<
39 }; <<
40 <<
41 pmic-glink { <<
42 compatible = "qcom,sm8350-pmic <<
43 #address-cells = <1>; <<
44 #size-cells = <0>; <<
45 orientation-gpios = <&tlmm 81 <<
46 <<
47 connector@0 { <<
48 compatible = "usb-c-co <<
49 reg = <0>; <<
50 power-role = "dual"; <<
51 data-role = "dual"; <<
52 <<
53 ports { <<
54 #address-cells <<
55 #size-cells = <<
56 <<
57 port@0 { <<
58 reg = <<
59 <<
60 pmic_g <<
61 <<
62 }; <<
63 }; <<
64 <<
65 port@1 { <<
66 reg = <<
67 <<
68 pmic_g <<
69 <<
70 }; <<
71 }; <<
72 <<
73 port@2 { <<
74 reg = <<
75 <<
76 pmic_g <<
77 <<
78 }; <<
79 }; <<
80 }; <<
81 }; <<
82 }; <<
83 <<
84 vph_pwr: vph-pwr-regulator { 23 vph_pwr: vph-pwr-regulator {
85 compatible = "regulator-fixed" 24 compatible = "regulator-fixed";
86 regulator-name = "vph_pwr"; 25 regulator-name = "vph_pwr";
87 regulator-min-microvolt = <370 26 regulator-min-microvolt = <3700000>;
88 regulator-max-microvolt = <370 27 regulator-max-microvolt = <3700000>;
89 28
90 regulator-always-on; 29 regulator-always-on;
91 regulator-boot-on; 30 regulator-boot-on;
92 }; 31 };
93 <<
94 lt9611_1v2: lt9611-1v2-regulator { <<
95 compatible = "regulator-fixed" <<
96 regulator-name = "LT9611_1V2"; <<
97 <<
98 vin-supply = <&vph_pwr>; <<
99 regulator-min-microvolt = <120 <<
100 regulator-max-microvolt = <120 <<
101 gpio = <&tlmm 49 GPIO_ACTIVE_H <<
102 enable-active-high; <<
103 regulator-boot-on; <<
104 }; <<
105 <<
106 lt9611_3v3: lt9611-3v3-regulator { <<
107 compatible = "regulator-fixed" <<
108 regulator-name = "LT9611_3V3"; <<
109 <<
110 vin-supply = <&vreg_bob>; <<
111 gpio = <&tlmm 47 GPIO_ACTIVE_H <<
112 regulator-min-microvolt = <330 <<
113 regulator-max-microvolt = <330 <<
114 enable-active-high; <<
115 regulator-boot-on; <<
116 regulator-always-on; <<
117 }; <<
118 }; 32 };
119 33
120 &adsp { 34 &adsp {
121 status = "okay"; 35 status = "okay";
122 firmware-name = "qcom/sm8350/adsp.mbn" 36 firmware-name = "qcom/sm8350/adsp.mbn";
123 }; 37 };
124 38
125 &apps_rsc { 39 &apps_rsc {
126 regulators-0 { !! 40 pm8350-rpmh-regulators {
127 compatible = "qcom,pm8350-rpmh 41 compatible = "qcom,pm8350-rpmh-regulators";
128 qcom,pmic-id = "b"; 42 qcom,pmic-id = "b";
129 43
130 vdd-s1-supply = <&vph_pwr>; 44 vdd-s1-supply = <&vph_pwr>;
131 vdd-s2-supply = <&vph_pwr>; 45 vdd-s2-supply = <&vph_pwr>;
132 vdd-s3-supply = <&vph_pwr>; 46 vdd-s3-supply = <&vph_pwr>;
133 vdd-s4-supply = <&vph_pwr>; 47 vdd-s4-supply = <&vph_pwr>;
134 vdd-s5-supply = <&vph_pwr>; 48 vdd-s5-supply = <&vph_pwr>;
135 vdd-s6-supply = <&vph_pwr>; 49 vdd-s6-supply = <&vph_pwr>;
136 vdd-s7-supply = <&vph_pwr>; 50 vdd-s7-supply = <&vph_pwr>;
137 vdd-s8-supply = <&vph_pwr>; 51 vdd-s8-supply = <&vph_pwr>;
138 vdd-s9-supply = <&vph_pwr>; 52 vdd-s9-supply = <&vph_pwr>;
139 vdd-s10-supply = <&vph_pwr>; 53 vdd-s10-supply = <&vph_pwr>;
140 vdd-s11-supply = <&vph_pwr>; 54 vdd-s11-supply = <&vph_pwr>;
141 vdd-s12-supply = <&vph_pwr>; 55 vdd-s12-supply = <&vph_pwr>;
142 56
143 vdd-l1-l4-supply = <&vreg_s11b 57 vdd-l1-l4-supply = <&vreg_s11b_0p95>;
144 vdd-l2-l7-supply = <&vreg_bob> 58 vdd-l2-l7-supply = <&vreg_bob>;
145 vdd-l3-l5-supply = <&vreg_bob> 59 vdd-l3-l5-supply = <&vreg_bob>;
146 vdd-l6-l9-l10-supply = <&vreg_ 60 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>;
147 61
148 vreg_s10b_1p8: smps10 { 62 vreg_s10b_1p8: smps10 {
149 regulator-name = "vreg 63 regulator-name = "vreg_s10b_1p8";
150 regulator-min-microvol 64 regulator-min-microvolt = <1800000>;
151 regulator-max-microvol 65 regulator-max-microvolt = <1800000>;
152 regulator-initial-mode 66 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153 }; 67 };
154 68
155 vreg_s11b_0p95: smps11 { 69 vreg_s11b_0p95: smps11 {
156 regulator-name = "vreg 70 regulator-name = "vreg_s11b_0p95";
157 regulator-min-microvol 71 regulator-min-microvolt = <952000>;
158 regulator-max-microvol 72 regulator-max-microvolt = <952000>;
159 regulator-initial-mode 73 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
160 }; 74 };
161 75
162 vreg_s12b_1p25: smps12 { 76 vreg_s12b_1p25: smps12 {
163 regulator-name = "vreg 77 regulator-name = "vreg_s12b_1p25";
164 regulator-min-microvol 78 regulator-min-microvolt = <1256000>;
165 regulator-max-microvol 79 regulator-max-microvolt = <1256000>;
166 regulator-initial-mode 80 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
167 }; 81 };
168 82
169 vreg_l1b_0p88: ldo1 { 83 vreg_l1b_0p88: ldo1 {
170 regulator-name = "vreg 84 regulator-name = "vreg_l1b_0p88";
171 regulator-min-microvol 85 regulator-min-microvolt = <912000>;
172 regulator-max-microvol 86 regulator-max-microvolt = <920000>;
173 regulator-initial-mode 87 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
174 }; 88 };
175 89
176 vreg_l2b_3p07: ldo2 { 90 vreg_l2b_3p07: ldo2 {
177 regulator-name = "vreg 91 regulator-name = "vreg_l2b_3p07";
178 regulator-min-microvol 92 regulator-min-microvolt = <3072000>;
179 regulator-max-microvol 93 regulator-max-microvolt = <3072000>;
180 regulator-initial-mode 94 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
181 }; 95 };
182 96
183 vreg_l3b_0p9: ldo3 { 97 vreg_l3b_0p9: ldo3 {
184 regulator-name = "vreg 98 regulator-name = "vreg_l3b_0p9";
185 regulator-min-microvol 99 regulator-min-microvolt = <904000>;
186 regulator-max-microvol 100 regulator-max-microvolt = <904000>;
187 regulator-initial-mode 101 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
188 }; 102 };
189 103
190 vreg_l5b_0p88: ldo5 { 104 vreg_l5b_0p88: ldo5 {
191 regulator-name = "vreg 105 regulator-name = "vreg_l5b_0p88";
192 regulator-min-microvol 106 regulator-min-microvolt = <880000>;
193 regulator-max-microvol 107 regulator-max-microvolt = <888000>;
194 regulator-initial-mode 108 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
195 regulator-allow-set-lo 109 regulator-allow-set-load;
196 regulator-allowed-mode <<
197 <<
198 }; 110 };
199 111
200 vreg_l6b_1p2: ldo6 { 112 vreg_l6b_1p2: ldo6 {
201 regulator-name = "vreg 113 regulator-name = "vreg_l6b_1p2";
202 regulator-min-microvol 114 regulator-min-microvolt = <1200000>;
203 regulator-max-microvol 115 regulator-max-microvolt = <1208000>;
204 regulator-initial-mode 116 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
205 regulator-allow-set-lo 117 regulator-allow-set-load;
206 regulator-allowed-mode <<
207 <<
208 }; 118 };
209 119
210 vreg_l7b_2p96: ldo7 { 120 vreg_l7b_2p96: ldo7 {
211 regulator-name = "vreg 121 regulator-name = "vreg_l7b_2p96";
212 regulator-min-microvol 122 regulator-min-microvolt = <2504000>;
213 regulator-max-microvol 123 regulator-max-microvolt = <2504000>;
214 regulator-initial-mode 124 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
215 regulator-allow-set-lo 125 regulator-allow-set-load;
216 regulator-allowed-mode <<
217 <<
218 }; 126 };
219 127
220 vreg_l9b_1p2: ldo9 { 128 vreg_l9b_1p2: ldo9 {
221 regulator-name = "vreg 129 regulator-name = "vreg_l9b_1p2";
222 regulator-min-microvol 130 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 131 regulator-max-microvolt = <1200000>;
224 regulator-initial-mode 132 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 regulator-allow-set-lo 133 regulator-allow-set-load;
226 regulator-allowed-mode <<
227 <<
228 }; 134 };
229 }; 135 };
230 136
231 regulators-1 { !! 137 pm8350c-rpmh-regulators {
232 compatible = "qcom,pm8350c-rpm 138 compatible = "qcom,pm8350c-rpmh-regulators";
233 qcom,pmic-id = "c"; 139 qcom,pmic-id = "c";
234 140
235 vdd-s1-supply = <&vph_pwr>; 141 vdd-s1-supply = <&vph_pwr>;
236 vdd-s2-supply = <&vph_pwr>; 142 vdd-s2-supply = <&vph_pwr>;
237 vdd-s3-supply = <&vph_pwr>; 143 vdd-s3-supply = <&vph_pwr>;
238 vdd-s4-supply = <&vph_pwr>; 144 vdd-s4-supply = <&vph_pwr>;
239 vdd-s5-supply = <&vph_pwr>; 145 vdd-s5-supply = <&vph_pwr>;
240 vdd-s6-supply = <&vph_pwr>; 146 vdd-s6-supply = <&vph_pwr>;
241 vdd-s7-supply = <&vph_pwr>; 147 vdd-s7-supply = <&vph_pwr>;
242 vdd-s8-supply = <&vph_pwr>; 148 vdd-s8-supply = <&vph_pwr>;
243 vdd-s9-supply = <&vph_pwr>; 149 vdd-s9-supply = <&vph_pwr>;
244 vdd-s10-supply = <&vph_pwr>; 150 vdd-s10-supply = <&vph_pwr>;
245 151
246 vdd-l1-l12-supply = <&vreg_s1c 152 vdd-l1-l12-supply = <&vreg_s1c_1p86>;
247 vdd-l2-l8-supply = <&vreg_s1c_ 153 vdd-l2-l8-supply = <&vreg_s1c_1p86>;
248 vdd-l3-l4-l5-l7-l13-supply = < 154 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
249 vdd-l6-l9-l11-supply = <&vreg_ 155 vdd-l6-l9-l11-supply = <&vreg_bob>;
250 vdd-l10-supply = <&vreg_s12b_1 156 vdd-l10-supply = <&vreg_s12b_1p25>;
251 157
252 vdd-bob-supply = <&vph_pwr>; 158 vdd-bob-supply = <&vph_pwr>;
253 159
254 vreg_s1c_1p86: smps1 { 160 vreg_s1c_1p86: smps1 {
255 regulator-name = "vreg 161 regulator-name = "vreg_s1c_1p86";
256 regulator-min-microvol 162 regulator-min-microvolt = <1856000>;
257 regulator-max-microvol 163 regulator-max-microvolt = <1880000>;
258 regulator-initial-mode 164 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259 }; 165 };
260 166
261 vreg_bob: bob { 167 vreg_bob: bob {
262 regulator-name = "vreg 168 regulator-name = "vreg_bob";
263 regulator-min-microvol 169 regulator-min-microvolt = <3008000>;
264 regulator-max-microvol 170 regulator-max-microvolt = <3960000>;
265 regulator-initial-mode 171 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
266 }; 172 };
267 173
268 vreg_l1c_1p8: ldo1 { 174 vreg_l1c_1p8: ldo1 {
269 regulator-name = "vreg 175 regulator-name = "vreg_l1c_1p8";
270 regulator-min-microvol 176 regulator-min-microvolt = <1800000>;
271 regulator-max-microvol 177 regulator-max-microvolt = <1800000>;
272 regulator-initial-mode 178 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273 }; 179 };
274 180
275 vreg_l2c_1p8: ldo2 { 181 vreg_l2c_1p8: ldo2 {
276 regulator-name = "vreg 182 regulator-name = "vreg_l2c_1p8";
277 regulator-min-microvol 183 regulator-min-microvolt = <1800000>;
278 regulator-max-microvol 184 regulator-max-microvolt = <1800000>;
279 regulator-initial-mode 185 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280 }; 186 };
281 187
282 vreg_l6c_1p8: ldo6 { 188 vreg_l6c_1p8: ldo6 {
283 regulator-name = "vreg 189 regulator-name = "vreg_l6c_1p8";
284 regulator-min-microvol 190 regulator-min-microvolt = <1800000>;
285 regulator-max-microvol 191 regulator-max-microvolt = <2960000>;
286 regulator-initial-mode 192 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 }; 193 };
288 194
289 vreg_l9c_2p96: ldo9 { 195 vreg_l9c_2p96: ldo9 {
290 regulator-name = "vreg 196 regulator-name = "vreg_l9c_2p96";
291 regulator-min-microvol 197 regulator-min-microvolt = <2960000>;
292 regulator-max-microvol 198 regulator-max-microvolt = <3008000>;
293 regulator-initial-mode 199 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
294 }; 200 };
295 201
296 vreg_l10c_1p2: ldo10 { 202 vreg_l10c_1p2: ldo10 {
297 regulator-name = "vreg 203 regulator-name = "vreg_l10c_1p2";
298 regulator-min-microvol 204 regulator-min-microvolt = <1200000>;
299 regulator-max-microvol 205 regulator-max-microvolt = <1200000>;
300 regulator-initial-mode 206 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
301 }; 207 };
302 }; 208 };
303 <<
304 regulators-2 { <<
305 compatible = "qcom,pmr735a-rpm <<
306 qcom,pmic-id = "e"; <<
307 <<
308 vdd-s1-supply = <&vph_pwr>; <<
309 vdd-s2-supply = <&vph_pwr>; <<
310 vdd-s3-supply = <&vph_pwr>; <<
311 <<
312 vdd-l1-l2-supply = <&vreg_s2e_ <<
313 vdd-l3-supply = <&vreg_s1e_1p2 <<
314 vdd-l4-supply = <&vreg_s1c_1p8 <<
315 vdd-l5-l6-supply = <&vreg_s1c_ <<
316 vdd-l7-bob-supply = <&vreg_bob <<
317 <<
318 vreg_s1e_1p25: smps1 { <<
319 regulator-name = "vreg <<
320 regulator-min-microvol <<
321 regulator-max-microvol <<
322 }; <<
323 <<
324 vreg_s2e_0p85: smps2 { <<
325 regulator-name = "vreg <<
326 regulator-min-microvol <<
327 regulator-max-microvol <<
328 }; <<
329 <<
330 vreg_s3e_2p20: smps3 { <<
331 regulator-name = "vreg <<
332 regulator-min-microvol <<
333 regulator-max-microvol <<
334 }; <<
335 <<
336 vreg_l1e_0p9: ldo1 { <<
337 regulator-name = "vreg <<
338 regulator-min-microvol <<
339 regulator-max-microvol <<
340 }; <<
341 <<
342 vreg_l2e_1p2: ldo2 { <<
343 regulator-name = "vreg <<
344 regulator-min-microvol <<
345 regulator-max-microvol <<
346 }; <<
347 <<
348 vreg_l3e_1p2: ldo3 { <<
349 regulator-name = "vreg <<
350 regulator-min-microvol <<
351 regulator-max-microvol <<
352 }; <<
353 <<
354 vreg_l4e_1p7: ldo4 { <<
355 regulator-name = "vreg <<
356 regulator-min-microvol <<
357 regulator-max-microvol <<
358 }; <<
359 <<
360 vreg_l5e_0p8: ldo5 { <<
361 regulator-name = "vreg <<
362 regulator-min-microvol <<
363 regulator-max-microvol <<
364 }; <<
365 <<
366 vreg_l6e_0p8: ldo6 { <<
367 regulator-name = "vreg <<
368 regulator-min-microvol <<
369 regulator-max-microvol <<
370 }; <<
371 <<
372 vreg_l7e_2p8: ldo7 { <<
373 regulator-name = "vreg <<
374 regulator-min-microvol <<
375 regulator-max-microvol <<
376 }; <<
377 }; <<
378 }; 209 };
379 210
380 &cdsp { 211 &cdsp {
381 status = "okay"; 212 status = "okay";
382 firmware-name = "qcom/sm8350/cdsp.mbn" 213 firmware-name = "qcom/sm8350/cdsp.mbn";
383 }; 214 };
384 215
385 &dispcc { <<
386 status = "okay"; <<
387 }; <<
388 <<
389 &mdss_dsi0 { <<
390 vdda-supply = <&vreg_l6b_1p2>; <<
391 status = "okay"; <<
392 <<
393 ports { <<
394 port@1 { <<
395 endpoint { <<
396 remote-endpoin <<
397 data-lanes = < <<
398 }; <<
399 }; <<
400 }; <<
401 }; <<
402 <<
403 &mdss_dsi0_phy { <<
404 vdds-supply = <&vreg_l5b_0p88>; <<
405 status = "okay"; <<
406 }; <<
407 <<
408 &gpi_dma1 { 216 &gpi_dma1 {
409 status = "okay"; 217 status = "okay";
410 }; 218 };
411 219
412 &gpu { <<
413 status = "okay"; <<
414 <<
415 zap-shader { <<
416 firmware-name = "qcom/sm8350/a <<
417 }; <<
418 }; <<
419 <<
420 &i2c13 { <<
421 clock-frequency = <100000>; <<
422 <<
423 status = "okay"; <<
424 <<
425 typec-mux@42 { <<
426 compatible = "fcs,fsa4480"; <<
427 reg = <0x42>; <<
428 <<
429 interrupts-extended = <&tlmm 2 <<
430 <<
431 vcc-supply = <&vreg_bob>; <<
432 mode-switch; <<
433 orientation-switch; <<
434 <<
435 port { <<
436 fsa4480_sbu_mux: endpo <<
437 remote-endpoin <<
438 }; <<
439 }; <<
440 }; <<
441 }; <<
442 <<
443 &i2c15 { <<
444 clock-frequency = <400000>; <<
445 status = "okay"; <<
446 <<
447 lt9611_codec: hdmi-bridge@2b { <<
448 compatible = "lontium,lt9611ux <<
449 reg = <0x2b>; <<
450 <<
451 interrupts-extended = <&tlmm 5 <<
452 reset-gpios = <&tlmm 48 GPIO_A <<
453 <<
454 vdd-supply = <<9611_1v2>; <<
455 vcc-supply = <<9611_3v3>; <<
456 <<
457 pinctrl-names = "default"; <<
458 pinctrl-0 = <<9611_state>; <<
459 <<
460 ports { <<
461 #address-cells = <1>; <<
462 #size-cells = <0>; <<
463 <<
464 port@0 { <<
465 reg = <0>; <<
466 <<
467 lt9611_a: endp <<
468 remote <<
469 }; <<
470 }; <<
471 <<
472 port@2 { <<
473 reg = <2>; <<
474 <<
475 lt9611_out: en <<
476 remote <<
477 }; <<
478 }; <<
479 }; <<
480 }; <<
481 }; <<
482 <<
483 &mdss { <<
484 status = "okay"; <<
485 }; <<
486 <<
487 &mdss_dp { <<
488 status = "okay"; <<
489 }; <<
490 <<
491 &mdss_dp_out { <<
492 data-lanes = <0 1>; <<
493 }; <<
494 <<
495 &mpss { 220 &mpss {
496 status = "okay"; 221 status = "okay";
497 firmware-name = "qcom/sm8350/modem.mbn 222 firmware-name = "qcom/sm8350/modem.mbn";
498 }; 223 };
499 224
500 &pcie0 { <<
501 pinctrl-names = "default"; <<
502 pinctrl-0 = <&pcie0_default_state>; <<
503 <<
504 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LO <<
505 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIG <<
506 <<
507 status = "okay"; <<
508 }; <<
509 <<
510 &pcie0_phy { <<
511 vdda-phy-supply = <&vreg_l5b_0p88>; <<
512 vdda-pll-supply = <&vreg_l6b_1p2>; <<
513 <<
514 status = "okay"; <<
515 }; <<
516 <<
517 &pcie1 { <<
518 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LO <<
519 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIG <<
520 <<
521 pinctrl-names = "default"; <<
522 pinctrl-0 = <&pcie1_default_state>; <<
523 <<
524 status = "okay"; <<
525 }; <<
526 <<
527 &pcie1_phy { <<
528 status = "okay"; <<
529 vdda-phy-supply = <&vreg_l5b_0p88>; <<
530 vdda-pll-supply = <&vreg_l6b_1p2>; <<
531 }; <<
532 <<
533 &qupv3_id_0 { 225 &qupv3_id_0 {
534 status = "okay"; 226 status = "okay";
535 }; 227 };
536 228
537 &qupv3_id_1 { <<
538 status = "okay"; <<
539 }; <<
540 <<
541 &qupv3_id_2 { <<
542 status = "okay"; <<
543 }; <<
544 <<
545 &sdhc_2 { <<
546 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH> <<
547 pinctrl-names = "default", "sleep"; <<
548 pinctrl-0 = <&sdc2_default_state &sdc2 <<
549 pinctrl-1 = <&sdc2_sleep_state &sdc2_c <<
550 vmmc-supply = <&vreg_l9c_2p96>; <<
551 vqmmc-supply = <&vreg_l6c_1p8>; <<
552 no-sdio; <<
553 no-mmc; <<
554 status = "okay"; <<
555 }; <<
556 <<
557 &slpi { 229 &slpi {
558 status = "okay"; 230 status = "okay";
559 firmware-name = "qcom/sm8350/slpi.mbn" 231 firmware-name = "qcom/sm8350/slpi.mbn";
560 }; 232 };
561 233
562 &tlmm { 234 &tlmm {
563 gpio-reserved-ranges = <52 8>; 235 gpio-reserved-ranges = <52 8>;
564 <<
565 gpio-line-names = <<
566 "APPS_I2C_SDA", /* GPIO_0 */ <<
567 "APPS_I2C_SCL", <<
568 "FSA_INT_N", <<
569 "USER_LED3_EN", <<
570 "SMBUS_SDA_1P8", <<
571 "SMBUS_SCL_1P8", <<
572 "2M2_3P3_EN", <<
573 "ALERT_DUAL_M2_N", <<
574 "EXP_UART_CTS", <<
575 "EXP_UART_RFR", <<
576 "EXP_UART_TX", /* GPIO_10 */ <<
577 "EXP_UART_RX", <<
578 "NC", <<
579 "NC", <<
580 "RCM_MARKER1", <<
581 "WSA0_EN", <<
582 "CAM1_RESET_N", <<
583 "CAM0_RESET_N", <<
584 "DEBUG_UART_TX", <<
585 "DEBUG_UART_RX", <<
586 "TS_I2C_SDA", /* GPIO_20 */ <<
587 "TS_I2C_SCL", <<
588 "TS_RESET_N", <<
589 "TS_INT_N", <<
590 "DISP0_RESET_N", <<
591 "DISP1_RESET_N", <<
592 "ETH_RESET", <<
593 "RCM_MARKER2", <<
594 "CAM_DC_MIPI_MUX_EN", <<
595 "CAM_DC_MIPI_MUX_SEL", <<
596 "AFC_PHY_TA_D_PLUS", /* GPIO_3 <<
597 "AFC_PHY_TA_D_MINUS", <<
598 "PM8008_1_IRQ", <<
599 "PM8008_1_RESET_N", <<
600 "PM8008_2_IRQ", <<
601 "PM8008_2_RESET_N", <<
602 "CAM_DC_I3C_SDA", <<
603 "CAM_DC_I3C_SCL", <<
604 "FP_INT_N", <<
605 "FP_WUHB_INT_N", <<
606 "SMB_SPMI_DATA", /* GPIO_40 */ <<
607 "SMB_SPMI_CLK", <<
608 "USB_HUB_RESET", <<
609 "FORCE_USB_BOOT", <<
610 "LRF_IRQ", <<
611 "NC", <<
612 "IMU2_INT", <<
613 "HDMI_3P3_EN", <<
614 "HDMI_RSTN", <<
615 "HDMI_1P2_EN", <<
616 "HDMI_INT", /* GPIO_50 */ <<
617 "USB1_ID", <<
618 "FP_SPI_MISO", <<
619 "FP_SPI_MOSI", <<
620 "FP_SPI_CLK", <<
621 "FP_SPI_CS_N", <<
622 "NFC_ESE_SPI_MISO", <<
623 "NFC_ESE_SPI_MOSI", <<
624 "NFC_ESE_SPI_CLK", <<
625 "NFC_ESE_SPI_CS", <<
626 "NFC_I2C_SDA", /* GPIO_60 */ <<
627 "NFC_I2C_SCLC", <<
628 "NFC_EN", <<
629 "NFC_CLK_REQ", <<
630 "HST_WLAN_EN", <<
631 "HST_BT_EN", <<
632 "HST_SW_CTRL", <<
633 "NC", <<
634 "HST_BT_UART_CTS", <<
635 "HST_BT_UART_RFR", <<
636 "HST_BT_UART_TX", /* GPIO_70 * <<
637 "HST_BT_UART_RX", <<
638 "CAM_DC_SPI0_MISO", <<
639 "CAM_DC_SPI0_MOSI", <<
640 "CAM_DC_SPI0_CLK", <<
641 "CAM_DC_SPI0_CS_N", <<
642 "CAM_DC_SPI1_MISO", <<
643 "CAM_DC_SPI1_MOSI", <<
644 "CAM_DC_SPI1_CLK", <<
645 "CAM_DC_SPI1_CS_N", <<
646 "HALL_INT_N", /* GPIO_80 */ <<
647 "USB_PHY_PS", <<
648 "MDP_VSYNC_P", <<
649 "MDP_VSYNC_S", <<
650 "ETH_3P3_EN", <<
651 "RADAR_INT", <<
652 "NFC_DWL_REQ", <<
653 "SM_GPIO_87", <<
654 "WCD_RESET_N", <<
655 "ALSP_INT_N", <<
656 "PRESS_INT", /* GPIO_90 */ <<
657 "SAR_INT_N", <<
658 "SD_CARD_DET_N", <<
659 "NC", <<
660 "PCIE0_RESET_N", <<
661 "PCIE0_CLK_REQ_N", <<
662 "PCIE0_WAKE_N", <<
663 "PCIE1_RESET_N", <<
664 "PCIE1_CLK_REQ_N", <<
665 "PCIE1_WAKE_N", <<
666 "CAM_MCLK0", /* GPIO_100 */ <<
667 "CAM_MCLK1", <<
668 "CAM_MCLK2", <<
669 "CAM_MCLK3", <<
670 "CAM_MCLK4", <<
671 "CAM_MCLK5", <<
672 "CAM2_RESET_N", <<
673 "CCI_I2C0_SDA", <<
674 "CCI_I2C0_SCL", <<
675 "CCI_I2C1_SDA", <<
676 "CCI_I2C1_SCL", /* GPIO_110 */ <<
677 "CCI_I2C2_SDA", <<
678 "CCI_I2C2_SCL", <<
679 "CCI_I2C3_SDA", <<
680 "CCI_I2C3_SCL", <<
681 "CAM5_RESET_N", <<
682 "CAM4_RESET_N", <<
683 "CAM3_RESET_N", <<
684 "IMU1_INT", <<
685 "MAG_INT_N", <<
686 "MI2S2_I2S_SCK", /* GPIO_120 * <<
687 "MI2S2_I2S_DAT0", <<
688 "MI2S2_I2S_WS", <<
689 "HIFI_DAC_I2S_MCLK", <<
690 "MI2S2_I2S_DAT1", <<
691 "HIFI_DAC_I2S_SCK", <<
692 "HIFI_DAC_I2S_DAT0", <<
693 "NC", <<
694 "HIFI_DAC_I2S_WS", <<
695 "HST_BT_WLAN_SLIMBUS_CLK", <<
696 "HST_BT_WLAN_SLIMBUS_DAT0", /* <<
697 "BT_LED_EN", <<
698 "WLAN_LED_EN", <<
699 "NC", <<
700 "NC", <<
701 "NC", <<
702 "UIM2_PRESENT", <<
703 "NC", <<
704 "NC", <<
705 "NC", <<
706 "UIM1_PRESENT", /* GPIO_140 */ <<
707 "NC", <<
708 "SM_RFFE0_DATA", <<
709 "NC", <<
710 "SM_RFFE1_DATA", <<
711 "SM_MSS_GRFC4", <<
712 "SM_MSS_GRFC5", <<
713 "SM_MSS_GRFC6", <<
714 "SM_MSS_GRFC7", <<
715 "SM_RFFE4_CLK", <<
716 "SM_RFFE4_DATA", /* GPIO_150 * <<
717 "WLAN_COEX_UART1_RX", <<
718 "WLAN_COEX_UART1_TX", <<
719 "HST_SW_CTRL", <<
720 "DSI0_STATUS", <<
721 "DSI1_STATUS", <<
722 "APPS_PBL_BOOT_SPEED_1", <<
723 "APPS_BOOT_FROM_ROM", <<
724 "APPS_PBL_BOOT_SPEED_0", <<
725 "QLINK0_REQ", <<
726 "QLINK0_EN", /* GPIO_160 */ <<
727 "QLINK0_WMSS_RESET_N", <<
728 "NC", <<
729 "NC", <<
730 "NC", <<
731 "NC", <<
732 "NC", <<
733 "NC", <<
734 "WCD_SWR_TX_CLK", <<
735 "WCD_SWR_TX_DATA0", <<
736 "WCD_SWR_TX_DATA1", /* GPIO_17 <<
737 "WCD_SWR_RX_CLK", <<
738 "WCD_SWR_RX_DATA0", <<
739 "WCD_SWR_RX_DATA1", <<
740 "DMIC01_CLK", <<
741 "DMIC01_DATA", <<
742 "DMIC23_CLK", <<
743 "DMIC23_DATA", <<
744 "WSA_SWR_CLK", <<
745 "WSA_SWR_DATA", <<
746 "DMIC45_CLK", /* GPIO_180 */ <<
747 "DMIC45_DATA", <<
748 "WCD_SWR_TX_DATA2", <<
749 "SENSOR_I3C_SDA", <<
750 "SENSOR_I3C_SCL", <<
751 "CAM_OIS0_I3C_SDA", <<
752 "CAM_OIS0_I3C_SCL", <<
753 "IMU_SPI_MISO", <<
754 "IMU_SPI_MOSI", <<
755 "IMU_SPI_CLK", <<
756 "IMU_SPI_CS_N", /* GPIO_190 */ <<
757 "MAG_I2C_SDA", <<
758 "MAG_I2C_SCL", <<
759 "SENSOR_I2C_SDA", <<
760 "SENSOR_I2C_SCL", <<
761 "RADAR_SPI_MISO", <<
762 "RADAR_SPI_MOSI", <<
763 "RADAR_SPI_CLK", <<
764 "RADAR_SPI_CS_N", <<
765 "HST_BLE_UART_TX", <<
766 "HST_BLE_UART_RX", /* GPIO_200 <<
767 "HST_WLAN_UART_TX", <<
768 "HST_WLAN_UART_RX"; <<
769 <<
770 pcie0_default_state: pcie0-default-sta <<
771 perst-pins { <<
772 pins = "gpio94"; <<
773 function = "gpio"; <<
774 drive-strength = <2>; <<
775 bias-pull-down; <<
776 }; <<
777 <<
778 clkreq-pins { <<
779 pins = "gpio95"; <<
780 function = "pcie0_clkr <<
781 drive-strength = <2>; <<
782 bias-pull-up; <<
783 }; <<
784 <<
785 wake-pins { <<
786 pins = "gpio96"; <<
787 function = "gpio"; <<
788 drive-strength = <2>; <<
789 bias-pull-up; <<
790 }; <<
791 }; <<
792 <<
793 pcie1_default_state: pcie1-default-sta <<
794 perst-pins { <<
795 pins = "gpio97"; <<
796 function = "gpio"; <<
797 drive-strength = <2>; <<
798 bias-pull-down; <<
799 }; <<
800 <<
801 clkreq-pins { <<
802 pins = "gpio98"; <<
803 function = "pcie1_clkr <<
804 drive-strength = <2>; <<
805 bias-pull-up; <<
806 }; <<
807 <<
808 wake-pins { <<
809 pins = "gpio99"; <<
810 function = "gpio"; <<
811 drive-strength = <2>; <<
812 bias-pull-up; <<
813 }; <<
814 }; <<
815 <<
816 sdc2_card_det_n: sd-card-det-n-state { <<
817 pins = "gpio92"; <<
818 function = "gpio"; <<
819 drive-strength = <2>; <<
820 bias-pull-up; <<
821 }; <<
822 }; 236 };
823 237
824 &uart2 { 238 &uart2 {
825 status = "okay"; 239 status = "okay";
826 }; 240 };
827 241
828 &ufs_mem_hc { 242 &ufs_mem_hc {
829 status = "okay"; 243 status = "okay";
830 244
831 reset-gpios = <&tlmm 203 GPIO_ACTIVE_L 245 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>;
832 246
833 vcc-supply = <&vreg_l7b_2p96>; 247 vcc-supply = <&vreg_l7b_2p96>;
834 vcc-max-microamp = <800000>; 248 vcc-max-microamp = <800000>;
835 vccq-supply = <&vreg_l9b_1p2>; 249 vccq-supply = <&vreg_l9b_1p2>;
836 vccq-max-microamp = <900000>; 250 vccq-max-microamp = <900000>;
837 vdd-hba-supply = <&vreg_l9b_1p2>; <<
838 }; 251 };
839 252
840 &ufs_mem_phy { 253 &ufs_mem_phy {
841 status = "okay"; 254 status = "okay";
842 255
843 vdda-phy-supply = <&vreg_l5b_0p88>; 256 vdda-phy-supply = <&vreg_l5b_0p88>;
844 vdda-pll-supply = <&vreg_l6b_1p2>; 257 vdda-pll-supply = <&vreg_l6b_1p2>;
845 }; 258 };
846 259
847 &usb_1 { 260 &usb_1 {
848 status = "okay"; 261 status = "okay";
849 }; 262 };
850 263
851 &usb_1_dwc3 { 264 &usb_1_dwc3 {
852 dr_mode = "otg"; !! 265 /* TODO: Define USB-C connector properly */
853 usb-role-switch; !! 266 dr_mode = "peripheral";
854 }; <<
855 <<
856 &usb_1_dwc3_hs { <<
857 remote-endpoint = <&pmic_glink_hs_in>; <<
858 }; 267 };
859 268
860 &usb_1_hsphy { 269 &usb_1_hsphy {
861 status = "okay"; 270 status = "okay";
862 271
863 vdda-pll-supply = <&vreg_l5b_0p88>; 272 vdda-pll-supply = <&vreg_l5b_0p88>;
864 vdda18-supply = <&vreg_l1c_1p8>; 273 vdda18-supply = <&vreg_l1c_1p8>;
865 vdda33-supply = <&vreg_l2b_3p07>; 274 vdda33-supply = <&vreg_l2b_3p07>;
866 }; 275 };
867 276
868 &usb_1_qmpphy { 277 &usb_1_qmpphy {
869 status = "okay"; 278 status = "okay";
870 279
871 vdda-phy-supply = <&vreg_l6b_1p2>; 280 vdda-phy-supply = <&vreg_l6b_1p2>;
872 vdda-pll-supply = <&vreg_l1b_0p88>; 281 vdda-pll-supply = <&vreg_l1b_0p88>;
873 }; 282 };
874 283
875 &usb_1_qmpphy_out { <<
876 remote-endpoint = <&pmic_glink_ss_in>; <<
877 }; <<
878 <<
879 &usb_2 { 284 &usb_2 {
880 status = "okay"; 285 status = "okay";
881 }; 286 };
882 287
883 &usb_2_dwc3 { 288 &usb_2_dwc3 {
884 dr_mode = "host"; 289 dr_mode = "host";
885 290
886 pinctrl-names = "default"; 291 pinctrl-names = "default";
887 pinctrl-0 = <&usb_hub_enabled_state>; 292 pinctrl-0 = <&usb_hub_enabled_state>;
888 }; 293 };
889 294
890 &usb_2_hsphy { 295 &usb_2_hsphy {
891 status = "okay"; 296 status = "okay";
892 297
893 vdda-pll-supply = <&vreg_l5b_0p88>; 298 vdda-pll-supply = <&vreg_l5b_0p88>;
894 vdda18-supply = <&vreg_l1c_1p8>; 299 vdda18-supply = <&vreg_l1c_1p8>;
895 vdda33-supply = <&vreg_l2b_3p07>; 300 vdda33-supply = <&vreg_l2b_3p07>;
896 }; 301 };
897 302
898 &usb_2_qmpphy { 303 &usb_2_qmpphy {
899 status = "okay"; 304 status = "okay";
900 305
901 vdda-phy-supply = <&vreg_l6b_1p2>; 306 vdda-phy-supply = <&vreg_l6b_1p2>;
902 vdda-pll-supply = <&vreg_l5b_0p88>; 307 vdda-pll-supply = <&vreg_l5b_0p88>;
903 }; 308 };
904 309
905 /* PINCTRL - additions to nodes defined in sm8 310 /* PINCTRL - additions to nodes defined in sm8350.dtsi */
906 311
907 &tlmm { 312 &tlmm {
908 usb_hub_enabled_state: usb-hub-enabled 313 usb_hub_enabled_state: usb-hub-enabled-state {
909 pins = "gpio42"; 314 pins = "gpio42";
910 function = "gpio"; 315 function = "gpio";
911 316
912 drive-strength = <2>; 317 drive-strength = <2>;
913 output-low; 318 output-low;
914 }; <<
915 <<
916 lt9611_state: lt9611-state { <<
917 rst-pins { <<
918 pins = "gpio48"; <<
919 function = "gpio"; <<
920 <<
921 output-high; <<
922 input-disable; <<
923 }; <<
924 <<
925 irq-pins { <<
926 pins = "gpio50"; <<
927 function = "gpio"; <<
928 bias-disable; <<
929 }; <<
930 }; 319 };
931 }; 320 };
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