1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2020-2021, Linaro Limited 3 * Copyright (c) 2020-2021, Linaro Limited
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/regulator/qcom,rpmh-regu 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include "sm8350.dtsi" 9 #include "sm8350.dtsi"
10 #include "pm8350.dtsi" <<
11 #include "pm8350b.dtsi" <<
12 #include "pm8350c.dtsi" <<
13 #include "pmk8350.dtsi" <<
14 #include "pmr735a.dtsi" <<
15 #include "pmr735b.dtsi" <<
16 10
17 / { 11 / {
18 model = "Qualcomm Technologies, Inc. S 12 model = "Qualcomm Technologies, Inc. SM8350 HDK";
19 compatible = "qcom,sm8350-hdk", "qcom, 13 compatible = "qcom,sm8350-hdk", "qcom,sm8350";
20 chassis-type = "embedded"; <<
21 14
22 aliases { 15 aliases {
23 serial0 = &uart2; 16 serial0 = &uart2;
24 }; 17 };
25 18
26 chosen { 19 chosen {
27 stdout-path = "serial0:115200n 20 stdout-path = "serial0:115200n8";
28 }; 21 };
29 22
30 hdmi-connector { 23 hdmi-connector {
31 compatible = "hdmi-connector"; 24 compatible = "hdmi-connector";
32 type = "a"; 25 type = "a";
33 26
34 port { 27 port {
35 hdmi_con: endpoint { 28 hdmi_con: endpoint {
36 remote-endpoin 29 remote-endpoint = <<9611_out>;
37 }; 30 };
38 }; 31 };
39 }; 32 };
40 33
41 pmic-glink { 34 pmic-glink {
42 compatible = "qcom,sm8350-pmic 35 compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink";
43 #address-cells = <1>; 36 #address-cells = <1>;
44 #size-cells = <0>; 37 #size-cells = <0>;
45 orientation-gpios = <&tlmm 81 <<
46 38
47 connector@0 { 39 connector@0 {
48 compatible = "usb-c-co 40 compatible = "usb-c-connector";
49 reg = <0>; 41 reg = <0>;
50 power-role = "dual"; 42 power-role = "dual";
51 data-role = "dual"; 43 data-role = "dual";
52 44
53 ports { 45 ports {
54 #address-cells 46 #address-cells = <1>;
55 #size-cells = 47 #size-cells = <0>;
56 48
57 port@0 { 49 port@0 {
58 reg = 50 reg = <0>;
59 51
60 pmic_g 52 pmic_glink_hs_in: endpoint {
61 53 remote-endpoint = <&usb_1_dwc3_hs>;
62 }; 54 };
63 }; 55 };
64 56
65 port@1 { 57 port@1 {
66 reg = 58 reg = <1>;
67 59
68 pmic_g 60 pmic_glink_ss_in: endpoint {
69 !! 61 remote-endpoint = <&usb_1_dwc3_ss>;
70 }; <<
71 }; <<
72 <<
73 port@2 { <<
74 reg = <<
75 <<
76 pmic_g <<
77 <<
78 }; 62 };
79 }; 63 };
80 }; 64 };
81 }; 65 };
82 }; 66 };
83 67
84 vph_pwr: vph-pwr-regulator { 68 vph_pwr: vph-pwr-regulator {
85 compatible = "regulator-fixed" 69 compatible = "regulator-fixed";
86 regulator-name = "vph_pwr"; 70 regulator-name = "vph_pwr";
87 regulator-min-microvolt = <370 71 regulator-min-microvolt = <3700000>;
88 regulator-max-microvolt = <370 72 regulator-max-microvolt = <3700000>;
89 73
90 regulator-always-on; 74 regulator-always-on;
91 regulator-boot-on; 75 regulator-boot-on;
92 }; 76 };
93 77
94 lt9611_1v2: lt9611-1v2-regulator { 78 lt9611_1v2: lt9611-1v2-regulator {
95 compatible = "regulator-fixed" 79 compatible = "regulator-fixed";
96 regulator-name = "LT9611_1V2"; 80 regulator-name = "LT9611_1V2";
97 81
98 vin-supply = <&vph_pwr>; 82 vin-supply = <&vph_pwr>;
99 regulator-min-microvolt = <120 83 regulator-min-microvolt = <1200000>;
100 regulator-max-microvolt = <120 84 regulator-max-microvolt = <1200000>;
101 gpio = <&tlmm 49 GPIO_ACTIVE_H 85 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>;
102 enable-active-high; 86 enable-active-high;
103 regulator-boot-on; 87 regulator-boot-on;
104 }; 88 };
105 89
106 lt9611_3v3: lt9611-3v3-regulator { 90 lt9611_3v3: lt9611-3v3-regulator {
107 compatible = "regulator-fixed" 91 compatible = "regulator-fixed";
108 regulator-name = "LT9611_3V3"; 92 regulator-name = "LT9611_3V3";
109 93
110 vin-supply = <&vreg_bob>; 94 vin-supply = <&vreg_bob>;
111 gpio = <&tlmm 47 GPIO_ACTIVE_H 95 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
112 regulator-min-microvolt = <330 96 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <330 97 regulator-max-microvolt = <3300000>;
114 enable-active-high; 98 enable-active-high;
115 regulator-boot-on; 99 regulator-boot-on;
116 regulator-always-on; 100 regulator-always-on;
117 }; 101 };
118 }; 102 };
119 103
120 &adsp { 104 &adsp {
121 status = "okay"; 105 status = "okay";
122 firmware-name = "qcom/sm8350/adsp.mbn" 106 firmware-name = "qcom/sm8350/adsp.mbn";
123 }; 107 };
124 108
125 &apps_rsc { 109 &apps_rsc {
126 regulators-0 { 110 regulators-0 {
127 compatible = "qcom,pm8350-rpmh 111 compatible = "qcom,pm8350-rpmh-regulators";
128 qcom,pmic-id = "b"; 112 qcom,pmic-id = "b";
129 113
130 vdd-s1-supply = <&vph_pwr>; 114 vdd-s1-supply = <&vph_pwr>;
131 vdd-s2-supply = <&vph_pwr>; 115 vdd-s2-supply = <&vph_pwr>;
132 vdd-s3-supply = <&vph_pwr>; 116 vdd-s3-supply = <&vph_pwr>;
133 vdd-s4-supply = <&vph_pwr>; 117 vdd-s4-supply = <&vph_pwr>;
134 vdd-s5-supply = <&vph_pwr>; 118 vdd-s5-supply = <&vph_pwr>;
135 vdd-s6-supply = <&vph_pwr>; 119 vdd-s6-supply = <&vph_pwr>;
136 vdd-s7-supply = <&vph_pwr>; 120 vdd-s7-supply = <&vph_pwr>;
137 vdd-s8-supply = <&vph_pwr>; 121 vdd-s8-supply = <&vph_pwr>;
138 vdd-s9-supply = <&vph_pwr>; 122 vdd-s9-supply = <&vph_pwr>;
139 vdd-s10-supply = <&vph_pwr>; 123 vdd-s10-supply = <&vph_pwr>;
140 vdd-s11-supply = <&vph_pwr>; 124 vdd-s11-supply = <&vph_pwr>;
141 vdd-s12-supply = <&vph_pwr>; 125 vdd-s12-supply = <&vph_pwr>;
142 126
143 vdd-l1-l4-supply = <&vreg_s11b 127 vdd-l1-l4-supply = <&vreg_s11b_0p95>;
144 vdd-l2-l7-supply = <&vreg_bob> 128 vdd-l2-l7-supply = <&vreg_bob>;
145 vdd-l3-l5-supply = <&vreg_bob> 129 vdd-l3-l5-supply = <&vreg_bob>;
146 vdd-l6-l9-l10-supply = <&vreg_ 130 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>;
147 131
148 vreg_s10b_1p8: smps10 { 132 vreg_s10b_1p8: smps10 {
149 regulator-name = "vreg 133 regulator-name = "vreg_s10b_1p8";
150 regulator-min-microvol 134 regulator-min-microvolt = <1800000>;
151 regulator-max-microvol 135 regulator-max-microvolt = <1800000>;
152 regulator-initial-mode 136 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153 }; 137 };
154 138
155 vreg_s11b_0p95: smps11 { 139 vreg_s11b_0p95: smps11 {
156 regulator-name = "vreg 140 regulator-name = "vreg_s11b_0p95";
157 regulator-min-microvol 141 regulator-min-microvolt = <952000>;
158 regulator-max-microvol 142 regulator-max-microvolt = <952000>;
159 regulator-initial-mode 143 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
160 }; 144 };
161 145
162 vreg_s12b_1p25: smps12 { 146 vreg_s12b_1p25: smps12 {
163 regulator-name = "vreg 147 regulator-name = "vreg_s12b_1p25";
164 regulator-min-microvol 148 regulator-min-microvolt = <1256000>;
165 regulator-max-microvol 149 regulator-max-microvolt = <1256000>;
166 regulator-initial-mode 150 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
167 }; 151 };
168 152
169 vreg_l1b_0p88: ldo1 { 153 vreg_l1b_0p88: ldo1 {
170 regulator-name = "vreg 154 regulator-name = "vreg_l1b_0p88";
171 regulator-min-microvol 155 regulator-min-microvolt = <912000>;
172 regulator-max-microvol 156 regulator-max-microvolt = <920000>;
173 regulator-initial-mode 157 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
174 }; 158 };
175 159
176 vreg_l2b_3p07: ldo2 { 160 vreg_l2b_3p07: ldo2 {
177 regulator-name = "vreg 161 regulator-name = "vreg_l2b_3p07";
178 regulator-min-microvol 162 regulator-min-microvolt = <3072000>;
179 regulator-max-microvol 163 regulator-max-microvolt = <3072000>;
180 regulator-initial-mode 164 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
181 }; 165 };
182 166
183 vreg_l3b_0p9: ldo3 { 167 vreg_l3b_0p9: ldo3 {
184 regulator-name = "vreg 168 regulator-name = "vreg_l3b_0p9";
185 regulator-min-microvol 169 regulator-min-microvolt = <904000>;
186 regulator-max-microvol 170 regulator-max-microvolt = <904000>;
187 regulator-initial-mode 171 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
188 }; 172 };
189 173
190 vreg_l5b_0p88: ldo5 { 174 vreg_l5b_0p88: ldo5 {
191 regulator-name = "vreg 175 regulator-name = "vreg_l5b_0p88";
192 regulator-min-microvol 176 regulator-min-microvolt = <880000>;
193 regulator-max-microvol 177 regulator-max-microvolt = <888000>;
194 regulator-initial-mode 178 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
195 regulator-allow-set-lo 179 regulator-allow-set-load;
196 regulator-allowed-mode 180 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
197 181 RPMH_REGULATOR_MODE_HPM>;
198 }; 182 };
199 183
200 vreg_l6b_1p2: ldo6 { 184 vreg_l6b_1p2: ldo6 {
201 regulator-name = "vreg 185 regulator-name = "vreg_l6b_1p2";
202 regulator-min-microvol 186 regulator-min-microvolt = <1200000>;
203 regulator-max-microvol 187 regulator-max-microvolt = <1208000>;
204 regulator-initial-mode 188 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
205 regulator-allow-set-lo 189 regulator-allow-set-load;
206 regulator-allowed-mode 190 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
207 191 RPMH_REGULATOR_MODE_HPM>;
208 }; 192 };
209 193
210 vreg_l7b_2p96: ldo7 { 194 vreg_l7b_2p96: ldo7 {
211 regulator-name = "vreg 195 regulator-name = "vreg_l7b_2p96";
212 regulator-min-microvol 196 regulator-min-microvolt = <2504000>;
213 regulator-max-microvol 197 regulator-max-microvolt = <2504000>;
214 regulator-initial-mode 198 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
215 regulator-allow-set-lo 199 regulator-allow-set-load;
216 regulator-allowed-mode 200 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
217 201 RPMH_REGULATOR_MODE_HPM>;
218 }; 202 };
219 203
220 vreg_l9b_1p2: ldo9 { 204 vreg_l9b_1p2: ldo9 {
221 regulator-name = "vreg 205 regulator-name = "vreg_l9b_1p2";
222 regulator-min-microvol 206 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 207 regulator-max-microvolt = <1200000>;
224 regulator-initial-mode 208 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 regulator-allow-set-lo 209 regulator-allow-set-load;
226 regulator-allowed-mode 210 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
227 211 RPMH_REGULATOR_MODE_HPM>;
228 }; 212 };
229 }; 213 };
230 214
231 regulators-1 { 215 regulators-1 {
232 compatible = "qcom,pm8350c-rpm 216 compatible = "qcom,pm8350c-rpmh-regulators";
233 qcom,pmic-id = "c"; 217 qcom,pmic-id = "c";
234 218
235 vdd-s1-supply = <&vph_pwr>; 219 vdd-s1-supply = <&vph_pwr>;
236 vdd-s2-supply = <&vph_pwr>; 220 vdd-s2-supply = <&vph_pwr>;
237 vdd-s3-supply = <&vph_pwr>; 221 vdd-s3-supply = <&vph_pwr>;
238 vdd-s4-supply = <&vph_pwr>; 222 vdd-s4-supply = <&vph_pwr>;
239 vdd-s5-supply = <&vph_pwr>; 223 vdd-s5-supply = <&vph_pwr>;
240 vdd-s6-supply = <&vph_pwr>; 224 vdd-s6-supply = <&vph_pwr>;
241 vdd-s7-supply = <&vph_pwr>; 225 vdd-s7-supply = <&vph_pwr>;
242 vdd-s8-supply = <&vph_pwr>; 226 vdd-s8-supply = <&vph_pwr>;
243 vdd-s9-supply = <&vph_pwr>; 227 vdd-s9-supply = <&vph_pwr>;
244 vdd-s10-supply = <&vph_pwr>; 228 vdd-s10-supply = <&vph_pwr>;
245 229
246 vdd-l1-l12-supply = <&vreg_s1c 230 vdd-l1-l12-supply = <&vreg_s1c_1p86>;
247 vdd-l2-l8-supply = <&vreg_s1c_ 231 vdd-l2-l8-supply = <&vreg_s1c_1p86>;
248 vdd-l3-l4-l5-l7-l13-supply = < 232 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
249 vdd-l6-l9-l11-supply = <&vreg_ 233 vdd-l6-l9-l11-supply = <&vreg_bob>;
250 vdd-l10-supply = <&vreg_s12b_1 234 vdd-l10-supply = <&vreg_s12b_1p25>;
251 235
252 vdd-bob-supply = <&vph_pwr>; 236 vdd-bob-supply = <&vph_pwr>;
253 237
254 vreg_s1c_1p86: smps1 { 238 vreg_s1c_1p86: smps1 {
255 regulator-name = "vreg 239 regulator-name = "vreg_s1c_1p86";
256 regulator-min-microvol 240 regulator-min-microvolt = <1856000>;
257 regulator-max-microvol 241 regulator-max-microvolt = <1880000>;
258 regulator-initial-mode 242 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259 }; 243 };
260 244
261 vreg_bob: bob { 245 vreg_bob: bob {
262 regulator-name = "vreg 246 regulator-name = "vreg_bob";
263 regulator-min-microvol 247 regulator-min-microvolt = <3008000>;
264 regulator-max-microvol 248 regulator-max-microvolt = <3960000>;
265 regulator-initial-mode 249 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
266 }; 250 };
267 251
268 vreg_l1c_1p8: ldo1 { 252 vreg_l1c_1p8: ldo1 {
269 regulator-name = "vreg 253 regulator-name = "vreg_l1c_1p8";
270 regulator-min-microvol 254 regulator-min-microvolt = <1800000>;
271 regulator-max-microvol 255 regulator-max-microvolt = <1800000>;
272 regulator-initial-mode 256 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273 }; 257 };
274 258
275 vreg_l2c_1p8: ldo2 { 259 vreg_l2c_1p8: ldo2 {
276 regulator-name = "vreg 260 regulator-name = "vreg_l2c_1p8";
277 regulator-min-microvol 261 regulator-min-microvolt = <1800000>;
278 regulator-max-microvol 262 regulator-max-microvolt = <1800000>;
279 regulator-initial-mode 263 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280 }; 264 };
281 265
282 vreg_l6c_1p8: ldo6 { 266 vreg_l6c_1p8: ldo6 {
283 regulator-name = "vreg 267 regulator-name = "vreg_l6c_1p8";
284 regulator-min-microvol 268 regulator-min-microvolt = <1800000>;
285 regulator-max-microvol 269 regulator-max-microvolt = <2960000>;
286 regulator-initial-mode 270 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 }; 271 };
288 272
289 vreg_l9c_2p96: ldo9 { 273 vreg_l9c_2p96: ldo9 {
290 regulator-name = "vreg 274 regulator-name = "vreg_l9c_2p96";
291 regulator-min-microvol 275 regulator-min-microvolt = <2960000>;
292 regulator-max-microvol 276 regulator-max-microvolt = <3008000>;
293 regulator-initial-mode 277 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
294 }; 278 };
295 279
296 vreg_l10c_1p2: ldo10 { 280 vreg_l10c_1p2: ldo10 {
297 regulator-name = "vreg 281 regulator-name = "vreg_l10c_1p2";
298 regulator-min-microvol 282 regulator-min-microvolt = <1200000>;
299 regulator-max-microvol 283 regulator-max-microvolt = <1200000>;
300 regulator-initial-mode 284 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
301 }; 285 };
302 }; 286 };
303 <<
304 regulators-2 { <<
305 compatible = "qcom,pmr735a-rpm <<
306 qcom,pmic-id = "e"; <<
307 <<
308 vdd-s1-supply = <&vph_pwr>; <<
309 vdd-s2-supply = <&vph_pwr>; <<
310 vdd-s3-supply = <&vph_pwr>; <<
311 <<
312 vdd-l1-l2-supply = <&vreg_s2e_ <<
313 vdd-l3-supply = <&vreg_s1e_1p2 <<
314 vdd-l4-supply = <&vreg_s1c_1p8 <<
315 vdd-l5-l6-supply = <&vreg_s1c_ <<
316 vdd-l7-bob-supply = <&vreg_bob <<
317 <<
318 vreg_s1e_1p25: smps1 { <<
319 regulator-name = "vreg <<
320 regulator-min-microvol <<
321 regulator-max-microvol <<
322 }; <<
323 <<
324 vreg_s2e_0p85: smps2 { <<
325 regulator-name = "vreg <<
326 regulator-min-microvol <<
327 regulator-max-microvol <<
328 }; <<
329 <<
330 vreg_s3e_2p20: smps3 { <<
331 regulator-name = "vreg <<
332 regulator-min-microvol <<
333 regulator-max-microvol <<
334 }; <<
335 <<
336 vreg_l1e_0p9: ldo1 { <<
337 regulator-name = "vreg <<
338 regulator-min-microvol <<
339 regulator-max-microvol <<
340 }; <<
341 <<
342 vreg_l2e_1p2: ldo2 { <<
343 regulator-name = "vreg <<
344 regulator-min-microvol <<
345 regulator-max-microvol <<
346 }; <<
347 <<
348 vreg_l3e_1p2: ldo3 { <<
349 regulator-name = "vreg <<
350 regulator-min-microvol <<
351 regulator-max-microvol <<
352 }; <<
353 <<
354 vreg_l4e_1p7: ldo4 { <<
355 regulator-name = "vreg <<
356 regulator-min-microvol <<
357 regulator-max-microvol <<
358 }; <<
359 <<
360 vreg_l5e_0p8: ldo5 { <<
361 regulator-name = "vreg <<
362 regulator-min-microvol <<
363 regulator-max-microvol <<
364 }; <<
365 <<
366 vreg_l6e_0p8: ldo6 { <<
367 regulator-name = "vreg <<
368 regulator-min-microvol <<
369 regulator-max-microvol <<
370 }; <<
371 <<
372 vreg_l7e_2p8: ldo7 { <<
373 regulator-name = "vreg <<
374 regulator-min-microvol <<
375 regulator-max-microvol <<
376 }; <<
377 }; <<
378 }; 287 };
379 288
380 &cdsp { 289 &cdsp {
381 status = "okay"; 290 status = "okay";
382 firmware-name = "qcom/sm8350/cdsp.mbn" 291 firmware-name = "qcom/sm8350/cdsp.mbn";
383 }; 292 };
384 293
385 &dispcc { 294 &dispcc {
386 status = "okay"; 295 status = "okay";
387 }; 296 };
388 297
389 &mdss_dsi0 { 298 &mdss_dsi0 {
390 vdda-supply = <&vreg_l6b_1p2>; 299 vdda-supply = <&vreg_l6b_1p2>;
391 status = "okay"; 300 status = "okay";
392 301
393 ports { 302 ports {
394 port@1 { 303 port@1 {
395 endpoint { 304 endpoint {
396 remote-endpoin 305 remote-endpoint = <<9611_a>;
397 data-lanes = < 306 data-lanes = <0 1 2 3>;
398 }; 307 };
399 }; 308 };
400 }; 309 };
401 }; 310 };
402 311
403 &mdss_dsi0_phy { 312 &mdss_dsi0_phy {
404 vdds-supply = <&vreg_l5b_0p88>; 313 vdds-supply = <&vreg_l5b_0p88>;
405 status = "okay"; 314 status = "okay";
406 }; 315 };
407 316
408 &gpi_dma1 { 317 &gpi_dma1 {
409 status = "okay"; 318 status = "okay";
410 }; 319 };
411 320
412 &gpu { 321 &gpu {
413 status = "okay"; 322 status = "okay";
414 323
415 zap-shader { 324 zap-shader {
416 firmware-name = "qcom/sm8350/a 325 firmware-name = "qcom/sm8350/a660_zap.mbn";
417 }; 326 };
418 }; 327 };
419 328
420 &i2c13 { <<
421 clock-frequency = <100000>; <<
422 <<
423 status = "okay"; <<
424 <<
425 typec-mux@42 { <<
426 compatible = "fcs,fsa4480"; <<
427 reg = <0x42>; <<
428 <<
429 interrupts-extended = <&tlmm 2 <<
430 <<
431 vcc-supply = <&vreg_bob>; <<
432 mode-switch; <<
433 orientation-switch; <<
434 <<
435 port { <<
436 fsa4480_sbu_mux: endpo <<
437 remote-endpoin <<
438 }; <<
439 }; <<
440 }; <<
441 }; <<
442 <<
443 &i2c15 { 329 &i2c15 {
444 clock-frequency = <400000>; 330 clock-frequency = <400000>;
445 status = "okay"; 331 status = "okay";
446 332
447 lt9611_codec: hdmi-bridge@2b { 333 lt9611_codec: hdmi-bridge@2b {
448 compatible = "lontium,lt9611ux 334 compatible = "lontium,lt9611uxc";
449 reg = <0x2b>; 335 reg = <0x2b>;
450 336
451 interrupts-extended = <&tlmm 5 337 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>;
452 reset-gpios = <&tlmm 48 GPIO_A 338 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
453 339
454 vdd-supply = <<9611_1v2>; 340 vdd-supply = <<9611_1v2>;
455 vcc-supply = <<9611_3v3>; 341 vcc-supply = <<9611_3v3>;
456 342
457 pinctrl-names = "default"; 343 pinctrl-names = "default";
458 pinctrl-0 = <<9611_state>; 344 pinctrl-0 = <<9611_state>;
459 345
460 ports { 346 ports {
461 #address-cells = <1>; 347 #address-cells = <1>;
462 #size-cells = <0>; 348 #size-cells = <0>;
463 349
464 port@0 { 350 port@0 {
465 reg = <0>; 351 reg = <0>;
466 352
467 lt9611_a: endp 353 lt9611_a: endpoint {
468 remote 354 remote-endpoint = <&mdss_dsi0_out>;
469 }; 355 };
470 }; 356 };
471 357
472 port@2 { 358 port@2 {
473 reg = <2>; 359 reg = <2>;
474 360
475 lt9611_out: en 361 lt9611_out: endpoint {
476 remote 362 remote-endpoint = <&hdmi_con>;
477 }; 363 };
478 }; 364 };
479 }; 365 };
480 }; 366 };
481 }; 367 };
482 368
483 &mdss { 369 &mdss {
484 status = "okay"; 370 status = "okay";
485 }; 371 };
486 372
487 &mdss_dp { !! 373 &mdss_mdp {
488 status = "okay"; 374 status = "okay";
489 }; 375 };
490 376
491 &mdss_dp_out { <<
492 data-lanes = <0 1>; <<
493 }; <<
494 <<
495 &mpss { 377 &mpss {
496 status = "okay"; 378 status = "okay";
497 firmware-name = "qcom/sm8350/modem.mbn 379 firmware-name = "qcom/sm8350/modem.mbn";
498 }; 380 };
499 381
500 &pcie0 { 382 &pcie0 {
501 pinctrl-names = "default"; 383 pinctrl-names = "default";
502 pinctrl-0 = <&pcie0_default_state>; 384 pinctrl-0 = <&pcie0_default_state>;
503 385
504 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LO 386 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
505 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIG 387 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
506 388
507 status = "okay"; 389 status = "okay";
508 }; 390 };
509 391
510 &pcie0_phy { 392 &pcie0_phy {
511 vdda-phy-supply = <&vreg_l5b_0p88>; 393 vdda-phy-supply = <&vreg_l5b_0p88>;
512 vdda-pll-supply = <&vreg_l6b_1p2>; 394 vdda-pll-supply = <&vreg_l6b_1p2>;
513 395
514 status = "okay"; 396 status = "okay";
515 }; 397 };
516 398
517 &pcie1 { 399 &pcie1 {
518 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LO 400 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
519 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIG 401 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
520 402
521 pinctrl-names = "default"; 403 pinctrl-names = "default";
522 pinctrl-0 = <&pcie1_default_state>; 404 pinctrl-0 = <&pcie1_default_state>;
523 405
524 status = "okay"; 406 status = "okay";
525 }; 407 };
526 408
527 &pcie1_phy { 409 &pcie1_phy {
528 status = "okay"; 410 status = "okay";
529 vdda-phy-supply = <&vreg_l5b_0p88>; 411 vdda-phy-supply = <&vreg_l5b_0p88>;
530 vdda-pll-supply = <&vreg_l6b_1p2>; 412 vdda-pll-supply = <&vreg_l6b_1p2>;
531 }; 413 };
532 414
533 &qupv3_id_0 { 415 &qupv3_id_0 {
534 status = "okay"; 416 status = "okay";
535 }; 417 };
536 418
537 &qupv3_id_1 { <<
538 status = "okay"; <<
539 }; <<
540 <<
541 &qupv3_id_2 { 419 &qupv3_id_2 {
542 status = "okay"; 420 status = "okay";
543 }; 421 };
544 422
545 &sdhc_2 { <<
546 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH> <<
547 pinctrl-names = "default", "sleep"; <<
548 pinctrl-0 = <&sdc2_default_state &sdc2 <<
549 pinctrl-1 = <&sdc2_sleep_state &sdc2_c <<
550 vmmc-supply = <&vreg_l9c_2p96>; <<
551 vqmmc-supply = <&vreg_l6c_1p8>; <<
552 no-sdio; <<
553 no-mmc; <<
554 status = "okay"; <<
555 }; <<
556 <<
557 &slpi { 423 &slpi {
558 status = "okay"; 424 status = "okay";
559 firmware-name = "qcom/sm8350/slpi.mbn" 425 firmware-name = "qcom/sm8350/slpi.mbn";
560 }; 426 };
561 427
562 &tlmm { 428 &tlmm {
563 gpio-reserved-ranges = <52 8>; 429 gpio-reserved-ranges = <52 8>;
564 430
565 gpio-line-names = 431 gpio-line-names =
566 "APPS_I2C_SDA", /* GPIO_0 */ 432 "APPS_I2C_SDA", /* GPIO_0 */
567 "APPS_I2C_SCL", 433 "APPS_I2C_SCL",
568 "FSA_INT_N", 434 "FSA_INT_N",
569 "USER_LED3_EN", 435 "USER_LED3_EN",
570 "SMBUS_SDA_1P8", 436 "SMBUS_SDA_1P8",
571 "SMBUS_SCL_1P8", 437 "SMBUS_SCL_1P8",
572 "2M2_3P3_EN", 438 "2M2_3P3_EN",
573 "ALERT_DUAL_M2_N", 439 "ALERT_DUAL_M2_N",
574 "EXP_UART_CTS", 440 "EXP_UART_CTS",
575 "EXP_UART_RFR", 441 "EXP_UART_RFR",
576 "EXP_UART_TX", /* GPIO_10 */ 442 "EXP_UART_TX", /* GPIO_10 */
577 "EXP_UART_RX", 443 "EXP_UART_RX",
578 "NC", 444 "NC",
579 "NC", 445 "NC",
580 "RCM_MARKER1", 446 "RCM_MARKER1",
581 "WSA0_EN", 447 "WSA0_EN",
582 "CAM1_RESET_N", 448 "CAM1_RESET_N",
583 "CAM0_RESET_N", 449 "CAM0_RESET_N",
584 "DEBUG_UART_TX", 450 "DEBUG_UART_TX",
585 "DEBUG_UART_RX", 451 "DEBUG_UART_RX",
586 "TS_I2C_SDA", /* GPIO_20 */ 452 "TS_I2C_SDA", /* GPIO_20 */
587 "TS_I2C_SCL", 453 "TS_I2C_SCL",
588 "TS_RESET_N", 454 "TS_RESET_N",
589 "TS_INT_N", 455 "TS_INT_N",
590 "DISP0_RESET_N", 456 "DISP0_RESET_N",
591 "DISP1_RESET_N", 457 "DISP1_RESET_N",
592 "ETH_RESET", 458 "ETH_RESET",
593 "RCM_MARKER2", 459 "RCM_MARKER2",
594 "CAM_DC_MIPI_MUX_EN", 460 "CAM_DC_MIPI_MUX_EN",
595 "CAM_DC_MIPI_MUX_SEL", 461 "CAM_DC_MIPI_MUX_SEL",
596 "AFC_PHY_TA_D_PLUS", /* GPIO_3 462 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */
597 "AFC_PHY_TA_D_MINUS", 463 "AFC_PHY_TA_D_MINUS",
598 "PM8008_1_IRQ", 464 "PM8008_1_IRQ",
599 "PM8008_1_RESET_N", 465 "PM8008_1_RESET_N",
600 "PM8008_2_IRQ", 466 "PM8008_2_IRQ",
601 "PM8008_2_RESET_N", 467 "PM8008_2_RESET_N",
602 "CAM_DC_I3C_SDA", 468 "CAM_DC_I3C_SDA",
603 "CAM_DC_I3C_SCL", 469 "CAM_DC_I3C_SCL",
604 "FP_INT_N", 470 "FP_INT_N",
605 "FP_WUHB_INT_N", 471 "FP_WUHB_INT_N",
606 "SMB_SPMI_DATA", /* GPIO_40 */ 472 "SMB_SPMI_DATA", /* GPIO_40 */
607 "SMB_SPMI_CLK", 473 "SMB_SPMI_CLK",
608 "USB_HUB_RESET", 474 "USB_HUB_RESET",
609 "FORCE_USB_BOOT", 475 "FORCE_USB_BOOT",
610 "LRF_IRQ", 476 "LRF_IRQ",
611 "NC", 477 "NC",
612 "IMU2_INT", 478 "IMU2_INT",
613 "HDMI_3P3_EN", 479 "HDMI_3P3_EN",
614 "HDMI_RSTN", 480 "HDMI_RSTN",
615 "HDMI_1P2_EN", 481 "HDMI_1P2_EN",
616 "HDMI_INT", /* GPIO_50 */ 482 "HDMI_INT", /* GPIO_50 */
617 "USB1_ID", 483 "USB1_ID",
618 "FP_SPI_MISO", 484 "FP_SPI_MISO",
619 "FP_SPI_MOSI", 485 "FP_SPI_MOSI",
620 "FP_SPI_CLK", 486 "FP_SPI_CLK",
621 "FP_SPI_CS_N", 487 "FP_SPI_CS_N",
622 "NFC_ESE_SPI_MISO", 488 "NFC_ESE_SPI_MISO",
623 "NFC_ESE_SPI_MOSI", 489 "NFC_ESE_SPI_MOSI",
624 "NFC_ESE_SPI_CLK", 490 "NFC_ESE_SPI_CLK",
625 "NFC_ESE_SPI_CS", 491 "NFC_ESE_SPI_CS",
626 "NFC_I2C_SDA", /* GPIO_60 */ 492 "NFC_I2C_SDA", /* GPIO_60 */
627 "NFC_I2C_SCLC", 493 "NFC_I2C_SCLC",
628 "NFC_EN", 494 "NFC_EN",
629 "NFC_CLK_REQ", 495 "NFC_CLK_REQ",
630 "HST_WLAN_EN", 496 "HST_WLAN_EN",
631 "HST_BT_EN", 497 "HST_BT_EN",
632 "HST_SW_CTRL", 498 "HST_SW_CTRL",
633 "NC", 499 "NC",
634 "HST_BT_UART_CTS", 500 "HST_BT_UART_CTS",
635 "HST_BT_UART_RFR", 501 "HST_BT_UART_RFR",
636 "HST_BT_UART_TX", /* GPIO_70 * 502 "HST_BT_UART_TX", /* GPIO_70 */
637 "HST_BT_UART_RX", 503 "HST_BT_UART_RX",
638 "CAM_DC_SPI0_MISO", 504 "CAM_DC_SPI0_MISO",
639 "CAM_DC_SPI0_MOSI", 505 "CAM_DC_SPI0_MOSI",
640 "CAM_DC_SPI0_CLK", 506 "CAM_DC_SPI0_CLK",
641 "CAM_DC_SPI0_CS_N", 507 "CAM_DC_SPI0_CS_N",
642 "CAM_DC_SPI1_MISO", 508 "CAM_DC_SPI1_MISO",
643 "CAM_DC_SPI1_MOSI", 509 "CAM_DC_SPI1_MOSI",
644 "CAM_DC_SPI1_CLK", 510 "CAM_DC_SPI1_CLK",
645 "CAM_DC_SPI1_CS_N", 511 "CAM_DC_SPI1_CS_N",
646 "HALL_INT_N", /* GPIO_80 */ 512 "HALL_INT_N", /* GPIO_80 */
647 "USB_PHY_PS", 513 "USB_PHY_PS",
648 "MDP_VSYNC_P", 514 "MDP_VSYNC_P",
649 "MDP_VSYNC_S", 515 "MDP_VSYNC_S",
650 "ETH_3P3_EN", 516 "ETH_3P3_EN",
651 "RADAR_INT", 517 "RADAR_INT",
652 "NFC_DWL_REQ", 518 "NFC_DWL_REQ",
653 "SM_GPIO_87", 519 "SM_GPIO_87",
654 "WCD_RESET_N", 520 "WCD_RESET_N",
655 "ALSP_INT_N", 521 "ALSP_INT_N",
656 "PRESS_INT", /* GPIO_90 */ 522 "PRESS_INT", /* GPIO_90 */
657 "SAR_INT_N", 523 "SAR_INT_N",
658 "SD_CARD_DET_N", 524 "SD_CARD_DET_N",
659 "NC", 525 "NC",
660 "PCIE0_RESET_N", 526 "PCIE0_RESET_N",
661 "PCIE0_CLK_REQ_N", 527 "PCIE0_CLK_REQ_N",
662 "PCIE0_WAKE_N", 528 "PCIE0_WAKE_N",
663 "PCIE1_RESET_N", 529 "PCIE1_RESET_N",
664 "PCIE1_CLK_REQ_N", 530 "PCIE1_CLK_REQ_N",
665 "PCIE1_WAKE_N", 531 "PCIE1_WAKE_N",
666 "CAM_MCLK0", /* GPIO_100 */ 532 "CAM_MCLK0", /* GPIO_100 */
667 "CAM_MCLK1", 533 "CAM_MCLK1",
668 "CAM_MCLK2", 534 "CAM_MCLK2",
669 "CAM_MCLK3", 535 "CAM_MCLK3",
670 "CAM_MCLK4", 536 "CAM_MCLK4",
671 "CAM_MCLK5", 537 "CAM_MCLK5",
672 "CAM2_RESET_N", 538 "CAM2_RESET_N",
673 "CCI_I2C0_SDA", 539 "CCI_I2C0_SDA",
674 "CCI_I2C0_SCL", 540 "CCI_I2C0_SCL",
675 "CCI_I2C1_SDA", 541 "CCI_I2C1_SDA",
676 "CCI_I2C1_SCL", /* GPIO_110 */ 542 "CCI_I2C1_SCL", /* GPIO_110 */
677 "CCI_I2C2_SDA", 543 "CCI_I2C2_SDA",
678 "CCI_I2C2_SCL", 544 "CCI_I2C2_SCL",
679 "CCI_I2C3_SDA", 545 "CCI_I2C3_SDA",
680 "CCI_I2C3_SCL", 546 "CCI_I2C3_SCL",
681 "CAM5_RESET_N", 547 "CAM5_RESET_N",
682 "CAM4_RESET_N", 548 "CAM4_RESET_N",
683 "CAM3_RESET_N", 549 "CAM3_RESET_N",
684 "IMU1_INT", 550 "IMU1_INT",
685 "MAG_INT_N", 551 "MAG_INT_N",
686 "MI2S2_I2S_SCK", /* GPIO_120 * 552 "MI2S2_I2S_SCK", /* GPIO_120 */
687 "MI2S2_I2S_DAT0", 553 "MI2S2_I2S_DAT0",
688 "MI2S2_I2S_WS", 554 "MI2S2_I2S_WS",
689 "HIFI_DAC_I2S_MCLK", 555 "HIFI_DAC_I2S_MCLK",
690 "MI2S2_I2S_DAT1", 556 "MI2S2_I2S_DAT1",
691 "HIFI_DAC_I2S_SCK", 557 "HIFI_DAC_I2S_SCK",
692 "HIFI_DAC_I2S_DAT0", 558 "HIFI_DAC_I2S_DAT0",
693 "NC", 559 "NC",
694 "HIFI_DAC_I2S_WS", 560 "HIFI_DAC_I2S_WS",
695 "HST_BT_WLAN_SLIMBUS_CLK", 561 "HST_BT_WLAN_SLIMBUS_CLK",
696 "HST_BT_WLAN_SLIMBUS_DAT0", /* 562 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */
697 "BT_LED_EN", 563 "BT_LED_EN",
698 "WLAN_LED_EN", 564 "WLAN_LED_EN",
699 "NC", 565 "NC",
700 "NC", 566 "NC",
701 "NC", 567 "NC",
702 "UIM2_PRESENT", 568 "UIM2_PRESENT",
703 "NC", 569 "NC",
704 "NC", 570 "NC",
705 "NC", 571 "NC",
706 "UIM1_PRESENT", /* GPIO_140 */ 572 "UIM1_PRESENT", /* GPIO_140 */
707 "NC", 573 "NC",
708 "SM_RFFE0_DATA", 574 "SM_RFFE0_DATA",
709 "NC", 575 "NC",
710 "SM_RFFE1_DATA", 576 "SM_RFFE1_DATA",
711 "SM_MSS_GRFC4", 577 "SM_MSS_GRFC4",
712 "SM_MSS_GRFC5", 578 "SM_MSS_GRFC5",
713 "SM_MSS_GRFC6", 579 "SM_MSS_GRFC6",
714 "SM_MSS_GRFC7", 580 "SM_MSS_GRFC7",
715 "SM_RFFE4_CLK", 581 "SM_RFFE4_CLK",
716 "SM_RFFE4_DATA", /* GPIO_150 * 582 "SM_RFFE4_DATA", /* GPIO_150 */
717 "WLAN_COEX_UART1_RX", 583 "WLAN_COEX_UART1_RX",
718 "WLAN_COEX_UART1_TX", 584 "WLAN_COEX_UART1_TX",
719 "HST_SW_CTRL", 585 "HST_SW_CTRL",
720 "DSI0_STATUS", 586 "DSI0_STATUS",
721 "DSI1_STATUS", 587 "DSI1_STATUS",
722 "APPS_PBL_BOOT_SPEED_1", 588 "APPS_PBL_BOOT_SPEED_1",
723 "APPS_BOOT_FROM_ROM", 589 "APPS_BOOT_FROM_ROM",
724 "APPS_PBL_BOOT_SPEED_0", 590 "APPS_PBL_BOOT_SPEED_0",
725 "QLINK0_REQ", 591 "QLINK0_REQ",
726 "QLINK0_EN", /* GPIO_160 */ 592 "QLINK0_EN", /* GPIO_160 */
727 "QLINK0_WMSS_RESET_N", 593 "QLINK0_WMSS_RESET_N",
728 "NC", 594 "NC",
729 "NC", 595 "NC",
730 "NC", 596 "NC",
731 "NC", 597 "NC",
732 "NC", 598 "NC",
733 "NC", 599 "NC",
734 "WCD_SWR_TX_CLK", 600 "WCD_SWR_TX_CLK",
735 "WCD_SWR_TX_DATA0", 601 "WCD_SWR_TX_DATA0",
736 "WCD_SWR_TX_DATA1", /* GPIO_17 602 "WCD_SWR_TX_DATA1", /* GPIO_170 */
737 "WCD_SWR_RX_CLK", 603 "WCD_SWR_RX_CLK",
738 "WCD_SWR_RX_DATA0", 604 "WCD_SWR_RX_DATA0",
739 "WCD_SWR_RX_DATA1", 605 "WCD_SWR_RX_DATA1",
740 "DMIC01_CLK", 606 "DMIC01_CLK",
741 "DMIC01_DATA", 607 "DMIC01_DATA",
742 "DMIC23_CLK", 608 "DMIC23_CLK",
743 "DMIC23_DATA", 609 "DMIC23_DATA",
744 "WSA_SWR_CLK", 610 "WSA_SWR_CLK",
745 "WSA_SWR_DATA", 611 "WSA_SWR_DATA",
746 "DMIC45_CLK", /* GPIO_180 */ 612 "DMIC45_CLK", /* GPIO_180 */
747 "DMIC45_DATA", 613 "DMIC45_DATA",
748 "WCD_SWR_TX_DATA2", 614 "WCD_SWR_TX_DATA2",
749 "SENSOR_I3C_SDA", 615 "SENSOR_I3C_SDA",
750 "SENSOR_I3C_SCL", 616 "SENSOR_I3C_SCL",
751 "CAM_OIS0_I3C_SDA", 617 "CAM_OIS0_I3C_SDA",
752 "CAM_OIS0_I3C_SCL", 618 "CAM_OIS0_I3C_SCL",
753 "IMU_SPI_MISO", 619 "IMU_SPI_MISO",
754 "IMU_SPI_MOSI", 620 "IMU_SPI_MOSI",
755 "IMU_SPI_CLK", 621 "IMU_SPI_CLK",
756 "IMU_SPI_CS_N", /* GPIO_190 */ 622 "IMU_SPI_CS_N", /* GPIO_190 */
757 "MAG_I2C_SDA", 623 "MAG_I2C_SDA",
758 "MAG_I2C_SCL", 624 "MAG_I2C_SCL",
759 "SENSOR_I2C_SDA", 625 "SENSOR_I2C_SDA",
760 "SENSOR_I2C_SCL", 626 "SENSOR_I2C_SCL",
761 "RADAR_SPI_MISO", 627 "RADAR_SPI_MISO",
762 "RADAR_SPI_MOSI", 628 "RADAR_SPI_MOSI",
763 "RADAR_SPI_CLK", 629 "RADAR_SPI_CLK",
764 "RADAR_SPI_CS_N", 630 "RADAR_SPI_CS_N",
765 "HST_BLE_UART_TX", 631 "HST_BLE_UART_TX",
766 "HST_BLE_UART_RX", /* GPIO_200 632 "HST_BLE_UART_RX", /* GPIO_200 */
767 "HST_WLAN_UART_TX", 633 "HST_WLAN_UART_TX",
768 "HST_WLAN_UART_RX"; 634 "HST_WLAN_UART_RX";
769 635
770 pcie0_default_state: pcie0-default-sta 636 pcie0_default_state: pcie0-default-state {
771 perst-pins { 637 perst-pins {
772 pins = "gpio94"; 638 pins = "gpio94";
773 function = "gpio"; 639 function = "gpio";
774 drive-strength = <2>; 640 drive-strength = <2>;
775 bias-pull-down; 641 bias-pull-down;
776 }; 642 };
777 643
778 clkreq-pins { 644 clkreq-pins {
779 pins = "gpio95"; 645 pins = "gpio95";
780 function = "pcie0_clkr 646 function = "pcie0_clkreqn";
781 drive-strength = <2>; 647 drive-strength = <2>;
782 bias-pull-up; 648 bias-pull-up;
783 }; 649 };
784 650
785 wake-pins { 651 wake-pins {
786 pins = "gpio96"; 652 pins = "gpio96";
787 function = "gpio"; 653 function = "gpio";
788 drive-strength = <2>; 654 drive-strength = <2>;
789 bias-pull-up; 655 bias-pull-up;
790 }; 656 };
791 }; 657 };
792 658
793 pcie1_default_state: pcie1-default-sta 659 pcie1_default_state: pcie1-default-state {
794 perst-pins { 660 perst-pins {
795 pins = "gpio97"; 661 pins = "gpio97";
796 function = "gpio"; 662 function = "gpio";
797 drive-strength = <2>; 663 drive-strength = <2>;
798 bias-pull-down; 664 bias-pull-down;
799 }; 665 };
800 666
801 clkreq-pins { 667 clkreq-pins {
802 pins = "gpio98"; 668 pins = "gpio98";
803 function = "pcie1_clkr 669 function = "pcie1_clkreqn";
804 drive-strength = <2>; 670 drive-strength = <2>;
805 bias-pull-up; 671 bias-pull-up;
806 }; 672 };
807 673
808 wake-pins { 674 wake-pins {
809 pins = "gpio99"; 675 pins = "gpio99";
810 function = "gpio"; 676 function = "gpio";
811 drive-strength = <2>; 677 drive-strength = <2>;
812 bias-pull-up; 678 bias-pull-up;
813 }; 679 };
814 }; 680 };
815 <<
816 sdc2_card_det_n: sd-card-det-n-state { <<
817 pins = "gpio92"; <<
818 function = "gpio"; <<
819 drive-strength = <2>; <<
820 bias-pull-up; <<
821 }; <<
822 }; 681 };
823 682
824 &uart2 { 683 &uart2 {
825 status = "okay"; 684 status = "okay";
826 }; 685 };
827 686
828 &ufs_mem_hc { 687 &ufs_mem_hc {
829 status = "okay"; 688 status = "okay";
830 689
831 reset-gpios = <&tlmm 203 GPIO_ACTIVE_L 690 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>;
832 691
833 vcc-supply = <&vreg_l7b_2p96>; 692 vcc-supply = <&vreg_l7b_2p96>;
834 vcc-max-microamp = <800000>; 693 vcc-max-microamp = <800000>;
835 vccq-supply = <&vreg_l9b_1p2>; 694 vccq-supply = <&vreg_l9b_1p2>;
836 vccq-max-microamp = <900000>; 695 vccq-max-microamp = <900000>;
837 vdd-hba-supply = <&vreg_l9b_1p2>; <<
838 }; 696 };
839 697
840 &ufs_mem_phy { 698 &ufs_mem_phy {
841 status = "okay"; 699 status = "okay";
842 700
843 vdda-phy-supply = <&vreg_l5b_0p88>; 701 vdda-phy-supply = <&vreg_l5b_0p88>;
844 vdda-pll-supply = <&vreg_l6b_1p2>; 702 vdda-pll-supply = <&vreg_l6b_1p2>;
845 }; 703 };
846 704
847 &usb_1 { 705 &usb_1 {
848 status = "okay"; 706 status = "okay";
849 }; 707 };
850 708
851 &usb_1_dwc3 { 709 &usb_1_dwc3 {
852 dr_mode = "otg"; 710 dr_mode = "otg";
853 usb-role-switch; 711 usb-role-switch;
854 }; 712 };
855 713
856 &usb_1_dwc3_hs { 714 &usb_1_dwc3_hs {
857 remote-endpoint = <&pmic_glink_hs_in>; 715 remote-endpoint = <&pmic_glink_hs_in>;
858 }; 716 };
859 717
>> 718 &usb_1_dwc3_ss {
>> 719 remote-endpoint = <&pmic_glink_ss_in>;
>> 720 };
>> 721
860 &usb_1_hsphy { 722 &usb_1_hsphy {
861 status = "okay"; 723 status = "okay";
862 724
863 vdda-pll-supply = <&vreg_l5b_0p88>; 725 vdda-pll-supply = <&vreg_l5b_0p88>;
864 vdda18-supply = <&vreg_l1c_1p8>; 726 vdda18-supply = <&vreg_l1c_1p8>;
865 vdda33-supply = <&vreg_l2b_3p07>; 727 vdda33-supply = <&vreg_l2b_3p07>;
866 }; 728 };
867 729
868 &usb_1_qmpphy { 730 &usb_1_qmpphy {
869 status = "okay"; 731 status = "okay";
870 732
871 vdda-phy-supply = <&vreg_l6b_1p2>; 733 vdda-phy-supply = <&vreg_l6b_1p2>;
872 vdda-pll-supply = <&vreg_l1b_0p88>; 734 vdda-pll-supply = <&vreg_l1b_0p88>;
873 }; <<
874 <<
875 &usb_1_qmpphy_out { <<
876 remote-endpoint = <&pmic_glink_ss_in>; <<
877 }; 735 };
878 736
879 &usb_2 { 737 &usb_2 {
880 status = "okay"; 738 status = "okay";
881 }; 739 };
882 740
883 &usb_2_dwc3 { 741 &usb_2_dwc3 {
884 dr_mode = "host"; 742 dr_mode = "host";
885 743
886 pinctrl-names = "default"; 744 pinctrl-names = "default";
887 pinctrl-0 = <&usb_hub_enabled_state>; 745 pinctrl-0 = <&usb_hub_enabled_state>;
888 }; 746 };
889 747
890 &usb_2_hsphy { 748 &usb_2_hsphy {
891 status = "okay"; 749 status = "okay";
892 750
893 vdda-pll-supply = <&vreg_l5b_0p88>; 751 vdda-pll-supply = <&vreg_l5b_0p88>;
894 vdda18-supply = <&vreg_l1c_1p8>; 752 vdda18-supply = <&vreg_l1c_1p8>;
895 vdda33-supply = <&vreg_l2b_3p07>; 753 vdda33-supply = <&vreg_l2b_3p07>;
896 }; 754 };
897 755
898 &usb_2_qmpphy { 756 &usb_2_qmpphy {
899 status = "okay"; 757 status = "okay";
900 758
901 vdda-phy-supply = <&vreg_l6b_1p2>; 759 vdda-phy-supply = <&vreg_l6b_1p2>;
902 vdda-pll-supply = <&vreg_l5b_0p88>; 760 vdda-pll-supply = <&vreg_l5b_0p88>;
903 }; 761 };
904 762
905 /* PINCTRL - additions to nodes defined in sm8 763 /* PINCTRL - additions to nodes defined in sm8350.dtsi */
906 764
907 &tlmm { 765 &tlmm {
908 usb_hub_enabled_state: usb-hub-enabled 766 usb_hub_enabled_state: usb-hub-enabled-state {
909 pins = "gpio42"; 767 pins = "gpio42";
910 function = "gpio"; 768 function = "gpio";
911 769
912 drive-strength = <2>; 770 drive-strength = <2>;
913 output-low; 771 output-low;
914 }; 772 };
915 773
916 lt9611_state: lt9611-state { 774 lt9611_state: lt9611-state {
917 rst-pins { 775 rst-pins {
918 pins = "gpio48"; 776 pins = "gpio48";
919 function = "gpio"; 777 function = "gpio";
920 778
921 output-high; 779 output-high;
922 input-disable; 780 input-disable;
923 }; 781 };
924 782
925 irq-pins { 783 irq-pins {
926 pins = "gpio50"; 784 pins = "gpio50";
927 function = "gpio"; 785 function = "gpio";
928 bias-disable; 786 bias-disable;
929 }; 787 };
930 }; 788 };
931 }; 789 };
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