1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2020-2021, Linaro Limited 3 * Copyright (c) 2020-2021, Linaro Limited
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/regulator/qcom,rpmh-regu 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include "sm8350.dtsi" 9 #include "sm8350.dtsi"
10 #include "pm8350.dtsi" <<
11 #include "pm8350b.dtsi" <<
12 #include "pm8350c.dtsi" <<
13 #include "pmk8350.dtsi" 10 #include "pmk8350.dtsi"
14 #include "pmr735a.dtsi" <<
15 #include "pmr735b.dtsi" <<
16 11
17 / { 12 / {
18 model = "Qualcomm Technologies, Inc. S 13 model = "Qualcomm Technologies, Inc. SM8350 HDK";
19 compatible = "qcom,sm8350-hdk", "qcom, 14 compatible = "qcom,sm8350-hdk", "qcom,sm8350";
20 chassis-type = "embedded"; 15 chassis-type = "embedded";
21 16
22 aliases { 17 aliases {
23 serial0 = &uart2; 18 serial0 = &uart2;
24 }; 19 };
25 20
26 chosen { 21 chosen {
27 stdout-path = "serial0:115200n 22 stdout-path = "serial0:115200n8";
28 }; 23 };
29 24
30 hdmi-connector { 25 hdmi-connector {
31 compatible = "hdmi-connector"; 26 compatible = "hdmi-connector";
32 type = "a"; 27 type = "a";
33 28
34 port { 29 port {
35 hdmi_con: endpoint { 30 hdmi_con: endpoint {
36 remote-endpoin 31 remote-endpoint = <<9611_out>;
37 }; 32 };
38 }; 33 };
39 }; 34 };
40 35
41 pmic-glink { 36 pmic-glink {
42 compatible = "qcom,sm8350-pmic 37 compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink";
43 #address-cells = <1>; 38 #address-cells = <1>;
44 #size-cells = <0>; 39 #size-cells = <0>;
45 orientation-gpios = <&tlmm 81 <<
46 40
47 connector@0 { 41 connector@0 {
48 compatible = "usb-c-co 42 compatible = "usb-c-connector";
49 reg = <0>; 43 reg = <0>;
50 power-role = "dual"; 44 power-role = "dual";
51 data-role = "dual"; 45 data-role = "dual";
52 46
53 ports { 47 ports {
54 #address-cells 48 #address-cells = <1>;
55 #size-cells = 49 #size-cells = <0>;
56 50
57 port@0 { 51 port@0 {
58 reg = 52 reg = <0>;
59 53
60 pmic_g 54 pmic_glink_hs_in: endpoint {
61 55 remote-endpoint = <&usb_1_dwc3_hs>;
62 }; 56 };
63 }; 57 };
64 58
65 port@1 { 59 port@1 {
66 reg = 60 reg = <1>;
67 61
68 pmic_g 62 pmic_glink_ss_in: endpoint {
69 63 remote-endpoint = <&usb_1_qmpphy_out>;
70 }; 64 };
71 }; 65 };
72 66
73 port@2 { 67 port@2 {
74 reg = 68 reg = <2>;
75 69
76 pmic_g 70 pmic_glink_sbu: endpoint {
77 71 remote-endpoint = <&fsa4480_sbu_mux>;
78 }; 72 };
79 }; 73 };
80 }; 74 };
81 }; 75 };
82 }; 76 };
83 77
84 vph_pwr: vph-pwr-regulator { 78 vph_pwr: vph-pwr-regulator {
85 compatible = "regulator-fixed" 79 compatible = "regulator-fixed";
86 regulator-name = "vph_pwr"; 80 regulator-name = "vph_pwr";
87 regulator-min-microvolt = <370 81 regulator-min-microvolt = <3700000>;
88 regulator-max-microvolt = <370 82 regulator-max-microvolt = <3700000>;
89 83
90 regulator-always-on; 84 regulator-always-on;
91 regulator-boot-on; 85 regulator-boot-on;
92 }; 86 };
93 87
94 lt9611_1v2: lt9611-1v2-regulator { 88 lt9611_1v2: lt9611-1v2-regulator {
95 compatible = "regulator-fixed" 89 compatible = "regulator-fixed";
96 regulator-name = "LT9611_1V2"; 90 regulator-name = "LT9611_1V2";
97 91
98 vin-supply = <&vph_pwr>; 92 vin-supply = <&vph_pwr>;
99 regulator-min-microvolt = <120 93 regulator-min-microvolt = <1200000>;
100 regulator-max-microvolt = <120 94 regulator-max-microvolt = <1200000>;
101 gpio = <&tlmm 49 GPIO_ACTIVE_H 95 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>;
102 enable-active-high; 96 enable-active-high;
103 regulator-boot-on; 97 regulator-boot-on;
104 }; 98 };
105 99
106 lt9611_3v3: lt9611-3v3-regulator { 100 lt9611_3v3: lt9611-3v3-regulator {
107 compatible = "regulator-fixed" 101 compatible = "regulator-fixed";
108 regulator-name = "LT9611_3V3"; 102 regulator-name = "LT9611_3V3";
109 103
110 vin-supply = <&vreg_bob>; 104 vin-supply = <&vreg_bob>;
111 gpio = <&tlmm 47 GPIO_ACTIVE_H 105 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
112 regulator-min-microvolt = <330 106 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <330 107 regulator-max-microvolt = <3300000>;
114 enable-active-high; 108 enable-active-high;
115 regulator-boot-on; 109 regulator-boot-on;
116 regulator-always-on; 110 regulator-always-on;
117 }; 111 };
118 }; 112 };
119 113
120 &adsp { 114 &adsp {
121 status = "okay"; 115 status = "okay";
122 firmware-name = "qcom/sm8350/adsp.mbn" 116 firmware-name = "qcom/sm8350/adsp.mbn";
123 }; 117 };
124 118
125 &apps_rsc { 119 &apps_rsc {
126 regulators-0 { 120 regulators-0 {
127 compatible = "qcom,pm8350-rpmh 121 compatible = "qcom,pm8350-rpmh-regulators";
128 qcom,pmic-id = "b"; 122 qcom,pmic-id = "b";
129 123
130 vdd-s1-supply = <&vph_pwr>; 124 vdd-s1-supply = <&vph_pwr>;
131 vdd-s2-supply = <&vph_pwr>; 125 vdd-s2-supply = <&vph_pwr>;
132 vdd-s3-supply = <&vph_pwr>; 126 vdd-s3-supply = <&vph_pwr>;
133 vdd-s4-supply = <&vph_pwr>; 127 vdd-s4-supply = <&vph_pwr>;
134 vdd-s5-supply = <&vph_pwr>; 128 vdd-s5-supply = <&vph_pwr>;
135 vdd-s6-supply = <&vph_pwr>; 129 vdd-s6-supply = <&vph_pwr>;
136 vdd-s7-supply = <&vph_pwr>; 130 vdd-s7-supply = <&vph_pwr>;
137 vdd-s8-supply = <&vph_pwr>; 131 vdd-s8-supply = <&vph_pwr>;
138 vdd-s9-supply = <&vph_pwr>; 132 vdd-s9-supply = <&vph_pwr>;
139 vdd-s10-supply = <&vph_pwr>; 133 vdd-s10-supply = <&vph_pwr>;
140 vdd-s11-supply = <&vph_pwr>; 134 vdd-s11-supply = <&vph_pwr>;
141 vdd-s12-supply = <&vph_pwr>; 135 vdd-s12-supply = <&vph_pwr>;
142 136
143 vdd-l1-l4-supply = <&vreg_s11b 137 vdd-l1-l4-supply = <&vreg_s11b_0p95>;
144 vdd-l2-l7-supply = <&vreg_bob> 138 vdd-l2-l7-supply = <&vreg_bob>;
145 vdd-l3-l5-supply = <&vreg_bob> 139 vdd-l3-l5-supply = <&vreg_bob>;
146 vdd-l6-l9-l10-supply = <&vreg_ 140 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>;
147 141
148 vreg_s10b_1p8: smps10 { 142 vreg_s10b_1p8: smps10 {
149 regulator-name = "vreg 143 regulator-name = "vreg_s10b_1p8";
150 regulator-min-microvol 144 regulator-min-microvolt = <1800000>;
151 regulator-max-microvol 145 regulator-max-microvolt = <1800000>;
152 regulator-initial-mode 146 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153 }; 147 };
154 148
155 vreg_s11b_0p95: smps11 { 149 vreg_s11b_0p95: smps11 {
156 regulator-name = "vreg 150 regulator-name = "vreg_s11b_0p95";
157 regulator-min-microvol 151 regulator-min-microvolt = <952000>;
158 regulator-max-microvol 152 regulator-max-microvolt = <952000>;
159 regulator-initial-mode 153 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
160 }; 154 };
161 155
162 vreg_s12b_1p25: smps12 { 156 vreg_s12b_1p25: smps12 {
163 regulator-name = "vreg 157 regulator-name = "vreg_s12b_1p25";
164 regulator-min-microvol 158 regulator-min-microvolt = <1256000>;
165 regulator-max-microvol 159 regulator-max-microvolt = <1256000>;
166 regulator-initial-mode 160 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
167 }; 161 };
168 162
169 vreg_l1b_0p88: ldo1 { 163 vreg_l1b_0p88: ldo1 {
170 regulator-name = "vreg 164 regulator-name = "vreg_l1b_0p88";
171 regulator-min-microvol 165 regulator-min-microvolt = <912000>;
172 regulator-max-microvol 166 regulator-max-microvolt = <920000>;
173 regulator-initial-mode 167 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
174 }; 168 };
175 169
176 vreg_l2b_3p07: ldo2 { 170 vreg_l2b_3p07: ldo2 {
177 regulator-name = "vreg 171 regulator-name = "vreg_l2b_3p07";
178 regulator-min-microvol 172 regulator-min-microvolt = <3072000>;
179 regulator-max-microvol 173 regulator-max-microvolt = <3072000>;
180 regulator-initial-mode 174 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
181 }; 175 };
182 176
183 vreg_l3b_0p9: ldo3 { 177 vreg_l3b_0p9: ldo3 {
184 regulator-name = "vreg 178 regulator-name = "vreg_l3b_0p9";
185 regulator-min-microvol 179 regulator-min-microvolt = <904000>;
186 regulator-max-microvol 180 regulator-max-microvolt = <904000>;
187 regulator-initial-mode 181 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
188 }; 182 };
189 183
190 vreg_l5b_0p88: ldo5 { 184 vreg_l5b_0p88: ldo5 {
191 regulator-name = "vreg 185 regulator-name = "vreg_l5b_0p88";
192 regulator-min-microvol 186 regulator-min-microvolt = <880000>;
193 regulator-max-microvol 187 regulator-max-microvolt = <888000>;
194 regulator-initial-mode 188 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
195 regulator-allow-set-lo 189 regulator-allow-set-load;
196 regulator-allowed-mode 190 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
197 191 RPMH_REGULATOR_MODE_HPM>;
198 }; 192 };
199 193
200 vreg_l6b_1p2: ldo6 { 194 vreg_l6b_1p2: ldo6 {
201 regulator-name = "vreg 195 regulator-name = "vreg_l6b_1p2";
202 regulator-min-microvol 196 regulator-min-microvolt = <1200000>;
203 regulator-max-microvol 197 regulator-max-microvolt = <1208000>;
204 regulator-initial-mode 198 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
205 regulator-allow-set-lo 199 regulator-allow-set-load;
206 regulator-allowed-mode 200 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
207 201 RPMH_REGULATOR_MODE_HPM>;
208 }; 202 };
209 203
210 vreg_l7b_2p96: ldo7 { 204 vreg_l7b_2p96: ldo7 {
211 regulator-name = "vreg 205 regulator-name = "vreg_l7b_2p96";
212 regulator-min-microvol 206 regulator-min-microvolt = <2504000>;
213 regulator-max-microvol 207 regulator-max-microvolt = <2504000>;
214 regulator-initial-mode 208 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
215 regulator-allow-set-lo 209 regulator-allow-set-load;
216 regulator-allowed-mode 210 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
217 211 RPMH_REGULATOR_MODE_HPM>;
218 }; 212 };
219 213
220 vreg_l9b_1p2: ldo9 { 214 vreg_l9b_1p2: ldo9 {
221 regulator-name = "vreg 215 regulator-name = "vreg_l9b_1p2";
222 regulator-min-microvol 216 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 217 regulator-max-microvolt = <1200000>;
224 regulator-initial-mode 218 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 regulator-allow-set-lo 219 regulator-allow-set-load;
226 regulator-allowed-mode 220 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
227 221 RPMH_REGULATOR_MODE_HPM>;
228 }; 222 };
229 }; 223 };
230 224
231 regulators-1 { 225 regulators-1 {
232 compatible = "qcom,pm8350c-rpm 226 compatible = "qcom,pm8350c-rpmh-regulators";
233 qcom,pmic-id = "c"; 227 qcom,pmic-id = "c";
234 228
235 vdd-s1-supply = <&vph_pwr>; 229 vdd-s1-supply = <&vph_pwr>;
236 vdd-s2-supply = <&vph_pwr>; 230 vdd-s2-supply = <&vph_pwr>;
237 vdd-s3-supply = <&vph_pwr>; 231 vdd-s3-supply = <&vph_pwr>;
238 vdd-s4-supply = <&vph_pwr>; 232 vdd-s4-supply = <&vph_pwr>;
239 vdd-s5-supply = <&vph_pwr>; 233 vdd-s5-supply = <&vph_pwr>;
240 vdd-s6-supply = <&vph_pwr>; 234 vdd-s6-supply = <&vph_pwr>;
241 vdd-s7-supply = <&vph_pwr>; 235 vdd-s7-supply = <&vph_pwr>;
242 vdd-s8-supply = <&vph_pwr>; 236 vdd-s8-supply = <&vph_pwr>;
243 vdd-s9-supply = <&vph_pwr>; 237 vdd-s9-supply = <&vph_pwr>;
244 vdd-s10-supply = <&vph_pwr>; 238 vdd-s10-supply = <&vph_pwr>;
245 239
246 vdd-l1-l12-supply = <&vreg_s1c 240 vdd-l1-l12-supply = <&vreg_s1c_1p86>;
247 vdd-l2-l8-supply = <&vreg_s1c_ 241 vdd-l2-l8-supply = <&vreg_s1c_1p86>;
248 vdd-l3-l4-l5-l7-l13-supply = < 242 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
249 vdd-l6-l9-l11-supply = <&vreg_ 243 vdd-l6-l9-l11-supply = <&vreg_bob>;
250 vdd-l10-supply = <&vreg_s12b_1 244 vdd-l10-supply = <&vreg_s12b_1p25>;
251 245
252 vdd-bob-supply = <&vph_pwr>; 246 vdd-bob-supply = <&vph_pwr>;
253 247
254 vreg_s1c_1p86: smps1 { 248 vreg_s1c_1p86: smps1 {
255 regulator-name = "vreg 249 regulator-name = "vreg_s1c_1p86";
256 regulator-min-microvol 250 regulator-min-microvolt = <1856000>;
257 regulator-max-microvol 251 regulator-max-microvolt = <1880000>;
258 regulator-initial-mode 252 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259 }; 253 };
260 254
261 vreg_bob: bob { 255 vreg_bob: bob {
262 regulator-name = "vreg 256 regulator-name = "vreg_bob";
263 regulator-min-microvol 257 regulator-min-microvolt = <3008000>;
264 regulator-max-microvol 258 regulator-max-microvolt = <3960000>;
265 regulator-initial-mode 259 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
266 }; 260 };
267 261
268 vreg_l1c_1p8: ldo1 { 262 vreg_l1c_1p8: ldo1 {
269 regulator-name = "vreg 263 regulator-name = "vreg_l1c_1p8";
270 regulator-min-microvol 264 regulator-min-microvolt = <1800000>;
271 regulator-max-microvol 265 regulator-max-microvolt = <1800000>;
272 regulator-initial-mode 266 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273 }; 267 };
274 268
275 vreg_l2c_1p8: ldo2 { 269 vreg_l2c_1p8: ldo2 {
276 regulator-name = "vreg 270 regulator-name = "vreg_l2c_1p8";
277 regulator-min-microvol 271 regulator-min-microvolt = <1800000>;
278 regulator-max-microvol 272 regulator-max-microvolt = <1800000>;
279 regulator-initial-mode 273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280 }; 274 };
281 275
282 vreg_l6c_1p8: ldo6 { 276 vreg_l6c_1p8: ldo6 {
283 regulator-name = "vreg 277 regulator-name = "vreg_l6c_1p8";
284 regulator-min-microvol 278 regulator-min-microvolt = <1800000>;
285 regulator-max-microvol 279 regulator-max-microvolt = <2960000>;
286 regulator-initial-mode 280 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 }; 281 };
288 282
289 vreg_l9c_2p96: ldo9 { 283 vreg_l9c_2p96: ldo9 {
290 regulator-name = "vreg 284 regulator-name = "vreg_l9c_2p96";
291 regulator-min-microvol 285 regulator-min-microvolt = <2960000>;
292 regulator-max-microvol 286 regulator-max-microvolt = <3008000>;
293 regulator-initial-mode 287 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
294 }; 288 };
295 289
296 vreg_l10c_1p2: ldo10 { 290 vreg_l10c_1p2: ldo10 {
297 regulator-name = "vreg 291 regulator-name = "vreg_l10c_1p2";
298 regulator-min-microvol 292 regulator-min-microvolt = <1200000>;
299 regulator-max-microvol 293 regulator-max-microvolt = <1200000>;
300 regulator-initial-mode 294 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
301 }; 295 };
302 }; 296 };
303 <<
304 regulators-2 { <<
305 compatible = "qcom,pmr735a-rpm <<
306 qcom,pmic-id = "e"; <<
307 <<
308 vdd-s1-supply = <&vph_pwr>; <<
309 vdd-s2-supply = <&vph_pwr>; <<
310 vdd-s3-supply = <&vph_pwr>; <<
311 <<
312 vdd-l1-l2-supply = <&vreg_s2e_ <<
313 vdd-l3-supply = <&vreg_s1e_1p2 <<
314 vdd-l4-supply = <&vreg_s1c_1p8 <<
315 vdd-l5-l6-supply = <&vreg_s1c_ <<
316 vdd-l7-bob-supply = <&vreg_bob <<
317 <<
318 vreg_s1e_1p25: smps1 { <<
319 regulator-name = "vreg <<
320 regulator-min-microvol <<
321 regulator-max-microvol <<
322 }; <<
323 <<
324 vreg_s2e_0p85: smps2 { <<
325 regulator-name = "vreg <<
326 regulator-min-microvol <<
327 regulator-max-microvol <<
328 }; <<
329 <<
330 vreg_s3e_2p20: smps3 { <<
331 regulator-name = "vreg <<
332 regulator-min-microvol <<
333 regulator-max-microvol <<
334 }; <<
335 <<
336 vreg_l1e_0p9: ldo1 { <<
337 regulator-name = "vreg <<
338 regulator-min-microvol <<
339 regulator-max-microvol <<
340 }; <<
341 <<
342 vreg_l2e_1p2: ldo2 { <<
343 regulator-name = "vreg <<
344 regulator-min-microvol <<
345 regulator-max-microvol <<
346 }; <<
347 <<
348 vreg_l3e_1p2: ldo3 { <<
349 regulator-name = "vreg <<
350 regulator-min-microvol <<
351 regulator-max-microvol <<
352 }; <<
353 <<
354 vreg_l4e_1p7: ldo4 { <<
355 regulator-name = "vreg <<
356 regulator-min-microvol <<
357 regulator-max-microvol <<
358 }; <<
359 <<
360 vreg_l5e_0p8: ldo5 { <<
361 regulator-name = "vreg <<
362 regulator-min-microvol <<
363 regulator-max-microvol <<
364 }; <<
365 <<
366 vreg_l6e_0p8: ldo6 { <<
367 regulator-name = "vreg <<
368 regulator-min-microvol <<
369 regulator-max-microvol <<
370 }; <<
371 <<
372 vreg_l7e_2p8: ldo7 { <<
373 regulator-name = "vreg <<
374 regulator-min-microvol <<
375 regulator-max-microvol <<
376 }; <<
377 }; <<
378 }; 297 };
379 298
380 &cdsp { 299 &cdsp {
381 status = "okay"; 300 status = "okay";
382 firmware-name = "qcom/sm8350/cdsp.mbn" 301 firmware-name = "qcom/sm8350/cdsp.mbn";
383 }; 302 };
384 303
385 &dispcc { 304 &dispcc {
386 status = "okay"; 305 status = "okay";
387 }; 306 };
388 307
389 &mdss_dsi0 { 308 &mdss_dsi0 {
390 vdda-supply = <&vreg_l6b_1p2>; 309 vdda-supply = <&vreg_l6b_1p2>;
391 status = "okay"; 310 status = "okay";
392 311
393 ports { 312 ports {
394 port@1 { 313 port@1 {
395 endpoint { 314 endpoint {
396 remote-endpoin 315 remote-endpoint = <<9611_a>;
397 data-lanes = < 316 data-lanes = <0 1 2 3>;
398 }; 317 };
399 }; 318 };
400 }; 319 };
401 }; 320 };
402 321
403 &mdss_dsi0_phy { 322 &mdss_dsi0_phy {
404 vdds-supply = <&vreg_l5b_0p88>; 323 vdds-supply = <&vreg_l5b_0p88>;
405 status = "okay"; 324 status = "okay";
406 }; 325 };
407 326
408 &gpi_dma1 { 327 &gpi_dma1 {
409 status = "okay"; 328 status = "okay";
410 }; 329 };
411 330
412 &gpu { 331 &gpu {
413 status = "okay"; 332 status = "okay";
414 333
415 zap-shader { 334 zap-shader {
416 firmware-name = "qcom/sm8350/a 335 firmware-name = "qcom/sm8350/a660_zap.mbn";
417 }; 336 };
418 }; 337 };
419 338
420 &i2c13 { 339 &i2c13 {
421 clock-frequency = <100000>; 340 clock-frequency = <100000>;
422 341
423 status = "okay"; 342 status = "okay";
424 343
425 typec-mux@42 { 344 typec-mux@42 {
426 compatible = "fcs,fsa4480"; 345 compatible = "fcs,fsa4480";
427 reg = <0x42>; 346 reg = <0x42>;
428 347
429 interrupts-extended = <&tlmm 2 348 interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
430 349
431 vcc-supply = <&vreg_bob>; 350 vcc-supply = <&vreg_bob>;
432 mode-switch; 351 mode-switch;
433 orientation-switch; 352 orientation-switch;
434 353
435 port { 354 port {
436 fsa4480_sbu_mux: endpo 355 fsa4480_sbu_mux: endpoint {
437 remote-endpoin 356 remote-endpoint = <&pmic_glink_sbu>;
438 }; 357 };
439 }; 358 };
440 }; 359 };
441 }; 360 };
442 361
443 &i2c15 { 362 &i2c15 {
444 clock-frequency = <400000>; 363 clock-frequency = <400000>;
445 status = "okay"; 364 status = "okay";
446 365
447 lt9611_codec: hdmi-bridge@2b { 366 lt9611_codec: hdmi-bridge@2b {
448 compatible = "lontium,lt9611ux 367 compatible = "lontium,lt9611uxc";
449 reg = <0x2b>; 368 reg = <0x2b>;
450 369
451 interrupts-extended = <&tlmm 5 370 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>;
452 reset-gpios = <&tlmm 48 GPIO_A 371 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
453 372
454 vdd-supply = <<9611_1v2>; 373 vdd-supply = <<9611_1v2>;
455 vcc-supply = <<9611_3v3>; 374 vcc-supply = <<9611_3v3>;
456 375
457 pinctrl-names = "default"; 376 pinctrl-names = "default";
458 pinctrl-0 = <<9611_state>; 377 pinctrl-0 = <<9611_state>;
459 378
460 ports { 379 ports {
461 #address-cells = <1>; 380 #address-cells = <1>;
462 #size-cells = <0>; 381 #size-cells = <0>;
463 382
464 port@0 { 383 port@0 {
465 reg = <0>; 384 reg = <0>;
466 385
467 lt9611_a: endp 386 lt9611_a: endpoint {
468 remote 387 remote-endpoint = <&mdss_dsi0_out>;
469 }; 388 };
470 }; 389 };
471 390
472 port@2 { 391 port@2 {
473 reg = <2>; 392 reg = <2>;
474 393
475 lt9611_out: en 394 lt9611_out: endpoint {
476 remote 395 remote-endpoint = <&hdmi_con>;
477 }; 396 };
478 }; 397 };
479 }; 398 };
480 }; 399 };
481 }; 400 };
482 401
483 &mdss { 402 &mdss {
484 status = "okay"; 403 status = "okay";
485 }; 404 };
486 405
487 &mdss_dp { 406 &mdss_dp {
488 status = "okay"; 407 status = "okay";
489 }; <<
490 408
491 &mdss_dp_out { !! 409 ports {
492 data-lanes = <0 1>; !! 410 port@1 {
>> 411 reg = <1>;
>> 412
>> 413 mdss_dp0_out: endpoint {
>> 414 data-lanes = <0 1>;
>> 415 remote-endpoint = <&usb_1_qmpphy_dp_in>;
>> 416 };
>> 417 };
>> 418 };
493 }; 419 };
494 420
495 &mpss { 421 &mpss {
496 status = "okay"; 422 status = "okay";
497 firmware-name = "qcom/sm8350/modem.mbn 423 firmware-name = "qcom/sm8350/modem.mbn";
498 }; 424 };
499 425
500 &pcie0 { 426 &pcie0 {
501 pinctrl-names = "default"; 427 pinctrl-names = "default";
502 pinctrl-0 = <&pcie0_default_state>; 428 pinctrl-0 = <&pcie0_default_state>;
503 429
504 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LO 430 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
505 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIG 431 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
506 432
507 status = "okay"; 433 status = "okay";
508 }; 434 };
509 435
510 &pcie0_phy { 436 &pcie0_phy {
511 vdda-phy-supply = <&vreg_l5b_0p88>; 437 vdda-phy-supply = <&vreg_l5b_0p88>;
512 vdda-pll-supply = <&vreg_l6b_1p2>; 438 vdda-pll-supply = <&vreg_l6b_1p2>;
513 439
514 status = "okay"; 440 status = "okay";
515 }; 441 };
516 442
517 &pcie1 { 443 &pcie1 {
518 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LO 444 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
519 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIG 445 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
520 446
521 pinctrl-names = "default"; 447 pinctrl-names = "default";
522 pinctrl-0 = <&pcie1_default_state>; 448 pinctrl-0 = <&pcie1_default_state>;
523 449
524 status = "okay"; 450 status = "okay";
525 }; 451 };
526 452
527 &pcie1_phy { 453 &pcie1_phy {
528 status = "okay"; 454 status = "okay";
529 vdda-phy-supply = <&vreg_l5b_0p88>; 455 vdda-phy-supply = <&vreg_l5b_0p88>;
530 vdda-pll-supply = <&vreg_l6b_1p2>; 456 vdda-pll-supply = <&vreg_l6b_1p2>;
531 }; 457 };
532 458
533 &qupv3_id_0 { 459 &qupv3_id_0 {
534 status = "okay"; 460 status = "okay";
535 }; 461 };
536 462
537 &qupv3_id_1 { 463 &qupv3_id_1 {
538 status = "okay"; 464 status = "okay";
539 }; 465 };
540 466
541 &qupv3_id_2 { 467 &qupv3_id_2 {
542 status = "okay"; 468 status = "okay";
543 }; 469 };
544 470
545 &sdhc_2 { 471 &sdhc_2 {
546 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH> 472 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
547 pinctrl-names = "default", "sleep"; 473 pinctrl-names = "default", "sleep";
548 pinctrl-0 = <&sdc2_default_state &sdc2 474 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
549 pinctrl-1 = <&sdc2_sleep_state &sdc2_c 475 pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
550 vmmc-supply = <&vreg_l9c_2p96>; 476 vmmc-supply = <&vreg_l9c_2p96>;
551 vqmmc-supply = <&vreg_l6c_1p8>; 477 vqmmc-supply = <&vreg_l6c_1p8>;
552 no-sdio; 478 no-sdio;
553 no-mmc; 479 no-mmc;
554 status = "okay"; 480 status = "okay";
555 }; 481 };
556 482
557 &slpi { 483 &slpi {
558 status = "okay"; 484 status = "okay";
559 firmware-name = "qcom/sm8350/slpi.mbn" 485 firmware-name = "qcom/sm8350/slpi.mbn";
560 }; 486 };
561 487
562 &tlmm { 488 &tlmm {
563 gpio-reserved-ranges = <52 8>; 489 gpio-reserved-ranges = <52 8>;
564 490
565 gpio-line-names = 491 gpio-line-names =
566 "APPS_I2C_SDA", /* GPIO_0 */ 492 "APPS_I2C_SDA", /* GPIO_0 */
567 "APPS_I2C_SCL", 493 "APPS_I2C_SCL",
568 "FSA_INT_N", 494 "FSA_INT_N",
569 "USER_LED3_EN", 495 "USER_LED3_EN",
570 "SMBUS_SDA_1P8", 496 "SMBUS_SDA_1P8",
571 "SMBUS_SCL_1P8", 497 "SMBUS_SCL_1P8",
572 "2M2_3P3_EN", 498 "2M2_3P3_EN",
573 "ALERT_DUAL_M2_N", 499 "ALERT_DUAL_M2_N",
574 "EXP_UART_CTS", 500 "EXP_UART_CTS",
575 "EXP_UART_RFR", 501 "EXP_UART_RFR",
576 "EXP_UART_TX", /* GPIO_10 */ 502 "EXP_UART_TX", /* GPIO_10 */
577 "EXP_UART_RX", 503 "EXP_UART_RX",
578 "NC", 504 "NC",
579 "NC", 505 "NC",
580 "RCM_MARKER1", 506 "RCM_MARKER1",
581 "WSA0_EN", 507 "WSA0_EN",
582 "CAM1_RESET_N", 508 "CAM1_RESET_N",
583 "CAM0_RESET_N", 509 "CAM0_RESET_N",
584 "DEBUG_UART_TX", 510 "DEBUG_UART_TX",
585 "DEBUG_UART_RX", 511 "DEBUG_UART_RX",
586 "TS_I2C_SDA", /* GPIO_20 */ 512 "TS_I2C_SDA", /* GPIO_20 */
587 "TS_I2C_SCL", 513 "TS_I2C_SCL",
588 "TS_RESET_N", 514 "TS_RESET_N",
589 "TS_INT_N", 515 "TS_INT_N",
590 "DISP0_RESET_N", 516 "DISP0_RESET_N",
591 "DISP1_RESET_N", 517 "DISP1_RESET_N",
592 "ETH_RESET", 518 "ETH_RESET",
593 "RCM_MARKER2", 519 "RCM_MARKER2",
594 "CAM_DC_MIPI_MUX_EN", 520 "CAM_DC_MIPI_MUX_EN",
595 "CAM_DC_MIPI_MUX_SEL", 521 "CAM_DC_MIPI_MUX_SEL",
596 "AFC_PHY_TA_D_PLUS", /* GPIO_3 522 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */
597 "AFC_PHY_TA_D_MINUS", 523 "AFC_PHY_TA_D_MINUS",
598 "PM8008_1_IRQ", 524 "PM8008_1_IRQ",
599 "PM8008_1_RESET_N", 525 "PM8008_1_RESET_N",
600 "PM8008_2_IRQ", 526 "PM8008_2_IRQ",
601 "PM8008_2_RESET_N", 527 "PM8008_2_RESET_N",
602 "CAM_DC_I3C_SDA", 528 "CAM_DC_I3C_SDA",
603 "CAM_DC_I3C_SCL", 529 "CAM_DC_I3C_SCL",
604 "FP_INT_N", 530 "FP_INT_N",
605 "FP_WUHB_INT_N", 531 "FP_WUHB_INT_N",
606 "SMB_SPMI_DATA", /* GPIO_40 */ 532 "SMB_SPMI_DATA", /* GPIO_40 */
607 "SMB_SPMI_CLK", 533 "SMB_SPMI_CLK",
608 "USB_HUB_RESET", 534 "USB_HUB_RESET",
609 "FORCE_USB_BOOT", 535 "FORCE_USB_BOOT",
610 "LRF_IRQ", 536 "LRF_IRQ",
611 "NC", 537 "NC",
612 "IMU2_INT", 538 "IMU2_INT",
613 "HDMI_3P3_EN", 539 "HDMI_3P3_EN",
614 "HDMI_RSTN", 540 "HDMI_RSTN",
615 "HDMI_1P2_EN", 541 "HDMI_1P2_EN",
616 "HDMI_INT", /* GPIO_50 */ 542 "HDMI_INT", /* GPIO_50 */
617 "USB1_ID", 543 "USB1_ID",
618 "FP_SPI_MISO", 544 "FP_SPI_MISO",
619 "FP_SPI_MOSI", 545 "FP_SPI_MOSI",
620 "FP_SPI_CLK", 546 "FP_SPI_CLK",
621 "FP_SPI_CS_N", 547 "FP_SPI_CS_N",
622 "NFC_ESE_SPI_MISO", 548 "NFC_ESE_SPI_MISO",
623 "NFC_ESE_SPI_MOSI", 549 "NFC_ESE_SPI_MOSI",
624 "NFC_ESE_SPI_CLK", 550 "NFC_ESE_SPI_CLK",
625 "NFC_ESE_SPI_CS", 551 "NFC_ESE_SPI_CS",
626 "NFC_I2C_SDA", /* GPIO_60 */ 552 "NFC_I2C_SDA", /* GPIO_60 */
627 "NFC_I2C_SCLC", 553 "NFC_I2C_SCLC",
628 "NFC_EN", 554 "NFC_EN",
629 "NFC_CLK_REQ", 555 "NFC_CLK_REQ",
630 "HST_WLAN_EN", 556 "HST_WLAN_EN",
631 "HST_BT_EN", 557 "HST_BT_EN",
632 "HST_SW_CTRL", 558 "HST_SW_CTRL",
633 "NC", 559 "NC",
634 "HST_BT_UART_CTS", 560 "HST_BT_UART_CTS",
635 "HST_BT_UART_RFR", 561 "HST_BT_UART_RFR",
636 "HST_BT_UART_TX", /* GPIO_70 * 562 "HST_BT_UART_TX", /* GPIO_70 */
637 "HST_BT_UART_RX", 563 "HST_BT_UART_RX",
638 "CAM_DC_SPI0_MISO", 564 "CAM_DC_SPI0_MISO",
639 "CAM_DC_SPI0_MOSI", 565 "CAM_DC_SPI0_MOSI",
640 "CAM_DC_SPI0_CLK", 566 "CAM_DC_SPI0_CLK",
641 "CAM_DC_SPI0_CS_N", 567 "CAM_DC_SPI0_CS_N",
642 "CAM_DC_SPI1_MISO", 568 "CAM_DC_SPI1_MISO",
643 "CAM_DC_SPI1_MOSI", 569 "CAM_DC_SPI1_MOSI",
644 "CAM_DC_SPI1_CLK", 570 "CAM_DC_SPI1_CLK",
645 "CAM_DC_SPI1_CS_N", 571 "CAM_DC_SPI1_CS_N",
646 "HALL_INT_N", /* GPIO_80 */ 572 "HALL_INT_N", /* GPIO_80 */
647 "USB_PHY_PS", 573 "USB_PHY_PS",
648 "MDP_VSYNC_P", 574 "MDP_VSYNC_P",
649 "MDP_VSYNC_S", 575 "MDP_VSYNC_S",
650 "ETH_3P3_EN", 576 "ETH_3P3_EN",
651 "RADAR_INT", 577 "RADAR_INT",
652 "NFC_DWL_REQ", 578 "NFC_DWL_REQ",
653 "SM_GPIO_87", 579 "SM_GPIO_87",
654 "WCD_RESET_N", 580 "WCD_RESET_N",
655 "ALSP_INT_N", 581 "ALSP_INT_N",
656 "PRESS_INT", /* GPIO_90 */ 582 "PRESS_INT", /* GPIO_90 */
657 "SAR_INT_N", 583 "SAR_INT_N",
658 "SD_CARD_DET_N", 584 "SD_CARD_DET_N",
659 "NC", 585 "NC",
660 "PCIE0_RESET_N", 586 "PCIE0_RESET_N",
661 "PCIE0_CLK_REQ_N", 587 "PCIE0_CLK_REQ_N",
662 "PCIE0_WAKE_N", 588 "PCIE0_WAKE_N",
663 "PCIE1_RESET_N", 589 "PCIE1_RESET_N",
664 "PCIE1_CLK_REQ_N", 590 "PCIE1_CLK_REQ_N",
665 "PCIE1_WAKE_N", 591 "PCIE1_WAKE_N",
666 "CAM_MCLK0", /* GPIO_100 */ 592 "CAM_MCLK0", /* GPIO_100 */
667 "CAM_MCLK1", 593 "CAM_MCLK1",
668 "CAM_MCLK2", 594 "CAM_MCLK2",
669 "CAM_MCLK3", 595 "CAM_MCLK3",
670 "CAM_MCLK4", 596 "CAM_MCLK4",
671 "CAM_MCLK5", 597 "CAM_MCLK5",
672 "CAM2_RESET_N", 598 "CAM2_RESET_N",
673 "CCI_I2C0_SDA", 599 "CCI_I2C0_SDA",
674 "CCI_I2C0_SCL", 600 "CCI_I2C0_SCL",
675 "CCI_I2C1_SDA", 601 "CCI_I2C1_SDA",
676 "CCI_I2C1_SCL", /* GPIO_110 */ 602 "CCI_I2C1_SCL", /* GPIO_110 */
677 "CCI_I2C2_SDA", 603 "CCI_I2C2_SDA",
678 "CCI_I2C2_SCL", 604 "CCI_I2C2_SCL",
679 "CCI_I2C3_SDA", 605 "CCI_I2C3_SDA",
680 "CCI_I2C3_SCL", 606 "CCI_I2C3_SCL",
681 "CAM5_RESET_N", 607 "CAM5_RESET_N",
682 "CAM4_RESET_N", 608 "CAM4_RESET_N",
683 "CAM3_RESET_N", 609 "CAM3_RESET_N",
684 "IMU1_INT", 610 "IMU1_INT",
685 "MAG_INT_N", 611 "MAG_INT_N",
686 "MI2S2_I2S_SCK", /* GPIO_120 * 612 "MI2S2_I2S_SCK", /* GPIO_120 */
687 "MI2S2_I2S_DAT0", 613 "MI2S2_I2S_DAT0",
688 "MI2S2_I2S_WS", 614 "MI2S2_I2S_WS",
689 "HIFI_DAC_I2S_MCLK", 615 "HIFI_DAC_I2S_MCLK",
690 "MI2S2_I2S_DAT1", 616 "MI2S2_I2S_DAT1",
691 "HIFI_DAC_I2S_SCK", 617 "HIFI_DAC_I2S_SCK",
692 "HIFI_DAC_I2S_DAT0", 618 "HIFI_DAC_I2S_DAT0",
693 "NC", 619 "NC",
694 "HIFI_DAC_I2S_WS", 620 "HIFI_DAC_I2S_WS",
695 "HST_BT_WLAN_SLIMBUS_CLK", 621 "HST_BT_WLAN_SLIMBUS_CLK",
696 "HST_BT_WLAN_SLIMBUS_DAT0", /* 622 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */
697 "BT_LED_EN", 623 "BT_LED_EN",
698 "WLAN_LED_EN", 624 "WLAN_LED_EN",
699 "NC", 625 "NC",
700 "NC", 626 "NC",
701 "NC", 627 "NC",
702 "UIM2_PRESENT", 628 "UIM2_PRESENT",
703 "NC", 629 "NC",
704 "NC", 630 "NC",
705 "NC", 631 "NC",
706 "UIM1_PRESENT", /* GPIO_140 */ 632 "UIM1_PRESENT", /* GPIO_140 */
707 "NC", 633 "NC",
708 "SM_RFFE0_DATA", 634 "SM_RFFE0_DATA",
709 "NC", 635 "NC",
710 "SM_RFFE1_DATA", 636 "SM_RFFE1_DATA",
711 "SM_MSS_GRFC4", 637 "SM_MSS_GRFC4",
712 "SM_MSS_GRFC5", 638 "SM_MSS_GRFC5",
713 "SM_MSS_GRFC6", 639 "SM_MSS_GRFC6",
714 "SM_MSS_GRFC7", 640 "SM_MSS_GRFC7",
715 "SM_RFFE4_CLK", 641 "SM_RFFE4_CLK",
716 "SM_RFFE4_DATA", /* GPIO_150 * 642 "SM_RFFE4_DATA", /* GPIO_150 */
717 "WLAN_COEX_UART1_RX", 643 "WLAN_COEX_UART1_RX",
718 "WLAN_COEX_UART1_TX", 644 "WLAN_COEX_UART1_TX",
719 "HST_SW_CTRL", 645 "HST_SW_CTRL",
720 "DSI0_STATUS", 646 "DSI0_STATUS",
721 "DSI1_STATUS", 647 "DSI1_STATUS",
722 "APPS_PBL_BOOT_SPEED_1", 648 "APPS_PBL_BOOT_SPEED_1",
723 "APPS_BOOT_FROM_ROM", 649 "APPS_BOOT_FROM_ROM",
724 "APPS_PBL_BOOT_SPEED_0", 650 "APPS_PBL_BOOT_SPEED_0",
725 "QLINK0_REQ", 651 "QLINK0_REQ",
726 "QLINK0_EN", /* GPIO_160 */ 652 "QLINK0_EN", /* GPIO_160 */
727 "QLINK0_WMSS_RESET_N", 653 "QLINK0_WMSS_RESET_N",
728 "NC", 654 "NC",
729 "NC", 655 "NC",
730 "NC", 656 "NC",
731 "NC", 657 "NC",
732 "NC", 658 "NC",
733 "NC", 659 "NC",
734 "WCD_SWR_TX_CLK", 660 "WCD_SWR_TX_CLK",
735 "WCD_SWR_TX_DATA0", 661 "WCD_SWR_TX_DATA0",
736 "WCD_SWR_TX_DATA1", /* GPIO_17 662 "WCD_SWR_TX_DATA1", /* GPIO_170 */
737 "WCD_SWR_RX_CLK", 663 "WCD_SWR_RX_CLK",
738 "WCD_SWR_RX_DATA0", 664 "WCD_SWR_RX_DATA0",
739 "WCD_SWR_RX_DATA1", 665 "WCD_SWR_RX_DATA1",
740 "DMIC01_CLK", 666 "DMIC01_CLK",
741 "DMIC01_DATA", 667 "DMIC01_DATA",
742 "DMIC23_CLK", 668 "DMIC23_CLK",
743 "DMIC23_DATA", 669 "DMIC23_DATA",
744 "WSA_SWR_CLK", 670 "WSA_SWR_CLK",
745 "WSA_SWR_DATA", 671 "WSA_SWR_DATA",
746 "DMIC45_CLK", /* GPIO_180 */ 672 "DMIC45_CLK", /* GPIO_180 */
747 "DMIC45_DATA", 673 "DMIC45_DATA",
748 "WCD_SWR_TX_DATA2", 674 "WCD_SWR_TX_DATA2",
749 "SENSOR_I3C_SDA", 675 "SENSOR_I3C_SDA",
750 "SENSOR_I3C_SCL", 676 "SENSOR_I3C_SCL",
751 "CAM_OIS0_I3C_SDA", 677 "CAM_OIS0_I3C_SDA",
752 "CAM_OIS0_I3C_SCL", 678 "CAM_OIS0_I3C_SCL",
753 "IMU_SPI_MISO", 679 "IMU_SPI_MISO",
754 "IMU_SPI_MOSI", 680 "IMU_SPI_MOSI",
755 "IMU_SPI_CLK", 681 "IMU_SPI_CLK",
756 "IMU_SPI_CS_N", /* GPIO_190 */ 682 "IMU_SPI_CS_N", /* GPIO_190 */
757 "MAG_I2C_SDA", 683 "MAG_I2C_SDA",
758 "MAG_I2C_SCL", 684 "MAG_I2C_SCL",
759 "SENSOR_I2C_SDA", 685 "SENSOR_I2C_SDA",
760 "SENSOR_I2C_SCL", 686 "SENSOR_I2C_SCL",
761 "RADAR_SPI_MISO", 687 "RADAR_SPI_MISO",
762 "RADAR_SPI_MOSI", 688 "RADAR_SPI_MOSI",
763 "RADAR_SPI_CLK", 689 "RADAR_SPI_CLK",
764 "RADAR_SPI_CS_N", 690 "RADAR_SPI_CS_N",
765 "HST_BLE_UART_TX", 691 "HST_BLE_UART_TX",
766 "HST_BLE_UART_RX", /* GPIO_200 692 "HST_BLE_UART_RX", /* GPIO_200 */
767 "HST_WLAN_UART_TX", 693 "HST_WLAN_UART_TX",
768 "HST_WLAN_UART_RX"; 694 "HST_WLAN_UART_RX";
769 695
770 pcie0_default_state: pcie0-default-sta 696 pcie0_default_state: pcie0-default-state {
771 perst-pins { 697 perst-pins {
772 pins = "gpio94"; 698 pins = "gpio94";
773 function = "gpio"; 699 function = "gpio";
774 drive-strength = <2>; 700 drive-strength = <2>;
775 bias-pull-down; 701 bias-pull-down;
776 }; 702 };
777 703
778 clkreq-pins { 704 clkreq-pins {
779 pins = "gpio95"; 705 pins = "gpio95";
780 function = "pcie0_clkr 706 function = "pcie0_clkreqn";
781 drive-strength = <2>; 707 drive-strength = <2>;
782 bias-pull-up; 708 bias-pull-up;
783 }; 709 };
784 710
785 wake-pins { 711 wake-pins {
786 pins = "gpio96"; 712 pins = "gpio96";
787 function = "gpio"; 713 function = "gpio";
788 drive-strength = <2>; 714 drive-strength = <2>;
789 bias-pull-up; 715 bias-pull-up;
790 }; 716 };
791 }; 717 };
792 718
793 pcie1_default_state: pcie1-default-sta 719 pcie1_default_state: pcie1-default-state {
794 perst-pins { 720 perst-pins {
795 pins = "gpio97"; 721 pins = "gpio97";
796 function = "gpio"; 722 function = "gpio";
797 drive-strength = <2>; 723 drive-strength = <2>;
798 bias-pull-down; 724 bias-pull-down;
799 }; 725 };
800 726
801 clkreq-pins { 727 clkreq-pins {
802 pins = "gpio98"; 728 pins = "gpio98";
803 function = "pcie1_clkr 729 function = "pcie1_clkreqn";
804 drive-strength = <2>; 730 drive-strength = <2>;
805 bias-pull-up; 731 bias-pull-up;
806 }; 732 };
807 733
808 wake-pins { 734 wake-pins {
809 pins = "gpio99"; 735 pins = "gpio99";
810 function = "gpio"; 736 function = "gpio";
811 drive-strength = <2>; 737 drive-strength = <2>;
812 bias-pull-up; 738 bias-pull-up;
813 }; 739 };
814 }; 740 };
815 741
816 sdc2_card_det_n: sd-card-det-n-state { 742 sdc2_card_det_n: sd-card-det-n-state {
817 pins = "gpio92"; 743 pins = "gpio92";
818 function = "gpio"; 744 function = "gpio";
819 drive-strength = <2>; 745 drive-strength = <2>;
820 bias-pull-up; 746 bias-pull-up;
821 }; 747 };
822 }; 748 };
823 749
824 &uart2 { 750 &uart2 {
825 status = "okay"; 751 status = "okay";
826 }; 752 };
827 753
828 &ufs_mem_hc { 754 &ufs_mem_hc {
829 status = "okay"; 755 status = "okay";
830 756
831 reset-gpios = <&tlmm 203 GPIO_ACTIVE_L 757 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>;
832 758
833 vcc-supply = <&vreg_l7b_2p96>; 759 vcc-supply = <&vreg_l7b_2p96>;
834 vcc-max-microamp = <800000>; 760 vcc-max-microamp = <800000>;
835 vccq-supply = <&vreg_l9b_1p2>; 761 vccq-supply = <&vreg_l9b_1p2>;
836 vccq-max-microamp = <900000>; 762 vccq-max-microamp = <900000>;
837 vdd-hba-supply = <&vreg_l9b_1p2>; <<
838 }; 763 };
839 764
840 &ufs_mem_phy { 765 &ufs_mem_phy {
841 status = "okay"; 766 status = "okay";
842 767
843 vdda-phy-supply = <&vreg_l5b_0p88>; 768 vdda-phy-supply = <&vreg_l5b_0p88>;
844 vdda-pll-supply = <&vreg_l6b_1p2>; 769 vdda-pll-supply = <&vreg_l6b_1p2>;
845 }; 770 };
846 771
847 &usb_1 { 772 &usb_1 {
848 status = "okay"; 773 status = "okay";
849 }; 774 };
850 775
851 &usb_1_dwc3 { 776 &usb_1_dwc3 {
852 dr_mode = "otg"; 777 dr_mode = "otg";
853 usb-role-switch; 778 usb-role-switch;
854 }; 779 };
855 780
856 &usb_1_dwc3_hs { 781 &usb_1_dwc3_hs {
857 remote-endpoint = <&pmic_glink_hs_in>; 782 remote-endpoint = <&pmic_glink_hs_in>;
858 }; 783 };
859 784
>> 785 &usb_1_dwc3_ss {
>> 786 remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
>> 787 };
>> 788
860 &usb_1_hsphy { 789 &usb_1_hsphy {
861 status = "okay"; 790 status = "okay";
862 791
863 vdda-pll-supply = <&vreg_l5b_0p88>; 792 vdda-pll-supply = <&vreg_l5b_0p88>;
864 vdda18-supply = <&vreg_l1c_1p8>; 793 vdda18-supply = <&vreg_l1c_1p8>;
865 vdda33-supply = <&vreg_l2b_3p07>; 794 vdda33-supply = <&vreg_l2b_3p07>;
866 }; 795 };
867 796
868 &usb_1_qmpphy { 797 &usb_1_qmpphy {
869 status = "okay"; 798 status = "okay";
870 799
871 vdda-phy-supply = <&vreg_l6b_1p2>; 800 vdda-phy-supply = <&vreg_l6b_1p2>;
872 vdda-pll-supply = <&vreg_l1b_0p88>; 801 vdda-pll-supply = <&vreg_l1b_0p88>;
>> 802
>> 803 orientation-switch;
>> 804 };
>> 805
>> 806 &usb_1_qmpphy_dp_in {
>> 807 remote-endpoint = <&mdss_dp0_out>;
873 }; 808 };
874 809
875 &usb_1_qmpphy_out { 810 &usb_1_qmpphy_out {
876 remote-endpoint = <&pmic_glink_ss_in>; 811 remote-endpoint = <&pmic_glink_ss_in>;
>> 812 };
>> 813
>> 814 &usb_1_qmpphy_usb_ss_in {
>> 815 remote-endpoint = <&usb_1_dwc3_ss>;
877 }; 816 };
878 817
879 &usb_2 { 818 &usb_2 {
880 status = "okay"; 819 status = "okay";
881 }; 820 };
882 821
883 &usb_2_dwc3 { 822 &usb_2_dwc3 {
884 dr_mode = "host"; 823 dr_mode = "host";
885 824
886 pinctrl-names = "default"; 825 pinctrl-names = "default";
887 pinctrl-0 = <&usb_hub_enabled_state>; 826 pinctrl-0 = <&usb_hub_enabled_state>;
888 }; 827 };
889 828
890 &usb_2_hsphy { 829 &usb_2_hsphy {
891 status = "okay"; 830 status = "okay";
892 831
893 vdda-pll-supply = <&vreg_l5b_0p88>; 832 vdda-pll-supply = <&vreg_l5b_0p88>;
894 vdda18-supply = <&vreg_l1c_1p8>; 833 vdda18-supply = <&vreg_l1c_1p8>;
895 vdda33-supply = <&vreg_l2b_3p07>; 834 vdda33-supply = <&vreg_l2b_3p07>;
896 }; 835 };
897 836
898 &usb_2_qmpphy { 837 &usb_2_qmpphy {
899 status = "okay"; 838 status = "okay";
900 839
901 vdda-phy-supply = <&vreg_l6b_1p2>; 840 vdda-phy-supply = <&vreg_l6b_1p2>;
902 vdda-pll-supply = <&vreg_l5b_0p88>; 841 vdda-pll-supply = <&vreg_l5b_0p88>;
903 }; 842 };
904 843
905 /* PINCTRL - additions to nodes defined in sm8 844 /* PINCTRL - additions to nodes defined in sm8350.dtsi */
906 845
907 &tlmm { 846 &tlmm {
908 usb_hub_enabled_state: usb-hub-enabled 847 usb_hub_enabled_state: usb-hub-enabled-state {
909 pins = "gpio42"; 848 pins = "gpio42";
910 function = "gpio"; 849 function = "gpio";
911 850
912 drive-strength = <2>; 851 drive-strength = <2>;
913 output-low; 852 output-low;
914 }; 853 };
915 854
916 lt9611_state: lt9611-state { 855 lt9611_state: lt9611-state {
917 rst-pins { 856 rst-pins {
918 pins = "gpio48"; 857 pins = "gpio48";
919 function = "gpio"; 858 function = "gpio";
920 859
921 output-high; 860 output-high;
922 input-disable; 861 input-disable;
923 }; 862 };
924 863
925 irq-pins { 864 irq-pins {
926 pins = "gpio50"; 865 pins = "gpio50";
927 function = "gpio"; 866 function = "gpio";
928 bias-disable; 867 bias-disable;
929 }; 868 };
930 }; 869 };
931 }; 870 };
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