1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2020-2021, Linaro Limited 3 * Copyright (c) 2020-2021, Linaro Limited
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/regulator/qcom,rpmh-regu 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include "sm8350.dtsi" 9 #include "sm8350.dtsi"
10 #include "pm8350.dtsi" 10 #include "pm8350.dtsi"
11 #include "pm8350b.dtsi" 11 #include "pm8350b.dtsi"
12 #include "pm8350c.dtsi" 12 #include "pm8350c.dtsi"
13 #include "pmk8350.dtsi" 13 #include "pmk8350.dtsi"
14 #include "pmr735a.dtsi" 14 #include "pmr735a.dtsi"
15 #include "pmr735b.dtsi" 15 #include "pmr735b.dtsi"
16 16
17 / { 17 / {
18 model = "Qualcomm Technologies, Inc. S 18 model = "Qualcomm Technologies, Inc. SM8350 HDK";
19 compatible = "qcom,sm8350-hdk", "qcom, 19 compatible = "qcom,sm8350-hdk", "qcom,sm8350";
20 chassis-type = "embedded"; 20 chassis-type = "embedded";
21 21
22 aliases { 22 aliases {
23 serial0 = &uart2; 23 serial0 = &uart2;
24 }; 24 };
25 25
26 chosen { 26 chosen {
27 stdout-path = "serial0:115200n 27 stdout-path = "serial0:115200n8";
28 }; 28 };
29 29
30 hdmi-connector { 30 hdmi-connector {
31 compatible = "hdmi-connector"; 31 compatible = "hdmi-connector";
32 type = "a"; 32 type = "a";
33 33
34 port { 34 port {
35 hdmi_con: endpoint { 35 hdmi_con: endpoint {
36 remote-endpoin 36 remote-endpoint = <<9611_out>;
37 }; 37 };
38 }; 38 };
39 }; 39 };
40 40
41 pmic-glink { 41 pmic-glink {
42 compatible = "qcom,sm8350-pmic 42 compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink";
43 #address-cells = <1>; 43 #address-cells = <1>;
44 #size-cells = <0>; 44 #size-cells = <0>;
45 orientation-gpios = <&tlmm 81 45 orientation-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
46 46
47 connector@0 { 47 connector@0 {
48 compatible = "usb-c-co 48 compatible = "usb-c-connector";
49 reg = <0>; 49 reg = <0>;
50 power-role = "dual"; 50 power-role = "dual";
51 data-role = "dual"; 51 data-role = "dual";
52 52
53 ports { 53 ports {
54 #address-cells 54 #address-cells = <1>;
55 #size-cells = 55 #size-cells = <0>;
56 56
57 port@0 { 57 port@0 {
58 reg = 58 reg = <0>;
59 59
60 pmic_g 60 pmic_glink_hs_in: endpoint {
61 61 remote-endpoint = <&usb_1_dwc3_hs>;
62 }; 62 };
63 }; 63 };
64 64
65 port@1 { 65 port@1 {
66 reg = 66 reg = <1>;
67 67
68 pmic_g 68 pmic_glink_ss_in: endpoint {
69 69 remote-endpoint = <&usb_1_qmpphy_out>;
70 }; 70 };
71 }; 71 };
72 72
73 port@2 { 73 port@2 {
74 reg = 74 reg = <2>;
75 75
76 pmic_g 76 pmic_glink_sbu: endpoint {
77 77 remote-endpoint = <&fsa4480_sbu_mux>;
78 }; 78 };
79 }; 79 };
80 }; 80 };
81 }; 81 };
82 }; 82 };
83 83
84 vph_pwr: vph-pwr-regulator { 84 vph_pwr: vph-pwr-regulator {
85 compatible = "regulator-fixed" 85 compatible = "regulator-fixed";
86 regulator-name = "vph_pwr"; 86 regulator-name = "vph_pwr";
87 regulator-min-microvolt = <370 87 regulator-min-microvolt = <3700000>;
88 regulator-max-microvolt = <370 88 regulator-max-microvolt = <3700000>;
89 89
90 regulator-always-on; 90 regulator-always-on;
91 regulator-boot-on; 91 regulator-boot-on;
92 }; 92 };
93 93
94 lt9611_1v2: lt9611-1v2-regulator { 94 lt9611_1v2: lt9611-1v2-regulator {
95 compatible = "regulator-fixed" 95 compatible = "regulator-fixed";
96 regulator-name = "LT9611_1V2"; 96 regulator-name = "LT9611_1V2";
97 97
98 vin-supply = <&vph_pwr>; 98 vin-supply = <&vph_pwr>;
99 regulator-min-microvolt = <120 99 regulator-min-microvolt = <1200000>;
100 regulator-max-microvolt = <120 100 regulator-max-microvolt = <1200000>;
101 gpio = <&tlmm 49 GPIO_ACTIVE_H 101 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>;
102 enable-active-high; 102 enable-active-high;
103 regulator-boot-on; 103 regulator-boot-on;
104 }; 104 };
105 105
106 lt9611_3v3: lt9611-3v3-regulator { 106 lt9611_3v3: lt9611-3v3-regulator {
107 compatible = "regulator-fixed" 107 compatible = "regulator-fixed";
108 regulator-name = "LT9611_3V3"; 108 regulator-name = "LT9611_3V3";
109 109
110 vin-supply = <&vreg_bob>; 110 vin-supply = <&vreg_bob>;
111 gpio = <&tlmm 47 GPIO_ACTIVE_H 111 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
112 regulator-min-microvolt = <330 112 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <330 113 regulator-max-microvolt = <3300000>;
114 enable-active-high; 114 enable-active-high;
115 regulator-boot-on; 115 regulator-boot-on;
116 regulator-always-on; 116 regulator-always-on;
117 }; 117 };
118 }; 118 };
119 119
120 &adsp { 120 &adsp {
121 status = "okay"; 121 status = "okay";
122 firmware-name = "qcom/sm8350/adsp.mbn" 122 firmware-name = "qcom/sm8350/adsp.mbn";
123 }; 123 };
124 124
125 &apps_rsc { 125 &apps_rsc {
126 regulators-0 { 126 regulators-0 {
127 compatible = "qcom,pm8350-rpmh 127 compatible = "qcom,pm8350-rpmh-regulators";
128 qcom,pmic-id = "b"; 128 qcom,pmic-id = "b";
129 129
130 vdd-s1-supply = <&vph_pwr>; 130 vdd-s1-supply = <&vph_pwr>;
131 vdd-s2-supply = <&vph_pwr>; 131 vdd-s2-supply = <&vph_pwr>;
132 vdd-s3-supply = <&vph_pwr>; 132 vdd-s3-supply = <&vph_pwr>;
133 vdd-s4-supply = <&vph_pwr>; 133 vdd-s4-supply = <&vph_pwr>;
134 vdd-s5-supply = <&vph_pwr>; 134 vdd-s5-supply = <&vph_pwr>;
135 vdd-s6-supply = <&vph_pwr>; 135 vdd-s6-supply = <&vph_pwr>;
136 vdd-s7-supply = <&vph_pwr>; 136 vdd-s7-supply = <&vph_pwr>;
137 vdd-s8-supply = <&vph_pwr>; 137 vdd-s8-supply = <&vph_pwr>;
138 vdd-s9-supply = <&vph_pwr>; 138 vdd-s9-supply = <&vph_pwr>;
139 vdd-s10-supply = <&vph_pwr>; 139 vdd-s10-supply = <&vph_pwr>;
140 vdd-s11-supply = <&vph_pwr>; 140 vdd-s11-supply = <&vph_pwr>;
141 vdd-s12-supply = <&vph_pwr>; 141 vdd-s12-supply = <&vph_pwr>;
142 142
143 vdd-l1-l4-supply = <&vreg_s11b 143 vdd-l1-l4-supply = <&vreg_s11b_0p95>;
144 vdd-l2-l7-supply = <&vreg_bob> 144 vdd-l2-l7-supply = <&vreg_bob>;
145 vdd-l3-l5-supply = <&vreg_bob> 145 vdd-l3-l5-supply = <&vreg_bob>;
146 vdd-l6-l9-l10-supply = <&vreg_ 146 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>;
147 147
148 vreg_s10b_1p8: smps10 { 148 vreg_s10b_1p8: smps10 {
149 regulator-name = "vreg 149 regulator-name = "vreg_s10b_1p8";
150 regulator-min-microvol 150 regulator-min-microvolt = <1800000>;
151 regulator-max-microvol 151 regulator-max-microvolt = <1800000>;
152 regulator-initial-mode 152 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153 }; 153 };
154 154
155 vreg_s11b_0p95: smps11 { 155 vreg_s11b_0p95: smps11 {
156 regulator-name = "vreg 156 regulator-name = "vreg_s11b_0p95";
157 regulator-min-microvol 157 regulator-min-microvolt = <952000>;
158 regulator-max-microvol 158 regulator-max-microvolt = <952000>;
159 regulator-initial-mode 159 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
160 }; 160 };
161 161
162 vreg_s12b_1p25: smps12 { 162 vreg_s12b_1p25: smps12 {
163 regulator-name = "vreg 163 regulator-name = "vreg_s12b_1p25";
164 regulator-min-microvol 164 regulator-min-microvolt = <1256000>;
165 regulator-max-microvol 165 regulator-max-microvolt = <1256000>;
166 regulator-initial-mode 166 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
167 }; 167 };
168 168
169 vreg_l1b_0p88: ldo1 { 169 vreg_l1b_0p88: ldo1 {
170 regulator-name = "vreg 170 regulator-name = "vreg_l1b_0p88";
171 regulator-min-microvol 171 regulator-min-microvolt = <912000>;
172 regulator-max-microvol 172 regulator-max-microvolt = <920000>;
173 regulator-initial-mode 173 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
174 }; 174 };
175 175
176 vreg_l2b_3p07: ldo2 { 176 vreg_l2b_3p07: ldo2 {
177 regulator-name = "vreg 177 regulator-name = "vreg_l2b_3p07";
178 regulator-min-microvol 178 regulator-min-microvolt = <3072000>;
179 regulator-max-microvol 179 regulator-max-microvolt = <3072000>;
180 regulator-initial-mode 180 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
181 }; 181 };
182 182
183 vreg_l3b_0p9: ldo3 { 183 vreg_l3b_0p9: ldo3 {
184 regulator-name = "vreg 184 regulator-name = "vreg_l3b_0p9";
185 regulator-min-microvol 185 regulator-min-microvolt = <904000>;
186 regulator-max-microvol 186 regulator-max-microvolt = <904000>;
187 regulator-initial-mode 187 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
188 }; 188 };
189 189
190 vreg_l5b_0p88: ldo5 { 190 vreg_l5b_0p88: ldo5 {
191 regulator-name = "vreg 191 regulator-name = "vreg_l5b_0p88";
192 regulator-min-microvol 192 regulator-min-microvolt = <880000>;
193 regulator-max-microvol 193 regulator-max-microvolt = <888000>;
194 regulator-initial-mode 194 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
195 regulator-allow-set-lo 195 regulator-allow-set-load;
196 regulator-allowed-mode 196 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
197 197 RPMH_REGULATOR_MODE_HPM>;
198 }; 198 };
199 199
200 vreg_l6b_1p2: ldo6 { 200 vreg_l6b_1p2: ldo6 {
201 regulator-name = "vreg 201 regulator-name = "vreg_l6b_1p2";
202 regulator-min-microvol 202 regulator-min-microvolt = <1200000>;
203 regulator-max-microvol 203 regulator-max-microvolt = <1208000>;
204 regulator-initial-mode 204 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
205 regulator-allow-set-lo 205 regulator-allow-set-load;
206 regulator-allowed-mode 206 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
207 207 RPMH_REGULATOR_MODE_HPM>;
208 }; 208 };
209 209
210 vreg_l7b_2p96: ldo7 { 210 vreg_l7b_2p96: ldo7 {
211 regulator-name = "vreg 211 regulator-name = "vreg_l7b_2p96";
212 regulator-min-microvol 212 regulator-min-microvolt = <2504000>;
213 regulator-max-microvol 213 regulator-max-microvolt = <2504000>;
214 regulator-initial-mode 214 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
215 regulator-allow-set-lo 215 regulator-allow-set-load;
216 regulator-allowed-mode 216 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
217 217 RPMH_REGULATOR_MODE_HPM>;
218 }; 218 };
219 219
220 vreg_l9b_1p2: ldo9 { 220 vreg_l9b_1p2: ldo9 {
221 regulator-name = "vreg 221 regulator-name = "vreg_l9b_1p2";
222 regulator-min-microvol 222 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 223 regulator-max-microvolt = <1200000>;
224 regulator-initial-mode 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 regulator-allow-set-lo 225 regulator-allow-set-load;
226 regulator-allowed-mode 226 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
227 227 RPMH_REGULATOR_MODE_HPM>;
228 }; 228 };
229 }; 229 };
230 230
231 regulators-1 { 231 regulators-1 {
232 compatible = "qcom,pm8350c-rpm 232 compatible = "qcom,pm8350c-rpmh-regulators";
233 qcom,pmic-id = "c"; 233 qcom,pmic-id = "c";
234 234
235 vdd-s1-supply = <&vph_pwr>; 235 vdd-s1-supply = <&vph_pwr>;
236 vdd-s2-supply = <&vph_pwr>; 236 vdd-s2-supply = <&vph_pwr>;
237 vdd-s3-supply = <&vph_pwr>; 237 vdd-s3-supply = <&vph_pwr>;
238 vdd-s4-supply = <&vph_pwr>; 238 vdd-s4-supply = <&vph_pwr>;
239 vdd-s5-supply = <&vph_pwr>; 239 vdd-s5-supply = <&vph_pwr>;
240 vdd-s6-supply = <&vph_pwr>; 240 vdd-s6-supply = <&vph_pwr>;
241 vdd-s7-supply = <&vph_pwr>; 241 vdd-s7-supply = <&vph_pwr>;
242 vdd-s8-supply = <&vph_pwr>; 242 vdd-s8-supply = <&vph_pwr>;
243 vdd-s9-supply = <&vph_pwr>; 243 vdd-s9-supply = <&vph_pwr>;
244 vdd-s10-supply = <&vph_pwr>; 244 vdd-s10-supply = <&vph_pwr>;
245 245
246 vdd-l1-l12-supply = <&vreg_s1c 246 vdd-l1-l12-supply = <&vreg_s1c_1p86>;
247 vdd-l2-l8-supply = <&vreg_s1c_ 247 vdd-l2-l8-supply = <&vreg_s1c_1p86>;
248 vdd-l3-l4-l5-l7-l13-supply = < 248 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
249 vdd-l6-l9-l11-supply = <&vreg_ 249 vdd-l6-l9-l11-supply = <&vreg_bob>;
250 vdd-l10-supply = <&vreg_s12b_1 250 vdd-l10-supply = <&vreg_s12b_1p25>;
251 251
252 vdd-bob-supply = <&vph_pwr>; 252 vdd-bob-supply = <&vph_pwr>;
253 253
254 vreg_s1c_1p86: smps1 { 254 vreg_s1c_1p86: smps1 {
255 regulator-name = "vreg 255 regulator-name = "vreg_s1c_1p86";
256 regulator-min-microvol 256 regulator-min-microvolt = <1856000>;
257 regulator-max-microvol 257 regulator-max-microvolt = <1880000>;
258 regulator-initial-mode 258 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259 }; 259 };
260 260
261 vreg_bob: bob { 261 vreg_bob: bob {
262 regulator-name = "vreg 262 regulator-name = "vreg_bob";
263 regulator-min-microvol 263 regulator-min-microvolt = <3008000>;
264 regulator-max-microvol 264 regulator-max-microvolt = <3960000>;
265 regulator-initial-mode 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
266 }; 266 };
267 267
268 vreg_l1c_1p8: ldo1 { 268 vreg_l1c_1p8: ldo1 {
269 regulator-name = "vreg 269 regulator-name = "vreg_l1c_1p8";
270 regulator-min-microvol 270 regulator-min-microvolt = <1800000>;
271 regulator-max-microvol 271 regulator-max-microvolt = <1800000>;
272 regulator-initial-mode 272 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273 }; 273 };
274 274
275 vreg_l2c_1p8: ldo2 { 275 vreg_l2c_1p8: ldo2 {
276 regulator-name = "vreg 276 regulator-name = "vreg_l2c_1p8";
277 regulator-min-microvol 277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvol 278 regulator-max-microvolt = <1800000>;
279 regulator-initial-mode 279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280 }; 280 };
281 281
282 vreg_l6c_1p8: ldo6 { 282 vreg_l6c_1p8: ldo6 {
283 regulator-name = "vreg 283 regulator-name = "vreg_l6c_1p8";
284 regulator-min-microvol 284 regulator-min-microvolt = <1800000>;
285 regulator-max-microvol 285 regulator-max-microvolt = <2960000>;
286 regulator-initial-mode 286 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 }; 287 };
288 288
289 vreg_l9c_2p96: ldo9 { 289 vreg_l9c_2p96: ldo9 {
290 regulator-name = "vreg 290 regulator-name = "vreg_l9c_2p96";
291 regulator-min-microvol 291 regulator-min-microvolt = <2960000>;
292 regulator-max-microvol 292 regulator-max-microvolt = <3008000>;
293 regulator-initial-mode 293 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
294 }; 294 };
295 295
296 vreg_l10c_1p2: ldo10 { 296 vreg_l10c_1p2: ldo10 {
297 regulator-name = "vreg 297 regulator-name = "vreg_l10c_1p2";
298 regulator-min-microvol 298 regulator-min-microvolt = <1200000>;
299 regulator-max-microvol 299 regulator-max-microvolt = <1200000>;
300 regulator-initial-mode 300 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
301 }; 301 };
302 }; 302 };
303 303
304 regulators-2 { 304 regulators-2 {
305 compatible = "qcom,pmr735a-rpm 305 compatible = "qcom,pmr735a-rpmh-regulators";
306 qcom,pmic-id = "e"; 306 qcom,pmic-id = "e";
307 307
308 vdd-s1-supply = <&vph_pwr>; 308 vdd-s1-supply = <&vph_pwr>;
309 vdd-s2-supply = <&vph_pwr>; 309 vdd-s2-supply = <&vph_pwr>;
310 vdd-s3-supply = <&vph_pwr>; 310 vdd-s3-supply = <&vph_pwr>;
311 311
312 vdd-l1-l2-supply = <&vreg_s2e_ 312 vdd-l1-l2-supply = <&vreg_s2e_0p85>;
313 vdd-l3-supply = <&vreg_s1e_1p2 313 vdd-l3-supply = <&vreg_s1e_1p25>;
314 vdd-l4-supply = <&vreg_s1c_1p8 314 vdd-l4-supply = <&vreg_s1c_1p86>;
315 vdd-l5-l6-supply = <&vreg_s1c_ 315 vdd-l5-l6-supply = <&vreg_s1c_1p86>;
316 vdd-l7-bob-supply = <&vreg_bob 316 vdd-l7-bob-supply = <&vreg_bob>;
317 317
318 vreg_s1e_1p25: smps1 { 318 vreg_s1e_1p25: smps1 {
319 regulator-name = "vreg 319 regulator-name = "vreg_s1e_1p25";
320 regulator-min-microvol 320 regulator-min-microvolt = <1200000>;
321 regulator-max-microvol 321 regulator-max-microvolt = <1280000>;
322 }; 322 };
323 323
324 vreg_s2e_0p85: smps2 { 324 vreg_s2e_0p85: smps2 {
325 regulator-name = "vreg 325 regulator-name = "vreg_s2e_0p85";
326 regulator-min-microvol 326 regulator-min-microvolt = <950000>;
327 regulator-max-microvol 327 regulator-max-microvolt = <976000>;
328 }; 328 };
329 329
330 vreg_s3e_2p20: smps3 { 330 vreg_s3e_2p20: smps3 {
331 regulator-name = "vreg 331 regulator-name = "vreg_s3e_2p20";
332 regulator-min-microvol 332 regulator-min-microvolt = <2200000>;
333 regulator-max-microvol 333 regulator-max-microvolt = <2352000>;
334 }; 334 };
335 335
336 vreg_l1e_0p9: ldo1 { 336 vreg_l1e_0p9: ldo1 {
337 regulator-name = "vreg 337 regulator-name = "vreg_l1e_0p9";
338 regulator-min-microvol 338 regulator-min-microvolt = <912000>;
339 regulator-max-microvol 339 regulator-max-microvolt = <912000>;
340 }; 340 };
341 341
342 vreg_l2e_1p2: ldo2 { 342 vreg_l2e_1p2: ldo2 {
343 regulator-name = "vreg 343 regulator-name = "vreg_l2e_0p8";
344 regulator-min-microvol 344 regulator-min-microvolt = <1200000>;
345 regulator-max-microvol 345 regulator-max-microvolt = <1200000>;
346 }; 346 };
347 347
348 vreg_l3e_1p2: ldo3 { 348 vreg_l3e_1p2: ldo3 {
349 regulator-name = "vreg 349 regulator-name = "vreg_l3e_1p2";
350 regulator-min-microvol 350 regulator-min-microvolt = <1200000>;
351 regulator-max-microvol 351 regulator-max-microvolt = <1200000>;
352 }; 352 };
353 353
354 vreg_l4e_1p7: ldo4 { 354 vreg_l4e_1p7: ldo4 {
355 regulator-name = "vreg 355 regulator-name = "vreg_l4e_1p7";
356 regulator-min-microvol 356 regulator-min-microvolt = <1776000>;
357 regulator-max-microvol 357 regulator-max-microvolt = <1872000>;
358 }; 358 };
359 359
360 vreg_l5e_0p8: ldo5 { 360 vreg_l5e_0p8: ldo5 {
361 regulator-name = "vreg 361 regulator-name = "vreg_l5e_0p8";
362 regulator-min-microvol 362 regulator-min-microvolt = <800000>;
363 regulator-max-microvol 363 regulator-max-microvolt = <800000>;
364 }; 364 };
365 365
366 vreg_l6e_0p8: ldo6 { 366 vreg_l6e_0p8: ldo6 {
367 regulator-name = "vreg 367 regulator-name = "vreg_l6e_0p8";
368 regulator-min-microvol 368 regulator-min-microvolt = <480000>;
369 regulator-max-microvol 369 regulator-max-microvolt = <904000>;
370 }; 370 };
371 371
372 vreg_l7e_2p8: ldo7 { 372 vreg_l7e_2p8: ldo7 {
373 regulator-name = "vreg 373 regulator-name = "vreg_l7e_2p8";
374 regulator-min-microvol 374 regulator-min-microvolt = <2800000>;
375 regulator-max-microvol 375 regulator-max-microvolt = <2800000>;
376 }; 376 };
377 }; 377 };
378 }; 378 };
379 379
380 &cdsp { 380 &cdsp {
381 status = "okay"; 381 status = "okay";
382 firmware-name = "qcom/sm8350/cdsp.mbn" 382 firmware-name = "qcom/sm8350/cdsp.mbn";
383 }; 383 };
384 384
385 &dispcc { 385 &dispcc {
386 status = "okay"; 386 status = "okay";
387 }; 387 };
388 388
389 &mdss_dsi0 { 389 &mdss_dsi0 {
390 vdda-supply = <&vreg_l6b_1p2>; 390 vdda-supply = <&vreg_l6b_1p2>;
391 status = "okay"; 391 status = "okay";
392 392
393 ports { 393 ports {
394 port@1 { 394 port@1 {
395 endpoint { 395 endpoint {
396 remote-endpoin 396 remote-endpoint = <<9611_a>;
397 data-lanes = < 397 data-lanes = <0 1 2 3>;
398 }; 398 };
399 }; 399 };
400 }; 400 };
401 }; 401 };
402 402
403 &mdss_dsi0_phy { 403 &mdss_dsi0_phy {
404 vdds-supply = <&vreg_l5b_0p88>; 404 vdds-supply = <&vreg_l5b_0p88>;
405 status = "okay"; 405 status = "okay";
406 }; 406 };
407 407
408 &gpi_dma1 { 408 &gpi_dma1 {
409 status = "okay"; 409 status = "okay";
410 }; 410 };
411 411
412 &gpu { 412 &gpu {
413 status = "okay"; 413 status = "okay";
414 414
415 zap-shader { 415 zap-shader {
416 firmware-name = "qcom/sm8350/a 416 firmware-name = "qcom/sm8350/a660_zap.mbn";
417 }; 417 };
418 }; 418 };
419 419
420 &i2c13 { 420 &i2c13 {
421 clock-frequency = <100000>; 421 clock-frequency = <100000>;
422 422
423 status = "okay"; 423 status = "okay";
424 424
425 typec-mux@42 { 425 typec-mux@42 {
426 compatible = "fcs,fsa4480"; 426 compatible = "fcs,fsa4480";
427 reg = <0x42>; 427 reg = <0x42>;
428 428
429 interrupts-extended = <&tlmm 2 429 interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
430 430
431 vcc-supply = <&vreg_bob>; 431 vcc-supply = <&vreg_bob>;
432 mode-switch; 432 mode-switch;
433 orientation-switch; 433 orientation-switch;
434 434
435 port { 435 port {
436 fsa4480_sbu_mux: endpo 436 fsa4480_sbu_mux: endpoint {
437 remote-endpoin 437 remote-endpoint = <&pmic_glink_sbu>;
438 }; 438 };
439 }; 439 };
440 }; 440 };
441 }; 441 };
442 442
443 &i2c15 { 443 &i2c15 {
444 clock-frequency = <400000>; 444 clock-frequency = <400000>;
445 status = "okay"; 445 status = "okay";
446 446
447 lt9611_codec: hdmi-bridge@2b { 447 lt9611_codec: hdmi-bridge@2b {
448 compatible = "lontium,lt9611ux 448 compatible = "lontium,lt9611uxc";
449 reg = <0x2b>; 449 reg = <0x2b>;
450 450
451 interrupts-extended = <&tlmm 5 451 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>;
452 reset-gpios = <&tlmm 48 GPIO_A 452 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
453 453
454 vdd-supply = <<9611_1v2>; 454 vdd-supply = <<9611_1v2>;
455 vcc-supply = <<9611_3v3>; 455 vcc-supply = <<9611_3v3>;
456 456
457 pinctrl-names = "default"; 457 pinctrl-names = "default";
458 pinctrl-0 = <<9611_state>; 458 pinctrl-0 = <<9611_state>;
459 459
460 ports { 460 ports {
461 #address-cells = <1>; 461 #address-cells = <1>;
462 #size-cells = <0>; 462 #size-cells = <0>;
463 463
464 port@0 { 464 port@0 {
465 reg = <0>; 465 reg = <0>;
466 466
467 lt9611_a: endp 467 lt9611_a: endpoint {
468 remote 468 remote-endpoint = <&mdss_dsi0_out>;
469 }; 469 };
470 }; 470 };
471 471
472 port@2 { 472 port@2 {
473 reg = <2>; 473 reg = <2>;
474 474
475 lt9611_out: en 475 lt9611_out: endpoint {
476 remote 476 remote-endpoint = <&hdmi_con>;
477 }; 477 };
478 }; 478 };
479 }; 479 };
480 }; 480 };
481 }; 481 };
482 482
483 &mdss { 483 &mdss {
484 status = "okay"; 484 status = "okay";
485 }; 485 };
486 486
487 &mdss_dp { 487 &mdss_dp {
488 status = "okay"; 488 status = "okay";
489 }; 489 };
490 490
491 &mdss_dp_out { 491 &mdss_dp_out {
492 data-lanes = <0 1>; 492 data-lanes = <0 1>;
493 }; 493 };
494 494
495 &mpss { 495 &mpss {
496 status = "okay"; 496 status = "okay";
497 firmware-name = "qcom/sm8350/modem.mbn 497 firmware-name = "qcom/sm8350/modem.mbn";
498 }; 498 };
499 499
500 &pcie0 { 500 &pcie0 {
501 pinctrl-names = "default"; 501 pinctrl-names = "default";
502 pinctrl-0 = <&pcie0_default_state>; 502 pinctrl-0 = <&pcie0_default_state>;
503 503
504 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LO 504 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
505 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIG 505 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
506 506
507 status = "okay"; 507 status = "okay";
508 }; 508 };
509 509
510 &pcie0_phy { 510 &pcie0_phy {
511 vdda-phy-supply = <&vreg_l5b_0p88>; 511 vdda-phy-supply = <&vreg_l5b_0p88>;
512 vdda-pll-supply = <&vreg_l6b_1p2>; 512 vdda-pll-supply = <&vreg_l6b_1p2>;
513 513
514 status = "okay"; 514 status = "okay";
515 }; 515 };
516 516
517 &pcie1 { 517 &pcie1 {
518 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LO 518 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
519 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIG 519 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
520 520
521 pinctrl-names = "default"; 521 pinctrl-names = "default";
522 pinctrl-0 = <&pcie1_default_state>; 522 pinctrl-0 = <&pcie1_default_state>;
523 523
524 status = "okay"; 524 status = "okay";
525 }; 525 };
526 526
527 &pcie1_phy { 527 &pcie1_phy {
528 status = "okay"; 528 status = "okay";
529 vdda-phy-supply = <&vreg_l5b_0p88>; 529 vdda-phy-supply = <&vreg_l5b_0p88>;
530 vdda-pll-supply = <&vreg_l6b_1p2>; 530 vdda-pll-supply = <&vreg_l6b_1p2>;
531 }; 531 };
532 532
533 &qupv3_id_0 { 533 &qupv3_id_0 {
534 status = "okay"; 534 status = "okay";
535 }; 535 };
536 536
537 &qupv3_id_1 { 537 &qupv3_id_1 {
538 status = "okay"; 538 status = "okay";
539 }; 539 };
540 540
541 &qupv3_id_2 { 541 &qupv3_id_2 {
542 status = "okay"; 542 status = "okay";
543 }; 543 };
544 544
545 &sdhc_2 { 545 &sdhc_2 {
546 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH> 546 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
547 pinctrl-names = "default", "sleep"; 547 pinctrl-names = "default", "sleep";
548 pinctrl-0 = <&sdc2_default_state &sdc2 548 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
549 pinctrl-1 = <&sdc2_sleep_state &sdc2_c 549 pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
550 vmmc-supply = <&vreg_l9c_2p96>; 550 vmmc-supply = <&vreg_l9c_2p96>;
551 vqmmc-supply = <&vreg_l6c_1p8>; 551 vqmmc-supply = <&vreg_l6c_1p8>;
552 no-sdio; 552 no-sdio;
553 no-mmc; 553 no-mmc;
554 status = "okay"; 554 status = "okay";
555 }; 555 };
556 556
557 &slpi { 557 &slpi {
558 status = "okay"; 558 status = "okay";
559 firmware-name = "qcom/sm8350/slpi.mbn" 559 firmware-name = "qcom/sm8350/slpi.mbn";
560 }; 560 };
561 561
562 &tlmm { 562 &tlmm {
563 gpio-reserved-ranges = <52 8>; 563 gpio-reserved-ranges = <52 8>;
564 564
565 gpio-line-names = 565 gpio-line-names =
566 "APPS_I2C_SDA", /* GPIO_0 */ 566 "APPS_I2C_SDA", /* GPIO_0 */
567 "APPS_I2C_SCL", 567 "APPS_I2C_SCL",
568 "FSA_INT_N", 568 "FSA_INT_N",
569 "USER_LED3_EN", 569 "USER_LED3_EN",
570 "SMBUS_SDA_1P8", 570 "SMBUS_SDA_1P8",
571 "SMBUS_SCL_1P8", 571 "SMBUS_SCL_1P8",
572 "2M2_3P3_EN", 572 "2M2_3P3_EN",
573 "ALERT_DUAL_M2_N", 573 "ALERT_DUAL_M2_N",
574 "EXP_UART_CTS", 574 "EXP_UART_CTS",
575 "EXP_UART_RFR", 575 "EXP_UART_RFR",
576 "EXP_UART_TX", /* GPIO_10 */ 576 "EXP_UART_TX", /* GPIO_10 */
577 "EXP_UART_RX", 577 "EXP_UART_RX",
578 "NC", 578 "NC",
579 "NC", 579 "NC",
580 "RCM_MARKER1", 580 "RCM_MARKER1",
581 "WSA0_EN", 581 "WSA0_EN",
582 "CAM1_RESET_N", 582 "CAM1_RESET_N",
583 "CAM0_RESET_N", 583 "CAM0_RESET_N",
584 "DEBUG_UART_TX", 584 "DEBUG_UART_TX",
585 "DEBUG_UART_RX", 585 "DEBUG_UART_RX",
586 "TS_I2C_SDA", /* GPIO_20 */ 586 "TS_I2C_SDA", /* GPIO_20 */
587 "TS_I2C_SCL", 587 "TS_I2C_SCL",
588 "TS_RESET_N", 588 "TS_RESET_N",
589 "TS_INT_N", 589 "TS_INT_N",
590 "DISP0_RESET_N", 590 "DISP0_RESET_N",
591 "DISP1_RESET_N", 591 "DISP1_RESET_N",
592 "ETH_RESET", 592 "ETH_RESET",
593 "RCM_MARKER2", 593 "RCM_MARKER2",
594 "CAM_DC_MIPI_MUX_EN", 594 "CAM_DC_MIPI_MUX_EN",
595 "CAM_DC_MIPI_MUX_SEL", 595 "CAM_DC_MIPI_MUX_SEL",
596 "AFC_PHY_TA_D_PLUS", /* GPIO_3 596 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */
597 "AFC_PHY_TA_D_MINUS", 597 "AFC_PHY_TA_D_MINUS",
598 "PM8008_1_IRQ", 598 "PM8008_1_IRQ",
599 "PM8008_1_RESET_N", 599 "PM8008_1_RESET_N",
600 "PM8008_2_IRQ", 600 "PM8008_2_IRQ",
601 "PM8008_2_RESET_N", 601 "PM8008_2_RESET_N",
602 "CAM_DC_I3C_SDA", 602 "CAM_DC_I3C_SDA",
603 "CAM_DC_I3C_SCL", 603 "CAM_DC_I3C_SCL",
604 "FP_INT_N", 604 "FP_INT_N",
605 "FP_WUHB_INT_N", 605 "FP_WUHB_INT_N",
606 "SMB_SPMI_DATA", /* GPIO_40 */ 606 "SMB_SPMI_DATA", /* GPIO_40 */
607 "SMB_SPMI_CLK", 607 "SMB_SPMI_CLK",
608 "USB_HUB_RESET", 608 "USB_HUB_RESET",
609 "FORCE_USB_BOOT", 609 "FORCE_USB_BOOT",
610 "LRF_IRQ", 610 "LRF_IRQ",
611 "NC", 611 "NC",
612 "IMU2_INT", 612 "IMU2_INT",
613 "HDMI_3P3_EN", 613 "HDMI_3P3_EN",
614 "HDMI_RSTN", 614 "HDMI_RSTN",
615 "HDMI_1P2_EN", 615 "HDMI_1P2_EN",
616 "HDMI_INT", /* GPIO_50 */ 616 "HDMI_INT", /* GPIO_50 */
617 "USB1_ID", 617 "USB1_ID",
618 "FP_SPI_MISO", 618 "FP_SPI_MISO",
619 "FP_SPI_MOSI", 619 "FP_SPI_MOSI",
620 "FP_SPI_CLK", 620 "FP_SPI_CLK",
621 "FP_SPI_CS_N", 621 "FP_SPI_CS_N",
622 "NFC_ESE_SPI_MISO", 622 "NFC_ESE_SPI_MISO",
623 "NFC_ESE_SPI_MOSI", 623 "NFC_ESE_SPI_MOSI",
624 "NFC_ESE_SPI_CLK", 624 "NFC_ESE_SPI_CLK",
625 "NFC_ESE_SPI_CS", 625 "NFC_ESE_SPI_CS",
626 "NFC_I2C_SDA", /* GPIO_60 */ 626 "NFC_I2C_SDA", /* GPIO_60 */
627 "NFC_I2C_SCLC", 627 "NFC_I2C_SCLC",
628 "NFC_EN", 628 "NFC_EN",
629 "NFC_CLK_REQ", 629 "NFC_CLK_REQ",
630 "HST_WLAN_EN", 630 "HST_WLAN_EN",
631 "HST_BT_EN", 631 "HST_BT_EN",
632 "HST_SW_CTRL", 632 "HST_SW_CTRL",
633 "NC", 633 "NC",
634 "HST_BT_UART_CTS", 634 "HST_BT_UART_CTS",
635 "HST_BT_UART_RFR", 635 "HST_BT_UART_RFR",
636 "HST_BT_UART_TX", /* GPIO_70 * 636 "HST_BT_UART_TX", /* GPIO_70 */
637 "HST_BT_UART_RX", 637 "HST_BT_UART_RX",
638 "CAM_DC_SPI0_MISO", 638 "CAM_DC_SPI0_MISO",
639 "CAM_DC_SPI0_MOSI", 639 "CAM_DC_SPI0_MOSI",
640 "CAM_DC_SPI0_CLK", 640 "CAM_DC_SPI0_CLK",
641 "CAM_DC_SPI0_CS_N", 641 "CAM_DC_SPI0_CS_N",
642 "CAM_DC_SPI1_MISO", 642 "CAM_DC_SPI1_MISO",
643 "CAM_DC_SPI1_MOSI", 643 "CAM_DC_SPI1_MOSI",
644 "CAM_DC_SPI1_CLK", 644 "CAM_DC_SPI1_CLK",
645 "CAM_DC_SPI1_CS_N", 645 "CAM_DC_SPI1_CS_N",
646 "HALL_INT_N", /* GPIO_80 */ 646 "HALL_INT_N", /* GPIO_80 */
647 "USB_PHY_PS", 647 "USB_PHY_PS",
648 "MDP_VSYNC_P", 648 "MDP_VSYNC_P",
649 "MDP_VSYNC_S", 649 "MDP_VSYNC_S",
650 "ETH_3P3_EN", 650 "ETH_3P3_EN",
651 "RADAR_INT", 651 "RADAR_INT",
652 "NFC_DWL_REQ", 652 "NFC_DWL_REQ",
653 "SM_GPIO_87", 653 "SM_GPIO_87",
654 "WCD_RESET_N", 654 "WCD_RESET_N",
655 "ALSP_INT_N", 655 "ALSP_INT_N",
656 "PRESS_INT", /* GPIO_90 */ 656 "PRESS_INT", /* GPIO_90 */
657 "SAR_INT_N", 657 "SAR_INT_N",
658 "SD_CARD_DET_N", 658 "SD_CARD_DET_N",
659 "NC", 659 "NC",
660 "PCIE0_RESET_N", 660 "PCIE0_RESET_N",
661 "PCIE0_CLK_REQ_N", 661 "PCIE0_CLK_REQ_N",
662 "PCIE0_WAKE_N", 662 "PCIE0_WAKE_N",
663 "PCIE1_RESET_N", 663 "PCIE1_RESET_N",
664 "PCIE1_CLK_REQ_N", 664 "PCIE1_CLK_REQ_N",
665 "PCIE1_WAKE_N", 665 "PCIE1_WAKE_N",
666 "CAM_MCLK0", /* GPIO_100 */ 666 "CAM_MCLK0", /* GPIO_100 */
667 "CAM_MCLK1", 667 "CAM_MCLK1",
668 "CAM_MCLK2", 668 "CAM_MCLK2",
669 "CAM_MCLK3", 669 "CAM_MCLK3",
670 "CAM_MCLK4", 670 "CAM_MCLK4",
671 "CAM_MCLK5", 671 "CAM_MCLK5",
672 "CAM2_RESET_N", 672 "CAM2_RESET_N",
673 "CCI_I2C0_SDA", 673 "CCI_I2C0_SDA",
674 "CCI_I2C0_SCL", 674 "CCI_I2C0_SCL",
675 "CCI_I2C1_SDA", 675 "CCI_I2C1_SDA",
676 "CCI_I2C1_SCL", /* GPIO_110 */ 676 "CCI_I2C1_SCL", /* GPIO_110 */
677 "CCI_I2C2_SDA", 677 "CCI_I2C2_SDA",
678 "CCI_I2C2_SCL", 678 "CCI_I2C2_SCL",
679 "CCI_I2C3_SDA", 679 "CCI_I2C3_SDA",
680 "CCI_I2C3_SCL", 680 "CCI_I2C3_SCL",
681 "CAM5_RESET_N", 681 "CAM5_RESET_N",
682 "CAM4_RESET_N", 682 "CAM4_RESET_N",
683 "CAM3_RESET_N", 683 "CAM3_RESET_N",
684 "IMU1_INT", 684 "IMU1_INT",
685 "MAG_INT_N", 685 "MAG_INT_N",
686 "MI2S2_I2S_SCK", /* GPIO_120 * 686 "MI2S2_I2S_SCK", /* GPIO_120 */
687 "MI2S2_I2S_DAT0", 687 "MI2S2_I2S_DAT0",
688 "MI2S2_I2S_WS", 688 "MI2S2_I2S_WS",
689 "HIFI_DAC_I2S_MCLK", 689 "HIFI_DAC_I2S_MCLK",
690 "MI2S2_I2S_DAT1", 690 "MI2S2_I2S_DAT1",
691 "HIFI_DAC_I2S_SCK", 691 "HIFI_DAC_I2S_SCK",
692 "HIFI_DAC_I2S_DAT0", 692 "HIFI_DAC_I2S_DAT0",
693 "NC", 693 "NC",
694 "HIFI_DAC_I2S_WS", 694 "HIFI_DAC_I2S_WS",
695 "HST_BT_WLAN_SLIMBUS_CLK", 695 "HST_BT_WLAN_SLIMBUS_CLK",
696 "HST_BT_WLAN_SLIMBUS_DAT0", /* 696 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */
697 "BT_LED_EN", 697 "BT_LED_EN",
698 "WLAN_LED_EN", 698 "WLAN_LED_EN",
699 "NC", 699 "NC",
700 "NC", 700 "NC",
701 "NC", 701 "NC",
702 "UIM2_PRESENT", 702 "UIM2_PRESENT",
703 "NC", 703 "NC",
704 "NC", 704 "NC",
705 "NC", 705 "NC",
706 "UIM1_PRESENT", /* GPIO_140 */ 706 "UIM1_PRESENT", /* GPIO_140 */
707 "NC", 707 "NC",
708 "SM_RFFE0_DATA", 708 "SM_RFFE0_DATA",
709 "NC", 709 "NC",
710 "SM_RFFE1_DATA", 710 "SM_RFFE1_DATA",
711 "SM_MSS_GRFC4", 711 "SM_MSS_GRFC4",
712 "SM_MSS_GRFC5", 712 "SM_MSS_GRFC5",
713 "SM_MSS_GRFC6", 713 "SM_MSS_GRFC6",
714 "SM_MSS_GRFC7", 714 "SM_MSS_GRFC7",
715 "SM_RFFE4_CLK", 715 "SM_RFFE4_CLK",
716 "SM_RFFE4_DATA", /* GPIO_150 * 716 "SM_RFFE4_DATA", /* GPIO_150 */
717 "WLAN_COEX_UART1_RX", 717 "WLAN_COEX_UART1_RX",
718 "WLAN_COEX_UART1_TX", 718 "WLAN_COEX_UART1_TX",
719 "HST_SW_CTRL", 719 "HST_SW_CTRL",
720 "DSI0_STATUS", 720 "DSI0_STATUS",
721 "DSI1_STATUS", 721 "DSI1_STATUS",
722 "APPS_PBL_BOOT_SPEED_1", 722 "APPS_PBL_BOOT_SPEED_1",
723 "APPS_BOOT_FROM_ROM", 723 "APPS_BOOT_FROM_ROM",
724 "APPS_PBL_BOOT_SPEED_0", 724 "APPS_PBL_BOOT_SPEED_0",
725 "QLINK0_REQ", 725 "QLINK0_REQ",
726 "QLINK0_EN", /* GPIO_160 */ 726 "QLINK0_EN", /* GPIO_160 */
727 "QLINK0_WMSS_RESET_N", 727 "QLINK0_WMSS_RESET_N",
728 "NC", 728 "NC",
729 "NC", 729 "NC",
730 "NC", 730 "NC",
731 "NC", 731 "NC",
732 "NC", 732 "NC",
733 "NC", 733 "NC",
734 "WCD_SWR_TX_CLK", 734 "WCD_SWR_TX_CLK",
735 "WCD_SWR_TX_DATA0", 735 "WCD_SWR_TX_DATA0",
736 "WCD_SWR_TX_DATA1", /* GPIO_17 736 "WCD_SWR_TX_DATA1", /* GPIO_170 */
737 "WCD_SWR_RX_CLK", 737 "WCD_SWR_RX_CLK",
738 "WCD_SWR_RX_DATA0", 738 "WCD_SWR_RX_DATA0",
739 "WCD_SWR_RX_DATA1", 739 "WCD_SWR_RX_DATA1",
740 "DMIC01_CLK", 740 "DMIC01_CLK",
741 "DMIC01_DATA", 741 "DMIC01_DATA",
742 "DMIC23_CLK", 742 "DMIC23_CLK",
743 "DMIC23_DATA", 743 "DMIC23_DATA",
744 "WSA_SWR_CLK", 744 "WSA_SWR_CLK",
745 "WSA_SWR_DATA", 745 "WSA_SWR_DATA",
746 "DMIC45_CLK", /* GPIO_180 */ 746 "DMIC45_CLK", /* GPIO_180 */
747 "DMIC45_DATA", 747 "DMIC45_DATA",
748 "WCD_SWR_TX_DATA2", 748 "WCD_SWR_TX_DATA2",
749 "SENSOR_I3C_SDA", 749 "SENSOR_I3C_SDA",
750 "SENSOR_I3C_SCL", 750 "SENSOR_I3C_SCL",
751 "CAM_OIS0_I3C_SDA", 751 "CAM_OIS0_I3C_SDA",
752 "CAM_OIS0_I3C_SCL", 752 "CAM_OIS0_I3C_SCL",
753 "IMU_SPI_MISO", 753 "IMU_SPI_MISO",
754 "IMU_SPI_MOSI", 754 "IMU_SPI_MOSI",
755 "IMU_SPI_CLK", 755 "IMU_SPI_CLK",
756 "IMU_SPI_CS_N", /* GPIO_190 */ 756 "IMU_SPI_CS_N", /* GPIO_190 */
757 "MAG_I2C_SDA", 757 "MAG_I2C_SDA",
758 "MAG_I2C_SCL", 758 "MAG_I2C_SCL",
759 "SENSOR_I2C_SDA", 759 "SENSOR_I2C_SDA",
760 "SENSOR_I2C_SCL", 760 "SENSOR_I2C_SCL",
761 "RADAR_SPI_MISO", 761 "RADAR_SPI_MISO",
762 "RADAR_SPI_MOSI", 762 "RADAR_SPI_MOSI",
763 "RADAR_SPI_CLK", 763 "RADAR_SPI_CLK",
764 "RADAR_SPI_CS_N", 764 "RADAR_SPI_CS_N",
765 "HST_BLE_UART_TX", 765 "HST_BLE_UART_TX",
766 "HST_BLE_UART_RX", /* GPIO_200 766 "HST_BLE_UART_RX", /* GPIO_200 */
767 "HST_WLAN_UART_TX", 767 "HST_WLAN_UART_TX",
768 "HST_WLAN_UART_RX"; 768 "HST_WLAN_UART_RX";
769 769
770 pcie0_default_state: pcie0-default-sta 770 pcie0_default_state: pcie0-default-state {
771 perst-pins { 771 perst-pins {
772 pins = "gpio94"; 772 pins = "gpio94";
773 function = "gpio"; 773 function = "gpio";
774 drive-strength = <2>; 774 drive-strength = <2>;
775 bias-pull-down; 775 bias-pull-down;
776 }; 776 };
777 777
778 clkreq-pins { 778 clkreq-pins {
779 pins = "gpio95"; 779 pins = "gpio95";
780 function = "pcie0_clkr 780 function = "pcie0_clkreqn";
781 drive-strength = <2>; 781 drive-strength = <2>;
782 bias-pull-up; 782 bias-pull-up;
783 }; 783 };
784 784
785 wake-pins { 785 wake-pins {
786 pins = "gpio96"; 786 pins = "gpio96";
787 function = "gpio"; 787 function = "gpio";
788 drive-strength = <2>; 788 drive-strength = <2>;
789 bias-pull-up; 789 bias-pull-up;
790 }; 790 };
791 }; 791 };
792 792
793 pcie1_default_state: pcie1-default-sta 793 pcie1_default_state: pcie1-default-state {
794 perst-pins { 794 perst-pins {
795 pins = "gpio97"; 795 pins = "gpio97";
796 function = "gpio"; 796 function = "gpio";
797 drive-strength = <2>; 797 drive-strength = <2>;
798 bias-pull-down; 798 bias-pull-down;
799 }; 799 };
800 800
801 clkreq-pins { 801 clkreq-pins {
802 pins = "gpio98"; 802 pins = "gpio98";
803 function = "pcie1_clkr 803 function = "pcie1_clkreqn";
804 drive-strength = <2>; 804 drive-strength = <2>;
805 bias-pull-up; 805 bias-pull-up;
806 }; 806 };
807 807
808 wake-pins { 808 wake-pins {
809 pins = "gpio99"; 809 pins = "gpio99";
810 function = "gpio"; 810 function = "gpio";
811 drive-strength = <2>; 811 drive-strength = <2>;
812 bias-pull-up; 812 bias-pull-up;
813 }; 813 };
814 }; 814 };
815 815
816 sdc2_card_det_n: sd-card-det-n-state { 816 sdc2_card_det_n: sd-card-det-n-state {
817 pins = "gpio92"; 817 pins = "gpio92";
818 function = "gpio"; 818 function = "gpio";
819 drive-strength = <2>; 819 drive-strength = <2>;
820 bias-pull-up; 820 bias-pull-up;
821 }; 821 };
822 }; 822 };
823 823
824 &uart2 { 824 &uart2 {
825 status = "okay"; 825 status = "okay";
826 }; 826 };
827 827
828 &ufs_mem_hc { 828 &ufs_mem_hc {
829 status = "okay"; 829 status = "okay";
830 830
831 reset-gpios = <&tlmm 203 GPIO_ACTIVE_L 831 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>;
832 832
833 vcc-supply = <&vreg_l7b_2p96>; 833 vcc-supply = <&vreg_l7b_2p96>;
834 vcc-max-microamp = <800000>; 834 vcc-max-microamp = <800000>;
835 vccq-supply = <&vreg_l9b_1p2>; 835 vccq-supply = <&vreg_l9b_1p2>;
836 vccq-max-microamp = <900000>; 836 vccq-max-microamp = <900000>;
837 vdd-hba-supply = <&vreg_l9b_1p2>; 837 vdd-hba-supply = <&vreg_l9b_1p2>;
838 }; 838 };
839 839
840 &ufs_mem_phy { 840 &ufs_mem_phy {
841 status = "okay"; 841 status = "okay";
842 842
843 vdda-phy-supply = <&vreg_l5b_0p88>; 843 vdda-phy-supply = <&vreg_l5b_0p88>;
844 vdda-pll-supply = <&vreg_l6b_1p2>; 844 vdda-pll-supply = <&vreg_l6b_1p2>;
845 }; 845 };
846 846
847 &usb_1 { 847 &usb_1 {
848 status = "okay"; 848 status = "okay";
849 }; 849 };
850 850
851 &usb_1_dwc3 { 851 &usb_1_dwc3 {
852 dr_mode = "otg"; 852 dr_mode = "otg";
853 usb-role-switch; 853 usb-role-switch;
854 }; 854 };
855 855
856 &usb_1_dwc3_hs { 856 &usb_1_dwc3_hs {
857 remote-endpoint = <&pmic_glink_hs_in>; 857 remote-endpoint = <&pmic_glink_hs_in>;
858 }; 858 };
859 859
860 &usb_1_hsphy { 860 &usb_1_hsphy {
861 status = "okay"; 861 status = "okay";
862 862
863 vdda-pll-supply = <&vreg_l5b_0p88>; 863 vdda-pll-supply = <&vreg_l5b_0p88>;
864 vdda18-supply = <&vreg_l1c_1p8>; 864 vdda18-supply = <&vreg_l1c_1p8>;
865 vdda33-supply = <&vreg_l2b_3p07>; 865 vdda33-supply = <&vreg_l2b_3p07>;
866 }; 866 };
867 867
868 &usb_1_qmpphy { 868 &usb_1_qmpphy {
869 status = "okay"; 869 status = "okay";
870 870
871 vdda-phy-supply = <&vreg_l6b_1p2>; 871 vdda-phy-supply = <&vreg_l6b_1p2>;
872 vdda-pll-supply = <&vreg_l1b_0p88>; 872 vdda-pll-supply = <&vreg_l1b_0p88>;
873 }; 873 };
874 874
875 &usb_1_qmpphy_out { 875 &usb_1_qmpphy_out {
876 remote-endpoint = <&pmic_glink_ss_in>; 876 remote-endpoint = <&pmic_glink_ss_in>;
877 }; 877 };
878 878
879 &usb_2 { 879 &usb_2 {
880 status = "okay"; 880 status = "okay";
881 }; 881 };
882 882
883 &usb_2_dwc3 { 883 &usb_2_dwc3 {
884 dr_mode = "host"; 884 dr_mode = "host";
885 885
886 pinctrl-names = "default"; 886 pinctrl-names = "default";
887 pinctrl-0 = <&usb_hub_enabled_state>; 887 pinctrl-0 = <&usb_hub_enabled_state>;
888 }; 888 };
889 889
890 &usb_2_hsphy { 890 &usb_2_hsphy {
891 status = "okay"; 891 status = "okay";
892 892
893 vdda-pll-supply = <&vreg_l5b_0p88>; 893 vdda-pll-supply = <&vreg_l5b_0p88>;
894 vdda18-supply = <&vreg_l1c_1p8>; 894 vdda18-supply = <&vreg_l1c_1p8>;
895 vdda33-supply = <&vreg_l2b_3p07>; 895 vdda33-supply = <&vreg_l2b_3p07>;
896 }; 896 };
897 897
898 &usb_2_qmpphy { 898 &usb_2_qmpphy {
899 status = "okay"; 899 status = "okay";
900 900
901 vdda-phy-supply = <&vreg_l6b_1p2>; 901 vdda-phy-supply = <&vreg_l6b_1p2>;
902 vdda-pll-supply = <&vreg_l5b_0p88>; 902 vdda-pll-supply = <&vreg_l5b_0p88>;
903 }; 903 };
904 904
905 /* PINCTRL - additions to nodes defined in sm8 905 /* PINCTRL - additions to nodes defined in sm8350.dtsi */
906 906
907 &tlmm { 907 &tlmm {
908 usb_hub_enabled_state: usb-hub-enabled 908 usb_hub_enabled_state: usb-hub-enabled-state {
909 pins = "gpio42"; 909 pins = "gpio42";
910 function = "gpio"; 910 function = "gpio";
911 911
912 drive-strength = <2>; 912 drive-strength = <2>;
913 output-low; 913 output-low;
914 }; 914 };
915 915
916 lt9611_state: lt9611-state { 916 lt9611_state: lt9611-state {
917 rst-pins { 917 rst-pins {
918 pins = "gpio48"; 918 pins = "gpio48";
919 function = "gpio"; 919 function = "gpio";
920 920
921 output-high; 921 output-high;
922 input-disable; 922 input-disable;
923 }; 923 };
924 924
925 irq-pins { 925 irq-pins {
926 pins = "gpio50"; 926 pins = "gpio50";
927 function = "gpio"; 927 function = "gpio";
928 bias-disable; 928 bias-disable;
929 }; 929 };
930 }; 930 };
931 }; 931 };
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