1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2022, Linaro Limited
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/regulator/qcom,rpmh-regu
9 #include <dt-bindings/iio/qcom,spmi-adc7-pm835
10 #include <dt-bindings/iio/qcom,spmi-adc7-pm835
11 #include <dt-bindings/iio/qcom,spmi-adc7-pmk83
12 #include <dt-bindings/iio/qcom,spmi-adc7-pmr73
13 #include <dt-bindings/sound/qcom,q6dsp-lpass-p
14 #include "sm8450.dtsi"
15 #include "pm8350.dtsi"
16 #include "pm8350b.dtsi"
17 #include "pm8350c.dtsi"
18 #include "pm8450.dtsi"
19 #include "pmk8350.dtsi"
20 #include "pmr735a.dtsi"
21
22 / {
23 model = "Qualcomm Technologies, Inc. S
24 compatible = "qcom,sm8450-hdk", "qcom,
25 chassis-type = "embedded";
26
27 aliases {
28 serial0 = &uart7;
29 };
30
31 wcd938x: audio-codec {
32 compatible = "qcom,wcd9385-cod
33
34 pinctrl-names = "default";
35 pinctrl-0 = <&wcd_default>;
36
37 qcom,micbias1-microvolt = <180
38 qcom,micbias2-microvolt = <180
39 qcom,micbias3-microvolt = <180
40 qcom,micbias4-microvolt = <180
41 qcom,mbhc-buttons-vthreshold-m
42 qcom,mbhc-headset-vthreshold-m
43 qcom,mbhc-headphone-vthreshold
44 qcom,rx-device = <&wcd_rx>;
45 qcom,tx-device = <&wcd_tx>;
46
47 reset-gpios = <&tlmm 43 GPIO_A
48
49 vdd-buck-supply = <&vreg_s10b_
50 vdd-rxtx-supply = <&vreg_s10b_
51 vdd-io-supply = <&vreg_s10b_1p
52 vdd-mic-bias-supply = <&vreg_b
53
54 #sound-dai-cells = <1>;
55 };
56
57 chosen {
58 stdout-path = "serial0:115200n
59 };
60
61 hdmi-out {
62 compatible = "hdmi-connector";
63 type = "a";
64
65 port {
66 hdmi_connector_out: en
67 remote-endpoin
68 };
69 };
70 };
71
72 lt9611_1v2: lt9611-vdd12-regulator {
73 compatible = "regulator-fixed"
74 regulator-name = "LT9611_1V2";
75
76 vin-supply = <&vph_pwr>;
77 regulator-min-microvolt = <120
78 regulator-max-microvolt = <120
79 gpio = <&tlmm 9 GPIO_ACTIVE_HI
80 enable-active-high;
81 };
82
83 lt9611_3v3: lt9611-3v3-regulator {
84 compatible = "regulator-fixed"
85 regulator-name = "LT9611_3V3";
86
87 vin-supply = <&vreg_bob>;
88 gpio = <&tlmm 109 GPIO_ACTIVE_
89 regulator-min-microvolt = <330
90 regulator-max-microvolt = <330
91 enable-active-high;
92 };
93
94 pmic-glink {
95 compatible = "qcom,sm8450-pmic
96 #address-cells = <1>;
97 #size-cells = <0>;
98 orientation-gpios = <&tlmm 91
99
100 connector@0 {
101 compatible = "usb-c-co
102 reg = <0>;
103 power-role = "dual";
104 data-role = "dual";
105
106 ports {
107 #address-cells
108 #size-cells =
109
110 port@0 {
111 reg =
112
113 pmic_g
114
115 };
116 };
117
118 port@1 {
119 reg =
120
121 pmic_g
122
123 };
124 };
125
126 port@2 {
127 reg =
128
129 pmic_g
130
131 };
132 };
133
134 };
135 };
136 };
137
138 thermal-zones {
139 camera-thermal {
140 polling-delay-passive
141
142 thermal-sensors = <&pm
143
144 trips {
145 active-config0
146 temper
147 hyster
148 type =
149 };
150 };
151 };
152
153 rear-tof-thermal {
154 polling-delay-passive
155
156 thermal-sensors = <&pm
157
158 trips {
159 active-config0
160 temper
161 hyster
162 type =
163 };
164 };
165 };
166
167 skin-msm-thermal {
168 polling-delay-passive
169
170 thermal-sensors = <&pm
171
172 trips {
173 active-config0
174 temper
175 hyster
176 type =
177 };
178 };
179 };
180
181 therm1-thermal {
182 polling-delay-passive
183
184 thermal-sensors = <&pm
185
186 trips {
187 active-config0
188 temper
189 hyster
190 type =
191 };
192 };
193 };
194
195 therm2-thermal {
196 polling-delay-passive
197
198 thermal-sensors = <&pm
199
200 trips {
201 active-config0
202 temper
203 hyster
204 type =
205 };
206 };
207 };
208
209 usb-conn-thermal {
210 polling-delay-passive
211
212 thermal-sensors = <&pm
213
214 trips {
215 active-config0
216 temper
217 hyster
218 type =
219 };
220 };
221 };
222
223 wide-rfc-thermal {
224 polling-delay-passive
225
226 thermal-sensors = <&pm
227
228 trips {
229 active-config0
230 temper
231 hyster
232 type =
233 };
234 };
235 };
236
237 xo-thermal {
238 thermal-sensors = <&pm
239
240 trips {
241 active-config0
242 temper
243 hyster
244 type =
245 };
246 };
247 };
248 };
249
250 vph_pwr: vph-pwr-regulator {
251 compatible = "regulator-fixed"
252 regulator-name = "vph_pwr";
253 regulator-min-microvolt = <370
254 regulator-max-microvolt = <370
255
256 regulator-always-on;
257 regulator-boot-on;
258 };
259 };
260
261 &apps_rsc {
262 regulators-0 {
263 compatible = "qcom,pm8350-rpmh
264 qcom,pmic-id = "b";
265
266 vdd-s1-supply = <&vph_pwr>;
267 vdd-s2-supply = <&vph_pwr>;
268 vdd-s3-supply = <&vph_pwr>;
269 vdd-s4-supply = <&vph_pwr>;
270 vdd-s5-supply = <&vph_pwr>;
271 vdd-s6-supply = <&vph_pwr>;
272 vdd-s7-supply = <&vph_pwr>;
273 vdd-s8-supply = <&vph_pwr>;
274 vdd-s9-supply = <&vph_pwr>;
275 vdd-s10-supply = <&vph_pwr>;
276 vdd-s11-supply = <&vph_pwr>;
277 vdd-s12-supply = <&vph_pwr>;
278
279 vdd-l1-l4-supply = <&vreg_s11b
280 vdd-l2-l7-supply = <&vreg_bob>
281 vdd-l3-l5-supply = <&vreg_bob>
282 vdd-l6-l9-l10-supply = <&vreg_
283 vdd-l8-supply = <&vreg_s2h_0p9
284
285 vreg_s10b_1p8: smps10 {
286 regulator-name = "vreg
287 regulator-min-microvol
288 regulator-max-microvol
289 };
290
291 vreg_s11b_0p95: smps11 {
292 regulator-name = "vreg
293 regulator-min-microvol
294 regulator-max-microvol
295 };
296
297 vreg_s12b_1p25: smps12 {
298 regulator-name = "vreg
299 regulator-min-microvol
300 regulator-max-microvol
301 };
302
303 vreg_l1b_0p91: ldo1 {
304 regulator-name = "vreg
305 regulator-min-microvol
306 regulator-max-microvol
307 regulator-initial-mode
308 };
309
310 vreg_l2b_3p07: ldo2 {
311 regulator-name = "vreg
312 regulator-min-microvol
313 regulator-max-microvol
314 regulator-initial-mode
315 };
316
317 vreg_l3b_0p9: ldo3 {
318 regulator-name = "vreg
319 regulator-min-microvol
320 regulator-max-microvol
321 regulator-initial-mode
322 };
323
324 vreg_l5b_0p88: ldo5 {
325 regulator-name = "vreg
326 regulator-min-microvol
327 regulator-max-microvol
328 regulator-initial-mode
329 };
330
331 vreg_l6b_1p2: ldo6 {
332 regulator-name = "vreg
333 regulator-min-microvol
334 regulator-max-microvol
335 regulator-initial-mode
336 };
337
338 vreg_l7b_2p5: ldo7 {
339 regulator-name = "vreg
340 regulator-min-microvol
341 regulator-max-microvol
342 regulator-initial-mode
343 };
344
345 vreg_l9b_1p2: ldo9 {
346 regulator-name = "vreg
347 regulator-min-microvol
348 regulator-max-microvol
349 regulator-initial-mode
350 };
351 };
352
353 regulators-1 {
354 compatible = "qcom,pm8350c-rpm
355 qcom,pmic-id = "c";
356
357 vdd-s1-supply = <&vph_pwr>;
358 vdd-s2-supply = <&vph_pwr>;
359 vdd-s3-supply = <&vph_pwr>;
360 vdd-s4-supply = <&vph_pwr>;
361 vdd-s5-supply = <&vph_pwr>;
362 vdd-s6-supply = <&vph_pwr>;
363 vdd-s7-supply = <&vph_pwr>;
364 vdd-s8-supply = <&vph_pwr>;
365 vdd-s9-supply = <&vph_pwr>;
366 vdd-s10-supply = <&vph_pwr>;
367
368 vdd-l1-l12-supply = <&vreg_bob
369 vdd-l2-l8-supply = <&vreg_bob>
370 vdd-l3-l4-l5-l7-l13-supply = <
371 vdd-l6-l9-l11-supply = <&vreg_
372 vdd-l10-supply = <&vreg_s12b_1
373
374 vdd-bob-supply = <&vph_pwr>;
375
376 vreg_s1c_1p86: smps1 {
377 regulator-name = "vreg
378 regulator-min-microvol
379 regulator-max-microvol
380 };
381
382 vreg_s10c_1p05: smps10 {
383 regulator-name = "vreg
384 regulator-min-microvol
385 regulator-max-microvol
386 };
387
388 vreg_bob: bob {
389 regulator-name = "vreg
390 regulator-min-microvol
391 regulator-max-microvol
392 regulator-initial-mode
393 };
394
395 vreg_l1c_1p8: ldo1 {
396 regulator-name = "vreg
397 regulator-min-microvol
398 regulator-max-microvol
399 regulator-initial-mode
400 };
401
402 vreg_l3c_3p0: ldo3 {
403 regulator-name = "vreg
404 regulator-min-microvol
405 regulator-max-microvol
406 regulator-initial-mode
407 };
408
409 vreg_l4c_1p8: ldo4 {
410 regulator-name = "vreg
411 regulator-min-microvol
412 regulator-max-microvol
413 regulator-initial-mode
414 };
415
416 vreg_l5c_1p8: ldo5 {
417 regulator-name = "vreg
418 regulator-min-microvol
419 regulator-max-microvol
420 regulator-initial-mode
421 };
422
423 vreg_l6c_1p8: ldo6 {
424 regulator-name = "vreg
425 regulator-min-microvol
426 regulator-max-microvol
427 regulator-initial-mode
428 };
429
430 vreg_l7c_3p0: ldo7 {
431 regulator-name = "vreg
432 regulator-min-microvol
433 regulator-max-microvol
434 regulator-initial-mode
435 };
436
437 vreg_l8c_1p8: ldo8 {
438 regulator-name = "vreg
439 regulator-min-microvol
440 regulator-max-microvol
441 regulator-initial-mode
442 };
443
444 vreg_l9c_2p96: ldo9 {
445 regulator-name = "vreg
446 regulator-min-microvol
447 regulator-max-microvol
448 regulator-initial-mode
449 };
450
451 vreg_l12c_1p8: ldo12 {
452 regulator-name = "vreg
453 regulator-min-microvol
454 regulator-max-microvol
455 regulator-initial-mode
456 };
457
458 vreg_l13c_3p0: ldo13 {
459 regulator-name = "vreg
460 regulator-min-microvol
461 regulator-max-microvol
462 regulator-initial-mode
463 };
464 };
465
466 regulators-2 {
467 compatible = "qcom,pm8450-rpmh
468 qcom,pmic-id = "h";
469
470 vdd-s1-supply = <&vph_pwr>;
471 vdd-s2-supply = <&vph_pwr>;
472 vdd-s3-supply = <&vph_pwr>;
473 vdd-s4-supply = <&vph_pwr>;
474 vdd-s5-supply = <&vph_pwr>;
475 vdd-s6-supply = <&vph_pwr>;
476
477 vdd-l2-supply = <&vreg_bob>;
478 vdd-l3-supply = <&vreg_bob>;
479 vdd-l4-supply = <&vreg_bob>;
480
481 vreg_s2h_0p95: smps2 {
482 regulator-name = "vreg
483 regulator-min-microvol
484 regulator-max-microvol
485 };
486
487 vreg_s3h_0p5: smps3 {
488 regulator-name = "vreg
489 regulator-min-microvol
490 regulator-max-microvol
491 };
492
493 vreg_l2h_0p91: ldo2 {
494 regulator-name = "vreg
495 regulator-min-microvol
496 regulator-max-microvol
497 regulator-initial-mode
498 };
499
500 vreg_l3h_0p91: ldo3 {
501 regulator-name = "vreg
502 regulator-min-microvol
503 regulator-max-microvol
504 regulator-initial-mode
505 };
506 };
507
508 regulators-3 {
509 compatible = "qcom,pmr735a-rpm
510 qcom,pmic-id = "e";
511
512 vdd-s1-supply = <&vph_pwr>;
513 vdd-s2-supply = <&vph_pwr>;
514 vdd-s3-supply = <&vph_pwr>;
515
516 vdd-l1-l2-supply = <&vreg_s2e_
517 vdd-l3-supply = <&vreg_s1e_1p2
518 vdd-l4-supply = <&vreg_s1c_1p8
519 vdd-l5-l6-supply = <&vreg_s1c_
520 vdd-l7-bob-supply = <&vreg_bob
521
522 vreg_s1e_1p25: smps1 {
523 regulator-name = "vreg
524 regulator-min-microvol
525 regulator-max-microvol
526 };
527
528 vreg_s2e_0p85: smps2 {
529 regulator-name = "vreg
530 regulator-min-microvol
531 regulator-max-microvol
532 };
533
534 vreg_l1e_0p8: ldo1 {
535 regulator-name = "vreg
536 regulator-min-microvol
537 regulator-max-microvol
538 };
539
540 vreg_l2e_0p8: ldo2 {
541 regulator-name = "vreg
542 regulator-min-microvol
543 regulator-max-microvol
544 };
545
546 vreg_l3e_1p2: ldo3 {
547 regulator-name = "vreg
548 regulator-min-microvol
549 regulator-max-microvol
550 };
551
552 vreg_l4e_1p7: ldo4 {
553 regulator-name = "vreg
554 regulator-min-microvol
555 regulator-max-microvol
556 };
557
558 vreg_l5e_0p88: ldo5 {
559 regulator-name = "vreg
560 regulator-min-microvol
561 regulator-max-microvol
562 };
563
564 vreg_l6e_1p2: ldo6 {
565 regulator-name = "vreg
566 regulator-min-microvol
567 regulator-max-microvol
568 };
569
570 vreg_l7e_2p8: ldo7 {
571 regulator-name = "vreg
572 regulator-min-microvol
573 regulator-max-microvol
574 };
575 };
576 };
577
578 &dispcc {
579 status = "okay";
580 };
581
582 &gpu {
583 status = "okay";
584
585 zap-shader {
586 firmware-name = "qcom/sm8450/a
587 };
588 };
589
590 &i2c9 {
591 clock-frequency = <400000>;
592 status = "okay";
593
594 lt9611_codec: hdmi-bridge@2b {
595 compatible = "lontium,lt9611ux
596 reg = <0x2b>;
597
598 interrupts-extended = <&tlmm 4
599
600 reset-gpios = <&tlmm 107 GPIO_
601
602 vdd-supply = <<9611_1v2>;
603 vcc-supply = <<9611_3v3>;
604
605 pinctrl-names = "default";
606 pinctrl-0 = <<9611_irq_pin &
607
608 ports {
609 #address-cells = <1>;
610 #size-cells = <0>;
611
612 port@0 {
613 reg = <0>;
614
615 lt9611_a: endp
616 remote
617 };
618 };
619
620 port@2 {
621 reg = <2>;
622
623 lt9611_out: en
624 remote
625 };
626 };
627 };
628 };
629 };
630
631 &i2c5 {
632 clock-frequency = <100000>;
633
634 status = "okay";
635
636 typec-mux@42 {
637 compatible = "fcs,fsa4480";
638 reg = <0x42>;
639
640 interrupts-extended = <&tlmm 2
641
642 vcc-supply = <&vreg_bob>;
643 mode-switch;
644 orientation-switch;
645
646 port {
647 fsa4480_sbu_mux: endpo
648 remote-endpoin
649 };
650 };
651 };
652 };
653
654 &mdss {
655 status = "okay";
656 };
657
658 &mdss_dsi0 {
659 vdda-supply = <&vreg_l6b_1p2>;
660 status = "okay";
661 };
662
663 &mdss_dsi0_out {
664 remote-endpoint = <<9611_a>;
665 data-lanes = <0 1 2 3>;
666 };
667
668 &mdss_dsi0_phy {
669 vdds-supply = <&vreg_l5b_0p88>;
670 status = "okay";
671 };
672
673 &mdss_dp0 {
674 status = "okay";
675 };
676
677 &mdss_dp0_out {
678 data-lanes = <0 1>;
679 };
680
681 &pcie0 {
682 status = "okay";
683 max-link-speed = <2>;
684 };
685
686 &pcie0_phy {
687 status = "okay";
688 vdda-phy-supply = <&vreg_l5b_0p88>;
689 vdda-pll-supply = <&vreg_l6b_1p2>;
690 };
691
692 &pcie1 {
693 status = "okay";
694 };
695
696 &pcie1_phy {
697 status = "okay";
698 vdda-phy-supply = <&vreg_l2h_0p91>;
699 vdda-pll-supply = <&vreg_l6b_1p2>;
700 };
701
702 &pm8350_temp_alarm {
703 io-channels = <&pmk8350_vadc PM8350_AD
704 io-channel-names = "thermal";
705 };
706
707 &pm8350b_temp_alarm {
708 io-channels = <&pmk8350_vadc PM8350B_A
709 io-channel-names = "thermal";
710 };
711
712 &pmr735a_temp_alarm {
713 io-channels = <&pmk8350_vadc PMR735A_A
714 io-channel-names = "thermal";
715 };
716
717 &pmk8350_adc_tm {
718 status = "okay";
719
720 xo-therm@0 {
721 reg = <0>;
722 io-channels = <&pmk8350_vadc P
723 qcom,ratiometric;
724 qcom,hw-settle-time-us = <200>
725 };
726
727 skin-msm-therm@1 {
728 reg = <1>;
729 io-channels = <&pmk8350_vadc P
730 qcom,ratiometric;
731 qcom,hw-settle-time-us = <200>
732 };
733
734 camera-therm@2 {
735 reg = <2>;
736 io-channels = <&pmk8350_vadc P
737 qcom,ratiometric;
738 qcom,hw-settle-time-us = <200>
739 };
740
741 therm1-therm@3 {
742 reg = <3>;
743 io-channels = <&pmk8350_vadc P
744 qcom,ratiometric;
745 qcom,hw-settle-time-us = <200>
746 };
747
748 wide-rfc-therm@4 {
749 reg = <4>;
750 io-channels = <&pmk8350_vadc P
751 qcom,ratiometric;
752 qcom,hw-settle-time-us = <200>
753 };
754
755 rear-tof-therm@5 {
756 reg = <5>;
757 io-channels = <&pmk8350_vadc P
758 qcom,ratiometric;
759 qcom,hw-settle-time-us = <200>
760 };
761
762 therm2-therm@6 {
763 reg = <6>;
764 io-channels = <&pmk8350_vadc P
765 qcom,ratiometric;
766 qcom,hw-settle-time-us = <200>
767 };
768
769 usb-conn-therm@7 {
770 reg = <7>;
771 io-channels = <&pmk8350_vadc P
772 qcom,ratiometric;
773 qcom,hw-settle-time-us = <200>
774 };
775 };
776
777 &pmk8350_vadc {
778 status = "okay";
779
780 channel@3 {
781 reg = <PMK8350_ADC7_DIE_TEMP>;
782 label = "pmk8350_die_temp";
783 };
784
785 channel@44 {
786 reg = <PMK8350_ADC7_AMUX_THM1_
787 qcom,hw-settle-time = <200>;
788 qcom,ratiometric;
789 label = "pmk8350_xo_therm";
790 };
791
792 channel@103 {
793 reg = <PM8350_ADC7_DIE_TEMP(1)
794 label = "pm8350_die_temp";
795 };
796
797 channel@144 {
798 reg = <PM8350_ADC7_AMUX_THM1_1
799 qcom,hw-settle-time = <200>;
800 qcom,ratiometric;
801 label = "skin_msm_temp";
802 };
803
804 channel@145 {
805 reg = <PM8350_ADC7_AMUX_THM2_1
806 qcom,hw-settle-time = <200>;
807 qcom,ratiometric;
808 label = "camera_temp";
809 };
810
811 channel@146 {
812 reg = <PM8350_ADC7_AMUX_THM3_1
813 qcom,hw-settle-time = <200>;
814 qcom,ratiometric;
815 label = "therm1_temp";
816 };
817
818 channel@147 {
819 reg = <PM8350_ADC7_AMUX_THM4_1
820 qcom,hw-settle-time = <200>;
821 qcom,ratiometric;
822 label = "wide_rfc_temp";
823 };
824
825 channel@148 {
826 reg = <PM8350_ADC7_AMUX_THM5_1
827 qcom,hw-settle-time = <200>;
828 qcom,ratiometric;
829 label = "rear_tof_temp";
830 };
831
832 channel@14c {
833 reg = <PM8350_ADC7_GPIO3_100K_
834 qcom,hw-settle-time = <200>;
835 qcom,ratiometric;
836 label = "therm2_temp";
837 };
838
839 channel@303 {
840 reg = <PM8350B_ADC7_DIE_TEMP>;
841 label = "pm8350b_die_temp";
842 };
843
844 channel@348 {
845 reg = <PM8350B_ADC7_AMUX_THM5_
846 qcom,hw-settle-time = <200>;
847 qcom,ratiometric;
848 label = "usb_conn_temp";
849 };
850
851 channel@403 {
852 reg = <PMR735A_ADC7_DIE_TEMP>;
853 label = "pmr735a_die_temp";
854 };
855
856 channel@44a {
857 reg = <PMR735A_ADC7_GPIO1_100K
858 qcom,hw-settle-time = <200>;
859 qcom,ratiometric;
860 label = "qtm_w_temp";
861 };
862
863 channel@44b {
864 reg = <PMR735A_ADC7_GPIO2_100K
865 qcom,hw-settle-time = <200>;
866 qcom,ratiometric;
867 label = "qtm_n_temp";
868 };
869 };
870
871 &remoteproc_adsp {
872 status = "okay";
873 firmware-name = "qcom/sm8450/adsp.mbn"
874 };
875
876 &remoteproc_cdsp {
877 status = "okay";
878 firmware-name = "qcom/sm8450/cdsp.mbn"
879 };
880
881 &remoteproc_mpss {
882 status = "okay";
883 firmware-name = "qcom/sm8450/modem.mbn
884 };
885
886 &remoteproc_slpi {
887 status = "okay";
888 firmware-name = "qcom/sm8450/slpi.mbn"
889 };
890
891 &qupv3_id_0 {
892 status = "okay";
893 };
894
895 &qupv3_id_1 {
896 status = "okay";
897 };
898
899 &sdhc_2 {
900 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>
901 pinctrl-names = "default", "sleep";
902 pinctrl-0 = <&sdc2_default_state &sdc2
903 pinctrl-1 = <&sdc2_sleep_state &sdc2_c
904 vmmc-supply = <&vreg_l9c_2p96>;
905 vqmmc-supply = <&vreg_l6c_1p8>;
906 no-sdio;
907 no-mmc;
908 status = "okay";
909 };
910
911 &sound {
912 compatible = "qcom,sm8450-sndcard";
913 model = "SM8450-HDK";
914 audio-routing = "SpkrLeft IN", "WSA_SP
915 "SpkrRight IN", "WSA_S
916 "IN1_HPHL", "HPHL_OUT"
917 "IN2_HPHR", "HPHR_OUT"
918 "AMIC1", "MIC BIAS1",
919 "AMIC2", "MIC BIAS2",
920 "AMIC3", "MIC BIAS3",
921 "AMIC4", "MIC BIAS3",
922 "AMIC5", "MIC BIAS4",
923 "VA DMIC0", "MIC BIAS3
924 "VA DMIC1", "MIC BIAS3
925 "VA DMIC2", "MIC BIAS1
926 "VA DMIC3", "MIC BIAS1
927 "TX DMIC0", "MIC BIAS3
928 "TX DMIC1", "MIC BIAS3
929 "TX DMIC2", "MIC BIAS1
930 "TX DMIC3", "MIC BIAS1
931 "TX SWR_INPUT0", "ADC1
932 "TX SWR_INPUT1", "ADC2
933 "TX SWR_INPUT0", "ADC3
934 "TX SWR_INPUT1", "ADC4
935
936 wcd-playback-dai-link {
937 link-name = "WCD Playback";
938
939 cpu {
940 sound-dai = <&q6apmbed
941 };
942
943 codec {
944 sound-dai = <&wcd938x
945 };
946
947 platform {
948 sound-dai = <&q6apm>;
949 };
950 };
951
952 wcd-capture-dai-link {
953 link-name = "WCD Capture";
954
955 cpu {
956 sound-dai = <&q6apmbed
957 };
958
959 codec {
960 sound-dai = <&wcd938x
961 };
962
963 platform {
964 sound-dai = <&q6apm>;
965 };
966 };
967
968 wsa-dai-link {
969 link-name = "WSA Playback";
970
971 cpu {
972 sound-dai = <&q6apmbed
973 };
974
975 codec {
976 sound-dai = <&left_spk
977 };
978
979 platform {
980 sound-dai = <&q6apm>;
981 };
982 };
983
984 va-dai-link {
985 link-name = "VA Capture";
986
987 cpu {
988 sound-dai = <&q6apmbed
989 };
990
991 codec {
992 sound-dai = <&vamacro
993 };
994
995 platform {
996 sound-dai = <&q6apm>;
997 };
998 };
999 };
1000
1001 &swr0 {
1002 status = "okay";
1003
1004 left_spkr: speaker@0,1 {
1005 compatible = "sdw10217020200"
1006 reg = <0 1>;
1007 pinctrl-names = "default";
1008 pinctrl-0 = <&spkr_1_sd_n_act
1009 powerdown-gpios = <&tlmm 1 GP
1010 #sound-dai-cells = <0>;
1011 sound-name-prefix = "SpkrLeft
1012 #thermal-sensor-cells = <0>;
1013 vdd-supply = <&vreg_s10b_1p8>
1014 };
1015
1016 right_spkr: speaker@0,2 {
1017 compatible = "sdw10217020200"
1018 reg = <0 2>;
1019 pinctrl-names = "default";
1020 pinctrl-0 = <&spkr_2_sd_n_act
1021 powerdown-gpios = <&tlmm 89 G
1022 #sound-dai-cells = <0>;
1023 sound-name-prefix = "SpkrRigh
1024 #thermal-sensor-cells = <0>;
1025 vdd-supply = <&vreg_s10b_1p8>
1026 };
1027 };
1028
1029 &swr1 {
1030 status = "okay";
1031
1032 wcd_rx: codec@0,4 {
1033 compatible = "sdw20217010d00"
1034 reg = <0 4>;
1035 qcom,rx-port-mapping = <1 2 3
1036 };
1037 };
1038
1039 &swr2 {
1040 status = "okay";
1041
1042 wcd_tx: codec@0,3 {
1043 compatible = "sdw20217010d00"
1044 reg = <0 3>;
1045 qcom,tx-port-mapping = <1 1 2
1046 };
1047 };
1048
1049 &tlmm {
1050 gpio-reserved-ranges = <28 4>, <36 4>
1051
1052 lt9611_irq_pin: lt9611-irq-state {
1053 pins = "gpio44";
1054 function = "gpio";
1055 bias-disable;
1056 };
1057
1058 lt9611_rst_pin: lt9611-rst-state {
1059 pins = "gpio107";
1060 function = "gpio";
1061 output-high;
1062 };
1063
1064 sdc2_card_det_n: sd-card-det-n-state
1065 pins = "gpio92";
1066 function = "gpio";
1067 drive-strength = <2>;
1068 bias-pull-up;
1069 };
1070 };
1071
1072 &uart7 {
1073 status = "okay";
1074 };
1075
1076 &ufs_mem_hc {
1077 status = "okay";
1078
1079 reset-gpios = <&tlmm 210 GPIO_ACTIVE_
1080
1081 vcc-supply = <&vreg_l7b_2p5>;
1082 vcc-max-microamp = <1100000>;
1083 vccq-supply = <&vreg_l9b_1p2>;
1084 vccq-max-microamp = <1200000>;
1085 vdd-hba-supply = <&vreg_l9b_1p2>;
1086 };
1087
1088 &ufs_mem_phy {
1089 status = "okay";
1090
1091 vdda-phy-supply = <&vreg_l5b_0p88>;
1092 vdda-pll-supply = <&vreg_l6b_1p2>;
1093 };
1094
1095 &usb_1 {
1096 status = "okay";
1097 };
1098
1099 &usb_1_dwc3 {
1100 dr_mode = "otg";
1101 usb-role-switch;
1102 };
1103
1104 &usb_1_dwc3_hs {
1105 remote-endpoint = <&pmic_glink_hs_in>
1106 };
1107
1108 &usb_1_hsphy {
1109 status = "okay";
1110
1111 vdda-pll-supply = <&vreg_l5b_0p88>;
1112 vdda18-supply = <&vreg_l1c_1p8>;
1113 vdda33-supply = <&vreg_l2b_3p07>;
1114 };
1115
1116 &usb_1_qmpphy {
1117 status = "okay";
1118
1119 vdda-phy-supply = <&vreg_l6b_1p2>;
1120 vdda-pll-supply = <&vreg_l1b_0p91>;
1121 };
1122
1123 &usb_1_qmpphy_out {
1124 remote-endpoint = <&pmic_glink_ss_in>
1125 };
1126
1127 &vamacro {
1128 pinctrl-0 = <&dmic01_default>, <&dmic
1129 pinctrl-names = "default";
1130 vdd-micb-supply = <&vreg_s10b_1p8>;
1131 qcom,dmic-sample-rate = <600000>;
1132
1133 status = "okay";
1134 };
1135
1136 &tlmm {
1137 spkr_1_sd_n_active: spkr-1-sd-n-activ
1138 pins = "gpio1";
1139 function = "gpio";
1140 drive-strength = <16>;
1141 bias-disable;
1142 output-low;
1143 };
1144
1145 spkr_2_sd_n_active: spkr-2-sd-n-activ
1146 pins = "gpio89";
1147 function = "gpio";
1148 drive-strength = <16>;
1149 bias-disable;
1150 output-low;
1151 };
1152
1153 wcd_default: wcd-reset-n-active-state
1154 pins = "gpio43";
1155 function = "gpio";
1156 drive-strength = <16>;
1157 bias-disable;
1158 output-low;
1159 };
1160 };
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