1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2022, Linaro Limited 3 * Copyright (c) 2022, Linaro Limited
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/regulator/qcom,rpmh-regu 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/iio/qcom,spmi-adc7-pm835 9 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
10 #include <dt-bindings/iio/qcom,spmi-adc7-pm835 10 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350b.h>
11 #include <dt-bindings/iio/qcom,spmi-adc7-pmk83 11 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
12 #include <dt-bindings/iio/qcom,spmi-adc7-pmr73 12 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
13 #include <dt-bindings/sound/qcom,q6dsp-lpass-p 13 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
14 #include "sm8450.dtsi" 14 #include "sm8450.dtsi"
15 #include "pm8350.dtsi" 15 #include "pm8350.dtsi"
16 #include "pm8350b.dtsi" 16 #include "pm8350b.dtsi"
17 #include "pm8350c.dtsi" 17 #include "pm8350c.dtsi"
18 #include "pm8450.dtsi" 18 #include "pm8450.dtsi"
19 #include "pmk8350.dtsi" 19 #include "pmk8350.dtsi"
20 #include "pmr735a.dtsi" 20 #include "pmr735a.dtsi"
21 21
22 / { 22 / {
23 model = "Qualcomm Technologies, Inc. S 23 model = "Qualcomm Technologies, Inc. SM8450 HDK";
24 compatible = "qcom,sm8450-hdk", "qcom, 24 compatible = "qcom,sm8450-hdk", "qcom,sm8450";
25 chassis-type = "embedded"; 25 chassis-type = "embedded";
26 26
27 aliases { 27 aliases {
28 serial0 = &uart7; 28 serial0 = &uart7;
29 }; 29 };
30 30
31 wcd938x: audio-codec { 31 wcd938x: audio-codec {
32 compatible = "qcom,wcd9385-cod 32 compatible = "qcom,wcd9385-codec";
33 33
34 pinctrl-names = "default"; 34 pinctrl-names = "default";
35 pinctrl-0 = <&wcd_default>; 35 pinctrl-0 = <&wcd_default>;
36 36
37 qcom,micbias1-microvolt = <180 37 qcom,micbias1-microvolt = <1800000>;
38 qcom,micbias2-microvolt = <180 38 qcom,micbias2-microvolt = <1800000>;
39 qcom,micbias3-microvolt = <180 39 qcom,micbias3-microvolt = <1800000>;
40 qcom,micbias4-microvolt = <180 40 qcom,micbias4-microvolt = <1800000>;
41 qcom,mbhc-buttons-vthreshold-m 41 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
42 qcom,mbhc-headset-vthreshold-m 42 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
43 qcom,mbhc-headphone-vthreshold 43 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
44 qcom,rx-device = <&wcd_rx>; 44 qcom,rx-device = <&wcd_rx>;
45 qcom,tx-device = <&wcd_tx>; 45 qcom,tx-device = <&wcd_tx>;
46 46
47 reset-gpios = <&tlmm 43 GPIO_A 47 reset-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
48 48
49 vdd-buck-supply = <&vreg_s10b_ 49 vdd-buck-supply = <&vreg_s10b_1p8>;
50 vdd-rxtx-supply = <&vreg_s10b_ 50 vdd-rxtx-supply = <&vreg_s10b_1p8>;
51 vdd-io-supply = <&vreg_s10b_1p 51 vdd-io-supply = <&vreg_s10b_1p8>;
52 vdd-mic-bias-supply = <&vreg_b 52 vdd-mic-bias-supply = <&vreg_bob>;
53 53
54 #sound-dai-cells = <1>; 54 #sound-dai-cells = <1>;
55 }; 55 };
56 56
57 chosen { 57 chosen {
58 stdout-path = "serial0:115200n 58 stdout-path = "serial0:115200n8";
59 }; 59 };
60 60
61 hdmi-out { 61 hdmi-out {
62 compatible = "hdmi-connector"; 62 compatible = "hdmi-connector";
63 type = "a"; 63 type = "a";
64 64
65 port { 65 port {
66 hdmi_connector_out: en 66 hdmi_connector_out: endpoint {
67 remote-endpoin 67 remote-endpoint = <<9611_out>;
68 }; 68 };
69 }; 69 };
70 }; 70 };
71 71
72 lt9611_1v2: lt9611-vdd12-regulator { 72 lt9611_1v2: lt9611-vdd12-regulator {
73 compatible = "regulator-fixed" 73 compatible = "regulator-fixed";
74 regulator-name = "LT9611_1V2"; 74 regulator-name = "LT9611_1V2";
75 75
76 vin-supply = <&vph_pwr>; 76 vin-supply = <&vph_pwr>;
77 regulator-min-microvolt = <120 77 regulator-min-microvolt = <1200000>;
78 regulator-max-microvolt = <120 78 regulator-max-microvolt = <1200000>;
79 gpio = <&tlmm 9 GPIO_ACTIVE_HI 79 gpio = <&tlmm 9 GPIO_ACTIVE_HIGH>;
80 enable-active-high; 80 enable-active-high;
81 }; 81 };
82 82
83 lt9611_3v3: lt9611-3v3-regulator { 83 lt9611_3v3: lt9611-3v3-regulator {
84 compatible = "regulator-fixed" 84 compatible = "regulator-fixed";
85 regulator-name = "LT9611_3V3"; 85 regulator-name = "LT9611_3V3";
86 86
87 vin-supply = <&vreg_bob>; 87 vin-supply = <&vreg_bob>;
88 gpio = <&tlmm 109 GPIO_ACTIVE_ 88 gpio = <&tlmm 109 GPIO_ACTIVE_HIGH>;
89 regulator-min-microvolt = <330 89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <330 90 regulator-max-microvolt = <3300000>;
91 enable-active-high; 91 enable-active-high;
92 }; 92 };
93 93
94 pmic-glink { 94 pmic-glink {
95 compatible = "qcom,sm8450-pmic 95 compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
96 #address-cells = <1>; 96 #address-cells = <1>;
97 #size-cells = <0>; 97 #size-cells = <0>;
98 orientation-gpios = <&tlmm 91 98 orientation-gpios = <&tlmm 91 GPIO_ACTIVE_HIGH>;
99 99
100 connector@0 { 100 connector@0 {
101 compatible = "usb-c-co 101 compatible = "usb-c-connector";
102 reg = <0>; 102 reg = <0>;
103 power-role = "dual"; 103 power-role = "dual";
104 data-role = "dual"; 104 data-role = "dual";
105 105
106 ports { 106 ports {
107 #address-cells 107 #address-cells = <1>;
108 #size-cells = 108 #size-cells = <0>;
109 109
110 port@0 { 110 port@0 {
111 reg = 111 reg = <0>;
112 112
113 pmic_g 113 pmic_glink_hs_in: endpoint {
114 114 remote-endpoint = <&usb_1_dwc3_hs>;
115 }; 115 };
116 }; 116 };
117 117
118 port@1 { 118 port@1 {
119 reg = 119 reg = <1>;
120 120
121 pmic_g 121 pmic_glink_ss_in: endpoint {
122 122 remote-endpoint = <&usb_1_qmpphy_out>;
123 }; 123 };
124 }; 124 };
125 125
126 port@2 { 126 port@2 {
127 reg = 127 reg = <2>;
128 128
129 pmic_g 129 pmic_glink_sbu: endpoint {
130 130 remote-endpoint = <&fsa4480_sbu_mux>;
131 }; 131 };
132 }; 132 };
133 133
134 }; 134 };
135 }; 135 };
136 }; 136 };
137 137
138 thermal-zones { 138 thermal-zones {
139 camera-thermal { 139 camera-thermal {
140 polling-delay-passive 140 polling-delay-passive = <250>;
141 141
142 thermal-sensors = <&pm 142 thermal-sensors = <&pmk8350_adc_tm 2>;
143 143
144 trips { 144 trips {
145 active-config0 145 active-config0 {
146 temper 146 temperature = <75000>;
147 hyster 147 hysteresis = <4000>;
148 type = 148 type = "passive";
149 }; 149 };
150 }; 150 };
151 }; 151 };
152 152
153 rear-tof-thermal { 153 rear-tof-thermal {
154 polling-delay-passive 154 polling-delay-passive = <250>;
155 155
156 thermal-sensors = <&pm 156 thermal-sensors = <&pmk8350_adc_tm 5>;
157 157
158 trips { 158 trips {
159 active-config0 159 active-config0 {
160 temper 160 temperature = <75000>;
161 hyster 161 hysteresis = <4000>;
162 type = 162 type = "passive";
163 }; 163 };
164 }; 164 };
165 }; 165 };
166 166
167 skin-msm-thermal { 167 skin-msm-thermal {
168 polling-delay-passive 168 polling-delay-passive = <250>;
169 169
170 thermal-sensors = <&pm 170 thermal-sensors = <&pmk8350_adc_tm 1>;
171 171
172 trips { 172 trips {
173 active-config0 173 active-config0 {
174 temper 174 temperature = <75000>;
175 hyster 175 hysteresis = <4000>;
176 type = 176 type = "passive";
177 }; 177 };
178 }; 178 };
179 }; 179 };
180 180
181 therm1-thermal { 181 therm1-thermal {
182 polling-delay-passive 182 polling-delay-passive = <250>;
183 183
184 thermal-sensors = <&pm 184 thermal-sensors = <&pmk8350_adc_tm 3>;
185 185
186 trips { 186 trips {
187 active-config0 187 active-config0 {
188 temper 188 temperature = <75000>;
189 hyster 189 hysteresis = <4000>;
190 type = 190 type = "passive";
191 }; 191 };
192 }; 192 };
193 }; 193 };
194 194
195 therm2-thermal { 195 therm2-thermal {
196 polling-delay-passive 196 polling-delay-passive = <250>;
197 197
198 thermal-sensors = <&pm 198 thermal-sensors = <&pmk8350_adc_tm 6>;
199 199
200 trips { 200 trips {
201 active-config0 201 active-config0 {
202 temper 202 temperature = <75000>;
203 hyster 203 hysteresis = <4000>;
204 type = 204 type = "passive";
205 }; 205 };
206 }; 206 };
207 }; 207 };
208 208
209 usb-conn-thermal { 209 usb-conn-thermal {
210 polling-delay-passive 210 polling-delay-passive = <250>;
211 211
212 thermal-sensors = <&pm 212 thermal-sensors = <&pmk8350_adc_tm 7>;
213 213
214 trips { 214 trips {
215 active-config0 215 active-config0 {
216 temper 216 temperature = <75000>;
217 hyster 217 hysteresis = <4000>;
218 type = 218 type = "passive";
219 }; 219 };
220 }; 220 };
221 }; 221 };
222 222
223 wide-rfc-thermal { 223 wide-rfc-thermal {
224 polling-delay-passive 224 polling-delay-passive = <250>;
225 225
226 thermal-sensors = <&pm 226 thermal-sensors = <&pmk8350_adc_tm 4>;
227 227
228 trips { 228 trips {
229 active-config0 229 active-config0 {
230 temper 230 temperature = <75000>;
231 hyster 231 hysteresis = <4000>;
232 type = 232 type = "passive";
233 }; 233 };
234 }; 234 };
235 }; 235 };
236 236
237 xo-thermal { 237 xo-thermal {
238 thermal-sensors = <&pm 238 thermal-sensors = <&pmk8350_adc_tm 0>;
239 239
240 trips { 240 trips {
241 active-config0 241 active-config0 {
242 temper 242 temperature = <50000>;
243 hyster 243 hysteresis = <4000>;
244 type = 244 type = "passive";
245 }; 245 };
246 }; 246 };
247 }; 247 };
248 }; 248 };
249 249
250 vph_pwr: vph-pwr-regulator { 250 vph_pwr: vph-pwr-regulator {
251 compatible = "regulator-fixed" 251 compatible = "regulator-fixed";
252 regulator-name = "vph_pwr"; 252 regulator-name = "vph_pwr";
253 regulator-min-microvolt = <370 253 regulator-min-microvolt = <3700000>;
254 regulator-max-microvolt = <370 254 regulator-max-microvolt = <3700000>;
255 255
256 regulator-always-on; 256 regulator-always-on;
257 regulator-boot-on; 257 regulator-boot-on;
258 }; 258 };
259 }; 259 };
260 260
261 &apps_rsc { 261 &apps_rsc {
262 regulators-0 { 262 regulators-0 {
263 compatible = "qcom,pm8350-rpmh 263 compatible = "qcom,pm8350-rpmh-regulators";
264 qcom,pmic-id = "b"; 264 qcom,pmic-id = "b";
265 265
266 vdd-s1-supply = <&vph_pwr>; 266 vdd-s1-supply = <&vph_pwr>;
267 vdd-s2-supply = <&vph_pwr>; 267 vdd-s2-supply = <&vph_pwr>;
268 vdd-s3-supply = <&vph_pwr>; 268 vdd-s3-supply = <&vph_pwr>;
269 vdd-s4-supply = <&vph_pwr>; 269 vdd-s4-supply = <&vph_pwr>;
270 vdd-s5-supply = <&vph_pwr>; 270 vdd-s5-supply = <&vph_pwr>;
271 vdd-s6-supply = <&vph_pwr>; 271 vdd-s6-supply = <&vph_pwr>;
272 vdd-s7-supply = <&vph_pwr>; 272 vdd-s7-supply = <&vph_pwr>;
273 vdd-s8-supply = <&vph_pwr>; 273 vdd-s8-supply = <&vph_pwr>;
274 vdd-s9-supply = <&vph_pwr>; 274 vdd-s9-supply = <&vph_pwr>;
275 vdd-s10-supply = <&vph_pwr>; 275 vdd-s10-supply = <&vph_pwr>;
276 vdd-s11-supply = <&vph_pwr>; 276 vdd-s11-supply = <&vph_pwr>;
277 vdd-s12-supply = <&vph_pwr>; 277 vdd-s12-supply = <&vph_pwr>;
278 278
279 vdd-l1-l4-supply = <&vreg_s11b 279 vdd-l1-l4-supply = <&vreg_s11b_0p95>;
280 vdd-l2-l7-supply = <&vreg_bob> 280 vdd-l2-l7-supply = <&vreg_bob>;
281 vdd-l3-l5-supply = <&vreg_bob> 281 vdd-l3-l5-supply = <&vreg_bob>;
282 vdd-l6-l9-l10-supply = <&vreg_ 282 vdd-l6-l9-l10-supply = <&vreg_s12b_1p25>;
283 vdd-l8-supply = <&vreg_s2h_0p9 283 vdd-l8-supply = <&vreg_s2h_0p95>;
284 284
285 vreg_s10b_1p8: smps10 { 285 vreg_s10b_1p8: smps10 {
286 regulator-name = "vreg 286 regulator-name = "vreg_s10b_1p8";
287 regulator-min-microvol 287 regulator-min-microvolt = <1800000>;
288 regulator-max-microvol 288 regulator-max-microvolt = <1800000>;
289 }; 289 };
290 290
291 vreg_s11b_0p95: smps11 { 291 vreg_s11b_0p95: smps11 {
292 regulator-name = "vreg 292 regulator-name = "vreg_s11b_0p95";
293 regulator-min-microvol 293 regulator-min-microvolt = <966000>;
294 regulator-max-microvol 294 regulator-max-microvolt = <1104000>;
295 }; 295 };
296 296
297 vreg_s12b_1p25: smps12 { 297 vreg_s12b_1p25: smps12 {
298 regulator-name = "vreg 298 regulator-name = "vreg_s12b_1p25";
299 regulator-min-microvol 299 regulator-min-microvolt = <1350000>;
300 regulator-max-microvol 300 regulator-max-microvolt = <1400000>;
301 }; 301 };
302 302
303 vreg_l1b_0p91: ldo1 { 303 vreg_l1b_0p91: ldo1 {
304 regulator-name = "vreg 304 regulator-name = "vreg_l1b_0p91";
305 regulator-min-microvol 305 regulator-min-microvolt = <912000>;
306 regulator-max-microvol 306 regulator-max-microvolt = <920000>;
307 regulator-initial-mode 307 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
308 }; 308 };
309 309
310 vreg_l2b_3p07: ldo2 { 310 vreg_l2b_3p07: ldo2 {
311 regulator-name = "vreg 311 regulator-name = "vreg_l2b_3p07";
312 regulator-min-microvol 312 regulator-min-microvolt = <3072000>;
313 regulator-max-microvol 313 regulator-max-microvolt = <3072000>;
314 regulator-initial-mode 314 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
315 }; 315 };
316 316
317 vreg_l3b_0p9: ldo3 { 317 vreg_l3b_0p9: ldo3 {
318 regulator-name = "vreg 318 regulator-name = "vreg_l3b_0p9";
319 regulator-min-microvol 319 regulator-min-microvolt = <904000>;
320 regulator-max-microvol 320 regulator-max-microvolt = <904000>;
321 regulator-initial-mode 321 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
322 }; 322 };
323 323
324 vreg_l5b_0p88: ldo5 { 324 vreg_l5b_0p88: ldo5 {
325 regulator-name = "vreg 325 regulator-name = "vreg_l5b_0p88";
326 regulator-min-microvol 326 regulator-min-microvolt = <880000>;
327 regulator-max-microvol 327 regulator-max-microvolt = <888000>;
328 regulator-initial-mode 328 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
329 }; 329 };
330 330
331 vreg_l6b_1p2: ldo6 { 331 vreg_l6b_1p2: ldo6 {
332 regulator-name = "vreg 332 regulator-name = "vreg_l6b_1p2";
333 regulator-min-microvol 333 regulator-min-microvolt = <1200000>;
334 regulator-max-microvol 334 regulator-max-microvolt = <1200000>;
335 regulator-initial-mode 335 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
336 }; 336 };
337 337
338 vreg_l7b_2p5: ldo7 { 338 vreg_l7b_2p5: ldo7 {
339 regulator-name = "vreg 339 regulator-name = "vreg_l7b_2p5";
340 regulator-min-microvol 340 regulator-min-microvolt = <2504000>;
341 regulator-max-microvol 341 regulator-max-microvolt = <2504000>;
342 regulator-initial-mode 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 343 };
344 344
345 vreg_l9b_1p2: ldo9 { 345 vreg_l9b_1p2: ldo9 {
346 regulator-name = "vreg 346 regulator-name = "vreg_l9b_1p2";
347 regulator-min-microvol 347 regulator-min-microvolt = <1200000>;
348 regulator-max-microvol 348 regulator-max-microvolt = <1200000>;
349 regulator-initial-mode 349 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
350 }; 350 };
351 }; 351 };
352 352
353 regulators-1 { 353 regulators-1 {
354 compatible = "qcom,pm8350c-rpm 354 compatible = "qcom,pm8350c-rpmh-regulators";
355 qcom,pmic-id = "c"; 355 qcom,pmic-id = "c";
356 356
357 vdd-s1-supply = <&vph_pwr>; 357 vdd-s1-supply = <&vph_pwr>;
358 vdd-s2-supply = <&vph_pwr>; 358 vdd-s2-supply = <&vph_pwr>;
359 vdd-s3-supply = <&vph_pwr>; 359 vdd-s3-supply = <&vph_pwr>;
360 vdd-s4-supply = <&vph_pwr>; 360 vdd-s4-supply = <&vph_pwr>;
361 vdd-s5-supply = <&vph_pwr>; 361 vdd-s5-supply = <&vph_pwr>;
362 vdd-s6-supply = <&vph_pwr>; 362 vdd-s6-supply = <&vph_pwr>;
363 vdd-s7-supply = <&vph_pwr>; 363 vdd-s7-supply = <&vph_pwr>;
364 vdd-s8-supply = <&vph_pwr>; 364 vdd-s8-supply = <&vph_pwr>;
365 vdd-s9-supply = <&vph_pwr>; 365 vdd-s9-supply = <&vph_pwr>;
366 vdd-s10-supply = <&vph_pwr>; 366 vdd-s10-supply = <&vph_pwr>;
367 367
368 vdd-l1-l12-supply = <&vreg_bob 368 vdd-l1-l12-supply = <&vreg_bob>;
369 vdd-l2-l8-supply = <&vreg_bob> 369 vdd-l2-l8-supply = <&vreg_bob>;
370 vdd-l3-l4-l5-l7-l13-supply = < 370 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
371 vdd-l6-l9-l11-supply = <&vreg_ 371 vdd-l6-l9-l11-supply = <&vreg_bob>;
372 vdd-l10-supply = <&vreg_s12b_1 372 vdd-l10-supply = <&vreg_s12b_1p25>;
373 373
374 vdd-bob-supply = <&vph_pwr>; 374 vdd-bob-supply = <&vph_pwr>;
375 375
376 vreg_s1c_1p86: smps1 { 376 vreg_s1c_1p86: smps1 {
377 regulator-name = "vreg 377 regulator-name = "vreg_s1c_1p86";
378 regulator-min-microvol 378 regulator-min-microvolt = <1800000>;
379 regulator-max-microvol 379 regulator-max-microvolt = <2024000>;
380 }; 380 };
381 381
382 vreg_s10c_1p05: smps10 { 382 vreg_s10c_1p05: smps10 {
383 regulator-name = "vreg 383 regulator-name = "vreg_s10c_1p05";
384 regulator-min-microvol 384 regulator-min-microvolt = <1000000>;
385 regulator-max-microvol 385 regulator-max-microvolt = <1100000>;
386 }; 386 };
387 387
388 vreg_bob: bob { 388 vreg_bob: bob {
389 regulator-name = "vreg 389 regulator-name = "vreg_bob";
390 regulator-min-microvol 390 regulator-min-microvolt = <3008000>;
391 regulator-max-microvol 391 regulator-max-microvolt = <3960000>;
392 regulator-initial-mode 392 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
393 }; 393 };
394 394
395 vreg_l1c_1p8: ldo1 { 395 vreg_l1c_1p8: ldo1 {
396 regulator-name = "vreg 396 regulator-name = "vreg_l1c_1p8";
397 regulator-min-microvol 397 regulator-min-microvolt = <1800000>;
398 regulator-max-microvol 398 regulator-max-microvolt = <1800000>;
399 regulator-initial-mode 399 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
400 }; 400 };
401 401
402 vreg_l3c_3p0: ldo3 { 402 vreg_l3c_3p0: ldo3 {
403 regulator-name = "vreg 403 regulator-name = "vreg_l3c_3p0";
404 regulator-min-microvol 404 regulator-min-microvolt = <3296000>;
405 regulator-max-microvol 405 regulator-max-microvolt = <3304000>;
406 regulator-initial-mode 406 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
407 }; 407 };
408 408
409 vreg_l4c_1p8: ldo4 { 409 vreg_l4c_1p8: ldo4 {
410 regulator-name = "vreg 410 regulator-name = "vreg_l4c_1p8";
411 regulator-min-microvol 411 regulator-min-microvolt = <1704000>;
412 regulator-max-microvol 412 regulator-max-microvolt = <3000000>;
413 regulator-initial-mode 413 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
414 }; 414 };
415 415
416 vreg_l5c_1p8: ldo5 { 416 vreg_l5c_1p8: ldo5 {
417 regulator-name = "vreg 417 regulator-name = "vreg_l5c_1p8";
418 regulator-min-microvol 418 regulator-min-microvolt = <1704000>;
419 regulator-max-microvol 419 regulator-max-microvolt = <3000000>;
420 regulator-initial-mode 420 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
421 }; 421 };
422 422
423 vreg_l6c_1p8: ldo6 { 423 vreg_l6c_1p8: ldo6 {
424 regulator-name = "vreg 424 regulator-name = "vreg_l6c_1p8";
425 regulator-min-microvol 425 regulator-min-microvolt = <1800000>;
426 regulator-max-microvol 426 regulator-max-microvolt = <3008000>;
427 regulator-initial-mode 427 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
428 }; 428 };
429 429
430 vreg_l7c_3p0: ldo7 { 430 vreg_l7c_3p0: ldo7 {
431 regulator-name = "vreg 431 regulator-name = "vreg_l7c_3p0";
432 regulator-min-microvol 432 regulator-min-microvolt = <3008000>;
433 regulator-max-microvol 433 regulator-max-microvolt = <3008000>;
434 regulator-initial-mode 434 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
435 }; 435 };
436 436
437 vreg_l8c_1p8: ldo8 { 437 vreg_l8c_1p8: ldo8 {
438 regulator-name = "vreg 438 regulator-name = "vreg_l8c_1p8";
439 regulator-min-microvol 439 regulator-min-microvolt = <1800000>;
440 regulator-max-microvol 440 regulator-max-microvolt = <1800000>;
441 regulator-initial-mode 441 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
442 }; 442 };
443 443
444 vreg_l9c_2p96: ldo9 { 444 vreg_l9c_2p96: ldo9 {
445 regulator-name = "vreg 445 regulator-name = "vreg_l9c_2p96";
446 regulator-min-microvol 446 regulator-min-microvolt = <2960000>;
447 regulator-max-microvol 447 regulator-max-microvolt = <3008000>;
448 regulator-initial-mode 448 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
449 }; 449 };
450 450
451 vreg_l12c_1p8: ldo12 { 451 vreg_l12c_1p8: ldo12 {
452 regulator-name = "vreg 452 regulator-name = "vreg_l12c_1p8";
453 regulator-min-microvol 453 regulator-min-microvolt = <1800000>;
454 regulator-max-microvol 454 regulator-max-microvolt = <1968000>;
455 regulator-initial-mode 455 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
456 }; 456 };
457 457
458 vreg_l13c_3p0: ldo13 { 458 vreg_l13c_3p0: ldo13 {
459 regulator-name = "vreg 459 regulator-name = "vreg_l13c_3p0";
460 regulator-min-microvol 460 regulator-min-microvolt = <3000000>;
461 regulator-max-microvol 461 regulator-max-microvolt = <3000000>;
462 regulator-initial-mode 462 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
463 }; 463 };
464 }; 464 };
465 465
466 regulators-2 { 466 regulators-2 {
467 compatible = "qcom,pm8450-rpmh 467 compatible = "qcom,pm8450-rpmh-regulators";
468 qcom,pmic-id = "h"; 468 qcom,pmic-id = "h";
469 469
470 vdd-s1-supply = <&vph_pwr>; 470 vdd-s1-supply = <&vph_pwr>;
471 vdd-s2-supply = <&vph_pwr>; 471 vdd-s2-supply = <&vph_pwr>;
472 vdd-s3-supply = <&vph_pwr>; 472 vdd-s3-supply = <&vph_pwr>;
473 vdd-s4-supply = <&vph_pwr>; 473 vdd-s4-supply = <&vph_pwr>;
474 vdd-s5-supply = <&vph_pwr>; 474 vdd-s5-supply = <&vph_pwr>;
475 vdd-s6-supply = <&vph_pwr>; 475 vdd-s6-supply = <&vph_pwr>;
476 476
477 vdd-l2-supply = <&vreg_bob>; 477 vdd-l2-supply = <&vreg_bob>;
478 vdd-l3-supply = <&vreg_bob>; 478 vdd-l3-supply = <&vreg_bob>;
479 vdd-l4-supply = <&vreg_bob>; 479 vdd-l4-supply = <&vreg_bob>;
480 480
481 vreg_s2h_0p95: smps2 { 481 vreg_s2h_0p95: smps2 {
482 regulator-name = "vreg 482 regulator-name = "vreg_s2h_0p95";
483 regulator-min-microvol 483 regulator-min-microvolt = <848000>;
484 regulator-max-microvol 484 regulator-max-microvolt = <1104000>;
485 }; 485 };
486 486
487 vreg_s3h_0p5: smps3 { 487 vreg_s3h_0p5: smps3 {
488 regulator-name = "vreg 488 regulator-name = "vreg_s3h_0p5";
489 regulator-min-microvol 489 regulator-min-microvolt = <500000>;
490 regulator-max-microvol 490 regulator-max-microvolt = <500000>;
491 }; 491 };
492 492
493 vreg_l2h_0p91: ldo2 { 493 vreg_l2h_0p91: ldo2 {
494 regulator-name = "vreg 494 regulator-name = "vreg_l2h_0p91";
495 regulator-min-microvol 495 regulator-min-microvolt = <880000>;
496 regulator-max-microvol 496 regulator-max-microvolt = <912000>;
497 regulator-initial-mode 497 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
498 }; 498 };
499 499
500 vreg_l3h_0p91: ldo3 { 500 vreg_l3h_0p91: ldo3 {
501 regulator-name = "vreg 501 regulator-name = "vreg_l3h_0p91";
502 regulator-min-microvol 502 regulator-min-microvolt = <912000>;
503 regulator-max-microvol 503 regulator-max-microvolt = <912000>;
504 regulator-initial-mode 504 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
505 }; 505 };
506 }; 506 };
507 507
508 regulators-3 { 508 regulators-3 {
509 compatible = "qcom,pmr735a-rpm 509 compatible = "qcom,pmr735a-rpmh-regulators";
510 qcom,pmic-id = "e"; 510 qcom,pmic-id = "e";
511 511
512 vdd-s1-supply = <&vph_pwr>; 512 vdd-s1-supply = <&vph_pwr>;
513 vdd-s2-supply = <&vph_pwr>; 513 vdd-s2-supply = <&vph_pwr>;
514 vdd-s3-supply = <&vph_pwr>; 514 vdd-s3-supply = <&vph_pwr>;
515 515
516 vdd-l1-l2-supply = <&vreg_s2e_ 516 vdd-l1-l2-supply = <&vreg_s2e_0p85>;
517 vdd-l3-supply = <&vreg_s1e_1p2 517 vdd-l3-supply = <&vreg_s1e_1p25>;
518 vdd-l4-supply = <&vreg_s1c_1p8 518 vdd-l4-supply = <&vreg_s1c_1p86>;
519 vdd-l5-l6-supply = <&vreg_s1c_ 519 vdd-l5-l6-supply = <&vreg_s1c_1p86>;
520 vdd-l7-bob-supply = <&vreg_bob 520 vdd-l7-bob-supply = <&vreg_bob>;
521 521
522 vreg_s1e_1p25: smps1 { 522 vreg_s1e_1p25: smps1 {
523 regulator-name = "vreg 523 regulator-name = "vreg_s1e_1p25";
524 regulator-min-microvol 524 regulator-min-microvolt = <1200000>;
525 regulator-max-microvol 525 regulator-max-microvolt = <1296000>;
526 }; 526 };
527 527
528 vreg_s2e_0p85: smps2 { 528 vreg_s2e_0p85: smps2 {
529 regulator-name = "vreg 529 regulator-name = "vreg_s2e_0p85";
530 regulator-min-microvol 530 regulator-min-microvolt = <500000>;
531 regulator-max-microvol 531 regulator-max-microvolt = <1040000>;
532 }; 532 };
533 533
534 vreg_l1e_0p8: ldo1 { 534 vreg_l1e_0p8: ldo1 {
535 regulator-name = "vreg 535 regulator-name = "vreg_l1e_0p8";
536 regulator-min-microvol 536 regulator-min-microvolt = <800000>;
537 regulator-max-microvol 537 regulator-max-microvolt = <800000>;
538 }; 538 };
539 539
540 vreg_l2e_0p8: ldo2 { 540 vreg_l2e_0p8: ldo2 {
541 regulator-name = "vreg 541 regulator-name = "vreg_l2e_0p8";
542 regulator-min-microvol 542 regulator-min-microvolt = <800000>;
543 regulator-max-microvol 543 regulator-max-microvolt = <800000>;
544 }; 544 };
545 545
546 vreg_l3e_1p2: ldo3 { 546 vreg_l3e_1p2: ldo3 {
547 regulator-name = "vreg 547 regulator-name = "vreg_l3e_1p2";
548 regulator-min-microvol 548 regulator-min-microvolt = <1200000>;
549 regulator-max-microvol 549 regulator-max-microvolt = <1200000>;
550 }; 550 };
551 551
552 vreg_l4e_1p7: ldo4 { 552 vreg_l4e_1p7: ldo4 {
553 regulator-name = "vreg 553 regulator-name = "vreg_l4e_1p7";
554 regulator-min-microvol 554 regulator-min-microvolt = <1776000>;
555 regulator-max-microvol 555 regulator-max-microvolt = <1776000>;
556 }; 556 };
557 557
558 vreg_l5e_0p88: ldo5 { 558 vreg_l5e_0p88: ldo5 {
559 regulator-name = "vreg 559 regulator-name = "vreg_l5e_0p88";
560 regulator-min-microvol 560 regulator-min-microvolt = <880000>;
561 regulator-max-microvol 561 regulator-max-microvolt = <880000>;
562 }; 562 };
563 563
564 vreg_l6e_1p2: ldo6 { 564 vreg_l6e_1p2: ldo6 {
565 regulator-name = "vreg 565 regulator-name = "vreg_l6e_1p2";
566 regulator-min-microvol 566 regulator-min-microvolt = <1200000>;
567 regulator-max-microvol 567 regulator-max-microvolt = <1200000>;
568 }; 568 };
569 569
570 vreg_l7e_2p8: ldo7 { 570 vreg_l7e_2p8: ldo7 {
571 regulator-name = "vreg 571 regulator-name = "vreg_l7e_2p8";
572 regulator-min-microvol 572 regulator-min-microvolt = <2800000>;
573 regulator-max-microvol 573 regulator-max-microvolt = <2800000>;
574 }; 574 };
575 }; 575 };
576 }; 576 };
577 577
578 &dispcc { 578 &dispcc {
579 status = "okay"; 579 status = "okay";
580 }; 580 };
581 581
582 &gpu { 582 &gpu {
583 status = "okay"; 583 status = "okay";
584 584
585 zap-shader { 585 zap-shader {
586 firmware-name = "qcom/sm8450/a 586 firmware-name = "qcom/sm8450/a730_zap.mbn";
587 }; 587 };
588 }; 588 };
589 589
590 &i2c9 { 590 &i2c9 {
591 clock-frequency = <400000>; 591 clock-frequency = <400000>;
592 status = "okay"; 592 status = "okay";
593 593
594 lt9611_codec: hdmi-bridge@2b { 594 lt9611_codec: hdmi-bridge@2b {
595 compatible = "lontium,lt9611ux 595 compatible = "lontium,lt9611uxc";
596 reg = <0x2b>; 596 reg = <0x2b>;
597 597
598 interrupts-extended = <&tlmm 4 598 interrupts-extended = <&tlmm 44 IRQ_TYPE_EDGE_FALLING>;
599 599
600 reset-gpios = <&tlmm 107 GPIO_ 600 reset-gpios = <&tlmm 107 GPIO_ACTIVE_HIGH>;
601 601
602 vdd-supply = <<9611_1v2>; 602 vdd-supply = <<9611_1v2>;
603 vcc-supply = <<9611_3v3>; 603 vcc-supply = <<9611_3v3>;
604 604
605 pinctrl-names = "default"; 605 pinctrl-names = "default";
606 pinctrl-0 = <<9611_irq_pin & 606 pinctrl-0 = <<9611_irq_pin <9611_rst_pin>;
607 607
608 ports { 608 ports {
609 #address-cells = <1>; 609 #address-cells = <1>;
610 #size-cells = <0>; 610 #size-cells = <0>;
611 611
612 port@0 { 612 port@0 {
613 reg = <0>; 613 reg = <0>;
614 614
615 lt9611_a: endp 615 lt9611_a: endpoint {
616 remote 616 remote-endpoint = <&mdss_dsi0_out>;
617 }; 617 };
618 }; 618 };
619 619
620 port@2 { 620 port@2 {
621 reg = <2>; 621 reg = <2>;
622 622
623 lt9611_out: en 623 lt9611_out: endpoint {
624 remote 624 remote-endpoint = <&hdmi_connector_out>;
625 }; 625 };
626 }; 626 };
627 }; 627 };
628 }; 628 };
629 }; 629 };
630 630
631 &i2c5 { 631 &i2c5 {
632 clock-frequency = <100000>; 632 clock-frequency = <100000>;
633 633
634 status = "okay"; 634 status = "okay";
635 635
636 typec-mux@42 { 636 typec-mux@42 {
637 compatible = "fcs,fsa4480"; 637 compatible = "fcs,fsa4480";
638 reg = <0x42>; 638 reg = <0x42>;
639 639
640 interrupts-extended = <&tlmm 2 640 interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
641 641
642 vcc-supply = <&vreg_bob>; 642 vcc-supply = <&vreg_bob>;
643 mode-switch; 643 mode-switch;
644 orientation-switch; 644 orientation-switch;
645 645
646 port { 646 port {
647 fsa4480_sbu_mux: endpo 647 fsa4480_sbu_mux: endpoint {
648 remote-endpoin 648 remote-endpoint = <&pmic_glink_sbu>;
649 }; 649 };
650 }; 650 };
651 }; 651 };
652 }; 652 };
653 653
654 &mdss { 654 &mdss {
655 status = "okay"; 655 status = "okay";
656 }; 656 };
657 657
658 &mdss_dsi0 { 658 &mdss_dsi0 {
659 vdda-supply = <&vreg_l6b_1p2>; 659 vdda-supply = <&vreg_l6b_1p2>;
660 status = "okay"; 660 status = "okay";
661 }; 661 };
662 662
663 &mdss_dsi0_out { 663 &mdss_dsi0_out {
664 remote-endpoint = <<9611_a>; 664 remote-endpoint = <<9611_a>;
665 data-lanes = <0 1 2 3>; 665 data-lanes = <0 1 2 3>;
666 }; 666 };
667 667
668 &mdss_dsi0_phy { 668 &mdss_dsi0_phy {
669 vdds-supply = <&vreg_l5b_0p88>; 669 vdds-supply = <&vreg_l5b_0p88>;
670 status = "okay"; 670 status = "okay";
671 }; 671 };
672 672
673 &mdss_dp0 { 673 &mdss_dp0 {
674 status = "okay"; 674 status = "okay";
675 }; 675 };
676 676
677 &mdss_dp0_out { 677 &mdss_dp0_out {
678 data-lanes = <0 1>; 678 data-lanes = <0 1>;
679 }; 679 };
680 680
681 &pcie0 { 681 &pcie0 {
682 status = "okay"; 682 status = "okay";
683 max-link-speed = <2>; 683 max-link-speed = <2>;
684 }; 684 };
685 685
686 &pcie0_phy { 686 &pcie0_phy {
687 status = "okay"; 687 status = "okay";
688 vdda-phy-supply = <&vreg_l5b_0p88>; 688 vdda-phy-supply = <&vreg_l5b_0p88>;
689 vdda-pll-supply = <&vreg_l6b_1p2>; 689 vdda-pll-supply = <&vreg_l6b_1p2>;
690 }; 690 };
691 691
692 &pcie1 { 692 &pcie1 {
693 status = "okay"; 693 status = "okay";
694 }; 694 };
695 695
696 &pcie1_phy { 696 &pcie1_phy {
697 status = "okay"; 697 status = "okay";
698 vdda-phy-supply = <&vreg_l2h_0p91>; 698 vdda-phy-supply = <&vreg_l2h_0p91>;
699 vdda-pll-supply = <&vreg_l6b_1p2>; 699 vdda-pll-supply = <&vreg_l6b_1p2>;
700 }; 700 };
701 701
702 &pm8350_temp_alarm { 702 &pm8350_temp_alarm {
703 io-channels = <&pmk8350_vadc PM8350_AD 703 io-channels = <&pmk8350_vadc PM8350_ADC7_DIE_TEMP(1)>;
704 io-channel-names = "thermal"; 704 io-channel-names = "thermal";
705 }; 705 };
706 706
707 &pm8350b_temp_alarm { 707 &pm8350b_temp_alarm {
708 io-channels = <&pmk8350_vadc PM8350B_A 708 io-channels = <&pmk8350_vadc PM8350B_ADC7_DIE_TEMP>;
709 io-channel-names = "thermal"; 709 io-channel-names = "thermal";
710 }; 710 };
711 711
712 &pmr735a_temp_alarm { 712 &pmr735a_temp_alarm {
713 io-channels = <&pmk8350_vadc PMR735A_A 713 io-channels = <&pmk8350_vadc PMR735A_ADC7_DIE_TEMP>;
714 io-channel-names = "thermal"; 714 io-channel-names = "thermal";
715 }; 715 };
716 716
717 &pmk8350_adc_tm { 717 &pmk8350_adc_tm {
718 status = "okay"; 718 status = "okay";
719 719
720 xo-therm@0 { 720 xo-therm@0 {
721 reg = <0>; 721 reg = <0>;
722 io-channels = <&pmk8350_vadc P 722 io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>;
723 qcom,ratiometric; 723 qcom,ratiometric;
724 qcom,hw-settle-time-us = <200> 724 qcom,hw-settle-time-us = <200>;
725 }; 725 };
726 726
727 skin-msm-therm@1 { 727 skin-msm-therm@1 {
728 reg = <1>; 728 reg = <1>;
729 io-channels = <&pmk8350_vadc P 729 io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM1_100K_PU(1)>;
730 qcom,ratiometric; 730 qcom,ratiometric;
731 qcom,hw-settle-time-us = <200> 731 qcom,hw-settle-time-us = <200>;
732 }; 732 };
733 733
734 camera-therm@2 { 734 camera-therm@2 {
735 reg = <2>; 735 reg = <2>;
736 io-channels = <&pmk8350_vadc P 736 io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM2_100K_PU(1)>;
737 qcom,ratiometric; 737 qcom,ratiometric;
738 qcom,hw-settle-time-us = <200> 738 qcom,hw-settle-time-us = <200>;
739 }; 739 };
740 740
741 therm1-therm@3 { 741 therm1-therm@3 {
742 reg = <3>; 742 reg = <3>;
743 io-channels = <&pmk8350_vadc P 743 io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM3_100K_PU(1)>;
744 qcom,ratiometric; 744 qcom,ratiometric;
745 qcom,hw-settle-time-us = <200> 745 qcom,hw-settle-time-us = <200>;
746 }; 746 };
747 747
748 wide-rfc-therm@4 { 748 wide-rfc-therm@4 {
749 reg = <4>; 749 reg = <4>;
750 io-channels = <&pmk8350_vadc P 750 io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
751 qcom,ratiometric; 751 qcom,ratiometric;
752 qcom,hw-settle-time-us = <200> 752 qcom,hw-settle-time-us = <200>;
753 }; 753 };
754 754
755 rear-tof-therm@5 { 755 rear-tof-therm@5 {
756 reg = <5>; 756 reg = <5>;
757 io-channels = <&pmk8350_vadc P 757 io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM5_100K_PU(1)>;
758 qcom,ratiometric; 758 qcom,ratiometric;
759 qcom,hw-settle-time-us = <200> 759 qcom,hw-settle-time-us = <200>;
760 }; 760 };
761 761
762 therm2-therm@6 { 762 therm2-therm@6 {
763 reg = <6>; 763 reg = <6>;
764 io-channels = <&pmk8350_vadc P 764 io-channels = <&pmk8350_vadc PM8350_ADC7_GPIO3_100K_PU(1)>;
765 qcom,ratiometric; 765 qcom,ratiometric;
766 qcom,hw-settle-time-us = <200> 766 qcom,hw-settle-time-us = <200>;
767 }; 767 };
768 768
769 usb-conn-therm@7 { 769 usb-conn-therm@7 {
770 reg = <7>; 770 reg = <7>;
771 io-channels = <&pmk8350_vadc P 771 io-channels = <&pmk8350_vadc PM8350B_ADC7_AMUX_THM5_100K_PU>;
772 qcom,ratiometric; 772 qcom,ratiometric;
773 qcom,hw-settle-time-us = <200> 773 qcom,hw-settle-time-us = <200>;
774 }; 774 };
775 }; 775 };
776 776
777 &pmk8350_vadc { 777 &pmk8350_vadc {
778 status = "okay"; 778 status = "okay";
779 779
780 channel@3 { 780 channel@3 {
781 reg = <PMK8350_ADC7_DIE_TEMP>; 781 reg = <PMK8350_ADC7_DIE_TEMP>;
782 label = "pmk8350_die_temp"; 782 label = "pmk8350_die_temp";
783 }; 783 };
784 784
785 channel@44 { 785 channel@44 {
786 reg = <PMK8350_ADC7_AMUX_THM1_ 786 reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>;
787 qcom,hw-settle-time = <200>; 787 qcom,hw-settle-time = <200>;
788 qcom,ratiometric; 788 qcom,ratiometric;
789 label = "pmk8350_xo_therm"; 789 label = "pmk8350_xo_therm";
790 }; 790 };
791 791
792 channel@103 { 792 channel@103 {
793 reg = <PM8350_ADC7_DIE_TEMP(1) 793 reg = <PM8350_ADC7_DIE_TEMP(1)>;
794 label = "pm8350_die_temp"; 794 label = "pm8350_die_temp";
795 }; 795 };
796 796
797 channel@144 { 797 channel@144 {
798 reg = <PM8350_ADC7_AMUX_THM1_1 798 reg = <PM8350_ADC7_AMUX_THM1_100K_PU(1)>;
799 qcom,hw-settle-time = <200>; 799 qcom,hw-settle-time = <200>;
800 qcom,ratiometric; 800 qcom,ratiometric;
801 label = "skin_msm_temp"; 801 label = "skin_msm_temp";
802 }; 802 };
803 803
804 channel@145 { 804 channel@145 {
805 reg = <PM8350_ADC7_AMUX_THM2_1 805 reg = <PM8350_ADC7_AMUX_THM2_100K_PU(1)>;
806 qcom,hw-settle-time = <200>; 806 qcom,hw-settle-time = <200>;
807 qcom,ratiometric; 807 qcom,ratiometric;
808 label = "camera_temp"; 808 label = "camera_temp";
809 }; 809 };
810 810
811 channel@146 { 811 channel@146 {
812 reg = <PM8350_ADC7_AMUX_THM3_1 812 reg = <PM8350_ADC7_AMUX_THM3_100K_PU(1)>;
813 qcom,hw-settle-time = <200>; 813 qcom,hw-settle-time = <200>;
814 qcom,ratiometric; 814 qcom,ratiometric;
815 label = "therm1_temp"; 815 label = "therm1_temp";
816 }; 816 };
817 817
818 channel@147 { 818 channel@147 {
819 reg = <PM8350_ADC7_AMUX_THM4_1 819 reg = <PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
820 qcom,hw-settle-time = <200>; 820 qcom,hw-settle-time = <200>;
821 qcom,ratiometric; 821 qcom,ratiometric;
822 label = "wide_rfc_temp"; 822 label = "wide_rfc_temp";
823 }; 823 };
824 824
825 channel@148 { 825 channel@148 {
826 reg = <PM8350_ADC7_AMUX_THM5_1 826 reg = <PM8350_ADC7_AMUX_THM5_100K_PU(1)>;
827 qcom,hw-settle-time = <200>; 827 qcom,hw-settle-time = <200>;
828 qcom,ratiometric; 828 qcom,ratiometric;
829 label = "rear_tof_temp"; 829 label = "rear_tof_temp";
830 }; 830 };
831 831
832 channel@14c { 832 channel@14c {
833 reg = <PM8350_ADC7_GPIO3_100K_ 833 reg = <PM8350_ADC7_GPIO3_100K_PU(1)>;
834 qcom,hw-settle-time = <200>; 834 qcom,hw-settle-time = <200>;
835 qcom,ratiometric; 835 qcom,ratiometric;
836 label = "therm2_temp"; 836 label = "therm2_temp";
837 }; 837 };
838 838
839 channel@303 { 839 channel@303 {
840 reg = <PM8350B_ADC7_DIE_TEMP>; 840 reg = <PM8350B_ADC7_DIE_TEMP>;
841 label = "pm8350b_die_temp"; 841 label = "pm8350b_die_temp";
842 }; 842 };
843 843
844 channel@348 { 844 channel@348 {
845 reg = <PM8350B_ADC7_AMUX_THM5_ 845 reg = <PM8350B_ADC7_AMUX_THM5_100K_PU>;
846 qcom,hw-settle-time = <200>; 846 qcom,hw-settle-time = <200>;
847 qcom,ratiometric; 847 qcom,ratiometric;
848 label = "usb_conn_temp"; 848 label = "usb_conn_temp";
849 }; 849 };
850 850
851 channel@403 { 851 channel@403 {
852 reg = <PMR735A_ADC7_DIE_TEMP>; 852 reg = <PMR735A_ADC7_DIE_TEMP>;
853 label = "pmr735a_die_temp"; 853 label = "pmr735a_die_temp";
854 }; 854 };
855 855
856 channel@44a { 856 channel@44a {
857 reg = <PMR735A_ADC7_GPIO1_100K 857 reg = <PMR735A_ADC7_GPIO1_100K_PU>;
858 qcom,hw-settle-time = <200>; 858 qcom,hw-settle-time = <200>;
859 qcom,ratiometric; 859 qcom,ratiometric;
860 label = "qtm_w_temp"; 860 label = "qtm_w_temp";
861 }; 861 };
862 862
863 channel@44b { 863 channel@44b {
864 reg = <PMR735A_ADC7_GPIO2_100K 864 reg = <PMR735A_ADC7_GPIO2_100K_PU>;
865 qcom,hw-settle-time = <200>; 865 qcom,hw-settle-time = <200>;
866 qcom,ratiometric; 866 qcom,ratiometric;
867 label = "qtm_n_temp"; 867 label = "qtm_n_temp";
868 }; 868 };
869 }; 869 };
870 870
871 &remoteproc_adsp { 871 &remoteproc_adsp {
872 status = "okay"; 872 status = "okay";
873 firmware-name = "qcom/sm8450/adsp.mbn" 873 firmware-name = "qcom/sm8450/adsp.mbn";
874 }; 874 };
875 875
876 &remoteproc_cdsp { 876 &remoteproc_cdsp {
877 status = "okay"; 877 status = "okay";
878 firmware-name = "qcom/sm8450/cdsp.mbn" 878 firmware-name = "qcom/sm8450/cdsp.mbn";
879 }; 879 };
880 880
881 &remoteproc_mpss { 881 &remoteproc_mpss {
882 status = "okay"; 882 status = "okay";
883 firmware-name = "qcom/sm8450/modem.mbn 883 firmware-name = "qcom/sm8450/modem.mbn";
884 }; 884 };
885 885
886 &remoteproc_slpi { 886 &remoteproc_slpi {
887 status = "okay"; 887 status = "okay";
888 firmware-name = "qcom/sm8450/slpi.mbn" 888 firmware-name = "qcom/sm8450/slpi.mbn";
889 }; 889 };
890 890
891 &qupv3_id_0 { 891 &qupv3_id_0 {
892 status = "okay"; 892 status = "okay";
893 }; 893 };
894 894
895 &qupv3_id_1 { 895 &qupv3_id_1 {
896 status = "okay"; 896 status = "okay";
897 }; 897 };
898 898
899 &sdhc_2 { 899 &sdhc_2 {
900 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH> 900 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
901 pinctrl-names = "default", "sleep"; 901 pinctrl-names = "default", "sleep";
902 pinctrl-0 = <&sdc2_default_state &sdc2 902 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
903 pinctrl-1 = <&sdc2_sleep_state &sdc2_c 903 pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
904 vmmc-supply = <&vreg_l9c_2p96>; 904 vmmc-supply = <&vreg_l9c_2p96>;
905 vqmmc-supply = <&vreg_l6c_1p8>; 905 vqmmc-supply = <&vreg_l6c_1p8>;
906 no-sdio; 906 no-sdio;
907 no-mmc; 907 no-mmc;
908 status = "okay"; 908 status = "okay";
909 }; 909 };
910 910
911 &sound { 911 &sound {
912 compatible = "qcom,sm8450-sndcard"; 912 compatible = "qcom,sm8450-sndcard";
913 model = "SM8450-HDK"; 913 model = "SM8450-HDK";
914 audio-routing = "SpkrLeft IN", "WSA_SP 914 audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
915 "SpkrRight IN", "WSA_S 915 "SpkrRight IN", "WSA_SPK2 OUT",
916 "IN1_HPHL", "HPHL_OUT" 916 "IN1_HPHL", "HPHL_OUT",
917 "IN2_HPHR", "HPHR_OUT" 917 "IN2_HPHR", "HPHR_OUT",
918 "AMIC1", "MIC BIAS1", 918 "AMIC1", "MIC BIAS1",
919 "AMIC2", "MIC BIAS2", 919 "AMIC2", "MIC BIAS2",
920 "AMIC3", "MIC BIAS3", 920 "AMIC3", "MIC BIAS3",
921 "AMIC4", "MIC BIAS3", 921 "AMIC4", "MIC BIAS3",
922 "AMIC5", "MIC BIAS4", 922 "AMIC5", "MIC BIAS4",
923 "VA DMIC0", "MIC BIAS3 923 "VA DMIC0", "MIC BIAS3",
924 "VA DMIC1", "MIC BIAS3 924 "VA DMIC1", "MIC BIAS3",
925 "VA DMIC2", "MIC BIAS1 925 "VA DMIC2", "MIC BIAS1",
926 "VA DMIC3", "MIC BIAS1 926 "VA DMIC3", "MIC BIAS1",
927 "TX DMIC0", "MIC BIAS3 927 "TX DMIC0", "MIC BIAS3",
928 "TX DMIC1", "MIC BIAS3 928 "TX DMIC1", "MIC BIAS3",
929 "TX DMIC2", "MIC BIAS1 929 "TX DMIC2", "MIC BIAS1",
930 "TX DMIC3", "MIC BIAS1 930 "TX DMIC3", "MIC BIAS1",
931 "TX SWR_INPUT0", "ADC1 931 "TX SWR_INPUT0", "ADC1_OUTPUT",
932 "TX SWR_INPUT1", "ADC2 932 "TX SWR_INPUT1", "ADC2_OUTPUT",
933 "TX SWR_INPUT0", "ADC3 933 "TX SWR_INPUT0", "ADC3_OUTPUT",
934 "TX SWR_INPUT1", "ADC4 934 "TX SWR_INPUT1", "ADC4_OUTPUT";
935 935
936 wcd-playback-dai-link { 936 wcd-playback-dai-link {
937 link-name = "WCD Playback"; 937 link-name = "WCD Playback";
938 938
939 cpu { 939 cpu {
940 sound-dai = <&q6apmbed 940 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
941 }; 941 };
942 942
943 codec { 943 codec {
944 sound-dai = <&wcd938x 944 sound-dai = <&wcd938x 0>, <&swr1 0>, <&rxmacro 0>;
945 }; 945 };
946 946
947 platform { 947 platform {
948 sound-dai = <&q6apm>; 948 sound-dai = <&q6apm>;
949 }; 949 };
950 }; 950 };
951 951
952 wcd-capture-dai-link { 952 wcd-capture-dai-link {
953 link-name = "WCD Capture"; 953 link-name = "WCD Capture";
954 954
955 cpu { 955 cpu {
956 sound-dai = <&q6apmbed 956 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
957 }; 957 };
958 958
959 codec { 959 codec {
960 sound-dai = <&wcd938x 960 sound-dai = <&wcd938x 1>, <&swr2 0>, <&txmacro 0>;
961 }; 961 };
962 962
963 platform { 963 platform {
964 sound-dai = <&q6apm>; 964 sound-dai = <&q6apm>;
965 }; 965 };
966 }; 966 };
967 967
968 wsa-dai-link { 968 wsa-dai-link {
969 link-name = "WSA Playback"; 969 link-name = "WSA Playback";
970 970
971 cpu { 971 cpu {
972 sound-dai = <&q6apmbed 972 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
973 }; 973 };
974 974
975 codec { 975 codec {
976 sound-dai = <&left_spk 976 sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro 0>;
977 }; 977 };
978 978
979 platform { 979 platform {
980 sound-dai = <&q6apm>; 980 sound-dai = <&q6apm>;
981 }; 981 };
982 }; 982 };
983 983
984 va-dai-link { 984 va-dai-link {
985 link-name = "VA Capture"; 985 link-name = "VA Capture";
986 986
987 cpu { 987 cpu {
988 sound-dai = <&q6apmbed 988 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
989 }; 989 };
990 990
991 codec { 991 codec {
992 sound-dai = <&vamacro 992 sound-dai = <&vamacro 0>;
993 }; 993 };
994 994
995 platform { 995 platform {
996 sound-dai = <&q6apm>; 996 sound-dai = <&q6apm>;
997 }; 997 };
998 }; 998 };
999 }; 999 };
1000 1000
1001 &swr0 { 1001 &swr0 {
1002 status = "okay"; 1002 status = "okay";
1003 1003
1004 left_spkr: speaker@0,1 { 1004 left_spkr: speaker@0,1 {
1005 compatible = "sdw10217020200" 1005 compatible = "sdw10217020200";
1006 reg = <0 1>; 1006 reg = <0 1>;
1007 pinctrl-names = "default"; 1007 pinctrl-names = "default";
1008 pinctrl-0 = <&spkr_1_sd_n_act 1008 pinctrl-0 = <&spkr_1_sd_n_active>;
1009 powerdown-gpios = <&tlmm 1 GP 1009 powerdown-gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
1010 #sound-dai-cells = <0>; 1010 #sound-dai-cells = <0>;
1011 sound-name-prefix = "SpkrLeft 1011 sound-name-prefix = "SpkrLeft";
1012 #thermal-sensor-cells = <0>; 1012 #thermal-sensor-cells = <0>;
1013 vdd-supply = <&vreg_s10b_1p8> 1013 vdd-supply = <&vreg_s10b_1p8>;
1014 }; 1014 };
1015 1015
1016 right_spkr: speaker@0,2 { 1016 right_spkr: speaker@0,2 {
1017 compatible = "sdw10217020200" 1017 compatible = "sdw10217020200";
1018 reg = <0 2>; 1018 reg = <0 2>;
1019 pinctrl-names = "default"; 1019 pinctrl-names = "default";
1020 pinctrl-0 = <&spkr_2_sd_n_act 1020 pinctrl-0 = <&spkr_2_sd_n_active>;
1021 powerdown-gpios = <&tlmm 89 G 1021 powerdown-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
1022 #sound-dai-cells = <0>; 1022 #sound-dai-cells = <0>;
1023 sound-name-prefix = "SpkrRigh 1023 sound-name-prefix = "SpkrRight";
1024 #thermal-sensor-cells = <0>; 1024 #thermal-sensor-cells = <0>;
1025 vdd-supply = <&vreg_s10b_1p8> 1025 vdd-supply = <&vreg_s10b_1p8>;
1026 }; 1026 };
1027 }; 1027 };
1028 1028
1029 &swr1 { 1029 &swr1 {
1030 status = "okay"; 1030 status = "okay";
1031 1031
1032 wcd_rx: codec@0,4 { 1032 wcd_rx: codec@0,4 {
1033 compatible = "sdw20217010d00" 1033 compatible = "sdw20217010d00";
1034 reg = <0 4>; 1034 reg = <0 4>;
1035 qcom,rx-port-mapping = <1 2 3 1035 qcom,rx-port-mapping = <1 2 3 4 5>;
1036 }; 1036 };
1037 }; 1037 };
1038 1038
1039 &swr2 { 1039 &swr2 {
1040 status = "okay"; 1040 status = "okay";
1041 1041
1042 wcd_tx: codec@0,3 { 1042 wcd_tx: codec@0,3 {
1043 compatible = "sdw20217010d00" 1043 compatible = "sdw20217010d00";
1044 reg = <0 3>; 1044 reg = <0 3>;
1045 qcom,tx-port-mapping = <1 1 2 1045 qcom,tx-port-mapping = <1 1 2 3>;
1046 }; 1046 };
1047 }; 1047 };
1048 1048
1049 &tlmm { 1049 &tlmm {
1050 gpio-reserved-ranges = <28 4>, <36 4> 1050 gpio-reserved-ranges = <28 4>, <36 4>;
1051 1051
1052 lt9611_irq_pin: lt9611-irq-state { 1052 lt9611_irq_pin: lt9611-irq-state {
1053 pins = "gpio44"; 1053 pins = "gpio44";
1054 function = "gpio"; 1054 function = "gpio";
1055 bias-disable; 1055 bias-disable;
1056 }; 1056 };
1057 1057
1058 lt9611_rst_pin: lt9611-rst-state { 1058 lt9611_rst_pin: lt9611-rst-state {
1059 pins = "gpio107"; 1059 pins = "gpio107";
1060 function = "gpio"; 1060 function = "gpio";
1061 output-high; 1061 output-high;
1062 }; 1062 };
1063 1063
1064 sdc2_card_det_n: sd-card-det-n-state 1064 sdc2_card_det_n: sd-card-det-n-state {
1065 pins = "gpio92"; 1065 pins = "gpio92";
1066 function = "gpio"; 1066 function = "gpio";
1067 drive-strength = <2>; 1067 drive-strength = <2>;
1068 bias-pull-up; 1068 bias-pull-up;
1069 }; 1069 };
1070 }; 1070 };
1071 1071
1072 &uart7 { 1072 &uart7 {
1073 status = "okay"; 1073 status = "okay";
1074 }; 1074 };
1075 1075
1076 &ufs_mem_hc { 1076 &ufs_mem_hc {
1077 status = "okay"; 1077 status = "okay";
1078 1078
1079 reset-gpios = <&tlmm 210 GPIO_ACTIVE_ 1079 reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
1080 1080
1081 vcc-supply = <&vreg_l7b_2p5>; 1081 vcc-supply = <&vreg_l7b_2p5>;
1082 vcc-max-microamp = <1100000>; 1082 vcc-max-microamp = <1100000>;
1083 vccq-supply = <&vreg_l9b_1p2>; 1083 vccq-supply = <&vreg_l9b_1p2>;
1084 vccq-max-microamp = <1200000>; 1084 vccq-max-microamp = <1200000>;
1085 vdd-hba-supply = <&vreg_l9b_1p2>; 1085 vdd-hba-supply = <&vreg_l9b_1p2>;
1086 }; 1086 };
1087 1087
1088 &ufs_mem_phy { 1088 &ufs_mem_phy {
1089 status = "okay"; 1089 status = "okay";
1090 1090
1091 vdda-phy-supply = <&vreg_l5b_0p88>; 1091 vdda-phy-supply = <&vreg_l5b_0p88>;
1092 vdda-pll-supply = <&vreg_l6b_1p2>; 1092 vdda-pll-supply = <&vreg_l6b_1p2>;
1093 }; 1093 };
1094 1094
1095 &usb_1 { 1095 &usb_1 {
1096 status = "okay"; 1096 status = "okay";
1097 }; 1097 };
1098 1098
1099 &usb_1_dwc3 { 1099 &usb_1_dwc3 {
1100 dr_mode = "otg"; 1100 dr_mode = "otg";
1101 usb-role-switch; 1101 usb-role-switch;
1102 }; 1102 };
1103 1103
1104 &usb_1_dwc3_hs { 1104 &usb_1_dwc3_hs {
1105 remote-endpoint = <&pmic_glink_hs_in> 1105 remote-endpoint = <&pmic_glink_hs_in>;
1106 }; 1106 };
1107 1107
1108 &usb_1_hsphy { 1108 &usb_1_hsphy {
1109 status = "okay"; 1109 status = "okay";
1110 1110
1111 vdda-pll-supply = <&vreg_l5b_0p88>; 1111 vdda-pll-supply = <&vreg_l5b_0p88>;
1112 vdda18-supply = <&vreg_l1c_1p8>; 1112 vdda18-supply = <&vreg_l1c_1p8>;
1113 vdda33-supply = <&vreg_l2b_3p07>; 1113 vdda33-supply = <&vreg_l2b_3p07>;
1114 }; 1114 };
1115 1115
1116 &usb_1_qmpphy { 1116 &usb_1_qmpphy {
1117 status = "okay"; 1117 status = "okay";
1118 1118
1119 vdda-phy-supply = <&vreg_l6b_1p2>; 1119 vdda-phy-supply = <&vreg_l6b_1p2>;
1120 vdda-pll-supply = <&vreg_l1b_0p91>; 1120 vdda-pll-supply = <&vreg_l1b_0p91>;
1121 }; 1121 };
1122 1122
1123 &usb_1_qmpphy_out { 1123 &usb_1_qmpphy_out {
1124 remote-endpoint = <&pmic_glink_ss_in> 1124 remote-endpoint = <&pmic_glink_ss_in>;
1125 }; 1125 };
1126 1126
1127 &vamacro { 1127 &vamacro {
1128 pinctrl-0 = <&dmic01_default>, <&dmic 1128 pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
1129 pinctrl-names = "default"; 1129 pinctrl-names = "default";
1130 vdd-micb-supply = <&vreg_s10b_1p8>; 1130 vdd-micb-supply = <&vreg_s10b_1p8>;
1131 qcom,dmic-sample-rate = <600000>; 1131 qcom,dmic-sample-rate = <600000>;
1132 1132
1133 status = "okay"; 1133 status = "okay";
1134 }; 1134 };
1135 1135
1136 &tlmm { 1136 &tlmm {
1137 spkr_1_sd_n_active: spkr-1-sd-n-activ 1137 spkr_1_sd_n_active: spkr-1-sd-n-active-state {
1138 pins = "gpio1"; 1138 pins = "gpio1";
1139 function = "gpio"; 1139 function = "gpio";
1140 drive-strength = <16>; 1140 drive-strength = <16>;
1141 bias-disable; 1141 bias-disable;
1142 output-low; 1142 output-low;
1143 }; 1143 };
1144 1144
1145 spkr_2_sd_n_active: spkr-2-sd-n-activ 1145 spkr_2_sd_n_active: spkr-2-sd-n-active-state {
1146 pins = "gpio89"; 1146 pins = "gpio89";
1147 function = "gpio"; 1147 function = "gpio";
1148 drive-strength = <16>; 1148 drive-strength = <16>;
1149 bias-disable; 1149 bias-disable;
1150 output-low; 1150 output-low;
1151 }; 1151 };
1152 1152
1153 wcd_default: wcd-reset-n-active-state 1153 wcd_default: wcd-reset-n-active-state {
1154 pins = "gpio43"; 1154 pins = "gpio43";
1155 function = "gpio"; 1155 function = "gpio";
1156 drive-strength = <16>; 1156 drive-strength = <16>;
1157 bias-disable; 1157 bias-disable;
1158 output-low; 1158 output-low;
1159 }; 1159 };
1160 }; 1160 };
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