1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2024 Linaro Limited
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regu
10 #include "sm8550.dtsi"
11 #include "pm8010.dtsi"
12 #include "pm8550.dtsi"
13 #include "pm8550b.dtsi"
14 #define PMK8550VE_SID 5
15 #include "pm8550ve.dtsi"
16 #include "pm8550vs.dtsi"
17 #include "pmk8550.dtsi"
18 #include "pmr735d_a.dtsi"
19
20 / {
21 model = "Qualcomm Technologies, Inc. S
22 compatible = "qcom,sm8550-hdk", "qcom,
23 chassis-type = "embedded";
24
25 aliases {
26 serial0 = &uart7;
27 serial1 = &uart14;
28 };
29
30 wcd938x: audio-codec {
31 compatible = "qcom,wcd9385-cod
32
33 pinctrl-names = "default";
34 pinctrl-0 = <&wcd_default>;
35
36 qcom,micbias1-microvolt = <180
37 qcom,micbias2-microvolt = <180
38 qcom,micbias3-microvolt = <180
39 qcom,micbias4-microvolt = <180
40 qcom,mbhc-buttons-vthreshold-m
41 qcom,mbhc-headset-vthreshold-m
42 qcom,mbhc-headphone-vthreshold
43 qcom,rx-device = <&wcd_rx>;
44 qcom,tx-device = <&wcd_tx>;
45
46 reset-gpios = <&tlmm 108 GPIO_
47
48 vdd-buck-supply = <&vreg_l15b_
49 vdd-rxtx-supply = <&vreg_l15b_
50 vdd-io-supply = <&vreg_l15b_1p
51 vdd-mic-bias-supply = <&vreg_b
52
53 #sound-dai-cells = <1>;
54 };
55
56 chosen {
57 stdout-path = "serial0:115200n
58 };
59
60 hdmi-out {
61 compatible = "hdmi-connector";
62 type = "a";
63
64 port {
65 hdmi_connector_out: en
66 remote-endpoin
67 };
68 };
69 };
70
71 gpio-keys {
72 compatible = "gpio-keys";
73
74 pinctrl-0 = <&volume_up_n>;
75 pinctrl-names = "default";
76
77 key-volume-up {
78 label = "Volume Up";
79 linux,code = <KEY_VOLU
80 gpios = <&pm8550_gpios
81 debounce-interval = <1
82 linux,can-disable;
83 wakeup-source;
84 };
85 };
86
87 leds {
88 compatible = "gpio-leds";
89
90 led-0 {
91 function = LED_FUNCTIO
92 color = <LED_COLOR_ID_
93 gpios = <&tlmm 159 GPI
94 linux,default-trigger
95 default-state = "off";
96 };
97
98 led-1 {
99 function = LED_FUNCTIO
100 color = <LED_COLOR_ID_
101 gpios = <&tlmm 160 GPI
102 default-state = "off";
103 panic-indicator;
104 };
105
106 led-2 {
107 function = LED_FUNCTIO
108 color = <LED_COLOR_ID_
109 gpios = <&tlmm 162 GPI
110 linux,default-trigger
111 default-state = "off";
112 };
113 };
114
115 pmic-glink {
116 compatible = "qcom,sm8550-pmic
117 #address-cells = <1>;
118 #size-cells = <0>;
119 orientation-gpios = <&tlmm 11
120
121 connector@0 {
122 compatible = "usb-c-co
123 reg = <0>;
124 power-role = "dual";
125 data-role = "dual";
126
127 ports {
128 #address-cells
129 #size-cells =
130
131 port@0 {
132 reg =
133
134 pmic_g
135
136 };
137 };
138
139 port@1 {
140 reg =
141
142 pmic_g
143
144 };
145 };
146
147 port@2 {
148 reg =
149
150 pmic_g
151
152 };
153 };
154 };
155 };
156 };
157
158 lt9611_1v2: regulator-lt9611-1v2 {
159 compatible = "regulator-fixed"
160
161 regulator-name = "LT9611_1V2";
162 regulator-min-microvolt = <120
163 regulator-max-microvolt = <120
164
165 vin-supply = <&vph_pwr>;
166 gpio = <&tlmm 152 GPIO_ACTIVE_
167
168 enable-active-high;
169 };
170
171 lt9611_3v3: regulator-lt9611-3v3 {
172 compatible = "regulator-fixed"
173
174 regulator-name = "LT9611_3V3";
175 regulator-min-microvolt = <330
176 regulator-max-microvolt = <330
177
178 vin-supply = <&vreg_bob_3v3>;
179 gpio = <&tlmm 6 GPIO_ACTIVE_HI
180
181 enable-active-high;
182 };
183
184 vph_pwr: regulator-vph-pwr {
185 compatible = "regulator-fixed"
186
187 regulator-name = "vph_pwr";
188 regulator-min-microvolt = <370
189 regulator-max-microvolt = <370
190 regulator-always-on;
191 regulator-boot-on;
192 };
193
194 vreg_bob_3v3: regulator-vreg-bob-3v3 {
195 compatible = "regulator-fixed"
196
197 regulator-name = "VREG_BOB_3P3
198 regulator-min-microvolt = <330
199 regulator-max-microvolt = <330
200
201 vin-supply = <&vph_pwr>;
202 };
203
204 sound {
205 compatible = "qcom,sm8550-sndc
206 model = "SM8550-HDK";
207 audio-routing = "SpkrLeft IN",
208 "SpkrRight IN"
209 "IN1_HPHL", "H
210 "IN2_HPHR", "H
211 "AMIC1", "MIC
212 "AMIC2", "MIC
213 "AMIC5", "MIC
214 "TX SWR_INPUT0
215 "TX SWR_INPUT1
216 "TX SWR_INPUT1
217
218 wcd-playback-dai-link {
219 link-name = "WCD Playb
220
221 cpu {
222 sound-dai = <&
223 };
224
225 codec {
226 sound-dai = <&
227 };
228
229 platform {
230 sound-dai = <&
231 };
232 };
233
234 wcd-capture-dai-link {
235 link-name = "WCD Captu
236
237 cpu {
238 sound-dai = <&
239 };
240
241 codec {
242 sound-dai = <&
243 };
244
245 platform {
246 sound-dai = <&
247 };
248 };
249
250 wsa-dai-link {
251 link-name = "WSA Playb
252
253 cpu {
254 sound-dai = <&
255 };
256
257 codec {
258 sound-dai = <&
259 };
260
261 platform {
262 sound-dai = <&
263 };
264 };
265
266 va-dai-link {
267 link-name = "VA Captur
268
269 cpu {
270 sound-dai = <&
271 };
272
273 codec {
274 sound-dai = <&
275 };
276
277 platform {
278 sound-dai = <&
279 };
280 };
281 };
282
283 wcn7850-pmu {
284 compatible = "qcom,wcn7850-pmu
285
286 pinctrl-names = "default";
287 pinctrl-0 = <&wlan_en>, <&bt_d
288
289 wlan-enable-gpios = <&tlmm 80
290 bt-enable-gpios = <&tlmm 81 GP
291
292 vdd-supply = <&vreg_s5g_0p85>;
293 vddio-supply = <&vreg_l15b_1p8
294 vddaon-supply = <&vreg_s2g_0p8
295 vdddig-supply = <&vreg_s4e_0p9
296 vddrfa1p2-supply = <&vreg_s4g_
297 vddrfa1p8-supply = <&vreg_s6g_
298
299 regulators {
300 vreg_pmu_rfa_cmn: ldo0
301 regulator-name
302 };
303
304 vreg_pmu_aon_0p59: ldo
305 regulator-name
306 };
307
308 vreg_pmu_wlcx_0p8: ldo
309 regulator-name
310 };
311
312 vreg_pmu_wlmx_0p85: ld
313 regulator-name
314 };
315
316 vreg_pmu_btcmx_0p85: l
317 regulator-name
318 };
319
320 vreg_pmu_rfa_0p8: ldo5
321 regulator-name
322 };
323
324 vreg_pmu_rfa_1p2: ldo6
325 regulator-name
326 };
327
328 vreg_pmu_rfa_1p8: ldo7
329 regulator-name
330 };
331
332 vreg_pmu_pcie_0p9: ldo
333 regulator-name
334 };
335
336 vreg_pmu_pcie_1p8: ldo
337 regulator-name
338 };
339 };
340 };
341 };
342
343 &apps_rsc {
344 regulators-0 {
345 compatible = "qcom,pm8550-rpmh
346
347 vdd-bob1-supply = <&vph_pwr>;
348 vdd-bob2-supply = <&vph_pwr>;
349 vdd-l1-l4-l10-supply = <&vreg_
350 vdd-l2-l13-l14-supply = <&vreg
351 vdd-l3-supply = <&vreg_s4g_1p2
352 vdd-l5-l16-supply = <&vreg_bob
353 vdd-l6-l7-supply = <&vreg_bob1
354 vdd-l8-l9-supply = <&vreg_bob1
355 vdd-l11-supply = <&vreg_s4g_1p
356 vdd-l12-supply = <&vreg_s6g_1p
357 vdd-l15-supply = <&vreg_s6g_1p
358 vdd-l17-supply = <&vreg_bob2>;
359
360 qcom,pmic-id = "b";
361
362 vreg_bob1: bob1 {
363 regulator-name = "vreg
364 regulator-min-microvol
365 regulator-max-microvol
366 regulator-initial-mode
367 };
368
369 vreg_bob2: bob2 {
370 regulator-name = "vreg
371 regulator-min-microvol
372 regulator-max-microvol
373 regulator-initial-mode
374 };
375
376 vreg_l1b_1p8: ldo1 {
377 regulator-name = "vreg
378 regulator-min-microvol
379 regulator-max-microvol
380 regulator-initial-mode
381 regulator-allow-set-lo
382 regulator-allowed-mode
383
384 };
385
386 vreg_l2b_3p0: ldo2 {
387 regulator-name = "vreg
388 regulator-min-microvol
389 regulator-max-microvol
390 regulator-initial-mode
391 regulator-allow-set-lo
392 regulator-allowed-mode
393
394 };
395
396 vreg_l5b_3p1: ldo5 {
397 regulator-name = "vreg
398 regulator-min-microvol
399 regulator-max-microvol
400 regulator-initial-mode
401 regulator-allow-set-lo
402 regulator-allowed-mode
403
404 };
405
406 vreg_l6b_1p8: ldo6 {
407 regulator-name = "vreg
408 regulator-min-microvol
409 regulator-max-microvol
410 regulator-initial-mode
411 regulator-allow-set-lo
412 regulator-allowed-mode
413
414 };
415
416 vreg_l7b_1p8: ldo7 {
417 regulator-name = "vreg
418 regulator-min-microvol
419 regulator-max-microvol
420 regulator-initial-mode
421 regulator-allow-set-lo
422 regulator-allowed-mode
423
424 };
425
426 vreg_l8b_1p8: ldo8 {
427 regulator-name = "vreg
428 regulator-min-microvol
429 regulator-max-microvol
430 regulator-initial-mode
431 regulator-allow-set-lo
432 regulator-allowed-mode
433
434 };
435
436 vreg_l9b_2p9: ldo9 {
437 regulator-name = "vreg
438 regulator-min-microvol
439 regulator-max-microvol
440 regulator-initial-mode
441 regulator-allow-set-lo
442 regulator-allowed-mode
443
444 };
445
446 vreg_l11b_1p2: ldo11 {
447 regulator-name = "vreg
448 regulator-min-microvol
449 regulator-max-microvol
450 regulator-initial-mode
451 regulator-allow-set-lo
452 regulator-allowed-mode
453
454 };
455
456 vreg_l12b_1p8: ldo12 {
457 regulator-name = "vreg
458 regulator-min-microvol
459 regulator-max-microvol
460 regulator-initial-mode
461 regulator-allow-set-lo
462 regulator-allowed-mode
463
464 };
465
466 vreg_l13b_3p0: ldo13 {
467 regulator-name = "vreg
468 regulator-min-microvol
469 regulator-max-microvol
470 regulator-initial-mode
471 regulator-allow-set-lo
472 regulator-allowed-mode
473
474 };
475
476 vreg_l14b_3p2: ldo14 {
477 regulator-name = "vreg
478 regulator-min-microvol
479 regulator-max-microvol
480 regulator-initial-mode
481 regulator-allow-set-lo
482 regulator-allowed-mode
483
484 };
485
486 vreg_l15b_1p8: ldo15 {
487 regulator-name = "vreg
488 regulator-min-microvol
489 regulator-max-microvol
490 regulator-initial-mode
491 regulator-allow-set-lo
492 regulator-allowed-mode
493
494 };
495
496 vreg_l16b_2p8: ldo16 {
497 regulator-name = "vreg
498 regulator-min-microvol
499 regulator-max-microvol
500 regulator-initial-mode
501 regulator-allow-set-lo
502 regulator-allowed-mode
503
504 };
505
506 vreg_l17b_2p5: ldo17 {
507 regulator-name = "vreg
508 regulator-min-microvol
509 regulator-max-microvol
510 regulator-initial-mode
511 regulator-allow-set-lo
512 regulator-allowed-mode
513
514 };
515 };
516
517 regulators-1 {
518 compatible = "qcom,pm8550vs-rp
519
520 vdd-l1-supply = <&vreg_s4g_1p2
521 vdd-l2-supply = <&vreg_s4e_0p9
522 vdd-l3-supply = <&vreg_s4e_0p9
523
524 qcom,pmic-id = "c";
525
526 vreg_l3c_0p9: ldo3 {
527 regulator-name = "vreg
528 regulator-min-microvol
529 regulator-max-microvol
530 regulator-initial-mode
531 regulator-allow-set-lo
532 regulator-allowed-mode
533
534 };
535 };
536
537 regulators-2 {
538 compatible = "qcom,pm8550vs-rp
539
540 vdd-l1-supply = <&vreg_s4e_0p9
541 vdd-l2-supply = <&vreg_s4e_0p9
542 vdd-l3-supply = <&vreg_s4e_0p9
543
544 qcom,pmic-id = "d";
545
546 vreg_l1d_0p88: ldo1 {
547 regulator-name = "vreg
548 regulator-min-microvol
549 regulator-max-microvol
550 regulator-initial-mode
551 regulator-allow-set-lo
552 regulator-allowed-mode
553
554 };
555
556 /* ldo2 supplies SM8550 VDD_LP
557 };
558
559 regulators-3 {
560 compatible = "qcom,pm8550vs-rp
561
562 vdd-l1-supply = <&vreg_s4e_0p9
563 vdd-l2-supply = <&vreg_s4e_0p9
564 vdd-l3-supply = <&vreg_s4g_1p2
565 vdd-s4-supply = <&vph_pwr>;
566 vdd-s5-supply = <&vph_pwr>;
567
568 qcom,pmic-id = "e";
569
570 vreg_s4e_0p95: smps4 {
571 regulator-name = "vreg
572 regulator-min-microvol
573 regulator-max-microvol
574 regulator-initial-mode
575 };
576
577 vreg_s5e_1p08: smps5 {
578 regulator-name = "vreg
579 regulator-min-microvol
580 regulator-max-microvol
581 regulator-initial-mode
582 };
583
584 vreg_l1e_0p88: ldo1 {
585 regulator-name = "vreg
586 regulator-min-microvol
587 regulator-max-microvol
588 regulator-initial-mode
589 regulator-allow-set-lo
590 regulator-allowed-mode
591
592 };
593
594 vreg_l2e_0p9: ldo2 {
595 regulator-name = "vreg
596 regulator-min-microvol
597 regulator-max-microvol
598 regulator-initial-mode
599 regulator-allow-set-lo
600 regulator-allowed-mode
601
602 };
603
604 vreg_l3e_1p2: ldo3 {
605 regulator-name = "vreg
606 regulator-min-microvol
607 regulator-max-microvol
608 regulator-initial-mode
609 regulator-allow-set-lo
610 regulator-allowed-mode
611
612 };
613 };
614
615 regulators-4 {
616 compatible = "qcom,pm8550ve-rp
617
618 vdd-l1-supply = <&vreg_s4e_0p9
619 vdd-l2-supply = <&vreg_s4e_0p9
620 vdd-l3-supply = <&vreg_s4e_0p9
621 vdd-s4-supply = <&vph_pwr>;
622
623 qcom,pmic-id = "f";
624
625 vreg_s4f_0p5: smps4 {
626 regulator-name = "vreg
627 regulator-min-microvol
628 regulator-max-microvol
629 regulator-initial-mode
630 };
631
632 vreg_l1f_0p9: ldo1 {
633 regulator-name = "vreg
634 regulator-min-microvol
635 regulator-max-microvol
636 regulator-initial-mode
637 regulator-allow-set-lo
638 regulator-allowed-mode
639
640 };
641
642 vreg_l2f_0p88: ldo2 {
643 regulator-name = "vreg
644 regulator-min-microvol
645 regulator-max-microvol
646 regulator-initial-mode
647 regulator-allow-set-lo
648 regulator-allowed-mode
649
650 };
651
652 vreg_l3f_0p88: ldo3 {
653 regulator-name = "vreg
654 regulator-min-microvol
655 regulator-max-microvol
656 regulator-initial-mode
657 regulator-allow-set-lo
658 regulator-allowed-mode
659
660 };
661 };
662
663 regulators-5 {
664 compatible = "qcom,pm8550vs-rp
665
666 vdd-l1-supply = <&vreg_s4g_1p2
667 vdd-l2-supply = <&vreg_s4g_1p2
668 vdd-l3-supply = <&vreg_s4g_1p2
669 vdd-s1-supply = <&vph_pwr>;
670 vdd-s2-supply = <&vph_pwr>;
671 vdd-s3-supply = <&vph_pwr>;
672 vdd-s4-supply = <&vph_pwr>;
673 vdd-s5-supply = <&vph_pwr>;
674 vdd-s6-supply = <&vph_pwr>;
675
676 qcom,pmic-id = "g";
677
678 vreg_s1g_1p25: smps1 {
679 regulator-name = "vreg
680 regulator-min-microvol
681 regulator-max-microvol
682 regulator-initial-mode
683 };
684
685 vreg_s2g_0p85: smps2 {
686 regulator-name = "vreg
687 regulator-min-microvol
688 regulator-max-microvol
689 regulator-initial-mode
690 };
691
692 vreg_s3g_0p8: smps3 {
693 regulator-name = "vreg
694 regulator-min-microvol
695 regulator-max-microvol
696 regulator-initial-mode
697 };
698
699 vreg_s4g_1p25: smps4 {
700 regulator-name = "vreg
701 regulator-min-microvol
702 regulator-max-microvol
703 regulator-initial-mode
704 };
705
706 vreg_s5g_0p85: smps5 {
707 regulator-name = "vreg
708 regulator-min-microvol
709 regulator-max-microvol
710 regulator-initial-mode
711 };
712
713 vreg_s6g_1p86: smps6 {
714 regulator-name = "vreg
715 regulator-min-microvol
716 regulator-max-microvol
717 regulator-initial-mode
718 };
719
720 vreg_l1g_1p2: ldo1 {
721 regulator-name = "vreg
722 regulator-min-microvol
723 regulator-max-microvol
724 regulator-initial-mode
725 regulator-allow-set-lo
726 regulator-allowed-mode
727
728 };
729
730 vreg_l3g_1p2: ldo3 {
731 regulator-name = "vreg
732 regulator-min-microvol
733 regulator-max-microvol
734 regulator-initial-mode
735 regulator-allow-set-lo
736 regulator-allowed-mode
737
738 };
739 };
740
741 regulators-6 {
742 compatible = "qcom,pm8010-rpmh
743
744 vdd-l1-l2-supply = <&vreg_s4g_
745 vdd-l3-l4-supply = <&vreg_bob2
746 vdd-l5-supply = <&vreg_s6g_1p8
747 vdd-l6-supply = <&vreg_s6g_1p8
748 vdd-l7-supply = <&vreg_bob1>;
749
750 qcom,pmic-id = "m";
751
752 vreg_l1m_1p056: ldo1 {
753 regulator-name = "vreg
754 regulator-min-microvol
755 regulator-max-microvol
756 regulator-initial-mode
757 regulator-allow-set-lo
758 regulator-allowed-mode
759
760 };
761
762 vreg_l2m_1p056: ldo2 {
763 regulator-name = "vreg
764 regulator-min-microvol
765 regulator-max-microvol
766 regulator-initial-mode
767 regulator-allow-set-lo
768 regulator-allowed-mode
769
770 };
771
772 vreg_l3m_2p8: ldo3 {
773 regulator-name = "vreg
774 regulator-min-microvol
775 regulator-max-microvol
776 regulator-initial-mode
777 };
778
779 vreg_l4m_2p8: ldo4 {
780 regulator-name = "vreg
781 regulator-min-microvol
782 regulator-max-microvol
783 regulator-initial-mode
784 };
785
786 vreg_l5m_1p8: ldo5 {
787 regulator-name = "vreg
788 regulator-min-microvol
789 regulator-max-microvol
790 regulator-initial-mode
791 };
792
793 vreg_l6m_1p8: ldo6 {
794 regulator-name = "vreg
795 regulator-min-microvol
796 regulator-max-microvol
797 regulator-initial-mode
798 };
799
800 vreg_l7m_2p9: ldo7 {
801 regulator-name = "vreg
802 regulator-min-microvol
803 regulator-max-microvol
804 regulator-initial-mode
805 };
806 };
807
808 regulators-7 {
809 compatible = "qcom,pm8010-rpmh
810
811 vdd-l1-l2-supply = <&vreg_s4g_
812 vdd-l3-l4-supply = <&vreg_bob2
813 vdd-l5-supply = <&vreg_s6g_1p8
814 vdd-l6-supply = <&vreg_bob1>;
815 vdd-l7-supply = <&vreg_bob1>;
816
817 qcom,pmic-id = "n";
818
819 vreg_l1n_1p1: ldo1 {
820 regulator-name = "vreg
821 regulator-min-microvol
822 regulator-max-microvol
823 regulator-initial-mode
824 regulator-allow-set-lo
825 regulator-allowed-mode
826
827 };
828
829 vreg_l2n_1p1: ldo2 {
830 regulator-name = "vreg
831 regulator-min-microvol
832 regulator-max-microvol
833 regulator-initial-mode
834 regulator-allow-set-lo
835 regulator-allowed-mode
836
837 };
838
839 vreg_l3n_2p8: ldo3 {
840 regulator-name = "vreg
841 regulator-min-microvol
842 regulator-max-microvol
843 regulator-initial-mode
844 };
845
846 vreg_l4n_2p8: ldo4 {
847 regulator-name = "vreg
848 regulator-min-microvol
849 regulator-max-microvol
850 regulator-initial-mode
851 };
852
853 vreg_l5n_1p8: ldo5 {
854 regulator-name = "vreg
855 regulator-min-microvol
856 regulator-max-microvol
857 regulator-initial-mode
858 };
859
860 vreg_l6n_3p3: ldo6 {
861 regulator-name = "vreg
862 regulator-min-microvol
863 regulator-max-microvol
864 regulator-initial-mode
865 };
866
867 vreg_l7n_2p96: ldo7 {
868 regulator-name = "vreg
869 regulator-min-microvol
870 regulator-max-microvol
871 regulator-initial-mode
872 };
873 };
874 };
875
876 &i2c0 {
877 clock-frequency = <400000>;
878 status = "okay";
879
880 lt9611_codec: hdmi-bridge@2b {
881 compatible = "lontium,lt9611ux
882 reg = <0x2b>;
883
884 interrupts-extended = <&tlmm 8
885
886 reset-gpios = <&tlmm 7 GPIO_AC
887
888 vdd-supply = <<9611_1v2>;
889 vcc-supply = <<9611_3v3>;
890
891 pinctrl-0 = <<9611_irq_pin>,
892 pinctrl-names = "default";
893
894 ports {
895 #address-cells = <1>;
896 #size-cells = <0>;
897
898 port@0 {
899 reg = <0>;
900
901 lt9611_a: endp
902 remote
903 };
904 };
905
906 port@2 {
907 reg = <2>;
908
909 lt9611_out: en
910 remote
911 };
912 };
913 };
914 };
915 };
916
917 &i2c_hub_2 {
918 status = "okay";
919
920 typec-mux@42 {
921 compatible = "fcs,fsa4480";
922 reg = <0x42>;
923
924 vcc-supply = <&vreg_bob1>;
925
926 mode-switch;
927 orientation-switch;
928
929 port {
930 fsa4480_sbu_mux: endpo
931 remote-endpoin
932 };
933 };
934 };
935 };
936
937 &i2c_master_hub_0 {
938 status = "okay";
939 };
940
941 &ipa {
942 qcom,gsi-loader = "self";
943 memory-region = <&ipa_fw_mem>;
944 firmware-name = "qcom/sm8550/ipa_fws.m
945 status = "okay";
946 };
947
948 &gpi_dma1 {
949 status = "okay";
950 };
951
952 &gpu {
953 status = "okay";
954
955 zap-shader {
956 firmware-name = "qcom/sm8550/a
957 };
958 };
959
960 &lpass_tlmm {
961 spkr_1_sd_n_active: spkr-1-sd-n-active
962 pins = "gpio17";
963 function = "gpio";
964 drive-strength = <16>;
965 bias-disable;
966 output-low;
967 };
968
969 spkr_2_sd_n_active: spkr-2-sd-n-active
970 pins = "gpio18";
971 function = "gpio";
972 drive-strength = <16>;
973 bias-disable;
974 output-low;
975 };
976 };
977
978 &mdss {
979 status = "okay";
980 };
981
982 &mdss_dsi0 {
983 vdda-supply = <&vreg_l3e_1p2>;
984 status = "okay";
985 };
986
987 &mdss_dsi0_out {
988 remote-endpoint = <<9611_a>;
989 data-lanes = <0 1 2 3>;
990 };
991
992 &mdss_dsi0_phy {
993 vdds-supply = <&vreg_l1e_0p88>;
994 status = "okay";
995 };
996
997 &mdss_dp0 {
998 status = "okay";
999 };
1000
1001 &mdss_dp0_out {
1002 data-lanes = <0 1>;
1003 };
1004
1005 &pcie0 {
1006 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HI
1007 perst-gpios = <&tlmm 94 GPIO_ACTIVE_L
1008
1009 pinctrl-0 = <&pcie0_default_state>;
1010 pinctrl-names = "default";
1011
1012 status = "okay";
1013 };
1014
1015 &pcieport0 {
1016 wifi@0 {
1017 compatible = "pci17cb,1107";
1018 reg = <0x10000 0x0 0x0 0x0 0x
1019
1020 vddrfacmn-supply = <&vreg_pmu
1021 vddaon-supply = <&vreg_pmu_ao
1022 vddwlcx-supply = <&vreg_pmu_w
1023 vddwlmx-supply = <&vreg_pmu_w
1024 vddrfa0p8-supply = <&vreg_pmu
1025 vddrfa1p2-supply = <&vreg_pmu
1026 vddrfa1p8-supply = <&vreg_pmu
1027 vddpcie0p9-supply = <&vreg_pm
1028 vddpcie1p8-supply = <&vreg_pm
1029 };
1030 };
1031
1032 &pcie0_phy {
1033 vdda-phy-supply = <&vreg_l1e_0p88>;
1034 vdda-pll-supply = <&vreg_l3e_1p2>;
1035
1036 status = "okay";
1037 };
1038
1039 &pcie1 {
1040 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HI
1041 perst-gpios = <&tlmm 97 GPIO_ACTIVE_L
1042
1043 pinctrl-0 = <&pcie1_default_state>;
1044 pinctrl-names = "default";
1045
1046 status = "okay";
1047 };
1048
1049 &pcie1_phy {
1050 vdda-phy-supply = <&vreg_l3c_0p9>;
1051 vdda-pll-supply = <&vreg_l3e_1p2>;
1052 vdda-qref-supply = <&vreg_l1e_0p88>;
1053
1054 status = "okay";
1055 };
1056
1057 &pm8550_gpios {
1058 sdc2_card_det_n: sdc2-card-det-state
1059 pins = "gpio12";
1060 function = "normal";
1061 input-enable;
1062 output-disable;
1063 bias-pull-up;
1064 power-source = <1>; /* 1.8 V
1065 };
1066
1067 volume_up_n: volume-up-n-state {
1068 pins = "gpio6";
1069 function = "normal";
1070 power-source = <1>;
1071 bias-pull-up;
1072 input-enable;
1073 };
1074 };
1075
1076 /* The RGB signals are routed to 3 separate L
1077 &pm8550_pwm {
1078 #address-cells = <1>;
1079 #size-cells = <0>;
1080
1081 status = "okay";
1082
1083 led@1 {
1084 reg = <1>;
1085 function = LED_FUNCTION_STATU
1086 color = <LED_COLOR_ID_RED>;
1087 default-state = "off";
1088 };
1089
1090 led@2 {
1091 reg = <2>;
1092 function = LED_FUNCTION_STATU
1093 color = <LED_COLOR_ID_GREEN>;
1094 default-state = "off";
1095 };
1096
1097 led@3 {
1098 reg = <3>;
1099 function = LED_FUNCTION_STATU
1100 color = <LED_COLOR_ID_BLUE>;
1101 default-state = "off";
1102 };
1103 };
1104
1105 &pm8550b_eusb2_repeater {
1106 vdd18-supply = <&vreg_l15b_1p8>;
1107 vdd3-supply = <&vreg_l5b_3p1>;
1108 };
1109
1110 &pon_pwrkey {
1111 status = "okay";
1112 };
1113
1114 &pon_resin {
1115 linux,code = <KEY_VOLUMEDOWN>;
1116
1117 status = "okay";
1118 };
1119
1120 &pmk8550_gpios {
1121 pmk8550_sleep_clk: sleep-clk-state {
1122 pins = "gpio3";
1123 function = "func1";
1124 input-disable;
1125 output-enable;
1126 bias-disable;
1127 power-source = <0>;
1128 };
1129 };
1130
1131 &qupv3_id_0 {
1132 status = "okay";
1133 };
1134
1135 &qupv3_id_1 {
1136 status = "okay";
1137 };
1138
1139 &remoteproc_adsp {
1140 firmware-name = "qcom/sm8550/adsp.mbn
1141 "qcom/sm8550/adsp_dtb
1142 status = "okay";
1143 };
1144
1145 &remoteproc_cdsp {
1146 firmware-name = "qcom/sm8550/cdsp.mbn
1147 "qcom/sm8550/cdsp_dtb
1148 status = "okay";
1149 };
1150
1151 &remoteproc_mpss {
1152 firmware-name = "qcom/sm8550/modem.mb
1153 "qcom/sm8550/modem_dt
1154 status = "okay";
1155 };
1156
1157 &sdhc_2 {
1158 cd-gpios = <&pm8550_gpios 12 GPIO_ACT
1159
1160 pinctrl-0 = <&sdc2_default>, <&sdc2_c
1161 pinctrl-1 = <&sdc2_sleep>, <&sdc2_car
1162 pinctrl-names = "default", "sleep";
1163
1164 vmmc-supply = <&vreg_l9b_2p9>;
1165 vqmmc-supply = <&vreg_l8b_1p8>;
1166
1167 bus-width = <4>;
1168 no-sdio;
1169 no-mmc;
1170
1171 status = "okay";
1172 };
1173
1174 &sleep_clk {
1175 clock-frequency = <32000>;
1176 };
1177
1178 &swr0 {
1179 status = "okay";
1180
1181 /* WSA8845, Speaker North */
1182 north_spkr: speaker@0,0 {
1183 compatible = "sdw20217020400"
1184 reg = <0 0>;
1185
1186 pinctrl-0 = <&spkr_1_sd_n_act
1187 pinctrl-names = "default";
1188
1189 powerdown-gpios = <&lpass_tlm
1190
1191 vdd-1p8-supply = <&vreg_l15b_
1192 vdd-io-supply = <&vreg_l15b_1
1193
1194 #sound-dai-cells = <0>;
1195 sound-name-prefix = "SpkrLeft
1196 qcom,port-mapping = <1 2 3 7
1197 };
1198
1199 /* WSA8845, Speaker South */
1200 south_spkr: speaker@0,1 {
1201 compatible = "sdw20217020400"
1202 reg = <0 1>;
1203
1204 pinctrl-0 = <&spkr_2_sd_n_act
1205 pinctrl-names = "default";
1206
1207 powerdown-gpios = <&lpass_tlm
1208
1209 vdd-1p8-supply = <&vreg_l15b_
1210 vdd-io-supply = <&vreg_l15b_1
1211
1212 #sound-dai-cells = <0>;
1213 sound-name-prefix = "SpkrRigh
1214 qcom,port-mapping = <4 5 6 7
1215 };
1216 };
1217
1218 &swr1 {
1219 status = "okay";
1220
1221 /* WCD9385 RX */
1222 wcd_rx: codec@0,4 {
1223 compatible = "sdw20217010d00"
1224 reg = <0 4>;
1225
1226 /*
1227 * WCD9385 RX Port 1 (HPH_L/R
1228 * WCD9385 RX Port 2 (CLSH)
1229 * WCD9385 RX Port 3 (COMP_L/
1230 * WCD9385 RX Port 4 (LO)
1231 * WCD9385 RX Port 5 (DSD_L/R
1232 */
1233 qcom,rx-port-mapping = <1 2 3
1234 };
1235 };
1236
1237 &swr2 {
1238 status = "okay";
1239
1240 /* WCD9385 TX */
1241 wcd_tx: codec@0,3 {
1242 compatible = "sdw20217010d00"
1243 reg = <0 3>;
1244
1245 /*
1246 * WCD9385 TX Port 1 (ADC1,2)
1247 * WCD9385 TX Port 2 (ADC3,4)
1248 * WCD9385 TX Port 3 (DMIC0,1
1249 * WCD9385 TX Port 4 (DMIC4,5
1250 */
1251 qcom,tx-port-mapping = <2 2 3
1252 };
1253 };
1254
1255 &tlmm {
1256 /* Reserved I/Os for NFC */
1257 gpio-reserved-ranges = <32 8>;
1258
1259 bt_default: bt-default-state {
1260 bt-en-pins {
1261 pins = "gpio81";
1262 function = "gpio";
1263 drive-strength = <16>
1264 bias-disable;
1265 };
1266
1267 sw-ctrl-pins {
1268 pins = "gpio82";
1269 function = "gpio";
1270 bias-pull-down;
1271 };
1272 };
1273
1274 lt9611_irq_pin: lt9611-irq-state {
1275 pins = "gpio8";
1276 function = "gpio";
1277 bias-disable;
1278 };
1279
1280 lt9611_rst_pin: lt9611-rst-state {
1281 pins = "gpio7";
1282 function = "gpio";
1283 output-high;
1284 };
1285
1286 wcd_default: wcd-reset-n-active-state
1287 pins = "gpio108";
1288 function = "gpio";
1289 drive-strength = <16>;
1290 bias-disable;
1291 output-low;
1292 };
1293
1294 wlan_en: wlan-en-state {
1295 pins = "gpio80";
1296 function = "gpio";
1297 drive-strength = <8>;
1298 bias-pull-down;
1299 };
1300 };
1301
1302 &uart7 {
1303 status = "okay";
1304 };
1305
1306 &uart14 {
1307 status = "okay";
1308
1309 bluetooth {
1310 compatible = "qcom,wcn7850-bt
1311
1312 vddrfacmn-supply = <&vreg_pmu
1313 vddaon-supply = <&vreg_pmu_ao
1314 vddwlcx-supply = <&vreg_pmu_w
1315 vddwlmx-supply = <&vreg_pmu_w
1316 vddrfa0p8-supply = <&vreg_pmu
1317 vddrfa1p2-supply = <&vreg_pmu
1318 vddrfa1p8-supply = <&vreg_pmu
1319
1320 max-speed = <3200000>;
1321 };
1322 };
1323
1324 &ufs_mem_hc {
1325 reset-gpios = <&tlmm 210 GPIO_ACTIVE_
1326
1327 vcc-supply = <&vreg_l17b_2p5>;
1328 vcc-max-microamp = <1300000>;
1329 vccq-supply = <&vreg_l1g_1p2>;
1330 vccq-max-microamp = <1200000>;
1331 vdd-hba-supply = <&vreg_l3g_1p2>;
1332
1333 status = "okay";
1334 };
1335
1336 &ufs_mem_phy {
1337 vdda-phy-supply = <&vreg_l1d_0p88>;
1338 vdda-pll-supply = <&vreg_l3e_1p2>;
1339
1340 status = "okay";
1341 };
1342
1343 &usb_1 {
1344 status = "okay";
1345 };
1346
1347 &usb_1_dwc3_hs {
1348 remote-endpoint = <&pmic_glink_hs_in>
1349 };
1350
1351 &usb_1_hsphy {
1352 vdd-supply = <&vreg_l1e_0p88>;
1353 vdda12-supply = <&vreg_l3e_1p2>;
1354
1355 phys = <&pm8550b_eusb2_repeater>;
1356
1357 status = "okay";
1358 };
1359
1360 &usb_dp_qmpphy {
1361 vdda-phy-supply = <&vreg_l3e_1p2>;
1362 vdda-pll-supply = <&vreg_l3f_0p88>;
1363
1364 status = "okay";
1365 };
1366
1367 &usb_dp_qmpphy_out {
1368 remote-endpoint = <&pmic_glink_ss_in>
1369 };
1370
1371 &xo_board {
1372 clock-frequency = <76800000>;
1373 };
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