1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2022, Linaro Limited
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/regulator/qcom,rpmh-regu
9 #include "sm8550.dtsi"
10 #include "pm8010.dtsi"
11 #include "pm8550.dtsi"
12 #include "pm8550b.dtsi"
13 #define PMK8550VE_SID 5
14 #include "pm8550ve.dtsi"
15 #include "pm8550vs.dtsi"
16 #include "pmk8550.dtsi"
17 #include "pmr735d_a.dtsi"
18 #include "pmr735d_b.dtsi"
19
20 / {
21 model = "Qualcomm Technologies, Inc. S
22 compatible = "qcom,sm8550-mtp", "qcom,
23 chassis-type = "handset";
24
25 aliases {
26 serial0 = &uart7;
27 };
28
29 wcd938x: audio-codec {
30 compatible = "qcom,wcd9385-cod
31
32 pinctrl-names = "default";
33 pinctrl-0 = <&wcd_default>;
34
35 qcom,micbias1-microvolt = <180
36 qcom,micbias2-microvolt = <180
37 qcom,micbias3-microvolt = <180
38 qcom,micbias4-microvolt = <180
39 qcom,mbhc-buttons-vthreshold-m
40 qcom,mbhc-headset-vthreshold-m
41 qcom,mbhc-headphone-vthreshold
42 qcom,rx-device = <&wcd_rx>;
43 qcom,tx-device = <&wcd_tx>;
44
45 reset-gpios = <&tlmm 108 GPIO_
46
47 vdd-buck-supply = <&vreg_l15b_
48 vdd-rxtx-supply = <&vreg_l15b_
49 vdd-io-supply = <&vreg_l15b_1p
50 vdd-mic-bias-supply = <&vreg_b
51
52 #sound-dai-cells = <1>;
53 };
54
55 chosen {
56 stdout-path = "serial0:115200n
57 };
58
59 pmic-glink {
60 compatible = "qcom,sm8550-pmic
61 #address-cells = <1>;
62 #size-cells = <0>;
63 orientation-gpios = <&tlmm 11
64
65 connector@0 {
66 compatible = "usb-c-co
67 reg = <0>;
68 power-role = "dual";
69 data-role = "dual";
70
71 ports {
72 #address-cells
73 #size-cells =
74
75 port@0 {
76 reg =
77
78 pmic_g
79
80 };
81 };
82
83 port@1 {
84 reg =
85
86 pmic_g
87
88 };
89 };
90
91 port@2 {
92 reg =
93
94 pmic_g
95
96 };
97 };
98 };
99 };
100 };
101
102 sound {
103 compatible = "qcom,sm8550-sndc
104 model = "SM8550-MTP";
105 audio-routing = "SpkrLeft IN",
106 "SpkrRight IN"
107 "IN1_HPHL", "H
108 "IN2_HPHR", "H
109 "AMIC1", "MIC
110 "AMIC2", "MIC
111 "AMIC3", "MIC
112 "AMIC4", "MIC
113 "AMIC5", "MIC
114 "VA DMIC0", "M
115 "VA DMIC1", "M
116 "VA DMIC2", "M
117 "TX DMIC0", "M
118 "TX DMIC1", "M
119 "TX DMIC2", "M
120 "TX SWR_INPUT0
121 "TX SWR_INPUT1
122 "TX SWR_INPUT0
123 "TX SWR_INPUT1
124
125 wcd-playback-dai-link {
126 link-name = "WCD Playb
127
128 cpu {
129 sound-dai = <&
130 };
131
132 codec {
133 sound-dai = <&
134 };
135
136 platform {
137 sound-dai = <&
138 };
139 };
140
141 wcd-capture-dai-link {
142 link-name = "WCD Captu
143
144 cpu {
145 sound-dai = <&
146 };
147
148 codec {
149 sound-dai = <&
150 };
151
152 platform {
153 sound-dai = <&
154 };
155 };
156
157 wsa-dai-link {
158 link-name = "WSA Playb
159
160 cpu {
161 sound-dai = <&
162 };
163
164 codec {
165 sound-dai = <&
166 };
167
168 platform {
169 sound-dai = <&
170 };
171 };
172
173 va-dai-link {
174 link-name = "VA Captur
175
176 cpu {
177 sound-dai = <&
178 };
179
180 codec {
181 sound-dai = <&
182 };
183
184 platform {
185 sound-dai = <&
186 };
187 };
188 };
189
190 vph_pwr: vph-pwr-regulator {
191 compatible = "regulator-fixed"
192 regulator-name = "vph_pwr";
193 regulator-min-microvolt = <370
194 regulator-max-microvolt = <370
195
196 regulator-always-on;
197 regulator-boot-on;
198 };
199 };
200
201 &apps_rsc {
202 regulators-0 {
203 compatible = "qcom,pm8550-rpmh
204 qcom,pmic-id = "b";
205
206 vdd-bob1-supply = <&vph_pwr>;
207 vdd-bob2-supply = <&vph_pwr>;
208 vdd-l1-l4-l10-supply = <&vreg_
209 vdd-l2-l13-l14-supply = <&vreg
210 vdd-l3-supply = <&vreg_s4g_1p3
211 vdd-l5-l16-supply = <&vreg_bob
212 vdd-l6-l7-supply = <&vreg_bob1
213 vdd-l8-l9-supply = <&vreg_bob1
214 vdd-l11-supply = <&vreg_s4g_1p
215 vdd-l12-supply = <&vreg_s6g_1p
216 vdd-l15-supply = <&vreg_s6g_1p
217 vdd-l17-supply = <&vreg_bob2>;
218
219 vreg_bob1: bob1 {
220 regulator-name = "vreg
221 regulator-min-microvol
222 regulator-max-microvol
223 regulator-initial-mode
224 };
225
226 vreg_bob2: bob2 {
227 regulator-name = "vreg
228 regulator-min-microvol
229 regulator-max-microvol
230 regulator-initial-mode
231 };
232
233 vreg_l1b_1p8: ldo1 {
234 regulator-name = "vreg
235 regulator-min-microvol
236 regulator-max-microvol
237 regulator-initial-mode
238 };
239
240 vreg_l2b_3p0: ldo2 {
241 regulator-name = "vreg
242 regulator-min-microvol
243 regulator-max-microvol
244 regulator-initial-mode
245 };
246
247 vreg_l5b_3p1: ldo5 {
248 regulator-name = "vreg
249 regulator-min-microvol
250 regulator-max-microvol
251 regulator-initial-mode
252 };
253
254 vreg_l6b_1p8: ldo6 {
255 regulator-name = "vreg
256 regulator-min-microvol
257 regulator-max-microvol
258 regulator-initial-mode
259 };
260
261 vreg_l7b_1p8: ldo7 {
262 regulator-name = "vreg
263 regulator-min-microvol
264 regulator-max-microvol
265 regulator-initial-mode
266 };
267
268 vreg_l8b_1p8: ldo8 {
269 regulator-name = "vreg
270 regulator-min-microvol
271 regulator-max-microvol
272 regulator-initial-mode
273 };
274
275 vreg_l9b_2p9: ldo9 {
276 regulator-name = "vreg
277 regulator-min-microvol
278 regulator-max-microvol
279 regulator-initial-mode
280 };
281
282 vreg_l11b_1p2: ldo11 {
283 regulator-name = "vreg
284 regulator-min-microvol
285 regulator-max-microvol
286 regulator-initial-mode
287 };
288
289 vreg_l12b_1p8: ldo12 {
290 regulator-name = "vreg
291 regulator-min-microvol
292 regulator-max-microvol
293 regulator-initial-mode
294 };
295
296 vreg_l13b_3p0: ldo13 {
297 regulator-name = "vreg
298 regulator-min-microvol
299 regulator-max-microvol
300 regulator-initial-mode
301 };
302
303 vreg_l14b_3p2: ldo14 {
304 regulator-name = "vreg
305 regulator-min-microvol
306 regulator-max-microvol
307 regulator-initial-mode
308 };
309
310 vreg_l15b_1p8: ldo15 {
311 regulator-name = "vreg
312 regulator-min-microvol
313 regulator-max-microvol
314 regulator-initial-mode
315 };
316
317 vreg_l16b_2p8: ldo16 {
318 regulator-name = "vreg
319 regulator-min-microvol
320 regulator-max-microvol
321 regulator-initial-mode
322 };
323
324 vreg_l17b_2p5: ldo17 {
325 regulator-name = "vreg
326 regulator-min-microvol
327 regulator-max-microvol
328 regulator-initial-mode
329 };
330 };
331
332 regulators-1 {
333 compatible = "qcom,pm8550vs-rp
334 qcom,pmic-id = "c";
335
336 vdd-l3-supply = <&vreg_s4e_0p9
337
338 vreg_l3c_0p91: ldo3 {
339 regulator-name = "vreg
340 regulator-min-microvol
341 regulator-max-microvol
342 regulator-initial-mode
343 };
344 };
345
346 regulators-2 {
347 compatible = "qcom,pm8550vs-rp
348 qcom,pmic-id = "d";
349
350 vdd-l1-supply = <&vreg_s4e_0p9
351
352 vreg_l1d_0p88: ldo1 {
353 regulator-name = "vreg
354 regulator-min-microvol
355 regulator-max-microvol
356 regulator-initial-mode
357 };
358 };
359
360 regulators-3 {
361 compatible = "qcom,pm8550vs-rp
362 qcom,pmic-id = "e";
363
364 vdd-l1-supply = <&vreg_s4e_0p9
365 vdd-l2-supply = <&vreg_s4e_0p9
366 vdd-l3-supply = <&vreg_s4g_1p3
367 vdd-s4-supply = <&vph_pwr>;
368 vdd-s5-supply = <&vph_pwr>;
369
370 vreg_s4e_0p9: smps4 {
371 regulator-name = "vreg
372 regulator-min-microvol
373 regulator-max-microvol
374 regulator-initial-mode
375 };
376
377 vreg_s5e_1p1: smps5 {
378 regulator-name = "vreg
379 regulator-min-microvol
380 regulator-max-microvol
381 regulator-initial-mode
382 };
383
384 vreg_l1e_0p88: ldo1 {
385 regulator-name = "vreg
386 regulator-min-microvol
387 regulator-max-microvol
388 regulator-initial-mode
389 };
390
391 vreg_l2e_0p9: ldo2 {
392 regulator-name = "vreg
393 regulator-min-microvol
394 regulator-max-microvol
395 regulator-initial-mode
396 };
397
398 vreg_l3e_1p2: ldo3 {
399 regulator-name = "vreg
400 regulator-min-microvol
401 regulator-max-microvol
402 regulator-initial-mode
403 };
404 };
405
406 regulators-4 {
407 compatible = "qcom,pm8550ve-rp
408 qcom,pmic-id = "f";
409
410 vdd-l1-supply = <&vreg_s4e_0p9
411 vdd-l2-supply = <&vreg_s4e_0p9
412 vdd-l3-supply = <&vreg_s4e_0p9
413 vdd-s4-supply = <&vph_pwr>;
414
415 vreg_s4f_0p5: smps4 {
416 regulator-name = "vreg
417 regulator-min-microvol
418 regulator-max-microvol
419 regulator-initial-mode
420 };
421
422 vreg_l1f_0p9: ldo1 {
423 regulator-name = "vreg
424 regulator-min-microvol
425 regulator-max-microvol
426 regulator-initial-mode
427 };
428
429 vreg_l2f_0p88: ldo2 {
430 regulator-name = "vreg
431 regulator-min-microvol
432 regulator-max-microvol
433 regulator-initial-mode
434 };
435
436 vreg_l3f_0p91: ldo3 {
437 regulator-name = "vreg
438 regulator-min-microvol
439 regulator-max-microvol
440 regulator-initial-mode
441 };
442 };
443
444 regulators-5 {
445 compatible = "qcom,pm8550vs-rp
446 qcom,pmic-id = "g";
447
448 vdd-l1-supply = <&vreg_s4g_1p3
449 vdd-l2-supply = <&vreg_s4g_1p3
450 vdd-l3-supply = <&vreg_s4g_1p3
451 vdd-s1-supply = <&vph_pwr>;
452 vdd-s2-supply = <&vph_pwr>;
453 vdd-s3-supply = <&vph_pwr>;
454 vdd-s4-supply = <&vph_pwr>;
455 vdd-s5-supply = <&vph_pwr>;
456 vdd-s6-supply = <&vph_pwr>;
457
458 vreg_s1g_1p2: smps1 {
459 regulator-name = "vreg
460 regulator-min-microvol
461 regulator-max-microvol
462 regulator-initial-mode
463 };
464
465 vreg_s2g_0p8: smps2 {
466 regulator-name = "vreg
467 regulator-min-microvol
468 regulator-max-microvol
469 regulator-initial-mode
470 };
471
472 vreg_s3g_0p7: smps3 {
473 regulator-name = "vreg
474 regulator-min-microvol
475 regulator-max-microvol
476 regulator-initial-mode
477 };
478
479 vreg_s4g_1p3: smps4 {
480 regulator-name = "vreg
481 regulator-min-microvol
482 regulator-max-microvol
483 regulator-initial-mode
484 };
485
486 vreg_s5g_0p8: smps5 {
487 regulator-name = "vreg
488 regulator-min-microvol
489 regulator-max-microvol
490 regulator-initial-mode
491 };
492
493 vreg_s6g_1p8: smps6 {
494 regulator-name = "vreg
495 regulator-min-microvol
496 regulator-max-microvol
497 regulator-initial-mode
498 };
499
500 vreg_l1g_1p2: ldo1 {
501 regulator-name = "vreg
502 regulator-min-microvol
503 regulator-max-microvol
504 regulator-initial-mode
505 };
506
507 vreg_l2g_1p2: ldo2 {
508 regulator-name = "vreg
509 regulator-min-microvol
510 regulator-max-microvol
511 regulator-initial-mode
512 };
513
514 vreg_l3g_1p2: ldo3 {
515 regulator-name = "vreg
516 regulator-min-microvol
517 regulator-max-microvol
518 regulator-initial-mode
519 };
520 };
521
522 regulators-6 {
523 compatible = "qcom,pm8010-rpmh
524 qcom,pmic-id = "m";
525
526 vdd-l1-l2-supply = <&vreg_s4g_
527 vdd-l3-l4-supply = <&vreg_bob2
528 vdd-l5-supply = <&vreg_s6g_1p8
529 vdd-l6-supply = <&vreg_s6g_1p8
530 vdd-l7-supply = <&vreg_bob1>;
531
532 vreg_l1m_1p056: ldo1 {
533 regulator-name = "vreg
534 regulator-min-microvol
535 regulator-max-microvol
536 regulator-initial-mode
537 };
538
539 vreg_l2m_1p056: ldo2 {
540 regulator-name = "vreg
541 regulator-min-microvol
542 regulator-max-microvol
543 regulator-initial-mode
544 };
545
546 vreg_l3m_2p8: ldo3 {
547 regulator-name = "vreg
548 regulator-min-microvol
549 regulator-max-microvol
550 regulator-initial-mode
551 };
552
553 vreg_l4m_2p8: ldo4 {
554 regulator-name = "vreg
555 regulator-min-microvol
556 regulator-max-microvol
557 regulator-initial-mode
558 };
559
560 vreg_l5m_1p8: ldo5 {
561 regulator-name = "vreg
562 regulator-min-microvol
563 regulator-max-microvol
564 regulator-initial-mode
565 };
566
567 vreg_l6m_1p8: ldo6 {
568 regulator-name = "vreg
569 regulator-min-microvol
570 regulator-max-microvol
571 regulator-initial-mode
572 };
573
574 vreg_l7m_2p9: ldo7 {
575 regulator-name = "vreg
576 regulator-min-microvol
577 regulator-max-microvol
578 regulator-initial-mode
579 };
580 };
581
582 regulators-7 {
583 compatible = "qcom,pm8010-rpmh
584 qcom,pmic-id = "n";
585
586 vdd-l1-l2-supply = <&vreg_s4g_
587 vdd-l3-l4-supply = <&vreg_bob2
588 vdd-l5-supply = <&vreg_s6g_1p8
589 vdd-l6-supply = <&vreg_bob1>;
590 vdd-l7-supply = <&vreg_bob1>;
591
592 vreg_l1n_1p1: ldo1 {
593 regulator-name = "vreg
594 regulator-min-microvol
595 regulator-max-microvol
596 regulator-initial-mode
597 };
598
599 vreg_l2n_1p1: ldo2 {
600 regulator-name = "vreg
601 regulator-min-microvol
602 regulator-max-microvol
603 regulator-initial-mode
604 };
605
606 vreg_l3n_2p8: ldo3 {
607 regulator-name = "vreg
608 regulator-min-microvol
609 regulator-max-microvol
610 regulator-initial-mode
611 };
612
613 vreg_l4n_2p8: ldo4 {
614 regulator-name = "vreg
615 regulator-min-microvol
616 regulator-max-microvol
617 regulator-initial-mode
618 };
619
620 vreg_l5n_1p8: ldo5 {
621 regulator-name = "vreg
622 regulator-min-microvol
623 regulator-max-microvol
624 regulator-initial-mode
625 };
626
627 vreg_l6n_3p3: ldo6 {
628 regulator-name = "vreg
629 regulator-min-microvol
630 regulator-max-microvol
631 regulator-initial-mode
632 };
633
634 vreg_l7n_2p96: ldo7 {
635 regulator-name = "vreg
636 regulator-min-microvol
637 regulator-max-microvol
638 regulator-initial-mode
639 };
640 };
641 };
642
643 &gpu {
644 status = "okay";
645
646 zap-shader {
647 firmware-name = "qcom/sm8550/a
648 };
649 };
650
651 &i2c_master_hub_0 {
652 status = "okay";
653 };
654
655 &i2c_hub_2 {
656 status = "okay";
657
658 typec-mux@42 {
659 compatible = "fcs,fsa4480";
660 reg = <0x42>;
661
662 vcc-supply = <&vreg_bob1>;
663
664 mode-switch;
665 orientation-switch;
666
667 port {
668 fsa4480_sbu_mux: endpo
669 remote-endpoin
670 };
671 };
672 };
673 };
674
675 &lpass_tlmm {
676 spkr_1_sd_n_active: spkr-1-sd-n-active
677 pins = "gpio17";
678 function = "gpio";
679 drive-strength = <16>;
680 bias-disable;
681 output-low;
682 };
683
684 spkr_2_sd_n_active: spkr-2-sd-n-active
685 pins = "gpio18";
686 function = "gpio";
687 drive-strength = <16>;
688 bias-disable;
689 output-low;
690 };
691 };
692
693 &mdss {
694 status = "okay";
695 };
696
697 &mdss_dsi0 {
698 vdda-supply = <&vreg_l3e_1p2>;
699 status = "okay";
700
701 panel@0 {
702 compatible = "visionox,vtdr613
703 reg = <0>;
704
705 pinctrl-names = "default", "sl
706 pinctrl-0 = <&sde_dsi_active>,
707 pinctrl-1 = <&sde_dsi_suspend>
708
709 vddio-supply = <&vreg_l12b_1p8
710 vci-supply = <&vreg_l13b_3p0>;
711 vdd-supply = <&vreg_l11b_1p2>;
712
713 reset-gpios = <&tlmm 133 GPIO_
714
715 port {
716 panel0_in: endpoint {
717 remote-endpoin
718 };
719 };
720 };
721 };
722
723 &mdss_dsi0_out {
724 remote-endpoint = <&panel0_in>;
725 data-lanes = <0 1 2 3>;
726 };
727
728 &mdss_dsi0_phy {
729 vdds-supply = <&vreg_l1e_0p88>;
730 status = "okay";
731 };
732
733 &mdss_dp0 {
734 status = "okay";
735 };
736
737 &mdss_dp0_out {
738 data-lanes = <0 1>;
739 };
740
741 &pcie0 {
742 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIG
743 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LO
744
745 pinctrl-names = "default";
746 pinctrl-0 = <&pcie0_default_state>;
747
748 status = "okay";
749 };
750
751 &pcie0_phy {
752 vdda-phy-supply = <&vreg_l1e_0p88>;
753 vdda-pll-supply = <&vreg_l3e_1p2>;
754
755 status = "okay";
756 };
757
758 &pcie1 {
759 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIG
760 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LO
761
762 pinctrl-names = "default";
763 pinctrl-0 = <&pcie1_default_state>;
764
765 status = "okay";
766 };
767
768 &pcie1_phy {
769 vdda-phy-supply = <&vreg_l3c_0p91>;
770 vdda-pll-supply = <&vreg_l3e_1p2>;
771 vdda-qref-supply = <&vreg_l1e_0p88>;
772
773 status = "okay";
774 };
775
776 &pm8550_gpios {
777 sdc2_card_det_n: sdc2-card-det-state {
778 pins = "gpio12";
779 function = "normal";
780 input-enable;
781 output-disable;
782 bias-pull-up;
783 power-source = <1>; /* 1.8 V *
784 };
785 };
786
787 &pm8550b_eusb2_repeater {
788 vdd18-supply = <&vreg_l15b_1p8>;
789 vdd3-supply = <&vreg_l5b_3p1>;
790 };
791
792 &qupv3_id_0 {
793 status = "okay";
794 };
795
796 &remoteproc_adsp {
797 firmware-name = "qcom/sm8550/adsp.mbn"
798 "qcom/sm8550/adsp_dtb.
799 status = "okay";
800 };
801
802 &remoteproc_cdsp {
803 firmware-name = "qcom/sm8550/cdsp.mbn"
804 "qcom/sm8550/cdsp_dtb.
805 status = "okay";
806 };
807
808 &remoteproc_mpss {
809 firmware-name = "qcom/sm8550/modem.mbn
810 "qcom/sm8550/modem_dtb
811 status = "okay";
812 };
813
814 &sdhc_2 {
815 cd-gpios = <&pm8550_gpios 12 GPIO_ACTI
816 pinctrl-names = "default", "sleep";
817 pinctrl-0 = <&sdc2_default &sdc2_card_
818 pinctrl-1 = <&sdc2_sleep &sdc2_card_de
819 vmmc-supply = <&vreg_l9b_2p9>;
820 vqmmc-supply = <&vreg_l8b_1p8>;
821 bus-width = <4>;
822 no-sdio;
823 no-mmc;
824 status = "okay";
825 };
826
827 &sleep_clk {
828 clock-frequency = <32000>;
829 };
830
831 &swr0 {
832 status = "okay";
833
834 /* WSA8845 */
835 left_spkr: speaker@0,0 {
836 compatible = "sdw20217020400";
837 reg = <0 0>;
838 pinctrl-names = "default";
839 pinctrl-0 = <&spkr_1_sd_n_acti
840 powerdown-gpios = <&lpass_tlmm
841 #sound-dai-cells = <0>;
842 sound-name-prefix = "SpkrLeft"
843 vdd-1p8-supply = <&vreg_l15b_1
844 vdd-io-supply = <&vreg_l3g_1p2
845 qcom,port-mapping = <1 2 3 7 1
846 };
847
848 /* WSA8845 */
849 right_spkr: speaker@0,1 {
850 compatible = "sdw20217020400";
851 reg = <0 1>;
852 pinctrl-names = "default";
853 pinctrl-0 = <&spkr_2_sd_n_acti
854 powerdown-gpios = <&lpass_tlmm
855 #sound-dai-cells = <0>;
856 sound-name-prefix = "SpkrRight
857 vdd-1p8-supply = <&vreg_l15b_1
858 vdd-io-supply = <&vreg_l3g_1p2
859 qcom,port-mapping = <4 5 6 7 1
860 };
861 };
862
863 &swr1 {
864 status = "okay";
865
866 /* WCD9385 RX */
867 wcd_rx: codec@0,4 {
868 compatible = "sdw20217010d00";
869 reg = <0 4>;
870 qcom,rx-port-mapping = <1 2 3
871 };
872 };
873
874 &swr2 {
875 status = "okay";
876
877 /* WCD9385 TX */
878 wcd_tx: codec@0,3 {
879 compatible = "sdw20217010d00";
880 reg = <0 3>;
881 qcom,tx-port-mapping = <2 2 3
882 };
883 };
884
885 &tlmm {
886 gpio-reserved-ranges = <32 8>;
887
888 sde_dsi_active: sde-dsi-active-state {
889 pins = "gpio133";
890 function = "gpio";
891 drive-strength = <8>;
892 bias-disable;
893 };
894
895 sde_dsi_suspend: sde-dsi-suspend-state
896 pins = "gpio133";
897 function = "gpio";
898 drive-strength = <2>;
899 bias-pull-down;
900 };
901
902 sde_te_active: sde-te-active-state {
903 pins = "gpio86";
904 function = "mdp_vsync";
905 drive-strength = <2>;
906 bias-pull-down;
907 };
908
909 sde_te_suspend: sde-te-suspend-state {
910 pins = "gpio86";
911 function = "mdp_vsync";
912 drive-strength = <2>;
913 bias-pull-down;
914 };
915
916 wcd_default: wcd-reset-n-active-state
917 pins = "gpio108";
918 function = "gpio";
919 drive-strength = <16>;
920 bias-disable;
921 output-low;
922 };
923 };
924
925 &uart7 {
926 status = "okay";
927 };
928
929 &ufs_mem_hc {
930 reset-gpios = <&tlmm 210 GPIO_ACTIVE_L
931 vcc-supply = <&vreg_l17b_2p5>;
932 vcc-max-microamp = <1300000>;
933 vccq-supply = <&vreg_l1g_1p2>;
934 vccq-max-microamp = <1200000>;
935 vdd-hba-supply = <&vreg_l3g_1p2>;
936
937 status = "okay";
938 };
939
940 &ufs_mem_phy {
941 vdda-phy-supply = <&vreg_l1d_0p88>;
942 vdda-pll-supply = <&vreg_l3e_1p2>;
943
944 status = "okay";
945 };
946
947 &usb_1 {
948 status = "okay";
949 };
950
951 &usb_1_dwc3_hs {
952 remote-endpoint = <&pmic_glink_hs_in>;
953 };
954
955 &usb_1_hsphy {
956 vdd-supply = <&vreg_l1e_0p88>;
957 vdda12-supply = <&vreg_l3e_1p2>;
958
959 phys = <&pm8550b_eusb2_repeater>;
960
961 status = "okay";
962 };
963
964 &usb_dp_qmpphy {
965 vdda-phy-supply = <&vreg_l3e_1p2>;
966 vdda-pll-supply = <&vreg_l3f_0p91>;
967
968 status = "okay";
969 };
970
971 &usb_dp_qmpphy_out {
972 remote-endpoint = <&pmic_glink_ss_in>;
973 };
974
975 &xo_board {
976 clock-frequency = <76800000>;
977 };
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