1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2023 Linaro Limited
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regu
10 #include "sm8550.dtsi"
11 #include "pm8010.dtsi"
12 #include "pm8550.dtsi"
13 #include "pm8550b.dtsi"
14 #define PMK8550VE_SID 5
15 #include "pm8550ve.dtsi"
16 #include "pm8550vs.dtsi"
17 #include "pmk8550.dtsi"
18 #include "pmr735d_a.dtsi"
19 #include "pmr735d_b.dtsi"
20
21 / {
22 model = "Qualcomm Technologies, Inc. S
23 compatible = "qcom,sm8550-qrd", "qcom,
24 chassis-type = "handset";
25
26 aliases {
27 serial0 = &uart7;
28 serial1 = &uart14;
29 };
30
31 wcd938x: audio-codec {
32 compatible = "qcom,wcd9385-cod
33
34 pinctrl-names = "default";
35 pinctrl-0 = <&wcd_default>;
36
37 qcom,micbias1-microvolt = <180
38 qcom,micbias2-microvolt = <180
39 qcom,micbias3-microvolt = <180
40 qcom,micbias4-microvolt = <180
41 qcom,mbhc-buttons-vthreshold-m
42 qcom,mbhc-headset-vthreshold-m
43 qcom,mbhc-headphone-vthreshold
44 qcom,rx-device = <&wcd_rx>;
45 qcom,tx-device = <&wcd_tx>;
46
47 reset-gpios = <&tlmm 108 GPIO_
48
49 vdd-buck-supply = <&vreg_l15b_
50 vdd-rxtx-supply = <&vreg_l15b_
51 vdd-io-supply = <&vreg_l15b_1p
52 vdd-mic-bias-supply = <&vreg_b
53
54 #sound-dai-cells = <1>;
55 };
56
57 chosen {
58 stdout-path = "serial0:115200n
59 };
60
61 gpio-keys {
62 compatible = "gpio-keys";
63
64 pinctrl-0 = <&volume_up_n>;
65 pinctrl-names = "default";
66
67 key-volume-up {
68 label = "Volume Up";
69 linux,code = <KEY_VOLU
70 gpios = <&pm8550_gpios
71 debounce-interval = <1
72 linux,can-disable;
73 wakeup-source;
74 };
75 };
76
77 pmic-glink {
78 compatible = "qcom,sm8550-pmic
79 #address-cells = <1>;
80 #size-cells = <0>;
81 orientation-gpios = <&tlmm 11
82
83 connector@0 {
84 compatible = "usb-c-co
85 reg = <0>;
86 power-role = "dual";
87 data-role = "dual";
88
89 ports {
90 #address-cells
91 #size-cells =
92
93 port@0 {
94 reg =
95
96 pmic_g
97
98 };
99 };
100
101 port@1 {
102 reg =
103
104 pmic_g
105
106 };
107 };
108
109 port@2 {
110 reg =
111
112 pmic_g
113
114 };
115 };
116 };
117 };
118 };
119
120 sound {
121 compatible = "qcom,sm8550-sndc
122 model = "SM8550-QRD";
123 audio-routing = "SpkrLeft IN",
124 "SpkrRight IN"
125 "IN1_HPHL", "H
126 "IN2_HPHR", "H
127 "AMIC1", "MIC
128 "AMIC2", "MIC
129 "AMIC3", "MIC
130 "AMIC4", "MIC
131 "AMIC5", "MIC
132 "VA DMIC0", "M
133 "VA DMIC1", "M
134 "VA DMIC2", "M
135 "TX DMIC0", "M
136 "TX DMIC1", "M
137 "TX DMIC2", "M
138 "TX SWR_INPUT0
139 "TX SWR_INPUT1
140 "TX SWR_INPUT0
141 "TX SWR_INPUT1
142
143 wcd-playback-dai-link {
144 link-name = "WCD Playb
145
146 cpu {
147 sound-dai = <&
148 };
149
150 codec {
151 sound-dai = <&
152 };
153
154 platform {
155 sound-dai = <&
156 };
157 };
158
159 wcd-capture-dai-link {
160 link-name = "WCD Captu
161
162 cpu {
163 sound-dai = <&
164 };
165
166 codec {
167 sound-dai = <&
168 };
169
170 platform {
171 sound-dai = <&
172 };
173 };
174
175 wsa-dai-link {
176 link-name = "WSA Playb
177
178 cpu {
179 sound-dai = <&
180 };
181
182 codec {
183 sound-dai = <&
184 };
185
186 platform {
187 sound-dai = <&
188 };
189 };
190
191 va-dai-link {
192 link-name = "VA Captur
193
194 cpu {
195 sound-dai = <&
196 };
197
198 codec {
199 sound-dai = <&
200 };
201
202 platform {
203 sound-dai = <&
204 };
205 };
206 };
207
208 vph_pwr: vph-pwr-regulator {
209 compatible = "regulator-fixed"
210 regulator-name = "vph_pwr";
211 regulator-min-microvolt = <370
212 regulator-max-microvolt = <370
213
214 regulator-always-on;
215 regulator-boot-on;
216 };
217
218 wcn7850-pmu {
219 compatible = "qcom,wcn7850-pmu
220
221 pinctrl-names = "default";
222 pinctrl-0 = <&wlan_en>, <&bt_d
223
224 wlan-enable-gpios = <&tlmm 80
225 bt-enable-gpios = <&tlmm 81 GP
226
227 vdd-supply = <&vreg_s5g_0p85>;
228 vddio-supply = <&vreg_l15b_1p8
229 vddaon-supply = <&vreg_s2g_0p8
230 vdddig-supply = <&vreg_s4e_0p9
231 vddrfa1p2-supply = <&vreg_s4g_
232 vddrfa1p8-supply = <&vreg_s6g_
233
234 regulators {
235 vreg_pmu_rfa_cmn: ldo0
236 regulator-name
237 };
238
239 vreg_pmu_aon_0p59: ldo
240 regulator-name
241 };
242
243 vreg_pmu_wlcx_0p8: ldo
244 regulator-name
245 };
246
247 vreg_pmu_wlmx_0p85: ld
248 regulator-name
249 };
250
251 vreg_pmu_btcmx_0p85: l
252 regulator-name
253 };
254
255 vreg_pmu_rfa_0p8: ldo5
256 regulator-name
257 };
258
259 vreg_pmu_rfa_1p2: ldo6
260 regulator-name
261 };
262
263 vreg_pmu_rfa_1p8: ldo7
264 regulator-name
265 };
266
267 vreg_pmu_pcie_0p9: ldo
268 regulator-name
269 };
270
271 vreg_pmu_pcie_1p8: ldo
272 regulator-name
273 };
274 };
275 };
276 };
277
278 &apps_rsc {
279 regulators-0 {
280 compatible = "qcom,pm8550-rpmh
281 qcom,pmic-id = "b";
282
283 vdd-bob1-supply = <&vph_pwr>;
284 vdd-bob2-supply = <&vph_pwr>;
285 vdd-l1-l4-l10-supply = <&vreg_
286 vdd-l2-l13-l14-supply = <&vreg
287 vdd-l3-supply = <&vreg_s4g_1p2
288 vdd-l5-l16-supply = <&vreg_bob
289 vdd-l6-l7-supply = <&vreg_bob1
290 vdd-l8-l9-supply = <&vreg_bob1
291 vdd-l11-supply = <&vreg_s4g_1p
292 vdd-l12-supply = <&vreg_s6g_1p
293 vdd-l15-supply = <&vreg_s6g_1p
294 vdd-l17-supply = <&vreg_bob2>;
295
296 vreg_bob1: bob1 {
297 regulator-name = "vreg
298 regulator-min-microvol
299 regulator-max-microvol
300 regulator-initial-mode
301 };
302
303 vreg_bob2: bob2 {
304 regulator-name = "vreg
305 regulator-min-microvol
306 regulator-max-microvol
307 regulator-initial-mode
308 };
309
310 vreg_l1b_1p8: ldo1 {
311 regulator-name = "vreg
312 regulator-min-microvol
313 regulator-max-microvol
314 regulator-initial-mode
315 };
316
317 vreg_l2b_3p0: ldo2 {
318 regulator-name = "vreg
319 regulator-min-microvol
320 regulator-max-microvol
321 regulator-initial-mode
322 };
323
324 vreg_l5b_3p1: ldo5 {
325 regulator-name = "vreg
326 regulator-min-microvol
327 regulator-max-microvol
328 regulator-initial-mode
329 };
330
331 vreg_l6b_1p8: ldo6 {
332 regulator-name = "vreg
333 regulator-min-microvol
334 regulator-max-microvol
335 regulator-initial-mode
336 };
337
338 vreg_l7b_1p8: ldo7 {
339 regulator-name = "vreg
340 regulator-min-microvol
341 regulator-max-microvol
342 regulator-initial-mode
343 };
344
345 vreg_l8b_1p8: ldo8 {
346 regulator-name = "vreg
347 regulator-min-microvol
348 regulator-max-microvol
349 regulator-initial-mode
350 };
351
352 vreg_l9b_2p9: ldo9 {
353 regulator-name = "vreg
354 regulator-min-microvol
355 regulator-max-microvol
356 regulator-initial-mode
357 };
358
359 vreg_l11b_1p2: ldo11 {
360 regulator-name = "vreg
361 regulator-min-microvol
362 regulator-max-microvol
363 regulator-initial-mode
364 };
365
366 vreg_l12b_1p8: ldo12 {
367 regulator-name = "vreg
368 regulator-min-microvol
369 regulator-max-microvol
370 regulator-initial-mode
371 };
372
373 vreg_l13b_3p0: ldo13 {
374 regulator-name = "vreg
375 regulator-min-microvol
376 regulator-max-microvol
377 regulator-initial-mode
378 };
379
380 vreg_l14b_3p2: ldo14 {
381 regulator-name = "vreg
382 regulator-min-microvol
383 regulator-max-microvol
384 regulator-initial-mode
385 };
386
387 vreg_l15b_1p8: ldo15 {
388 regulator-name = "vreg
389 regulator-min-microvol
390 regulator-max-microvol
391 regulator-initial-mode
392 };
393
394 vreg_l16b_2p8: ldo16 {
395 regulator-name = "vreg
396 regulator-min-microvol
397 regulator-max-microvol
398 regulator-initial-mode
399 };
400
401 vreg_l17b_2p5: ldo17 {
402 regulator-name = "vreg
403 regulator-min-microvol
404 regulator-max-microvol
405 regulator-initial-mode
406 };
407 };
408
409 regulators-1 {
410 compatible = "qcom,pm8550vs-rp
411 qcom,pmic-id = "c";
412
413 vdd-l1-supply = <&vreg_s4g_1p2
414 vdd-l2-supply = <&vreg_s4e_0p9
415 vdd-l3-supply = <&vreg_s4e_0p9
416
417 vreg_l3c_0p9: ldo3 {
418 regulator-name = "vreg
419 regulator-min-microvol
420 regulator-max-microvol
421 regulator-initial-mode
422 };
423 };
424
425 regulators-2 {
426 compatible = "qcom,pm8550vs-rp
427 qcom,pmic-id = "d";
428
429 vdd-l1-supply = <&vreg_s4e_0p9
430 vdd-l2-supply = <&vreg_s4e_0p9
431 vdd-l3-supply = <&vreg_s4e_0p9
432
433 vreg_l1d_0p88: ldo1 {
434 regulator-name = "vreg
435 regulator-min-microvol
436 regulator-max-microvol
437 regulator-initial-mode
438 };
439
440 /* ldo2 supplies SM8550 VDD_LP
441 };
442
443 regulators-3 {
444 compatible = "qcom,pm8550vs-rp
445 qcom,pmic-id = "e";
446
447 vdd-l1-supply = <&vreg_s4e_0p9
448 vdd-l2-supply = <&vreg_s4e_0p9
449 vdd-l3-supply = <&vreg_s4g_1p2
450 vdd-s4-supply = <&vph_pwr>;
451 vdd-s5-supply = <&vph_pwr>;
452
453 vreg_s4e_0p95: smps4 {
454 regulator-name = "vreg
455 regulator-min-microvol
456 regulator-max-microvol
457 regulator-initial-mode
458 };
459
460 vreg_s5e_1p08: smps5 {
461 regulator-name = "vreg
462 regulator-min-microvol
463 regulator-max-microvol
464 regulator-initial-mode
465 };
466
467 vreg_l1e_0p88: ldo1 {
468 regulator-name = "vreg
469 regulator-min-microvol
470 regulator-max-microvol
471 regulator-initial-mode
472 };
473
474 vreg_l2e_0p9: ldo2 {
475 regulator-name = "vreg
476 regulator-min-microvol
477 regulator-max-microvol
478 regulator-initial-mode
479 };
480
481 vreg_l3e_1p2: ldo3 {
482 regulator-name = "vreg
483 regulator-min-microvol
484 regulator-max-microvol
485 regulator-initial-mode
486 };
487 };
488
489 regulators-4 {
490 compatible = "qcom,pm8550ve-rp
491 qcom,pmic-id = "f";
492
493 vdd-l1-supply = <&vreg_s4e_0p9
494 vdd-l2-supply = <&vreg_s4e_0p9
495 vdd-l3-supply = <&vreg_s4e_0p9
496 vdd-s4-supply = <&vph_pwr>;
497
498 vreg_s4f_0p5: smps4 {
499 regulator-name = "vreg
500 regulator-min-microvol
501 regulator-max-microvol
502 regulator-initial-mode
503 };
504
505 vreg_l1f_0p9: ldo1 {
506 regulator-name = "vreg
507 regulator-min-microvol
508 regulator-max-microvol
509 regulator-initial-mode
510 };
511
512 vreg_l2f_0p88: ldo2 {
513 regulator-name = "vreg
514 regulator-min-microvol
515 regulator-max-microvol
516 regulator-initial-mode
517 };
518
519 vreg_l3f_0p88: ldo3 {
520 regulator-name = "vreg
521 regulator-min-microvol
522 regulator-max-microvol
523 regulator-initial-mode
524 };
525 };
526
527 regulators-5 {
528 compatible = "qcom,pm8550vs-rp
529 qcom,pmic-id = "g";
530
531 vdd-l1-supply = <&vreg_s4g_1p2
532 vdd-l2-supply = <&vreg_s4g_1p2
533 vdd-l3-supply = <&vreg_s4g_1p2
534 vdd-s1-supply = <&vph_pwr>;
535 vdd-s2-supply = <&vph_pwr>;
536 vdd-s3-supply = <&vph_pwr>;
537 vdd-s4-supply = <&vph_pwr>;
538 vdd-s5-supply = <&vph_pwr>;
539 vdd-s6-supply = <&vph_pwr>;
540
541 vreg_s1g_1p25: smps1 {
542 regulator-name = "vreg
543 regulator-min-microvol
544 regulator-max-microvol
545 regulator-initial-mode
546 };
547
548 vreg_s2g_0p85: smps2 {
549 regulator-name = "vreg
550 regulator-min-microvol
551 regulator-max-microvol
552 regulator-initial-mode
553 };
554
555 vreg_s3g_0p8: smps3 {
556 regulator-name = "vreg
557 regulator-min-microvol
558 regulator-max-microvol
559 regulator-initial-mode
560 };
561
562 vreg_s4g_1p25: smps4 {
563 regulator-name = "vreg
564 regulator-min-microvol
565 regulator-max-microvol
566 regulator-initial-mode
567 };
568
569 vreg_s5g_0p85: smps5 {
570 regulator-name = "vreg
571 regulator-min-microvol
572 regulator-max-microvol
573 regulator-initial-mode
574 };
575
576 vreg_s6g_1p86: smps6 {
577 regulator-name = "vreg
578 regulator-min-microvol
579 regulator-max-microvol
580 regulator-initial-mode
581 };
582
583 vreg_l1g_1p2: ldo1 {
584 regulator-name = "vreg
585 regulator-min-microvol
586 regulator-max-microvol
587 regulator-initial-mode
588 };
589
590 vreg_l3g_1p2: ldo3 {
591 regulator-name = "vreg
592 regulator-min-microvol
593 regulator-max-microvol
594 regulator-initial-mode
595 };
596 };
597
598 regulators-6 {
599 compatible = "qcom,pm8010-rpmh
600 qcom,pmic-id = "m";
601
602 vdd-l1-l2-supply = <&vreg_s4g_
603 vdd-l3-l4-supply = <&vreg_bob2
604 vdd-l5-supply = <&vreg_s6g_1p8
605 vdd-l6-supply = <&vreg_s6g_1p8
606 vdd-l7-supply = <&vreg_bob1>;
607
608 vreg_l1m_1p056: ldo1 {
609 regulator-name = "vreg
610 regulator-min-microvol
611 regulator-max-microvol
612 regulator-initial-mode
613 };
614
615 vreg_l2m_1p056: ldo2 {
616 regulator-name = "vreg
617 regulator-min-microvol
618 regulator-max-microvol
619 regulator-initial-mode
620 };
621
622 vreg_l3m_2p8: ldo3 {
623 regulator-name = "vreg
624 regulator-min-microvol
625 regulator-max-microvol
626 regulator-initial-mode
627 };
628
629 vreg_l4m_2p8: ldo4 {
630 regulator-name = "vreg
631 regulator-min-microvol
632 regulator-max-microvol
633 regulator-initial-mode
634 };
635
636 vreg_l5m_1p8: ldo5 {
637 regulator-name = "vreg
638 regulator-min-microvol
639 regulator-max-microvol
640 regulator-initial-mode
641 };
642
643 vreg_l6m_1p8: ldo6 {
644 regulator-name = "vreg
645 regulator-min-microvol
646 regulator-max-microvol
647 regulator-initial-mode
648 };
649
650 vreg_l7m_2p9: ldo7 {
651 regulator-name = "vreg
652 regulator-min-microvol
653 regulator-max-microvol
654 regulator-initial-mode
655 };
656 };
657
658 regulators-7 {
659 compatible = "qcom,pm8010-rpmh
660 qcom,pmic-id = "n";
661
662 vdd-l1-l2-supply = <&vreg_s4g_
663 vdd-l3-l4-supply = <&vreg_bob2
664 vdd-l5-supply = <&vreg_s6g_1p8
665 vdd-l6-supply = <&vreg_bob1>;
666 vdd-l7-supply = <&vreg_bob1>;
667
668 vreg_l1n_1p1: ldo1 {
669 regulator-name = "vreg
670 regulator-min-microvol
671 regulator-max-microvol
672 regulator-initial-mode
673 };
674
675 vreg_l2n_1p1: ldo2 {
676 regulator-name = "vreg
677 regulator-min-microvol
678 regulator-max-microvol
679 regulator-initial-mode
680 };
681
682 vreg_l3n_2p8: ldo3 {
683 regulator-name = "vreg
684 regulator-min-microvol
685 regulator-max-microvol
686 regulator-initial-mode
687 };
688
689 vreg_l4n_2p8: ldo4 {
690 regulator-name = "vreg
691 regulator-min-microvol
692 regulator-max-microvol
693 regulator-initial-mode
694 };
695
696 vreg_l5n_1p8: ldo5 {
697 regulator-name = "vreg
698 regulator-min-microvol
699 regulator-max-microvol
700 regulator-initial-mode
701 };
702
703 vreg_l6n_3p3: ldo6 {
704 regulator-name = "vreg
705 regulator-min-microvol
706 regulator-max-microvol
707 regulator-initial-mode
708 };
709
710 vreg_l7n_2p96: ldo7 {
711 regulator-name = "vreg
712 regulator-min-microvol
713 regulator-max-microvol
714 regulator-initial-mode
715 };
716 };
717 };
718
719 &i2c_master_hub_0 {
720 status = "okay";
721 };
722
723 &i2c_hub_2 {
724 status = "okay";
725
726 typec-retimer@1c {
727 compatible = "onnn,nb7vpq904m"
728 reg = <0x1c>;
729
730 vcc-supply = <&vreg_l15b_1p8>;
731
732 retimer-switch;
733 orientation-switch;
734
735 ports {
736 #address-cells = <1>;
737 #size-cells = <0>;
738
739 port@0 {
740 reg = <0>;
741
742 redriver_ss_ou
743 remote
744 };
745 };
746
747 port@1 {
748 reg = <1>;
749
750 redriver_ss_in
751 data-l
752 remote
753 };
754 };
755 };
756 };
757
758 typec-mux@42 {
759 compatible = "fcs,fsa4480";
760 reg = <0x42>;
761
762 vcc-supply = <&vreg_bob1>;
763
764 mode-switch;
765 orientation-switch;
766
767 port {
768 fsa4480_sbu_mux: endpo
769 remote-endpoin
770 };
771 };
772 };
773 };
774
775 &ipa {
776 qcom,gsi-loader = "self";
777 memory-region = <&ipa_fw_mem>;
778 firmware-name = "qcom/sm8550/ipa_fws.m
779 status = "okay";
780 };
781
782 &gpi_dma1 {
783 status = "okay";
784 };
785
786 &gpu {
787 status = "okay";
788
789 zap-shader {
790 firmware-name = "qcom/sm8550/a
791 };
792 };
793
794 &lpass_tlmm {
795 spkr_1_sd_n_active: spkr-1-sd-n-active
796 pins = "gpio17";
797 function = "gpio";
798 drive-strength = <16>;
799 bias-disable;
800 output-low;
801 };
802
803 spkr_2_sd_n_active: spkr-2-sd-n-active
804 pins = "gpio18";
805 function = "gpio";
806 drive-strength = <16>;
807 bias-disable;
808 output-low;
809 };
810 };
811
812 &mdss {
813 status = "okay";
814 };
815
816 &mdss_dsi0 {
817 vdda-supply = <&vreg_l3e_1p2>;
818 status = "okay";
819
820 panel@0 {
821 compatible = "visionox,vtdr613
822 reg = <0>;
823
824 pinctrl-0 = <&sde_dsi_active>,
825 pinctrl-1 = <&sde_dsi_suspend>
826 pinctrl-names = "default", "sl
827
828 vci-supply = <&vreg_l13b_3p0>;
829 vdd-supply = <&vreg_l11b_1p2>;
830 vddio-supply = <&vreg_l12b_1p8
831
832 reset-gpios = <&tlmm 133 GPIO_
833
834 port {
835 panel0_in: endpoint {
836 remote-endpoin
837 };
838 };
839 };
840 };
841
842 &mdss_dsi0_out {
843 remote-endpoint = <&panel0_in>;
844 data-lanes = <0 1 2 3>;
845 };
846
847 &mdss_dsi0_phy {
848 vdds-supply = <&vreg_l1e_0p88>;
849 status = "okay";
850 };
851
852 &mdss_dp0 {
853 status = "okay";
854 };
855
856 &mdss_dp0_out {
857 data-lanes = <0 1>;
858 };
859
860 &pcie0 {
861 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIG
862 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LO
863
864 pinctrl-0 = <&pcie0_default_state>;
865 pinctrl-names = "default";
866
867 status = "okay";
868 };
869
870 &pcieport0 {
871 wifi@0 {
872 compatible = "pci17cb,1107";
873 reg = <0x10000 0x0 0x0 0x0 0x0
874
875 vddrfacmn-supply = <&vreg_pmu_
876 vddaon-supply = <&vreg_pmu_aon
877 vddwlcx-supply = <&vreg_pmu_wl
878 vddwlmx-supply = <&vreg_pmu_wl
879 vddrfa0p8-supply = <&vreg_pmu_
880 vddrfa1p2-supply = <&vreg_pmu_
881 vddrfa1p8-supply = <&vreg_pmu_
882 vddpcie0p9-supply = <&vreg_pmu
883 vddpcie1p8-supply = <&vreg_pmu
884 };
885 };
886
887 &pcie0_phy {
888 vdda-phy-supply = <&vreg_l1e_0p88>;
889 vdda-pll-supply = <&vreg_l3e_1p2>;
890
891 status = "okay";
892 };
893
894 &pm8550_flash {
895 status = "okay";
896
897 led-0 {
898 function = LED_FUNCTION_FLASH;
899 color = <LED_COLOR_ID_YELLOW>;
900 led-sources = <1>, <4>;
901 led-max-microamp = <500000>;
902 flash-max-microamp = <2000000>
903 flash-max-timeout-us = <128000
904 function-enumerator = <0>;
905 };
906
907 led-1 {
908 function = LED_FUNCTION_FLASH;
909 color = <LED_COLOR_ID_WHITE>;
910 led-sources = <2>, <3>;
911 led-max-microamp = <500000>;
912 flash-max-microamp = <2000000>
913 flash-max-timeout-us = <128000
914 function-enumerator = <1>;
915 };
916 };
917
918 &pm8550_gpios {
919 volume_up_n: volume-up-n-state {
920 pins = "gpio6";
921 function = "normal";
922 power-source = <1>;
923 bias-pull-up;
924 input-enable;
925 };
926 };
927
928 &pm8550_pwm {
929 status = "okay";
930
931 multi-led {
932 color = <LED_COLOR_ID_RGB>;
933 function = LED_FUNCTION_STATUS
934
935 #address-cells = <1>;
936 #size-cells = <0>;
937
938 led@1 {
939 reg = <1>;
940 color = <LED_COLOR_ID_
941 };
942
943 led@2 {
944 reg = <2>;
945 color = <LED_COLOR_ID_
946 };
947
948 led@3 {
949 reg = <3>;
950 color = <LED_COLOR_ID_
951 };
952 };
953 };
954
955 &pm8550b_eusb2_repeater {
956 vdd18-supply = <&vreg_l15b_1p8>;
957 vdd3-supply = <&vreg_l5b_3p1>;
958 };
959
960 &pon_pwrkey {
961 status = "okay";
962 };
963
964 &pon_resin {
965 linux,code = <KEY_VOLUMEDOWN>;
966
967 status = "okay";
968 };
969
970 &pmk8550_gpios {
971 pmk8550_sleep_clk: sleep-clk-state {
972 pins = "gpio3";
973 function = "func1";
974 input-disable;
975 output-enable;
976 bias-disable;
977 power-source = <0>;
978 };
979 };
980
981 &qupv3_id_0 {
982 status = "okay";
983 };
984
985 &qupv3_id_1 {
986 status = "okay";
987 };
988
989 &remoteproc_adsp {
990 firmware-name = "qcom/sm8550/adsp.mbn"
991 "qcom/sm8550/adsp_dtb.
992 status = "okay";
993 };
994
995 &remoteproc_cdsp {
996 firmware-name = "qcom/sm8550/cdsp.mbn"
997 "qcom/sm8550/cdsp_dtb.
998 status = "okay";
999 };
1000
1001 &remoteproc_mpss {
1002 firmware-name = "qcom/sm8550/modem.mb
1003 "qcom/sm8550/modem_dt
1004 status = "okay";
1005 };
1006
1007 &sleep_clk {
1008 clock-frequency = <32000>;
1009 };
1010
1011 &swr0 {
1012 status = "okay";
1013
1014 /* WSA8845, Speaker North */
1015 north_spkr: speaker@0,0 {
1016 compatible = "sdw20217020400"
1017 reg = <0 0>;
1018 pinctrl-names = "default";
1019 pinctrl-0 = <&spkr_1_sd_n_act
1020 powerdown-gpios = <&lpass_tlm
1021 #sound-dai-cells = <0>;
1022 sound-name-prefix = "SpkrLeft
1023 vdd-1p8-supply = <&vreg_l15b_
1024 vdd-io-supply = <&vreg_l3g_1p
1025 qcom,port-mapping = <1 2 3 7
1026 };
1027
1028 /* WSA8845, Speaker South */
1029 south_spkr: speaker@0,1 {
1030 compatible = "sdw20217020400"
1031 reg = <0 1>;
1032 pinctrl-names = "default";
1033 pinctrl-0 = <&spkr_2_sd_n_act
1034 powerdown-gpios = <&lpass_tlm
1035 #sound-dai-cells = <0>;
1036 sound-name-prefix = "SpkrRigh
1037 vdd-1p8-supply = <&vreg_l15b_
1038 vdd-io-supply = <&vreg_l3g_1p
1039 qcom,port-mapping = <4 5 6 7
1040 };
1041 };
1042
1043 &spi4 {
1044 status = "okay";
1045
1046 touchscreen@0 {
1047 compatible = "goodix,gt9916";
1048 reg = <0>;
1049
1050 interrupt-parent = <&tlmm>;
1051 interrupts = <25 IRQ_TYPE_LEV
1052
1053 reset-gpios = <&tlmm 24 GPIO_
1054
1055 avdd-supply = <&vreg_l14b_3p2
1056
1057 spi-max-frequency = <1000000>
1058
1059 touchscreen-size-x = <1080>;
1060 touchscreen-size-y = <2400>;
1061
1062 pinctrl-names = "default";
1063 pinctrl-0 = <&ts_irq>, <&ts_r
1064 };
1065 };
1066
1067 &swr1 {
1068 status = "okay";
1069
1070 /* WCD9385 RX */
1071 wcd_rx: codec@0,4 {
1072 compatible = "sdw20217010d00"
1073 reg = <0 4>;
1074 qcom,rx-port-mapping = <1 2 3
1075 };
1076 };
1077
1078 &swr2 {
1079 status = "okay";
1080
1081 /* WCD9385 TX */
1082 wcd_tx: codec@0,3 {
1083 compatible = "sdw20217010d00"
1084 reg = <0 3>;
1085 qcom,tx-port-mapping = <2 2 3
1086 };
1087 };
1088
1089 &tlmm {
1090 gpio-reserved-ranges = <32 8>;
1091
1092 bt_default: bt-default-state {
1093 bt-en-pins {
1094 pins = "gpio81";
1095 function = "gpio";
1096 drive-strength = <16>
1097 bias-disable;
1098 };
1099
1100 sw-ctrl-pins {
1101 pins = "gpio82";
1102 function = "gpio";
1103 bias-pull-down;
1104 };
1105 };
1106
1107 sde_dsi_active: sde-dsi-active-state
1108 pins = "gpio133";
1109 function = "gpio";
1110 drive-strength = <8>;
1111 bias-disable;
1112 };
1113
1114 sde_dsi_suspend: sde-dsi-suspend-stat
1115 pins = "gpio133";
1116 function = "gpio";
1117 drive-strength = <2>;
1118 bias-pull-down;
1119 };
1120
1121 sde_te_active: sde-te-active-state {
1122 pins = "gpio86";
1123 function = "mdp_vsync";
1124 drive-strength = <2>;
1125 bias-pull-down;
1126 };
1127
1128 sde_te_suspend: sde-te-suspend-state
1129 pins = "gpio86";
1130 function = "mdp_vsync";
1131 drive-strength = <2>;
1132 bias-pull-down;
1133 };
1134
1135 ts_irq: ts-irq-state {
1136 pins = "gpio25";
1137 function = "gpio";
1138 drive-strength = <8>;
1139 bias-pull-up;
1140 };
1141
1142 ts_reset: ts-reset-state {
1143 pins = "gpio24";
1144 function = "gpio";
1145 drive-strength = <8>;
1146 bias-pull-up;
1147 };
1148
1149 wcd_default: wcd-reset-n-active-state
1150 pins = "gpio108";
1151 function = "gpio";
1152 drive-strength = <16>;
1153 bias-disable;
1154 output-low;
1155 };
1156
1157 wlan_en: wlan-en-state {
1158 pins = "gpio80";
1159 function = "gpio";
1160 drive-strength = <8>;
1161 bias-pull-down;
1162 };
1163 };
1164
1165 &uart7 {
1166 status = "okay";
1167 };
1168
1169 &uart14 {
1170 status = "okay";
1171
1172 bluetooth {
1173 compatible = "qcom,wcn7850-bt
1174
1175 vddrfacmn-supply = <&vreg_pmu
1176 vddaon-supply = <&vreg_pmu_ao
1177 vddwlcx-supply = <&vreg_pmu_w
1178 vddwlmx-supply = <&vreg_pmu_w
1179 vddrfa0p8-supply = <&vreg_pmu
1180 vddrfa1p2-supply = <&vreg_pmu
1181 vddrfa1p8-supply = <&vreg_pmu
1182
1183 max-speed = <3200000>;
1184 };
1185 };
1186
1187 &ufs_mem_hc {
1188 reset-gpios = <&tlmm 210 GPIO_ACTIVE_
1189 vcc-supply = <&vreg_l17b_2p5>;
1190 vcc-max-microamp = <1300000>;
1191 vccq-supply = <&vreg_l1g_1p2>;
1192 vccq-max-microamp = <1200000>;
1193 vdd-hba-supply = <&vreg_l3g_1p2>;
1194
1195 status = "okay";
1196 };
1197
1198 &ufs_mem_phy {
1199 vdda-phy-supply = <&vreg_l1d_0p88>;
1200 vdda-pll-supply = <&vreg_l3e_1p2>;
1201
1202 status = "okay";
1203 };
1204
1205 &usb_1 {
1206 status = "okay";
1207 };
1208
1209 &usb_1_dwc3_hs {
1210 remote-endpoint = <&pmic_glink_hs_in>
1211 };
1212
1213 &usb_1_hsphy {
1214 vdd-supply = <&vreg_l1e_0p88>;
1215 vdda12-supply = <&vreg_l3e_1p2>;
1216
1217 phys = <&pm8550b_eusb2_repeater>;
1218
1219 status = "okay";
1220 };
1221
1222 &usb_dp_qmpphy {
1223 vdda-phy-supply = <&vreg_l3e_1p2>;
1224 vdda-pll-supply = <&vreg_l3f_0p88>;
1225
1226 status = "okay";
1227 };
1228
1229 &usb_dp_qmpphy_out {
1230 remote-endpoint = <&redriver_ss_in>;
1231 };
1232
1233 &xo_board {
1234 clock-frequency = <76800000>;
1235 };
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