1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright 2020, Compass Electronics Group, 3 * Copyright 2020, Compass Electronics Group, LLC
4 */ 4 */
5 5
6 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/clock/versaclock.h> <<
8 7
9 / { 8 / {
10 memory@48000000 { 9 memory@48000000 {
11 device_type = "memory"; 10 device_type = "memory";
12 /* first 128MB is reserved for 11 /* first 128MB is reserved for secure area. */
13 reg = <0x0 0x48000000 0x0 0x78 12 reg = <0x0 0x48000000 0x0 0x78000000>;
14 }; 13 };
15 14
>> 15 memory@600000000 {
>> 16 device_type = "memory";
>> 17 reg = <0x6 0x00000000 0x0 0x80000000>;
>> 18 };
>> 19
16 osc_32k: osc_32k { 20 osc_32k: osc_32k {
17 compatible = "fixed-clock"; 21 compatible = "fixed-clock";
18 #clock-cells = <0>; 22 #clock-cells = <0>;
19 clock-frequency = <32768>; 23 clock-frequency = <32768>;
20 clock-output-names = "osc_32k" 24 clock-output-names = "osc_32k";
21 }; 25 };
22 26
23 reg_1p8v: regulator-1p8v { !! 27 reg_1p8v: regulator0 {
24 compatible = "regulator-fixed" 28 compatible = "regulator-fixed";
25 regulator-name = "fixed-1.8V"; 29 regulator-name = "fixed-1.8V";
26 regulator-min-microvolt = <180 30 regulator-min-microvolt = <1800000>;
27 regulator-max-microvolt = <180 31 regulator-max-microvolt = <1800000>;
28 regulator-boot-on; 32 regulator-boot-on;
29 regulator-always-on; 33 regulator-always-on;
30 }; 34 };
31 35
32 reg_3p3v: regulator-3p3v { !! 36 reg_3p3v: regulator1 {
33 compatible = "regulator-fixed" 37 compatible = "regulator-fixed";
34 regulator-name = "fixed-3.3V"; 38 regulator-name = "fixed-3.3V";
35 regulator-min-microvolt = <330 39 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <330 40 regulator-max-microvolt = <3300000>;
37 regulator-boot-on; 41 regulator-boot-on;
38 regulator-always-on; 42 regulator-always-on;
39 }; 43 };
40 44
41 wlan_pwrseq: wlan_pwrseq { 45 wlan_pwrseq: wlan_pwrseq {
42 compatible = "mmc-pwrseq-simpl 46 compatible = "mmc-pwrseq-simple";
43 reset-gpios = <&pca9654 1 GPIO 47 reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
44 clocks = <&osc_32k>; 48 clocks = <&osc_32k>;
45 clock-names = "ext_clock"; 49 clock-names = "ext_clock";
46 post-power-on-delay-ms = <80>; 50 post-power-on-delay-ms = <80>;
47 }; 51 };
48 }; 52 };
49 53
50 &avb { 54 &avb {
51 pinctrl-0 = <&avb_pins>; 55 pinctrl-0 = <&avb_pins>;
52 pinctrl-names = "default"; 56 pinctrl-names = "default";
53 phy-mode = "rgmii-rxid"; 57 phy-mode = "rgmii-rxid";
54 phy-handle = <&phy0>; 58 phy-handle = <&phy0>;
55 rx-internal-delay-ps = <1800>; 59 rx-internal-delay-ps = <1800>;
56 tx-internal-delay-ps = <2000>; 60 tx-internal-delay-ps = <2000>;
57 clocks = <&cpg CPG_MOD 812>, <&versacl <<
58 clock-names = "fck", "refclk"; <<
59 status = "okay"; 61 status = "okay";
60 62
61 phy0: ethernet-phy@0 { 63 phy0: ethernet-phy@0 {
62 compatible = "ethernet-phy-id0 <<
63 "ethernet-phy-iee <<
64 reg = <0>; 64 reg = <0>;
65 interrupt-parent = <&gpio2>; 65 interrupt-parent = <&gpio2>;
66 interrupts = <11 IRQ_TYPE_LEVE 66 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
67 reset-gpios = <&gpio2 10 GPIO_ 67 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
68 }; 68 };
69 }; 69 };
70 70
71 &extal_clk { 71 &extal_clk {
72 clock-frequency = <16666666>; 72 clock-frequency = <16666666>;
73 }; 73 };
74 74
75 &extalr_clk { 75 &extalr_clk {
76 clock-frequency = <32768>; 76 clock-frequency = <32768>;
77 }; 77 };
78 78
79 &gpio6 { 79 &gpio6 {
80 usb-hub-reset-hog { !! 80 usb_hub_reset {
81 gpio-hog; 81 gpio-hog;
82 gpios = <10 GPIO_ACTIVE_HIGH>; 82 gpios = <10 GPIO_ACTIVE_HIGH>;
83 output-high; 83 output-high;
84 line-name = "usb-hub-reset"; 84 line-name = "usb-hub-reset";
85 }; 85 };
86 }; 86 };
87 87
88 &hscif0 { 88 &hscif0 {
89 pinctrl-0 = <&hscif0_pins>; 89 pinctrl-0 = <&hscif0_pins>;
90 pinctrl-names = "default"; 90 pinctrl-names = "default";
91 uart-has-rtscts; 91 uart-has-rtscts;
92 status = "okay"; 92 status = "okay";
93 93
94 bluetooth { 94 bluetooth {
95 compatible = "brcm,bcm43438-bt 95 compatible = "brcm,bcm43438-bt";
96 shutdown-gpios = <&pca9654 2 G 96 shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
97 host-wakeup-gpios = <&gpio1 28 97 host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
98 device-wakeup-gpios = <&pca965 98 device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
99 clocks = <&osc_32k>; 99 clocks = <&osc_32k>;
100 clock-names = "extclk"; 100 clock-names = "extclk";
101 max-speed = <4000000>; 101 max-speed = <4000000>;
102 }; 102 };
103 }; 103 };
104 104
105 &hscif2 { 105 &hscif2 {
106 status = "okay"; 106 status = "okay";
107 pinctrl-0 = <&hscif2_pins>; 107 pinctrl-0 = <&hscif2_pins>;
108 pinctrl-names = "default"; 108 pinctrl-names = "default";
109 }; 109 };
110 110
111 &i2c4 { 111 &i2c4 {
112 status = "okay"; 112 status = "okay";
113 clock-frequency = <100000>; !! 113 clock-frequency = <400000>;
114 114
115 pca9654: gpio@20 { 115 pca9654: gpio@20 {
116 compatible = "onnn,pca9654"; 116 compatible = "onnn,pca9654";
117 reg = <0x20>; 117 reg = <0x20>;
118 gpio-controller; 118 gpio-controller;
119 #gpio-cells = <2>; 119 #gpio-cells = <2>;
120 gpio-line-names = 120 gpio-line-names =
121 "i2c4_20_0", 121 "i2c4_20_0",
122 "wl_reg_on", 122 "wl_reg_on",
123 "bt_reg_on", 123 "bt_reg_on",
124 "i2c4_20_3", 124 "i2c4_20_3",
125 "i2c4_20_4", 125 "i2c4_20_4",
126 "bt_dev_wake", 126 "bt_dev_wake",
127 "i2c4_20_6", 127 "i2c4_20_6",
128 "i2c4_20_7"; 128 "i2c4_20_7";
129 }; 129 };
130 130
131 pca9654_lte: gpio@21 { 131 pca9654_lte: gpio@21 {
132 compatible = "onnn,pca9654"; 132 compatible = "onnn,pca9654";
133 reg = <0x21>; 133 reg = <0x21>;
134 interrupt-parent = <&gpio5>; 134 interrupt-parent = <&gpio5>;
135 interrupts = <25 IRQ_TYPE_EDGE 135 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
136 interrupt-controller; 136 interrupt-controller;
137 #interrupt-cells = <2>; 137 #interrupt-cells = <2>;
138 gpio-controller; 138 gpio-controller;
139 #gpio-cells = <2>; 139 #gpio-cells = <2>;
140 gpio-line-names = 140 gpio-line-names =
141 "i2c4_21_0", 141 "i2c4_21_0",
142 "zoe_pwr_on", 142 "zoe_pwr_on",
143 "zoe_extint", 143 "zoe_extint",
144 "zoe_reset_n", 144 "zoe_reset_n",
145 "sara_reset", 145 "sara_reset",
146 "i2c4_21_5", 146 "i2c4_21_5",
147 "sara_pwr_off", 147 "sara_pwr_off",
148 "sara_networking_statu 148 "sara_networking_status";
149 }; 149 };
150 150
151 eeprom@50 { 151 eeprom@50 {
152 compatible = "microchip,24c64" 152 compatible = "microchip,24c64", "atmel,24c64";
153 pagesize = <32>; 153 pagesize = <32>;
154 read-only; /* Manufacturi 154 read-only; /* Manufacturing EEPROM programmed at factory */
155 reg = <0x50>; 155 reg = <0x50>;
156 }; 156 };
157 157
158 rtc@51 { 158 rtc@51 {
159 compatible = "nxp,pcf85263"; 159 compatible = "nxp,pcf85263";
160 reg = <0x51>; 160 reg = <0x51>;
161 }; 161 };
162 162
163 versaclock5: versaclock_som@6a { 163 versaclock5: versaclock_som@6a {
164 compatible = "idt,5p49v6965"; 164 compatible = "idt,5p49v6965";
165 reg = <0x6a>; 165 reg = <0x6a>;
166 #clock-cells = <1>; 166 #clock-cells = <1>;
167 clocks = <&x304_clk>; 167 clocks = <&x304_clk>;
168 clock-names = "xin"; 168 clock-names = "xin";
169 /* du_dotclkin0, du_dotclkin2, 169 /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
170 assigned-clocks = <&versaclock 170 assigned-clocks = <&versaclock5 1>,
171 <&versacloc 171 <&versaclock5 2>,
172 <&versacloc 172 <&versaclock5 3>,
173 <&versacloc 173 <&versaclock5 4>;
174 <<
175 assigned-clock-rates = <333333 174 assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
176 <<
177 OUT1 { <<
178 idt,mode = <VC5_CMOS>; <<
179 idt,voltage-microvolt <<
180 idt,slew-percent = <10 <<
181 }; <<
182 <<
183 OUT2 { <<
184 idt,mode = <VC5_CMOS>; <<
185 idt,voltage-microvolt <<
186 idt,slew-percent = <10 <<
187 }; <<
188 <<
189 OUT3 { <<
190 idt,mode = <VC5_CMOS>; <<
191 idt,voltage-microvolt <<
192 idt,slew-percent = <10 <<
193 }; <<
194 <<
195 OUT4 { <<
196 idt,mode = <VC5_CMOS>; <<
197 idt,voltage-microvolt <<
198 idt,slew-percent = <10 <<
199 }; <<
200 }; 175 };
201 }; 176 };
202 177
203 &pfc { 178 &pfc {
204 pinctrl-0 = <&scif_clk_pins>; 179 pinctrl-0 = <&scif_clk_pins>;
205 pinctrl-names = "default"; 180 pinctrl-names = "default";
206 181
207 avb_pins: avb { 182 avb_pins: avb {
208 mux { 183 mux {
209 groups = "avb_link", " 184 groups = "avb_link", "avb_mdio", "avb_mii";
210 function = "avb"; 185 function = "avb";
211 }; 186 };
212 187
213 pins_mdio { 188 pins_mdio {
214 groups = "avb_mdio"; 189 groups = "avb_mdio";
215 drive-strength = <24>; 190 drive-strength = <24>;
216 }; 191 };
217 192
218 pins_mii_tx { 193 pins_mii_tx {
219 pins = "PIN_AVB_TX_CTL 194 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
220 "PIN_AVB_TD1", 195 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
221 drive-strength = <12>; 196 drive-strength = <12>;
222 }; 197 };
223 }; 198 };
224 199
225 scif2_pins: scif2 { 200 scif2_pins: scif2 {
226 groups = "scif2_data_a"; 201 groups = "scif2_data_a";
227 function = "scif2"; 202 function = "scif2";
228 }; 203 };
229 204
230 hscif0_pins: hscif0 { 205 hscif0_pins: hscif0 {
231 groups = "hscif0_data", "hscif 206 groups = "hscif0_data", "hscif0_ctrl";
232 function = "hscif0"; 207 function = "hscif0";
233 }; 208 };
234 209
235 hscif1_pins: hscif1 { 210 hscif1_pins: hscif1 {
236 groups = "hscif1_data_a", "hsc 211 groups = "hscif1_data_a", "hscif1_ctrl_a";
237 function = "hscif1"; 212 function = "hscif1";
238 }; 213 };
239 214
240 hscif2_pins: hscif2 { 215 hscif2_pins: hscif2 {
241 groups = "hscif2_data_a"; 216 groups = "hscif2_data_a";
242 function = "hscif2"; 217 function = "hscif2";
243 }; 218 };
244 219
245 scif0_pins: scif0 { 220 scif0_pins: scif0 {
246 groups = "scif0_data"; 221 groups = "scif0_data";
247 function = "scif0"; 222 function = "scif0";
248 }; 223 };
249 224
250 scif5_pins: scif5 { 225 scif5_pins: scif5 {
251 groups = "scif5_data_a"; 226 groups = "scif5_data_a";
252 function = "scif5"; 227 function = "scif5";
253 }; 228 };
254 229
255 scif_clk_pins: scif_clk { 230 scif_clk_pins: scif_clk {
256 groups = "scif_clk_a"; 231 groups = "scif_clk_a";
257 function = "scif_clk"; 232 function = "scif_clk";
258 }; 233 };
259 234
260 i2c0_pins: i2c0 { 235 i2c0_pins: i2c0 {
261 groups = "i2c0"; 236 groups = "i2c0";
262 function = "i2c0"; 237 function = "i2c0";
263 }; 238 };
264 239
265 sdhi2_pins: sd2 { 240 sdhi2_pins: sd2 {
266 groups = "sdhi2_data4", "sdhi2 241 groups = "sdhi2_data4", "sdhi2_ctrl";
267 function = "sdhi2"; 242 function = "sdhi2";
268 power-source = <1800>; 243 power-source = <1800>;
269 }; 244 };
270 245
271 sdhi3_pins: sd3 { 246 sdhi3_pins: sd3 {
272 groups = "sdhi3_data8", "sdhi3 247 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
273 function = "sdhi3"; 248 function = "sdhi3";
274 power-source = <1800>; 249 power-source = <1800>;
275 }; 250 };
276 }; 251 };
277 252
278 &scif_clk { 253 &scif_clk {
279 clock-frequency = <14745600>; 254 clock-frequency = <14745600>;
280 }; 255 };
281 256
282 &scif2 { 257 &scif2 {
283 pinctrl-0 = <&scif2_pins>; 258 pinctrl-0 = <&scif2_pins>;
284 pinctrl-names = "default"; 259 pinctrl-names = "default";
285 status = "okay"; 260 status = "okay";
286 }; 261 };
287 262
288 &sdhi2 { 263 &sdhi2 {
289 pinctrl-names = "default"; 264 pinctrl-names = "default";
290 pinctrl-0 = <&sdhi2_pins>; 265 pinctrl-0 = <&sdhi2_pins>;
291 bus-width = <4>; 266 bus-width = <4>;
292 vmmc-supply = <®_3p3v>; 267 vmmc-supply = <®_3p3v>;
293 vqmmc-supply = <®_1p8v>; 268 vqmmc-supply = <®_1p8v>;
294 non-removable; 269 non-removable;
295 cap-power-off-card; 270 cap-power-off-card;
>> 271 pm-ignore-notify;
296 keep-power-in-suspend; 272 keep-power-in-suspend;
297 mmc-pwrseq = <&wlan_pwrseq>; 273 mmc-pwrseq = <&wlan_pwrseq>;
298 status = "okay"; 274 status = "okay";
299 #address-cells = <1>; 275 #address-cells = <1>;
300 #size-cells = <0>; 276 #size-cells = <0>;
301 277
302 brcmf: bcrmf@1 { 278 brcmf: bcrmf@1 {
303 reg = <1>; 279 reg = <1>;
304 compatible = "brcm,bcm4329-fma 280 compatible = "brcm,bcm4329-fmac";
305 interrupt-parent = <&gpio1>; 281 interrupt-parent = <&gpio1>;
306 interrupts = <27 IRQ_TYPE_LEVE 282 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
307 interrupt-names = "host-wake"; 283 interrupt-names = "host-wake";
308 }; 284 };
309 }; 285 };
310 286
311 &sdhi3 { 287 &sdhi3 {
312 pinctrl-0 = <&sdhi3_pins>; 288 pinctrl-0 = <&sdhi3_pins>;
313 pinctrl-1 = <&sdhi3_pins>; 289 pinctrl-1 = <&sdhi3_pins>;
314 pinctrl-names = "default", "state_uhs" 290 pinctrl-names = "default", "state_uhs";
315 vmmc-supply = <®_3p3v>; 291 vmmc-supply = <®_3p3v>;
316 vqmmc-supply = <®_1p8v>; 292 vqmmc-supply = <®_1p8v>;
317 bus-width = <8>; 293 bus-width = <8>;
318 mmc-hs200-1_8v; 294 mmc-hs200-1_8v;
319 no-sd; <<
320 no-sdio; <<
321 non-removable; 295 non-removable;
322 fixed-emmc-driver-type = <1>; 296 fixed-emmc-driver-type = <1>;
323 status = "okay"; 297 status = "okay";
324 }; 298 };
325 299
326 &usb2_clksel { 300 &usb2_clksel {
327 clocks = <&cpg CPG_MOD 703>, <&cpg CPG 301 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
328 <&versaclock5 3>, <&usb3s0_c 302 <&versaclock5 3>, <&usb3s0_clk>;
329 status = "okay"; 303 status = "okay";
330 }; 304 };
331 305
332 &usb3s0_clk { 306 &usb3s0_clk {
333 clock-frequency = <100000000>; 307 clock-frequency = <100000000>;
>> 308 };
>> 309
>> 310 &vspb {
>> 311 status = "okay";
>> 312 };
>> 313
>> 314 &vspi0 {
>> 315 status = "okay";
334 }; 316 };
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