1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright 2020, Compass Electronics Group, 3 * Copyright 2020, Compass Electronics Group, LLC
4 */ 4 */
5 5
6 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/clock/versaclock.h> !! 7 #include <dt-bindings/clk/versaclock.h>
8 8
9 / { 9 / {
10 memory@48000000 { 10 memory@48000000 {
11 device_type = "memory"; 11 device_type = "memory";
12 /* first 128MB is reserved for 12 /* first 128MB is reserved for secure area. */
13 reg = <0x0 0x48000000 0x0 0x78 13 reg = <0x0 0x48000000 0x0 0x78000000>;
14 }; 14 };
15 15
16 osc_32k: osc_32k { 16 osc_32k: osc_32k {
17 compatible = "fixed-clock"; 17 compatible = "fixed-clock";
18 #clock-cells = <0>; 18 #clock-cells = <0>;
19 clock-frequency = <32768>; 19 clock-frequency = <32768>;
20 clock-output-names = "osc_32k" 20 clock-output-names = "osc_32k";
21 }; 21 };
22 22
23 reg_1p8v: regulator-1p8v { !! 23 reg_1p8v: regulator0 {
24 compatible = "regulator-fixed" 24 compatible = "regulator-fixed";
25 regulator-name = "fixed-1.8V"; 25 regulator-name = "fixed-1.8V";
26 regulator-min-microvolt = <180 26 regulator-min-microvolt = <1800000>;
27 regulator-max-microvolt = <180 27 regulator-max-microvolt = <1800000>;
28 regulator-boot-on; 28 regulator-boot-on;
29 regulator-always-on; 29 regulator-always-on;
30 }; 30 };
31 31
32 reg_3p3v: regulator-3p3v { !! 32 reg_3p3v: regulator1 {
33 compatible = "regulator-fixed" 33 compatible = "regulator-fixed";
34 regulator-name = "fixed-3.3V"; 34 regulator-name = "fixed-3.3V";
35 regulator-min-microvolt = <330 35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <330 36 regulator-max-microvolt = <3300000>;
37 regulator-boot-on; 37 regulator-boot-on;
38 regulator-always-on; 38 regulator-always-on;
39 }; 39 };
40 40
41 wlan_pwrseq: wlan_pwrseq { 41 wlan_pwrseq: wlan_pwrseq {
42 compatible = "mmc-pwrseq-simpl 42 compatible = "mmc-pwrseq-simple";
43 reset-gpios = <&pca9654 1 GPIO 43 reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
44 clocks = <&osc_32k>; 44 clocks = <&osc_32k>;
45 clock-names = "ext_clock"; 45 clock-names = "ext_clock";
46 post-power-on-delay-ms = <80>; 46 post-power-on-delay-ms = <80>;
47 }; 47 };
48 }; 48 };
49 49
50 &avb { 50 &avb {
51 pinctrl-0 = <&avb_pins>; 51 pinctrl-0 = <&avb_pins>;
52 pinctrl-names = "default"; 52 pinctrl-names = "default";
53 phy-mode = "rgmii-rxid"; <<
54 phy-handle = <&phy0>; 53 phy-handle = <&phy0>;
55 rx-internal-delay-ps = <1800>; 54 rx-internal-delay-ps = <1800>;
56 tx-internal-delay-ps = <2000>; 55 tx-internal-delay-ps = <2000>;
57 clocks = <&cpg CPG_MOD 812>, <&versacl <<
58 clock-names = "fck", "refclk"; <<
59 status = "okay"; 56 status = "okay";
60 57
61 phy0: ethernet-phy@0 { 58 phy0: ethernet-phy@0 {
62 compatible = "ethernet-phy-id0 <<
63 "ethernet-phy-iee <<
64 reg = <0>; 59 reg = <0>;
65 interrupt-parent = <&gpio2>; 60 interrupt-parent = <&gpio2>;
66 interrupts = <11 IRQ_TYPE_LEVE 61 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
67 reset-gpios = <&gpio2 10 GPIO_ 62 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
68 }; 63 };
69 }; 64 };
70 65
71 &extal_clk { 66 &extal_clk {
72 clock-frequency = <16666666>; 67 clock-frequency = <16666666>;
73 }; 68 };
74 69
75 &extalr_clk { 70 &extalr_clk {
76 clock-frequency = <32768>; 71 clock-frequency = <32768>;
77 }; 72 };
78 73
79 &gpio6 { 74 &gpio6 {
80 usb-hub-reset-hog { !! 75 usb_hub_reset {
81 gpio-hog; 76 gpio-hog;
82 gpios = <10 GPIO_ACTIVE_HIGH>; 77 gpios = <10 GPIO_ACTIVE_HIGH>;
83 output-high; 78 output-high;
84 line-name = "usb-hub-reset"; 79 line-name = "usb-hub-reset";
85 }; 80 };
86 }; 81 };
87 82
88 &hscif0 { 83 &hscif0 {
89 pinctrl-0 = <&hscif0_pins>; 84 pinctrl-0 = <&hscif0_pins>;
90 pinctrl-names = "default"; 85 pinctrl-names = "default";
91 uart-has-rtscts; 86 uart-has-rtscts;
92 status = "okay"; 87 status = "okay";
93 88
94 bluetooth { 89 bluetooth {
95 compatible = "brcm,bcm43438-bt 90 compatible = "brcm,bcm43438-bt";
96 shutdown-gpios = <&pca9654 2 G 91 shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
97 host-wakeup-gpios = <&gpio1 28 92 host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
98 device-wakeup-gpios = <&pca965 93 device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
99 clocks = <&osc_32k>; 94 clocks = <&osc_32k>;
100 clock-names = "extclk"; 95 clock-names = "extclk";
101 max-speed = <4000000>; 96 max-speed = <4000000>;
102 }; 97 };
103 }; 98 };
104 99
105 &hscif2 { 100 &hscif2 {
106 status = "okay"; 101 status = "okay";
107 pinctrl-0 = <&hscif2_pins>; 102 pinctrl-0 = <&hscif2_pins>;
108 pinctrl-names = "default"; 103 pinctrl-names = "default";
109 }; 104 };
110 105
111 &i2c4 { 106 &i2c4 {
112 status = "okay"; 107 status = "okay";
113 clock-frequency = <100000>; 108 clock-frequency = <100000>;
114 109
115 pca9654: gpio@20 { 110 pca9654: gpio@20 {
116 compatible = "onnn,pca9654"; 111 compatible = "onnn,pca9654";
117 reg = <0x20>; 112 reg = <0x20>;
118 gpio-controller; 113 gpio-controller;
119 #gpio-cells = <2>; 114 #gpio-cells = <2>;
120 gpio-line-names = 115 gpio-line-names =
121 "i2c4_20_0", 116 "i2c4_20_0",
122 "wl_reg_on", 117 "wl_reg_on",
123 "bt_reg_on", 118 "bt_reg_on",
124 "i2c4_20_3", 119 "i2c4_20_3",
125 "i2c4_20_4", 120 "i2c4_20_4",
126 "bt_dev_wake", 121 "bt_dev_wake",
127 "i2c4_20_6", 122 "i2c4_20_6",
128 "i2c4_20_7"; 123 "i2c4_20_7";
129 }; 124 };
130 125
131 pca9654_lte: gpio@21 { 126 pca9654_lte: gpio@21 {
132 compatible = "onnn,pca9654"; 127 compatible = "onnn,pca9654";
133 reg = <0x21>; 128 reg = <0x21>;
134 interrupt-parent = <&gpio5>; 129 interrupt-parent = <&gpio5>;
135 interrupts = <25 IRQ_TYPE_EDGE 130 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
136 interrupt-controller; 131 interrupt-controller;
137 #interrupt-cells = <2>; 132 #interrupt-cells = <2>;
138 gpio-controller; 133 gpio-controller;
139 #gpio-cells = <2>; 134 #gpio-cells = <2>;
140 gpio-line-names = 135 gpio-line-names =
141 "i2c4_21_0", 136 "i2c4_21_0",
142 "zoe_pwr_on", 137 "zoe_pwr_on",
143 "zoe_extint", 138 "zoe_extint",
144 "zoe_reset_n", 139 "zoe_reset_n",
145 "sara_reset", 140 "sara_reset",
146 "i2c4_21_5", 141 "i2c4_21_5",
147 "sara_pwr_off", 142 "sara_pwr_off",
148 "sara_networking_statu 143 "sara_networking_status";
149 }; 144 };
150 145
151 eeprom@50 { 146 eeprom@50 {
152 compatible = "microchip,24c64" 147 compatible = "microchip,24c64", "atmel,24c64";
153 pagesize = <32>; 148 pagesize = <32>;
154 read-only; /* Manufacturi 149 read-only; /* Manufacturing EEPROM programmed at factory */
155 reg = <0x50>; 150 reg = <0x50>;
156 }; 151 };
157 152
158 rtc@51 { 153 rtc@51 {
159 compatible = "nxp,pcf85263"; 154 compatible = "nxp,pcf85263";
160 reg = <0x51>; 155 reg = <0x51>;
161 }; 156 };
162 157
163 versaclock5: versaclock_som@6a { 158 versaclock5: versaclock_som@6a {
164 compatible = "idt,5p49v6965"; 159 compatible = "idt,5p49v6965";
165 reg = <0x6a>; 160 reg = <0x6a>;
166 #clock-cells = <1>; 161 #clock-cells = <1>;
167 clocks = <&x304_clk>; 162 clocks = <&x304_clk>;
168 clock-names = "xin"; 163 clock-names = "xin";
169 /* du_dotclkin0, du_dotclkin2, 164 /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
170 assigned-clocks = <&versaclock 165 assigned-clocks = <&versaclock5 1>,
171 <&versacloc 166 <&versaclock5 2>,
172 <&versacloc 167 <&versaclock5 3>,
173 <&versacloc 168 <&versaclock5 4>;
174 169
175 assigned-clock-rates = <333333 170 assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
176 171
177 OUT1 { 172 OUT1 {
178 idt,mode = <VC5_CMOS>; 173 idt,mode = <VC5_CMOS>;
179 idt,voltage-microvolt 174 idt,voltage-microvolt = <1800000>;
180 idt,slew-percent = <10 175 idt,slew-percent = <100>;
181 }; 176 };
182 177
183 OUT2 { 178 OUT2 {
184 idt,mode = <VC5_CMOS>; 179 idt,mode = <VC5_CMOS>;
185 idt,voltage-microvolt 180 idt,voltage-microvolt = <1800000>;
186 idt,slew-percent = <10 181 idt,slew-percent = <100>;
187 }; 182 };
188 183
189 OUT3 { 184 OUT3 {
190 idt,mode = <VC5_CMOS>; 185 idt,mode = <VC5_CMOS>;
191 idt,voltage-microvolt 186 idt,voltage-microvolt = <1800000>;
192 idt,slew-percent = <10 187 idt,slew-percent = <100>;
193 }; 188 };
194 189
195 OUT4 { 190 OUT4 {
196 idt,mode = <VC5_CMOS>; 191 idt,mode = <VC5_CMOS>;
197 idt,voltage-microvolt 192 idt,voltage-microvolt = <3300000>;
198 idt,slew-percent = <10 193 idt,slew-percent = <100>;
199 }; 194 };
200 }; 195 };
201 }; 196 };
202 197
203 &pfc { 198 &pfc {
204 pinctrl-0 = <&scif_clk_pins>; 199 pinctrl-0 = <&scif_clk_pins>;
205 pinctrl-names = "default"; 200 pinctrl-names = "default";
206 201
207 avb_pins: avb { 202 avb_pins: avb {
208 mux { 203 mux {
209 groups = "avb_link", " 204 groups = "avb_link", "avb_mdio", "avb_mii";
210 function = "avb"; 205 function = "avb";
211 }; 206 };
212 207
213 pins_mdio { 208 pins_mdio {
214 groups = "avb_mdio"; 209 groups = "avb_mdio";
215 drive-strength = <24>; 210 drive-strength = <24>;
216 }; 211 };
217 212
218 pins_mii_tx { 213 pins_mii_tx {
219 pins = "PIN_AVB_TX_CTL 214 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
220 "PIN_AVB_TD1", 215 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
221 drive-strength = <12>; 216 drive-strength = <12>;
222 }; 217 };
223 }; 218 };
224 219
225 scif2_pins: scif2 { 220 scif2_pins: scif2 {
226 groups = "scif2_data_a"; 221 groups = "scif2_data_a";
227 function = "scif2"; 222 function = "scif2";
228 }; 223 };
229 224
230 hscif0_pins: hscif0 { 225 hscif0_pins: hscif0 {
231 groups = "hscif0_data", "hscif 226 groups = "hscif0_data", "hscif0_ctrl";
232 function = "hscif0"; 227 function = "hscif0";
233 }; 228 };
234 229
235 hscif1_pins: hscif1 { 230 hscif1_pins: hscif1 {
236 groups = "hscif1_data_a", "hsc 231 groups = "hscif1_data_a", "hscif1_ctrl_a";
237 function = "hscif1"; 232 function = "hscif1";
238 }; 233 };
239 234
240 hscif2_pins: hscif2 { 235 hscif2_pins: hscif2 {
241 groups = "hscif2_data_a"; 236 groups = "hscif2_data_a";
242 function = "hscif2"; 237 function = "hscif2";
243 }; 238 };
244 239
245 scif0_pins: scif0 { 240 scif0_pins: scif0 {
246 groups = "scif0_data"; 241 groups = "scif0_data";
247 function = "scif0"; 242 function = "scif0";
248 }; 243 };
249 244
250 scif5_pins: scif5 { 245 scif5_pins: scif5 {
251 groups = "scif5_data_a"; 246 groups = "scif5_data_a";
252 function = "scif5"; 247 function = "scif5";
253 }; 248 };
254 249
255 scif_clk_pins: scif_clk { 250 scif_clk_pins: scif_clk {
256 groups = "scif_clk_a"; 251 groups = "scif_clk_a";
257 function = "scif_clk"; 252 function = "scif_clk";
258 }; 253 };
259 254
260 i2c0_pins: i2c0 { 255 i2c0_pins: i2c0 {
261 groups = "i2c0"; 256 groups = "i2c0";
262 function = "i2c0"; 257 function = "i2c0";
263 }; 258 };
264 259
265 sdhi2_pins: sd2 { 260 sdhi2_pins: sd2 {
266 groups = "sdhi2_data4", "sdhi2 261 groups = "sdhi2_data4", "sdhi2_ctrl";
267 function = "sdhi2"; 262 function = "sdhi2";
268 power-source = <1800>; 263 power-source = <1800>;
269 }; 264 };
270 265
271 sdhi3_pins: sd3 { 266 sdhi3_pins: sd3 {
272 groups = "sdhi3_data8", "sdhi3 267 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
273 function = "sdhi3"; 268 function = "sdhi3";
274 power-source = <1800>; 269 power-source = <1800>;
275 }; 270 };
276 }; 271 };
277 272
278 &scif_clk { 273 &scif_clk {
279 clock-frequency = <14745600>; 274 clock-frequency = <14745600>;
280 }; 275 };
281 276
282 &scif2 { 277 &scif2 {
283 pinctrl-0 = <&scif2_pins>; 278 pinctrl-0 = <&scif2_pins>;
284 pinctrl-names = "default"; 279 pinctrl-names = "default";
285 status = "okay"; 280 status = "okay";
286 }; 281 };
287 282
288 &sdhi2 { 283 &sdhi2 {
289 pinctrl-names = "default"; 284 pinctrl-names = "default";
290 pinctrl-0 = <&sdhi2_pins>; 285 pinctrl-0 = <&sdhi2_pins>;
291 bus-width = <4>; 286 bus-width = <4>;
292 vmmc-supply = <®_3p3v>; 287 vmmc-supply = <®_3p3v>;
293 vqmmc-supply = <®_1p8v>; 288 vqmmc-supply = <®_1p8v>;
294 non-removable; 289 non-removable;
295 cap-power-off-card; 290 cap-power-off-card;
>> 291 pm-ignore-notify;
296 keep-power-in-suspend; 292 keep-power-in-suspend;
297 mmc-pwrseq = <&wlan_pwrseq>; 293 mmc-pwrseq = <&wlan_pwrseq>;
298 status = "okay"; 294 status = "okay";
299 #address-cells = <1>; 295 #address-cells = <1>;
300 #size-cells = <0>; 296 #size-cells = <0>;
301 297
302 brcmf: bcrmf@1 { 298 brcmf: bcrmf@1 {
303 reg = <1>; 299 reg = <1>;
304 compatible = "brcm,bcm4329-fma 300 compatible = "brcm,bcm4329-fmac";
305 interrupt-parent = <&gpio1>; 301 interrupt-parent = <&gpio1>;
306 interrupts = <27 IRQ_TYPE_LEVE 302 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
307 interrupt-names = "host-wake"; 303 interrupt-names = "host-wake";
308 }; 304 };
309 }; 305 };
310 306
311 &sdhi3 { 307 &sdhi3 {
312 pinctrl-0 = <&sdhi3_pins>; 308 pinctrl-0 = <&sdhi3_pins>;
313 pinctrl-1 = <&sdhi3_pins>; 309 pinctrl-1 = <&sdhi3_pins>;
314 pinctrl-names = "default", "state_uhs" 310 pinctrl-names = "default", "state_uhs";
315 vmmc-supply = <®_3p3v>; 311 vmmc-supply = <®_3p3v>;
316 vqmmc-supply = <®_1p8v>; 312 vqmmc-supply = <®_1p8v>;
317 bus-width = <8>; 313 bus-width = <8>;
318 mmc-hs200-1_8v; 314 mmc-hs200-1_8v;
319 no-sd; 315 no-sd;
320 no-sdio; 316 no-sdio;
321 non-removable; 317 non-removable;
322 fixed-emmc-driver-type = <1>; 318 fixed-emmc-driver-type = <1>;
323 status = "okay"; 319 status = "okay";
324 }; 320 };
325 321
326 &usb2_clksel { 322 &usb2_clksel {
327 clocks = <&cpg CPG_MOD 703>, <&cpg CPG 323 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
328 <&versaclock5 3>, <&usb3s0_c 324 <&versaclock5 3>, <&usb3s0_clk>;
329 status = "okay"; 325 status = "okay";
330 }; 326 };
331 327
332 &usb3s0_clk { 328 &usb3s0_clk {
333 clock-frequency = <100000000>; 329 clock-frequency = <100000000>;
334 }; 330 };
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