1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright 2020, Compass Electronics Group, 3 * Copyright 2020, Compass Electronics Group, LLC
4 */ 4 */
5 5
6 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/clock/versaclock.h> <<
8 7
9 / { 8 / {
10 memory@48000000 { 9 memory@48000000 {
11 device_type = "memory"; 10 device_type = "memory";
12 /* first 128MB is reserved for 11 /* first 128MB is reserved for secure area. */
13 reg = <0x0 0x48000000 0x0 0x78 12 reg = <0x0 0x48000000 0x0 0x78000000>;
14 }; 13 };
15 14
>> 15 memory@600000000 {
>> 16 device_type = "memory";
>> 17 reg = <0x6 0x00000000 0x0 0x80000000>;
>> 18 };
>> 19
16 osc_32k: osc_32k { 20 osc_32k: osc_32k {
17 compatible = "fixed-clock"; 21 compatible = "fixed-clock";
18 #clock-cells = <0>; 22 #clock-cells = <0>;
19 clock-frequency = <32768>; 23 clock-frequency = <32768>;
20 clock-output-names = "osc_32k" 24 clock-output-names = "osc_32k";
21 }; 25 };
22 26
23 reg_1p8v: regulator-1p8v { !! 27 reg_1p8v: regulator0 {
24 compatible = "regulator-fixed" 28 compatible = "regulator-fixed";
25 regulator-name = "fixed-1.8V"; 29 regulator-name = "fixed-1.8V";
26 regulator-min-microvolt = <180 30 regulator-min-microvolt = <1800000>;
27 regulator-max-microvolt = <180 31 regulator-max-microvolt = <1800000>;
28 regulator-boot-on; 32 regulator-boot-on;
29 regulator-always-on; 33 regulator-always-on;
30 }; 34 };
31 35
32 reg_3p3v: regulator-3p3v { !! 36 reg_3p3v: regulator1 {
33 compatible = "regulator-fixed" 37 compatible = "regulator-fixed";
34 regulator-name = "fixed-3.3V"; 38 regulator-name = "fixed-3.3V";
35 regulator-min-microvolt = <330 39 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <330 40 regulator-max-microvolt = <3300000>;
37 regulator-boot-on; 41 regulator-boot-on;
38 regulator-always-on; 42 regulator-always-on;
39 }; 43 };
40 44
41 wlan_pwrseq: wlan_pwrseq { 45 wlan_pwrseq: wlan_pwrseq {
42 compatible = "mmc-pwrseq-simpl 46 compatible = "mmc-pwrseq-simple";
43 reset-gpios = <&pca9654 1 GPIO 47 reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
44 clocks = <&osc_32k>; 48 clocks = <&osc_32k>;
45 clock-names = "ext_clock"; 49 clock-names = "ext_clock";
46 post-power-on-delay-ms = <80>; 50 post-power-on-delay-ms = <80>;
47 }; 51 };
48 }; 52 };
49 53
50 &avb { 54 &avb {
51 pinctrl-0 = <&avb_pins>; 55 pinctrl-0 = <&avb_pins>;
52 pinctrl-names = "default"; 56 pinctrl-names = "default";
53 phy-mode = "rgmii-rxid"; <<
54 phy-handle = <&phy0>; 57 phy-handle = <&phy0>;
55 rx-internal-delay-ps = <1800>; !! 58 phy-mode = "rgmii-id";
56 tx-internal-delay-ps = <2000>; <<
57 clocks = <&cpg CPG_MOD 812>, <&versacl <<
58 clock-names = "fck", "refclk"; <<
59 status = "okay"; 59 status = "okay";
60 60
61 phy0: ethernet-phy@0 { 61 phy0: ethernet-phy@0 {
62 compatible = "ethernet-phy-id0 <<
63 "ethernet-phy-iee <<
64 reg = <0>; 62 reg = <0>;
65 interrupt-parent = <&gpio2>; 63 interrupt-parent = <&gpio2>;
66 interrupts = <11 IRQ_TYPE_LEVE 64 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
67 reset-gpios = <&gpio2 10 GPIO_ 65 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
68 }; 66 };
69 }; 67 };
70 68
71 &extal_clk { 69 &extal_clk {
72 clock-frequency = <16666666>; 70 clock-frequency = <16666666>;
73 }; 71 };
74 72
75 &extalr_clk { 73 &extalr_clk {
76 clock-frequency = <32768>; 74 clock-frequency = <32768>;
77 }; 75 };
78 76
79 &gpio6 { 77 &gpio6 {
80 usb-hub-reset-hog { !! 78 usb_hub_reset {
81 gpio-hog; 79 gpio-hog;
82 gpios = <10 GPIO_ACTIVE_HIGH>; 80 gpios = <10 GPIO_ACTIVE_HIGH>;
83 output-high; 81 output-high;
84 line-name = "usb-hub-reset"; 82 line-name = "usb-hub-reset";
85 }; 83 };
86 }; 84 };
87 85
88 &hscif0 { 86 &hscif0 {
89 pinctrl-0 = <&hscif0_pins>; 87 pinctrl-0 = <&hscif0_pins>;
90 pinctrl-names = "default"; 88 pinctrl-names = "default";
91 uart-has-rtscts; 89 uart-has-rtscts;
92 status = "okay"; 90 status = "okay";
>> 91 max-speed = <4000000>;
93 92
94 bluetooth { 93 bluetooth {
95 compatible = "brcm,bcm43438-bt 94 compatible = "brcm,bcm43438-bt";
96 shutdown-gpios = <&pca9654 2 G 95 shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
97 host-wakeup-gpios = <&gpio1 28 96 host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
98 device-wakeup-gpios = <&pca965 97 device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
99 clocks = <&osc_32k>; 98 clocks = <&osc_32k>;
100 clock-names = "extclk"; 99 clock-names = "extclk";
101 max-speed = <4000000>; <<
102 }; 100 };
103 }; 101 };
104 102
105 &hscif2 { 103 &hscif2 {
106 status = "okay"; 104 status = "okay";
107 pinctrl-0 = <&hscif2_pins>; 105 pinctrl-0 = <&hscif2_pins>;
108 pinctrl-names = "default"; 106 pinctrl-names = "default";
109 }; 107 };
110 108
111 &i2c4 { 109 &i2c4 {
112 status = "okay"; 110 status = "okay";
113 clock-frequency = <100000>; !! 111 clock-frequency = <400000>;
114 112
115 pca9654: gpio@20 { 113 pca9654: gpio@20 {
116 compatible = "onnn,pca9654"; 114 compatible = "onnn,pca9654";
117 reg = <0x20>; 115 reg = <0x20>;
118 gpio-controller; 116 gpio-controller;
119 #gpio-cells = <2>; 117 #gpio-cells = <2>;
120 gpio-line-names = 118 gpio-line-names =
121 "i2c4_20_0", 119 "i2c4_20_0",
122 "wl_reg_on", 120 "wl_reg_on",
123 "bt_reg_on", 121 "bt_reg_on",
124 "i2c4_20_3", 122 "i2c4_20_3",
125 "i2c4_20_4", 123 "i2c4_20_4",
126 "bt_dev_wake", 124 "bt_dev_wake",
127 "i2c4_20_6", 125 "i2c4_20_6",
128 "i2c4_20_7"; 126 "i2c4_20_7";
129 }; 127 };
130 128
131 pca9654_lte: gpio@21 { 129 pca9654_lte: gpio@21 {
132 compatible = "onnn,pca9654"; 130 compatible = "onnn,pca9654";
133 reg = <0x21>; 131 reg = <0x21>;
134 interrupt-parent = <&gpio5>; 132 interrupt-parent = <&gpio5>;
135 interrupts = <25 IRQ_TYPE_EDGE 133 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
136 interrupt-controller; 134 interrupt-controller;
137 #interrupt-cells = <2>; 135 #interrupt-cells = <2>;
138 gpio-controller; 136 gpio-controller;
139 #gpio-cells = <2>; 137 #gpio-cells = <2>;
140 gpio-line-names = 138 gpio-line-names =
141 "i2c4_21_0", 139 "i2c4_21_0",
142 "zoe_pwr_on", 140 "zoe_pwr_on",
143 "zoe_extint", 141 "zoe_extint",
144 "zoe_reset_n", 142 "zoe_reset_n",
145 "sara_reset", 143 "sara_reset",
146 "i2c4_21_5", 144 "i2c4_21_5",
147 "sara_pwr_off", 145 "sara_pwr_off",
148 "sara_networking_statu 146 "sara_networking_status";
149 }; 147 };
150 148
151 eeprom@50 { 149 eeprom@50 {
152 compatible = "microchip,24c64" !! 150 compatible = "microchip,at24c64", "atmel,24c64";
153 pagesize = <32>; 151 pagesize = <32>;
154 read-only; /* Manufacturi 152 read-only; /* Manufacturing EEPROM programmed at factory */
155 reg = <0x50>; 153 reg = <0x50>;
156 }; 154 };
157 155
158 rtc@51 { 156 rtc@51 {
159 compatible = "nxp,pcf85263"; 157 compatible = "nxp,pcf85263";
160 reg = <0x51>; 158 reg = <0x51>;
161 }; 159 };
162 160
163 versaclock5: versaclock_som@6a { 161 versaclock5: versaclock_som@6a {
164 compatible = "idt,5p49v6965"; 162 compatible = "idt,5p49v6965";
165 reg = <0x6a>; 163 reg = <0x6a>;
166 #clock-cells = <1>; 164 #clock-cells = <1>;
167 clocks = <&x304_clk>; 165 clocks = <&x304_clk>;
168 clock-names = "xin"; 166 clock-names = "xin";
169 /* du_dotclkin0, du_dotclkin2, 167 /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
170 assigned-clocks = <&versaclock 168 assigned-clocks = <&versaclock5 1>,
171 <&versacloc 169 <&versaclock5 2>,
172 <&versacloc 170 <&versaclock5 3>,
173 <&versacloc 171 <&versaclock5 4>;
174 <<
175 assigned-clock-rates = <333333 172 assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
176 <<
177 OUT1 { <<
178 idt,mode = <VC5_CMOS>; <<
179 idt,voltage-microvolt <<
180 idt,slew-percent = <10 <<
181 }; <<
182 <<
183 OUT2 { <<
184 idt,mode = <VC5_CMOS>; <<
185 idt,voltage-microvolt <<
186 idt,slew-percent = <10 <<
187 }; <<
188 <<
189 OUT3 { <<
190 idt,mode = <VC5_CMOS>; <<
191 idt,voltage-microvolt <<
192 idt,slew-percent = <10 <<
193 }; <<
194 <<
195 OUT4 { <<
196 idt,mode = <VC5_CMOS>; <<
197 idt,voltage-microvolt <<
198 idt,slew-percent = <10 <<
199 }; <<
200 }; 173 };
201 }; 174 };
202 175
203 &pfc { 176 &pfc {
204 pinctrl-0 = <&scif_clk_pins>; 177 pinctrl-0 = <&scif_clk_pins>;
205 pinctrl-names = "default"; 178 pinctrl-names = "default";
206 179
207 avb_pins: avb { 180 avb_pins: avb {
208 mux { 181 mux {
209 groups = "avb_link", " 182 groups = "avb_link", "avb_mdio", "avb_mii";
210 function = "avb"; 183 function = "avb";
211 }; 184 };
212 185
213 pins_mdio { 186 pins_mdio {
214 groups = "avb_mdio"; 187 groups = "avb_mdio";
215 drive-strength = <24>; 188 drive-strength = <24>;
216 }; 189 };
217 190
218 pins_mii_tx { 191 pins_mii_tx {
219 pins = "PIN_AVB_TX_CTL 192 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
220 "PIN_AVB_TD1", 193 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
221 drive-strength = <12>; 194 drive-strength = <12>;
222 }; 195 };
223 }; 196 };
224 197
225 scif2_pins: scif2 { 198 scif2_pins: scif2 {
226 groups = "scif2_data_a"; 199 groups = "scif2_data_a";
227 function = "scif2"; 200 function = "scif2";
228 }; 201 };
229 202
230 hscif0_pins: hscif0 { 203 hscif0_pins: hscif0 {
231 groups = "hscif0_data", "hscif 204 groups = "hscif0_data", "hscif0_ctrl";
232 function = "hscif0"; 205 function = "hscif0";
233 }; 206 };
234 207
235 hscif1_pins: hscif1 { 208 hscif1_pins: hscif1 {
236 groups = "hscif1_data_a", "hsc 209 groups = "hscif1_data_a", "hscif1_ctrl_a";
237 function = "hscif1"; 210 function = "hscif1";
238 }; 211 };
239 212
240 hscif2_pins: hscif2 { 213 hscif2_pins: hscif2 {
241 groups = "hscif2_data_a"; 214 groups = "hscif2_data_a";
242 function = "hscif2"; 215 function = "hscif2";
243 }; 216 };
244 217
245 scif0_pins: scif0 { 218 scif0_pins: scif0 {
246 groups = "scif0_data"; 219 groups = "scif0_data";
247 function = "scif0"; 220 function = "scif0";
248 }; 221 };
249 222
250 scif5_pins: scif5 { 223 scif5_pins: scif5 {
251 groups = "scif5_data_a"; 224 groups = "scif5_data_a";
252 function = "scif5"; 225 function = "scif5";
253 }; 226 };
254 227
255 scif_clk_pins: scif_clk { 228 scif_clk_pins: scif_clk {
256 groups = "scif_clk_a"; 229 groups = "scif_clk_a";
257 function = "scif_clk"; 230 function = "scif_clk";
258 }; 231 };
259 232
260 i2c0_pins: i2c0 { 233 i2c0_pins: i2c0 {
261 groups = "i2c0"; 234 groups = "i2c0";
262 function = "i2c0"; 235 function = "i2c0";
263 }; 236 };
264 237
265 sdhi2_pins: sd2 { 238 sdhi2_pins: sd2 {
266 groups = "sdhi2_data4", "sdhi2 239 groups = "sdhi2_data4", "sdhi2_ctrl";
267 function = "sdhi2"; 240 function = "sdhi2";
268 power-source = <1800>; 241 power-source = <1800>;
269 }; 242 };
270 243
271 sdhi3_pins: sd3 { 244 sdhi3_pins: sd3 {
272 groups = "sdhi3_data8", "sdhi3 245 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
273 function = "sdhi3"; 246 function = "sdhi3";
274 power-source = <1800>; 247 power-source = <1800>;
275 }; 248 };
276 }; 249 };
277 250
278 &scif_clk { 251 &scif_clk {
279 clock-frequency = <14745600>; 252 clock-frequency = <14745600>;
280 }; 253 };
281 254
282 &scif2 { 255 &scif2 {
283 pinctrl-0 = <&scif2_pins>; 256 pinctrl-0 = <&scif2_pins>;
284 pinctrl-names = "default"; 257 pinctrl-names = "default";
285 status = "okay"; 258 status = "okay";
286 }; 259 };
287 260
288 &sdhi2 { 261 &sdhi2 {
289 pinctrl-names = "default"; 262 pinctrl-names = "default";
290 pinctrl-0 = <&sdhi2_pins>; 263 pinctrl-0 = <&sdhi2_pins>;
291 bus-width = <4>; 264 bus-width = <4>;
292 vmmc-supply = <®_3p3v>; 265 vmmc-supply = <®_3p3v>;
293 vqmmc-supply = <®_1p8v>; 266 vqmmc-supply = <®_1p8v>;
294 non-removable; 267 non-removable;
295 cap-power-off-card; 268 cap-power-off-card;
>> 269 pm-ignore-notify;
296 keep-power-in-suspend; 270 keep-power-in-suspend;
297 mmc-pwrseq = <&wlan_pwrseq>; 271 mmc-pwrseq = <&wlan_pwrseq>;
298 status = "okay"; 272 status = "okay";
299 #address-cells = <1>; 273 #address-cells = <1>;
300 #size-cells = <0>; 274 #size-cells = <0>;
301 275
302 brcmf: bcrmf@1 { 276 brcmf: bcrmf@1 {
303 reg = <1>; 277 reg = <1>;
304 compatible = "brcm,bcm4329-fma 278 compatible = "brcm,bcm4329-fmac";
305 interrupt-parent = <&gpio1>; 279 interrupt-parent = <&gpio1>;
306 interrupts = <27 IRQ_TYPE_LEVE 280 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
307 interrupt-names = "host-wake"; 281 interrupt-names = "host-wake";
308 }; 282 };
309 }; 283 };
310 284
311 &sdhi3 { 285 &sdhi3 {
312 pinctrl-0 = <&sdhi3_pins>; 286 pinctrl-0 = <&sdhi3_pins>;
313 pinctrl-1 = <&sdhi3_pins>; 287 pinctrl-1 = <&sdhi3_pins>;
314 pinctrl-names = "default", "state_uhs" 288 pinctrl-names = "default", "state_uhs";
315 vmmc-supply = <®_3p3v>; 289 vmmc-supply = <®_3p3v>;
316 vqmmc-supply = <®_1p8v>; 290 vqmmc-supply = <®_1p8v>;
317 bus-width = <8>; 291 bus-width = <8>;
318 mmc-hs200-1_8v; 292 mmc-hs200-1_8v;
319 no-sd; <<
320 no-sdio; <<
321 non-removable; 293 non-removable;
322 fixed-emmc-driver-type = <1>; 294 fixed-emmc-driver-type = <1>;
323 status = "okay"; 295 status = "okay";
324 }; 296 };
325 297
326 &usb2_clksel { !! 298 &usb_extal_clk {
327 clocks = <&cpg CPG_MOD 703>, <&cpg CPG !! 299 clock-frequency = <50000000>;
328 <&versaclock5 3>, <&usb3s0_c <<
329 status = "okay"; <<
330 }; 300 };
331 301
332 &usb3s0_clk { 302 &usb3s0_clk {
333 clock-frequency = <100000000>; 303 clock-frequency = <100000000>;
>> 304 };
>> 305
>> 306 &vspb {
>> 307 status = "okay";
>> 308 };
>> 309
>> 310 &vspi0 {
>> 311 status = "okay";
334 }; 312 };
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