1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the Silicon Linux RZ
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp
6 */
7
8 /dts-v1/;
9 #include "r8a774c0.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/display/tda998x.h>
12
13 / {
14 model = "Silicon Linux RZ/G2E 96board
15 compatible = "si-linux,cat874", "renes
16
17 aliases {
18 serial0 = &scif2;
19 serial1 = &hscif2;
20 mmc0 = &sdhi0;
21 mmc1 = &sdhi3;
22 };
23
24 chosen {
25 bootargs = "ignore_loglevel rw
26 stdout-path = "serial0:115200n
27 };
28
29 hdmi-out {
30 compatible = "hdmi-connector";
31 type = "a";
32
33 port {
34 hdmi_con_out: endpoint
35 remote-endpoin
36 };
37 };
38 };
39
40 leds {
41 compatible = "gpio-leds";
42
43 led0 {
44 gpios = <&gpio5 19 GPI
45 label = "LED0";
46 };
47
48 led1 {
49 gpios = <&gpio3 14 GPI
50 label = "LED1";
51 };
52
53 led2 {
54 gpios = <&gpio4 10 GPI
55 label = "LED2";
56 };
57
58 led3 {
59 gpios = <&gpio6 4 GPIO
60 label = "LED3";
61 };
62 };
63
64 memory@48000000 {
65 device_type = "memory";
66 /* first 128MB is reserved for
67 reg = <0x0 0x48000000 0x0 0x78
68 };
69
70 reg_12p0v: regulator-12p0v {
71 compatible = "regulator-fixed"
72 regulator-name = "D12.0V";
73 regulator-min-microvolt = <120
74 regulator-max-microvolt = <120
75 regulator-boot-on;
76 regulator-always-on;
77 };
78
79 sound: sound {
80 compatible = "simple-audio-car
81
82 simple-audio-card,name = "CAT8
83 simple-audio-card,format = "i2
84 simple-audio-card,bitclock-mas
85 simple-audio-card,frame-master
86
87 sndcodec: simple-audio-card,co
88 sound-dai = <&tda19988
89 };
90
91 sndcpu: simple-audio-card,cpu
92 sound-dai = <&rcar_sou
93 };
94 };
95
96 vcc_sdhi0: regulator-vcc-sdhi0 {
97 compatible = "regulator-fixed"
98
99 regulator-name = "SDHI0 Vcc";
100 regulator-min-microvolt = <330
101 regulator-max-microvolt = <330
102 regulator-always-on;
103 regulator-boot-on;
104 };
105
106 vccq_sdhi0: regulator-vccq-sdhi0 {
107 compatible = "regulator-gpio";
108
109 regulator-name = "SDHI0 VccQ";
110 regulator-min-microvolt = <180
111 regulator-max-microvolt = <330
112
113 gpios = <&gpio3 13 GPIO_ACTIVE
114 gpios-states = <1>;
115 states = <3300000 1>, <1800000
116 };
117
118 wlan_en_reg: fixedregulator {
119 compatible = "regulator-fixed"
120 regulator-name = "wlan-en-regu
121 regulator-min-microvolt = <180
122 regulator-max-microvolt = <180
123 startup-delay-us = <70000>;
124
125 gpio = <&gpio2 25 GPIO_ACTIVE_
126 enable-active-high;
127 };
128
129 x13_clk: x13 {
130 compatible = "fixed-clock";
131 #clock-cells = <0>;
132 clock-frequency = <74250000>;
133 };
134
135 connector {
136 compatible = "usb-c-connector"
137 label = "USB-C";
138 data-role = "dual";
139
140 ports {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 port@0 {
144 reg = <0>;
145 hs_ep: endpoin
146 remote
147 };
148 };
149 port@1 {
150 reg = <1>;
151 ss_ep: endpoin
152 remote
153 };
154 };
155 };
156 };
157 };
158
159 &audio_clk_a {
160 clock-frequency = <22579200>;
161 };
162
163 &du {
164 pinctrl-0 = <&du_pins>;
165 pinctrl-names = "default";
166 status = "okay";
167
168 clocks = <&cpg CPG_MOD 724>,
169 <&cpg CPG_MOD 723>,
170 <&x13_clk>;
171 clock-names = "du.0", "du.1", "dclkin.
172
173 ports {
174 port@0 {
175 du_out_rgb: endpoint {
176 remote-endpoin
177 };
178 };
179 };
180 };
181
182 &ehci0 {
183 dr_mode = "host";
184 status = "okay";
185 };
186
187 &extal_clk {
188 clock-frequency = <48000000>;
189 };
190
191 &hscif2 {
192 pinctrl-0 = <&hscif2_pins>;
193 pinctrl-names = "default";
194
195 uart-has-rtscts;
196 status = "okay";
197
198 bluetooth {
199 compatible = "ti,wl1837-st";
200 enable-gpios = <&gpio4 6 GPIO_
201 };
202 };
203
204 &i2c0 {
205 status = "okay";
206 clock-frequency = <100000>;
207
208 hd3ss3220@47 {
209 compatible = "ti,hd3ss3220";
210 reg = <0x47>;
211 interrupt-parent = <&gpio6>;
212 interrupts = <3 IRQ_TYPE_LEVEL
213
214 ports {
215 #address-cells = <1>;
216 #size-cells = <0>;
217 port@0 {
218 reg = <0>;
219 hd3ss3220_in_e
220 remote
221 };
222 };
223 port@1 {
224 reg = <1>;
225 hd3ss3220_out_
226 remote
227 };
228 };
229 };
230 };
231
232 tda19988: tda19988@70 {
233 compatible = "nxp,tda998x";
234 reg = <0x70>;
235 interrupt-parent = <&gpio1>;
236 interrupts = <1 IRQ_TYPE_LEVEL
237
238 video-ports = <0x234501>;
239
240 #sound-dai-cells = <0>;
241 audio-ports = <TDA998x_I2S 0x0
242 clocks = <&rcar_sound 1>;
243
244 ports {
245 #address-cells = <1>;
246 #size-cells = <0>;
247
248 port@0 {
249 reg = <0>;
250 tda19988_in: e
251 remote
252 };
253 };
254
255 port@1 {
256 reg = <1>;
257 tda19988_out:
258 remote
259 };
260 };
261 };
262 };
263 };
264
265 &i2c1 {
266 pinctrl-0 = <&i2c1_pins>;
267 pinctrl-names = "default";
268
269 status = "okay";
270 clock-frequency = <400000>;
271
272 rtc@32 {
273 compatible = "epson,rx8571";
274 reg = <0x32>;
275 };
276 };
277
278 &lvds0 {
279 status = "okay";
280
281 clocks = <&cpg CPG_MOD 727>, <&x13_clk
282 clock-names = "fck", "dclkin.0", "exta
283 };
284
285 &ohci0 {
286 dr_mode = "host";
287 status = "okay";
288 };
289
290 &pcie_bus_clk {
291 clock-frequency = <100000000>;
292 };
293
294 &pciec0 {
295 /* Map all possible DDR as inbound ran
296 dma-ranges = <0x42000000 0 0x40000000
297 };
298
299 &pfc {
300 du_pins: du {
301 groups = "du_rgb888", "du_clk_
302 "du_clk_in_0";
303 function = "du";
304 };
305
306 hscif2_pins: hscif2 {
307 groups = "hscif2_data_a", "hsc
308 function = "hscif2";
309 };
310
311 i2c1_pins: i2c1 {
312 groups = "i2c1_b";
313 function = "i2c1";
314 };
315
316 scif2_pins: scif2 {
317 groups = "scif2_data_a";
318 function = "scif2";
319 };
320
321 sdhi0_pins: sd0 {
322 groups = "sdhi0_data4", "sdhi0
323 function = "sdhi0";
324 power-source = <3300>;
325 };
326
327 sdhi0_pins_uhs: sd0_uhs {
328 groups = "sdhi0_data4", "sdhi0
329 function = "sdhi0";
330 power-source = <1800>;
331 };
332
333 sdhi3_pins: sd3 {
334 groups = "sdhi3_data4", "sdhi3
335 function = "sdhi3";
336 power-source = <1800>;
337 };
338
339 sound_clk_pins: sound_clk {
340 groups = "audio_clkout1_a";
341 function = "audio_clk";
342 };
343
344 sound_pins: sound {
345 groups = "ssi01239_ctrl", "ssi
346 function = "ssi";
347 };
348
349 usb30_pins: usb30 {
350 groups = "usb30", "usb30_id";
351 function = "usb30";
352 };
353 };
354
355 &rcar_sound {
356 pinctrl-0 = <&sound_pins>, <&sound_clk
357 pinctrl-names = "default";
358
359 /* Single DAI */
360 #sound-dai-cells = <0>;
361
362 /* audio_clkout0/1/2/3 */
363 #clock-cells = <1>;
364 clock-frequency = <11289600>;
365
366 status = "okay";
367
368 rcar_sound,dai {
369 dai0 {
370 playback = <&ssi0>, <&
371 };
372 };
373 };
374
375 &rwdt {
376 timeout-sec = <60>;
377 status = "okay";
378 };
379
380 &scif2 {
381 pinctrl-0 = <&scif2_pins>;
382 pinctrl-names = "default";
383
384 status = "okay";
385 };
386
387 &sdhi0 {
388 pinctrl-0 = <&sdhi0_pins>;
389 pinctrl-1 = <&sdhi0_pins_uhs>;
390 pinctrl-names = "default", "state_uhs"
391
392 vmmc-supply = <&vcc_sdhi0>;
393 vqmmc-supply = <&vccq_sdhi0>;
394 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>
395 bus-width = <4>;
396 sd-uhs-sdr50;
397 sd-uhs-sdr104;
398 status = "okay";
399 };
400
401 &sdhi3 {
402 status = "okay";
403 pinctrl-0 = <&sdhi3_pins>;
404 pinctrl-names = "default";
405
406 vmmc-supply = <&wlan_en_reg>;
407 bus-width = <4>;
408 non-removable;
409 cap-power-off-card;
410 keep-power-in-suspend;
411
412 #address-cells = <1>;
413 #size-cells = <0>;
414 wlcore: wlcore@2 {
415 compatible = "ti,wl1837";
416 reg = <2>;
417 interrupt-parent = <&gpio1>;
418 interrupts = <0 IRQ_TYPE_LEVEL
419 };
420 };
421
422 &usb2_phy0 {
423 renesas,no-otg-pins;
424 status = "okay";
425 };
426
427 &usb3_peri0 {
428 companion = <&xhci0>;
429 status = "okay";
430 usb-role-switch;
431
432 ports {
433 #address-cells = <1>;
434 #size-cells = <0>;
435 port@0 {
436 reg = <0>;
437 usb3_hs_ep: endpoint {
438 remote-endpoin
439 };
440 };
441 port@1 {
442 reg = <1>;
443 usb3_role_switch: endp
444 remote-endpoin
445 };
446 };
447 };
448 };
449
450 &xhci0 {
451 pinctrl-0 = <&usb30_pins>;
452 pinctrl-names = "default";
453
454 status = "okay";
455 };
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