1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the Silicon Linux RZ 3 * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
4 * 4 *
5 * Copyright (C) 2019 Renesas Electronics Corp 5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 #include "r8a774c0.dtsi" 9 #include "r8a774c0.dtsi"
10 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/display/tda998x.h> 11 #include <dt-bindings/display/tda998x.h>
12 12
13 / { 13 / {
14 model = "Silicon Linux RZ/G2E 96board 14 model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
15 compatible = "si-linux,cat874", "renes 15 compatible = "si-linux,cat874", "renesas,r8a774c0";
16 16
17 aliases { 17 aliases {
18 serial0 = &scif2; 18 serial0 = &scif2;
19 serial1 = &hscif2; 19 serial1 = &hscif2;
20 mmc0 = &sdhi0; <<
21 mmc1 = &sdhi3; <<
22 }; 20 };
23 21
24 chosen { 22 chosen {
25 bootargs = "ignore_loglevel rw 23 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
26 stdout-path = "serial0:115200n 24 stdout-path = "serial0:115200n8";
27 }; 25 };
28 26
29 hdmi-out { 27 hdmi-out {
30 compatible = "hdmi-connector"; 28 compatible = "hdmi-connector";
31 type = "a"; 29 type = "a";
32 30
33 port { 31 port {
34 hdmi_con_out: endpoint 32 hdmi_con_out: endpoint {
35 remote-endpoin 33 remote-endpoint = <&tda19988_out>;
36 }; 34 };
37 }; 35 };
38 }; 36 };
39 37
40 leds { 38 leds {
41 compatible = "gpio-leds"; 39 compatible = "gpio-leds";
42 40
43 led0 { 41 led0 {
44 gpios = <&gpio5 19 GPI 42 gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
45 label = "LED0"; 43 label = "LED0";
46 }; 44 };
47 45
48 led1 { 46 led1 {
49 gpios = <&gpio3 14 GPI 47 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
50 label = "LED1"; 48 label = "LED1";
51 }; 49 };
52 50
53 led2 { 51 led2 {
54 gpios = <&gpio4 10 GPI 52 gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
55 label = "LED2"; 53 label = "LED2";
56 }; 54 };
57 55
58 led3 { 56 led3 {
59 gpios = <&gpio6 4 GPIO 57 gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
60 label = "LED3"; 58 label = "LED3";
61 }; 59 };
62 }; 60 };
63 61
64 memory@48000000 { 62 memory@48000000 {
65 device_type = "memory"; 63 device_type = "memory";
66 /* first 128MB is reserved for 64 /* first 128MB is reserved for secure area. */
67 reg = <0x0 0x48000000 0x0 0x78 65 reg = <0x0 0x48000000 0x0 0x78000000>;
68 }; 66 };
69 67
70 reg_12p0v: regulator-12p0v { <<
71 compatible = "regulator-fixed" <<
72 regulator-name = "D12.0V"; <<
73 regulator-min-microvolt = <120 <<
74 regulator-max-microvolt = <120 <<
75 regulator-boot-on; <<
76 regulator-always-on; <<
77 }; <<
78 <<
79 sound: sound { 68 sound: sound {
80 compatible = "simple-audio-car 69 compatible = "simple-audio-card";
81 70
82 simple-audio-card,name = "CAT8 71 simple-audio-card,name = "CAT874 HDMI sound";
83 simple-audio-card,format = "i2 72 simple-audio-card,format = "i2s";
84 simple-audio-card,bitclock-mas 73 simple-audio-card,bitclock-master = <&sndcpu>;
85 simple-audio-card,frame-master 74 simple-audio-card,frame-master = <&sndcpu>;
86 75
87 sndcodec: simple-audio-card,co <<
88 sound-dai = <&tda19988 <<
89 }; <<
90 <<
91 sndcpu: simple-audio-card,cpu 76 sndcpu: simple-audio-card,cpu {
92 sound-dai = <&rcar_sou 77 sound-dai = <&rcar_sound>;
93 }; 78 };
>> 79
>> 80 sndcodec: simple-audio-card,codec {
>> 81 sound-dai = <&tda19988>;
>> 82 };
94 }; 83 };
95 84
96 vcc_sdhi0: regulator-vcc-sdhi0 { 85 vcc_sdhi0: regulator-vcc-sdhi0 {
97 compatible = "regulator-fixed" 86 compatible = "regulator-fixed";
98 87
99 regulator-name = "SDHI0 Vcc"; 88 regulator-name = "SDHI0 Vcc";
100 regulator-min-microvolt = <330 89 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <330 90 regulator-max-microvolt = <3300000>;
102 regulator-always-on; 91 regulator-always-on;
103 regulator-boot-on; 92 regulator-boot-on;
104 }; 93 };
105 94
106 vccq_sdhi0: regulator-vccq-sdhi0 { 95 vccq_sdhi0: regulator-vccq-sdhi0 {
107 compatible = "regulator-gpio"; 96 compatible = "regulator-gpio";
108 97
109 regulator-name = "SDHI0 VccQ"; 98 regulator-name = "SDHI0 VccQ";
110 regulator-min-microvolt = <180 99 regulator-min-microvolt = <1800000>;
111 regulator-max-microvolt = <330 100 regulator-max-microvolt = <3300000>;
112 101
113 gpios = <&gpio3 13 GPIO_ACTIVE 102 gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
114 gpios-states = <1>; 103 gpios-states = <1>;
115 states = <3300000 1>, <1800000 !! 104 states = <3300000 1
>> 105 1800000 0>;
116 }; 106 };
117 107
118 wlan_en_reg: fixedregulator { 108 wlan_en_reg: fixedregulator {
119 compatible = "regulator-fixed" 109 compatible = "regulator-fixed";
120 regulator-name = "wlan-en-regu 110 regulator-name = "wlan-en-regulator";
121 regulator-min-microvolt = <180 111 regulator-min-microvolt = <1800000>;
122 regulator-max-microvolt = <180 112 regulator-max-microvolt = <1800000>;
123 startup-delay-us = <70000>; 113 startup-delay-us = <70000>;
124 114
125 gpio = <&gpio2 25 GPIO_ACTIVE_ 115 gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
126 enable-active-high; 116 enable-active-high;
127 }; 117 };
128 118
129 x13_clk: x13 { 119 x13_clk: x13 {
130 compatible = "fixed-clock"; 120 compatible = "fixed-clock";
131 #clock-cells = <0>; 121 #clock-cells = <0>;
132 clock-frequency = <74250000>; 122 clock-frequency = <74250000>;
133 }; 123 };
134 <<
135 connector { <<
136 compatible = "usb-c-connector" <<
137 label = "USB-C"; <<
138 data-role = "dual"; <<
139 <<
140 ports { <<
141 #address-cells = <1>; <<
142 #size-cells = <0>; <<
143 port@0 { <<
144 reg = <0>; <<
145 hs_ep: endpoin <<
146 remote <<
147 }; <<
148 }; <<
149 port@1 { <<
150 reg = <1>; <<
151 ss_ep: endpoin <<
152 remote <<
153 }; <<
154 }; <<
155 }; <<
156 }; <<
157 }; 124 };
158 125
159 &audio_clk_a { 126 &audio_clk_a {
160 clock-frequency = <22579200>; 127 clock-frequency = <22579200>;
161 }; 128 };
162 129
163 &du { 130 &du {
164 pinctrl-0 = <&du_pins>; 131 pinctrl-0 = <&du_pins>;
165 pinctrl-names = "default"; 132 pinctrl-names = "default";
166 status = "okay"; 133 status = "okay";
167 134
168 clocks = <&cpg CPG_MOD 724>, 135 clocks = <&cpg CPG_MOD 724>,
169 <&cpg CPG_MOD 723>, 136 <&cpg CPG_MOD 723>,
170 <&x13_clk>; 137 <&x13_clk>;
171 clock-names = "du.0", "du.1", "dclkin. 138 clock-names = "du.0", "du.1", "dclkin.0";
172 139
173 ports { 140 ports {
174 port@0 { 141 port@0 {
175 du_out_rgb: endpoint { !! 142 endpoint {
176 remote-endpoin 143 remote-endpoint = <&tda19988_in>;
177 }; 144 };
178 }; 145 };
179 }; 146 };
180 }; 147 };
181 148
182 &ehci0 { 149 &ehci0 {
183 dr_mode = "host"; 150 dr_mode = "host";
184 status = "okay"; 151 status = "okay";
185 }; 152 };
186 153
187 &extal_clk { 154 &extal_clk {
188 clock-frequency = <48000000>; 155 clock-frequency = <48000000>;
189 }; 156 };
190 157
191 &hscif2 { 158 &hscif2 {
192 pinctrl-0 = <&hscif2_pins>; 159 pinctrl-0 = <&hscif2_pins>;
193 pinctrl-names = "default"; 160 pinctrl-names = "default";
194 161
195 uart-has-rtscts; 162 uart-has-rtscts;
196 status = "okay"; 163 status = "okay";
197 164
198 bluetooth { 165 bluetooth {
199 compatible = "ti,wl1837-st"; 166 compatible = "ti,wl1837-st";
200 enable-gpios = <&gpio4 6 GPIO_ 167 enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
201 }; 168 };
202 }; 169 };
203 170
204 &i2c0 { 171 &i2c0 {
205 status = "okay"; 172 status = "okay";
206 clock-frequency = <100000>; 173 clock-frequency = <100000>;
207 174
208 hd3ss3220@47 { 175 hd3ss3220@47 {
209 compatible = "ti,hd3ss3220"; 176 compatible = "ti,hd3ss3220";
210 reg = <0x47>; 177 reg = <0x47>;
211 interrupt-parent = <&gpio6>; 178 interrupt-parent = <&gpio6>;
212 interrupts = <3 IRQ_TYPE_LEVEL 179 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
213 180
214 ports { !! 181 connector {
215 #address-cells = <1>; !! 182 compatible = "usb-c-connector";
216 #size-cells = <0>; !! 183 label = "USB-C";
217 port@0 { !! 184 data-role = "dual";
218 reg = <0>; !! 185
219 hd3ss3220_in_e !! 186 ports {
220 remote !! 187 #address-cells = <1>;
221 }; !! 188 #size-cells = <0>;
222 }; !! 189
223 port@1 { !! 190 port@1 {
224 reg = <1>; !! 191 reg = <1>;
225 hd3ss3220_out_ !! 192 hd3ss3220_ep: endpoint {
226 remote !! 193 remote-endpoint = <&usb3_role_switch>;
>> 194 };
227 }; 195 };
228 }; 196 };
229 }; 197 };
230 }; 198 };
231 199
232 tda19988: tda19988@70 { 200 tda19988: tda19988@70 {
233 compatible = "nxp,tda998x"; 201 compatible = "nxp,tda998x";
234 reg = <0x70>; 202 reg = <0x70>;
235 interrupt-parent = <&gpio1>; 203 interrupt-parent = <&gpio1>;
236 interrupts = <1 IRQ_TYPE_LEVEL 204 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
237 205
238 video-ports = <0x234501>; 206 video-ports = <0x234501>;
239 207
240 #sound-dai-cells = <0>; 208 #sound-dai-cells = <0>;
241 audio-ports = <TDA998x_I2S 0x0 209 audio-ports = <TDA998x_I2S 0x03>;
242 clocks = <&rcar_sound 1>; 210 clocks = <&rcar_sound 1>;
243 211
244 ports { 212 ports {
245 #address-cells = <1>; 213 #address-cells = <1>;
246 #size-cells = <0>; 214 #size-cells = <0>;
247 215
248 port@0 { 216 port@0 {
249 reg = <0>; 217 reg = <0>;
250 tda19988_in: e 218 tda19988_in: endpoint {
251 remote 219 remote-endpoint = <&du_out_rgb>;
252 }; 220 };
253 }; 221 };
254 222
255 port@1 { 223 port@1 {
256 reg = <1>; 224 reg = <1>;
257 tda19988_out: 225 tda19988_out: endpoint {
258 remote 226 remote-endpoint = <&hdmi_con_out>;
259 }; 227 };
260 }; 228 };
261 }; 229 };
262 }; 230 };
263 }; 231 };
264 232
265 &i2c1 { 233 &i2c1 {
266 pinctrl-0 = <&i2c1_pins>; 234 pinctrl-0 = <&i2c1_pins>;
267 pinctrl-names = "default"; 235 pinctrl-names = "default";
268 236
269 status = "okay"; 237 status = "okay";
270 clock-frequency = <400000>; 238 clock-frequency = <400000>;
271 239
272 rtc@32 { 240 rtc@32 {
273 compatible = "epson,rx8571"; 241 compatible = "epson,rx8571";
274 reg = <0x32>; 242 reg = <0x32>;
275 }; 243 };
276 }; 244 };
277 245
278 &lvds0 { 246 &lvds0 {
279 status = "okay"; 247 status = "okay";
280 248
281 clocks = <&cpg CPG_MOD 727>, <&x13_clk 249 clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
282 clock-names = "fck", "dclkin.0", "exta 250 clock-names = "fck", "dclkin.0", "extal";
283 }; 251 };
284 252
285 &ohci0 { 253 &ohci0 {
286 dr_mode = "host"; 254 dr_mode = "host";
287 status = "okay"; 255 status = "okay";
288 }; 256 };
289 257
290 &pcie_bus_clk { 258 &pcie_bus_clk {
291 clock-frequency = <100000000>; 259 clock-frequency = <100000000>;
292 }; 260 };
293 261
294 &pciec0 { 262 &pciec0 {
295 /* Map all possible DDR as inbound ran 263 /* Map all possible DDR as inbound ranges */
296 dma-ranges = <0x42000000 0 0x40000000 264 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
297 }; 265 };
298 266
299 &pfc { 267 &pfc {
300 du_pins: du { 268 du_pins: du {
301 groups = "du_rgb888", "du_clk_ 269 groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp",
302 "du_clk_in_0"; 270 "du_clk_in_0";
303 function = "du"; 271 function = "du";
304 }; 272 };
305 273
306 hscif2_pins: hscif2 { <<
307 groups = "hscif2_data_a", "hsc <<
308 function = "hscif2"; <<
309 }; <<
310 <<
311 i2c1_pins: i2c1 { 274 i2c1_pins: i2c1 {
312 groups = "i2c1_b"; 275 groups = "i2c1_b";
313 function = "i2c1"; 276 function = "i2c1";
314 }; 277 };
315 278
>> 279 hscif2_pins: hscif2 {
>> 280 groups = "hscif2_data_a", "hscif2_ctrl_a";
>> 281 function = "hscif2";
>> 282 };
>> 283
316 scif2_pins: scif2 { 284 scif2_pins: scif2 {
317 groups = "scif2_data_a"; 285 groups = "scif2_data_a";
318 function = "scif2"; 286 function = "scif2";
319 }; 287 };
320 288
321 sdhi0_pins: sd0 { 289 sdhi0_pins: sd0 {
322 groups = "sdhi0_data4", "sdhi0 290 groups = "sdhi0_data4", "sdhi0_ctrl";
323 function = "sdhi0"; 291 function = "sdhi0";
324 power-source = <3300>; 292 power-source = <3300>;
325 }; 293 };
326 294
327 sdhi0_pins_uhs: sd0_uhs { 295 sdhi0_pins_uhs: sd0_uhs {
328 groups = "sdhi0_data4", "sdhi0 296 groups = "sdhi0_data4", "sdhi0_ctrl";
329 function = "sdhi0"; 297 function = "sdhi0";
330 power-source = <1800>; 298 power-source = <1800>;
331 }; 299 };
332 300
333 sdhi3_pins: sd3 { 301 sdhi3_pins: sd3 {
334 groups = "sdhi3_data4", "sdhi3 302 groups = "sdhi3_data4", "sdhi3_ctrl";
335 function = "sdhi3"; 303 function = "sdhi3";
336 power-source = <1800>; 304 power-source = <1800>;
337 }; 305 };
338 306
339 sound_clk_pins: sound_clk { <<
340 groups = "audio_clkout1_a"; <<
341 function = "audio_clk"; <<
342 }; <<
343 <<
344 sound_pins: sound { 307 sound_pins: sound {
345 groups = "ssi01239_ctrl", "ssi 308 groups = "ssi01239_ctrl", "ssi0_data";
346 function = "ssi"; 309 function = "ssi";
347 }; 310 };
348 311
>> 312 sound_clk_pins: sound_clk {
>> 313 groups = "audio_clkout1_a";
>> 314 function = "audio_clk";
>> 315 };
>> 316
349 usb30_pins: usb30 { 317 usb30_pins: usb30 {
350 groups = "usb30", "usb30_id"; 318 groups = "usb30", "usb30_id";
351 function = "usb30"; 319 function = "usb30";
352 }; 320 };
353 }; 321 };
354 322
355 &rcar_sound { 323 &rcar_sound {
356 pinctrl-0 = <&sound_pins>, <&sound_clk !! 324 pinctrl-0 = <&sound_pins &sound_clk_pins>;
357 pinctrl-names = "default"; 325 pinctrl-names = "default";
358 326
359 /* Single DAI */ 327 /* Single DAI */
360 #sound-dai-cells = <0>; 328 #sound-dai-cells = <0>;
361 329
362 /* audio_clkout0/1/2/3 */ 330 /* audio_clkout0/1/2/3 */
363 #clock-cells = <1>; 331 #clock-cells = <1>;
364 clock-frequency = <11289600>; 332 clock-frequency = <11289600>;
365 333
366 status = "okay"; 334 status = "okay";
367 335
368 rcar_sound,dai { 336 rcar_sound,dai {
369 dai0 { 337 dai0 {
370 playback = <&ssi0>, <& !! 338 playback = <&ssi0 &src0 &dvc0>;
371 }; 339 };
372 }; 340 };
373 }; 341 };
374 342
375 &rwdt { 343 &rwdt {
376 timeout-sec = <60>; 344 timeout-sec = <60>;
377 status = "okay"; 345 status = "okay";
378 }; 346 };
379 347
380 &scif2 { 348 &scif2 {
381 pinctrl-0 = <&scif2_pins>; 349 pinctrl-0 = <&scif2_pins>;
382 pinctrl-names = "default"; 350 pinctrl-names = "default";
383 351
384 status = "okay"; 352 status = "okay";
385 }; 353 };
386 354
387 &sdhi0 { 355 &sdhi0 {
388 pinctrl-0 = <&sdhi0_pins>; 356 pinctrl-0 = <&sdhi0_pins>;
389 pinctrl-1 = <&sdhi0_pins_uhs>; 357 pinctrl-1 = <&sdhi0_pins_uhs>;
390 pinctrl-names = "default", "state_uhs" 358 pinctrl-names = "default", "state_uhs";
391 359
392 vmmc-supply = <&vcc_sdhi0>; 360 vmmc-supply = <&vcc_sdhi0>;
393 vqmmc-supply = <&vccq_sdhi0>; 361 vqmmc-supply = <&vccq_sdhi0>;
394 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW> 362 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
395 bus-width = <4>; 363 bus-width = <4>;
396 sd-uhs-sdr50; 364 sd-uhs-sdr50;
397 sd-uhs-sdr104; 365 sd-uhs-sdr104;
398 status = "okay"; 366 status = "okay";
399 }; 367 };
400 368
401 &sdhi3 { 369 &sdhi3 {
402 status = "okay"; 370 status = "okay";
403 pinctrl-0 = <&sdhi3_pins>; 371 pinctrl-0 = <&sdhi3_pins>;
404 pinctrl-names = "default"; 372 pinctrl-names = "default";
405 373
406 vmmc-supply = <&wlan_en_reg>; 374 vmmc-supply = <&wlan_en_reg>;
407 bus-width = <4>; 375 bus-width = <4>;
408 non-removable; 376 non-removable;
409 cap-power-off-card; 377 cap-power-off-card;
410 keep-power-in-suspend; 378 keep-power-in-suspend;
411 379
412 #address-cells = <1>; 380 #address-cells = <1>;
413 #size-cells = <0>; 381 #size-cells = <0>;
414 wlcore: wlcore@2 { 382 wlcore: wlcore@2 {
415 compatible = "ti,wl1837"; 383 compatible = "ti,wl1837";
416 reg = <2>; 384 reg = <2>;
417 interrupt-parent = <&gpio1>; 385 interrupt-parent = <&gpio1>;
418 interrupts = <0 IRQ_TYPE_LEVEL 386 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
419 }; 387 };
420 }; 388 };
421 389
422 &usb2_phy0 { 390 &usb2_phy0 {
423 renesas,no-otg-pins; 391 renesas,no-otg-pins;
424 status = "okay"; 392 status = "okay";
425 }; 393 };
426 394
427 &usb3_peri0 { 395 &usb3_peri0 {
428 companion = <&xhci0>; 396 companion = <&xhci0>;
429 status = "okay"; 397 status = "okay";
430 usb-role-switch; 398 usb-role-switch;
431 399
432 ports { !! 400 port {
433 #address-cells = <1>; !! 401 usb3_role_switch: endpoint {
434 #size-cells = <0>; !! 402 remote-endpoint = <&hd3ss3220_ep>;
435 port@0 { <<
436 reg = <0>; <<
437 usb3_hs_ep: endpoint { <<
438 remote-endpoin <<
439 }; <<
440 }; <<
441 port@1 { <<
442 reg = <1>; <<
443 usb3_role_switch: endp <<
444 remote-endpoin <<
445 }; <<
446 }; 403 };
447 }; 404 };
448 }; 405 };
449 406
450 &xhci0 { 407 &xhci0 {
451 pinctrl-0 = <&usb30_pins>; 408 pinctrl-0 = <&usb30_pins>;
452 pinctrl-names = "default"; 409 pinctrl-names = "default";
453 410
454 status = "okay"; 411 status = "okay";
455 }; 412 };
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