1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the RZ/G2E (R8A774C0
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics
6 */
7
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.
9 #include <dt-bindings/interrupt-controller/arm
10 #include <dt-bindings/power/r8a774c0-sysc.h>
11
12 / {
13 compatible = "renesas,r8a774c0";
14 #address-cells = <2>;
15 #size-cells = <2>;
16
17 /*
18 * The external audio clocks are confi
19 * clocks by default.
20 * Boards that provide audio clocks sh
21 */
22 audio_clk_a: audio_clk_a {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <0>;
26 };
27
28 audio_clk_b: audio_clk_b {
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <0>;
32 };
33
34 audio_clk_c: audio_clk_c {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <0>;
38 };
39
40 /* External CAN clock - to be overridd
41 can_clk: can {
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <0>;
45 };
46
47 cluster1_opp: opp-table-1 {
48 compatible = "operating-points
49 opp-shared;
50 opp-800000000 {
51 opp-hz = /bits/ 64 <80
52 clock-latency-ns = <30
53 };
54 opp-1000000000 {
55 opp-hz = /bits/ 64 <10
56 clock-latency-ns = <30
57 };
58 opp-1200000000 {
59 opp-hz = /bits/ 64 <12
60 clock-latency-ns = <30
61 opp-suspend;
62 };
63 };
64
65 cpus {
66 #address-cells = <1>;
67 #size-cells = <0>;
68
69 a53_0: cpu@0 {
70 compatible = "arm,cort
71 reg = <0>;
72 device_type = "cpu";
73 #cooling-cells = <2>;
74 power-domains = <&sysc
75 next-level-cache = <&L
76 enable-method = "psci"
77 dynamic-power-coeffici
78 clocks = <&cpg CPG_COR
79 operating-points-v2 =
80 };
81
82 a53_1: cpu@1 {
83 compatible = "arm,cort
84 reg = <1>;
85 device_type = "cpu";
86 power-domains = <&sysc
87 next-level-cache = <&L
88 enable-method = "psci"
89 clocks = <&cpg CPG_COR
90 operating-points-v2 =
91 };
92
93 L2_CA53: cache-controller-0 {
94 compatible = "cache";
95 power-domains = <&sysc
96 cache-unified;
97 cache-level = <2>;
98 };
99 };
100
101 extal_clk: extal {
102 compatible = "fixed-clock";
103 #clock-cells = <0>;
104 /* This value must be overridd
105 clock-frequency = <0>;
106 };
107
108 /* External PCIe clock - can be overri
109 pcie_bus_clk: pcie_bus {
110 compatible = "fixed-clock";
111 #clock-cells = <0>;
112 clock-frequency = <0>;
113 };
114
115 pmu_a53 {
116 compatible = "arm,cortex-a53-p
117 interrupts-extended = <&gic GI
118 <&gic GI
119 interrupt-affinity = <&a53_0>,
120 };
121
122 psci {
123 compatible = "arm,psci-1.0", "
124 method = "smc";
125 };
126
127 /* External SCIF clock - to be overrid
128 scif_clk: scif {
129 compatible = "fixed-clock";
130 #clock-cells = <0>;
131 clock-frequency = <0>;
132 };
133
134 soc: soc {
135 compatible = "simple-bus";
136 interrupt-parent = <&gic>;
137 #address-cells = <2>;
138 #size-cells = <2>;
139 ranges;
140
141 rwdt: watchdog@e6020000 {
142 compatible = "renesas,
143 "renesas,
144 reg = <0 0xe6020000 0
145 interrupts = <GIC_SPI
146 clocks = <&cpg CPG_MOD
147 power-domains = <&sysc
148 resets = <&cpg 402>;
149 status = "disabled";
150 };
151
152 gpio0: gpio@e6050000 {
153 compatible = "renesas,
154 "renesas,
155 reg = <0 0xe6050000 0
156 interrupts = <GIC_SPI
157 #gpio-cells = <2>;
158 gpio-controller;
159 gpio-ranges = <&pfc 0
160 #interrupt-cells = <2>
161 interrupt-controller;
162 clocks = <&cpg CPG_MOD
163 power-domains = <&sysc
164 resets = <&cpg 912>;
165 };
166
167 gpio1: gpio@e6051000 {
168 compatible = "renesas,
169 "renesas,
170 reg = <0 0xe6051000 0
171 interrupts = <GIC_SPI
172 #gpio-cells = <2>;
173 gpio-controller;
174 gpio-ranges = <&pfc 0
175 #interrupt-cells = <2>
176 interrupt-controller;
177 clocks = <&cpg CPG_MOD
178 power-domains = <&sysc
179 resets = <&cpg 911>;
180 };
181
182 gpio2: gpio@e6052000 {
183 compatible = "renesas,
184 "renesas,
185 reg = <0 0xe6052000 0
186 interrupts = <GIC_SPI
187 #gpio-cells = <2>;
188 gpio-controller;
189 gpio-ranges = <&pfc 0
190 #interrupt-cells = <2>
191 interrupt-controller;
192 clocks = <&cpg CPG_MOD
193 power-domains = <&sysc
194 resets = <&cpg 910>;
195 };
196
197 gpio3: gpio@e6053000 {
198 compatible = "renesas,
199 "renesas,
200 reg = <0 0xe6053000 0
201 interrupts = <GIC_SPI
202 #gpio-cells = <2>;
203 gpio-controller;
204 gpio-ranges = <&pfc 0
205 #interrupt-cells = <2>
206 interrupt-controller;
207 clocks = <&cpg CPG_MOD
208 power-domains = <&sysc
209 resets = <&cpg 909>;
210 };
211
212 gpio4: gpio@e6054000 {
213 compatible = "renesas,
214 "renesas,
215 reg = <0 0xe6054000 0
216 interrupts = <GIC_SPI
217 #gpio-cells = <2>;
218 gpio-controller;
219 gpio-ranges = <&pfc 0
220 #interrupt-cells = <2>
221 interrupt-controller;
222 clocks = <&cpg CPG_MOD
223 power-domains = <&sysc
224 resets = <&cpg 908>;
225 };
226
227 gpio5: gpio@e6055000 {
228 compatible = "renesas,
229 "renesas,
230 reg = <0 0xe6055000 0
231 interrupts = <GIC_SPI
232 #gpio-cells = <2>;
233 gpio-controller;
234 gpio-ranges = <&pfc 0
235 #interrupt-cells = <2>
236 interrupt-controller;
237 clocks = <&cpg CPG_MOD
238 power-domains = <&sysc
239 resets = <&cpg 907>;
240 };
241
242 gpio6: gpio@e6055400 {
243 compatible = "renesas,
244 "renesas,
245 reg = <0 0xe6055400 0
246 interrupts = <GIC_SPI
247 #gpio-cells = <2>;
248 gpio-controller;
249 gpio-ranges = <&pfc 0
250 #interrupt-cells = <2>
251 interrupt-controller;
252 clocks = <&cpg CPG_MOD
253 power-domains = <&sysc
254 resets = <&cpg 906>;
255 };
256
257 pfc: pinctrl@e6060000 {
258 compatible = "renesas,
259 reg = <0 0xe6060000 0
260 };
261
262 cmt0: timer@e60f0000 {
263 compatible = "renesas,
264 "renesas,
265 reg = <0 0xe60f0000 0
266 interrupts = <GIC_SPI
267 <GIC_SPI
268 clocks = <&cpg CPG_MOD
269 clock-names = "fck";
270 power-domains = <&sysc
271 resets = <&cpg 303>;
272 status = "disabled";
273 };
274
275 cmt1: timer@e6130000 {
276 compatible = "renesas,
277 "renesas,
278 reg = <0 0xe6130000 0
279 interrupts = <GIC_SPI
280 <GIC_SPI
281 <GIC_SPI
282 <GIC_SPI
283 <GIC_SPI
284 <GIC_SPI
285 <GIC_SPI
286 <GIC_SPI
287 clocks = <&cpg CPG_MOD
288 clock-names = "fck";
289 power-domains = <&sysc
290 resets = <&cpg 302>;
291 status = "disabled";
292 };
293
294 cmt2: timer@e6140000 {
295 compatible = "renesas,
296 "renesas,
297 reg = <0 0xe6140000 0
298 interrupts = <GIC_SPI
299 <GIC_SPI
300 <GIC_SPI
301 <GIC_SPI
302 <GIC_SPI
303 <GIC_SPI
304 <GIC_SPI
305 <GIC_SPI
306 clocks = <&cpg CPG_MOD
307 clock-names = "fck";
308 power-domains = <&sysc
309 resets = <&cpg 301>;
310 status = "disabled";
311 };
312
313 cmt3: timer@e6148000 {
314 compatible = "renesas,
315 "renesas,
316 reg = <0 0xe6148000 0
317 interrupts = <GIC_SPI
318 <GIC_SPI
319 <GIC_SPI
320 <GIC_SPI
321 <GIC_SPI
322 <GIC_SPI
323 <GIC_SPI
324 <GIC_SPI
325 clocks = <&cpg CPG_MOD
326 clock-names = "fck";
327 power-domains = <&sysc
328 resets = <&cpg 300>;
329 status = "disabled";
330 };
331
332 cpg: clock-controller@e6150000
333 compatible = "renesas,
334 reg = <0 0xe6150000 0
335 clocks = <&extal_clk>;
336 clock-names = "extal";
337 #clock-cells = <2>;
338 #power-domain-cells =
339 #reset-cells = <1>;
340 };
341
342 rst: reset-controller@e6160000
343 compatible = "renesas,
344 reg = <0 0xe6160000 0
345 };
346
347 sysc: system-controller@e61800
348 compatible = "renesas,
349 reg = <0 0xe6180000 0
350 #power-domain-cells =
351 };
352
353 thermal: thermal@e6190000 {
354 compatible = "renesas,
355 reg = <0 0xe6190000 0
356 interrupts = <GIC_SPI
357 <GIC_SPI
358 <GIC_SPI
359 clocks = <&cpg CPG_MOD
360 power-domains = <&sysc
361 resets = <&cpg 522>;
362 #thermal-sensor-cells
363 };
364
365 intc_ex: interrupt-controller@
366 compatible = "renesas,
367 #interrupt-cells = <2>
368 interrupt-controller;
369 reg = <0 0xe61c0000 0
370 interrupts = <GIC_SPI
371 <GIC_SPI
372 <GIC_SPI
373 <GIC_SPI
374 <GIC_SPI
375 <GIC_SPI
376 clocks = <&cpg CPG_MOD
377 power-domains = <&sysc
378 resets = <&cpg 407>;
379 };
380
381 tmu0: timer@e61e0000 {
382 compatible = "renesas,
383 reg = <0 0xe61e0000 0
384 interrupts = <GIC_SPI
385 <GIC_SPI
386 <GIC_SPI
387 interrupt-names = "tun
388 clocks = <&cpg CPG_MOD
389 clock-names = "fck";
390 power-domains = <&sysc
391 resets = <&cpg 125>;
392 status = "disabled";
393 };
394
395 tmu1: timer@e6fc0000 {
396 compatible = "renesas,
397 reg = <0 0xe6fc0000 0
398 interrupts = <GIC_SPI
399 <GIC_SPI
400 <GIC_SPI
401 <GIC_SPI
402 interrupt-names = "tun
403 clocks = <&cpg CPG_MOD
404 clock-names = "fck";
405 power-domains = <&sysc
406 resets = <&cpg 124>;
407 status = "disabled";
408 };
409
410 tmu2: timer@e6fd0000 {
411 compatible = "renesas,
412 reg = <0 0xe6fd0000 0
413 interrupts = <GIC_SPI
414 <GIC_SPI
415 <GIC_SPI
416 <GIC_SPI
417 interrupt-names = "tun
418 clocks = <&cpg CPG_MOD
419 clock-names = "fck";
420 power-domains = <&sysc
421 resets = <&cpg 123>;
422 status = "disabled";
423 };
424
425 tmu3: timer@e6fe0000 {
426 compatible = "renesas,
427 reg = <0 0xe6fe0000 0
428 interrupts = <GIC_SPI
429 <GIC_SPI
430 <GIC_SPI
431 interrupt-names = "tun
432 clocks = <&cpg CPG_MOD
433 clock-names = "fck";
434 power-domains = <&sysc
435 resets = <&cpg 122>;
436 status = "disabled";
437 };
438
439 tmu4: timer@ffc00000 {
440 compatible = "renesas,
441 reg = <0 0xffc00000 0
442 interrupts = <GIC_SPI
443 <GIC_SPI
444 <GIC_SPI
445 interrupt-names = "tun
446 clocks = <&cpg CPG_MOD
447 clock-names = "fck";
448 power-domains = <&sysc
449 resets = <&cpg 121>;
450 status = "disabled";
451 };
452
453 i2c0: i2c@e6500000 {
454 #address-cells = <1>;
455 #size-cells = <0>;
456 compatible = "renesas,
457 "renesas,
458 reg = <0 0xe6500000 0
459 interrupts = <GIC_SPI
460 clocks = <&cpg CPG_MOD
461 power-domains = <&sysc
462 resets = <&cpg 931>;
463 dmas = <&dmac1 0x91>,
464 <&dmac2 0x91>,
465 dma-names = "tx", "rx"
466 i2c-scl-internal-delay
467 status = "disabled";
468 };
469
470 i2c1: i2c@e6508000 {
471 #address-cells = <1>;
472 #size-cells = <0>;
473 compatible = "renesas,
474 "renesas,
475 reg = <0 0xe6508000 0
476 interrupts = <GIC_SPI
477 clocks = <&cpg CPG_MOD
478 power-domains = <&sysc
479 resets = <&cpg 930>;
480 dmas = <&dmac1 0x93>,
481 <&dmac2 0x93>,
482 dma-names = "tx", "rx"
483 i2c-scl-internal-delay
484 status = "disabled";
485 };
486
487 i2c2: i2c@e6510000 {
488 #address-cells = <1>;
489 #size-cells = <0>;
490 compatible = "renesas,
491 "renesas,
492 reg = <0 0xe6510000 0
493 interrupts = <GIC_SPI
494 clocks = <&cpg CPG_MOD
495 power-domains = <&sysc
496 resets = <&cpg 929>;
497 dmas = <&dmac1 0x95>,
498 <&dmac2 0x95>,
499 dma-names = "tx", "rx"
500 i2c-scl-internal-delay
501 status = "disabled";
502 };
503
504 i2c3: i2c@e66d0000 {
505 #address-cells = <1>;
506 #size-cells = <0>;
507 compatible = "renesas,
508 "renesas,
509 reg = <0 0xe66d0000 0
510 interrupts = <GIC_SPI
511 clocks = <&cpg CPG_MOD
512 power-domains = <&sysc
513 resets = <&cpg 928>;
514 dmas = <&dmac0 0x97>,
515 dma-names = "tx", "rx"
516 i2c-scl-internal-delay
517 status = "disabled";
518 };
519
520 i2c4: i2c@e66d8000 {
521 #address-cells = <1>;
522 #size-cells = <0>;
523 compatible = "renesas,
524 "renesas,
525 reg = <0 0xe66d8000 0
526 interrupts = <GIC_SPI
527 clocks = <&cpg CPG_MOD
528 power-domains = <&sysc
529 resets = <&cpg 927>;
530 dmas = <&dmac0 0x99>,
531 dma-names = "tx", "rx"
532 i2c-scl-internal-delay
533 status = "disabled";
534 };
535
536 i2c5: i2c@e66e0000 {
537 #address-cells = <1>;
538 #size-cells = <0>;
539 compatible = "renesas,
540 "renesas,
541 reg = <0 0xe66e0000 0
542 interrupts = <GIC_SPI
543 clocks = <&cpg CPG_MOD
544 power-domains = <&sysc
545 resets = <&cpg 919>;
546 dmas = <&dmac0 0x9b>,
547 dma-names = "tx", "rx"
548 i2c-scl-internal-delay
549 status = "disabled";
550 };
551
552 i2c6: i2c@e66e8000 {
553 #address-cells = <1>;
554 #size-cells = <0>;
555 compatible = "renesas,
556 "renesas,
557 reg = <0 0xe66e8000 0
558 interrupts = <GIC_SPI
559 clocks = <&cpg CPG_MOD
560 power-domains = <&sysc
561 resets = <&cpg 918>;
562 dmas = <&dmac0 0x9d>,
563 dma-names = "tx", "rx"
564 i2c-scl-internal-delay
565 status = "disabled";
566 };
567
568 i2c7: i2c@e6690000 {
569 #address-cells = <1>;
570 #size-cells = <0>;
571 compatible = "renesas,
572 "renesas,
573 reg = <0 0xe6690000 0
574 interrupts = <GIC_SPI
575 clocks = <&cpg CPG_MOD
576 power-domains = <&sysc
577 resets = <&cpg 1003>;
578 i2c-scl-internal-delay
579 status = "disabled";
580 };
581
582 iic_pmic: i2c@e60b0000 {
583 #address-cells = <1>;
584 #size-cells = <0>;
585 compatible = "renesas,
586 "renesas,
587 "renesas,
588 reg = <0 0xe60b0000 0
589 interrupts = <GIC_SPI
590 clocks = <&cpg CPG_MOD
591 power-domains = <&sysc
592 resets = <&cpg 926>;
593 dmas = <&dmac0 0x11>,
594 dma-names = "tx", "rx"
595 status = "disabled";
596 };
597
598 hscif0: serial@e6540000 {
599 compatible = "renesas,
600 "renesas,
601 "renesas,
602 reg = <0 0xe6540000 0
603 interrupts = <GIC_SPI
604 clocks = <&cpg CPG_MOD
605 <&cpg CPG_COR
606 <&scif_clk>;
607 clock-names = "fck", "
608 dmas = <&dmac1 0x31>,
609 <&dmac2 0x31>,
610 dma-names = "tx", "rx"
611 power-domains = <&sysc
612 resets = <&cpg 520>;
613 status = "disabled";
614 };
615
616 hscif1: serial@e6550000 {
617 compatible = "renesas,
618 "renesas,
619 "renesas,
620 reg = <0 0xe6550000 0
621 interrupts = <GIC_SPI
622 clocks = <&cpg CPG_MOD
623 <&cpg CPG_COR
624 <&scif_clk>;
625 clock-names = "fck", "
626 dmas = <&dmac1 0x33>,
627 <&dmac2 0x33>,
628 dma-names = "tx", "rx"
629 power-domains = <&sysc
630 resets = <&cpg 519>;
631 status = "disabled";
632 };
633
634 hscif2: serial@e6560000 {
635 compatible = "renesas,
636 "renesas,
637 "renesas,
638 reg = <0 0xe6560000 0
639 interrupts = <GIC_SPI
640 clocks = <&cpg CPG_MOD
641 <&cpg CPG_COR
642 <&scif_clk>;
643 clock-names = "fck", "
644 dmas = <&dmac1 0x35>,
645 <&dmac2 0x35>,
646 dma-names = "tx", "rx"
647 power-domains = <&sysc
648 resets = <&cpg 518>;
649 status = "disabled";
650 };
651
652 hscif3: serial@e66a0000 {
653 compatible = "renesas,
654 "renesas,
655 "renesas,
656 reg = <0 0xe66a0000 0
657 interrupts = <GIC_SPI
658 clocks = <&cpg CPG_MOD
659 <&cpg CPG_COR
660 <&scif_clk>;
661 clock-names = "fck", "
662 dmas = <&dmac0 0x37>,
663 dma-names = "tx", "rx"
664 power-domains = <&sysc
665 resets = <&cpg 517>;
666 status = "disabled";
667 };
668
669 hscif4: serial@e66b0000 {
670 compatible = "renesas,
671 "renesas,
672 "renesas,
673 reg = <0 0xe66b0000 0
674 interrupts = <GIC_SPI
675 clocks = <&cpg CPG_MOD
676 <&cpg CPG_COR
677 <&scif_clk>;
678 clock-names = "fck", "
679 dmas = <&dmac0 0x39>,
680 dma-names = "tx", "rx"
681 power-domains = <&sysc
682 resets = <&cpg 516>;
683 status = "disabled";
684 };
685
686 hsusb: usb@e6590000 {
687 compatible = "renesas,
688 "renesas,
689 reg = <0 0xe6590000 0
690 interrupts = <GIC_SPI
691 clocks = <&cpg CPG_MOD
692 dmas = <&usb_dmac0 0>,
693 <&usb_dmac1 0>,
694 dma-names = "ch0", "ch
695 renesas,buswait = <11>
696 phys = <&usb2_phy0 3>;
697 phy-names = "usb";
698 power-domains = <&sysc
699 resets = <&cpg 704>, <
700 status = "disabled";
701 };
702
703 usb_dmac0: dma-controller@e65a
704 compatible = "renesas,
705 "renesas,
706 reg = <0 0xe65a0000 0
707 interrupts = <GIC_SPI
708 <GIC_SPI
709 interrupt-names = "ch0
710 clocks = <&cpg CPG_MOD
711 power-domains = <&sysc
712 resets = <&cpg 330>;
713 #dma-cells = <1>;
714 dma-channels = <2>;
715 };
716
717 usb_dmac1: dma-controller@e65b
718 compatible = "renesas,
719 "renesas,
720 reg = <0 0xe65b0000 0
721 interrupts = <GIC_SPI
722 <GIC_SPI
723 interrupt-names = "ch0
724 clocks = <&cpg CPG_MOD
725 power-domains = <&sysc
726 resets = <&cpg 331>;
727 #dma-cells = <1>;
728 dma-channels = <2>;
729 };
730
731 dmac0: dma-controller@e6700000
732 compatible = "renesas,
733 "renesas,
734 reg = <0 0xe6700000 0
735 interrupts = <GIC_SPI
736 <GIC_SPI
737 <GIC_SPI
738 <GIC_SPI
739 <GIC_SPI
740 <GIC_SPI
741 <GIC_SPI
742 <GIC_SPI
743 <GIC_SPI
744 <GIC_SPI
745 <GIC_SPI
746 <GIC_SPI
747 <GIC_SPI
748 <GIC_SPI
749 <GIC_SPI
750 <GIC_SPI
751 <GIC_SPI
752 interrupt-names = "err
753 "ch0",
754 "ch4",
755 "ch8",
756 "ch12"
757 clocks = <&cpg CPG_MOD
758 clock-names = "fck";
759 power-domains = <&sysc
760 resets = <&cpg 219>;
761 #dma-cells = <1>;
762 dma-channels = <16>;
763 iommus = <&ipmmu_ds0 0
764 <&ipmmu_ds0 2>,
765 <&ipmmu_ds0 4>,
766 <&ipmmu_ds0 6>,
767 <&ipmmu_ds0 8>,
768 <&ipmmu_ds0 10>
769 <&ipmmu_ds0 12>
770 <&ipmmu_ds0 14>
771 };
772
773 dmac1: dma-controller@e7300000
774 compatible = "renesas,
775 "renesas,
776 reg = <0 0xe7300000 0
777 interrupts = <GIC_SPI
778 <GIC_SPI
779 <GIC_SPI
780 <GIC_SPI
781 <GIC_SPI
782 <GIC_SPI
783 <GIC_SPI
784 <GIC_SPI
785 <GIC_SPI
786 <GIC_SPI
787 <GIC_SPI
788 <GIC_SPI
789 <GIC_SPI
790 <GIC_SPI
791 <GIC_SPI
792 <GIC_SPI
793 <GIC_SPI
794 interrupt-names = "err
795 "ch0",
796 "ch4",
797 "ch8",
798 "ch12"
799 clocks = <&cpg CPG_MOD
800 clock-names = "fck";
801 power-domains = <&sysc
802 resets = <&cpg 218>;
803 #dma-cells = <1>;
804 dma-channels = <16>;
805 iommus = <&ipmmu_ds1 0
806 <&ipmmu_ds1 2>,
807 <&ipmmu_ds1 4>,
808 <&ipmmu_ds1 6>,
809 <&ipmmu_ds1 8>,
810 <&ipmmu_ds1 10>
811 <&ipmmu_ds1 12>
812 <&ipmmu_ds1 14>
813 };
814
815 dmac2: dma-controller@e7310000
816 compatible = "renesas,
817 "renesas,
818 reg = <0 0xe7310000 0
819 interrupts = <GIC_SPI
820 <GIC_SPI
821 <GIC_SPI
822 <GIC_SPI
823 <GIC_SPI
824 <GIC_SPI
825 <GIC_SPI
826 <GIC_SPI
827 <GIC_SPI
828 <GIC_SPI
829 <GIC_SPI
830 <GIC_SPI
831 <GIC_SPI
832 <GIC_SPI
833 <GIC_SPI
834 <GIC_SPI
835 <GIC_SPI
836 interrupt-names = "err
837 "ch0",
838 "ch4",
839 "ch8",
840 "ch12"
841 clocks = <&cpg CPG_MOD
842 clock-names = "fck";
843 power-domains = <&sysc
844 resets = <&cpg 217>;
845 #dma-cells = <1>;
846 dma-channels = <16>;
847 iommus = <&ipmmu_ds1 1
848 <&ipmmu_ds1 18>
849 <&ipmmu_ds1 20>
850 <&ipmmu_ds1 22>
851 <&ipmmu_ds1 24>
852 <&ipmmu_ds1 26>
853 <&ipmmu_ds1 28>
854 <&ipmmu_ds1 30>
855 };
856
857 ipmmu_ds0: iommu@e6740000 {
858 compatible = "renesas,
859 reg = <0 0xe6740000 0
860 renesas,ipmmu-main = <
861 power-domains = <&sysc
862 #iommu-cells = <1>;
863 };
864
865 ipmmu_ds1: iommu@e7740000 {
866 compatible = "renesas,
867 reg = <0 0xe7740000 0
868 renesas,ipmmu-main = <
869 power-domains = <&sysc
870 #iommu-cells = <1>;
871 };
872
873 ipmmu_hc: iommu@e6570000 {
874 compatible = "renesas,
875 reg = <0 0xe6570000 0
876 renesas,ipmmu-main = <
877 power-domains = <&sysc
878 #iommu-cells = <1>;
879 };
880
881 ipmmu_mm: iommu@e67b0000 {
882 compatible = "renesas,
883 reg = <0 0xe67b0000 0
884 interrupts = <GIC_SPI
885 <GIC_SPI
886 power-domains = <&sysc
887 #iommu-cells = <1>;
888 };
889
890 ipmmu_mp: iommu@ec670000 {
891 compatible = "renesas,
892 reg = <0 0xec670000 0
893 renesas,ipmmu-main = <
894 power-domains = <&sysc
895 #iommu-cells = <1>;
896 };
897
898 ipmmu_pv0: iommu@fd800000 {
899 compatible = "renesas,
900 reg = <0 0xfd800000 0
901 renesas,ipmmu-main = <
902 power-domains = <&sysc
903 #iommu-cells = <1>;
904 };
905
906 ipmmu_vc0: iommu@fe6b0000 {
907 compatible = "renesas,
908 reg = <0 0xfe6b0000 0
909 renesas,ipmmu-main = <
910 power-domains = <&sysc
911 #iommu-cells = <1>;
912 };
913
914 ipmmu_vi0: iommu@febd0000 {
915 compatible = "renesas,
916 reg = <0 0xfebd0000 0
917 renesas,ipmmu-main = <
918 power-domains = <&sysc
919 #iommu-cells = <1>;
920 };
921
922 ipmmu_vp0: iommu@fe990000 {
923 compatible = "renesas,
924 reg = <0 0xfe990000 0
925 renesas,ipmmu-main = <
926 power-domains = <&sysc
927 #iommu-cells = <1>;
928 };
929
930 avb: ethernet@e6800000 {
931 compatible = "renesas,
932 "renesas,
933 reg = <0 0xe6800000 0
934 interrupts = <GIC_SPI
935 <GIC_SPI
936 <GIC_SPI
937 <GIC_SPI
938 <GIC_SPI
939 <GIC_SPI
940 <GIC_SPI
941 <GIC_SPI
942 <GIC_SPI
943 <GIC_SPI
944 <GIC_SPI
945 <GIC_SPI
946 <GIC_SPI
947 <GIC_SPI
948 <GIC_SPI
949 <GIC_SPI
950 <GIC_SPI
951 <GIC_SPI
952 <GIC_SPI
953 <GIC_SPI
954 <GIC_SPI
955 <GIC_SPI
956 <GIC_SPI
957 <GIC_SPI
958 <GIC_SPI
959 interrupt-names = "ch0
960 "ch4
961 "ch8
962 "ch1
963 "ch1
964 "ch2
965 "ch2
966 clocks = <&cpg CPG_MOD
967 clock-names = "fck";
968 power-domains = <&sysc
969 resets = <&cpg 812>;
970 phy-mode = "rgmii";
971 rx-internal-delay-ps =
972 iommus = <&ipmmu_ds0 1
973 #address-cells = <1>;
974 #size-cells = <0>;
975 status = "disabled";
976 };
977
978 can0: can@e6c30000 {
979 compatible = "renesas,
980 "renesas,
981 reg = <0 0xe6c30000 0
982 interrupts = <GIC_SPI
983 clocks = <&cpg CPG_MOD
984 <&cpg CPG_COR
985 <&can_clk>;
986 clock-names = "clkp1",
987 assigned-clocks = <&cp
988 assigned-clock-rates =
989 power-domains = <&sysc
990 resets = <&cpg 916>;
991 status = "disabled";
992 };
993
994 can1: can@e6c38000 {
995 compatible = "renesas,
996 "renesas,
997 reg = <0 0xe6c38000 0
998 interrupts = <GIC_SPI
999 clocks = <&cpg CPG_MOD
1000 <&cpg CPG_CO
1001 <&can_clk>;
1002 clock-names = "clkp1"
1003 assigned-clocks = <&c
1004 assigned-clock-rates
1005 power-domains = <&sys
1006 resets = <&cpg 915>;
1007 status = "disabled";
1008 };
1009
1010 canfd: can@e66c0000 {
1011 compatible = "renesas
1012 "renesas
1013 reg = <0 0xe66c0000 0
1014 interrupts = <GIC_SPI
1015 <GIC_SPI
1016 interrupt-names = "ch
1017 clocks = <&cpg CPG_MO
1018 <&cpg CPG_CO
1019 <&can_clk>;
1020 clock-names = "fck",
1021 assigned-clocks = <&c
1022 assigned-clock-rates
1023 power-domains = <&sys
1024 resets = <&cpg 914>;
1025 status = "disabled";
1026
1027 channel0 {
1028 status = "dis
1029 };
1030
1031 channel1 {
1032 status = "dis
1033 };
1034 };
1035
1036 pwm0: pwm@e6e30000 {
1037 compatible = "renesas
1038 reg = <0 0xe6e30000 0
1039 clocks = <&cpg CPG_MO
1040 power-domains = <&sys
1041 resets = <&cpg 523>;
1042 #pwm-cells = <2>;
1043 status = "disabled";
1044 };
1045
1046 pwm1: pwm@e6e31000 {
1047 compatible = "renesas
1048 reg = <0 0xe6e31000 0
1049 clocks = <&cpg CPG_MO
1050 power-domains = <&sys
1051 resets = <&cpg 523>;
1052 #pwm-cells = <2>;
1053 status = "disabled";
1054 };
1055
1056 pwm2: pwm@e6e32000 {
1057 compatible = "renesas
1058 reg = <0 0xe6e32000 0
1059 clocks = <&cpg CPG_MO
1060 power-domains = <&sys
1061 resets = <&cpg 523>;
1062 #pwm-cells = <2>;
1063 status = "disabled";
1064 };
1065
1066 pwm3: pwm@e6e33000 {
1067 compatible = "renesas
1068 reg = <0 0xe6e33000 0
1069 clocks = <&cpg CPG_MO
1070 power-domains = <&sys
1071 resets = <&cpg 523>;
1072 #pwm-cells = <2>;
1073 status = "disabled";
1074 };
1075
1076 pwm4: pwm@e6e34000 {
1077 compatible = "renesas
1078 reg = <0 0xe6e34000 0
1079 clocks = <&cpg CPG_MO
1080 power-domains = <&sys
1081 resets = <&cpg 523>;
1082 #pwm-cells = <2>;
1083 status = "disabled";
1084 };
1085
1086 pwm5: pwm@e6e35000 {
1087 compatible = "renesas
1088 reg = <0 0xe6e35000 0
1089 clocks = <&cpg CPG_MO
1090 power-domains = <&sys
1091 resets = <&cpg 523>;
1092 #pwm-cells = <2>;
1093 status = "disabled";
1094 };
1095
1096 pwm6: pwm@e6e36000 {
1097 compatible = "renesas
1098 reg = <0 0xe6e36000 0
1099 clocks = <&cpg CPG_MO
1100 power-domains = <&sys
1101 resets = <&cpg 523>;
1102 #pwm-cells = <2>;
1103 status = "disabled";
1104 };
1105
1106 scif0: serial@e6e60000 {
1107 compatible = "renesas
1108 "renesas
1109 reg = <0 0xe6e60000 0
1110 interrupts = <GIC_SPI
1111 clocks = <&cpg CPG_MO
1112 <&cpg CPG_CO
1113 <&scif_clk>;
1114 clock-names = "fck",
1115 dmas = <&dmac1 0x51>,
1116 <&dmac2 0x51>,
1117 dma-names = "tx", "rx
1118 power-domains = <&sys
1119 resets = <&cpg 207>;
1120 status = "disabled";
1121 };
1122
1123 scif1: serial@e6e68000 {
1124 compatible = "renesas
1125 "renesas
1126 reg = <0 0xe6e68000 0
1127 interrupts = <GIC_SPI
1128 clocks = <&cpg CPG_MO
1129 <&cpg CPG_CO
1130 <&scif_clk>;
1131 clock-names = "fck",
1132 dmas = <&dmac1 0x53>,
1133 <&dmac2 0x53>,
1134 dma-names = "tx", "rx
1135 power-domains = <&sys
1136 resets = <&cpg 206>;
1137 status = "disabled";
1138 };
1139
1140 scif2: serial@e6e88000 {
1141 compatible = "renesas
1142 "renesas
1143 reg = <0 0xe6e88000 0
1144 interrupts = <GIC_SPI
1145 clocks = <&cpg CPG_MO
1146 <&cpg CPG_CO
1147 <&scif_clk>;
1148 clock-names = "fck",
1149 dmas = <&dmac1 0x13>,
1150 <&dmac2 0x13>,
1151 dma-names = "tx", "rx
1152 power-domains = <&sys
1153 resets = <&cpg 310>;
1154 status = "disabled";
1155 };
1156
1157 scif3: serial@e6c50000 {
1158 compatible = "renesas
1159 "renesas
1160 reg = <0 0xe6c50000 0
1161 interrupts = <GIC_SPI
1162 clocks = <&cpg CPG_MO
1163 <&cpg CPG_CO
1164 <&scif_clk>;
1165 clock-names = "fck",
1166 dmas = <&dmac0 0x57>,
1167 dma-names = "tx", "rx
1168 power-domains = <&sys
1169 resets = <&cpg 204>;
1170 status = "disabled";
1171 };
1172
1173 scif4: serial@e6c40000 {
1174 compatible = "renesas
1175 "renesas
1176 reg = <0 0xe6c40000 0
1177 interrupts = <GIC_SPI
1178 clocks = <&cpg CPG_MO
1179 <&cpg CPG_CO
1180 <&scif_clk>;
1181 clock-names = "fck",
1182 dmas = <&dmac0 0x59>,
1183 dma-names = "tx", "rx
1184 power-domains = <&sys
1185 resets = <&cpg 203>;
1186 status = "disabled";
1187 };
1188
1189 scif5: serial@e6f30000 {
1190 compatible = "renesas
1191 "renesas
1192 reg = <0 0xe6f30000 0
1193 interrupts = <GIC_SPI
1194 clocks = <&cpg CPG_MO
1195 <&cpg CPG_CO
1196 <&scif_clk>;
1197 clock-names = "fck",
1198 dmas = <&dmac0 0x5b>,
1199 dma-names = "tx", "rx
1200 power-domains = <&sys
1201 resets = <&cpg 202>;
1202 status = "disabled";
1203 };
1204
1205 msiof0: spi@e6e90000 {
1206 compatible = "renesas
1207 "renesas
1208 reg = <0 0xe6e90000 0
1209 interrupts = <GIC_SPI
1210 clocks = <&cpg CPG_MO
1211 dmas = <&dmac1 0x41>,
1212 <&dmac2 0x41>,
1213 dma-names = "tx", "rx
1214 power-domains = <&sys
1215 resets = <&cpg 211>;
1216 #address-cells = <1>;
1217 #size-cells = <0>;
1218 status = "disabled";
1219 };
1220
1221 msiof1: spi@e6ea0000 {
1222 compatible = "renesas
1223 "renesas
1224 reg = <0 0xe6ea0000 0
1225 interrupts = <GIC_SPI
1226 clocks = <&cpg CPG_MO
1227 dmas = <&dmac0 0x43>,
1228 dma-names = "tx", "rx
1229 power-domains = <&sys
1230 resets = <&cpg 210>;
1231 #address-cells = <1>;
1232 #size-cells = <0>;
1233 status = "disabled";
1234 };
1235
1236 msiof2: spi@e6c00000 {
1237 compatible = "renesas
1238 "renesas
1239 reg = <0 0xe6c00000 0
1240 interrupts = <GIC_SPI
1241 clocks = <&cpg CPG_MO
1242 dmas = <&dmac0 0x45>,
1243 dma-names = "tx", "rx
1244 power-domains = <&sys
1245 resets = <&cpg 209>;
1246 #address-cells = <1>;
1247 #size-cells = <0>;
1248 status = "disabled";
1249 };
1250
1251 msiof3: spi@e6c10000 {
1252 compatible = "renesas
1253 "renesas
1254 reg = <0 0xe6c10000 0
1255 interrupts = <GIC_SPI
1256 clocks = <&cpg CPG_MO
1257 dmas = <&dmac0 0x47>,
1258 dma-names = "tx", "rx
1259 power-domains = <&sys
1260 resets = <&cpg 208>;
1261 #address-cells = <1>;
1262 #size-cells = <0>;
1263 status = "disabled";
1264 };
1265
1266 vin4: video@e6ef4000 {
1267 compatible = "renesas
1268 reg = <0 0xe6ef4000 0
1269 interrupts = <GIC_SPI
1270 clocks = <&cpg CPG_MO
1271 power-domains = <&sys
1272 resets = <&cpg 807>;
1273 renesas,id = <4>;
1274 status = "disabled";
1275
1276 ports {
1277 #address-cell
1278 #size-cells =
1279
1280 port@1 {
1281 #addr
1282 #size
1283
1284 reg =
1285
1286 vin4c
1287
1288
1289 };
1290 };
1291 };
1292 };
1293
1294 vin5: video@e6ef5000 {
1295 compatible = "renesas
1296 reg = <0 0xe6ef5000 0
1297 interrupts = <GIC_SPI
1298 clocks = <&cpg CPG_MO
1299 power-domains = <&sys
1300 resets = <&cpg 806>;
1301 renesas,id = <5>;
1302 status = "disabled";
1303
1304 ports {
1305 #address-cell
1306 #size-cells =
1307
1308 port@1 {
1309 #addr
1310 #size
1311
1312 reg =
1313
1314 vin5c
1315
1316
1317 };
1318 };
1319 };
1320 };
1321
1322 rcar_sound: sound@ec500000 {
1323 /*
1324 * #sound-dai-cells i
1325 *
1326 * Single DAI : #soun
1327 * Multi DAI : #soun
1328 */
1329 /*
1330 * #clock-cells is re
1331 *
1332 * clkout : #cl
1333 * clkout0/1/2/3: #cl
1334 */
1335 compatible = "renesas
1336 "renesas
1337 reg = <0 0xec500000 0
1338 <0 0xec5a0000 0
1339 <0 0xec540000 0
1340 <0 0xec541000 0
1341 <0 0xec760000 0
1342 reg-names = "scu", "a
1343
1344 clocks = <&cpg CPG_MO
1345 <&cpg CPG_MO
1346 <&cpg CPG_MO
1347 <&cpg CPG_MO
1348 <&cpg CPG_MO
1349 <&cpg CPG_MO
1350 <&cpg CPG_MO
1351 <&cpg CPG_MO
1352 <&cpg CPG_MO
1353 <&cpg CPG_MO
1354 <&cpg CPG_MO
1355 <&cpg CPG_MO
1356 <&cpg CPG_MO
1357 <&cpg CPG_MO
1358 <&audio_clk_
1359 <&audio_clk_
1360 <&cpg CPG_MO
1361 clock-names = "ssi-al
1362 "ssi.9"
1363 "ssi.5"
1364 "ssi.1"
1365 "src.9"
1366 "src.5"
1367 "src.1"
1368 "mix.1"
1369 "ctu.1"
1370 "dvc.0"
1371 "clk_a"
1372 power-domains = <&sys
1373 resets = <&cpg 1005>,
1374 <&cpg 1006>,
1375 <&cpg 1008>,
1376 <&cpg 1010>,
1377 <&cpg 1012>,
1378 <&cpg 1014>,
1379 reset-names = "ssi-al
1380 "ssi.9"
1381 "ssi.5"
1382 "ssi.1"
1383 status = "disabled";
1384
1385 rcar_sound,ctu {
1386 ctu00: ctu-0
1387 ctu01: ctu-1
1388 ctu02: ctu-2
1389 ctu03: ctu-3
1390 ctu10: ctu-4
1391 ctu11: ctu-5
1392 ctu12: ctu-6
1393 ctu13: ctu-7
1394 };
1395
1396 rcar_sound,dvc {
1397 dvc0: dvc-0 {
1398 dmas
1399 dma-n
1400 };
1401 dvc1: dvc-1 {
1402 dmas
1403 dma-n
1404 };
1405 };
1406
1407 rcar_sound,mix {
1408 mix0: mix-0 {
1409 mix1: mix-1 {
1410 };
1411
1412 rcar_sound,src {
1413 src0: src-0 {
1414 inter
1415 dmas
1416 dma-n
1417 };
1418 src1: src-1 {
1419 inter
1420 dmas
1421 dma-n
1422 };
1423 src2: src-2 {
1424 inter
1425 dmas
1426 dma-n
1427 };
1428 src3: src-3 {
1429 inter
1430 dmas
1431 dma-n
1432 };
1433 src4: src-4 {
1434 inter
1435 dmas
1436 dma-n
1437 };
1438 src5: src-5 {
1439 inter
1440 dmas
1441 dma-n
1442 };
1443 src6: src-6 {
1444 inter
1445 dmas
1446 dma-n
1447 };
1448 src7: src-7 {
1449 inter
1450 dmas
1451 dma-n
1452 };
1453 src8: src-8 {
1454 inter
1455 dmas
1456 dma-n
1457 };
1458 src9: src-9 {
1459 inter
1460 dmas
1461 dma-n
1462 };
1463 };
1464
1465 rcar_sound,ssi {
1466 ssi0: ssi-0 {
1467 inter
1468 dmas
1469
1470 dma-n
1471 };
1472 ssi1: ssi-1 {
1473 inter
1474 dmas
1475
1476 dma-n
1477 };
1478 ssi2: ssi-2 {
1479 inter
1480 dmas
1481
1482 dma-n
1483 };
1484 ssi3: ssi-3 {
1485 inter
1486 dmas
1487
1488 dma-n
1489 };
1490 ssi4: ssi-4 {
1491 inter
1492 dmas
1493
1494 dma-n
1495 };
1496 ssi5: ssi-5 {
1497 inter
1498 dmas
1499
1500 dma-n
1501 };
1502 ssi6: ssi-6 {
1503 inter
1504 dmas
1505
1506 dma-n
1507 };
1508 ssi7: ssi-7 {
1509 inter
1510 dmas
1511
1512 dma-n
1513 };
1514 ssi8: ssi-8 {
1515 inter
1516 dmas
1517
1518 dma-n
1519 };
1520 ssi9: ssi-9 {
1521 inter
1522 dmas
1523
1524 dma-n
1525 };
1526 };
1527 };
1528
1529 audma0: dma-controller@ec7000
1530 compatible = "renesas
1531 "renesas
1532 reg = <0 0xec700000 0
1533 interrupts = <GIC_SPI
1534 <GIC_SPI
1535 <GIC_SPI
1536 <GIC_SPI
1537 <GIC_SPI
1538 <GIC_SPI
1539 <GIC_SPI
1540 <GIC_SPI
1541 <GIC_SPI
1542 <GIC_SPI
1543 <GIC_SPI
1544 <GIC_SPI
1545 <GIC_SPI
1546 <GIC_SPI
1547 <GIC_SPI
1548 <GIC_SPI
1549 <GIC_SPI
1550 interrupt-names = "er
1551 "ch0"
1552 "ch4"
1553 "ch8"
1554 "ch12
1555 clocks = <&cpg CPG_MO
1556 clock-names = "fck";
1557 power-domains = <&sys
1558 resets = <&cpg 502>;
1559 #dma-cells = <1>;
1560 dma-channels = <16>;
1561 iommus = <&ipmmu_mp 0
1562 <&ipmmu_mp 2
1563 <&ipmmu_mp 4
1564 <&ipmmu_mp 6
1565 <&ipmmu_mp 8
1566 <&ipmmu_mp 1
1567 <&ipmmu_mp 1
1568 <&ipmmu_mp 1
1569 };
1570
1571 xhci0: usb@ee000000 {
1572 compatible = "renesas
1573 "renesas
1574 reg = <0 0xee000000 0
1575 interrupts = <GIC_SPI
1576 clocks = <&cpg CPG_MO
1577 power-domains = <&sys
1578 resets = <&cpg 328>;
1579 status = "disabled";
1580 };
1581
1582 usb3_peri0: usb@ee020000 {
1583 compatible = "renesas
1584 "renesas
1585 reg = <0 0xee020000 0
1586 interrupts = <GIC_SPI
1587 clocks = <&cpg CPG_MO
1588 power-domains = <&sys
1589 resets = <&cpg 328>;
1590 status = "disabled";
1591 };
1592
1593 ohci0: usb@ee080000 {
1594 compatible = "generic
1595 reg = <0 0xee080000 0
1596 interrupts = <GIC_SPI
1597 clocks = <&cpg CPG_MO
1598 phys = <&usb2_phy0 1>
1599 phy-names = "usb";
1600 power-domains = <&sys
1601 resets = <&cpg 703>,
1602 status = "disabled";
1603 };
1604
1605 ehci0: usb@ee080100 {
1606 compatible = "generic
1607 reg = <0 0xee080100 0
1608 interrupts = <GIC_SPI
1609 clocks = <&cpg CPG_MO
1610 phys = <&usb2_phy0 2>
1611 phy-names = "usb";
1612 companion = <&ohci0>;
1613 power-domains = <&sys
1614 resets = <&cpg 703>,
1615 status = "disabled";
1616 };
1617
1618 usb2_phy0: usb-phy@ee080200 {
1619 compatible = "renesas
1620 "renesas
1621 reg = <0 0xee080200 0
1622 interrupts = <GIC_SPI
1623 clocks = <&cpg CPG_MO
1624 power-domains = <&sys
1625 resets = <&cpg 703>,
1626 #phy-cells = <1>;
1627 status = "disabled";
1628 };
1629
1630 sdhi0: mmc@ee100000 {
1631 compatible = "renesas
1632 "renesas
1633 reg = <0 0xee100000 0
1634 interrupts = <GIC_SPI
1635 clocks = <&cpg CPG_MO
1636 clock-names = "core",
1637 max-frequency = <2000
1638 power-domains = <&sys
1639 resets = <&cpg 314>;
1640 iommus = <&ipmmu_ds1
1641 status = "disabled";
1642 };
1643
1644 sdhi1: mmc@ee120000 {
1645 compatible = "renesas
1646 "renesas
1647 reg = <0 0xee120000 0
1648 interrupts = <GIC_SPI
1649 clocks = <&cpg CPG_MO
1650 clock-names = "core",
1651 max-frequency = <2000
1652 power-domains = <&sys
1653 resets = <&cpg 313>;
1654 iommus = <&ipmmu_ds1
1655 status = "disabled";
1656 };
1657
1658 sdhi3: mmc@ee160000 {
1659 compatible = "renesas
1660 "renesas
1661 reg = <0 0xee160000 0
1662 interrupts = <GIC_SPI
1663 clocks = <&cpg CPG_MO
1664 clock-names = "core",
1665 max-frequency = <2000
1666 power-domains = <&sys
1667 resets = <&cpg 311>;
1668 iommus = <&ipmmu_ds1
1669 status = "disabled";
1670 };
1671
1672 rpc: spi@ee200000 {
1673 compatible = "renesas
1674 "renesas
1675 reg = <0 0xee200000 0
1676 <0 0x08000000 0
1677 <0 0xee208000 0
1678 reg-names = "regs", "
1679 interrupts = <GIC_SPI
1680 clocks = <&cpg CPG_MO
1681 power-domains = <&sys
1682 resets = <&cpg 917>;
1683 #address-cells = <1>;
1684 #size-cells = <0>;
1685 status = "disabled";
1686 };
1687
1688 gic: interrupt-controller@f10
1689 compatible = "arm,gic
1690 #interrupt-cells = <3
1691 #address-cells = <0>;
1692 interrupt-controller;
1693 reg = <0x0 0xf1010000
1694 <0x0 0xf1020000
1695 <0x0 0xf1040000
1696 <0x0 0xf1060000
1697 interrupts = <GIC_PPI
1698 (GIC_
1699 clocks = <&cpg CPG_MO
1700 clock-names = "clk";
1701 power-domains = <&sys
1702 resets = <&cpg 408>;
1703 };
1704
1705 pciec0: pcie@fe000000 {
1706 compatible = "renesas
1707 "renesas
1708 reg = <0 0xfe000000 0
1709 #address-cells = <3>;
1710 #size-cells = <2>;
1711 bus-range = <0x00 0xf
1712 device_type = "pci";
1713 ranges = <0x01000000
1714 <0x02000000
1715 <0x02000000
1716 <0x42000000
1717 /* Map all possible D
1718 dma-ranges = <0x42000
1719 interrupts = <GIC_SPI
1720 <GIC_SPI
1721 <GIC_SPI
1722 #interrupt-cells = <1
1723 interrupt-map-mask =
1724 interrupt-map = <0 0
1725 clocks = <&cpg CPG_MO
1726 clock-names = "pcie",
1727 power-domains = <&sys
1728 resets = <&cpg 319>;
1729 iommu-map = <0 &ipmmu
1730 iommu-map-mask = <0>;
1731 status = "disabled";
1732 };
1733
1734 pciec0_ep: pcie-ep@fe000000 {
1735 compatible = "renesas
1736 "renesas
1737 reg = <0x0 0xfe000000
1738 <0x0 0xfe100000
1739 <0x0 0xfe200000
1740 <0x0 0x30000000
1741 <0x0 0x38000000
1742 reg-names = "apb-base
1743 interrupts = <GIC_SPI
1744 <GIC_SPI
1745 <GIC_SPI
1746 clocks = <&cpg CPG_MO
1747 clock-names = "pcie";
1748 resets = <&cpg 319>;
1749 power-domains = <&sys
1750 status = "disabled";
1751 };
1752
1753 vspb0: vsp@fe960000 {
1754 compatible = "renesas
1755 reg = <0 0xfe960000 0
1756 interrupts = <GIC_SPI
1757 clocks = <&cpg CPG_MO
1758 power-domains = <&sys
1759 resets = <&cpg 626>;
1760 renesas,fcp = <&fcpvb
1761 };
1762
1763 vspd0: vsp@fea20000 {
1764 compatible = "renesas
1765 reg = <0 0xfea20000 0
1766 interrupts = <GIC_SPI
1767 clocks = <&cpg CPG_MO
1768 power-domains = <&sys
1769 resets = <&cpg 623>;
1770 renesas,fcp = <&fcpvd
1771 };
1772
1773 vspd1: vsp@fea28000 {
1774 compatible = "renesas
1775 reg = <0 0xfea28000 0
1776 interrupts = <GIC_SPI
1777 clocks = <&cpg CPG_MO
1778 power-domains = <&sys
1779 resets = <&cpg 622>;
1780 renesas,fcp = <&fcpvd
1781 };
1782
1783 vspi0: vsp@fe9a0000 {
1784 compatible = "renesas
1785 reg = <0 0xfe9a0000 0
1786 interrupts = <GIC_SPI
1787 clocks = <&cpg CPG_MO
1788 power-domains = <&sys
1789 resets = <&cpg 631>;
1790 renesas,fcp = <&fcpvi
1791 };
1792
1793 fcpvb0: fcp@fe96f000 {
1794 compatible = "renesas
1795 reg = <0 0xfe96f000 0
1796 clocks = <&cpg CPG_MO
1797 power-domains = <&sys
1798 resets = <&cpg 607>;
1799 iommus = <&ipmmu_vp0
1800 };
1801
1802 fcpvd0: fcp@fea27000 {
1803 compatible = "renesas
1804 reg = <0 0xfea27000 0
1805 clocks = <&cpg CPG_MO
1806 power-domains = <&sys
1807 resets = <&cpg 603>;
1808 iommus = <&ipmmu_vi0
1809 };
1810
1811 fcpvd1: fcp@fea2f000 {
1812 compatible = "renesas
1813 reg = <0 0xfea2f000 0
1814 clocks = <&cpg CPG_MO
1815 power-domains = <&sys
1816 resets = <&cpg 602>;
1817 iommus = <&ipmmu_vi0
1818 };
1819
1820 fcpvi0: fcp@fe9af000 {
1821 compatible = "renesas
1822 reg = <0 0xfe9af000 0
1823 clocks = <&cpg CPG_MO
1824 power-domains = <&sys
1825 resets = <&cpg 611>;
1826 iommus = <&ipmmu_vp0
1827 };
1828
1829 csi40: csi2@feaa0000 {
1830 compatible = "renesas
1831 reg = <0 0xfeaa0000 0
1832 interrupts = <GIC_SPI
1833 clocks = <&cpg CPG_MO
1834 power-domains = <&sys
1835 resets = <&cpg 716>;
1836 status = "disabled";
1837
1838 ports {
1839 #address-cell
1840 #size-cells =
1841
1842 port@0 {
1843 reg =
1844 };
1845
1846 port@1 {
1847 #addr
1848 #size
1849
1850 reg =
1851
1852 csi40
1853
1854
1855 };
1856 csi40
1857
1858
1859 };
1860 };
1861 };
1862 };
1863
1864 du: display@feb00000 {
1865 compatible = "renesas
1866 reg = <0 0xfeb00000 0
1867 interrupts = <GIC_SPI
1868 <GIC_SPI
1869 clocks = <&cpg CPG_MO
1870 clock-names = "du.0",
1871 resets = <&cpg 724>;
1872 reset-names = "du.0";
1873 renesas,vsps = <&vspd
1874
1875 status = "disabled";
1876
1877 ports {
1878 #address-cell
1879 #size-cells =
1880
1881 port@0 {
1882 reg =
1883 };
1884
1885 port@1 {
1886 reg =
1887 du_ou
1888
1889 };
1890 };
1891
1892 port@2 {
1893 reg =
1894 du_ou
1895
1896 };
1897 };
1898 };
1899 };
1900
1901 lvds0: lvds-encoder@feb90000
1902 compatible = "renesas
1903 reg = <0 0xfeb90000 0
1904 clocks = <&cpg CPG_MO
1905 power-domains = <&sys
1906 resets = <&cpg 727>;
1907 status = "disabled";
1908
1909 renesas,companion = <
1910
1911 ports {
1912 #address-cell
1913 #size-cells =
1914
1915 port@0 {
1916 reg =
1917 lvds0
1918
1919 };
1920 };
1921
1922 port@1 {
1923 reg =
1924 };
1925 };
1926 };
1927
1928 lvds1: lvds-encoder@feb90100
1929 compatible = "renesas
1930 reg = <0 0xfeb90100 0
1931 clocks = <&cpg CPG_MO
1932 power-domains = <&sys
1933 resets = <&cpg 726>;
1934 status = "disabled";
1935
1936 ports {
1937 #address-cell
1938 #size-cells =
1939
1940 port@0 {
1941 reg =
1942 lvds1
1943
1944 };
1945 };
1946
1947 port@1 {
1948 reg =
1949 };
1950 };
1951 };
1952
1953 prr: chipid@fff00044 {
1954 compatible = "renesas
1955 reg = <0 0xfff00044 0
1956 };
1957 };
1958
1959 thermal-zones {
1960 cpu-thermal {
1961 polling-delay-passive
1962 polling-delay = <0>;
1963 thermal-sensors = <&t
1964 sustainable-power = <
1965
1966 cooling-maps {
1967 map0 {
1968 trip
1969 cooli
1970 contr
1971 };
1972 };
1973
1974 trips {
1975 sensor1_crit:
1976 tempe
1977 hyste
1978 type
1979 };
1980
1981 target: trip-
1982 tempe
1983 hyste
1984 type
1985 };
1986 };
1987 };
1988 };
1989
1990 timer {
1991 compatible = "arm,armv8-timer
1992 interrupts-extended = <&gic G
1993 <&gic G
1994 <&gic G
1995 <&gic G
1996 interrupt-names = "sec-phys",
1997 };
1998
1999 /* External USB clocks - can be overr
2000 usb3s0_clk: usb3s0 {
2001 compatible = "fixed-clock";
2002 #clock-cells = <0>;
2003 clock-frequency = <0>;
2004 };
2005
2006 usb_extal_clk: usb_extal {
2007 compatible = "fixed-clock";
2008 #clock-cells = <0>;
2009 clock-frequency = <0>;
2010 };
2011 };
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