1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car M3-N (R8A7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 * 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+rene 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 * 6 *
7 * Based on r8a7796.dtsi 7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp 8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */ 9 */
10 10
11 #include <dt-bindings/clock/r8a77965-cpg-mssr. 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h> 13 #include <dt-bindings/power/r8a77965-sysc.h>
14 14
15 #define SOC_HAS_SATA !! 15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
16 16
17 / { 17 / {
18 compatible = "renesas,r8a77965"; 18 compatible = "renesas,r8a77965";
19 #address-cells = <2>; 19 #address-cells = <2>;
20 #size-cells = <2>; 20 #size-cells = <2>;
21 21
>> 22 aliases {
>> 23 i2c0 = &i2c0;
>> 24 i2c1 = &i2c1;
>> 25 i2c2 = &i2c2;
>> 26 i2c3 = &i2c3;
>> 27 i2c4 = &i2c4;
>> 28 i2c5 = &i2c5;
>> 29 i2c6 = &i2c6;
>> 30 i2c7 = &i2c_dvfs;
>> 31 };
>> 32
22 /* 33 /*
23 * The external audio clocks are confi 34 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default. 35 * clocks by default.
25 * Boards that provide audio clocks sh 36 * Boards that provide audio clocks should override them.
26 */ 37 */
27 audio_clk_a: audio_clk_a { 38 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock"; 39 compatible = "fixed-clock";
29 #clock-cells = <0>; 40 #clock-cells = <0>;
30 clock-frequency = <0>; 41 clock-frequency = <0>;
31 }; 42 };
32 43
33 audio_clk_b: audio_clk_b { 44 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock"; 45 compatible = "fixed-clock";
35 #clock-cells = <0>; 46 #clock-cells = <0>;
36 clock-frequency = <0>; 47 clock-frequency = <0>;
37 }; 48 };
38 49
39 audio_clk_c: audio_clk_c { 50 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock"; 51 compatible = "fixed-clock";
41 #clock-cells = <0>; 52 #clock-cells = <0>;
42 clock-frequency = <0>; 53 clock-frequency = <0>;
43 }; 54 };
44 55
45 /* External CAN clock - to be overridd 56 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can { 57 can_clk: can {
47 compatible = "fixed-clock"; 58 compatible = "fixed-clock";
48 #clock-cells = <0>; 59 #clock-cells = <0>;
49 clock-frequency = <0>; 60 clock-frequency = <0>;
50 }; 61 };
51 62
52 cluster0_opp: opp-table-0 { !! 63 cluster0_opp: opp_table0 {
53 compatible = "operating-points 64 compatible = "operating-points-v2";
54 opp-shared; 65 opp-shared;
55 66
56 opp-500000000 { 67 opp-500000000 {
57 opp-hz = /bits/ 64 <50 68 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <83000 69 opp-microvolt = <830000>;
59 clock-latency-ns = <30 70 clock-latency-ns = <300000>;
60 }; 71 };
61 opp-1000000000 { 72 opp-1000000000 {
62 opp-hz = /bits/ 64 <10 73 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <83000 74 opp-microvolt = <830000>;
64 clock-latency-ns = <30 75 clock-latency-ns = <300000>;
65 }; 76 };
66 opp-1500000000 { 77 opp-1500000000 {
67 opp-hz = /bits/ 64 <15 78 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <83000 79 opp-microvolt = <830000>;
69 clock-latency-ns = <30 80 clock-latency-ns = <300000>;
70 opp-suspend; 81 opp-suspend;
71 }; 82 };
72 opp-1600000000 { 83 opp-1600000000 {
73 opp-hz = /bits/ 64 <16 84 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <90000 85 opp-microvolt = <900000>;
75 clock-latency-ns = <30 86 clock-latency-ns = <300000>;
>> 87 turbo-mode;
76 }; 88 };
77 opp-1700000000 { 89 opp-1700000000 {
78 opp-hz = /bits/ 64 <17 90 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <90000 91 opp-microvolt = <900000>;
80 clock-latency-ns = <30 92 clock-latency-ns = <300000>;
>> 93 turbo-mode;
81 }; 94 };
82 opp-1800000000 { 95 opp-1800000000 {
83 opp-hz = /bits/ 64 <18 96 opp-hz = /bits/ 64 <1800000000>;
84 opp-microvolt = <96000 97 opp-microvolt = <960000>;
85 clock-latency-ns = <30 98 clock-latency-ns = <300000>;
86 turbo-mode; 99 turbo-mode;
87 }; 100 };
88 }; 101 };
89 102
90 cpus { 103 cpus {
91 #address-cells = <1>; 104 #address-cells = <1>;
92 #size-cells = <0>; 105 #size-cells = <0>;
93 106
94 a57_0: cpu@0 { 107 a57_0: cpu@0 {
95 compatible = "arm,cort !! 108 compatible = "arm,cortex-a57", "arm,armv8";
96 reg = <0x0>; 109 reg = <0x0>;
97 device_type = "cpu"; 110 device_type = "cpu";
98 power-domains = <&sysc 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
99 next-level-cache = <&L 112 next-level-cache = <&L2_CA57>;
100 enable-method = "psci" 113 enable-method = "psci";
101 cpu-idle-states = <&CP <<
102 #cooling-cells = <2>; <<
103 dynamic-power-coeffici <<
104 clocks = <&cpg CPG_COR 114 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
105 operating-points-v2 = 115 operating-points-v2 = <&cluster0_opp>;
106 }; 116 };
107 117
108 a57_1: cpu@1 { 118 a57_1: cpu@1 {
109 compatible = "arm,cort !! 119 compatible = "arm,cortex-a57", "arm,armv8";
110 reg = <0x1>; 120 reg = <0x1>;
111 device_type = "cpu"; 121 device_type = "cpu";
112 power-domains = <&sysc 122 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
113 next-level-cache = <&L 123 next-level-cache = <&L2_CA57>;
114 enable-method = "psci" 124 enable-method = "psci";
115 cpu-idle-states = <&CP <<
116 clocks = <&cpg CPG_COR 125 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
117 operating-points-v2 = 126 operating-points-v2 = <&cluster0_opp>;
118 }; 127 };
119 128
120 L2_CA57: cache-controller-0 { 129 L2_CA57: cache-controller-0 {
121 compatible = "cache"; 130 compatible = "cache";
122 power-domains = <&sysc 131 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
123 cache-unified; 132 cache-unified;
124 cache-level = <2>; 133 cache-level = <2>;
125 }; 134 };
126 <<
127 idle-states { <<
128 entry-method = "psci"; <<
129 <<
130 CPU_SLEEP_0: cpu-sleep <<
131 compatible = " <<
132 arm,psci-suspe <<
133 local-timer-st <<
134 entry-latency- <<
135 exit-latency-u <<
136 min-residency- <<
137 }; <<
138 }; <<
139 }; 135 };
140 136
141 extal_clk: extal { 137 extal_clk: extal {
142 compatible = "fixed-clock"; 138 compatible = "fixed-clock";
143 #clock-cells = <0>; 139 #clock-cells = <0>;
144 /* This value must be overridd 140 /* This value must be overridden by the board */
145 clock-frequency = <0>; 141 clock-frequency = <0>;
146 }; 142 };
147 143
148 extalr_clk: extalr { 144 extalr_clk: extalr {
149 compatible = "fixed-clock"; 145 compatible = "fixed-clock";
150 #clock-cells = <0>; 146 #clock-cells = <0>;
151 /* This value must be overridd 147 /* This value must be overridden by the board */
152 clock-frequency = <0>; 148 clock-frequency = <0>;
153 }; 149 };
154 150
155 /* External PCIe clock - can be overri 151 /* External PCIe clock - can be overridden by the board */
156 pcie_bus_clk: pcie_bus { 152 pcie_bus_clk: pcie_bus {
157 compatible = "fixed-clock"; 153 compatible = "fixed-clock";
158 #clock-cells = <0>; 154 #clock-cells = <0>;
159 clock-frequency = <0>; 155 clock-frequency = <0>;
160 }; 156 };
161 157
162 pmu_a57 { 158 pmu_a57 {
163 compatible = "arm,cortex-a57-p 159 compatible = "arm,cortex-a57-pmu";
164 interrupts-extended = <&gic GI 160 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
165 <&gic GI 161 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166 interrupt-affinity = <&a57_0>, 162 interrupt-affinity = <&a57_0>,
167 <&a57_1>; 163 <&a57_1>;
168 }; 164 };
169 165
170 psci { 166 psci {
171 compatible = "arm,psci-1.0", " 167 compatible = "arm,psci-1.0", "arm,psci-0.2";
172 method = "smc"; 168 method = "smc";
173 }; 169 };
174 170
175 /* External SCIF clock - to be overrid 171 /* External SCIF clock - to be overridden by boards that provide it */
176 scif_clk: scif { 172 scif_clk: scif {
177 compatible = "fixed-clock"; 173 compatible = "fixed-clock";
178 #clock-cells = <0>; 174 #clock-cells = <0>;
179 clock-frequency = <0>; 175 clock-frequency = <0>;
180 }; 176 };
181 177
182 soc { 178 soc {
183 compatible = "simple-bus"; 179 compatible = "simple-bus";
184 interrupt-parent = <&gic>; 180 interrupt-parent = <&gic>;
185 #address-cells = <2>; 181 #address-cells = <2>;
186 #size-cells = <2>; 182 #size-cells = <2>;
187 ranges; 183 ranges;
188 184
189 rwdt: watchdog@e6020000 { 185 rwdt: watchdog@e6020000 {
190 compatible = "renesas, 186 compatible = "renesas,r8a77965-wdt",
191 "renesas, 187 "renesas,rcar-gen3-wdt";
192 reg = <0 0xe6020000 0 188 reg = <0 0xe6020000 0 0x0c>;
193 interrupts = <GIC_SPI <<
194 clocks = <&cpg CPG_MOD 189 clocks = <&cpg CPG_MOD 402>;
195 power-domains = <&sysc 190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
196 resets = <&cpg 402>; 191 resets = <&cpg 402>;
197 status = "disabled"; 192 status = "disabled";
198 }; 193 };
199 194
200 gpio0: gpio@e6050000 { 195 gpio0: gpio@e6050000 {
201 compatible = "renesas, 196 compatible = "renesas,gpio-r8a77965",
202 "renesas, 197 "renesas,rcar-gen3-gpio";
203 reg = <0 0xe6050000 0 198 reg = <0 0xe6050000 0 0x50>;
204 interrupts = <GIC_SPI 199 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>; 200 #gpio-cells = <2>;
206 gpio-controller; 201 gpio-controller;
207 gpio-ranges = <&pfc 0 202 gpio-ranges = <&pfc 0 0 16>;
208 #interrupt-cells = <2> 203 #interrupt-cells = <2>;
209 interrupt-controller; 204 interrupt-controller;
210 clocks = <&cpg CPG_MOD 205 clocks = <&cpg CPG_MOD 912>;
211 power-domains = <&sysc 206 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
212 resets = <&cpg 912>; 207 resets = <&cpg 912>;
213 }; 208 };
214 209
215 gpio1: gpio@e6051000 { 210 gpio1: gpio@e6051000 {
216 compatible = "renesas, 211 compatible = "renesas,gpio-r8a77965",
217 "renesas, 212 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6051000 0 213 reg = <0 0xe6051000 0 0x50>;
219 interrupts = <GIC_SPI 214 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>; 215 #gpio-cells = <2>;
221 gpio-controller; 216 gpio-controller;
222 gpio-ranges = <&pfc 0 217 gpio-ranges = <&pfc 0 32 29>;
223 #interrupt-cells = <2> 218 #interrupt-cells = <2>;
224 interrupt-controller; 219 interrupt-controller;
225 clocks = <&cpg CPG_MOD 220 clocks = <&cpg CPG_MOD 911>;
226 power-domains = <&sysc 221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
227 resets = <&cpg 911>; 222 resets = <&cpg 911>;
228 }; 223 };
229 224
230 gpio2: gpio@e6052000 { 225 gpio2: gpio@e6052000 {
231 compatible = "renesas, 226 compatible = "renesas,gpio-r8a77965",
232 "renesas, 227 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6052000 0 228 reg = <0 0xe6052000 0 0x50>;
234 interrupts = <GIC_SPI 229 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>; 230 #gpio-cells = <2>;
236 gpio-controller; 231 gpio-controller;
237 gpio-ranges = <&pfc 0 232 gpio-ranges = <&pfc 0 64 15>;
238 #interrupt-cells = <2> 233 #interrupt-cells = <2>;
239 interrupt-controller; 234 interrupt-controller;
240 clocks = <&cpg CPG_MOD 235 clocks = <&cpg CPG_MOD 910>;
241 power-domains = <&sysc 236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
242 resets = <&cpg 910>; 237 resets = <&cpg 910>;
243 }; 238 };
244 239
245 gpio3: gpio@e6053000 { 240 gpio3: gpio@e6053000 {
246 compatible = "renesas, 241 compatible = "renesas,gpio-r8a77965",
247 "renesas, 242 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6053000 0 243 reg = <0 0xe6053000 0 0x50>;
249 interrupts = <GIC_SPI 244 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>; 245 #gpio-cells = <2>;
251 gpio-controller; 246 gpio-controller;
252 gpio-ranges = <&pfc 0 247 gpio-ranges = <&pfc 0 96 16>;
253 #interrupt-cells = <2> 248 #interrupt-cells = <2>;
254 interrupt-controller; 249 interrupt-controller;
255 clocks = <&cpg CPG_MOD 250 clocks = <&cpg CPG_MOD 909>;
256 power-domains = <&sysc 251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
257 resets = <&cpg 909>; 252 resets = <&cpg 909>;
258 }; 253 };
259 254
260 gpio4: gpio@e6054000 { 255 gpio4: gpio@e6054000 {
261 compatible = "renesas, 256 compatible = "renesas,gpio-r8a77965",
262 "renesas, 257 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6054000 0 258 reg = <0 0xe6054000 0 0x50>;
264 interrupts = <GIC_SPI 259 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>; 260 #gpio-cells = <2>;
266 gpio-controller; 261 gpio-controller;
267 gpio-ranges = <&pfc 0 262 gpio-ranges = <&pfc 0 128 18>;
268 #interrupt-cells = <2> 263 #interrupt-cells = <2>;
269 interrupt-controller; 264 interrupt-controller;
270 clocks = <&cpg CPG_MOD 265 clocks = <&cpg CPG_MOD 908>;
271 power-domains = <&sysc 266 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
272 resets = <&cpg 908>; 267 resets = <&cpg 908>;
273 }; 268 };
274 269
275 gpio5: gpio@e6055000 { 270 gpio5: gpio@e6055000 {
276 compatible = "renesas, 271 compatible = "renesas,gpio-r8a77965",
277 "renesas, 272 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6055000 0 273 reg = <0 0xe6055000 0 0x50>;
279 interrupts = <GIC_SPI 274 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>; 275 #gpio-cells = <2>;
281 gpio-controller; 276 gpio-controller;
282 gpio-ranges = <&pfc 0 277 gpio-ranges = <&pfc 0 160 26>;
283 #interrupt-cells = <2> 278 #interrupt-cells = <2>;
284 interrupt-controller; 279 interrupt-controller;
285 clocks = <&cpg CPG_MOD 280 clocks = <&cpg CPG_MOD 907>;
286 power-domains = <&sysc 281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
287 resets = <&cpg 907>; 282 resets = <&cpg 907>;
288 }; 283 };
289 284
290 gpio6: gpio@e6055400 { 285 gpio6: gpio@e6055400 {
291 compatible = "renesas, 286 compatible = "renesas,gpio-r8a77965",
292 "renesas, 287 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055400 0 288 reg = <0 0xe6055400 0 0x50>;
294 interrupts = <GIC_SPI 289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>; 290 #gpio-cells = <2>;
296 gpio-controller; 291 gpio-controller;
297 gpio-ranges = <&pfc 0 292 gpio-ranges = <&pfc 0 192 32>;
298 #interrupt-cells = <2> 293 #interrupt-cells = <2>;
299 interrupt-controller; 294 interrupt-controller;
300 clocks = <&cpg CPG_MOD 295 clocks = <&cpg CPG_MOD 906>;
301 power-domains = <&sysc 296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
302 resets = <&cpg 906>; 297 resets = <&cpg 906>;
303 }; 298 };
304 299
305 gpio7: gpio@e6055800 { 300 gpio7: gpio@e6055800 {
306 compatible = "renesas, 301 compatible = "renesas,gpio-r8a77965",
307 "renesas, 302 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055800 0 303 reg = <0 0xe6055800 0 0x50>;
309 interrupts = <GIC_SPI 304 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>; 305 #gpio-cells = <2>;
311 gpio-controller; 306 gpio-controller;
312 gpio-ranges = <&pfc 0 307 gpio-ranges = <&pfc 0 224 4>;
313 #interrupt-cells = <2> 308 #interrupt-cells = <2>;
314 interrupt-controller; 309 interrupt-controller;
315 clocks = <&cpg CPG_MOD 310 clocks = <&cpg CPG_MOD 905>;
316 power-domains = <&sysc 311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
317 resets = <&cpg 905>; 312 resets = <&cpg 905>;
318 }; 313 };
319 314
320 pfc: pinctrl@e6060000 { !! 315 pfc: pin-controller@e6060000 {
321 compatible = "renesas, 316 compatible = "renesas,pfc-r8a77965";
322 reg = <0 0xe6060000 0 317 reg = <0 0xe6060000 0 0x50c>;
323 }; 318 };
324 319
325 cmt0: timer@e60f0000 { <<
326 compatible = "renesas, <<
327 "renesas, <<
328 reg = <0 0xe60f0000 0 <<
329 interrupts = <GIC_SPI <<
330 <GIC_SPI <<
331 clocks = <&cpg CPG_MOD <<
332 clock-names = "fck"; <<
333 power-domains = <&sysc <<
334 resets = <&cpg 303>; <<
335 status = "disabled"; <<
336 }; <<
337 <<
338 cmt1: timer@e6130000 { <<
339 compatible = "renesas, <<
340 "renesas, <<
341 reg = <0 0xe6130000 0 <<
342 interrupts = <GIC_SPI <<
343 <GIC_SPI <<
344 <GIC_SPI <<
345 <GIC_SPI <<
346 <GIC_SPI <<
347 <GIC_SPI <<
348 <GIC_SPI <<
349 <GIC_SPI <<
350 clocks = <&cpg CPG_MOD <<
351 clock-names = "fck"; <<
352 power-domains = <&sysc <<
353 resets = <&cpg 302>; <<
354 status = "disabled"; <<
355 }; <<
356 <<
357 cmt2: timer@e6140000 { <<
358 compatible = "renesas, <<
359 "renesas, <<
360 reg = <0 0xe6140000 0 <<
361 interrupts = <GIC_SPI <<
362 <GIC_SPI <<
363 <GIC_SPI <<
364 <GIC_SPI <<
365 <GIC_SPI <<
366 <GIC_SPI <<
367 <GIC_SPI <<
368 <GIC_SPI <<
369 clocks = <&cpg CPG_MOD <<
370 clock-names = "fck"; <<
371 power-domains = <&sysc <<
372 resets = <&cpg 301>; <<
373 status = "disabled"; <<
374 }; <<
375 <<
376 cmt3: timer@e6148000 { <<
377 compatible = "renesas, <<
378 "renesas, <<
379 reg = <0 0xe6148000 0 <<
380 interrupts = <GIC_SPI <<
381 <GIC_SPI <<
382 <GIC_SPI <<
383 <GIC_SPI <<
384 <GIC_SPI <<
385 <GIC_SPI <<
386 <GIC_SPI <<
387 <GIC_SPI <<
388 clocks = <&cpg CPG_MOD <<
389 clock-names = "fck"; <<
390 power-domains = <&sysc <<
391 resets = <&cpg 300>; <<
392 status = "disabled"; <<
393 }; <<
394 <<
395 cpg: clock-controller@e6150000 320 cpg: clock-controller@e6150000 {
396 compatible = "renesas, 321 compatible = "renesas,r8a77965-cpg-mssr";
397 reg = <0 0xe6150000 0 322 reg = <0 0xe6150000 0 0x1000>;
398 clocks = <&extal_clk>, 323 clocks = <&extal_clk>, <&extalr_clk>;
399 clock-names = "extal", 324 clock-names = "extal", "extalr";
400 #clock-cells = <2>; 325 #clock-cells = <2>;
401 #power-domain-cells = 326 #power-domain-cells = <0>;
402 #reset-cells = <1>; 327 #reset-cells = <1>;
403 }; 328 };
404 329
405 rst: reset-controller@e6160000 330 rst: reset-controller@e6160000 {
406 compatible = "renesas, 331 compatible = "renesas,r8a77965-rst";
407 reg = <0 0xe6160000 0 332 reg = <0 0xe6160000 0 0x0200>;
408 }; 333 };
409 334
410 sysc: system-controller@e61800 335 sysc: system-controller@e6180000 {
411 compatible = "renesas, 336 compatible = "renesas,r8a77965-sysc";
412 reg = <0 0xe6180000 0 337 reg = <0 0xe6180000 0 0x0400>;
413 #power-domain-cells = 338 #power-domain-cells = <1>;
414 }; 339 };
415 340
416 tsc: thermal@e6198000 { 341 tsc: thermal@e6198000 {
417 compatible = "renesas, 342 compatible = "renesas,r8a77965-thermal";
418 reg = <0 0xe6198000 0 343 reg = <0 0xe6198000 0 0x100>,
419 <0 0xe61a0000 0 344 <0 0xe61a0000 0 0x100>,
420 <0 0xe61a8000 0 345 <0 0xe61a8000 0 0x100>;
421 interrupts = <GIC_SPI 346 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 347 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 348 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 349 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc 350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
426 resets = <&cpg 522>; 351 resets = <&cpg 522>;
427 #thermal-sensor-cells 352 #thermal-sensor-cells = <1>;
428 }; 353 };
429 354
430 intc_ex: interrupt-controller@ 355 intc_ex: interrupt-controller@e61c0000 {
431 compatible = "renesas, 356 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
432 #interrupt-cells = <2> 357 #interrupt-cells = <2>;
433 interrupt-controller; 358 interrupt-controller;
434 reg = <0 0xe61c0000 0 359 reg = <0 0xe61c0000 0 0x200>;
435 interrupts = <GIC_SPI !! 360 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
436 <GIC_SPI !! 361 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
437 <GIC_SPI !! 362 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
438 <GIC_SPI !! 363 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
439 <GIC_SPI !! 364 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
440 <GIC_SPI !! 365 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 366 clocks = <&cpg CPG_MOD 407>;
442 power-domains = <&sysc 367 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
443 resets = <&cpg 407>; 368 resets = <&cpg 407>;
444 }; 369 };
445 370
446 tmu0: timer@e61e0000 { <<
447 compatible = "renesas, <<
448 reg = <0 0xe61e0000 0 <<
449 interrupts = <GIC_SPI <<
450 <GIC_SPI <<
451 <GIC_SPI <<
452 interrupt-names = "tun <<
453 clocks = <&cpg CPG_MOD <<
454 clock-names = "fck"; <<
455 power-domains = <&sysc <<
456 resets = <&cpg 125>; <<
457 status = "disabled"; <<
458 }; <<
459 <<
460 tmu1: timer@e6fc0000 { <<
461 compatible = "renesas, <<
462 reg = <0 0xe6fc0000 0 <<
463 interrupts = <GIC_SPI <<
464 <GIC_SPI <<
465 <GIC_SPI <<
466 <GIC_SPI <<
467 interrupt-names = "tun <<
468 clocks = <&cpg CPG_MOD <<
469 clock-names = "fck"; <<
470 power-domains = <&sysc <<
471 resets = <&cpg 124>; <<
472 status = "disabled"; <<
473 }; <<
474 <<
475 tmu2: timer@e6fd0000 { <<
476 compatible = "renesas, <<
477 reg = <0 0xe6fd0000 0 <<
478 interrupts = <GIC_SPI <<
479 <GIC_SPI <<
480 <GIC_SPI <<
481 <GIC_SPI <<
482 interrupt-names = "tun <<
483 clocks = <&cpg CPG_MOD <<
484 clock-names = "fck"; <<
485 power-domains = <&sysc <<
486 resets = <&cpg 123>; <<
487 status = "disabled"; <<
488 }; <<
489 <<
490 tmu3: timer@e6fe0000 { <<
491 compatible = "renesas, <<
492 reg = <0 0xe6fe0000 0 <<
493 interrupts = <GIC_SPI <<
494 <GIC_SPI <<
495 <GIC_SPI <<
496 interrupt-names = "tun <<
497 clocks = <&cpg CPG_MOD <<
498 clock-names = "fck"; <<
499 power-domains = <&sysc <<
500 resets = <&cpg 122>; <<
501 status = "disabled"; <<
502 }; <<
503 <<
504 tmu4: timer@ffc00000 { <<
505 compatible = "renesas, <<
506 reg = <0 0xffc00000 0 <<
507 interrupts = <GIC_SPI <<
508 <GIC_SPI <<
509 <GIC_SPI <<
510 interrupt-names = "tun <<
511 clocks = <&cpg CPG_MOD <<
512 clock-names = "fck"; <<
513 power-domains = <&sysc <<
514 resets = <&cpg 121>; <<
515 status = "disabled"; <<
516 }; <<
517 <<
518 i2c0: i2c@e6500000 { 371 i2c0: i2c@e6500000 {
519 #address-cells = <1>; 372 #address-cells = <1>;
520 #size-cells = <0>; 373 #size-cells = <0>;
521 compatible = "renesas, 374 compatible = "renesas,i2c-r8a77965",
522 "renesas, 375 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6500000 0 376 reg = <0 0xe6500000 0 0x40>;
524 interrupts = <GIC_SPI 377 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 378 clocks = <&cpg CPG_MOD 931>;
526 power-domains = <&sysc 379 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
527 resets = <&cpg 931>; 380 resets = <&cpg 931>;
528 dmas = <&dmac1 0x91>, 381 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
529 <&dmac2 0x91>, 382 <&dmac2 0x91>, <&dmac2 0x90>;
530 dma-names = "tx", "rx" 383 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 384 i2c-scl-internal-delay-ns = <110>;
532 status = "disabled"; 385 status = "disabled";
533 }; 386 };
534 387
535 i2c1: i2c@e6508000 { 388 i2c1: i2c@e6508000 {
536 #address-cells = <1>; 389 #address-cells = <1>;
537 #size-cells = <0>; 390 #size-cells = <0>;
538 compatible = "renesas, 391 compatible = "renesas,i2c-r8a77965",
539 "renesas, 392 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe6508000 0 393 reg = <0 0xe6508000 0 0x40>;
541 interrupts = <GIC_SPI 394 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 395 clocks = <&cpg CPG_MOD 930>;
543 power-domains = <&sysc 396 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
544 resets = <&cpg 930>; 397 resets = <&cpg 930>;
545 dmas = <&dmac1 0x93>, 398 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
546 <&dmac2 0x93>, 399 <&dmac2 0x93>, <&dmac2 0x92>;
547 dma-names = "tx", "rx" 400 dma-names = "tx", "rx", "tx", "rx";
548 i2c-scl-internal-delay 401 i2c-scl-internal-delay-ns = <6>;
549 status = "disabled"; 402 status = "disabled";
550 }; 403 };
551 404
552 i2c2: i2c@e6510000 { 405 i2c2: i2c@e6510000 {
553 #address-cells = <1>; 406 #address-cells = <1>;
554 #size-cells = <0>; 407 #size-cells = <0>;
555 compatible = "renesas, 408 compatible = "renesas,i2c-r8a77965",
556 "renesas, 409 "renesas,rcar-gen3-i2c";
557 reg = <0 0xe6510000 0 410 reg = <0 0xe6510000 0 0x40>;
558 interrupts = <GIC_SPI 411 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 412 clocks = <&cpg CPG_MOD 929>;
560 power-domains = <&sysc 413 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
561 resets = <&cpg 929>; 414 resets = <&cpg 929>;
562 dmas = <&dmac1 0x95>, 415 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
563 <&dmac2 0x95>, 416 <&dmac2 0x95>, <&dmac2 0x94>;
564 dma-names = "tx", "rx" 417 dma-names = "tx", "rx", "tx", "rx";
565 i2c-scl-internal-delay 418 i2c-scl-internal-delay-ns = <6>;
566 status = "disabled"; 419 status = "disabled";
567 }; 420 };
568 421
569 i2c3: i2c@e66d0000 { 422 i2c3: i2c@e66d0000 {
570 #address-cells = <1>; 423 #address-cells = <1>;
571 #size-cells = <0>; 424 #size-cells = <0>;
572 compatible = "renesas, 425 compatible = "renesas,i2c-r8a77965",
573 "renesas, 426 "renesas,rcar-gen3-i2c";
574 reg = <0 0xe66d0000 0 427 reg = <0 0xe66d0000 0 0x40>;
575 interrupts = <GIC_SPI 428 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 429 clocks = <&cpg CPG_MOD 928>;
577 power-domains = <&sysc 430 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
578 resets = <&cpg 928>; 431 resets = <&cpg 928>;
579 dmas = <&dmac0 0x97>, 432 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
580 dma-names = "tx", "rx" 433 dma-names = "tx", "rx";
581 i2c-scl-internal-delay 434 i2c-scl-internal-delay-ns = <110>;
582 status = "disabled"; 435 status = "disabled";
583 }; 436 };
584 437
585 i2c4: i2c@e66d8000 { 438 i2c4: i2c@e66d8000 {
586 #address-cells = <1>; 439 #address-cells = <1>;
587 #size-cells = <0>; 440 #size-cells = <0>;
588 compatible = "renesas, 441 compatible = "renesas,i2c-r8a77965",
589 "renesas, 442 "renesas,rcar-gen3-i2c";
590 reg = <0 0xe66d8000 0 443 reg = <0 0xe66d8000 0 0x40>;
591 interrupts = <GIC_SPI 444 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&cpg CPG_MOD 445 clocks = <&cpg CPG_MOD 927>;
593 power-domains = <&sysc 446 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
594 resets = <&cpg 927>; 447 resets = <&cpg 927>;
595 dmas = <&dmac0 0x99>, 448 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
596 dma-names = "tx", "rx" 449 dma-names = "tx", "rx";
597 i2c-scl-internal-delay 450 i2c-scl-internal-delay-ns = <110>;
598 status = "disabled"; 451 status = "disabled";
599 }; 452 };
600 453
601 i2c5: i2c@e66e0000 { 454 i2c5: i2c@e66e0000 {
602 #address-cells = <1>; 455 #address-cells = <1>;
603 #size-cells = <0>; 456 #size-cells = <0>;
604 compatible = "renesas, 457 compatible = "renesas,i2c-r8a77965",
605 "renesas, 458 "renesas,rcar-gen3-i2c";
606 reg = <0 0xe66e0000 0 459 reg = <0 0xe66e0000 0 0x40>;
607 interrupts = <GIC_SPI 460 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&cpg CPG_MOD 461 clocks = <&cpg CPG_MOD 919>;
609 power-domains = <&sysc 462 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
610 resets = <&cpg 919>; 463 resets = <&cpg 919>;
611 dmas = <&dmac0 0x9b>, 464 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
612 dma-names = "tx", "rx" 465 dma-names = "tx", "rx";
613 i2c-scl-internal-delay 466 i2c-scl-internal-delay-ns = <110>;
614 status = "disabled"; 467 status = "disabled";
615 }; 468 };
616 469
617 i2c6: i2c@e66e8000 { 470 i2c6: i2c@e66e8000 {
618 #address-cells = <1>; 471 #address-cells = <1>;
619 #size-cells = <0>; 472 #size-cells = <0>;
620 compatible = "renesas, 473 compatible = "renesas,i2c-r8a77965",
621 "renesas, 474 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66e8000 0 475 reg = <0 0xe66e8000 0 0x40>;
623 interrupts = <GIC_SPI 476 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&cpg CPG_MOD 477 clocks = <&cpg CPG_MOD 918>;
625 power-domains = <&sysc 478 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
626 resets = <&cpg 918>; 479 resets = <&cpg 918>;
627 dmas = <&dmac0 0x9d>, 480 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
628 dma-names = "tx", "rx" 481 dma-names = "tx", "rx";
629 i2c-scl-internal-delay 482 i2c-scl-internal-delay-ns = <6>;
630 status = "disabled"; 483 status = "disabled";
631 }; 484 };
632 485
633 i2c_dvfs: i2c@e60b0000 { 486 i2c_dvfs: i2c@e60b0000 {
634 #address-cells = <1>; 487 #address-cells = <1>;
635 #size-cells = <0>; 488 #size-cells = <0>;
636 compatible = "renesas, 489 compatible = "renesas,iic-r8a77965",
637 "renesas, 490 "renesas,rcar-gen3-iic",
638 "renesas, 491 "renesas,rmobile-iic";
639 reg = <0 0xe60b0000 0 492 reg = <0 0xe60b0000 0 0x425>;
640 interrupts = <GIC_SPI 493 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&cpg CPG_MOD 494 clocks = <&cpg CPG_MOD 926>;
642 power-domains = <&sysc 495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
643 resets = <&cpg 926>; 496 resets = <&cpg 926>;
644 dmas = <&dmac0 0x11>, 497 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
645 dma-names = "tx", "rx" 498 dma-names = "tx", "rx";
646 status = "disabled"; 499 status = "disabled";
647 }; 500 };
648 501
649 hscif0: serial@e6540000 { 502 hscif0: serial@e6540000 {
650 compatible = "renesas, 503 compatible = "renesas,hscif-r8a77965",
651 "renesas, 504 "renesas,rcar-gen3-hscif",
652 "renesas, 505 "renesas,hscif";
653 reg = <0 0xe6540000 0 506 reg = <0 0xe6540000 0 0x60>;
654 interrupts = <GIC_SPI 507 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 508 clocks = <&cpg CPG_MOD 520>,
656 <&cpg CPG_COR 509 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
657 <&scif_clk>; 510 <&scif_clk>;
658 clock-names = "fck", " 511 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x31>, 512 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
660 <&dmac2 0x31>, 513 <&dmac2 0x31>, <&dmac2 0x30>;
661 dma-names = "tx", "rx" 514 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 515 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
663 resets = <&cpg 520>; 516 resets = <&cpg 520>;
664 status = "disabled"; 517 status = "disabled";
665 }; 518 };
666 519
667 hscif1: serial@e6550000 { 520 hscif1: serial@e6550000 {
668 compatible = "renesas, 521 compatible = "renesas,hscif-r8a77965",
669 "renesas, 522 "renesas,rcar-gen3-hscif",
670 "renesas, 523 "renesas,hscif";
671 reg = <0 0xe6550000 0 524 reg = <0 0xe6550000 0 0x60>;
672 interrupts = <GIC_SPI 525 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 526 clocks = <&cpg CPG_MOD 519>,
674 <&cpg CPG_COR 527 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
675 <&scif_clk>; 528 <&scif_clk>;
676 clock-names = "fck", " 529 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac1 0x33>, 530 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
678 <&dmac2 0x33>, 531 <&dmac2 0x33>, <&dmac2 0x32>;
679 dma-names = "tx", "rx" 532 dma-names = "tx", "rx", "tx", "rx";
680 power-domains = <&sysc 533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
681 resets = <&cpg 519>; 534 resets = <&cpg 519>;
682 status = "disabled"; 535 status = "disabled";
683 }; 536 };
684 537
685 hscif2: serial@e6560000 { 538 hscif2: serial@e6560000 {
686 compatible = "renesas, 539 compatible = "renesas,hscif-r8a77965",
687 "renesas, 540 "renesas,rcar-gen3-hscif",
688 "renesas, 541 "renesas,hscif";
689 reg = <0 0xe6560000 0 542 reg = <0 0xe6560000 0 0x60>;
690 interrupts = <GIC_SPI 543 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&cpg CPG_MOD 544 clocks = <&cpg CPG_MOD 518>,
692 <&cpg CPG_COR 545 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
693 <&scif_clk>; 546 <&scif_clk>;
694 clock-names = "fck", " 547 clock-names = "fck", "brg_int", "scif_clk";
695 dmas = <&dmac1 0x35>, 548 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
696 <&dmac2 0x35>, 549 <&dmac2 0x35>, <&dmac2 0x34>;
697 dma-names = "tx", "rx" 550 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc 551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
699 resets = <&cpg 518>; 552 resets = <&cpg 518>;
700 status = "disabled"; 553 status = "disabled";
701 }; 554 };
702 555
703 hscif3: serial@e66a0000 { 556 hscif3: serial@e66a0000 {
704 compatible = "renesas, 557 compatible = "renesas,hscif-r8a77965",
705 "renesas, 558 "renesas,rcar-gen3-hscif",
706 "renesas, 559 "renesas,hscif";
707 reg = <0 0xe66a0000 0 560 reg = <0 0xe66a0000 0 0x60>;
708 interrupts = <GIC_SPI 561 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 562 clocks = <&cpg CPG_MOD 517>,
710 <&cpg CPG_COR 563 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
711 <&scif_clk>; 564 <&scif_clk>;
712 clock-names = "fck", " 565 clock-names = "fck", "brg_int", "scif_clk";
713 dmas = <&dmac0 0x37>, 566 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
714 dma-names = "tx", "rx" 567 dma-names = "tx", "rx";
715 power-domains = <&sysc 568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
716 resets = <&cpg 517>; 569 resets = <&cpg 517>;
717 status = "disabled"; 570 status = "disabled";
718 }; 571 };
719 572
720 hscif4: serial@e66b0000 { 573 hscif4: serial@e66b0000 {
721 compatible = "renesas, 574 compatible = "renesas,hscif-r8a77965",
722 "renesas, 575 "renesas,rcar-gen3-hscif",
723 "renesas, 576 "renesas,hscif";
724 reg = <0 0xe66b0000 0 577 reg = <0 0xe66b0000 0 0x60>;
725 interrupts = <GIC_SPI 578 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 579 clocks = <&cpg CPG_MOD 516>,
727 <&cpg CPG_COR 580 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
728 <&scif_clk>; 581 <&scif_clk>;
729 clock-names = "fck", " 582 clock-names = "fck", "brg_int", "scif_clk";
730 dmas = <&dmac0 0x39>, 583 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
731 dma-names = "tx", "rx" 584 dma-names = "tx", "rx";
732 power-domains = <&sysc 585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
733 resets = <&cpg 516>; 586 resets = <&cpg 516>;
734 status = "disabled"; 587 status = "disabled";
735 }; 588 };
736 589
737 hsusb: usb@e6590000 { 590 hsusb: usb@e6590000 {
738 compatible = "renesas, 591 compatible = "renesas,usbhs-r8a77965",
739 "renesas, 592 "renesas,rcar-gen3-usbhs";
740 reg = <0 0xe6590000 0 !! 593 reg = <0 0xe6590000 0 0x100>;
741 interrupts = <GIC_SPI 594 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 595 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
743 dmas = <&usb_dmac0 0>, 596 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
744 <&usb_dmac1 0>, 597 <&usb_dmac1 0>, <&usb_dmac1 1>;
745 dma-names = "ch0", "ch 598 dma-names = "ch0", "ch1", "ch2", "ch3";
746 renesas,buswait = <11> 599 renesas,buswait = <11>;
747 phys = <&usb2_phy0 3>; !! 600 phys = <&usb2_phy0>;
748 phy-names = "usb"; 601 phy-names = "usb";
749 power-domains = <&sysc 602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
750 resets = <&cpg 704>, < 603 resets = <&cpg 704>, <&cpg 703>;
751 status = "disabled"; 604 status = "disabled";
752 }; 605 };
753 606
754 usb_dmac0: dma-controller@e65a 607 usb_dmac0: dma-controller@e65a0000 {
755 compatible = "renesas, 608 compatible = "renesas,r8a77965-usb-dmac",
756 "renesas, 609 "renesas,usb-dmac";
757 reg = <0 0xe65a0000 0 610 reg = <0 0xe65a0000 0 0x100>;
758 interrupts = <GIC_SPI !! 611 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
759 <GIC_SPI !! 612 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
760 interrupt-names = "ch0 613 interrupt-names = "ch0", "ch1";
761 clocks = <&cpg CPG_MOD 614 clocks = <&cpg CPG_MOD 330>;
762 power-domains = <&sysc 615 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
763 resets = <&cpg 330>; 616 resets = <&cpg 330>;
764 #dma-cells = <1>; 617 #dma-cells = <1>;
765 dma-channels = <2>; 618 dma-channels = <2>;
766 }; 619 };
767 620
768 usb_dmac1: dma-controller@e65b 621 usb_dmac1: dma-controller@e65b0000 {
769 compatible = "renesas, 622 compatible = "renesas,r8a77965-usb-dmac",
770 "renesas, 623 "renesas,usb-dmac";
771 reg = <0 0xe65b0000 0 624 reg = <0 0xe65b0000 0 0x100>;
772 interrupts = <GIC_SPI !! 625 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
773 <GIC_SPI !! 626 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
774 interrupt-names = "ch0 627 interrupt-names = "ch0", "ch1";
775 clocks = <&cpg CPG_MOD 628 clocks = <&cpg CPG_MOD 331>;
776 power-domains = <&sysc 629 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
777 resets = <&cpg 331>; 630 resets = <&cpg 331>;
778 #dma-cells = <1>; 631 #dma-cells = <1>;
779 dma-channels = <2>; 632 dma-channels = <2>;
780 }; 633 };
781 634
782 usb3_phy0: usb-phy@e65ee000 { 635 usb3_phy0: usb-phy@e65ee000 {
783 compatible = "renesas, 636 compatible = "renesas,r8a77965-usb3-phy",
784 "renesas, 637 "renesas,rcar-gen3-usb3-phy";
785 reg = <0 0xe65ee000 0 638 reg = <0 0xe65ee000 0 0x90>;
786 clocks = <&cpg CPG_MOD 639 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
787 <&usb_extal_c 640 <&usb_extal_clk>;
788 clock-names = "usb3-if 641 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
789 power-domains = <&sysc 642 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
790 resets = <&cpg 328>; 643 resets = <&cpg 328>;
791 #phy-cells = <0>; 644 #phy-cells = <0>;
792 status = "disabled"; 645 status = "disabled";
793 }; 646 };
794 647
795 arm_cc630p: crypto@e6601000 { <<
796 compatible = "arm,cryp <<
797 interrupts = <GIC_SPI <<
798 reg = <0x0 0xe6601000 <<
799 clocks = <&cpg CPG_MOD <<
800 resets = <&cpg 229>; <<
801 power-domains = <&sysc <<
802 }; <<
803 <<
804 dmac0: dma-controller@e6700000 648 dmac0: dma-controller@e6700000 {
805 compatible = "renesas, 649 compatible = "renesas,dmac-r8a77965",
806 "renesas, 650 "renesas,rcar-dmac";
807 reg = <0 0xe6700000 0 651 reg = <0 0xe6700000 0 0x10000>;
808 interrupts = <GIC_SPI !! 652 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
809 <GIC_SPI !! 653 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
810 <GIC_SPI !! 654 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
811 <GIC_SPI !! 655 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
812 <GIC_SPI !! 656 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
813 <GIC_SPI !! 657 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
814 <GIC_SPI !! 658 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
815 <GIC_SPI !! 659 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
816 <GIC_SPI !! 660 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
817 <GIC_SPI !! 661 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
818 <GIC_SPI !! 662 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
819 <GIC_SPI !! 663 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
820 <GIC_SPI !! 664 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
821 <GIC_SPI !! 665 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
822 <GIC_SPI !! 666 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
823 <GIC_SPI !! 667 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
824 <GIC_SPI !! 668 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "err 669 interrupt-names = "error",
826 "ch0", 670 "ch0", "ch1", "ch2", "ch3",
827 "ch4", 671 "ch4", "ch5", "ch6", "ch7",
828 "ch8", 672 "ch8", "ch9", "ch10", "ch11",
829 "ch12" 673 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 674 clocks = <&cpg CPG_MOD 219>;
831 clock-names = "fck"; 675 clock-names = "fck";
832 power-domains = <&sysc 676 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
833 resets = <&cpg 219>; 677 resets = <&cpg 219>;
834 #dma-cells = <1>; 678 #dma-cells = <1>;
835 dma-channels = <16>; 679 dma-channels = <16>;
836 iommus = <&ipmmu_ds0 0 680 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
837 <&ipmmu_ds0 2>, 681 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
838 <&ipmmu_ds0 4>, 682 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
839 <&ipmmu_ds0 6>, 683 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
840 <&ipmmu_ds0 8>, 684 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
841 <&ipmmu_ds0 10> 685 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
842 <&ipmmu_ds0 12> 686 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
843 <&ipmmu_ds0 14> 687 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
844 }; 688 };
845 689
846 dmac1: dma-controller@e7300000 690 dmac1: dma-controller@e7300000 {
847 compatible = "renesas, 691 compatible = "renesas,dmac-r8a77965",
848 "renesas, 692 "renesas,rcar-dmac";
849 reg = <0 0xe7300000 0 693 reg = <0 0xe7300000 0 0x10000>;
850 interrupts = <GIC_SPI !! 694 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
851 <GIC_SPI !! 695 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
852 <GIC_SPI !! 696 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
853 <GIC_SPI !! 697 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
854 <GIC_SPI !! 698 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
855 <GIC_SPI !! 699 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
856 <GIC_SPI !! 700 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
857 <GIC_SPI !! 701 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
858 <GIC_SPI !! 702 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
859 <GIC_SPI !! 703 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
860 <GIC_SPI !! 704 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
861 <GIC_SPI !! 705 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
862 <GIC_SPI !! 706 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
863 <GIC_SPI !! 707 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
864 <GIC_SPI !! 708 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
865 <GIC_SPI !! 709 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
866 <GIC_SPI !! 710 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
867 interrupt-names = "err 711 interrupt-names = "error",
868 "ch0", 712 "ch0", "ch1", "ch2", "ch3",
869 "ch4", 713 "ch4", "ch5", "ch6", "ch7",
870 "ch8", 714 "ch8", "ch9", "ch10", "ch11",
871 "ch12" 715 "ch12", "ch13", "ch14", "ch15";
872 clocks = <&cpg CPG_MOD 716 clocks = <&cpg CPG_MOD 218>;
873 clock-names = "fck"; 717 clock-names = "fck";
874 power-domains = <&sysc 718 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 resets = <&cpg 218>; 719 resets = <&cpg 218>;
876 #dma-cells = <1>; 720 #dma-cells = <1>;
877 dma-channels = <16>; 721 dma-channels = <16>;
878 iommus = <&ipmmu_ds1 0 722 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
879 <&ipmmu_ds1 2>, 723 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
880 <&ipmmu_ds1 4>, 724 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
881 <&ipmmu_ds1 6>, 725 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
882 <&ipmmu_ds1 8>, 726 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
883 <&ipmmu_ds1 10> 727 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
884 <&ipmmu_ds1 12> 728 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
885 <&ipmmu_ds1 14> 729 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
886 }; 730 };
887 731
888 dmac2: dma-controller@e7310000 732 dmac2: dma-controller@e7310000 {
889 compatible = "renesas, 733 compatible = "renesas,dmac-r8a77965",
890 "renesas, 734 "renesas,rcar-dmac";
891 reg = <0 0xe7310000 0 735 reg = <0 0xe7310000 0 0x10000>;
892 interrupts = <GIC_SPI !! 736 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
893 <GIC_SPI !! 737 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
894 <GIC_SPI !! 738 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
895 <GIC_SPI !! 739 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
896 <GIC_SPI !! 740 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
897 <GIC_SPI !! 741 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
898 <GIC_SPI !! 742 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
899 <GIC_SPI !! 743 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
900 <GIC_SPI !! 744 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
901 <GIC_SPI !! 745 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
902 <GIC_SPI !! 746 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
903 <GIC_SPI !! 747 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
904 <GIC_SPI !! 748 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
905 <GIC_SPI !! 749 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
906 <GIC_SPI !! 750 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
907 <GIC_SPI !! 751 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
908 <GIC_SPI !! 752 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
909 interrupt-names = "err 753 interrupt-names = "error",
910 "ch0", 754 "ch0", "ch1", "ch2", "ch3",
911 "ch4", 755 "ch4", "ch5", "ch6", "ch7",
912 "ch8", 756 "ch8", "ch9", "ch10", "ch11",
913 "ch12" 757 "ch12", "ch13", "ch14", "ch15";
914 clocks = <&cpg CPG_MOD 758 clocks = <&cpg CPG_MOD 217>;
915 clock-names = "fck"; 759 clock-names = "fck";
916 power-domains = <&sysc 760 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
917 resets = <&cpg 217>; 761 resets = <&cpg 217>;
918 #dma-cells = <1>; 762 #dma-cells = <1>;
919 dma-channels = <16>; 763 dma-channels = <16>;
920 iommus = <&ipmmu_ds1 1 764 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
921 <&ipmmu_ds1 18> 765 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
922 <&ipmmu_ds1 20> 766 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
923 <&ipmmu_ds1 22> 767 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
924 <&ipmmu_ds1 24> 768 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
925 <&ipmmu_ds1 26> 769 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
926 <&ipmmu_ds1 28> 770 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
927 <&ipmmu_ds1 30> 771 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
928 }; 772 };
929 773
930 ipmmu_ds0: iommu@e6740000 { !! 774 ipmmu_ds0: mmu@e6740000 {
931 compatible = "renesas, 775 compatible = "renesas,ipmmu-r8a77965";
932 reg = <0 0xe6740000 0 776 reg = <0 0xe6740000 0 0x1000>;
933 renesas,ipmmu-main = < 777 renesas,ipmmu-main = <&ipmmu_mm 0>;
934 power-domains = <&sysc 778 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 779 #iommu-cells = <1>;
936 }; 780 };
937 781
938 ipmmu_ds1: iommu@e7740000 { !! 782 ipmmu_ds1: mmu@e7740000 {
939 compatible = "renesas, 783 compatible = "renesas,ipmmu-r8a77965";
940 reg = <0 0xe7740000 0 784 reg = <0 0xe7740000 0 0x1000>;
941 renesas,ipmmu-main = < 785 renesas,ipmmu-main = <&ipmmu_mm 1>;
942 power-domains = <&sysc 786 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
943 #iommu-cells = <1>; 787 #iommu-cells = <1>;
944 }; 788 };
945 789
946 ipmmu_hc: iommu@e6570000 { !! 790 ipmmu_hc: mmu@e6570000 {
947 compatible = "renesas, 791 compatible = "renesas,ipmmu-r8a77965";
948 reg = <0 0xe6570000 0 792 reg = <0 0xe6570000 0 0x1000>;
949 renesas,ipmmu-main = < 793 renesas,ipmmu-main = <&ipmmu_mm 2>;
950 power-domains = <&sysc 794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 795 #iommu-cells = <1>;
952 }; 796 };
953 797
954 ipmmu_mm: iommu@e67b0000 { !! 798 ipmmu_ir: mmu@ff8b0000 {
>> 799 compatible = "renesas,ipmmu-r8a77965";
>> 800 reg = <0 0xff8b0000 0 0x1000>;
>> 801 renesas,ipmmu-main = <&ipmmu_mm 3>;
>> 802 power-domains = <&sysc R8A77965_PD_A3IR>;
>> 803 #iommu-cells = <1>;
>> 804 };
>> 805
>> 806 ipmmu_mm: mmu@e67b0000 {
955 compatible = "renesas, 807 compatible = "renesas,ipmmu-r8a77965";
956 reg = <0 0xe67b0000 0 808 reg = <0 0xe67b0000 0 0x1000>;
957 interrupts = <GIC_SPI 809 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 810 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
959 power-domains = <&sysc 811 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
960 #iommu-cells = <1>; 812 #iommu-cells = <1>;
961 }; 813 };
962 814
963 ipmmu_mp: iommu@ec670000 { !! 815 ipmmu_mp: mmu@ec670000 {
964 compatible = "renesas, 816 compatible = "renesas,ipmmu-r8a77965";
965 reg = <0 0xec670000 0 817 reg = <0 0xec670000 0 0x1000>;
966 renesas,ipmmu-main = < 818 renesas,ipmmu-main = <&ipmmu_mm 4>;
967 power-domains = <&sysc 819 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
968 #iommu-cells = <1>; 820 #iommu-cells = <1>;
969 }; 821 };
970 822
971 ipmmu_pv0: iommu@fd800000 { !! 823 ipmmu_pv0: mmu@fd800000 {
972 compatible = "renesas, 824 compatible = "renesas,ipmmu-r8a77965";
973 reg = <0 0xfd800000 0 825 reg = <0 0xfd800000 0 0x1000>;
974 renesas,ipmmu-main = < 826 renesas,ipmmu-main = <&ipmmu_mm 6>;
975 power-domains = <&sysc 827 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
976 #iommu-cells = <1>; 828 #iommu-cells = <1>;
977 }; 829 };
978 830
979 ipmmu_rt: iommu@ffc80000 { !! 831 ipmmu_rt: mmu@ffc80000 {
980 compatible = "renesas, 832 compatible = "renesas,ipmmu-r8a77965";
981 reg = <0 0xffc80000 0 833 reg = <0 0xffc80000 0 0x1000>;
982 renesas,ipmmu-main = < 834 renesas,ipmmu-main = <&ipmmu_mm 10>;
983 power-domains = <&sysc 835 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
984 #iommu-cells = <1>; 836 #iommu-cells = <1>;
985 }; 837 };
986 838
987 ipmmu_vc0: iommu@fe6b0000 { !! 839 ipmmu_vc0: mmu@fe6b0000 {
988 compatible = "renesas, 840 compatible = "renesas,ipmmu-r8a77965";
989 reg = <0 0xfe6b0000 0 841 reg = <0 0xfe6b0000 0 0x1000>;
990 renesas,ipmmu-main = < 842 renesas,ipmmu-main = <&ipmmu_mm 12>;
991 power-domains = <&sysc 843 power-domains = <&sysc R8A77965_PD_A3VC>;
992 #iommu-cells = <1>; 844 #iommu-cells = <1>;
993 }; 845 };
994 846
995 ipmmu_vi0: iommu@febd0000 { !! 847 ipmmu_vi0: mmu@febd0000 {
996 compatible = "renesas, 848 compatible = "renesas,ipmmu-r8a77965";
997 reg = <0 0xfebd0000 0 849 reg = <0 0xfebd0000 0 0x1000>;
998 renesas,ipmmu-main = < 850 renesas,ipmmu-main = <&ipmmu_mm 14>;
999 power-domains = <&sysc 851 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1000 #iommu-cells = <1>; 852 #iommu-cells = <1>;
1001 }; 853 };
1002 854
1003 ipmmu_vp0: iommu@fe990000 { !! 855 ipmmu_vp0: mmu@fe990000 {
1004 compatible = "renesas 856 compatible = "renesas,ipmmu-r8a77965";
1005 reg = <0 0xfe990000 0 857 reg = <0 0xfe990000 0 0x1000>;
1006 renesas,ipmmu-main = 858 renesas,ipmmu-main = <&ipmmu_mm 16>;
1007 power-domains = <&sys 859 power-domains = <&sysc R8A77965_PD_A3VP>;
1008 #iommu-cells = <1>; 860 #iommu-cells = <1>;
1009 }; 861 };
1010 862
1011 avb: ethernet@e6800000 { 863 avb: ethernet@e6800000 {
1012 compatible = "renesas 864 compatible = "renesas,etheravb-r8a77965",
1013 "renesas 865 "renesas,etheravb-rcar-gen3";
1014 reg = <0 0xe6800000 0 866 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1015 interrupts = <GIC_SPI 867 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1016 <GIC_SPI 868 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 869 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 870 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 871 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 872 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 873 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 874 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 875 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 876 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 877 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 878 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 879 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 880 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 881 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 882 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 883 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 884 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 885 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 886 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 887 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 888 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 889 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 890 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 891 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1040 interrupt-names = "ch 892 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1041 "ch 893 "ch4", "ch5", "ch6", "ch7",
1042 "ch 894 "ch8", "ch9", "ch10", "ch11",
1043 "ch 895 "ch12", "ch13", "ch14", "ch15",
1044 "ch 896 "ch16", "ch17", "ch18", "ch19",
1045 "ch 897 "ch20", "ch21", "ch22", "ch23",
1046 "ch 898 "ch24";
1047 clocks = <&cpg CPG_MO 899 clocks = <&cpg CPG_MOD 812>;
1048 clock-names = "fck"; <<
1049 power-domains = <&sys 900 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1050 resets = <&cpg 812>; 901 resets = <&cpg 812>;
1051 phy-mode = "rgmii"; 902 phy-mode = "rgmii";
1052 rx-internal-delay-ps <<
1053 tx-internal-delay-ps <<
1054 iommus = <&ipmmu_ds0 <<
1055 #address-cells = <1>; 903 #address-cells = <1>;
1056 #size-cells = <0>; 904 #size-cells = <0>;
1057 status = "disabled"; 905 status = "disabled";
1058 }; 906 };
1059 907
1060 can0: can@e6c30000 { 908 can0: can@e6c30000 {
1061 compatible = "renesas <<
1062 "renesas <<
1063 reg = <0 0xe6c30000 0 909 reg = <0 0xe6c30000 0 0x1000>;
1064 interrupts = <GIC_SPI !! 910 /* placeholder */
1065 clocks = <&cpg CPG_MO <<
1066 <&cpg CPG_CORE <<
1067 <&can_clk>; <<
1068 clock-names = "clkp1" <<
1069 assigned-clocks = <&c <<
1070 assigned-clock-rates <<
1071 power-domains = <&sys <<
1072 resets = <&cpg 916>; <<
1073 status = "disabled"; <<
1074 }; 911 };
1075 912
1076 can1: can@e6c38000 { 913 can1: can@e6c38000 {
1077 compatible = "renesas <<
1078 "renesas <<
1079 reg = <0 0xe6c38000 0 914 reg = <0 0xe6c38000 0 0x1000>;
1080 interrupts = <GIC_SPI !! 915 /* placeholder */
1081 clocks = <&cpg CPG_MO <<
1082 <&cpg CPG_CORE <<
1083 <&can_clk>; <<
1084 clock-names = "clkp1" <<
1085 assigned-clocks = <&c <<
1086 assigned-clock-rates <<
1087 power-domains = <&sys <<
1088 resets = <&cpg 915>; <<
1089 status = "disabled"; <<
1090 }; <<
1091 <<
1092 canfd: can@e66c0000 { <<
1093 compatible = "renesas <<
1094 "renesas <<
1095 reg = <0 0xe66c0000 0 <<
1096 interrupts = <GIC_SPI <<
1097 <GIC_SPI 3 <<
1098 interrupt-names = "ch <<
1099 clocks = <&cpg CPG_MO <<
1100 <&cpg CPG_CORE <<
1101 <&can_clk>; <<
1102 clock-names = "fck", <<
1103 assigned-clocks = <&c <<
1104 assigned-clock-rates <<
1105 power-domains = <&sys <<
1106 resets = <&cpg 914>; <<
1107 status = "disabled"; <<
1108 <<
1109 channel0 { <<
1110 status = "dis <<
1111 }; <<
1112 <<
1113 channel1 { <<
1114 status = "dis <<
1115 }; <<
1116 }; 916 };
1117 917
1118 pwm0: pwm@e6e30000 { 918 pwm0: pwm@e6e30000 {
1119 compatible = "renesas 919 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1120 reg = <0 0xe6e30000 0 920 reg = <0 0xe6e30000 0 8>;
1121 #pwm-cells = <2>; 921 #pwm-cells = <2>;
1122 clocks = <&cpg CPG_MO 922 clocks = <&cpg CPG_MOD 523>;
1123 resets = <&cpg 523>; 923 resets = <&cpg 523>;
1124 power-domains = <&sys 924 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1125 status = "disabled"; 925 status = "disabled";
1126 }; 926 };
1127 927
1128 pwm1: pwm@e6e31000 { 928 pwm1: pwm@e6e31000 {
1129 compatible = "renesas 929 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1130 reg = <0 0xe6e31000 0 930 reg = <0 0xe6e31000 0 8>;
1131 #pwm-cells = <2>; 931 #pwm-cells = <2>;
1132 clocks = <&cpg CPG_MO 932 clocks = <&cpg CPG_MOD 523>;
1133 resets = <&cpg 523>; 933 resets = <&cpg 523>;
1134 power-domains = <&sys 934 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1135 status = "disabled"; 935 status = "disabled";
1136 }; 936 };
1137 937
1138 pwm2: pwm@e6e32000 { 938 pwm2: pwm@e6e32000 {
1139 compatible = "renesas 939 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1140 reg = <0 0xe6e32000 0 940 reg = <0 0xe6e32000 0 8>;
1141 #pwm-cells = <2>; 941 #pwm-cells = <2>;
1142 clocks = <&cpg CPG_MO 942 clocks = <&cpg CPG_MOD 523>;
1143 resets = <&cpg 523>; 943 resets = <&cpg 523>;
1144 power-domains = <&sys 944 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1145 status = "disabled"; 945 status = "disabled";
1146 }; 946 };
1147 947
1148 pwm3: pwm@e6e33000 { 948 pwm3: pwm@e6e33000 {
1149 compatible = "renesas 949 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1150 reg = <0 0xe6e33000 0 950 reg = <0 0xe6e33000 0 8>;
1151 #pwm-cells = <2>; 951 #pwm-cells = <2>;
1152 clocks = <&cpg CPG_MO 952 clocks = <&cpg CPG_MOD 523>;
1153 resets = <&cpg 523>; 953 resets = <&cpg 523>;
1154 power-domains = <&sys 954 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1155 status = "disabled"; 955 status = "disabled";
1156 }; 956 };
1157 957
1158 pwm4: pwm@e6e34000 { 958 pwm4: pwm@e6e34000 {
1159 compatible = "renesas 959 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1160 reg = <0 0xe6e34000 0 960 reg = <0 0xe6e34000 0 8>;
1161 #pwm-cells = <2>; 961 #pwm-cells = <2>;
1162 clocks = <&cpg CPG_MO 962 clocks = <&cpg CPG_MOD 523>;
1163 resets = <&cpg 523>; 963 resets = <&cpg 523>;
1164 power-domains = <&sys 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1165 status = "disabled"; 965 status = "disabled";
1166 }; 966 };
1167 967
1168 pwm5: pwm@e6e35000 { 968 pwm5: pwm@e6e35000 {
1169 compatible = "renesas 969 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1170 reg = <0 0xe6e35000 0 970 reg = <0 0xe6e35000 0 8>;
1171 #pwm-cells = <2>; 971 #pwm-cells = <2>;
1172 clocks = <&cpg CPG_MO 972 clocks = <&cpg CPG_MOD 523>;
1173 resets = <&cpg 523>; 973 resets = <&cpg 523>;
1174 power-domains = <&sys 974 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1175 status = "disabled"; 975 status = "disabled";
1176 }; 976 };
1177 977
1178 pwm6: pwm@e6e36000 { 978 pwm6: pwm@e6e36000 {
1179 compatible = "renesas 979 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1180 reg = <0 0xe6e36000 0 980 reg = <0 0xe6e36000 0 8>;
1181 #pwm-cells = <2>; 981 #pwm-cells = <2>;
1182 clocks = <&cpg CPG_MO 982 clocks = <&cpg CPG_MOD 523>;
1183 resets = <&cpg 523>; 983 resets = <&cpg 523>;
1184 power-domains = <&sys 984 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1185 status = "disabled"; 985 status = "disabled";
1186 }; 986 };
1187 987
1188 scif0: serial@e6e60000 { 988 scif0: serial@e6e60000 {
1189 compatible = "renesas 989 compatible = "renesas,scif-r8a77965",
1190 "renesas 990 "renesas,rcar-gen3-scif", "renesas,scif";
1191 reg = <0 0xe6e60000 0 991 reg = <0 0xe6e60000 0 64>;
1192 interrupts = <GIC_SPI 992 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MO 993 clocks = <&cpg CPG_MOD 207>,
1194 <&cpg CPG_CO 994 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1195 <&scif_clk>; 995 <&scif_clk>;
1196 clock-names = "fck", 996 clock-names = "fck", "brg_int", "scif_clk";
1197 dmas = <&dmac1 0x51>, 997 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1198 <&dmac2 0x51>, 998 <&dmac2 0x51>, <&dmac2 0x50>;
1199 dma-names = "tx", "rx 999 dma-names = "tx", "rx", "tx", "rx";
1200 power-domains = <&sys 1000 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1201 resets = <&cpg 207>; 1001 resets = <&cpg 207>;
1202 status = "disabled"; 1002 status = "disabled";
1203 }; 1003 };
1204 1004
1205 scif1: serial@e6e68000 { 1005 scif1: serial@e6e68000 {
1206 compatible = "renesas 1006 compatible = "renesas,scif-r8a77965",
1207 "renesas 1007 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6e68000 0 1008 reg = <0 0xe6e68000 0 64>;
1209 interrupts = <GIC_SPI 1009 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1010 clocks = <&cpg CPG_MOD 206>,
1211 <&cpg CPG_CO 1011 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1212 <&scif_clk>; 1012 <&scif_clk>;
1213 clock-names = "fck", 1013 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac1 0x53>, 1014 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1215 <&dmac2 0x53>, 1015 <&dmac2 0x53>, <&dmac2 0x52>;
1216 dma-names = "tx", "rx 1016 dma-names = "tx", "rx", "tx", "rx";
1217 power-domains = <&sys 1017 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1218 resets = <&cpg 206>; 1018 resets = <&cpg 206>;
1219 status = "disabled"; 1019 status = "disabled";
1220 }; 1020 };
1221 1021
1222 scif2: serial@e6e88000 { 1022 scif2: serial@e6e88000 {
1223 compatible = "renesas 1023 compatible = "renesas,scif-r8a77965",
1224 "renesas 1024 "renesas,rcar-gen3-scif", "renesas,scif";
1225 reg = <0 0xe6e88000 0 1025 reg = <0 0xe6e88000 0 64>;
1226 interrupts = <GIC_SPI 1026 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MO 1027 clocks = <&cpg CPG_MOD 310>,
1228 <&cpg CPG_CO 1028 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1229 <&scif_clk>; 1029 <&scif_clk>;
1230 clock-names = "fck", 1030 clock-names = "fck", "brg_int", "scif_clk";
1231 dmas = <&dmac1 0x13>, 1031 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1232 <&dmac2 0x13>, 1032 <&dmac2 0x13>, <&dmac2 0x12>;
1233 dma-names = "tx", "rx 1033 dma-names = "tx", "rx", "tx", "rx";
1234 power-domains = <&sys 1034 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1235 resets = <&cpg 310>; 1035 resets = <&cpg 310>;
1236 status = "disabled"; 1036 status = "disabled";
1237 }; 1037 };
1238 1038
1239 scif3: serial@e6c50000 { 1039 scif3: serial@e6c50000 {
1240 compatible = "renesas 1040 compatible = "renesas,scif-r8a77965",
1241 "renesas 1041 "renesas,rcar-gen3-scif", "renesas,scif";
1242 reg = <0 0xe6c50000 0 1042 reg = <0 0xe6c50000 0 64>;
1243 interrupts = <GIC_SPI 1043 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1244 clocks = <&cpg CPG_MO 1044 clocks = <&cpg CPG_MOD 204>,
1245 <&cpg CPG_CO 1045 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1246 <&scif_clk>; 1046 <&scif_clk>;
1247 clock-names = "fck", 1047 clock-names = "fck", "brg_int", "scif_clk";
1248 dmas = <&dmac0 0x57>, 1048 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1249 dma-names = "tx", "rx 1049 dma-names = "tx", "rx";
1250 power-domains = <&sys 1050 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1251 resets = <&cpg 204>; 1051 resets = <&cpg 204>;
1252 status = "disabled"; 1052 status = "disabled";
1253 }; 1053 };
1254 1054
1255 scif4: serial@e6c40000 { 1055 scif4: serial@e6c40000 {
1256 compatible = "renesas 1056 compatible = "renesas,scif-r8a77965",
1257 "renesas 1057 "renesas,rcar-gen3-scif", "renesas,scif";
1258 reg = <0 0xe6c40000 0 1058 reg = <0 0xe6c40000 0 64>;
1259 interrupts = <GIC_SPI 1059 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1260 clocks = <&cpg CPG_MO 1060 clocks = <&cpg CPG_MOD 203>,
1261 <&cpg CPG_CO 1061 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1262 <&scif_clk>; 1062 <&scif_clk>;
1263 clock-names = "fck", 1063 clock-names = "fck", "brg_int", "scif_clk";
1264 dmas = <&dmac0 0x59>, 1064 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1265 dma-names = "tx", "rx 1065 dma-names = "tx", "rx";
1266 power-domains = <&sys 1066 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1267 resets = <&cpg 203>; 1067 resets = <&cpg 203>;
1268 status = "disabled"; 1068 status = "disabled";
1269 }; 1069 };
1270 1070
1271 scif5: serial@e6f30000 { 1071 scif5: serial@e6f30000 {
1272 compatible = "renesas 1072 compatible = "renesas,scif-r8a77965",
1273 "renesas 1073 "renesas,rcar-gen3-scif", "renesas,scif";
1274 reg = <0 0xe6f30000 0 1074 reg = <0 0xe6f30000 0 64>;
1275 interrupts = <GIC_SPI 1075 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1276 clocks = <&cpg CPG_MO 1076 clocks = <&cpg CPG_MOD 202>,
1277 <&cpg CPG_CO 1077 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1278 <&scif_clk>; 1078 <&scif_clk>;
1279 clock-names = "fck", 1079 clock-names = "fck", "brg_int", "scif_clk";
1280 dmas = <&dmac1 0x5b>, 1080 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1281 <&dmac2 0x5b>, 1081 <&dmac2 0x5b>, <&dmac2 0x5a>;
1282 dma-names = "tx", "rx 1082 dma-names = "tx", "rx", "tx", "rx";
1283 power-domains = <&sys 1083 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1284 resets = <&cpg 202>; 1084 resets = <&cpg 202>;
1285 status = "disabled"; 1085 status = "disabled";
1286 }; 1086 };
1287 1087
1288 tpu: pwm@e6e80000 { <<
1289 compatible = "renesas <<
1290 reg = <0 0xe6e80000 0 <<
1291 interrupts = <GIC_SPI <<
1292 clocks = <&cpg CPG_MO <<
1293 power-domains = <&sys <<
1294 resets = <&cpg 304>; <<
1295 #pwm-cells = <3>; <<
1296 status = "disabled"; <<
1297 }; <<
1298 <<
1299 msiof0: spi@e6e90000 { 1088 msiof0: spi@e6e90000 {
1300 compatible = "renesas 1089 compatible = "renesas,msiof-r8a77965",
1301 "renesas 1090 "renesas,rcar-gen3-msiof";
1302 reg = <0 0xe6e90000 0 1091 reg = <0 0xe6e90000 0 0x0064>;
1303 interrupts = <GIC_SPI 1092 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1304 clocks = <&cpg CPG_MO 1093 clocks = <&cpg CPG_MOD 211>;
1305 dmas = <&dmac1 0x41>, 1094 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1306 <&dmac2 0x41>, 1095 <&dmac2 0x41>, <&dmac2 0x40>;
1307 dma-names = "tx", "rx 1096 dma-names = "tx", "rx", "tx", "rx";
1308 power-domains = <&sys 1097 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1309 resets = <&cpg 211>; 1098 resets = <&cpg 211>;
1310 #address-cells = <1>; 1099 #address-cells = <1>;
1311 #size-cells = <0>; 1100 #size-cells = <0>;
1312 status = "disabled"; 1101 status = "disabled";
1313 }; 1102 };
1314 1103
1315 msiof1: spi@e6ea0000 { 1104 msiof1: spi@e6ea0000 {
1316 compatible = "renesas 1105 compatible = "renesas,msiof-r8a77965",
1317 "renesas 1106 "renesas,rcar-gen3-msiof";
1318 reg = <0 0xe6ea0000 0 1107 reg = <0 0xe6ea0000 0 0x0064>;
1319 interrupts = <GIC_SPI 1108 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MO 1109 clocks = <&cpg CPG_MOD 210>;
1321 dmas = <&dmac1 0x43>, 1110 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1322 <&dmac2 0x43>, 1111 <&dmac2 0x43>, <&dmac2 0x42>;
1323 dma-names = "tx", "rx 1112 dma-names = "tx", "rx", "tx", "rx";
1324 power-domains = <&sys 1113 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1325 resets = <&cpg 210>; 1114 resets = <&cpg 210>;
1326 #address-cells = <1>; 1115 #address-cells = <1>;
1327 #size-cells = <0>; 1116 #size-cells = <0>;
1328 status = "disabled"; 1117 status = "disabled";
1329 }; 1118 };
1330 1119
1331 msiof2: spi@e6c00000 { 1120 msiof2: spi@e6c00000 {
1332 compatible = "renesas 1121 compatible = "renesas,msiof-r8a77965",
1333 "renesas 1122 "renesas,rcar-gen3-msiof";
1334 reg = <0 0xe6c00000 0 1123 reg = <0 0xe6c00000 0 0x0064>;
1335 interrupts = <GIC_SPI 1124 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MO 1125 clocks = <&cpg CPG_MOD 209>;
1337 dmas = <&dmac0 0x45>, 1126 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1338 dma-names = "tx", "rx 1127 dma-names = "tx", "rx";
1339 power-domains = <&sys 1128 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1340 resets = <&cpg 209>; 1129 resets = <&cpg 209>;
1341 #address-cells = <1>; 1130 #address-cells = <1>;
1342 #size-cells = <0>; 1131 #size-cells = <0>;
1343 status = "disabled"; 1132 status = "disabled";
1344 }; 1133 };
1345 1134
1346 msiof3: spi@e6c10000 { 1135 msiof3: spi@e6c10000 {
1347 compatible = "renesas 1136 compatible = "renesas,msiof-r8a77965",
1348 "renesas 1137 "renesas,rcar-gen3-msiof";
1349 reg = <0 0xe6c10000 0 1138 reg = <0 0xe6c10000 0 0x0064>;
1350 interrupts = <GIC_SPI 1139 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1351 clocks = <&cpg CPG_MO 1140 clocks = <&cpg CPG_MOD 208>;
1352 dmas = <&dmac0 0x47>, 1141 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1353 dma-names = "tx", "rx 1142 dma-names = "tx", "rx";
1354 power-domains = <&sys 1143 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1355 resets = <&cpg 208>; 1144 resets = <&cpg 208>;
1356 #address-cells = <1>; 1145 #address-cells = <1>;
1357 #size-cells = <0>; 1146 #size-cells = <0>;
1358 status = "disabled"; 1147 status = "disabled";
1359 }; 1148 };
1360 1149
1361 vin0: video@e6ef0000 { 1150 vin0: video@e6ef0000 {
1362 compatible = "renesas 1151 compatible = "renesas,vin-r8a77965";
1363 reg = <0 0xe6ef0000 0 1152 reg = <0 0xe6ef0000 0 0x1000>;
1364 interrupts = <GIC_SPI 1153 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MO 1154 clocks = <&cpg CPG_MOD 811>;
1366 power-domains = <&sys 1155 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1367 resets = <&cpg 811>; 1156 resets = <&cpg 811>;
1368 renesas,id = <0>; 1157 renesas,id = <0>;
1369 status = "disabled"; 1158 status = "disabled";
1370 1159
1371 ports { 1160 ports {
1372 #address-cell 1161 #address-cells = <1>;
1373 #size-cells = 1162 #size-cells = <0>;
1374 1163
1375 port@1 { 1164 port@1 {
1376 #addr 1165 #address-cells = <1>;
1377 #size 1166 #size-cells = <0>;
1378 1167
1379 reg = 1168 reg = <1>;
1380 1169
1381 vin0c 1170 vin0csi20: endpoint@0 {
1382 1171 reg = <0>;
1383 1172 remote-endpoint = <&csi20vin0>;
1384 }; 1173 };
1385 vin0c 1174 vin0csi40: endpoint@2 {
1386 1175 reg = <2>;
1387 1176 remote-endpoint = <&csi40vin0>;
1388 }; 1177 };
1389 }; 1178 };
1390 }; 1179 };
1391 }; 1180 };
1392 1181
1393 vin1: video@e6ef1000 { 1182 vin1: video@e6ef1000 {
1394 compatible = "renesas 1183 compatible = "renesas,vin-r8a77965";
1395 reg = <0 0xe6ef1000 0 1184 reg = <0 0xe6ef1000 0 0x1000>;
1396 interrupts = <GIC_SPI 1185 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MO 1186 clocks = <&cpg CPG_MOD 810>;
1398 power-domains = <&sys 1187 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1399 resets = <&cpg 810>; 1188 resets = <&cpg 810>;
1400 renesas,id = <1>; 1189 renesas,id = <1>;
1401 status = "disabled"; 1190 status = "disabled";
1402 1191
1403 ports { 1192 ports {
1404 #address-cell 1193 #address-cells = <1>;
1405 #size-cells = 1194 #size-cells = <0>;
1406 1195
1407 port@1 { 1196 port@1 {
1408 #addr 1197 #address-cells = <1>;
1409 #size 1198 #size-cells = <0>;
1410 1199
1411 reg = 1200 reg = <1>;
1412 1201
1413 vin1c 1202 vin1csi20: endpoint@0 {
1414 1203 reg = <0>;
1415 1204 remote-endpoint = <&csi20vin1>;
1416 }; 1205 };
1417 vin1c 1206 vin1csi40: endpoint@2 {
1418 1207 reg = <2>;
1419 1208 remote-endpoint = <&csi40vin1>;
1420 }; 1209 };
1421 }; 1210 };
1422 }; 1211 };
1423 }; 1212 };
1424 1213
1425 vin2: video@e6ef2000 { 1214 vin2: video@e6ef2000 {
1426 compatible = "renesas 1215 compatible = "renesas,vin-r8a77965";
1427 reg = <0 0xe6ef2000 0 1216 reg = <0 0xe6ef2000 0 0x1000>;
1428 interrupts = <GIC_SPI 1217 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MO 1218 clocks = <&cpg CPG_MOD 809>;
1430 power-domains = <&sys 1219 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1431 resets = <&cpg 809>; 1220 resets = <&cpg 809>;
1432 renesas,id = <2>; 1221 renesas,id = <2>;
1433 status = "disabled"; 1222 status = "disabled";
1434 1223
1435 ports { 1224 ports {
1436 #address-cell 1225 #address-cells = <1>;
1437 #size-cells = 1226 #size-cells = <0>;
1438 1227
1439 port@1 { 1228 port@1 {
1440 #addr 1229 #address-cells = <1>;
1441 #size 1230 #size-cells = <0>;
1442 1231
1443 reg = 1232 reg = <1>;
1444 1233
1445 vin2c 1234 vin2csi20: endpoint@0 {
1446 1235 reg = <0>;
1447 1236 remote-endpoint = <&csi20vin2>;
1448 }; 1237 };
1449 vin2c 1238 vin2csi40: endpoint@2 {
1450 1239 reg = <2>;
1451 1240 remote-endpoint = <&csi40vin2>;
1452 }; 1241 };
1453 }; 1242 };
1454 }; 1243 };
1455 }; 1244 };
1456 1245
1457 vin3: video@e6ef3000 { 1246 vin3: video@e6ef3000 {
1458 compatible = "renesas 1247 compatible = "renesas,vin-r8a77965";
1459 reg = <0 0xe6ef3000 0 1248 reg = <0 0xe6ef3000 0 0x1000>;
1460 interrupts = <GIC_SPI 1249 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MO 1250 clocks = <&cpg CPG_MOD 808>;
1462 power-domains = <&sys 1251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1463 resets = <&cpg 808>; 1252 resets = <&cpg 808>;
1464 renesas,id = <3>; 1253 renesas,id = <3>;
1465 status = "disabled"; 1254 status = "disabled";
1466 1255
1467 ports { 1256 ports {
1468 #address-cell 1257 #address-cells = <1>;
1469 #size-cells = 1258 #size-cells = <0>;
1470 1259
1471 port@1 { 1260 port@1 {
1472 #addr 1261 #address-cells = <1>;
1473 #size 1262 #size-cells = <0>;
1474 1263
1475 reg = 1264 reg = <1>;
1476 1265
1477 vin3c 1266 vin3csi20: endpoint@0 {
1478 1267 reg = <0>;
1479 1268 remote-endpoint = <&csi20vin3>;
1480 }; 1269 };
1481 vin3c 1270 vin3csi40: endpoint@2 {
1482 1271 reg = <2>;
1483 1272 remote-endpoint = <&csi40vin3>;
1484 }; 1273 };
1485 }; 1274 };
1486 }; 1275 };
1487 }; 1276 };
1488 1277
1489 vin4: video@e6ef4000 { 1278 vin4: video@e6ef4000 {
1490 compatible = "renesas 1279 compatible = "renesas,vin-r8a77965";
1491 reg = <0 0xe6ef4000 0 1280 reg = <0 0xe6ef4000 0 0x1000>;
1492 interrupts = <GIC_SPI 1281 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MO 1282 clocks = <&cpg CPG_MOD 807>;
1494 power-domains = <&sys 1283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1495 resets = <&cpg 807>; 1284 resets = <&cpg 807>;
1496 renesas,id = <4>; 1285 renesas,id = <4>;
1497 status = "disabled"; 1286 status = "disabled";
1498 1287
1499 ports { 1288 ports {
1500 #address-cell 1289 #address-cells = <1>;
1501 #size-cells = 1290 #size-cells = <0>;
1502 1291
1503 port@1 { 1292 port@1 {
1504 #addr 1293 #address-cells = <1>;
1505 #size 1294 #size-cells = <0>;
1506 1295
1507 reg = 1296 reg = <1>;
1508 1297
1509 vin4c 1298 vin4csi20: endpoint@0 {
1510 1299 reg = <0>;
1511 1300 remote-endpoint = <&csi20vin4>;
1512 }; 1301 };
1513 vin4c 1302 vin4csi40: endpoint@2 {
1514 1303 reg = <2>;
1515 1304 remote-endpoint = <&csi40vin4>;
1516 }; 1305 };
1517 }; 1306 };
1518 }; 1307 };
1519 }; 1308 };
1520 1309
1521 vin5: video@e6ef5000 { 1310 vin5: video@e6ef5000 {
1522 compatible = "renesas 1311 compatible = "renesas,vin-r8a77965";
1523 reg = <0 0xe6ef5000 0 1312 reg = <0 0xe6ef5000 0 0x1000>;
1524 interrupts = <GIC_SPI 1313 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MO 1314 clocks = <&cpg CPG_MOD 806>;
1526 power-domains = <&sys 1315 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1527 resets = <&cpg 806>; 1316 resets = <&cpg 806>;
1528 renesas,id = <5>; 1317 renesas,id = <5>;
1529 status = "disabled"; 1318 status = "disabled";
1530 1319
1531 ports { 1320 ports {
1532 #address-cell 1321 #address-cells = <1>;
1533 #size-cells = 1322 #size-cells = <0>;
1534 1323
1535 port@1 { 1324 port@1 {
1536 #addr 1325 #address-cells = <1>;
1537 #size 1326 #size-cells = <0>;
1538 1327
1539 reg = 1328 reg = <1>;
1540 1329
1541 vin5c 1330 vin5csi20: endpoint@0 {
1542 1331 reg = <0>;
1543 1332 remote-endpoint = <&csi20vin5>;
1544 }; 1333 };
1545 vin5c 1334 vin5csi40: endpoint@2 {
1546 1335 reg = <2>;
1547 1336 remote-endpoint = <&csi40vin5>;
1548 }; 1337 };
1549 }; 1338 };
1550 }; 1339 };
1551 }; 1340 };
1552 1341
1553 vin6: video@e6ef6000 { 1342 vin6: video@e6ef6000 {
1554 compatible = "renesas 1343 compatible = "renesas,vin-r8a77965";
1555 reg = <0 0xe6ef6000 0 1344 reg = <0 0xe6ef6000 0 0x1000>;
1556 interrupts = <GIC_SPI 1345 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1557 clocks = <&cpg CPG_MO 1346 clocks = <&cpg CPG_MOD 805>;
1558 power-domains = <&sys 1347 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1559 resets = <&cpg 805>; 1348 resets = <&cpg 805>;
1560 renesas,id = <6>; 1349 renesas,id = <6>;
1561 status = "disabled"; 1350 status = "disabled";
1562 1351
1563 ports { 1352 ports {
1564 #address-cell 1353 #address-cells = <1>;
1565 #size-cells = 1354 #size-cells = <0>;
1566 1355
1567 port@1 { 1356 port@1 {
1568 #addr 1357 #address-cells = <1>;
1569 #size 1358 #size-cells = <0>;
1570 1359
1571 reg = 1360 reg = <1>;
1572 1361
1573 vin6c 1362 vin6csi20: endpoint@0 {
1574 1363 reg = <0>;
1575 1364 remote-endpoint = <&csi20vin6>;
1576 }; 1365 };
1577 vin6c 1366 vin6csi40: endpoint@2 {
1578 1367 reg = <2>;
1579 1368 remote-endpoint = <&csi40vin6>;
1580 }; 1369 };
1581 }; 1370 };
1582 }; 1371 };
1583 }; 1372 };
1584 1373
1585 vin7: video@e6ef7000 { 1374 vin7: video@e6ef7000 {
1586 compatible = "renesas 1375 compatible = "renesas,vin-r8a77965";
1587 reg = <0 0xe6ef7000 0 1376 reg = <0 0xe6ef7000 0 0x1000>;
1588 interrupts = <GIC_SPI 1377 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1589 clocks = <&cpg CPG_MO 1378 clocks = <&cpg CPG_MOD 804>;
1590 power-domains = <&sys 1379 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1591 resets = <&cpg 804>; 1380 resets = <&cpg 804>;
1592 renesas,id = <7>; 1381 renesas,id = <7>;
1593 status = "disabled"; 1382 status = "disabled";
1594 1383
1595 ports { 1384 ports {
1596 #address-cell 1385 #address-cells = <1>;
1597 #size-cells = 1386 #size-cells = <0>;
1598 1387
1599 port@1 { 1388 port@1 {
1600 #addr 1389 #address-cells = <1>;
1601 #size 1390 #size-cells = <0>;
1602 1391
1603 reg = 1392 reg = <1>;
1604 1393
1605 vin7c 1394 vin7csi20: endpoint@0 {
1606 1395 reg = <0>;
1607 1396 remote-endpoint = <&csi20vin7>;
1608 }; 1397 };
1609 vin7c 1398 vin7csi40: endpoint@2 {
1610 1399 reg = <2>;
1611 1400 remote-endpoint = <&csi40vin7>;
1612 }; 1401 };
1613 }; 1402 };
1614 }; 1403 };
1615 }; 1404 };
1616 1405
1617 drif00: rif@e6f40000 { <<
1618 compatible = "renesas <<
1619 "renesas <<
1620 reg = <0 0xe6f40000 0 <<
1621 interrupts = <GIC_SPI <<
1622 clocks = <&cpg CPG_MO <<
1623 clock-names = "fck"; <<
1624 dmas = <&dmac1 0x20>, <<
1625 dma-names = "rx", "rx <<
1626 power-domains = <&sys <<
1627 resets = <&cpg 515>; <<
1628 renesas,bonding = <&d <<
1629 status = "disabled"; <<
1630 }; <<
1631 <<
1632 drif01: rif@e6f50000 { <<
1633 compatible = "renesas <<
1634 "renesas <<
1635 reg = <0 0xe6f50000 0 <<
1636 interrupts = <GIC_SPI <<
1637 clocks = <&cpg CPG_MO <<
1638 clock-names = "fck"; <<
1639 dmas = <&dmac1 0x22>, <<
1640 dma-names = "rx", "rx <<
1641 power-domains = <&sys <<
1642 resets = <&cpg 514>; <<
1643 renesas,bonding = <&d <<
1644 status = "disabled"; <<
1645 }; <<
1646 <<
1647 drif10: rif@e6f60000 { <<
1648 compatible = "renesas <<
1649 "renesas <<
1650 reg = <0 0xe6f60000 0 <<
1651 interrupts = <GIC_SPI <<
1652 clocks = <&cpg CPG_MO <<
1653 clock-names = "fck"; <<
1654 dmas = <&dmac1 0x24>, <<
1655 dma-names = "rx", "rx <<
1656 power-domains = <&sys <<
1657 resets = <&cpg 513>; <<
1658 renesas,bonding = <&d <<
1659 status = "disabled"; <<
1660 }; <<
1661 <<
1662 drif11: rif@e6f70000 { <<
1663 compatible = "renesas <<
1664 "renesas <<
1665 reg = <0 0xe6f70000 0 <<
1666 interrupts = <GIC_SPI <<
1667 clocks = <&cpg CPG_MO <<
1668 clock-names = "fck"; <<
1669 dmas = <&dmac1 0x26>, <<
1670 dma-names = "rx", "rx <<
1671 power-domains = <&sys <<
1672 resets = <&cpg 512>; <<
1673 renesas,bonding = <&d <<
1674 status = "disabled"; <<
1675 }; <<
1676 <<
1677 drif20: rif@e6f80000 { <<
1678 compatible = "renesas <<
1679 "renesas <<
1680 reg = <0 0xe6f80000 0 <<
1681 interrupts = <GIC_SPI <<
1682 clocks = <&cpg CPG_MO <<
1683 clock-names = "fck"; <<
1684 dmas = <&dmac1 0x28>, <<
1685 dma-names = "rx", "rx <<
1686 power-domains = <&sys <<
1687 resets = <&cpg 511>; <<
1688 renesas,bonding = <&d <<
1689 status = "disabled"; <<
1690 }; <<
1691 <<
1692 drif21: rif@e6f90000 { <<
1693 compatible = "renesas <<
1694 "renesas <<
1695 reg = <0 0xe6f90000 0 <<
1696 interrupts = <GIC_SPI <<
1697 clocks = <&cpg CPG_MO <<
1698 clock-names = "fck"; <<
1699 dmas = <&dmac1 0x2a>, <<
1700 dma-names = "rx", "rx <<
1701 power-domains = <&sys <<
1702 resets = <&cpg 510>; <<
1703 renesas,bonding = <&d <<
1704 status = "disabled"; <<
1705 }; <<
1706 <<
1707 drif30: rif@e6fa0000 { <<
1708 compatible = "renesas <<
1709 "renesas <<
1710 reg = <0 0xe6fa0000 0 <<
1711 interrupts = <GIC_SPI <<
1712 clocks = <&cpg CPG_MO <<
1713 clock-names = "fck"; <<
1714 dmas = <&dmac1 0x2c>, <<
1715 dma-names = "rx", "rx <<
1716 power-domains = <&sys <<
1717 resets = <&cpg 509>; <<
1718 renesas,bonding = <&d <<
1719 status = "disabled"; <<
1720 }; <<
1721 <<
1722 drif31: rif@e6fb0000 { <<
1723 compatible = "renesas <<
1724 "renesas <<
1725 reg = <0 0xe6fb0000 0 <<
1726 interrupts = <GIC_SPI <<
1727 clocks = <&cpg CPG_MO <<
1728 clock-names = "fck"; <<
1729 dmas = <&dmac1 0x2e>, <<
1730 dma-names = "rx", "rx <<
1731 power-domains = <&sys <<
1732 resets = <&cpg 508>; <<
1733 renesas,bonding = <&d <<
1734 status = "disabled"; <<
1735 }; <<
1736 <<
1737 rcar_sound: sound@ec500000 { 1406 rcar_sound: sound@ec500000 {
1738 /* 1407 /*
1739 * #sound-dai-cells i !! 1408 * #sound-dai-cells is required
1740 * 1409 *
1741 * Single DAI : #soun 1410 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1742 * Multi DAI : #soun 1411 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1743 */ 1412 */
1744 /* 1413 /*
1745 * #clock-cells is re 1414 * #clock-cells is required for audio_clkout0/1/2/3
1746 * 1415 *
1747 * clkout : #cl 1416 * clkout : #clock-cells = <0>; <&rcar_sound>;
1748 * clkout0/1/2/3: #cl 1417 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1749 */ 1418 */
1750 compatible = "renesas !! 1419 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1751 reg = <0 0xec500000 0 !! 1420 reg = <0 0xec500000 0 0x1000>, /* SCU */
1752 <0 0xec5a0000 0 !! 1421 <0 0xec5a0000 0 0x100>, /* ADG */
1753 <0 0xec540000 0 !! 1422 <0 0xec540000 0 0x1000>, /* SSIU */
1754 <0 0xec541000 0 !! 1423 <0 0xec541000 0 0x280>, /* SSI */
1755 <0 0xec760000 0 !! 1424 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1756 reg-names = "scu", "a 1425 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1757 1426
1758 clocks = <&cpg CPG_MO 1427 clocks = <&cpg CPG_MOD 1005>,
1759 <&cpg CPG_MO 1428 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1760 <&cpg CPG_MO 1429 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1761 <&cpg CPG_MO 1430 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1762 <&cpg CPG_MO 1431 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1763 <&cpg CPG_MO 1432 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1764 <&cpg CPG_MO 1433 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1765 <&cpg CPG_MO 1434 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1766 <&cpg CPG_MO 1435 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1767 <&cpg CPG_MO 1436 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1768 <&cpg CPG_MO 1437 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1769 <&cpg CPG_MO 1438 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1770 <&cpg CPG_MO 1439 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1771 <&cpg CPG_MO 1440 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1772 <&audio_clk_ 1441 <&audio_clk_a>, <&audio_clk_b>,
1773 <&audio_clk_ 1442 <&audio_clk_c>,
1774 <&cpg CPG_MO !! 1443 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1775 clock-names = "ssi-al 1444 clock-names = "ssi-all",
1776 "ssi.9" 1445 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1777 "ssi.5" 1446 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1778 "ssi.1" 1447 "ssi.1", "ssi.0",
1779 "src.9" 1448 "src.9", "src.8", "src.7", "src.6",
1780 "src.5" 1449 "src.5", "src.4", "src.3", "src.2",
1781 "src.1" 1450 "src.1", "src.0",
1782 "mix.1" 1451 "mix.1", "mix.0",
1783 "ctu.1" 1452 "ctu.1", "ctu.0",
1784 "dvc.0" 1453 "dvc.0", "dvc.1",
1785 "clk_a" 1454 "clk_a", "clk_b", "clk_c", "clk_i";
1786 power-domains = <&sys 1455 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1787 resets = <&cpg 1005>, 1456 resets = <&cpg 1005>,
1788 <&cpg 1006>, 1457 <&cpg 1006>, <&cpg 1007>,
1789 <&cpg 1008>, 1458 <&cpg 1008>, <&cpg 1009>,
1790 <&cpg 1010>, 1459 <&cpg 1010>, <&cpg 1011>,
1791 <&cpg 1012>, 1460 <&cpg 1012>, <&cpg 1013>,
1792 <&cpg 1014>, 1461 <&cpg 1014>, <&cpg 1015>;
1793 reset-names = "ssi-al 1462 reset-names = "ssi-all",
1794 "ssi.9" 1463 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1795 "ssi.5" 1464 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1796 "ssi.1" 1465 "ssi.1", "ssi.0";
1797 status = "disabled"; 1466 status = "disabled";
1798 1467
1799 rcar_sound,dvc { 1468 rcar_sound,dvc {
1800 dvc0: dvc-0 { 1469 dvc0: dvc-0 {
1801 dmas 1470 dmas = <&audma1 0xbc>;
1802 dma-n 1471 dma-names = "tx";
1803 }; 1472 };
1804 dvc1: dvc-1 { 1473 dvc1: dvc-1 {
1805 dmas 1474 dmas = <&audma1 0xbe>;
1806 dma-n 1475 dma-names = "tx";
1807 }; 1476 };
1808 }; 1477 };
1809 1478
1810 rcar_sound,mix { 1479 rcar_sound,mix {
1811 mix0: mix-0 { 1480 mix0: mix-0 { };
1812 mix1: mix-1 { 1481 mix1: mix-1 { };
1813 }; 1482 };
1814 1483
1815 rcar_sound,ctu { 1484 rcar_sound,ctu {
1816 ctu00: ctu-0 1485 ctu00: ctu-0 { };
1817 ctu01: ctu-1 1486 ctu01: ctu-1 { };
1818 ctu02: ctu-2 1487 ctu02: ctu-2 { };
1819 ctu03: ctu-3 1488 ctu03: ctu-3 { };
1820 ctu10: ctu-4 1489 ctu10: ctu-4 { };
1821 ctu11: ctu-5 1490 ctu11: ctu-5 { };
1822 ctu12: ctu-6 1491 ctu12: ctu-6 { };
1823 ctu13: ctu-7 1492 ctu13: ctu-7 { };
1824 }; 1493 };
1825 1494
1826 rcar_sound,src { 1495 rcar_sound,src {
1827 src0: src-0 { 1496 src0: src-0 {
1828 inter 1497 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas 1498 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1830 dma-n 1499 dma-names = "rx", "tx";
1831 }; 1500 };
1832 src1: src-1 { 1501 src1: src-1 {
1833 inter 1502 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas 1503 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1835 dma-n 1504 dma-names = "rx", "tx";
1836 }; 1505 };
1837 src2: src-2 { 1506 src2: src-2 {
1838 inter 1507 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas 1508 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1840 dma-n 1509 dma-names = "rx", "tx";
1841 }; 1510 };
1842 src3: src-3 { 1511 src3: src-3 {
1843 inter 1512 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas 1513 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1845 dma-n 1514 dma-names = "rx", "tx";
1846 }; 1515 };
1847 src4: src-4 { 1516 src4: src-4 {
1848 inter 1517 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas 1518 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1850 dma-n 1519 dma-names = "rx", "tx";
1851 }; 1520 };
1852 src5: src-5 { 1521 src5: src-5 {
1853 inter 1522 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas 1523 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1855 dma-n 1524 dma-names = "rx", "tx";
1856 }; 1525 };
1857 src6: src-6 { 1526 src6: src-6 {
1858 inter 1527 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas 1528 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1860 dma-n 1529 dma-names = "rx", "tx";
1861 }; 1530 };
1862 src7: src-7 { 1531 src7: src-7 {
1863 inter 1532 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1864 dmas 1533 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1865 dma-n 1534 dma-names = "rx", "tx";
1866 }; 1535 };
1867 src8: src-8 { 1536 src8: src-8 {
1868 inter 1537 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1869 dmas 1538 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1870 dma-n 1539 dma-names = "rx", "tx";
1871 }; 1540 };
1872 src9: src-9 { 1541 src9: src-9 {
1873 inter 1542 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1874 dmas 1543 dmas = <&audma0 0x97>, <&audma1 0xba>;
1875 dma-n 1544 dma-names = "rx", "tx";
1876 }; 1545 };
1877 }; 1546 };
1878 1547
1879 rcar_sound,ssiu { <<
1880 ssiu00: ssiu- <<
1881 dmas <<
1882 dma-n <<
1883 }; <<
1884 ssiu01: ssiu- <<
1885 dmas <<
1886 dma-n <<
1887 }; <<
1888 ssiu02: ssiu- <<
1889 dmas <<
1890 dma-n <<
1891 }; <<
1892 ssiu03: ssiu- <<
1893 dmas <<
1894 dma-n <<
1895 }; <<
1896 ssiu04: ssiu- <<
1897 dmas <<
1898 dma-n <<
1899 }; <<
1900 ssiu05: ssiu- <<
1901 dmas <<
1902 dma-n <<
1903 }; <<
1904 ssiu06: ssiu- <<
1905 dmas <<
1906 dma-n <<
1907 }; <<
1908 ssiu07: ssiu- <<
1909 dmas <<
1910 dma-n <<
1911 }; <<
1912 ssiu10: ssiu- <<
1913 dmas <<
1914 dma-n <<
1915 }; <<
1916 ssiu11: ssiu- <<
1917 dmas <<
1918 dma-n <<
1919 }; <<
1920 ssiu12: ssiu- <<
1921 dmas <<
1922 dma-n <<
1923 }; <<
1924 ssiu13: ssiu- <<
1925 dmas <<
1926 dma-n <<
1927 }; <<
1928 ssiu14: ssiu- <<
1929 dmas <<
1930 dma-n <<
1931 }; <<
1932 ssiu15: ssiu- <<
1933 dmas <<
1934 dma-n <<
1935 }; <<
1936 ssiu16: ssiu- <<
1937 dmas <<
1938 dma-n <<
1939 }; <<
1940 ssiu17: ssiu- <<
1941 dmas <<
1942 dma-n <<
1943 }; <<
1944 ssiu20: ssiu- <<
1945 dmas <<
1946 dma-n <<
1947 }; <<
1948 ssiu21: ssiu- <<
1949 dmas <<
1950 dma-n <<
1951 }; <<
1952 ssiu22: ssiu- <<
1953 dmas <<
1954 dma-n <<
1955 }; <<
1956 ssiu23: ssiu- <<
1957 dmas <<
1958 dma-n <<
1959 }; <<
1960 ssiu24: ssiu- <<
1961 dmas <<
1962 dma-n <<
1963 }; <<
1964 ssiu25: ssiu- <<
1965 dmas <<
1966 dma-n <<
1967 }; <<
1968 ssiu26: ssiu- <<
1969 dmas <<
1970 dma-n <<
1971 }; <<
1972 ssiu27: ssiu- <<
1973 dmas <<
1974 dma-n <<
1975 }; <<
1976 ssiu30: ssiu- <<
1977 dmas <<
1978 dma-n <<
1979 }; <<
1980 ssiu31: ssiu- <<
1981 dmas <<
1982 dma-n <<
1983 }; <<
1984 ssiu32: ssiu- <<
1985 dmas <<
1986 dma-n <<
1987 }; <<
1988 ssiu33: ssiu- <<
1989 dmas <<
1990 dma-n <<
1991 }; <<
1992 ssiu34: ssiu- <<
1993 dmas <<
1994 dma-n <<
1995 }; <<
1996 ssiu35: ssiu- <<
1997 dmas <<
1998 dma-n <<
1999 }; <<
2000 ssiu36: ssiu- <<
2001 dmas <<
2002 dma-n <<
2003 }; <<
2004 ssiu37: ssiu- <<
2005 dmas <<
2006 dma-n <<
2007 }; <<
2008 ssiu40: ssiu- <<
2009 dmas <<
2010 dma-n <<
2011 }; <<
2012 ssiu41: ssiu- <<
2013 dmas <<
2014 dma-n <<
2015 }; <<
2016 ssiu42: ssiu- <<
2017 dmas <<
2018 dma-n <<
2019 }; <<
2020 ssiu43: ssiu- <<
2021 dmas <<
2022 dma-n <<
2023 }; <<
2024 ssiu44: ssiu- <<
2025 dmas <<
2026 dma-n <<
2027 }; <<
2028 ssiu45: ssiu- <<
2029 dmas <<
2030 dma-n <<
2031 }; <<
2032 ssiu46: ssiu- <<
2033 dmas <<
2034 dma-n <<
2035 }; <<
2036 ssiu47: ssiu- <<
2037 dmas <<
2038 dma-n <<
2039 }; <<
2040 ssiu50: ssiu- <<
2041 dmas <<
2042 dma-n <<
2043 }; <<
2044 ssiu60: ssiu- <<
2045 dmas <<
2046 dma-n <<
2047 }; <<
2048 ssiu70: ssiu- <<
2049 dmas <<
2050 dma-n <<
2051 }; <<
2052 ssiu80: ssiu- <<
2053 dmas <<
2054 dma-n <<
2055 }; <<
2056 ssiu90: ssiu- <<
2057 dmas <<
2058 dma-n <<
2059 }; <<
2060 ssiu91: ssiu- <<
2061 dmas <<
2062 dma-n <<
2063 }; <<
2064 ssiu92: ssiu- <<
2065 dmas <<
2066 dma-n <<
2067 }; <<
2068 ssiu93: ssiu- <<
2069 dmas <<
2070 dma-n <<
2071 }; <<
2072 ssiu94: ssiu- <<
2073 dmas <<
2074 dma-n <<
2075 }; <<
2076 ssiu95: ssiu- <<
2077 dmas <<
2078 dma-n <<
2079 }; <<
2080 ssiu96: ssiu- <<
2081 dmas <<
2082 dma-n <<
2083 }; <<
2084 ssiu97: ssiu- <<
2085 dmas <<
2086 dma-n <<
2087 }; <<
2088 }; <<
2089 <<
2090 rcar_sound,ssi { 1548 rcar_sound,ssi {
2091 ssi0: ssi-0 { 1549 ssi0: ssi-0 {
2092 inter 1550 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2093 dmas !! 1551 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
2094 dma-n !! 1552 dma-names = "rx", "tx", "rxu", "txu";
2095 }; 1553 };
2096 ssi1: ssi-1 { 1554 ssi1: ssi-1 {
2097 inter 1555 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2098 dmas !! 1556 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
2099 dma-n !! 1557 dma-names = "rx", "tx", "rxu", "txu";
2100 }; 1558 };
2101 ssi2: ssi-2 { 1559 ssi2: ssi-2 {
2102 inter 1560 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2103 dmas !! 1561 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
2104 dma-n !! 1562 dma-names = "rx", "tx", "rxu", "txu";
2105 }; 1563 };
2106 ssi3: ssi-3 { 1564 ssi3: ssi-3 {
2107 inter 1565 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2108 dmas !! 1566 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
2109 dma-n !! 1567 dma-names = "rx", "tx", "rxu", "txu";
2110 }; 1568 };
2111 ssi4: ssi-4 { 1569 ssi4: ssi-4 {
2112 inter 1570 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2113 dmas !! 1571 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
2114 dma-n !! 1572 dma-names = "rx", "tx", "rxu", "txu";
2115 }; 1573 };
2116 ssi5: ssi-5 { 1574 ssi5: ssi-5 {
2117 inter 1575 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2118 dmas !! 1576 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
2119 dma-n !! 1577 dma-names = "rx", "tx", "rxu", "txu";
2120 }; 1578 };
2121 ssi6: ssi-6 { 1579 ssi6: ssi-6 {
2122 inter 1580 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2123 dmas !! 1581 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
2124 dma-n !! 1582 dma-names = "rx", "tx", "rxu", "txu";
2125 }; 1583 };
2126 ssi7: ssi-7 { 1584 ssi7: ssi-7 {
2127 inter 1585 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2128 dmas !! 1586 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
2129 dma-n !! 1587 dma-names = "rx", "tx", "rxu", "txu";
2130 }; 1588 };
2131 ssi8: ssi-8 { 1589 ssi8: ssi-8 {
2132 inter 1590 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2133 dmas !! 1591 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
2134 dma-n !! 1592 dma-names = "rx", "tx", "rxu", "txu";
2135 }; 1593 };
2136 ssi9: ssi-9 { 1594 ssi9: ssi-9 {
2137 inter 1595 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2138 dmas !! 1596 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
2139 dma-n !! 1597 dma-names = "rx", "tx", "rxu", "txu";
2140 }; 1598 };
2141 }; 1599 };
2142 }; 1600 };
2143 1601
2144 mlp: mlp@ec520000 { <<
2145 compatible = "renesas <<
2146 "renesas <<
2147 reg = <0 0xec520000 0 <<
2148 interrupts = <GIC_SPI <<
2149 <GIC_SPI 385 <<
2150 clocks = <&cpg CPG_MO <<
2151 power-domains = <&sys <<
2152 resets = <&cpg 802>; <<
2153 status = "disabled"; <<
2154 }; <<
2155 <<
2156 audma0: dma-controller@ec7000 1602 audma0: dma-controller@ec700000 {
2157 compatible = "renesas 1603 compatible = "renesas,dmac-r8a77965",
2158 "renesas 1604 "renesas,rcar-dmac";
2159 reg = <0 0xec700000 0 1605 reg = <0 0xec700000 0 0x10000>;
2160 interrupts = <GIC_SPI !! 1606 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
2161 <GIC_SPI !! 1607 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
2162 <GIC_SPI !! 1608 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
2163 <GIC_SPI !! 1609 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
2164 <GIC_SPI !! 1610 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
2165 <GIC_SPI !! 1611 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
2166 <GIC_SPI !! 1612 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
2167 <GIC_SPI !! 1613 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
2168 <GIC_SPI !! 1614 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
2169 <GIC_SPI !! 1615 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
2170 <GIC_SPI !! 1616 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
2171 <GIC_SPI !! 1617 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
2172 <GIC_SPI !! 1618 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
2173 <GIC_SPI !! 1619 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
2174 <GIC_SPI !! 1620 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
2175 <GIC_SPI !! 1621 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
2176 <GIC_SPI !! 1622 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2177 interrupt-names = "er 1623 interrupt-names = "error",
2178 "ch0" 1624 "ch0", "ch1", "ch2", "ch3",
2179 "ch4" 1625 "ch4", "ch5", "ch6", "ch7",
2180 "ch8" 1626 "ch8", "ch9", "ch10", "ch11",
2181 "ch12 1627 "ch12", "ch13", "ch14", "ch15";
2182 clocks = <&cpg CPG_MO 1628 clocks = <&cpg CPG_MOD 502>;
2183 clock-names = "fck"; 1629 clock-names = "fck";
2184 power-domains = <&sys 1630 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2185 resets = <&cpg 502>; 1631 resets = <&cpg 502>;
2186 #dma-cells = <1>; 1632 #dma-cells = <1>;
2187 dma-channels = <16>; 1633 dma-channels = <16>;
2188 iommus = <&ipmmu_mp 0 <<
2189 <&ipmmu_mp 2 <<
2190 <&ipmmu_mp 4 <<
2191 <&ipmmu_mp 6 <<
2192 <&ipmmu_mp 8 <<
2193 <&ipmmu_mp 1 <<
2194 <&ipmmu_mp 1 <<
2195 <&ipmmu_mp 1 <<
2196 }; 1634 };
2197 1635
2198 audma1: dma-controller@ec7200 1636 audma1: dma-controller@ec720000 {
2199 compatible = "renesas 1637 compatible = "renesas,dmac-r8a77965",
2200 "renesas 1638 "renesas,rcar-dmac";
2201 reg = <0 0xec720000 0 1639 reg = <0 0xec720000 0 0x10000>;
2202 interrupts = <GIC_SPI !! 1640 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
2203 <GIC_SPI !! 1641 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
2204 <GIC_SPI !! 1642 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
2205 <GIC_SPI !! 1643 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
2206 <GIC_SPI !! 1644 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
2207 <GIC_SPI !! 1645 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
2208 <GIC_SPI !! 1646 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
2209 <GIC_SPI !! 1647 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
2210 <GIC_SPI !! 1648 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
2211 <GIC_SPI !! 1649 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
2212 <GIC_SPI !! 1650 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
2213 <GIC_SPI !! 1651 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
2214 <GIC_SPI !! 1652 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
2215 <GIC_SPI !! 1653 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
2216 <GIC_SPI !! 1654 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
2217 <GIC_SPI !! 1655 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
2218 <GIC_SPI !! 1656 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2219 interrupt-names = "er 1657 interrupt-names = "error",
2220 "ch0" 1658 "ch0", "ch1", "ch2", "ch3",
2221 "ch4" 1659 "ch4", "ch5", "ch6", "ch7",
2222 "ch8" 1660 "ch8", "ch9", "ch10", "ch11",
2223 "ch12 1661 "ch12", "ch13", "ch14", "ch15";
2224 clocks = <&cpg CPG_MO 1662 clocks = <&cpg CPG_MOD 501>;
2225 clock-names = "fck"; 1663 clock-names = "fck";
2226 power-domains = <&sys 1664 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2227 resets = <&cpg 501>; 1665 resets = <&cpg 501>;
2228 #dma-cells = <1>; 1666 #dma-cells = <1>;
2229 dma-channels = <16>; 1667 dma-channels = <16>;
2230 iommus = <&ipmmu_mp 1 <<
2231 <&ipmmu_mp 1 <<
2232 <&ipmmu_mp 2 <<
2233 <&ipmmu_mp 2 <<
2234 <&ipmmu_mp 2 <<
2235 <&ipmmu_mp 2 <<
2236 <&ipmmu_mp 2 <<
2237 <&ipmmu_mp 3 <<
2238 }; 1668 };
2239 1669
2240 xhci0: usb@ee000000 { 1670 xhci0: usb@ee000000 {
2241 compatible = "renesas 1671 compatible = "renesas,xhci-r8a77965",
2242 "renesas 1672 "renesas,rcar-gen3-xhci";
2243 reg = <0 0xee000000 0 1673 reg = <0 0xee000000 0 0xc00>;
2244 interrupts = <GIC_SPI 1674 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2245 clocks = <&cpg CPG_MO 1675 clocks = <&cpg CPG_MOD 328>;
2246 power-domains = <&sys 1676 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2247 resets = <&cpg 328>; 1677 resets = <&cpg 328>;
2248 status = "disabled"; 1678 status = "disabled";
2249 }; 1679 };
2250 1680
2251 usb3_peri0: usb@ee020000 { 1681 usb3_peri0: usb@ee020000 {
2252 compatible = "renesas 1682 compatible = "renesas,r8a77965-usb3-peri",
2253 "renesas 1683 "renesas,rcar-gen3-usb3-peri";
2254 reg = <0 0xee020000 0 1684 reg = <0 0xee020000 0 0x400>;
2255 interrupts = <GIC_SPI 1685 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2256 clocks = <&cpg CPG_MO 1686 clocks = <&cpg CPG_MOD 328>;
2257 power-domains = <&sys 1687 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2258 resets = <&cpg 328>; 1688 resets = <&cpg 328>;
2259 status = "disabled"; 1689 status = "disabled";
2260 }; 1690 };
2261 1691
2262 ohci0: usb@ee080000 { 1692 ohci0: usb@ee080000 {
2263 compatible = "generic 1693 compatible = "generic-ohci";
2264 reg = <0 0xee080000 0 1694 reg = <0 0xee080000 0 0x100>;
2265 interrupts = <GIC_SPI 1695 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2266 clocks = <&cpg CPG_MO 1696 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2267 phys = <&usb2_phy0 1> !! 1697 phys = <&usb2_phy0>;
2268 phy-names = "usb"; 1698 phy-names = "usb";
2269 power-domains = <&sys 1699 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2270 resets = <&cpg 703>, 1700 resets = <&cpg 703>, <&cpg 704>;
2271 status = "disabled"; 1701 status = "disabled";
2272 }; 1702 };
2273 1703
2274 ohci1: usb@ee0a0000 { 1704 ohci1: usb@ee0a0000 {
2275 compatible = "generic 1705 compatible = "generic-ohci";
2276 reg = <0 0xee0a0000 0 1706 reg = <0 0xee0a0000 0 0x100>;
2277 interrupts = <GIC_SPI 1707 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2278 clocks = <&cpg CPG_MO 1708 clocks = <&cpg CPG_MOD 702>;
2279 phys = <&usb2_phy1 1> !! 1709 phys = <&usb2_phy1>;
2280 phy-names = "usb"; 1710 phy-names = "usb";
2281 power-domains = <&sys 1711 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2282 resets = <&cpg 702>; 1712 resets = <&cpg 702>;
2283 status = "disabled"; 1713 status = "disabled";
2284 }; 1714 };
2285 1715
2286 ehci0: usb@ee080100 { 1716 ehci0: usb@ee080100 {
2287 compatible = "generic 1717 compatible = "generic-ehci";
2288 reg = <0 0xee080100 0 1718 reg = <0 0xee080100 0 0x100>;
2289 interrupts = <GIC_SPI 1719 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2290 clocks = <&cpg CPG_MO 1720 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2291 phys = <&usb2_phy0 2> !! 1721 phys = <&usb2_phy0>;
2292 phy-names = "usb"; 1722 phy-names = "usb";
2293 companion = <&ohci0>; 1723 companion = <&ohci0>;
2294 power-domains = <&sys 1724 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2295 resets = <&cpg 703>, 1725 resets = <&cpg 703>, <&cpg 704>;
2296 status = "disabled"; 1726 status = "disabled";
2297 }; 1727 };
2298 1728
2299 ehci1: usb@ee0a0100 { 1729 ehci1: usb@ee0a0100 {
2300 compatible = "generic 1730 compatible = "generic-ehci";
2301 reg = <0 0xee0a0100 0 1731 reg = <0 0xee0a0100 0 0x100>;
2302 interrupts = <GIC_SPI 1732 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2303 clocks = <&cpg CPG_MO 1733 clocks = <&cpg CPG_MOD 702>;
2304 phys = <&usb2_phy1 2> !! 1734 phys = <&usb2_phy1>;
2305 phy-names = "usb"; 1735 phy-names = "usb";
2306 companion = <&ohci1>; 1736 companion = <&ohci1>;
2307 power-domains = <&sys 1737 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2308 resets = <&cpg 702>; 1738 resets = <&cpg 702>;
2309 status = "disabled"; 1739 status = "disabled";
2310 }; 1740 };
2311 1741
2312 usb2_phy0: usb-phy@ee080200 { 1742 usb2_phy0: usb-phy@ee080200 {
2313 compatible = "renesas 1743 compatible = "renesas,usb2-phy-r8a77965",
2314 "renesas 1744 "renesas,rcar-gen3-usb2-phy";
2315 reg = <0 0xee080200 0 1745 reg = <0 0xee080200 0 0x700>;
2316 interrupts = <GIC_SPI 1746 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MO 1747 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2318 power-domains = <&sys 1748 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2319 resets = <&cpg 703>, 1749 resets = <&cpg 703>, <&cpg 704>;
2320 #phy-cells = <1>; !! 1750 #phy-cells = <0>;
2321 status = "disabled"; 1751 status = "disabled";
2322 }; 1752 };
2323 1753
2324 usb2_phy1: usb-phy@ee0a0200 { 1754 usb2_phy1: usb-phy@ee0a0200 {
2325 compatible = "renesas 1755 compatible = "renesas,usb2-phy-r8a77965",
2326 "renesas 1756 "renesas,rcar-gen3-usb2-phy";
2327 reg = <0 0xee0a0200 0 1757 reg = <0 0xee0a0200 0 0x700>;
2328 clocks = <&cpg CPG_MO 1758 clocks = <&cpg CPG_MOD 702>;
2329 power-domains = <&sys 1759 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2330 resets = <&cpg 702>; 1760 resets = <&cpg 702>;
2331 #phy-cells = <1>; !! 1761 #phy-cells = <0>;
2332 status = "disabled"; 1762 status = "disabled";
2333 }; 1763 };
2334 1764
2335 sdhi0: mmc@ee100000 { !! 1765 sdhi0: sd@ee100000 {
2336 compatible = "renesas 1766 compatible = "renesas,sdhi-r8a77965",
2337 "renesas 1767 "renesas,rcar-gen3-sdhi";
2338 reg = <0 0xee100000 0 1768 reg = <0 0xee100000 0 0x2000>;
2339 interrupts = <GIC_SPI 1769 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2340 clocks = <&cpg CPG_MO !! 1770 clocks = <&cpg CPG_MOD 314>;
2341 clock-names = "core", <<
2342 max-frequency = <2000 1771 max-frequency = <200000000>;
2343 power-domains = <&sys 1772 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2344 resets = <&cpg 314>; 1773 resets = <&cpg 314>;
2345 iommus = <&ipmmu_ds1 <<
2346 status = "disabled"; 1774 status = "disabled";
2347 }; 1775 };
2348 1776
2349 sdhi1: mmc@ee120000 { !! 1777 sdhi1: sd@ee120000 {
2350 compatible = "renesas 1778 compatible = "renesas,sdhi-r8a77965",
2351 "renesas 1779 "renesas,rcar-gen3-sdhi";
2352 reg = <0 0xee120000 0 1780 reg = <0 0xee120000 0 0x2000>;
2353 interrupts = <GIC_SPI 1781 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MO !! 1782 clocks = <&cpg CPG_MOD 313>;
2355 clock-names = "core", <<
2356 max-frequency = <2000 1783 max-frequency = <200000000>;
2357 power-domains = <&sys 1784 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2358 resets = <&cpg 313>; 1785 resets = <&cpg 313>;
2359 iommus = <&ipmmu_ds1 <<
2360 status = "disabled"; 1786 status = "disabled";
2361 }; 1787 };
2362 1788
2363 sdhi2: mmc@ee140000 { !! 1789 sdhi2: sd@ee140000 {
2364 compatible = "renesas 1790 compatible = "renesas,sdhi-r8a77965",
2365 "renesas 1791 "renesas,rcar-gen3-sdhi";
2366 reg = <0 0xee140000 0 1792 reg = <0 0xee140000 0 0x2000>;
2367 interrupts = <GIC_SPI 1793 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2368 clocks = <&cpg CPG_MO !! 1794 clocks = <&cpg CPG_MOD 312>;
2369 clock-names = "core", <<
2370 max-frequency = <2000 1795 max-frequency = <200000000>;
2371 power-domains = <&sys 1796 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2372 resets = <&cpg 312>; 1797 resets = <&cpg 312>;
2373 iommus = <&ipmmu_ds1 <<
2374 status = "disabled"; 1798 status = "disabled";
2375 }; 1799 };
2376 1800
2377 sdhi3: mmc@ee160000 { !! 1801 sdhi3: sd@ee160000 {
2378 compatible = "renesas 1802 compatible = "renesas,sdhi-r8a77965",
2379 "renesas 1803 "renesas,rcar-gen3-sdhi";
2380 reg = <0 0xee160000 0 1804 reg = <0 0xee160000 0 0x2000>;
2381 interrupts = <GIC_SPI 1805 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2382 clocks = <&cpg CPG_MO !! 1806 clocks = <&cpg CPG_MOD 311>;
2383 clock-names = "core", <<
2384 max-frequency = <2000 1807 max-frequency = <200000000>;
2385 power-domains = <&sys 1808 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2386 resets = <&cpg 311>; 1809 resets = <&cpg 311>;
2387 iommus = <&ipmmu_ds1 <<
2388 status = "disabled"; <<
2389 }; <<
2390 <<
2391 rpc: spi@ee200000 { <<
2392 compatible = "renesas <<
2393 "renesas <<
2394 reg = <0 0xee200000 0 <<
2395 <0 0x08000000 0 <<
2396 <0 0xee208000 0 <<
2397 reg-names = "regs", " <<
2398 interrupts = <GIC_SPI <<
2399 clocks = <&cpg CPG_MO <<
2400 power-domains = <&sys <<
2401 resets = <&cpg 917>; <<
2402 #address-cells = <1>; <<
2403 #size-cells = <0>; <<
2404 status = "disabled"; 1810 status = "disabled";
2405 }; 1811 };
2406 1812
2407 sata: sata@ee300000 { 1813 sata: sata@ee300000 {
2408 compatible = "renesas 1814 compatible = "renesas,sata-r8a77965",
2409 "renesas 1815 "renesas,rcar-gen3-sata";
2410 reg = <0 0xee300000 0 1816 reg = <0 0xee300000 0 0x200000>;
2411 interrupts = <GIC_SPI 1817 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2412 clocks = <&cpg CPG_MO 1818 clocks = <&cpg CPG_MOD 815>;
2413 power-domains = <&sys 1819 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2414 resets = <&cpg 815>; 1820 resets = <&cpg 815>;
2415 iommus = <&ipmmu_hc 2 <<
2416 status = "disabled"; 1821 status = "disabled";
2417 }; 1822 };
2418 1823
2419 gic: interrupt-controller@f10 1824 gic: interrupt-controller@f1010000 {
2420 compatible = "arm,gic 1825 compatible = "arm,gic-400";
2421 #interrupt-cells = <3 1826 #interrupt-cells = <3>;
2422 #address-cells = <0>; 1827 #address-cells = <0>;
2423 interrupt-controller; 1828 interrupt-controller;
2424 reg = <0x0 0xf1010000 1829 reg = <0x0 0xf1010000 0 0x1000>,
2425 <0x0 0xf1020000 1830 <0x0 0xf1020000 0 0x20000>,
2426 <0x0 0xf1040000 1831 <0x0 0xf1040000 0 0x20000>,
2427 <0x0 0xf1060000 1832 <0x0 0xf1060000 0 0x20000>;
2428 interrupts = <GIC_PPI 1833 interrupts = <GIC_PPI 9
2429 (GIC_ 1834 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2430 clocks = <&cpg CPG_MO 1835 clocks = <&cpg CPG_MOD 408>;
2431 clock-names = "clk"; 1836 clock-names = "clk";
2432 power-domains = <&sys 1837 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2433 resets = <&cpg 408>; 1838 resets = <&cpg 408>;
2434 }; 1839 };
2435 1840
2436 pciec0: pcie@fe000000 { 1841 pciec0: pcie@fe000000 {
2437 compatible = "renesas 1842 compatible = "renesas,pcie-r8a77965",
2438 "renesas 1843 "renesas,pcie-rcar-gen3";
2439 reg = <0 0xfe000000 0 1844 reg = <0 0xfe000000 0 0x80000>;
2440 #address-cells = <3>; 1845 #address-cells = <3>;
2441 #size-cells = <2>; 1846 #size-cells = <2>;
2442 bus-range = <0x00 0xf 1847 bus-range = <0x00 0xff>;
2443 device_type = "pci"; 1848 device_type = "pci";
2444 ranges = <0x01000000 !! 1849 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2445 <0x02000000 !! 1850 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2446 <0x02000000 !! 1851 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2447 <0x42000000 !! 1852 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2448 /* Map all possible D !! 1853 /* Map all possible DDR as inbound ranges */
2449 dma-ranges = <0x42000 !! 1854 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2450 interrupts = <GIC_SPI 1855 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 117 1856 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2452 <GIC_SPI 118 1857 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2453 #interrupt-cells = <1 1858 #interrupt-cells = <1>;
2454 interrupt-map-mask = 1859 interrupt-map-mask = <0 0 0 0>;
2455 interrupt-map = <0 0 1860 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2456 clocks = <&cpg CPG_MO 1861 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2457 clock-names = "pcie", 1862 clock-names = "pcie", "pcie_bus";
2458 power-domains = <&sys 1863 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2459 resets = <&cpg 319>; 1864 resets = <&cpg 319>;
2460 iommu-map = <0 &ipmmu <<
2461 iommu-map-mask = <0>; <<
2462 status = "disabled"; 1865 status = "disabled";
2463 }; 1866 };
2464 1867
2465 pciec1: pcie@ee800000 { 1868 pciec1: pcie@ee800000 {
2466 compatible = "renesas 1869 compatible = "renesas,pcie-r8a77965",
2467 "renesas 1870 "renesas,pcie-rcar-gen3";
2468 reg = <0 0xee800000 0 1871 reg = <0 0xee800000 0 0x80000>;
2469 #address-cells = <3>; 1872 #address-cells = <3>;
2470 #size-cells = <2>; 1873 #size-cells = <2>;
2471 bus-range = <0x00 0xf 1874 bus-range = <0x00 0xff>;
2472 device_type = "pci"; 1875 device_type = "pci";
2473 ranges = <0x01000000 !! 1876 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2474 <0x02000000 !! 1877 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2475 <0x02000000 !! 1878 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2476 <0x42000000 !! 1879 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2477 /* Map all possible D !! 1880 /* Map all possible DDR as inbound ranges */
2478 dma-ranges = <0x42000 !! 1881 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2479 interrupts = <GIC_SPI 1882 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2480 <GIC_SPI 149 1883 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 150 1884 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2482 #interrupt-cells = <1 1885 #interrupt-cells = <1>;
2483 interrupt-map-mask = 1886 interrupt-map-mask = <0 0 0 0>;
2484 interrupt-map = <0 0 1887 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MO 1888 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2486 clock-names = "pcie", 1889 clock-names = "pcie", "pcie_bus";
2487 power-domains = <&sys 1890 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2488 resets = <&cpg 318>; 1891 resets = <&cpg 318>;
2489 iommu-map = <0 &ipmmu <<
2490 iommu-map-mask = <0>; <<
2491 status = "disabled"; 1892 status = "disabled";
2492 }; 1893 };
2493 1894
2494 fdp1@fe940000 { 1895 fdp1@fe940000 {
2495 compatible = "renesas 1896 compatible = "renesas,fdp1";
2496 reg = <0 0xfe940000 0 1897 reg = <0 0xfe940000 0 0x2400>;
2497 interrupts = <GIC_SPI 1898 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2498 clocks = <&cpg CPG_MO 1899 clocks = <&cpg CPG_MOD 119>;
2499 power-domains = <&sys 1900 power-domains = <&sysc R8A77965_PD_A3VP>;
2500 resets = <&cpg 119>; 1901 resets = <&cpg 119>;
2501 renesas,fcp = <&fcpf0 1902 renesas,fcp = <&fcpf0>;
2502 }; 1903 };
2503 1904
2504 fcpf0: fcp@fe950000 { 1905 fcpf0: fcp@fe950000 {
2505 compatible = "renesas 1906 compatible = "renesas,fcpf";
2506 reg = <0 0xfe950000 0 1907 reg = <0 0xfe950000 0 0x200>;
2507 clocks = <&cpg CPG_MO 1908 clocks = <&cpg CPG_MOD 615>;
2508 power-domains = <&sys 1909 power-domains = <&sysc R8A77965_PD_A3VP>;
2509 resets = <&cpg 615>; 1910 resets = <&cpg 615>;
2510 iommus = <&ipmmu_vp0 <<
2511 }; 1911 };
2512 1912
2513 vspb: vsp@fe960000 { 1913 vspb: vsp@fe960000 {
2514 compatible = "renesas 1914 compatible = "renesas,vsp2";
2515 reg = <0 0xfe960000 0 1915 reg = <0 0xfe960000 0 0x8000>;
2516 interrupts = <GIC_SPI 1916 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2517 clocks = <&cpg CPG_MO 1917 clocks = <&cpg CPG_MOD 626>;
2518 power-domains = <&sys 1918 power-domains = <&sysc R8A77965_PD_A3VP>;
2519 resets = <&cpg 626>; 1919 resets = <&cpg 626>;
2520 1920
2521 renesas,fcp = <&fcpvb 1921 renesas,fcp = <&fcpvb0>;
2522 }; 1922 };
2523 1923
>> 1924 fcpvb0: fcp@fe96f000 {
>> 1925 compatible = "renesas,fcpv";
>> 1926 reg = <0 0xfe96f000 0 0x200>;
>> 1927 clocks = <&cpg CPG_MOD 607>;
>> 1928 power-domains = <&sysc R8A77965_PD_A3VP>;
>> 1929 resets = <&cpg 607>;
>> 1930 };
>> 1931
2524 vspi0: vsp@fe9a0000 { 1932 vspi0: vsp@fe9a0000 {
2525 compatible = "renesas 1933 compatible = "renesas,vsp2";
2526 reg = <0 0xfe9a0000 0 1934 reg = <0 0xfe9a0000 0 0x8000>;
2527 interrupts = <GIC_SPI 1935 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2528 clocks = <&cpg CPG_MO 1936 clocks = <&cpg CPG_MOD 631>;
2529 power-domains = <&sys 1937 power-domains = <&sysc R8A77965_PD_A3VP>;
2530 resets = <&cpg 631>; 1938 resets = <&cpg 631>;
2531 1939
2532 renesas,fcp = <&fcpvi 1940 renesas,fcp = <&fcpvi0>;
2533 }; 1941 };
2534 1942
>> 1943 fcpvi0: fcp@fe9af000 {
>> 1944 compatible = "renesas,fcpv";
>> 1945 reg = <0 0xfe9af000 0 0x200>;
>> 1946 clocks = <&cpg CPG_MOD 611>;
>> 1947 power-domains = <&sysc R8A77965_PD_A3VP>;
>> 1948 resets = <&cpg 611>;
>> 1949 };
>> 1950
2535 vspd0: vsp@fea20000 { 1951 vspd0: vsp@fea20000 {
2536 compatible = "renesas 1952 compatible = "renesas,vsp2";
2537 reg = <0 0xfea20000 0 1953 reg = <0 0xfea20000 0 0x5000>;
2538 interrupts = <GIC_SPI 1954 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2539 clocks = <&cpg CPG_MO 1955 clocks = <&cpg CPG_MOD 623>;
2540 power-domains = <&sys 1956 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2541 resets = <&cpg 623>; 1957 resets = <&cpg 623>;
2542 1958
2543 renesas,fcp = <&fcpvd 1959 renesas,fcp = <&fcpvd0>;
2544 }; 1960 };
2545 1961
>> 1962 fcpvd0: fcp@fea27000 {
>> 1963 compatible = "renesas,fcpv";
>> 1964 reg = <0 0xfea27000 0 0x200>;
>> 1965 clocks = <&cpg CPG_MOD 603>;
>> 1966 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
>> 1967 resets = <&cpg 603>;
>> 1968 };
>> 1969
2546 vspd1: vsp@fea28000 { 1970 vspd1: vsp@fea28000 {
2547 compatible = "renesas 1971 compatible = "renesas,vsp2";
2548 reg = <0 0xfea28000 0 1972 reg = <0 0xfea28000 0 0x5000>;
2549 interrupts = <GIC_SPI 1973 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2550 clocks = <&cpg CPG_MO 1974 clocks = <&cpg CPG_MOD 622>;
2551 power-domains = <&sys 1975 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2552 resets = <&cpg 622>; 1976 resets = <&cpg 622>;
2553 1977
2554 renesas,fcp = <&fcpvd 1978 renesas,fcp = <&fcpvd1>;
2555 }; 1979 };
2556 1980
2557 fcpvb0: fcp@fe96f000 { <<
2558 compatible = "renesas <<
2559 reg = <0 0xfe96f000 0 <<
2560 clocks = <&cpg CPG_MO <<
2561 power-domains = <&sys <<
2562 resets = <&cpg 607>; <<
2563 iommus = <&ipmmu_vp0 <<
2564 }; <<
2565 <<
2566 fcpvd0: fcp@fea27000 { <<
2567 compatible = "renesas <<
2568 reg = <0 0xfea27000 0 <<
2569 clocks = <&cpg CPG_MO <<
2570 power-domains = <&sys <<
2571 resets = <&cpg 603>; <<
2572 iommus = <&ipmmu_vi0 <<
2573 }; <<
2574 <<
2575 fcpvd1: fcp@fea2f000 { 1981 fcpvd1: fcp@fea2f000 {
2576 compatible = "renesas 1982 compatible = "renesas,fcpv";
2577 reg = <0 0xfea2f000 0 1983 reg = <0 0xfea2f000 0 0x200>;
2578 clocks = <&cpg CPG_MO 1984 clocks = <&cpg CPG_MOD 602>;
2579 power-domains = <&sys 1985 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2580 resets = <&cpg 602>; 1986 resets = <&cpg 602>;
2581 iommus = <&ipmmu_vi0 <<
2582 }; <<
2583 <<
2584 fcpvi0: fcp@fe9af000 { <<
2585 compatible = "renesas <<
2586 reg = <0 0xfe9af000 0 <<
2587 clocks = <&cpg CPG_MO <<
2588 power-domains = <&sys <<
2589 resets = <&cpg 611>; <<
2590 iommus = <&ipmmu_vp0 <<
2591 }; <<
2592 <<
2593 cmm0: cmm@fea40000 { <<
2594 compatible = "renesas <<
2595 "renesas <<
2596 reg = <0 0xfea40000 0 <<
2597 power-domains = <&sys <<
2598 clocks = <&cpg CPG_MO <<
2599 resets = <&cpg 711>; <<
2600 }; <<
2601 <<
2602 cmm1: cmm@fea50000 { <<
2603 compatible = "renesas <<
2604 "renesas <<
2605 reg = <0 0xfea50000 0 <<
2606 power-domains = <&sys <<
2607 clocks = <&cpg CPG_MO <<
2608 resets = <&cpg 710>; <<
2609 }; <<
2610 <<
2611 cmm3: cmm@fea70000 { <<
2612 compatible = "renesas <<
2613 "renesas <<
2614 reg = <0 0xfea70000 0 <<
2615 power-domains = <&sys <<
2616 clocks = <&cpg CPG_MO <<
2617 resets = <&cpg 708>; <<
2618 }; 1987 };
2619 1988
2620 csi20: csi2@fea80000 { 1989 csi20: csi2@fea80000 {
2621 compatible = "renesas 1990 compatible = "renesas,r8a77965-csi2";
2622 reg = <0 0xfea80000 0 1991 reg = <0 0xfea80000 0 0x10000>;
2623 interrupts = <GIC_SPI 1992 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2624 clocks = <&cpg CPG_MO 1993 clocks = <&cpg CPG_MOD 714>;
2625 power-domains = <&sys 1994 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2626 resets = <&cpg 714>; 1995 resets = <&cpg 714>;
2627 status = "disabled"; 1996 status = "disabled";
2628 1997
2629 ports { 1998 ports {
2630 #address-cell 1999 #address-cells = <1>;
2631 #size-cells = 2000 #size-cells = <0>;
2632 2001
2633 port@0 { <<
2634 reg = <<
2635 }; <<
2636 <<
2637 port@1 { 2002 port@1 {
2638 #addr 2003 #address-cells = <1>;
2639 #size 2004 #size-cells = <0>;
2640 2005
2641 reg = 2006 reg = <1>;
2642 2007
2643 csi20 2008 csi20vin0: endpoint@0 {
2644 2009 reg = <0>;
2645 2010 remote-endpoint = <&vin0csi20>;
2646 }; 2011 };
2647 csi20 2012 csi20vin1: endpoint@1 {
2648 2013 reg = <1>;
2649 2014 remote-endpoint = <&vin1csi20>;
2650 }; 2015 };
2651 csi20 2016 csi20vin2: endpoint@2 {
2652 2017 reg = <2>;
2653 2018 remote-endpoint = <&vin2csi20>;
2654 }; 2019 };
2655 csi20 2020 csi20vin3: endpoint@3 {
2656 2021 reg = <3>;
2657 2022 remote-endpoint = <&vin3csi20>;
2658 }; 2023 };
2659 csi20 2024 csi20vin4: endpoint@4 {
2660 2025 reg = <4>;
2661 2026 remote-endpoint = <&vin4csi20>;
2662 }; 2027 };
2663 csi20 2028 csi20vin5: endpoint@5 {
2664 2029 reg = <5>;
2665 2030 remote-endpoint = <&vin5csi20>;
2666 }; 2031 };
2667 csi20 2032 csi20vin6: endpoint@6 {
2668 2033 reg = <6>;
2669 2034 remote-endpoint = <&vin6csi20>;
2670 }; 2035 };
2671 csi20 2036 csi20vin7: endpoint@7 {
2672 2037 reg = <7>;
2673 2038 remote-endpoint = <&vin7csi20>;
2674 }; 2039 };
2675 }; 2040 };
2676 }; 2041 };
2677 }; 2042 };
2678 2043
2679 csi40: csi2@feaa0000 { 2044 csi40: csi2@feaa0000 {
2680 compatible = "renesas 2045 compatible = "renesas,r8a77965-csi2";
2681 reg = <0 0xfeaa0000 0 2046 reg = <0 0xfeaa0000 0 0x10000>;
2682 interrupts = <GIC_SPI 2047 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2683 clocks = <&cpg CPG_MO 2048 clocks = <&cpg CPG_MOD 716>;
2684 power-domains = <&sys 2049 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2685 resets = <&cpg 716>; 2050 resets = <&cpg 716>;
2686 status = "disabled"; 2051 status = "disabled";
2687 2052
2688 ports { 2053 ports {
2689 #address-cell 2054 #address-cells = <1>;
2690 #size-cells = 2055 #size-cells = <0>;
2691 2056
2692 port@0 { <<
2693 reg = <<
2694 }; <<
2695 <<
2696 port@1 { 2057 port@1 {
2697 #addr 2058 #address-cells = <1>;
2698 #size 2059 #size-cells = <0>;
2699 2060
2700 reg = 2061 reg = <1>;
2701 2062
2702 csi40 2063 csi40vin0: endpoint@0 {
2703 2064 reg = <0>;
2704 2065 remote-endpoint = <&vin0csi40>;
2705 }; 2066 };
2706 csi40 2067 csi40vin1: endpoint@1 {
2707 2068 reg = <1>;
2708 2069 remote-endpoint = <&vin1csi40>;
2709 }; 2070 };
2710 csi40 2071 csi40vin2: endpoint@2 {
2711 2072 reg = <2>;
2712 2073 remote-endpoint = <&vin2csi40>;
2713 }; 2074 };
2714 csi40 2075 csi40vin3: endpoint@3 {
2715 2076 reg = <3>;
2716 2077 remote-endpoint = <&vin3csi40>;
2717 }; 2078 };
2718 csi40 2079 csi40vin4: endpoint@4 {
2719 2080 reg = <4>;
2720 2081 remote-endpoint = <&vin4csi40>;
2721 }; 2082 };
2722 csi40 2083 csi40vin5: endpoint@5 {
2723 2084 reg = <5>;
2724 2085 remote-endpoint = <&vin5csi40>;
2725 }; 2086 };
2726 csi40 2087 csi40vin6: endpoint@6 {
2727 2088 reg = <6>;
2728 2089 remote-endpoint = <&vin6csi40>;
2729 }; 2090 };
2730 csi40 2091 csi40vin7: endpoint@7 {
2731 2092 reg = <7>;
2732 2093 remote-endpoint = <&vin7csi40>;
2733 }; 2094 };
2734 }; 2095 };
2735 }; 2096 };
2736 }; 2097 };
2737 2098
2738 hdmi0: hdmi@fead0000 { 2099 hdmi0: hdmi@fead0000 {
2739 compatible = "renesas 2100 compatible = "renesas,r8a77965-hdmi",
2740 "renesas 2101 "renesas,rcar-gen3-hdmi";
2741 reg = <0 0xfead0000 0 2102 reg = <0 0xfead0000 0 0x10000>;
2742 interrupts = <GIC_SPI 2103 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2743 clocks = <&cpg CPG_MO 2104 clocks = <&cpg CPG_MOD 729>,
2744 <&cpg CPG_CO 2105 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2745 clock-names = "iahb", 2106 clock-names = "iahb", "isfr";
2746 power-domains = <&sys 2107 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2747 resets = <&cpg 729>; 2108 resets = <&cpg 729>;
2748 status = "disabled"; 2109 status = "disabled";
2749 2110
2750 ports { 2111 ports {
2751 #address-cell 2112 #address-cells = <1>;
2752 #size-cells = 2113 #size-cells = <0>;
2753 port@0 { 2114 port@0 {
2754 reg = 2115 reg = <0>;
2755 dw_hd 2116 dw_hdmi0_in: endpoint {
2756 2117 remote-endpoint = <&du_out_hdmi0>;
2757 }; 2118 };
2758 }; 2119 };
2759 port@1 { 2120 port@1 {
2760 reg = 2121 reg = <1>;
2761 }; 2122 };
2762 }; 2123 };
2763 }; 2124 };
2764 2125
2765 du: display@feb00000 { 2126 du: display@feb00000 {
2766 compatible = "renesas 2127 compatible = "renesas,du-r8a77965";
2767 reg = <0 0xfeb00000 0 2128 reg = <0 0xfeb00000 0 0x80000>;
>> 2129 reg-names = "du";
2768 interrupts = <GIC_SPI 2130 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2769 <GIC_SPI 2131 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2770 <GIC_SPI 2132 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2771 clocks = <&cpg CPG_MO !! 2133 clocks = <&cpg CPG_MOD 724>,
>> 2134 <&cpg CPG_MOD 723>,
2772 <&cpg CPG_MO 2135 <&cpg CPG_MOD 721>;
2773 clock-names = "du.0", 2136 clock-names = "du.0", "du.1", "du.3";
2774 resets = <&cpg 724>, <<
2775 reset-names = "du.0", <<
2776 <<
2777 renesas,cmms = <&cmm0 <<
2778 renesas,vsps = <&vspd <<
2779 <<
2780 status = "disabled"; 2137 status = "disabled";
2781 2138
>> 2139 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
>> 2140
2782 ports { 2141 ports {
2783 #address-cell 2142 #address-cells = <1>;
2784 #size-cells = 2143 #size-cells = <0>;
2785 2144
2786 port@0 { 2145 port@0 {
2787 reg = 2146 reg = <0>;
>> 2147 du_out_rgb: endpoint {
>> 2148 };
2788 }; 2149 };
2789 port@1 { 2150 port@1 {
2790 reg = 2151 reg = <1>;
2791 du_ou 2152 du_out_hdmi0: endpoint {
2792 2153 remote-endpoint = <&dw_hdmi0_in>;
2793 }; 2154 };
2794 }; 2155 };
2795 port@2 { 2156 port@2 {
2796 reg = 2157 reg = <2>;
2797 du_ou 2158 du_out_lvds0: endpoint {
2798 <<
2799 }; <<
2800 }; <<
2801 }; <<
2802 }; <<
2803 <<
2804 lvds0: lvds@feb90000 { <<
2805 compatible = "renesas <<
2806 reg = <0 0xfeb90000 0 <<
2807 clocks = <&cpg CPG_MO <<
2808 power-domains = <&sys <<
2809 resets = <&cpg 727>; <<
2810 status = "disabled"; <<
2811 <<
2812 ports { <<
2813 #address-cell <<
2814 #size-cells = <<
2815 <<
2816 port@0 { <<
2817 reg = <<
2818 lvds0 <<
2819 <<
2820 }; 2159 };
2821 }; 2160 };
2822 port@1 { <<
2823 reg = <<
2824 }; <<
2825 }; 2161 };
2826 }; 2162 };
2827 2163
2828 prr: chipid@fff00044 { 2164 prr: chipid@fff00044 {
2829 compatible = "renesas 2165 compatible = "renesas,prr";
2830 reg = <0 0xfff00044 0 2166 reg = <0 0xfff00044 0 4>;
2831 }; 2167 };
2832 }; 2168 };
2833 2169
2834 thermal-zones { 2170 thermal-zones {
2835 sensor1_thermal: sensor1-ther !! 2171 sensor_thermal1: sensor-thermal1 {
2836 polling-delay-passive 2172 polling-delay-passive = <250>;
2837 polling-delay = <1000 2173 polling-delay = <1000>;
2838 thermal-sensors = <&t 2174 thermal-sensors = <&tsc 0>;
2839 sustainable-power = < <<
2840 2175
2841 trips { 2176 trips {
2842 sensor1_crit: 2177 sensor1_crit: sensor1-crit {
2843 tempe 2178 temperature = <120000>;
2844 hyste 2179 hysteresis = <1000>;
2845 type 2180 type = "critical";
2846 }; 2181 };
2847 }; 2182 };
2848 }; 2183 };
2849 2184
2850 sensor2_thermal: sensor2-ther !! 2185 sensor_thermal2: sensor-thermal2 {
2851 polling-delay-passive 2186 polling-delay-passive = <250>;
2852 polling-delay = <1000 2187 polling-delay = <1000>;
2853 thermal-sensors = <&t 2188 thermal-sensors = <&tsc 1>;
2854 sustainable-power = < <<
2855 2189
2856 trips { 2190 trips {
2857 sensor2_crit: 2191 sensor2_crit: sensor2-crit {
2858 tempe 2192 temperature = <120000>;
2859 hyste 2193 hysteresis = <1000>;
2860 type 2194 type = "critical";
2861 }; 2195 };
2862 }; 2196 };
2863 }; 2197 };
2864 2198
2865 sensor3_thermal: sensor3-ther !! 2199 sensor_thermal3: sensor-thermal3 {
2866 polling-delay-passive 2200 polling-delay-passive = <250>;
2867 polling-delay = <1000 2201 polling-delay = <1000>;
2868 thermal-sensors = <&t 2202 thermal-sensors = <&tsc 2>;
2869 sustainable-power = < <<
2870 2203
2871 trips { 2204 trips {
2872 target: trip- <<
2873 /* mi <<
2874 tempe <<
2875 hyste <<
2876 type <<
2877 }; <<
2878 <<
2879 sensor3_crit: 2205 sensor3_crit: sensor3-crit {
2880 tempe 2206 temperature = <120000>;
2881 hyste 2207 hysteresis = <1000>;
2882 type 2208 type = "critical";
2883 }; 2209 };
2884 }; 2210 };
2885 <<
2886 cooling-maps { <<
2887 map0 { <<
2888 trip <<
2889 cooli <<
2890 contr <<
2891 }; <<
2892 }; <<
2893 }; 2211 };
2894 }; 2212 };
2895 2213
2896 timer { 2214 timer {
2897 compatible = "arm,armv8-timer 2215 compatible = "arm,armv8-timer";
2898 interrupts-extended = <&gic G 2216 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2899 <&gic G 2217 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2900 <&gic G 2218 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2901 <&gic G 2219 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2902 interrupt-names = "sec-phys", <<
2903 }; 2220 };
2904 2221
2905 /* External USB clocks - can be overr 2222 /* External USB clocks - can be overridden by the board */
2906 usb3s0_clk: usb3s0 { 2223 usb3s0_clk: usb3s0 {
2907 compatible = "fixed-clock"; 2224 compatible = "fixed-clock";
2908 #clock-cells = <0>; 2225 #clock-cells = <0>;
2909 clock-frequency = <0>; 2226 clock-frequency = <0>;
2910 }; 2227 };
2911 2228
2912 usb_extal_clk: usb_extal { 2229 usb_extal_clk: usb_extal {
2913 compatible = "fixed-clock"; 2230 compatible = "fixed-clock";
2914 #clock-cells = <0>; 2231 #clock-cells = <0>;
2915 clock-frequency = <0>; 2232 clock-frequency = <0>;
2916 }; 2233 };
2917 }; 2234 };
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