1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car M3-N (R8A7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 * 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+rene 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 * 6 *
7 * Based on r8a7796.dtsi 7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp 8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */ 9 */
10 10
11 #include <dt-bindings/clock/r8a77965-cpg-mssr. 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h> 13 #include <dt-bindings/power/r8a77965-sysc.h>
14 14
15 #define SOC_HAS_SATA !! 15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
16 16
17 / { 17 / {
18 compatible = "renesas,r8a77965"; 18 compatible = "renesas,r8a77965";
19 #address-cells = <2>; 19 #address-cells = <2>;
20 #size-cells = <2>; 20 #size-cells = <2>;
21 21
>> 22 aliases {
>> 23 i2c0 = &i2c0;
>> 24 i2c1 = &i2c1;
>> 25 i2c2 = &i2c2;
>> 26 i2c3 = &i2c3;
>> 27 i2c4 = &i2c4;
>> 28 i2c5 = &i2c5;
>> 29 i2c6 = &i2c6;
>> 30 i2c7 = &i2c_dvfs;
>> 31 };
>> 32
22 /* 33 /*
23 * The external audio clocks are confi 34 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default. 35 * clocks by default.
25 * Boards that provide audio clocks sh 36 * Boards that provide audio clocks should override them.
26 */ 37 */
27 audio_clk_a: audio_clk_a { 38 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock"; 39 compatible = "fixed-clock";
29 #clock-cells = <0>; 40 #clock-cells = <0>;
30 clock-frequency = <0>; 41 clock-frequency = <0>;
31 }; 42 };
32 43
33 audio_clk_b: audio_clk_b { 44 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock"; 45 compatible = "fixed-clock";
35 #clock-cells = <0>; 46 #clock-cells = <0>;
36 clock-frequency = <0>; 47 clock-frequency = <0>;
37 }; 48 };
38 49
39 audio_clk_c: audio_clk_c { 50 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock"; 51 compatible = "fixed-clock";
41 #clock-cells = <0>; 52 #clock-cells = <0>;
42 clock-frequency = <0>; 53 clock-frequency = <0>;
43 }; 54 };
44 55
45 /* External CAN clock - to be overridd 56 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can { 57 can_clk: can {
47 compatible = "fixed-clock"; 58 compatible = "fixed-clock";
48 #clock-cells = <0>; 59 #clock-cells = <0>;
49 clock-frequency = <0>; 60 clock-frequency = <0>;
50 }; 61 };
51 62
52 cluster0_opp: opp-table-0 { !! 63 cluster0_opp: opp_table0 {
53 compatible = "operating-points 64 compatible = "operating-points-v2";
54 opp-shared; 65 opp-shared;
55 66
56 opp-500000000 { 67 opp-500000000 {
57 opp-hz = /bits/ 64 <50 68 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <83000 69 opp-microvolt = <830000>;
59 clock-latency-ns = <30 70 clock-latency-ns = <300000>;
60 }; 71 };
61 opp-1000000000 { 72 opp-1000000000 {
62 opp-hz = /bits/ 64 <10 73 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <83000 74 opp-microvolt = <830000>;
64 clock-latency-ns = <30 75 clock-latency-ns = <300000>;
65 }; 76 };
66 opp-1500000000 { 77 opp-1500000000 {
67 opp-hz = /bits/ 64 <15 78 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <83000 79 opp-microvolt = <830000>;
69 clock-latency-ns = <30 80 clock-latency-ns = <300000>;
70 opp-suspend; 81 opp-suspend;
71 }; 82 };
72 opp-1600000000 { 83 opp-1600000000 {
73 opp-hz = /bits/ 64 <16 84 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <90000 85 opp-microvolt = <900000>;
75 clock-latency-ns = <30 86 clock-latency-ns = <300000>;
>> 87 turbo-mode;
76 }; 88 };
77 opp-1700000000 { 89 opp-1700000000 {
78 opp-hz = /bits/ 64 <17 90 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <90000 91 opp-microvolt = <900000>;
80 clock-latency-ns = <30 92 clock-latency-ns = <300000>;
>> 93 turbo-mode;
81 }; 94 };
82 opp-1800000000 { 95 opp-1800000000 {
83 opp-hz = /bits/ 64 <18 96 opp-hz = /bits/ 64 <1800000000>;
84 opp-microvolt = <96000 97 opp-microvolt = <960000>;
85 clock-latency-ns = <30 98 clock-latency-ns = <300000>;
86 turbo-mode; 99 turbo-mode;
87 }; 100 };
88 }; 101 };
89 102
90 cpus { 103 cpus {
91 #address-cells = <1>; 104 #address-cells = <1>;
92 #size-cells = <0>; 105 #size-cells = <0>;
93 106
94 a57_0: cpu@0 { 107 a57_0: cpu@0 {
95 compatible = "arm,cort 108 compatible = "arm,cortex-a57";
96 reg = <0x0>; 109 reg = <0x0>;
97 device_type = "cpu"; 110 device_type = "cpu";
98 power-domains = <&sysc 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
99 next-level-cache = <&L 112 next-level-cache = <&L2_CA57>;
100 enable-method = "psci" 113 enable-method = "psci";
101 cpu-idle-states = <&CP 114 cpu-idle-states = <&CPU_SLEEP_0>;
102 #cooling-cells = <2>; 115 #cooling-cells = <2>;
103 dynamic-power-coeffici 116 dynamic-power-coefficient = <854>;
104 clocks = <&cpg CPG_COR 117 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
105 operating-points-v2 = 118 operating-points-v2 = <&cluster0_opp>;
106 }; 119 };
107 120
108 a57_1: cpu@1 { 121 a57_1: cpu@1 {
109 compatible = "arm,cort 122 compatible = "arm,cortex-a57";
110 reg = <0x1>; 123 reg = <0x1>;
111 device_type = "cpu"; 124 device_type = "cpu";
112 power-domains = <&sysc 125 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
113 next-level-cache = <&L 126 next-level-cache = <&L2_CA57>;
114 enable-method = "psci" 127 enable-method = "psci";
115 cpu-idle-states = <&CP 128 cpu-idle-states = <&CPU_SLEEP_0>;
116 clocks = <&cpg CPG_COR 129 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
117 operating-points-v2 = 130 operating-points-v2 = <&cluster0_opp>;
118 }; 131 };
119 132
120 L2_CA57: cache-controller-0 { 133 L2_CA57: cache-controller-0 {
121 compatible = "cache"; 134 compatible = "cache";
122 power-domains = <&sysc 135 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
123 cache-unified; 136 cache-unified;
124 cache-level = <2>; 137 cache-level = <2>;
125 }; 138 };
126 139
127 idle-states { 140 idle-states {
128 entry-method = "psci"; 141 entry-method = "psci";
129 142
130 CPU_SLEEP_0: cpu-sleep 143 CPU_SLEEP_0: cpu-sleep-0 {
131 compatible = " 144 compatible = "arm,idle-state";
132 arm,psci-suspe 145 arm,psci-suspend-param = <0x0010000>;
133 local-timer-st 146 local-timer-stop;
134 entry-latency- 147 entry-latency-us = <400>;
135 exit-latency-u 148 exit-latency-us = <500>;
136 min-residency- 149 min-residency-us = <4000>;
137 }; 150 };
138 }; 151 };
139 }; 152 };
140 153
141 extal_clk: extal { 154 extal_clk: extal {
142 compatible = "fixed-clock"; 155 compatible = "fixed-clock";
143 #clock-cells = <0>; 156 #clock-cells = <0>;
144 /* This value must be overridd 157 /* This value must be overridden by the board */
145 clock-frequency = <0>; 158 clock-frequency = <0>;
146 }; 159 };
147 160
148 extalr_clk: extalr { 161 extalr_clk: extalr {
149 compatible = "fixed-clock"; 162 compatible = "fixed-clock";
150 #clock-cells = <0>; 163 #clock-cells = <0>;
151 /* This value must be overridd 164 /* This value must be overridden by the board */
152 clock-frequency = <0>; 165 clock-frequency = <0>;
153 }; 166 };
154 167
155 /* External PCIe clock - can be overri 168 /* External PCIe clock - can be overridden by the board */
156 pcie_bus_clk: pcie_bus { 169 pcie_bus_clk: pcie_bus {
157 compatible = "fixed-clock"; 170 compatible = "fixed-clock";
158 #clock-cells = <0>; 171 #clock-cells = <0>;
159 clock-frequency = <0>; 172 clock-frequency = <0>;
160 }; 173 };
161 174
162 pmu_a57 { 175 pmu_a57 {
163 compatible = "arm,cortex-a57-p 176 compatible = "arm,cortex-a57-pmu";
164 interrupts-extended = <&gic GI 177 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
165 <&gic GI 178 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166 interrupt-affinity = <&a57_0>, 179 interrupt-affinity = <&a57_0>,
167 <&a57_1>; 180 <&a57_1>;
168 }; 181 };
169 182
170 psci { 183 psci {
171 compatible = "arm,psci-1.0", " 184 compatible = "arm,psci-1.0", "arm,psci-0.2";
172 method = "smc"; 185 method = "smc";
173 }; 186 };
174 187
175 /* External SCIF clock - to be overrid 188 /* External SCIF clock - to be overridden by boards that provide it */
176 scif_clk: scif { 189 scif_clk: scif {
177 compatible = "fixed-clock"; 190 compatible = "fixed-clock";
178 #clock-cells = <0>; 191 #clock-cells = <0>;
179 clock-frequency = <0>; 192 clock-frequency = <0>;
180 }; 193 };
181 194
182 soc { 195 soc {
183 compatible = "simple-bus"; 196 compatible = "simple-bus";
184 interrupt-parent = <&gic>; 197 interrupt-parent = <&gic>;
185 #address-cells = <2>; 198 #address-cells = <2>;
186 #size-cells = <2>; 199 #size-cells = <2>;
187 ranges; 200 ranges;
188 201
189 rwdt: watchdog@e6020000 { 202 rwdt: watchdog@e6020000 {
190 compatible = "renesas, 203 compatible = "renesas,r8a77965-wdt",
191 "renesas, 204 "renesas,rcar-gen3-wdt";
192 reg = <0 0xe6020000 0 205 reg = <0 0xe6020000 0 0x0c>;
193 interrupts = <GIC_SPI <<
194 clocks = <&cpg CPG_MOD 206 clocks = <&cpg CPG_MOD 402>;
195 power-domains = <&sysc 207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
196 resets = <&cpg 402>; 208 resets = <&cpg 402>;
197 status = "disabled"; 209 status = "disabled";
198 }; 210 };
199 211
200 gpio0: gpio@e6050000 { 212 gpio0: gpio@e6050000 {
201 compatible = "renesas, 213 compatible = "renesas,gpio-r8a77965",
202 "renesas, 214 "renesas,rcar-gen3-gpio";
203 reg = <0 0xe6050000 0 215 reg = <0 0xe6050000 0 0x50>;
204 interrupts = <GIC_SPI 216 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>; 217 #gpio-cells = <2>;
206 gpio-controller; 218 gpio-controller;
207 gpio-ranges = <&pfc 0 219 gpio-ranges = <&pfc 0 0 16>;
208 #interrupt-cells = <2> 220 #interrupt-cells = <2>;
209 interrupt-controller; 221 interrupt-controller;
210 clocks = <&cpg CPG_MOD 222 clocks = <&cpg CPG_MOD 912>;
211 power-domains = <&sysc 223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
212 resets = <&cpg 912>; 224 resets = <&cpg 912>;
213 }; 225 };
214 226
215 gpio1: gpio@e6051000 { 227 gpio1: gpio@e6051000 {
216 compatible = "renesas, 228 compatible = "renesas,gpio-r8a77965",
217 "renesas, 229 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6051000 0 230 reg = <0 0xe6051000 0 0x50>;
219 interrupts = <GIC_SPI 231 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>; 232 #gpio-cells = <2>;
221 gpio-controller; 233 gpio-controller;
222 gpio-ranges = <&pfc 0 234 gpio-ranges = <&pfc 0 32 29>;
223 #interrupt-cells = <2> 235 #interrupt-cells = <2>;
224 interrupt-controller; 236 interrupt-controller;
225 clocks = <&cpg CPG_MOD 237 clocks = <&cpg CPG_MOD 911>;
226 power-domains = <&sysc 238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
227 resets = <&cpg 911>; 239 resets = <&cpg 911>;
228 }; 240 };
229 241
230 gpio2: gpio@e6052000 { 242 gpio2: gpio@e6052000 {
231 compatible = "renesas, 243 compatible = "renesas,gpio-r8a77965",
232 "renesas, 244 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6052000 0 245 reg = <0 0xe6052000 0 0x50>;
234 interrupts = <GIC_SPI 246 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>; 247 #gpio-cells = <2>;
236 gpio-controller; 248 gpio-controller;
237 gpio-ranges = <&pfc 0 249 gpio-ranges = <&pfc 0 64 15>;
238 #interrupt-cells = <2> 250 #interrupt-cells = <2>;
239 interrupt-controller; 251 interrupt-controller;
240 clocks = <&cpg CPG_MOD 252 clocks = <&cpg CPG_MOD 910>;
241 power-domains = <&sysc 253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
242 resets = <&cpg 910>; 254 resets = <&cpg 910>;
243 }; 255 };
244 256
245 gpio3: gpio@e6053000 { 257 gpio3: gpio@e6053000 {
246 compatible = "renesas, 258 compatible = "renesas,gpio-r8a77965",
247 "renesas, 259 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6053000 0 260 reg = <0 0xe6053000 0 0x50>;
249 interrupts = <GIC_SPI 261 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>; 262 #gpio-cells = <2>;
251 gpio-controller; 263 gpio-controller;
252 gpio-ranges = <&pfc 0 264 gpio-ranges = <&pfc 0 96 16>;
253 #interrupt-cells = <2> 265 #interrupt-cells = <2>;
254 interrupt-controller; 266 interrupt-controller;
255 clocks = <&cpg CPG_MOD 267 clocks = <&cpg CPG_MOD 909>;
256 power-domains = <&sysc 268 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
257 resets = <&cpg 909>; 269 resets = <&cpg 909>;
258 }; 270 };
259 271
260 gpio4: gpio@e6054000 { 272 gpio4: gpio@e6054000 {
261 compatible = "renesas, 273 compatible = "renesas,gpio-r8a77965",
262 "renesas, 274 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6054000 0 275 reg = <0 0xe6054000 0 0x50>;
264 interrupts = <GIC_SPI 276 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>; 277 #gpio-cells = <2>;
266 gpio-controller; 278 gpio-controller;
267 gpio-ranges = <&pfc 0 279 gpio-ranges = <&pfc 0 128 18>;
268 #interrupt-cells = <2> 280 #interrupt-cells = <2>;
269 interrupt-controller; 281 interrupt-controller;
270 clocks = <&cpg CPG_MOD 282 clocks = <&cpg CPG_MOD 908>;
271 power-domains = <&sysc 283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
272 resets = <&cpg 908>; 284 resets = <&cpg 908>;
273 }; 285 };
274 286
275 gpio5: gpio@e6055000 { 287 gpio5: gpio@e6055000 {
276 compatible = "renesas, 288 compatible = "renesas,gpio-r8a77965",
277 "renesas, 289 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6055000 0 290 reg = <0 0xe6055000 0 0x50>;
279 interrupts = <GIC_SPI 291 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>; 292 #gpio-cells = <2>;
281 gpio-controller; 293 gpio-controller;
282 gpio-ranges = <&pfc 0 294 gpio-ranges = <&pfc 0 160 26>;
283 #interrupt-cells = <2> 295 #interrupt-cells = <2>;
284 interrupt-controller; 296 interrupt-controller;
285 clocks = <&cpg CPG_MOD 297 clocks = <&cpg CPG_MOD 907>;
286 power-domains = <&sysc 298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
287 resets = <&cpg 907>; 299 resets = <&cpg 907>;
288 }; 300 };
289 301
290 gpio6: gpio@e6055400 { 302 gpio6: gpio@e6055400 {
291 compatible = "renesas, 303 compatible = "renesas,gpio-r8a77965",
292 "renesas, 304 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055400 0 305 reg = <0 0xe6055400 0 0x50>;
294 interrupts = <GIC_SPI 306 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>; 307 #gpio-cells = <2>;
296 gpio-controller; 308 gpio-controller;
297 gpio-ranges = <&pfc 0 309 gpio-ranges = <&pfc 0 192 32>;
298 #interrupt-cells = <2> 310 #interrupt-cells = <2>;
299 interrupt-controller; 311 interrupt-controller;
300 clocks = <&cpg CPG_MOD 312 clocks = <&cpg CPG_MOD 906>;
301 power-domains = <&sysc 313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
302 resets = <&cpg 906>; 314 resets = <&cpg 906>;
303 }; 315 };
304 316
305 gpio7: gpio@e6055800 { 317 gpio7: gpio@e6055800 {
306 compatible = "renesas, 318 compatible = "renesas,gpio-r8a77965",
307 "renesas, 319 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055800 0 320 reg = <0 0xe6055800 0 0x50>;
309 interrupts = <GIC_SPI 321 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>; 322 #gpio-cells = <2>;
311 gpio-controller; 323 gpio-controller;
312 gpio-ranges = <&pfc 0 324 gpio-ranges = <&pfc 0 224 4>;
313 #interrupt-cells = <2> 325 #interrupt-cells = <2>;
314 interrupt-controller; 326 interrupt-controller;
315 clocks = <&cpg CPG_MOD 327 clocks = <&cpg CPG_MOD 905>;
316 power-domains = <&sysc 328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
317 resets = <&cpg 905>; 329 resets = <&cpg 905>;
318 }; 330 };
319 331
320 pfc: pinctrl@e6060000 { 332 pfc: pinctrl@e6060000 {
321 compatible = "renesas, 333 compatible = "renesas,pfc-r8a77965";
322 reg = <0 0xe6060000 0 334 reg = <0 0xe6060000 0 0x50c>;
323 }; 335 };
324 336
325 cmt0: timer@e60f0000 { 337 cmt0: timer@e60f0000 {
326 compatible = "renesas, 338 compatible = "renesas,r8a77965-cmt0",
327 "renesas, 339 "renesas,rcar-gen3-cmt0";
328 reg = <0 0xe60f0000 0 340 reg = <0 0xe60f0000 0 0x1004>;
329 interrupts = <GIC_SPI 341 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 342 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&cpg CPG_MOD 343 clocks = <&cpg CPG_MOD 303>;
332 clock-names = "fck"; 344 clock-names = "fck";
333 power-domains = <&sysc 345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
334 resets = <&cpg 303>; 346 resets = <&cpg 303>;
335 status = "disabled"; 347 status = "disabled";
336 }; 348 };
337 349
338 cmt1: timer@e6130000 { 350 cmt1: timer@e6130000 {
339 compatible = "renesas, 351 compatible = "renesas,r8a77965-cmt1",
340 "renesas, 352 "renesas,rcar-gen3-cmt1";
341 reg = <0 0xe6130000 0 353 reg = <0 0xe6130000 0 0x1004>;
342 interrupts = <GIC_SPI 354 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 355 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 356 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 357 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 358 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 359 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 360 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 361 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&cpg CPG_MOD 362 clocks = <&cpg CPG_MOD 302>;
351 clock-names = "fck"; 363 clock-names = "fck";
352 power-domains = <&sysc 364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
353 resets = <&cpg 302>; 365 resets = <&cpg 302>;
354 status = "disabled"; 366 status = "disabled";
355 }; 367 };
356 368
357 cmt2: timer@e6140000 { 369 cmt2: timer@e6140000 {
358 compatible = "renesas, 370 compatible = "renesas,r8a77965-cmt1",
359 "renesas, 371 "renesas,rcar-gen3-cmt1";
360 reg = <0 0xe6140000 0 372 reg = <0 0xe6140000 0 0x1004>;
361 interrupts = <GIC_SPI 373 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 374 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 375 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 376 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 377 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 378 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 379 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 380 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 381 clocks = <&cpg CPG_MOD 301>;
370 clock-names = "fck"; 382 clock-names = "fck";
371 power-domains = <&sysc 383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
372 resets = <&cpg 301>; 384 resets = <&cpg 301>;
373 status = "disabled"; 385 status = "disabled";
374 }; 386 };
375 387
376 cmt3: timer@e6148000 { 388 cmt3: timer@e6148000 {
377 compatible = "renesas, 389 compatible = "renesas,r8a77965-cmt1",
378 "renesas, 390 "renesas,rcar-gen3-cmt1";
379 reg = <0 0xe6148000 0 391 reg = <0 0xe6148000 0 0x1004>;
380 interrupts = <GIC_SPI 392 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 393 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 394 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 395 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 396 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 397 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 398 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 399 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 400 clocks = <&cpg CPG_MOD 300>;
389 clock-names = "fck"; 401 clock-names = "fck";
390 power-domains = <&sysc 402 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
391 resets = <&cpg 300>; 403 resets = <&cpg 300>;
392 status = "disabled"; 404 status = "disabled";
393 }; 405 };
394 406
395 cpg: clock-controller@e6150000 407 cpg: clock-controller@e6150000 {
396 compatible = "renesas, 408 compatible = "renesas,r8a77965-cpg-mssr";
397 reg = <0 0xe6150000 0 409 reg = <0 0xe6150000 0 0x1000>;
398 clocks = <&extal_clk>, 410 clocks = <&extal_clk>, <&extalr_clk>;
399 clock-names = "extal", 411 clock-names = "extal", "extalr";
400 #clock-cells = <2>; 412 #clock-cells = <2>;
401 #power-domain-cells = 413 #power-domain-cells = <0>;
402 #reset-cells = <1>; 414 #reset-cells = <1>;
403 }; 415 };
404 416
405 rst: reset-controller@e6160000 417 rst: reset-controller@e6160000 {
406 compatible = "renesas, 418 compatible = "renesas,r8a77965-rst";
407 reg = <0 0xe6160000 0 419 reg = <0 0xe6160000 0 0x0200>;
408 }; 420 };
409 421
410 sysc: system-controller@e61800 422 sysc: system-controller@e6180000 {
411 compatible = "renesas, 423 compatible = "renesas,r8a77965-sysc";
412 reg = <0 0xe6180000 0 424 reg = <0 0xe6180000 0 0x0400>;
413 #power-domain-cells = 425 #power-domain-cells = <1>;
414 }; 426 };
415 427
416 tsc: thermal@e6198000 { 428 tsc: thermal@e6198000 {
417 compatible = "renesas, 429 compatible = "renesas,r8a77965-thermal";
418 reg = <0 0xe6198000 0 430 reg = <0 0xe6198000 0 0x100>,
419 <0 0xe61a0000 0 431 <0 0xe61a0000 0 0x100>,
420 <0 0xe61a8000 0 432 <0 0xe61a8000 0 0x100>;
421 interrupts = <GIC_SPI 433 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 434 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 435 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 436 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc 437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
426 resets = <&cpg 522>; 438 resets = <&cpg 522>;
427 #thermal-sensor-cells 439 #thermal-sensor-cells = <1>;
428 }; 440 };
429 441
430 intc_ex: interrupt-controller@ 442 intc_ex: interrupt-controller@e61c0000 {
431 compatible = "renesas, 443 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
432 #interrupt-cells = <2> 444 #interrupt-cells = <2>;
433 interrupt-controller; 445 interrupt-controller;
434 reg = <0 0xe61c0000 0 446 reg = <0 0xe61c0000 0 0x200>;
435 interrupts = <GIC_SPI 447 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
436 <GIC_SPI 448 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
437 <GIC_SPI 449 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
438 <GIC_SPI 450 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
439 <GIC_SPI 451 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 452 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 453 clocks = <&cpg CPG_MOD 407>;
442 power-domains = <&sysc 454 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
443 resets = <&cpg 407>; 455 resets = <&cpg 407>;
444 }; 456 };
445 457
446 tmu0: timer@e61e0000 { 458 tmu0: timer@e61e0000 {
447 compatible = "renesas, 459 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
448 reg = <0 0xe61e0000 0 460 reg = <0 0xe61e0000 0 0x30>;
449 interrupts = <GIC_SPI 461 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
450 <GIC_SPI 462 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 463 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
452 interrupt-names = "tun <<
453 clocks = <&cpg CPG_MOD 464 clocks = <&cpg CPG_MOD 125>;
454 clock-names = "fck"; 465 clock-names = "fck";
455 power-domains = <&sysc 466 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
456 resets = <&cpg 125>; 467 resets = <&cpg 125>;
457 status = "disabled"; 468 status = "disabled";
458 }; 469 };
459 470
460 tmu1: timer@e6fc0000 { 471 tmu1: timer@e6fc0000 {
461 compatible = "renesas, 472 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
462 reg = <0 0xe6fc0000 0 473 reg = <0 0xe6fc0000 0 0x30>;
463 interrupts = <GIC_SPI 474 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
464 <GIC_SPI 475 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
465 <GIC_SPI !! 476 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
466 <GIC_SPI <<
467 interrupt-names = "tun <<
468 clocks = <&cpg CPG_MOD 477 clocks = <&cpg CPG_MOD 124>;
469 clock-names = "fck"; 478 clock-names = "fck";
470 power-domains = <&sysc 479 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
471 resets = <&cpg 124>; 480 resets = <&cpg 124>;
472 status = "disabled"; 481 status = "disabled";
473 }; 482 };
474 483
475 tmu2: timer@e6fd0000 { 484 tmu2: timer@e6fd0000 {
476 compatible = "renesas, 485 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
477 reg = <0 0xe6fd0000 0 486 reg = <0 0xe6fd0000 0 0x30>;
478 interrupts = <GIC_SPI 487 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 488 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI !! 489 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
481 <GIC_SPI <<
482 interrupt-names = "tun <<
483 clocks = <&cpg CPG_MOD 490 clocks = <&cpg CPG_MOD 123>;
484 clock-names = "fck"; 491 clock-names = "fck";
485 power-domains = <&sysc 492 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
486 resets = <&cpg 123>; 493 resets = <&cpg 123>;
487 status = "disabled"; 494 status = "disabled";
488 }; 495 };
489 496
490 tmu3: timer@e6fe0000 { 497 tmu3: timer@e6fe0000 {
491 compatible = "renesas, 498 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
492 reg = <0 0xe6fe0000 0 499 reg = <0 0xe6fe0000 0 0x30>;
493 interrupts = <GIC_SPI 500 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
494 <GIC_SPI 501 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
495 <GIC_SPI 502 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
496 interrupt-names = "tun <<
497 clocks = <&cpg CPG_MOD 503 clocks = <&cpg CPG_MOD 122>;
498 clock-names = "fck"; 504 clock-names = "fck";
499 power-domains = <&sysc 505 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
500 resets = <&cpg 122>; 506 resets = <&cpg 122>;
501 status = "disabled"; 507 status = "disabled";
502 }; 508 };
503 509
504 tmu4: timer@ffc00000 { 510 tmu4: timer@ffc00000 {
505 compatible = "renesas, 511 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
506 reg = <0 0xffc00000 0 512 reg = <0 0xffc00000 0 0x30>;
507 interrupts = <GIC_SPI 513 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 514 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 515 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
510 interrupt-names = "tun <<
511 clocks = <&cpg CPG_MOD 516 clocks = <&cpg CPG_MOD 121>;
512 clock-names = "fck"; 517 clock-names = "fck";
513 power-domains = <&sysc 518 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
514 resets = <&cpg 121>; 519 resets = <&cpg 121>;
515 status = "disabled"; 520 status = "disabled";
516 }; 521 };
517 522
518 i2c0: i2c@e6500000 { 523 i2c0: i2c@e6500000 {
519 #address-cells = <1>; 524 #address-cells = <1>;
520 #size-cells = <0>; 525 #size-cells = <0>;
521 compatible = "renesas, 526 compatible = "renesas,i2c-r8a77965",
522 "renesas, 527 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6500000 0 528 reg = <0 0xe6500000 0 0x40>;
524 interrupts = <GIC_SPI 529 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 530 clocks = <&cpg CPG_MOD 931>;
526 power-domains = <&sysc 531 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
527 resets = <&cpg 931>; 532 resets = <&cpg 931>;
528 dmas = <&dmac1 0x91>, 533 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
529 <&dmac2 0x91>, 534 <&dmac2 0x91>, <&dmac2 0x90>;
530 dma-names = "tx", "rx" 535 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 536 i2c-scl-internal-delay-ns = <110>;
532 status = "disabled"; 537 status = "disabled";
533 }; 538 };
534 539
535 i2c1: i2c@e6508000 { 540 i2c1: i2c@e6508000 {
536 #address-cells = <1>; 541 #address-cells = <1>;
537 #size-cells = <0>; 542 #size-cells = <0>;
538 compatible = "renesas, 543 compatible = "renesas,i2c-r8a77965",
539 "renesas, 544 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe6508000 0 545 reg = <0 0xe6508000 0 0x40>;
541 interrupts = <GIC_SPI 546 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 547 clocks = <&cpg CPG_MOD 930>;
543 power-domains = <&sysc 548 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
544 resets = <&cpg 930>; 549 resets = <&cpg 930>;
545 dmas = <&dmac1 0x93>, 550 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
546 <&dmac2 0x93>, 551 <&dmac2 0x93>, <&dmac2 0x92>;
547 dma-names = "tx", "rx" 552 dma-names = "tx", "rx", "tx", "rx";
548 i2c-scl-internal-delay 553 i2c-scl-internal-delay-ns = <6>;
549 status = "disabled"; 554 status = "disabled";
550 }; 555 };
551 556
552 i2c2: i2c@e6510000 { 557 i2c2: i2c@e6510000 {
553 #address-cells = <1>; 558 #address-cells = <1>;
554 #size-cells = <0>; 559 #size-cells = <0>;
555 compatible = "renesas, 560 compatible = "renesas,i2c-r8a77965",
556 "renesas, 561 "renesas,rcar-gen3-i2c";
557 reg = <0 0xe6510000 0 562 reg = <0 0xe6510000 0 0x40>;
558 interrupts = <GIC_SPI 563 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 564 clocks = <&cpg CPG_MOD 929>;
560 power-domains = <&sysc 565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
561 resets = <&cpg 929>; 566 resets = <&cpg 929>;
562 dmas = <&dmac1 0x95>, 567 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
563 <&dmac2 0x95>, 568 <&dmac2 0x95>, <&dmac2 0x94>;
564 dma-names = "tx", "rx" 569 dma-names = "tx", "rx", "tx", "rx";
565 i2c-scl-internal-delay 570 i2c-scl-internal-delay-ns = <6>;
566 status = "disabled"; 571 status = "disabled";
567 }; 572 };
568 573
569 i2c3: i2c@e66d0000 { 574 i2c3: i2c@e66d0000 {
570 #address-cells = <1>; 575 #address-cells = <1>;
571 #size-cells = <0>; 576 #size-cells = <0>;
572 compatible = "renesas, 577 compatible = "renesas,i2c-r8a77965",
573 "renesas, 578 "renesas,rcar-gen3-i2c";
574 reg = <0 0xe66d0000 0 579 reg = <0 0xe66d0000 0 0x40>;
575 interrupts = <GIC_SPI 580 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 581 clocks = <&cpg CPG_MOD 928>;
577 power-domains = <&sysc 582 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
578 resets = <&cpg 928>; 583 resets = <&cpg 928>;
579 dmas = <&dmac0 0x97>, 584 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
580 dma-names = "tx", "rx" 585 dma-names = "tx", "rx";
581 i2c-scl-internal-delay 586 i2c-scl-internal-delay-ns = <110>;
582 status = "disabled"; 587 status = "disabled";
583 }; 588 };
584 589
585 i2c4: i2c@e66d8000 { 590 i2c4: i2c@e66d8000 {
586 #address-cells = <1>; 591 #address-cells = <1>;
587 #size-cells = <0>; 592 #size-cells = <0>;
588 compatible = "renesas, 593 compatible = "renesas,i2c-r8a77965",
589 "renesas, 594 "renesas,rcar-gen3-i2c";
590 reg = <0 0xe66d8000 0 595 reg = <0 0xe66d8000 0 0x40>;
591 interrupts = <GIC_SPI 596 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&cpg CPG_MOD 597 clocks = <&cpg CPG_MOD 927>;
593 power-domains = <&sysc 598 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
594 resets = <&cpg 927>; 599 resets = <&cpg 927>;
595 dmas = <&dmac0 0x99>, 600 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
596 dma-names = "tx", "rx" 601 dma-names = "tx", "rx";
597 i2c-scl-internal-delay 602 i2c-scl-internal-delay-ns = <110>;
598 status = "disabled"; 603 status = "disabled";
599 }; 604 };
600 605
601 i2c5: i2c@e66e0000 { 606 i2c5: i2c@e66e0000 {
602 #address-cells = <1>; 607 #address-cells = <1>;
603 #size-cells = <0>; 608 #size-cells = <0>;
604 compatible = "renesas, 609 compatible = "renesas,i2c-r8a77965",
605 "renesas, 610 "renesas,rcar-gen3-i2c";
606 reg = <0 0xe66e0000 0 611 reg = <0 0xe66e0000 0 0x40>;
607 interrupts = <GIC_SPI 612 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&cpg CPG_MOD 613 clocks = <&cpg CPG_MOD 919>;
609 power-domains = <&sysc 614 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
610 resets = <&cpg 919>; 615 resets = <&cpg 919>;
611 dmas = <&dmac0 0x9b>, 616 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
612 dma-names = "tx", "rx" 617 dma-names = "tx", "rx";
613 i2c-scl-internal-delay 618 i2c-scl-internal-delay-ns = <110>;
614 status = "disabled"; 619 status = "disabled";
615 }; 620 };
616 621
617 i2c6: i2c@e66e8000 { 622 i2c6: i2c@e66e8000 {
618 #address-cells = <1>; 623 #address-cells = <1>;
619 #size-cells = <0>; 624 #size-cells = <0>;
620 compatible = "renesas, 625 compatible = "renesas,i2c-r8a77965",
621 "renesas, 626 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66e8000 0 627 reg = <0 0xe66e8000 0 0x40>;
623 interrupts = <GIC_SPI 628 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&cpg CPG_MOD 629 clocks = <&cpg CPG_MOD 918>;
625 power-domains = <&sysc 630 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
626 resets = <&cpg 918>; 631 resets = <&cpg 918>;
627 dmas = <&dmac0 0x9d>, 632 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
628 dma-names = "tx", "rx" 633 dma-names = "tx", "rx";
629 i2c-scl-internal-delay 634 i2c-scl-internal-delay-ns = <6>;
630 status = "disabled"; 635 status = "disabled";
631 }; 636 };
632 637
633 i2c_dvfs: i2c@e60b0000 { 638 i2c_dvfs: i2c@e60b0000 {
634 #address-cells = <1>; 639 #address-cells = <1>;
635 #size-cells = <0>; 640 #size-cells = <0>;
636 compatible = "renesas, 641 compatible = "renesas,iic-r8a77965",
637 "renesas, 642 "renesas,rcar-gen3-iic",
638 "renesas, 643 "renesas,rmobile-iic";
639 reg = <0 0xe60b0000 0 644 reg = <0 0xe60b0000 0 0x425>;
640 interrupts = <GIC_SPI 645 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&cpg CPG_MOD 646 clocks = <&cpg CPG_MOD 926>;
642 power-domains = <&sysc 647 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
643 resets = <&cpg 926>; 648 resets = <&cpg 926>;
644 dmas = <&dmac0 0x11>, 649 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
645 dma-names = "tx", "rx" 650 dma-names = "tx", "rx";
646 status = "disabled"; 651 status = "disabled";
647 }; 652 };
648 653
649 hscif0: serial@e6540000 { 654 hscif0: serial@e6540000 {
650 compatible = "renesas, 655 compatible = "renesas,hscif-r8a77965",
651 "renesas, 656 "renesas,rcar-gen3-hscif",
652 "renesas, 657 "renesas,hscif";
653 reg = <0 0xe6540000 0 658 reg = <0 0xe6540000 0 0x60>;
654 interrupts = <GIC_SPI 659 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 660 clocks = <&cpg CPG_MOD 520>,
656 <&cpg CPG_COR 661 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
657 <&scif_clk>; 662 <&scif_clk>;
658 clock-names = "fck", " 663 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x31>, 664 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
660 <&dmac2 0x31>, 665 <&dmac2 0x31>, <&dmac2 0x30>;
661 dma-names = "tx", "rx" 666 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 667 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
663 resets = <&cpg 520>; 668 resets = <&cpg 520>;
664 status = "disabled"; 669 status = "disabled";
665 }; 670 };
666 671
667 hscif1: serial@e6550000 { 672 hscif1: serial@e6550000 {
668 compatible = "renesas, 673 compatible = "renesas,hscif-r8a77965",
669 "renesas, 674 "renesas,rcar-gen3-hscif",
670 "renesas, 675 "renesas,hscif";
671 reg = <0 0xe6550000 0 676 reg = <0 0xe6550000 0 0x60>;
672 interrupts = <GIC_SPI 677 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 678 clocks = <&cpg CPG_MOD 519>,
674 <&cpg CPG_COR 679 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
675 <&scif_clk>; 680 <&scif_clk>;
676 clock-names = "fck", " 681 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac1 0x33>, 682 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
678 <&dmac2 0x33>, 683 <&dmac2 0x33>, <&dmac2 0x32>;
679 dma-names = "tx", "rx" 684 dma-names = "tx", "rx", "tx", "rx";
680 power-domains = <&sysc 685 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
681 resets = <&cpg 519>; 686 resets = <&cpg 519>;
682 status = "disabled"; 687 status = "disabled";
683 }; 688 };
684 689
685 hscif2: serial@e6560000 { 690 hscif2: serial@e6560000 {
686 compatible = "renesas, 691 compatible = "renesas,hscif-r8a77965",
687 "renesas, 692 "renesas,rcar-gen3-hscif",
688 "renesas, 693 "renesas,hscif";
689 reg = <0 0xe6560000 0 694 reg = <0 0xe6560000 0 0x60>;
690 interrupts = <GIC_SPI 695 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&cpg CPG_MOD 696 clocks = <&cpg CPG_MOD 518>,
692 <&cpg CPG_COR 697 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
693 <&scif_clk>; 698 <&scif_clk>;
694 clock-names = "fck", " 699 clock-names = "fck", "brg_int", "scif_clk";
695 dmas = <&dmac1 0x35>, 700 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
696 <&dmac2 0x35>, 701 <&dmac2 0x35>, <&dmac2 0x34>;
697 dma-names = "tx", "rx" 702 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc 703 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
699 resets = <&cpg 518>; 704 resets = <&cpg 518>;
700 status = "disabled"; 705 status = "disabled";
701 }; 706 };
702 707
703 hscif3: serial@e66a0000 { 708 hscif3: serial@e66a0000 {
704 compatible = "renesas, 709 compatible = "renesas,hscif-r8a77965",
705 "renesas, 710 "renesas,rcar-gen3-hscif",
706 "renesas, 711 "renesas,hscif";
707 reg = <0 0xe66a0000 0 712 reg = <0 0xe66a0000 0 0x60>;
708 interrupts = <GIC_SPI 713 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 714 clocks = <&cpg CPG_MOD 517>,
710 <&cpg CPG_COR 715 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
711 <&scif_clk>; 716 <&scif_clk>;
712 clock-names = "fck", " 717 clock-names = "fck", "brg_int", "scif_clk";
713 dmas = <&dmac0 0x37>, 718 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
714 dma-names = "tx", "rx" 719 dma-names = "tx", "rx";
715 power-domains = <&sysc 720 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
716 resets = <&cpg 517>; 721 resets = <&cpg 517>;
717 status = "disabled"; 722 status = "disabled";
718 }; 723 };
719 724
720 hscif4: serial@e66b0000 { 725 hscif4: serial@e66b0000 {
721 compatible = "renesas, 726 compatible = "renesas,hscif-r8a77965",
722 "renesas, 727 "renesas,rcar-gen3-hscif",
723 "renesas, 728 "renesas,hscif";
724 reg = <0 0xe66b0000 0 729 reg = <0 0xe66b0000 0 0x60>;
725 interrupts = <GIC_SPI 730 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 731 clocks = <&cpg CPG_MOD 516>,
727 <&cpg CPG_COR 732 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
728 <&scif_clk>; 733 <&scif_clk>;
729 clock-names = "fck", " 734 clock-names = "fck", "brg_int", "scif_clk";
730 dmas = <&dmac0 0x39>, 735 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
731 dma-names = "tx", "rx" 736 dma-names = "tx", "rx";
732 power-domains = <&sysc 737 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
733 resets = <&cpg 516>; 738 resets = <&cpg 516>;
734 status = "disabled"; 739 status = "disabled";
735 }; 740 };
736 741
737 hsusb: usb@e6590000 { 742 hsusb: usb@e6590000 {
738 compatible = "renesas, 743 compatible = "renesas,usbhs-r8a77965",
739 "renesas, 744 "renesas,rcar-gen3-usbhs";
740 reg = <0 0xe6590000 0 745 reg = <0 0xe6590000 0 0x200>;
741 interrupts = <GIC_SPI 746 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 747 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
743 dmas = <&usb_dmac0 0>, 748 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
744 <&usb_dmac1 0>, 749 <&usb_dmac1 0>, <&usb_dmac1 1>;
745 dma-names = "ch0", "ch 750 dma-names = "ch0", "ch1", "ch2", "ch3";
746 renesas,buswait = <11> 751 renesas,buswait = <11>;
747 phys = <&usb2_phy0 3>; 752 phys = <&usb2_phy0 3>;
748 phy-names = "usb"; 753 phy-names = "usb";
749 power-domains = <&sysc 754 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
750 resets = <&cpg 704>, < 755 resets = <&cpg 704>, <&cpg 703>;
751 status = "disabled"; 756 status = "disabled";
752 }; 757 };
753 758
754 usb_dmac0: dma-controller@e65a 759 usb_dmac0: dma-controller@e65a0000 {
755 compatible = "renesas, 760 compatible = "renesas,r8a77965-usb-dmac",
756 "renesas, 761 "renesas,usb-dmac";
757 reg = <0 0xe65a0000 0 762 reg = <0 0xe65a0000 0 0x100>;
758 interrupts = <GIC_SPI 763 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 764 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
760 interrupt-names = "ch0 765 interrupt-names = "ch0", "ch1";
761 clocks = <&cpg CPG_MOD 766 clocks = <&cpg CPG_MOD 330>;
762 power-domains = <&sysc 767 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
763 resets = <&cpg 330>; 768 resets = <&cpg 330>;
764 #dma-cells = <1>; 769 #dma-cells = <1>;
765 dma-channels = <2>; 770 dma-channels = <2>;
766 }; 771 };
767 772
768 usb_dmac1: dma-controller@e65b 773 usb_dmac1: dma-controller@e65b0000 {
769 compatible = "renesas, 774 compatible = "renesas,r8a77965-usb-dmac",
770 "renesas, 775 "renesas,usb-dmac";
771 reg = <0 0xe65b0000 0 776 reg = <0 0xe65b0000 0 0x100>;
772 interrupts = <GIC_SPI 777 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 778 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
774 interrupt-names = "ch0 779 interrupt-names = "ch0", "ch1";
775 clocks = <&cpg CPG_MOD 780 clocks = <&cpg CPG_MOD 331>;
776 power-domains = <&sysc 781 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
777 resets = <&cpg 331>; 782 resets = <&cpg 331>;
778 #dma-cells = <1>; 783 #dma-cells = <1>;
779 dma-channels = <2>; 784 dma-channels = <2>;
780 }; 785 };
781 786
782 usb3_phy0: usb-phy@e65ee000 { 787 usb3_phy0: usb-phy@e65ee000 {
783 compatible = "renesas, 788 compatible = "renesas,r8a77965-usb3-phy",
784 "renesas, 789 "renesas,rcar-gen3-usb3-phy";
785 reg = <0 0xe65ee000 0 790 reg = <0 0xe65ee000 0 0x90>;
786 clocks = <&cpg CPG_MOD 791 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
787 <&usb_extal_c 792 <&usb_extal_clk>;
788 clock-names = "usb3-if 793 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
789 power-domains = <&sysc 794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
790 resets = <&cpg 328>; 795 resets = <&cpg 328>;
791 #phy-cells = <0>; 796 #phy-cells = <0>;
792 status = "disabled"; 797 status = "disabled";
793 }; 798 };
794 799
795 arm_cc630p: crypto@e6601000 { 800 arm_cc630p: crypto@e6601000 {
796 compatible = "arm,cryp 801 compatible = "arm,cryptocell-630p-ree";
797 interrupts = <GIC_SPI 802 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
798 reg = <0x0 0xe6601000 803 reg = <0x0 0xe6601000 0 0x1000>;
799 clocks = <&cpg CPG_MOD 804 clocks = <&cpg CPG_MOD 229>;
800 resets = <&cpg 229>; 805 resets = <&cpg 229>;
801 power-domains = <&sysc 806 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
802 }; 807 };
803 808
804 dmac0: dma-controller@e6700000 809 dmac0: dma-controller@e6700000 {
805 compatible = "renesas, 810 compatible = "renesas,dmac-r8a77965",
806 "renesas, 811 "renesas,rcar-dmac";
807 reg = <0 0xe6700000 0 812 reg = <0 0xe6700000 0 0x10000>;
808 interrupts = <GIC_SPI 813 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 814 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 815 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 816 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 817 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 818 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 819 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 820 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 821 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 822 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
818 <GIC_SPI 823 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_SPI 824 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_SPI 825 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_SPI 826 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 827 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 828 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 829 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "err 830 interrupt-names = "error",
826 "ch0", 831 "ch0", "ch1", "ch2", "ch3",
827 "ch4", 832 "ch4", "ch5", "ch6", "ch7",
828 "ch8", 833 "ch8", "ch9", "ch10", "ch11",
829 "ch12" 834 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 835 clocks = <&cpg CPG_MOD 219>;
831 clock-names = "fck"; 836 clock-names = "fck";
832 power-domains = <&sysc 837 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
833 resets = <&cpg 219>; 838 resets = <&cpg 219>;
834 #dma-cells = <1>; 839 #dma-cells = <1>;
835 dma-channels = <16>; 840 dma-channels = <16>;
836 iommus = <&ipmmu_ds0 0 841 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
837 <&ipmmu_ds0 2>, 842 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
838 <&ipmmu_ds0 4>, 843 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
839 <&ipmmu_ds0 6>, 844 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
840 <&ipmmu_ds0 8>, 845 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
841 <&ipmmu_ds0 10> 846 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
842 <&ipmmu_ds0 12> 847 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
843 <&ipmmu_ds0 14> 848 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
844 }; 849 };
845 850
846 dmac1: dma-controller@e7300000 851 dmac1: dma-controller@e7300000 {
847 compatible = "renesas, 852 compatible = "renesas,dmac-r8a77965",
848 "renesas, 853 "renesas,rcar-dmac";
849 reg = <0 0xe7300000 0 854 reg = <0 0xe7300000 0 0x10000>;
850 interrupts = <GIC_SPI 855 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 856 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 857 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 858 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 859 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 860 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 861 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 862 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 863 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 864 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 865 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 866 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
862 <GIC_SPI 867 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 868 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 869 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 870 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 871 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
867 interrupt-names = "err 872 interrupt-names = "error",
868 "ch0", 873 "ch0", "ch1", "ch2", "ch3",
869 "ch4", 874 "ch4", "ch5", "ch6", "ch7",
870 "ch8", 875 "ch8", "ch9", "ch10", "ch11",
871 "ch12" 876 "ch12", "ch13", "ch14", "ch15";
872 clocks = <&cpg CPG_MOD 877 clocks = <&cpg CPG_MOD 218>;
873 clock-names = "fck"; 878 clock-names = "fck";
874 power-domains = <&sysc 879 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 resets = <&cpg 218>; 880 resets = <&cpg 218>;
876 #dma-cells = <1>; 881 #dma-cells = <1>;
877 dma-channels = <16>; 882 dma-channels = <16>;
878 iommus = <&ipmmu_ds1 0 883 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
879 <&ipmmu_ds1 2>, 884 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
880 <&ipmmu_ds1 4>, 885 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
881 <&ipmmu_ds1 6>, 886 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
882 <&ipmmu_ds1 8>, 887 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
883 <&ipmmu_ds1 10> 888 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
884 <&ipmmu_ds1 12> 889 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
885 <&ipmmu_ds1 14> 890 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
886 }; 891 };
887 892
888 dmac2: dma-controller@e7310000 893 dmac2: dma-controller@e7310000 {
889 compatible = "renesas, 894 compatible = "renesas,dmac-r8a77965",
890 "renesas, 895 "renesas,rcar-dmac";
891 reg = <0 0xe7310000 0 896 reg = <0 0xe7310000 0 0x10000>;
892 interrupts = <GIC_SPI 897 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
893 <GIC_SPI 898 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
894 <GIC_SPI 899 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
895 <GIC_SPI 900 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
896 <GIC_SPI 901 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
897 <GIC_SPI 902 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
898 <GIC_SPI 903 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
899 <GIC_SPI 904 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
900 <GIC_SPI 905 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
901 <GIC_SPI 906 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
902 <GIC_SPI 907 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
903 <GIC_SPI 908 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
904 <GIC_SPI 909 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
905 <GIC_SPI 910 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
906 <GIC_SPI 911 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
907 <GIC_SPI 912 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
908 <GIC_SPI 913 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
909 interrupt-names = "err 914 interrupt-names = "error",
910 "ch0", 915 "ch0", "ch1", "ch2", "ch3",
911 "ch4", 916 "ch4", "ch5", "ch6", "ch7",
912 "ch8", 917 "ch8", "ch9", "ch10", "ch11",
913 "ch12" 918 "ch12", "ch13", "ch14", "ch15";
914 clocks = <&cpg CPG_MOD 919 clocks = <&cpg CPG_MOD 217>;
915 clock-names = "fck"; 920 clock-names = "fck";
916 power-domains = <&sysc 921 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
917 resets = <&cpg 217>; 922 resets = <&cpg 217>;
918 #dma-cells = <1>; 923 #dma-cells = <1>;
919 dma-channels = <16>; 924 dma-channels = <16>;
920 iommus = <&ipmmu_ds1 1 925 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
921 <&ipmmu_ds1 18> 926 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
922 <&ipmmu_ds1 20> 927 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
923 <&ipmmu_ds1 22> 928 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
924 <&ipmmu_ds1 24> 929 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
925 <&ipmmu_ds1 26> 930 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
926 <&ipmmu_ds1 28> 931 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
927 <&ipmmu_ds1 30> 932 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
928 }; 933 };
929 934
930 ipmmu_ds0: iommu@e6740000 { 935 ipmmu_ds0: iommu@e6740000 {
931 compatible = "renesas, 936 compatible = "renesas,ipmmu-r8a77965";
932 reg = <0 0xe6740000 0 937 reg = <0 0xe6740000 0 0x1000>;
933 renesas,ipmmu-main = < 938 renesas,ipmmu-main = <&ipmmu_mm 0>;
934 power-domains = <&sysc 939 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 940 #iommu-cells = <1>;
936 }; 941 };
937 942
938 ipmmu_ds1: iommu@e7740000 { 943 ipmmu_ds1: iommu@e7740000 {
939 compatible = "renesas, 944 compatible = "renesas,ipmmu-r8a77965";
940 reg = <0 0xe7740000 0 945 reg = <0 0xe7740000 0 0x1000>;
941 renesas,ipmmu-main = < 946 renesas,ipmmu-main = <&ipmmu_mm 1>;
942 power-domains = <&sysc 947 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
943 #iommu-cells = <1>; 948 #iommu-cells = <1>;
944 }; 949 };
945 950
946 ipmmu_hc: iommu@e6570000 { 951 ipmmu_hc: iommu@e6570000 {
947 compatible = "renesas, 952 compatible = "renesas,ipmmu-r8a77965";
948 reg = <0 0xe6570000 0 953 reg = <0 0xe6570000 0 0x1000>;
949 renesas,ipmmu-main = < 954 renesas,ipmmu-main = <&ipmmu_mm 2>;
950 power-domains = <&sysc 955 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 956 #iommu-cells = <1>;
952 }; 957 };
953 958
954 ipmmu_mm: iommu@e67b0000 { 959 ipmmu_mm: iommu@e67b0000 {
955 compatible = "renesas, 960 compatible = "renesas,ipmmu-r8a77965";
956 reg = <0 0xe67b0000 0 961 reg = <0 0xe67b0000 0 0x1000>;
957 interrupts = <GIC_SPI 962 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 963 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
959 power-domains = <&sysc 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
960 #iommu-cells = <1>; 965 #iommu-cells = <1>;
961 }; 966 };
962 967
963 ipmmu_mp: iommu@ec670000 { 968 ipmmu_mp: iommu@ec670000 {
964 compatible = "renesas, 969 compatible = "renesas,ipmmu-r8a77965";
965 reg = <0 0xec670000 0 970 reg = <0 0xec670000 0 0x1000>;
966 renesas,ipmmu-main = < 971 renesas,ipmmu-main = <&ipmmu_mm 4>;
967 power-domains = <&sysc 972 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
968 #iommu-cells = <1>; 973 #iommu-cells = <1>;
969 }; 974 };
970 975
971 ipmmu_pv0: iommu@fd800000 { 976 ipmmu_pv0: iommu@fd800000 {
972 compatible = "renesas, 977 compatible = "renesas,ipmmu-r8a77965";
973 reg = <0 0xfd800000 0 978 reg = <0 0xfd800000 0 0x1000>;
974 renesas,ipmmu-main = < 979 renesas,ipmmu-main = <&ipmmu_mm 6>;
975 power-domains = <&sysc 980 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
976 #iommu-cells = <1>; 981 #iommu-cells = <1>;
977 }; 982 };
978 983
979 ipmmu_rt: iommu@ffc80000 { 984 ipmmu_rt: iommu@ffc80000 {
980 compatible = "renesas, 985 compatible = "renesas,ipmmu-r8a77965";
981 reg = <0 0xffc80000 0 986 reg = <0 0xffc80000 0 0x1000>;
982 renesas,ipmmu-main = < 987 renesas,ipmmu-main = <&ipmmu_mm 10>;
983 power-domains = <&sysc 988 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
984 #iommu-cells = <1>; 989 #iommu-cells = <1>;
985 }; 990 };
986 991
987 ipmmu_vc0: iommu@fe6b0000 { 992 ipmmu_vc0: iommu@fe6b0000 {
988 compatible = "renesas, 993 compatible = "renesas,ipmmu-r8a77965";
989 reg = <0 0xfe6b0000 0 994 reg = <0 0xfe6b0000 0 0x1000>;
990 renesas,ipmmu-main = < 995 renesas,ipmmu-main = <&ipmmu_mm 12>;
991 power-domains = <&sysc 996 power-domains = <&sysc R8A77965_PD_A3VC>;
992 #iommu-cells = <1>; 997 #iommu-cells = <1>;
993 }; 998 };
994 999
995 ipmmu_vi0: iommu@febd0000 { 1000 ipmmu_vi0: iommu@febd0000 {
996 compatible = "renesas, 1001 compatible = "renesas,ipmmu-r8a77965";
997 reg = <0 0xfebd0000 0 1002 reg = <0 0xfebd0000 0 0x1000>;
998 renesas,ipmmu-main = < 1003 renesas,ipmmu-main = <&ipmmu_mm 14>;
999 power-domains = <&sysc 1004 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1000 #iommu-cells = <1>; 1005 #iommu-cells = <1>;
1001 }; 1006 };
1002 1007
1003 ipmmu_vp0: iommu@fe990000 { 1008 ipmmu_vp0: iommu@fe990000 {
1004 compatible = "renesas 1009 compatible = "renesas,ipmmu-r8a77965";
1005 reg = <0 0xfe990000 0 1010 reg = <0 0xfe990000 0 0x1000>;
1006 renesas,ipmmu-main = 1011 renesas,ipmmu-main = <&ipmmu_mm 16>;
1007 power-domains = <&sys 1012 power-domains = <&sysc R8A77965_PD_A3VP>;
1008 #iommu-cells = <1>; 1013 #iommu-cells = <1>;
1009 }; 1014 };
1010 1015
1011 avb: ethernet@e6800000 { 1016 avb: ethernet@e6800000 {
1012 compatible = "renesas 1017 compatible = "renesas,etheravb-r8a77965",
1013 "renesas 1018 "renesas,etheravb-rcar-gen3";
1014 reg = <0 0xe6800000 0 1019 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1015 interrupts = <GIC_SPI 1020 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1016 <GIC_SPI 1021 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 1022 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 1023 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 1024 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 1025 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 1026 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 1027 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 1028 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 1029 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 1030 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 1031 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 1032 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 1033 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 1034 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 1035 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 1036 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 1037 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 1038 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 1039 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 1040 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 1041 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 1042 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 1043 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 1044 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1040 interrupt-names = "ch 1045 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1041 "ch 1046 "ch4", "ch5", "ch6", "ch7",
1042 "ch 1047 "ch8", "ch9", "ch10", "ch11",
1043 "ch 1048 "ch12", "ch13", "ch14", "ch15",
1044 "ch 1049 "ch16", "ch17", "ch18", "ch19",
1045 "ch 1050 "ch20", "ch21", "ch22", "ch23",
1046 "ch 1051 "ch24";
1047 clocks = <&cpg CPG_MO 1052 clocks = <&cpg CPG_MOD 812>;
1048 clock-names = "fck"; <<
1049 power-domains = <&sys 1053 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1050 resets = <&cpg 812>; 1054 resets = <&cpg 812>;
1051 phy-mode = "rgmii"; 1055 phy-mode = "rgmii";
1052 rx-internal-delay-ps 1056 rx-internal-delay-ps = <0>;
1053 tx-internal-delay-ps 1057 tx-internal-delay-ps = <0>;
1054 iommus = <&ipmmu_ds0 1058 iommus = <&ipmmu_ds0 16>;
1055 #address-cells = <1>; 1059 #address-cells = <1>;
1056 #size-cells = <0>; 1060 #size-cells = <0>;
1057 status = "disabled"; 1061 status = "disabled";
1058 }; 1062 };
1059 1063
1060 can0: can@e6c30000 { 1064 can0: can@e6c30000 {
1061 compatible = "renesas 1065 compatible = "renesas,can-r8a77965",
1062 "renesas 1066 "renesas,rcar-gen3-can";
1063 reg = <0 0xe6c30000 0 1067 reg = <0 0xe6c30000 0 0x1000>;
1064 interrupts = <GIC_SPI 1068 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&cpg CPG_MO 1069 clocks = <&cpg CPG_MOD 916>,
1066 <&cpg CPG_CORE 1070 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1067 <&can_clk>; 1071 <&can_clk>;
1068 clock-names = "clkp1" 1072 clock-names = "clkp1", "clkp2", "can_clk";
1069 assigned-clocks = <&c 1073 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1070 assigned-clock-rates 1074 assigned-clock-rates = <40000000>;
1071 power-domains = <&sys 1075 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1072 resets = <&cpg 916>; 1076 resets = <&cpg 916>;
1073 status = "disabled"; 1077 status = "disabled";
1074 }; 1078 };
1075 1079
1076 can1: can@e6c38000 { 1080 can1: can@e6c38000 {
1077 compatible = "renesas 1081 compatible = "renesas,can-r8a77965",
1078 "renesas 1082 "renesas,rcar-gen3-can";
1079 reg = <0 0xe6c38000 0 1083 reg = <0 0xe6c38000 0 0x1000>;
1080 interrupts = <GIC_SPI 1084 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1081 clocks = <&cpg CPG_MO 1085 clocks = <&cpg CPG_MOD 915>,
1082 <&cpg CPG_CORE 1086 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1083 <&can_clk>; 1087 <&can_clk>;
1084 clock-names = "clkp1" 1088 clock-names = "clkp1", "clkp2", "can_clk";
1085 assigned-clocks = <&c 1089 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1086 assigned-clock-rates 1090 assigned-clock-rates = <40000000>;
1087 power-domains = <&sys 1091 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1088 resets = <&cpg 915>; 1092 resets = <&cpg 915>;
1089 status = "disabled"; 1093 status = "disabled";
1090 }; 1094 };
1091 1095
1092 canfd: can@e66c0000 { 1096 canfd: can@e66c0000 {
1093 compatible = "renesas 1097 compatible = "renesas,r8a77965-canfd",
1094 "renesas 1098 "renesas,rcar-gen3-canfd";
1095 reg = <0 0xe66c0000 0 1099 reg = <0 0xe66c0000 0 0x8000>;
1096 interrupts = <GIC_SPI 1100 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1097 <GIC_SPI 3 1101 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1098 interrupt-names = "ch <<
1099 clocks = <&cpg CPG_MO 1102 clocks = <&cpg CPG_MOD 914>,
1100 <&cpg CPG_CORE 1103 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1101 <&can_clk>; 1104 <&can_clk>;
1102 clock-names = "fck", 1105 clock-names = "fck", "canfd", "can_clk";
1103 assigned-clocks = <&c 1106 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1104 assigned-clock-rates 1107 assigned-clock-rates = <40000000>;
1105 power-domains = <&sys 1108 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1106 resets = <&cpg 914>; 1109 resets = <&cpg 914>;
1107 status = "disabled"; 1110 status = "disabled";
1108 1111
1109 channel0 { 1112 channel0 {
1110 status = "dis 1113 status = "disabled";
1111 }; 1114 };
1112 1115
1113 channel1 { 1116 channel1 {
1114 status = "dis 1117 status = "disabled";
1115 }; 1118 };
1116 }; 1119 };
1117 1120
1118 pwm0: pwm@e6e30000 { 1121 pwm0: pwm@e6e30000 {
1119 compatible = "renesas 1122 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1120 reg = <0 0xe6e30000 0 1123 reg = <0 0xe6e30000 0 8>;
1121 #pwm-cells = <2>; 1124 #pwm-cells = <2>;
1122 clocks = <&cpg CPG_MO 1125 clocks = <&cpg CPG_MOD 523>;
1123 resets = <&cpg 523>; 1126 resets = <&cpg 523>;
1124 power-domains = <&sys 1127 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1125 status = "disabled"; 1128 status = "disabled";
1126 }; 1129 };
1127 1130
1128 pwm1: pwm@e6e31000 { 1131 pwm1: pwm@e6e31000 {
1129 compatible = "renesas 1132 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1130 reg = <0 0xe6e31000 0 1133 reg = <0 0xe6e31000 0 8>;
1131 #pwm-cells = <2>; 1134 #pwm-cells = <2>;
1132 clocks = <&cpg CPG_MO 1135 clocks = <&cpg CPG_MOD 523>;
1133 resets = <&cpg 523>; 1136 resets = <&cpg 523>;
1134 power-domains = <&sys 1137 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1135 status = "disabled"; 1138 status = "disabled";
1136 }; 1139 };
1137 1140
1138 pwm2: pwm@e6e32000 { 1141 pwm2: pwm@e6e32000 {
1139 compatible = "renesas 1142 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1140 reg = <0 0xe6e32000 0 1143 reg = <0 0xe6e32000 0 8>;
1141 #pwm-cells = <2>; 1144 #pwm-cells = <2>;
1142 clocks = <&cpg CPG_MO 1145 clocks = <&cpg CPG_MOD 523>;
1143 resets = <&cpg 523>; 1146 resets = <&cpg 523>;
1144 power-domains = <&sys 1147 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1145 status = "disabled"; 1148 status = "disabled";
1146 }; 1149 };
1147 1150
1148 pwm3: pwm@e6e33000 { 1151 pwm3: pwm@e6e33000 {
1149 compatible = "renesas 1152 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1150 reg = <0 0xe6e33000 0 1153 reg = <0 0xe6e33000 0 8>;
1151 #pwm-cells = <2>; 1154 #pwm-cells = <2>;
1152 clocks = <&cpg CPG_MO 1155 clocks = <&cpg CPG_MOD 523>;
1153 resets = <&cpg 523>; 1156 resets = <&cpg 523>;
1154 power-domains = <&sys 1157 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1155 status = "disabled"; 1158 status = "disabled";
1156 }; 1159 };
1157 1160
1158 pwm4: pwm@e6e34000 { 1161 pwm4: pwm@e6e34000 {
1159 compatible = "renesas 1162 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1160 reg = <0 0xe6e34000 0 1163 reg = <0 0xe6e34000 0 8>;
1161 #pwm-cells = <2>; 1164 #pwm-cells = <2>;
1162 clocks = <&cpg CPG_MO 1165 clocks = <&cpg CPG_MOD 523>;
1163 resets = <&cpg 523>; 1166 resets = <&cpg 523>;
1164 power-domains = <&sys 1167 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1165 status = "disabled"; 1168 status = "disabled";
1166 }; 1169 };
1167 1170
1168 pwm5: pwm@e6e35000 { 1171 pwm5: pwm@e6e35000 {
1169 compatible = "renesas 1172 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1170 reg = <0 0xe6e35000 0 1173 reg = <0 0xe6e35000 0 8>;
1171 #pwm-cells = <2>; 1174 #pwm-cells = <2>;
1172 clocks = <&cpg CPG_MO 1175 clocks = <&cpg CPG_MOD 523>;
1173 resets = <&cpg 523>; 1176 resets = <&cpg 523>;
1174 power-domains = <&sys 1177 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1175 status = "disabled"; 1178 status = "disabled";
1176 }; 1179 };
1177 1180
1178 pwm6: pwm@e6e36000 { 1181 pwm6: pwm@e6e36000 {
1179 compatible = "renesas 1182 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1180 reg = <0 0xe6e36000 0 1183 reg = <0 0xe6e36000 0 8>;
1181 #pwm-cells = <2>; 1184 #pwm-cells = <2>;
1182 clocks = <&cpg CPG_MO 1185 clocks = <&cpg CPG_MOD 523>;
1183 resets = <&cpg 523>; 1186 resets = <&cpg 523>;
1184 power-domains = <&sys 1187 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1185 status = "disabled"; 1188 status = "disabled";
1186 }; 1189 };
1187 1190
1188 scif0: serial@e6e60000 { 1191 scif0: serial@e6e60000 {
1189 compatible = "renesas 1192 compatible = "renesas,scif-r8a77965",
1190 "renesas 1193 "renesas,rcar-gen3-scif", "renesas,scif";
1191 reg = <0 0xe6e60000 0 1194 reg = <0 0xe6e60000 0 64>;
1192 interrupts = <GIC_SPI 1195 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MO 1196 clocks = <&cpg CPG_MOD 207>,
1194 <&cpg CPG_CO 1197 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1195 <&scif_clk>; 1198 <&scif_clk>;
1196 clock-names = "fck", 1199 clock-names = "fck", "brg_int", "scif_clk";
1197 dmas = <&dmac1 0x51>, 1200 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1198 <&dmac2 0x51>, 1201 <&dmac2 0x51>, <&dmac2 0x50>;
1199 dma-names = "tx", "rx 1202 dma-names = "tx", "rx", "tx", "rx";
1200 power-domains = <&sys 1203 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1201 resets = <&cpg 207>; 1204 resets = <&cpg 207>;
1202 status = "disabled"; 1205 status = "disabled";
1203 }; 1206 };
1204 1207
1205 scif1: serial@e6e68000 { 1208 scif1: serial@e6e68000 {
1206 compatible = "renesas 1209 compatible = "renesas,scif-r8a77965",
1207 "renesas 1210 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6e68000 0 1211 reg = <0 0xe6e68000 0 64>;
1209 interrupts = <GIC_SPI 1212 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1213 clocks = <&cpg CPG_MOD 206>,
1211 <&cpg CPG_CO 1214 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1212 <&scif_clk>; 1215 <&scif_clk>;
1213 clock-names = "fck", 1216 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac1 0x53>, 1217 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1215 <&dmac2 0x53>, 1218 <&dmac2 0x53>, <&dmac2 0x52>;
1216 dma-names = "tx", "rx 1219 dma-names = "tx", "rx", "tx", "rx";
1217 power-domains = <&sys 1220 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1218 resets = <&cpg 206>; 1221 resets = <&cpg 206>;
1219 status = "disabled"; 1222 status = "disabled";
1220 }; 1223 };
1221 1224
1222 scif2: serial@e6e88000 { 1225 scif2: serial@e6e88000 {
1223 compatible = "renesas 1226 compatible = "renesas,scif-r8a77965",
1224 "renesas 1227 "renesas,rcar-gen3-scif", "renesas,scif";
1225 reg = <0 0xe6e88000 0 1228 reg = <0 0xe6e88000 0 64>;
1226 interrupts = <GIC_SPI 1229 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MO 1230 clocks = <&cpg CPG_MOD 310>,
1228 <&cpg CPG_CO 1231 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1229 <&scif_clk>; 1232 <&scif_clk>;
1230 clock-names = "fck", 1233 clock-names = "fck", "brg_int", "scif_clk";
1231 dmas = <&dmac1 0x13>, 1234 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1232 <&dmac2 0x13>, 1235 <&dmac2 0x13>, <&dmac2 0x12>;
1233 dma-names = "tx", "rx 1236 dma-names = "tx", "rx", "tx", "rx";
1234 power-domains = <&sys 1237 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1235 resets = <&cpg 310>; 1238 resets = <&cpg 310>;
1236 status = "disabled"; 1239 status = "disabled";
1237 }; 1240 };
1238 1241
1239 scif3: serial@e6c50000 { 1242 scif3: serial@e6c50000 {
1240 compatible = "renesas 1243 compatible = "renesas,scif-r8a77965",
1241 "renesas 1244 "renesas,rcar-gen3-scif", "renesas,scif";
1242 reg = <0 0xe6c50000 0 1245 reg = <0 0xe6c50000 0 64>;
1243 interrupts = <GIC_SPI 1246 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1244 clocks = <&cpg CPG_MO 1247 clocks = <&cpg CPG_MOD 204>,
1245 <&cpg CPG_CO 1248 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1246 <&scif_clk>; 1249 <&scif_clk>;
1247 clock-names = "fck", 1250 clock-names = "fck", "brg_int", "scif_clk";
1248 dmas = <&dmac0 0x57>, 1251 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1249 dma-names = "tx", "rx 1252 dma-names = "tx", "rx";
1250 power-domains = <&sys 1253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1251 resets = <&cpg 204>; 1254 resets = <&cpg 204>;
1252 status = "disabled"; 1255 status = "disabled";
1253 }; 1256 };
1254 1257
1255 scif4: serial@e6c40000 { 1258 scif4: serial@e6c40000 {
1256 compatible = "renesas 1259 compatible = "renesas,scif-r8a77965",
1257 "renesas 1260 "renesas,rcar-gen3-scif", "renesas,scif";
1258 reg = <0 0xe6c40000 0 1261 reg = <0 0xe6c40000 0 64>;
1259 interrupts = <GIC_SPI 1262 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1260 clocks = <&cpg CPG_MO 1263 clocks = <&cpg CPG_MOD 203>,
1261 <&cpg CPG_CO 1264 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1262 <&scif_clk>; 1265 <&scif_clk>;
1263 clock-names = "fck", 1266 clock-names = "fck", "brg_int", "scif_clk";
1264 dmas = <&dmac0 0x59>, 1267 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1265 dma-names = "tx", "rx 1268 dma-names = "tx", "rx";
1266 power-domains = <&sys 1269 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1267 resets = <&cpg 203>; 1270 resets = <&cpg 203>;
1268 status = "disabled"; 1271 status = "disabled";
1269 }; 1272 };
1270 1273
1271 scif5: serial@e6f30000 { 1274 scif5: serial@e6f30000 {
1272 compatible = "renesas 1275 compatible = "renesas,scif-r8a77965",
1273 "renesas 1276 "renesas,rcar-gen3-scif", "renesas,scif";
1274 reg = <0 0xe6f30000 0 1277 reg = <0 0xe6f30000 0 64>;
1275 interrupts = <GIC_SPI 1278 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1276 clocks = <&cpg CPG_MO 1279 clocks = <&cpg CPG_MOD 202>,
1277 <&cpg CPG_CO 1280 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1278 <&scif_clk>; 1281 <&scif_clk>;
1279 clock-names = "fck", 1282 clock-names = "fck", "brg_int", "scif_clk";
1280 dmas = <&dmac1 0x5b>, 1283 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1281 <&dmac2 0x5b>, 1284 <&dmac2 0x5b>, <&dmac2 0x5a>;
1282 dma-names = "tx", "rx 1285 dma-names = "tx", "rx", "tx", "rx";
1283 power-domains = <&sys 1286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1284 resets = <&cpg 202>; 1287 resets = <&cpg 202>;
1285 status = "disabled"; 1288 status = "disabled";
1286 }; 1289 };
1287 1290
1288 tpu: pwm@e6e80000 { 1291 tpu: pwm@e6e80000 {
1289 compatible = "renesas 1292 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1290 reg = <0 0xe6e80000 0 1293 reg = <0 0xe6e80000 0 0x148>;
1291 interrupts = <GIC_SPI 1294 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1292 clocks = <&cpg CPG_MO 1295 clocks = <&cpg CPG_MOD 304>;
1293 power-domains = <&sys 1296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1294 resets = <&cpg 304>; 1297 resets = <&cpg 304>;
1295 #pwm-cells = <3>; 1298 #pwm-cells = <3>;
1296 status = "disabled"; 1299 status = "disabled";
1297 }; 1300 };
1298 1301
1299 msiof0: spi@e6e90000 { 1302 msiof0: spi@e6e90000 {
1300 compatible = "renesas 1303 compatible = "renesas,msiof-r8a77965",
1301 "renesas 1304 "renesas,rcar-gen3-msiof";
1302 reg = <0 0xe6e90000 0 1305 reg = <0 0xe6e90000 0 0x0064>;
1303 interrupts = <GIC_SPI 1306 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1304 clocks = <&cpg CPG_MO 1307 clocks = <&cpg CPG_MOD 211>;
1305 dmas = <&dmac1 0x41>, 1308 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1306 <&dmac2 0x41>, 1309 <&dmac2 0x41>, <&dmac2 0x40>;
1307 dma-names = "tx", "rx 1310 dma-names = "tx", "rx", "tx", "rx";
1308 power-domains = <&sys 1311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1309 resets = <&cpg 211>; 1312 resets = <&cpg 211>;
1310 #address-cells = <1>; 1313 #address-cells = <1>;
1311 #size-cells = <0>; 1314 #size-cells = <0>;
1312 status = "disabled"; 1315 status = "disabled";
1313 }; 1316 };
1314 1317
1315 msiof1: spi@e6ea0000 { 1318 msiof1: spi@e6ea0000 {
1316 compatible = "renesas 1319 compatible = "renesas,msiof-r8a77965",
1317 "renesas 1320 "renesas,rcar-gen3-msiof";
1318 reg = <0 0xe6ea0000 0 1321 reg = <0 0xe6ea0000 0 0x0064>;
1319 interrupts = <GIC_SPI 1322 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MO 1323 clocks = <&cpg CPG_MOD 210>;
1321 dmas = <&dmac1 0x43>, 1324 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1322 <&dmac2 0x43>, 1325 <&dmac2 0x43>, <&dmac2 0x42>;
1323 dma-names = "tx", "rx 1326 dma-names = "tx", "rx", "tx", "rx";
1324 power-domains = <&sys 1327 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1325 resets = <&cpg 210>; 1328 resets = <&cpg 210>;
1326 #address-cells = <1>; 1329 #address-cells = <1>;
1327 #size-cells = <0>; 1330 #size-cells = <0>;
1328 status = "disabled"; 1331 status = "disabled";
1329 }; 1332 };
1330 1333
1331 msiof2: spi@e6c00000 { 1334 msiof2: spi@e6c00000 {
1332 compatible = "renesas 1335 compatible = "renesas,msiof-r8a77965",
1333 "renesas 1336 "renesas,rcar-gen3-msiof";
1334 reg = <0 0xe6c00000 0 1337 reg = <0 0xe6c00000 0 0x0064>;
1335 interrupts = <GIC_SPI 1338 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MO 1339 clocks = <&cpg CPG_MOD 209>;
1337 dmas = <&dmac0 0x45>, 1340 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1338 dma-names = "tx", "rx 1341 dma-names = "tx", "rx";
1339 power-domains = <&sys 1342 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1340 resets = <&cpg 209>; 1343 resets = <&cpg 209>;
1341 #address-cells = <1>; 1344 #address-cells = <1>;
1342 #size-cells = <0>; 1345 #size-cells = <0>;
1343 status = "disabled"; 1346 status = "disabled";
1344 }; 1347 };
1345 1348
1346 msiof3: spi@e6c10000 { 1349 msiof3: spi@e6c10000 {
1347 compatible = "renesas 1350 compatible = "renesas,msiof-r8a77965",
1348 "renesas 1351 "renesas,rcar-gen3-msiof";
1349 reg = <0 0xe6c10000 0 1352 reg = <0 0xe6c10000 0 0x0064>;
1350 interrupts = <GIC_SPI 1353 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1351 clocks = <&cpg CPG_MO 1354 clocks = <&cpg CPG_MOD 208>;
1352 dmas = <&dmac0 0x47>, 1355 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1353 dma-names = "tx", "rx 1356 dma-names = "tx", "rx";
1354 power-domains = <&sys 1357 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1355 resets = <&cpg 208>; 1358 resets = <&cpg 208>;
1356 #address-cells = <1>; 1359 #address-cells = <1>;
1357 #size-cells = <0>; 1360 #size-cells = <0>;
1358 status = "disabled"; 1361 status = "disabled";
1359 }; 1362 };
1360 1363
1361 vin0: video@e6ef0000 { 1364 vin0: video@e6ef0000 {
1362 compatible = "renesas 1365 compatible = "renesas,vin-r8a77965";
1363 reg = <0 0xe6ef0000 0 1366 reg = <0 0xe6ef0000 0 0x1000>;
1364 interrupts = <GIC_SPI 1367 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MO 1368 clocks = <&cpg CPG_MOD 811>;
1366 power-domains = <&sys 1369 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1367 resets = <&cpg 811>; 1370 resets = <&cpg 811>;
1368 renesas,id = <0>; 1371 renesas,id = <0>;
1369 status = "disabled"; 1372 status = "disabled";
1370 1373
1371 ports { 1374 ports {
1372 #address-cell 1375 #address-cells = <1>;
1373 #size-cells = 1376 #size-cells = <0>;
1374 1377
1375 port@1 { 1378 port@1 {
1376 #addr 1379 #address-cells = <1>;
1377 #size 1380 #size-cells = <0>;
1378 1381
1379 reg = 1382 reg = <1>;
1380 1383
1381 vin0c 1384 vin0csi20: endpoint@0 {
1382 1385 reg = <0>;
1383 1386 remote-endpoint = <&csi20vin0>;
1384 }; 1387 };
1385 vin0c 1388 vin0csi40: endpoint@2 {
1386 1389 reg = <2>;
1387 1390 remote-endpoint = <&csi40vin0>;
1388 }; 1391 };
1389 }; 1392 };
1390 }; 1393 };
1391 }; 1394 };
1392 1395
1393 vin1: video@e6ef1000 { 1396 vin1: video@e6ef1000 {
1394 compatible = "renesas 1397 compatible = "renesas,vin-r8a77965";
1395 reg = <0 0xe6ef1000 0 1398 reg = <0 0xe6ef1000 0 0x1000>;
1396 interrupts = <GIC_SPI 1399 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MO 1400 clocks = <&cpg CPG_MOD 810>;
1398 power-domains = <&sys 1401 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1399 resets = <&cpg 810>; 1402 resets = <&cpg 810>;
1400 renesas,id = <1>; 1403 renesas,id = <1>;
1401 status = "disabled"; 1404 status = "disabled";
1402 1405
1403 ports { 1406 ports {
1404 #address-cell 1407 #address-cells = <1>;
1405 #size-cells = 1408 #size-cells = <0>;
1406 1409
1407 port@1 { 1410 port@1 {
1408 #addr 1411 #address-cells = <1>;
1409 #size 1412 #size-cells = <0>;
1410 1413
1411 reg = 1414 reg = <1>;
1412 1415
1413 vin1c 1416 vin1csi20: endpoint@0 {
1414 1417 reg = <0>;
1415 1418 remote-endpoint = <&csi20vin1>;
1416 }; 1419 };
1417 vin1c 1420 vin1csi40: endpoint@2 {
1418 1421 reg = <2>;
1419 1422 remote-endpoint = <&csi40vin1>;
1420 }; 1423 };
1421 }; 1424 };
1422 }; 1425 };
1423 }; 1426 };
1424 1427
1425 vin2: video@e6ef2000 { 1428 vin2: video@e6ef2000 {
1426 compatible = "renesas 1429 compatible = "renesas,vin-r8a77965";
1427 reg = <0 0xe6ef2000 0 1430 reg = <0 0xe6ef2000 0 0x1000>;
1428 interrupts = <GIC_SPI 1431 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MO 1432 clocks = <&cpg CPG_MOD 809>;
1430 power-domains = <&sys 1433 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1431 resets = <&cpg 809>; 1434 resets = <&cpg 809>;
1432 renesas,id = <2>; 1435 renesas,id = <2>;
1433 status = "disabled"; 1436 status = "disabled";
1434 1437
1435 ports { 1438 ports {
1436 #address-cell 1439 #address-cells = <1>;
1437 #size-cells = 1440 #size-cells = <0>;
1438 1441
1439 port@1 { 1442 port@1 {
1440 #addr 1443 #address-cells = <1>;
1441 #size 1444 #size-cells = <0>;
1442 1445
1443 reg = 1446 reg = <1>;
1444 1447
1445 vin2c 1448 vin2csi20: endpoint@0 {
1446 1449 reg = <0>;
1447 1450 remote-endpoint = <&csi20vin2>;
1448 }; 1451 };
1449 vin2c 1452 vin2csi40: endpoint@2 {
1450 1453 reg = <2>;
1451 1454 remote-endpoint = <&csi40vin2>;
1452 }; 1455 };
1453 }; 1456 };
1454 }; 1457 };
1455 }; 1458 };
1456 1459
1457 vin3: video@e6ef3000 { 1460 vin3: video@e6ef3000 {
1458 compatible = "renesas 1461 compatible = "renesas,vin-r8a77965";
1459 reg = <0 0xe6ef3000 0 1462 reg = <0 0xe6ef3000 0 0x1000>;
1460 interrupts = <GIC_SPI 1463 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MO 1464 clocks = <&cpg CPG_MOD 808>;
1462 power-domains = <&sys 1465 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1463 resets = <&cpg 808>; 1466 resets = <&cpg 808>;
1464 renesas,id = <3>; 1467 renesas,id = <3>;
1465 status = "disabled"; 1468 status = "disabled";
1466 1469
1467 ports { 1470 ports {
1468 #address-cell 1471 #address-cells = <1>;
1469 #size-cells = 1472 #size-cells = <0>;
1470 1473
1471 port@1 { 1474 port@1 {
1472 #addr 1475 #address-cells = <1>;
1473 #size 1476 #size-cells = <0>;
1474 1477
1475 reg = 1478 reg = <1>;
1476 1479
1477 vin3c 1480 vin3csi20: endpoint@0 {
1478 1481 reg = <0>;
1479 1482 remote-endpoint = <&csi20vin3>;
1480 }; 1483 };
1481 vin3c 1484 vin3csi40: endpoint@2 {
1482 1485 reg = <2>;
1483 1486 remote-endpoint = <&csi40vin3>;
1484 }; 1487 };
1485 }; 1488 };
1486 }; 1489 };
1487 }; 1490 };
1488 1491
1489 vin4: video@e6ef4000 { 1492 vin4: video@e6ef4000 {
1490 compatible = "renesas 1493 compatible = "renesas,vin-r8a77965";
1491 reg = <0 0xe6ef4000 0 1494 reg = <0 0xe6ef4000 0 0x1000>;
1492 interrupts = <GIC_SPI 1495 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MO 1496 clocks = <&cpg CPG_MOD 807>;
1494 power-domains = <&sys 1497 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1495 resets = <&cpg 807>; 1498 resets = <&cpg 807>;
1496 renesas,id = <4>; 1499 renesas,id = <4>;
1497 status = "disabled"; 1500 status = "disabled";
1498 1501
1499 ports { 1502 ports {
1500 #address-cell 1503 #address-cells = <1>;
1501 #size-cells = 1504 #size-cells = <0>;
1502 1505
1503 port@1 { 1506 port@1 {
1504 #addr 1507 #address-cells = <1>;
1505 #size 1508 #size-cells = <0>;
1506 1509
1507 reg = 1510 reg = <1>;
1508 1511
1509 vin4c 1512 vin4csi20: endpoint@0 {
1510 1513 reg = <0>;
1511 1514 remote-endpoint = <&csi20vin4>;
1512 }; 1515 };
1513 vin4c 1516 vin4csi40: endpoint@2 {
1514 1517 reg = <2>;
1515 1518 remote-endpoint = <&csi40vin4>;
1516 }; 1519 };
1517 }; 1520 };
1518 }; 1521 };
1519 }; 1522 };
1520 1523
1521 vin5: video@e6ef5000 { 1524 vin5: video@e6ef5000 {
1522 compatible = "renesas 1525 compatible = "renesas,vin-r8a77965";
1523 reg = <0 0xe6ef5000 0 1526 reg = <0 0xe6ef5000 0 0x1000>;
1524 interrupts = <GIC_SPI 1527 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MO 1528 clocks = <&cpg CPG_MOD 806>;
1526 power-domains = <&sys 1529 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1527 resets = <&cpg 806>; 1530 resets = <&cpg 806>;
1528 renesas,id = <5>; 1531 renesas,id = <5>;
1529 status = "disabled"; 1532 status = "disabled";
1530 1533
1531 ports { 1534 ports {
1532 #address-cell 1535 #address-cells = <1>;
1533 #size-cells = 1536 #size-cells = <0>;
1534 1537
1535 port@1 { 1538 port@1 {
1536 #addr 1539 #address-cells = <1>;
1537 #size 1540 #size-cells = <0>;
1538 1541
1539 reg = 1542 reg = <1>;
1540 1543
1541 vin5c 1544 vin5csi20: endpoint@0 {
1542 1545 reg = <0>;
1543 1546 remote-endpoint = <&csi20vin5>;
1544 }; 1547 };
1545 vin5c 1548 vin5csi40: endpoint@2 {
1546 1549 reg = <2>;
1547 1550 remote-endpoint = <&csi40vin5>;
1548 }; 1551 };
1549 }; 1552 };
1550 }; 1553 };
1551 }; 1554 };
1552 1555
1553 vin6: video@e6ef6000 { 1556 vin6: video@e6ef6000 {
1554 compatible = "renesas 1557 compatible = "renesas,vin-r8a77965";
1555 reg = <0 0xe6ef6000 0 1558 reg = <0 0xe6ef6000 0 0x1000>;
1556 interrupts = <GIC_SPI 1559 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1557 clocks = <&cpg CPG_MO 1560 clocks = <&cpg CPG_MOD 805>;
1558 power-domains = <&sys 1561 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1559 resets = <&cpg 805>; 1562 resets = <&cpg 805>;
1560 renesas,id = <6>; 1563 renesas,id = <6>;
1561 status = "disabled"; 1564 status = "disabled";
1562 1565
1563 ports { 1566 ports {
1564 #address-cell 1567 #address-cells = <1>;
1565 #size-cells = 1568 #size-cells = <0>;
1566 1569
1567 port@1 { 1570 port@1 {
1568 #addr 1571 #address-cells = <1>;
1569 #size 1572 #size-cells = <0>;
1570 1573
1571 reg = 1574 reg = <1>;
1572 1575
1573 vin6c 1576 vin6csi20: endpoint@0 {
1574 1577 reg = <0>;
1575 1578 remote-endpoint = <&csi20vin6>;
1576 }; 1579 };
1577 vin6c 1580 vin6csi40: endpoint@2 {
1578 1581 reg = <2>;
1579 1582 remote-endpoint = <&csi40vin6>;
1580 }; 1583 };
1581 }; 1584 };
1582 }; 1585 };
1583 }; 1586 };
1584 1587
1585 vin7: video@e6ef7000 { 1588 vin7: video@e6ef7000 {
1586 compatible = "renesas 1589 compatible = "renesas,vin-r8a77965";
1587 reg = <0 0xe6ef7000 0 1590 reg = <0 0xe6ef7000 0 0x1000>;
1588 interrupts = <GIC_SPI 1591 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1589 clocks = <&cpg CPG_MO 1592 clocks = <&cpg CPG_MOD 804>;
1590 power-domains = <&sys 1593 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1591 resets = <&cpg 804>; 1594 resets = <&cpg 804>;
1592 renesas,id = <7>; 1595 renesas,id = <7>;
1593 status = "disabled"; 1596 status = "disabled";
1594 1597
1595 ports { 1598 ports {
1596 #address-cell 1599 #address-cells = <1>;
1597 #size-cells = 1600 #size-cells = <0>;
1598 1601
1599 port@1 { 1602 port@1 {
1600 #addr 1603 #address-cells = <1>;
1601 #size 1604 #size-cells = <0>;
1602 1605
1603 reg = 1606 reg = <1>;
1604 1607
1605 vin7c 1608 vin7csi20: endpoint@0 {
1606 1609 reg = <0>;
1607 1610 remote-endpoint = <&csi20vin7>;
1608 }; 1611 };
1609 vin7c 1612 vin7csi40: endpoint@2 {
1610 1613 reg = <2>;
1611 1614 remote-endpoint = <&csi40vin7>;
1612 }; 1615 };
1613 }; 1616 };
1614 }; 1617 };
1615 }; 1618 };
1616 1619
1617 drif00: rif@e6f40000 { 1620 drif00: rif@e6f40000 {
1618 compatible = "renesas 1621 compatible = "renesas,r8a77965-drif",
1619 "renesas 1622 "renesas,rcar-gen3-drif";
1620 reg = <0 0xe6f40000 0 1623 reg = <0 0xe6f40000 0 0x84>;
1621 interrupts = <GIC_SPI 1624 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1622 clocks = <&cpg CPG_MO 1625 clocks = <&cpg CPG_MOD 515>;
1623 clock-names = "fck"; 1626 clock-names = "fck";
1624 dmas = <&dmac1 0x20>, 1627 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1625 dma-names = "rx", "rx 1628 dma-names = "rx", "rx";
1626 power-domains = <&sys 1629 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1627 resets = <&cpg 515>; 1630 resets = <&cpg 515>;
1628 renesas,bonding = <&d 1631 renesas,bonding = <&drif01>;
1629 status = "disabled"; 1632 status = "disabled";
1630 }; 1633 };
1631 1634
1632 drif01: rif@e6f50000 { 1635 drif01: rif@e6f50000 {
1633 compatible = "renesas 1636 compatible = "renesas,r8a77965-drif",
1634 "renesas 1637 "renesas,rcar-gen3-drif";
1635 reg = <0 0xe6f50000 0 1638 reg = <0 0xe6f50000 0 0x84>;
1636 interrupts = <GIC_SPI 1639 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1637 clocks = <&cpg CPG_MO 1640 clocks = <&cpg CPG_MOD 514>;
1638 clock-names = "fck"; 1641 clock-names = "fck";
1639 dmas = <&dmac1 0x22>, 1642 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1640 dma-names = "rx", "rx 1643 dma-names = "rx", "rx";
1641 power-domains = <&sys 1644 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1642 resets = <&cpg 514>; 1645 resets = <&cpg 514>;
1643 renesas,bonding = <&d 1646 renesas,bonding = <&drif00>;
1644 status = "disabled"; 1647 status = "disabled";
1645 }; 1648 };
1646 1649
1647 drif10: rif@e6f60000 { 1650 drif10: rif@e6f60000 {
1648 compatible = "renesas 1651 compatible = "renesas,r8a77965-drif",
1649 "renesas 1652 "renesas,rcar-gen3-drif";
1650 reg = <0 0xe6f60000 0 1653 reg = <0 0xe6f60000 0 0x84>;
1651 interrupts = <GIC_SPI 1654 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1652 clocks = <&cpg CPG_MO 1655 clocks = <&cpg CPG_MOD 513>;
1653 clock-names = "fck"; 1656 clock-names = "fck";
1654 dmas = <&dmac1 0x24>, 1657 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1655 dma-names = "rx", "rx 1658 dma-names = "rx", "rx";
1656 power-domains = <&sys 1659 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1657 resets = <&cpg 513>; 1660 resets = <&cpg 513>;
1658 renesas,bonding = <&d 1661 renesas,bonding = <&drif11>;
1659 status = "disabled"; 1662 status = "disabled";
1660 }; 1663 };
1661 1664
1662 drif11: rif@e6f70000 { 1665 drif11: rif@e6f70000 {
1663 compatible = "renesas 1666 compatible = "renesas,r8a77965-drif",
1664 "renesas 1667 "renesas,rcar-gen3-drif";
1665 reg = <0 0xe6f70000 0 1668 reg = <0 0xe6f70000 0 0x84>;
1666 interrupts = <GIC_SPI 1669 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1667 clocks = <&cpg CPG_MO 1670 clocks = <&cpg CPG_MOD 512>;
1668 clock-names = "fck"; 1671 clock-names = "fck";
1669 dmas = <&dmac1 0x26>, 1672 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1670 dma-names = "rx", "rx 1673 dma-names = "rx", "rx";
1671 power-domains = <&sys 1674 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1672 resets = <&cpg 512>; 1675 resets = <&cpg 512>;
1673 renesas,bonding = <&d 1676 renesas,bonding = <&drif10>;
1674 status = "disabled"; 1677 status = "disabled";
1675 }; 1678 };
1676 1679
1677 drif20: rif@e6f80000 { 1680 drif20: rif@e6f80000 {
1678 compatible = "renesas 1681 compatible = "renesas,r8a77965-drif",
1679 "renesas 1682 "renesas,rcar-gen3-drif";
1680 reg = <0 0xe6f80000 0 1683 reg = <0 0xe6f80000 0 0x84>;
1681 interrupts = <GIC_SPI 1684 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1682 clocks = <&cpg CPG_MO 1685 clocks = <&cpg CPG_MOD 511>;
1683 clock-names = "fck"; 1686 clock-names = "fck";
1684 dmas = <&dmac1 0x28>, 1687 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1685 dma-names = "rx", "rx 1688 dma-names = "rx", "rx";
1686 power-domains = <&sys 1689 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1687 resets = <&cpg 511>; 1690 resets = <&cpg 511>;
1688 renesas,bonding = <&d 1691 renesas,bonding = <&drif21>;
1689 status = "disabled"; 1692 status = "disabled";
1690 }; 1693 };
1691 1694
1692 drif21: rif@e6f90000 { 1695 drif21: rif@e6f90000 {
1693 compatible = "renesas 1696 compatible = "renesas,r8a77965-drif",
1694 "renesas 1697 "renesas,rcar-gen3-drif";
1695 reg = <0 0xe6f90000 0 1698 reg = <0 0xe6f90000 0 0x84>;
1696 interrupts = <GIC_SPI 1699 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1697 clocks = <&cpg CPG_MO 1700 clocks = <&cpg CPG_MOD 510>;
1698 clock-names = "fck"; 1701 clock-names = "fck";
1699 dmas = <&dmac1 0x2a>, 1702 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1700 dma-names = "rx", "rx 1703 dma-names = "rx", "rx";
1701 power-domains = <&sys 1704 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1702 resets = <&cpg 510>; 1705 resets = <&cpg 510>;
1703 renesas,bonding = <&d 1706 renesas,bonding = <&drif20>;
1704 status = "disabled"; 1707 status = "disabled";
1705 }; 1708 };
1706 1709
1707 drif30: rif@e6fa0000 { 1710 drif30: rif@e6fa0000 {
1708 compatible = "renesas 1711 compatible = "renesas,r8a77965-drif",
1709 "renesas 1712 "renesas,rcar-gen3-drif";
1710 reg = <0 0xe6fa0000 0 1713 reg = <0 0xe6fa0000 0 0x84>;
1711 interrupts = <GIC_SPI 1714 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1712 clocks = <&cpg CPG_MO 1715 clocks = <&cpg CPG_MOD 509>;
1713 clock-names = "fck"; 1716 clock-names = "fck";
1714 dmas = <&dmac1 0x2c>, 1717 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1715 dma-names = "rx", "rx 1718 dma-names = "rx", "rx";
1716 power-domains = <&sys 1719 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1717 resets = <&cpg 509>; 1720 resets = <&cpg 509>;
1718 renesas,bonding = <&d 1721 renesas,bonding = <&drif31>;
1719 status = "disabled"; 1722 status = "disabled";
1720 }; 1723 };
1721 1724
1722 drif31: rif@e6fb0000 { 1725 drif31: rif@e6fb0000 {
1723 compatible = "renesas 1726 compatible = "renesas,r8a77965-drif",
1724 "renesas 1727 "renesas,rcar-gen3-drif";
1725 reg = <0 0xe6fb0000 0 1728 reg = <0 0xe6fb0000 0 0x84>;
1726 interrupts = <GIC_SPI 1729 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1727 clocks = <&cpg CPG_MO 1730 clocks = <&cpg CPG_MOD 508>;
1728 clock-names = "fck"; 1731 clock-names = "fck";
1729 dmas = <&dmac1 0x2e>, 1732 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1730 dma-names = "rx", "rx 1733 dma-names = "rx", "rx";
1731 power-domains = <&sys 1734 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1732 resets = <&cpg 508>; 1735 resets = <&cpg 508>;
1733 renesas,bonding = <&d 1736 renesas,bonding = <&drif30>;
1734 status = "disabled"; 1737 status = "disabled";
1735 }; 1738 };
1736 1739
1737 rcar_sound: sound@ec500000 { 1740 rcar_sound: sound@ec500000 {
1738 /* 1741 /*
1739 * #sound-dai-cells i !! 1742 * #sound-dai-cells is required
1740 * 1743 *
1741 * Single DAI : #soun 1744 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1742 * Multi DAI : #soun 1745 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1743 */ 1746 */
1744 /* 1747 /*
1745 * #clock-cells is re 1748 * #clock-cells is required for audio_clkout0/1/2/3
1746 * 1749 *
1747 * clkout : #cl 1750 * clkout : #clock-cells = <0>; <&rcar_sound>;
1748 * clkout0/1/2/3: #cl 1751 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1749 */ 1752 */
1750 compatible = "renesas !! 1753 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1751 reg = <0 0xec500000 0 !! 1754 reg = <0 0xec500000 0 0x1000>, /* SCU */
1752 <0 0xec5a0000 0 !! 1755 <0 0xec5a0000 0 0x100>, /* ADG */
1753 <0 0xec540000 0 !! 1756 <0 0xec540000 0 0x1000>, /* SSIU */
1754 <0 0xec541000 0 !! 1757 <0 0xec541000 0 0x280>, /* SSI */
1755 <0 0xec760000 0 !! 1758 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1756 reg-names = "scu", "a 1759 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1757 1760
1758 clocks = <&cpg CPG_MO 1761 clocks = <&cpg CPG_MOD 1005>,
1759 <&cpg CPG_MO 1762 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1760 <&cpg CPG_MO 1763 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1761 <&cpg CPG_MO 1764 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1762 <&cpg CPG_MO 1765 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1763 <&cpg CPG_MO 1766 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1764 <&cpg CPG_MO 1767 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1765 <&cpg CPG_MO 1768 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1766 <&cpg CPG_MO 1769 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1767 <&cpg CPG_MO 1770 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1768 <&cpg CPG_MO 1771 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1769 <&cpg CPG_MO 1772 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1770 <&cpg CPG_MO 1773 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1771 <&cpg CPG_MO 1774 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1772 <&audio_clk_ 1775 <&audio_clk_a>, <&audio_clk_b>,
1773 <&audio_clk_ 1776 <&audio_clk_c>,
1774 <&cpg CPG_MO !! 1777 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1775 clock-names = "ssi-al 1778 clock-names = "ssi-all",
1776 "ssi.9" 1779 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1777 "ssi.5" 1780 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1778 "ssi.1" 1781 "ssi.1", "ssi.0",
1779 "src.9" 1782 "src.9", "src.8", "src.7", "src.6",
1780 "src.5" 1783 "src.5", "src.4", "src.3", "src.2",
1781 "src.1" 1784 "src.1", "src.0",
1782 "mix.1" 1785 "mix.1", "mix.0",
1783 "ctu.1" 1786 "ctu.1", "ctu.0",
1784 "dvc.0" 1787 "dvc.0", "dvc.1",
1785 "clk_a" 1788 "clk_a", "clk_b", "clk_c", "clk_i";
1786 power-domains = <&sys 1789 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1787 resets = <&cpg 1005>, 1790 resets = <&cpg 1005>,
1788 <&cpg 1006>, 1791 <&cpg 1006>, <&cpg 1007>,
1789 <&cpg 1008>, 1792 <&cpg 1008>, <&cpg 1009>,
1790 <&cpg 1010>, 1793 <&cpg 1010>, <&cpg 1011>,
1791 <&cpg 1012>, 1794 <&cpg 1012>, <&cpg 1013>,
1792 <&cpg 1014>, 1795 <&cpg 1014>, <&cpg 1015>;
1793 reset-names = "ssi-al 1796 reset-names = "ssi-all",
1794 "ssi.9" 1797 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1795 "ssi.5" 1798 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1796 "ssi.1" 1799 "ssi.1", "ssi.0";
1797 status = "disabled"; 1800 status = "disabled";
1798 1801
1799 rcar_sound,dvc { 1802 rcar_sound,dvc {
1800 dvc0: dvc-0 { 1803 dvc0: dvc-0 {
1801 dmas 1804 dmas = <&audma1 0xbc>;
1802 dma-n 1805 dma-names = "tx";
1803 }; 1806 };
1804 dvc1: dvc-1 { 1807 dvc1: dvc-1 {
1805 dmas 1808 dmas = <&audma1 0xbe>;
1806 dma-n 1809 dma-names = "tx";
1807 }; 1810 };
1808 }; 1811 };
1809 1812
1810 rcar_sound,mix { 1813 rcar_sound,mix {
1811 mix0: mix-0 { 1814 mix0: mix-0 { };
1812 mix1: mix-1 { 1815 mix1: mix-1 { };
1813 }; 1816 };
1814 1817
1815 rcar_sound,ctu { 1818 rcar_sound,ctu {
1816 ctu00: ctu-0 1819 ctu00: ctu-0 { };
1817 ctu01: ctu-1 1820 ctu01: ctu-1 { };
1818 ctu02: ctu-2 1821 ctu02: ctu-2 { };
1819 ctu03: ctu-3 1822 ctu03: ctu-3 { };
1820 ctu10: ctu-4 1823 ctu10: ctu-4 { };
1821 ctu11: ctu-5 1824 ctu11: ctu-5 { };
1822 ctu12: ctu-6 1825 ctu12: ctu-6 { };
1823 ctu13: ctu-7 1826 ctu13: ctu-7 { };
1824 }; 1827 };
1825 1828
1826 rcar_sound,src { 1829 rcar_sound,src {
1827 src0: src-0 { 1830 src0: src-0 {
1828 inter 1831 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas 1832 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1830 dma-n 1833 dma-names = "rx", "tx";
1831 }; 1834 };
1832 src1: src-1 { 1835 src1: src-1 {
1833 inter 1836 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas 1837 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1835 dma-n 1838 dma-names = "rx", "tx";
1836 }; 1839 };
1837 src2: src-2 { 1840 src2: src-2 {
1838 inter 1841 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas 1842 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1840 dma-n 1843 dma-names = "rx", "tx";
1841 }; 1844 };
1842 src3: src-3 { 1845 src3: src-3 {
1843 inter 1846 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas 1847 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1845 dma-n 1848 dma-names = "rx", "tx";
1846 }; 1849 };
1847 src4: src-4 { 1850 src4: src-4 {
1848 inter 1851 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas 1852 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1850 dma-n 1853 dma-names = "rx", "tx";
1851 }; 1854 };
1852 src5: src-5 { 1855 src5: src-5 {
1853 inter 1856 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas 1857 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1855 dma-n 1858 dma-names = "rx", "tx";
1856 }; 1859 };
1857 src6: src-6 { 1860 src6: src-6 {
1858 inter 1861 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas 1862 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1860 dma-n 1863 dma-names = "rx", "tx";
1861 }; 1864 };
1862 src7: src-7 { 1865 src7: src-7 {
1863 inter 1866 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1864 dmas 1867 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1865 dma-n 1868 dma-names = "rx", "tx";
1866 }; 1869 };
1867 src8: src-8 { 1870 src8: src-8 {
1868 inter 1871 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1869 dmas 1872 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1870 dma-n 1873 dma-names = "rx", "tx";
1871 }; 1874 };
1872 src9: src-9 { 1875 src9: src-9 {
1873 inter 1876 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1874 dmas 1877 dmas = <&audma0 0x97>, <&audma1 0xba>;
1875 dma-n 1878 dma-names = "rx", "tx";
1876 }; 1879 };
1877 }; 1880 };
1878 1881
1879 rcar_sound,ssiu { 1882 rcar_sound,ssiu {
1880 ssiu00: ssiu- 1883 ssiu00: ssiu-0 {
1881 dmas 1884 dmas = <&audma0 0x15>, <&audma1 0x16>;
1882 dma-n 1885 dma-names = "rx", "tx";
1883 }; 1886 };
1884 ssiu01: ssiu- 1887 ssiu01: ssiu-1 {
1885 dmas 1888 dmas = <&audma0 0x35>, <&audma1 0x36>;
1886 dma-n 1889 dma-names = "rx", "tx";
1887 }; 1890 };
1888 ssiu02: ssiu- 1891 ssiu02: ssiu-2 {
1889 dmas 1892 dmas = <&audma0 0x37>, <&audma1 0x38>;
1890 dma-n 1893 dma-names = "rx", "tx";
1891 }; 1894 };
1892 ssiu03: ssiu- 1895 ssiu03: ssiu-3 {
1893 dmas 1896 dmas = <&audma0 0x47>, <&audma1 0x48>;
1894 dma-n 1897 dma-names = "rx", "tx";
1895 }; 1898 };
1896 ssiu04: ssiu- 1899 ssiu04: ssiu-4 {
1897 dmas 1900 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1898 dma-n 1901 dma-names = "rx", "tx";
1899 }; 1902 };
1900 ssiu05: ssiu- 1903 ssiu05: ssiu-5 {
1901 dmas 1904 dmas = <&audma0 0x43>, <&audma1 0x44>;
1902 dma-n 1905 dma-names = "rx", "tx";
1903 }; 1906 };
1904 ssiu06: ssiu- 1907 ssiu06: ssiu-6 {
1905 dmas 1908 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1906 dma-n 1909 dma-names = "rx", "tx";
1907 }; 1910 };
1908 ssiu07: ssiu- 1911 ssiu07: ssiu-7 {
1909 dmas 1912 dmas = <&audma0 0x53>, <&audma1 0x54>;
1910 dma-n 1913 dma-names = "rx", "tx";
1911 }; 1914 };
1912 ssiu10: ssiu- 1915 ssiu10: ssiu-8 {
1913 dmas 1916 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1914 dma-n 1917 dma-names = "rx", "tx";
1915 }; 1918 };
1916 ssiu11: ssiu- 1919 ssiu11: ssiu-9 {
1917 dmas 1920 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1918 dma-n 1921 dma-names = "rx", "tx";
1919 }; 1922 };
1920 ssiu12: ssiu- 1923 ssiu12: ssiu-10 {
1921 dmas 1924 dmas = <&audma0 0x57>, <&audma1 0x58>;
1922 dma-n 1925 dma-names = "rx", "tx";
1923 }; 1926 };
1924 ssiu13: ssiu- 1927 ssiu13: ssiu-11 {
1925 dmas 1928 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1926 dma-n 1929 dma-names = "rx", "tx";
1927 }; 1930 };
1928 ssiu14: ssiu- 1931 ssiu14: ssiu-12 {
1929 dmas 1932 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1930 dma-n 1933 dma-names = "rx", "tx";
1931 }; 1934 };
1932 ssiu15: ssiu- 1935 ssiu15: ssiu-13 {
1933 dmas 1936 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1934 dma-n 1937 dma-names = "rx", "tx";
1935 }; 1938 };
1936 ssiu16: ssiu- 1939 ssiu16: ssiu-14 {
1937 dmas 1940 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1938 dma-n 1941 dma-names = "rx", "tx";
1939 }; 1942 };
1940 ssiu17: ssiu- 1943 ssiu17: ssiu-15 {
1941 dmas 1944 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1942 dma-n 1945 dma-names = "rx", "tx";
1943 }; 1946 };
1944 ssiu20: ssiu- 1947 ssiu20: ssiu-16 {
1945 dmas 1948 dmas = <&audma0 0x63>, <&audma1 0x64>;
1946 dma-n 1949 dma-names = "rx", "tx";
1947 }; 1950 };
1948 ssiu21: ssiu- 1951 ssiu21: ssiu-17 {
1949 dmas 1952 dmas = <&audma0 0x67>, <&audma1 0x68>;
1950 dma-n 1953 dma-names = "rx", "tx";
1951 }; 1954 };
1952 ssiu22: ssiu- 1955 ssiu22: ssiu-18 {
1953 dmas 1956 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1954 dma-n 1957 dma-names = "rx", "tx";
1955 }; 1958 };
1956 ssiu23: ssiu- 1959 ssiu23: ssiu-19 {
1957 dmas 1960 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1958 dma-n 1961 dma-names = "rx", "tx";
1959 }; 1962 };
1960 ssiu24: ssiu- 1963 ssiu24: ssiu-20 {
1961 dmas 1964 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1962 dma-n 1965 dma-names = "rx", "tx";
1963 }; 1966 };
1964 ssiu25: ssiu- 1967 ssiu25: ssiu-21 {
1965 dmas 1968 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1966 dma-n 1969 dma-names = "rx", "tx";
1967 }; 1970 };
1968 ssiu26: ssiu- 1971 ssiu26: ssiu-22 {
1969 dmas 1972 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1970 dma-n 1973 dma-names = "rx", "tx";
1971 }; 1974 };
1972 ssiu27: ssiu- 1975 ssiu27: ssiu-23 {
1973 dmas 1976 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1974 dma-n 1977 dma-names = "rx", "tx";
1975 }; 1978 };
1976 ssiu30: ssiu- 1979 ssiu30: ssiu-24 {
1977 dmas 1980 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1978 dma-n 1981 dma-names = "rx", "tx";
1979 }; 1982 };
1980 ssiu31: ssiu- 1983 ssiu31: ssiu-25 {
1981 dmas 1984 dmas = <&audma0 0x21>, <&audma1 0x22>;
1982 dma-n 1985 dma-names = "rx", "tx";
1983 }; 1986 };
1984 ssiu32: ssiu- 1987 ssiu32: ssiu-26 {
1985 dmas 1988 dmas = <&audma0 0x23>, <&audma1 0x24>;
1986 dma-n 1989 dma-names = "rx", "tx";
1987 }; 1990 };
1988 ssiu33: ssiu- 1991 ssiu33: ssiu-27 {
1989 dmas 1992 dmas = <&audma0 0x25>, <&audma1 0x26>;
1990 dma-n 1993 dma-names = "rx", "tx";
1991 }; 1994 };
1992 ssiu34: ssiu- 1995 ssiu34: ssiu-28 {
1993 dmas 1996 dmas = <&audma0 0x27>, <&audma1 0x28>;
1994 dma-n 1997 dma-names = "rx", "tx";
1995 }; 1998 };
1996 ssiu35: ssiu- 1999 ssiu35: ssiu-29 {
1997 dmas 2000 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1998 dma-n 2001 dma-names = "rx", "tx";
1999 }; 2002 };
2000 ssiu36: ssiu- 2003 ssiu36: ssiu-30 {
2001 dmas 2004 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2002 dma-n 2005 dma-names = "rx", "tx";
2003 }; 2006 };
2004 ssiu37: ssiu- 2007 ssiu37: ssiu-31 {
2005 dmas 2008 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2006 dma-n 2009 dma-names = "rx", "tx";
2007 }; 2010 };
2008 ssiu40: ssiu- 2011 ssiu40: ssiu-32 {
2009 dmas !! 2012 dmas = <&audma0 0x71>, <&audma1 0x72>;
2010 dma-n 2013 dma-names = "rx", "tx";
2011 }; 2014 };
2012 ssiu41: ssiu- 2015 ssiu41: ssiu-33 {
2013 dmas 2016 dmas = <&audma0 0x17>, <&audma1 0x18>;
2014 dma-n 2017 dma-names = "rx", "tx";
2015 }; 2018 };
2016 ssiu42: ssiu- 2019 ssiu42: ssiu-34 {
2017 dmas 2020 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2018 dma-n 2021 dma-names = "rx", "tx";
2019 }; 2022 };
2020 ssiu43: ssiu- 2023 ssiu43: ssiu-35 {
2021 dmas 2024 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2022 dma-n 2025 dma-names = "rx", "tx";
2023 }; 2026 };
2024 ssiu44: ssiu- 2027 ssiu44: ssiu-36 {
2025 dmas 2028 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2026 dma-n 2029 dma-names = "rx", "tx";
2027 }; 2030 };
2028 ssiu45: ssiu- 2031 ssiu45: ssiu-37 {
2029 dmas 2032 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2030 dma-n 2033 dma-names = "rx", "tx";
2031 }; 2034 };
2032 ssiu46: ssiu- 2035 ssiu46: ssiu-38 {
2033 dmas 2036 dmas = <&audma0 0x31>, <&audma1 0x32>;
2034 dma-n 2037 dma-names = "rx", "tx";
2035 }; 2038 };
2036 ssiu47: ssiu- 2039 ssiu47: ssiu-39 {
2037 dmas 2040 dmas = <&audma0 0x33>, <&audma1 0x34>;
2038 dma-n 2041 dma-names = "rx", "tx";
2039 }; 2042 };
2040 ssiu50: ssiu- 2043 ssiu50: ssiu-40 {
2041 dmas 2044 dmas = <&audma0 0x73>, <&audma1 0x74>;
2042 dma-n 2045 dma-names = "rx", "tx";
2043 }; 2046 };
2044 ssiu60: ssiu- 2047 ssiu60: ssiu-41 {
2045 dmas 2048 dmas = <&audma0 0x75>, <&audma1 0x76>;
2046 dma-n 2049 dma-names = "rx", "tx";
2047 }; 2050 };
2048 ssiu70: ssiu- 2051 ssiu70: ssiu-42 {
2049 dmas 2052 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2050 dma-n 2053 dma-names = "rx", "tx";
2051 }; 2054 };
2052 ssiu80: ssiu- 2055 ssiu80: ssiu-43 {
2053 dmas 2056 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2054 dma-n 2057 dma-names = "rx", "tx";
2055 }; 2058 };
2056 ssiu90: ssiu- 2059 ssiu90: ssiu-44 {
2057 dmas 2060 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2058 dma-n 2061 dma-names = "rx", "tx";
2059 }; 2062 };
2060 ssiu91: ssiu- 2063 ssiu91: ssiu-45 {
2061 dmas 2064 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2062 dma-n 2065 dma-names = "rx", "tx";
2063 }; 2066 };
2064 ssiu92: ssiu- 2067 ssiu92: ssiu-46 {
2065 dmas 2068 dmas = <&audma0 0x81>, <&audma1 0x82>;
2066 dma-n 2069 dma-names = "rx", "tx";
2067 }; 2070 };
2068 ssiu93: ssiu- 2071 ssiu93: ssiu-47 {
2069 dmas 2072 dmas = <&audma0 0x83>, <&audma1 0x84>;
2070 dma-n 2073 dma-names = "rx", "tx";
2071 }; 2074 };
2072 ssiu94: ssiu- 2075 ssiu94: ssiu-48 {
2073 dmas 2076 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2074 dma-n 2077 dma-names = "rx", "tx";
2075 }; 2078 };
2076 ssiu95: ssiu- 2079 ssiu95: ssiu-49 {
2077 dmas 2080 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2078 dma-n 2081 dma-names = "rx", "tx";
2079 }; 2082 };
2080 ssiu96: ssiu- 2083 ssiu96: ssiu-50 {
2081 dmas 2084 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2082 dma-n 2085 dma-names = "rx", "tx";
2083 }; 2086 };
2084 ssiu97: ssiu- 2087 ssiu97: ssiu-51 {
2085 dmas 2088 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2086 dma-n 2089 dma-names = "rx", "tx";
2087 }; 2090 };
2088 }; 2091 };
2089 2092
2090 rcar_sound,ssi { 2093 rcar_sound,ssi {
2091 ssi0: ssi-0 { 2094 ssi0: ssi-0 {
2092 inter 2095 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2093 dmas 2096 dmas = <&audma0 0x01>, <&audma1 0x02>;
2094 dma-n 2097 dma-names = "rx", "tx";
2095 }; 2098 };
2096 ssi1: ssi-1 { 2099 ssi1: ssi-1 {
2097 inter 2100 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2098 dmas 2101 dmas = <&audma0 0x03>, <&audma1 0x04>;
2099 dma-n 2102 dma-names = "rx", "tx";
2100 }; 2103 };
2101 ssi2: ssi-2 { 2104 ssi2: ssi-2 {
2102 inter 2105 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2103 dmas 2106 dmas = <&audma0 0x05>, <&audma1 0x06>;
2104 dma-n 2107 dma-names = "rx", "tx";
2105 }; 2108 };
2106 ssi3: ssi-3 { 2109 ssi3: ssi-3 {
2107 inter 2110 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2108 dmas 2111 dmas = <&audma0 0x07>, <&audma1 0x08>;
2109 dma-n 2112 dma-names = "rx", "tx";
2110 }; 2113 };
2111 ssi4: ssi-4 { 2114 ssi4: ssi-4 {
2112 inter 2115 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2113 dmas 2116 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2114 dma-n 2117 dma-names = "rx", "tx";
2115 }; 2118 };
2116 ssi5: ssi-5 { 2119 ssi5: ssi-5 {
2117 inter 2120 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2118 dmas 2121 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2119 dma-n 2122 dma-names = "rx", "tx";
2120 }; 2123 };
2121 ssi6: ssi-6 { 2124 ssi6: ssi-6 {
2122 inter 2125 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2123 dmas 2126 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2124 dma-n 2127 dma-names = "rx", "tx";
2125 }; 2128 };
2126 ssi7: ssi-7 { 2129 ssi7: ssi-7 {
2127 inter 2130 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2128 dmas 2131 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2129 dma-n 2132 dma-names = "rx", "tx";
2130 }; 2133 };
2131 ssi8: ssi-8 { 2134 ssi8: ssi-8 {
2132 inter 2135 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2133 dmas 2136 dmas = <&audma0 0x11>, <&audma1 0x12>;
2134 dma-n 2137 dma-names = "rx", "tx";
2135 }; 2138 };
2136 ssi9: ssi-9 { 2139 ssi9: ssi-9 {
2137 inter 2140 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2138 dmas 2141 dmas = <&audma0 0x13>, <&audma1 0x14>;
2139 dma-n 2142 dma-names = "rx", "tx";
2140 }; 2143 };
2141 }; 2144 };
2142 }; 2145 };
2143 2146
2144 mlp: mlp@ec520000 { <<
2145 compatible = "renesas <<
2146 "renesas <<
2147 reg = <0 0xec520000 0 <<
2148 interrupts = <GIC_SPI <<
2149 <GIC_SPI 385 <<
2150 clocks = <&cpg CPG_MO <<
2151 power-domains = <&sys <<
2152 resets = <&cpg 802>; <<
2153 status = "disabled"; <<
2154 }; <<
2155 <<
2156 audma0: dma-controller@ec7000 2147 audma0: dma-controller@ec700000 {
2157 compatible = "renesas 2148 compatible = "renesas,dmac-r8a77965",
2158 "renesas 2149 "renesas,rcar-dmac";
2159 reg = <0 0xec700000 0 2150 reg = <0 0xec700000 0 0x10000>;
2160 interrupts = <GIC_SPI 2151 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2161 <GIC_SPI 2152 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2162 <GIC_SPI 2153 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2163 <GIC_SPI 2154 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2164 <GIC_SPI 2155 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2165 <GIC_SPI 2156 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2166 <GIC_SPI 2157 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2167 <GIC_SPI 2158 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2168 <GIC_SPI 2159 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2169 <GIC_SPI 2160 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2170 <GIC_SPI 2161 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2171 <GIC_SPI 2162 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2172 <GIC_SPI 2163 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2173 <GIC_SPI 2164 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2174 <GIC_SPI 2165 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2175 <GIC_SPI 2166 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2176 <GIC_SPI 2167 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2177 interrupt-names = "er 2168 interrupt-names = "error",
2178 "ch0" 2169 "ch0", "ch1", "ch2", "ch3",
2179 "ch4" 2170 "ch4", "ch5", "ch6", "ch7",
2180 "ch8" 2171 "ch8", "ch9", "ch10", "ch11",
2181 "ch12 2172 "ch12", "ch13", "ch14", "ch15";
2182 clocks = <&cpg CPG_MO 2173 clocks = <&cpg CPG_MOD 502>;
2183 clock-names = "fck"; 2174 clock-names = "fck";
2184 power-domains = <&sys 2175 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2185 resets = <&cpg 502>; 2176 resets = <&cpg 502>;
2186 #dma-cells = <1>; 2177 #dma-cells = <1>;
2187 dma-channels = <16>; 2178 dma-channels = <16>;
2188 iommus = <&ipmmu_mp 0 <<
2189 <&ipmmu_mp 2 <<
2190 <&ipmmu_mp 4 <<
2191 <&ipmmu_mp 6 <<
2192 <&ipmmu_mp 8 <<
2193 <&ipmmu_mp 1 <<
2194 <&ipmmu_mp 1 <<
2195 <&ipmmu_mp 1 <<
2196 }; 2179 };
2197 2180
2198 audma1: dma-controller@ec7200 2181 audma1: dma-controller@ec720000 {
2199 compatible = "renesas 2182 compatible = "renesas,dmac-r8a77965",
2200 "renesas 2183 "renesas,rcar-dmac";
2201 reg = <0 0xec720000 0 2184 reg = <0 0xec720000 0 0x10000>;
2202 interrupts = <GIC_SPI 2185 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 2186 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2204 <GIC_SPI 2187 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2205 <GIC_SPI 2188 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2206 <GIC_SPI 2189 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2207 <GIC_SPI 2190 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2208 <GIC_SPI 2191 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2209 <GIC_SPI 2192 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2210 <GIC_SPI 2193 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2211 <GIC_SPI 2194 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2212 <GIC_SPI 2195 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2213 <GIC_SPI 2196 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2214 <GIC_SPI 2197 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2215 <GIC_SPI 2198 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2216 <GIC_SPI 2199 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2217 <GIC_SPI 2200 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2218 <GIC_SPI 2201 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2219 interrupt-names = "er 2202 interrupt-names = "error",
2220 "ch0" 2203 "ch0", "ch1", "ch2", "ch3",
2221 "ch4" 2204 "ch4", "ch5", "ch6", "ch7",
2222 "ch8" 2205 "ch8", "ch9", "ch10", "ch11",
2223 "ch12 2206 "ch12", "ch13", "ch14", "ch15";
2224 clocks = <&cpg CPG_MO 2207 clocks = <&cpg CPG_MOD 501>;
2225 clock-names = "fck"; 2208 clock-names = "fck";
2226 power-domains = <&sys 2209 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2227 resets = <&cpg 501>; 2210 resets = <&cpg 501>;
2228 #dma-cells = <1>; 2211 #dma-cells = <1>;
2229 dma-channels = <16>; 2212 dma-channels = <16>;
2230 iommus = <&ipmmu_mp 1 <<
2231 <&ipmmu_mp 1 <<
2232 <&ipmmu_mp 2 <<
2233 <&ipmmu_mp 2 <<
2234 <&ipmmu_mp 2 <<
2235 <&ipmmu_mp 2 <<
2236 <&ipmmu_mp 2 <<
2237 <&ipmmu_mp 3 <<
2238 }; 2213 };
2239 2214
2240 xhci0: usb@ee000000 { 2215 xhci0: usb@ee000000 {
2241 compatible = "renesas 2216 compatible = "renesas,xhci-r8a77965",
2242 "renesas 2217 "renesas,rcar-gen3-xhci";
2243 reg = <0 0xee000000 0 2218 reg = <0 0xee000000 0 0xc00>;
2244 interrupts = <GIC_SPI 2219 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2245 clocks = <&cpg CPG_MO 2220 clocks = <&cpg CPG_MOD 328>;
2246 power-domains = <&sys 2221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2247 resets = <&cpg 328>; 2222 resets = <&cpg 328>;
2248 status = "disabled"; 2223 status = "disabled";
2249 }; 2224 };
2250 2225
2251 usb3_peri0: usb@ee020000 { 2226 usb3_peri0: usb@ee020000 {
2252 compatible = "renesas 2227 compatible = "renesas,r8a77965-usb3-peri",
2253 "renesas 2228 "renesas,rcar-gen3-usb3-peri";
2254 reg = <0 0xee020000 0 2229 reg = <0 0xee020000 0 0x400>;
2255 interrupts = <GIC_SPI 2230 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2256 clocks = <&cpg CPG_MO 2231 clocks = <&cpg CPG_MOD 328>;
2257 power-domains = <&sys 2232 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2258 resets = <&cpg 328>; 2233 resets = <&cpg 328>;
2259 status = "disabled"; 2234 status = "disabled";
2260 }; 2235 };
2261 2236
2262 ohci0: usb@ee080000 { 2237 ohci0: usb@ee080000 {
2263 compatible = "generic 2238 compatible = "generic-ohci";
2264 reg = <0 0xee080000 0 2239 reg = <0 0xee080000 0 0x100>;
2265 interrupts = <GIC_SPI 2240 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2266 clocks = <&cpg CPG_MO 2241 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2267 phys = <&usb2_phy0 1> 2242 phys = <&usb2_phy0 1>;
2268 phy-names = "usb"; 2243 phy-names = "usb";
2269 power-domains = <&sys 2244 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2270 resets = <&cpg 703>, 2245 resets = <&cpg 703>, <&cpg 704>;
2271 status = "disabled"; 2246 status = "disabled";
2272 }; 2247 };
2273 2248
2274 ohci1: usb@ee0a0000 { 2249 ohci1: usb@ee0a0000 {
2275 compatible = "generic 2250 compatible = "generic-ohci";
2276 reg = <0 0xee0a0000 0 2251 reg = <0 0xee0a0000 0 0x100>;
2277 interrupts = <GIC_SPI 2252 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2278 clocks = <&cpg CPG_MO 2253 clocks = <&cpg CPG_MOD 702>;
2279 phys = <&usb2_phy1 1> 2254 phys = <&usb2_phy1 1>;
2280 phy-names = "usb"; 2255 phy-names = "usb";
2281 power-domains = <&sys 2256 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2282 resets = <&cpg 702>; 2257 resets = <&cpg 702>;
2283 status = "disabled"; 2258 status = "disabled";
2284 }; 2259 };
2285 2260
2286 ehci0: usb@ee080100 { 2261 ehci0: usb@ee080100 {
2287 compatible = "generic 2262 compatible = "generic-ehci";
2288 reg = <0 0xee080100 0 2263 reg = <0 0xee080100 0 0x100>;
2289 interrupts = <GIC_SPI 2264 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2290 clocks = <&cpg CPG_MO 2265 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2291 phys = <&usb2_phy0 2> 2266 phys = <&usb2_phy0 2>;
2292 phy-names = "usb"; 2267 phy-names = "usb";
2293 companion = <&ohci0>; 2268 companion = <&ohci0>;
2294 power-domains = <&sys 2269 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2295 resets = <&cpg 703>, 2270 resets = <&cpg 703>, <&cpg 704>;
2296 status = "disabled"; 2271 status = "disabled";
2297 }; 2272 };
2298 2273
2299 ehci1: usb@ee0a0100 { 2274 ehci1: usb@ee0a0100 {
2300 compatible = "generic 2275 compatible = "generic-ehci";
2301 reg = <0 0xee0a0100 0 2276 reg = <0 0xee0a0100 0 0x100>;
2302 interrupts = <GIC_SPI 2277 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2303 clocks = <&cpg CPG_MO 2278 clocks = <&cpg CPG_MOD 702>;
2304 phys = <&usb2_phy1 2> 2279 phys = <&usb2_phy1 2>;
2305 phy-names = "usb"; 2280 phy-names = "usb";
2306 companion = <&ohci1>; 2281 companion = <&ohci1>;
2307 power-domains = <&sys 2282 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2308 resets = <&cpg 702>; 2283 resets = <&cpg 702>;
2309 status = "disabled"; 2284 status = "disabled";
2310 }; 2285 };
2311 2286
2312 usb2_phy0: usb-phy@ee080200 { 2287 usb2_phy0: usb-phy@ee080200 {
2313 compatible = "renesas 2288 compatible = "renesas,usb2-phy-r8a77965",
2314 "renesas 2289 "renesas,rcar-gen3-usb2-phy";
2315 reg = <0 0xee080200 0 2290 reg = <0 0xee080200 0 0x700>;
2316 interrupts = <GIC_SPI 2291 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MO 2292 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2318 power-domains = <&sys 2293 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2319 resets = <&cpg 703>, 2294 resets = <&cpg 703>, <&cpg 704>;
2320 #phy-cells = <1>; 2295 #phy-cells = <1>;
2321 status = "disabled"; 2296 status = "disabled";
2322 }; 2297 };
2323 2298
2324 usb2_phy1: usb-phy@ee0a0200 { 2299 usb2_phy1: usb-phy@ee0a0200 {
2325 compatible = "renesas 2300 compatible = "renesas,usb2-phy-r8a77965",
2326 "renesas 2301 "renesas,rcar-gen3-usb2-phy";
2327 reg = <0 0xee0a0200 0 2302 reg = <0 0xee0a0200 0 0x700>;
2328 clocks = <&cpg CPG_MO 2303 clocks = <&cpg CPG_MOD 702>;
2329 power-domains = <&sys 2304 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2330 resets = <&cpg 702>; 2305 resets = <&cpg 702>;
2331 #phy-cells = <1>; 2306 #phy-cells = <1>;
2332 status = "disabled"; 2307 status = "disabled";
2333 }; 2308 };
2334 2309
2335 sdhi0: mmc@ee100000 { 2310 sdhi0: mmc@ee100000 {
2336 compatible = "renesas 2311 compatible = "renesas,sdhi-r8a77965",
2337 "renesas 2312 "renesas,rcar-gen3-sdhi";
2338 reg = <0 0xee100000 0 2313 reg = <0 0xee100000 0 0x2000>;
2339 interrupts = <GIC_SPI 2314 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2340 clocks = <&cpg CPG_MO !! 2315 clocks = <&cpg CPG_MOD 314>;
2341 clock-names = "core", <<
2342 max-frequency = <2000 2316 max-frequency = <200000000>;
2343 power-domains = <&sys 2317 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2344 resets = <&cpg 314>; 2318 resets = <&cpg 314>;
2345 iommus = <&ipmmu_ds1 2319 iommus = <&ipmmu_ds1 32>;
2346 status = "disabled"; 2320 status = "disabled";
2347 }; 2321 };
2348 2322
2349 sdhi1: mmc@ee120000 { 2323 sdhi1: mmc@ee120000 {
2350 compatible = "renesas 2324 compatible = "renesas,sdhi-r8a77965",
2351 "renesas 2325 "renesas,rcar-gen3-sdhi";
2352 reg = <0 0xee120000 0 2326 reg = <0 0xee120000 0 0x2000>;
2353 interrupts = <GIC_SPI 2327 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MO !! 2328 clocks = <&cpg CPG_MOD 313>;
2355 clock-names = "core", <<
2356 max-frequency = <2000 2329 max-frequency = <200000000>;
2357 power-domains = <&sys 2330 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2358 resets = <&cpg 313>; 2331 resets = <&cpg 313>;
2359 iommus = <&ipmmu_ds1 2332 iommus = <&ipmmu_ds1 33>;
2360 status = "disabled"; 2333 status = "disabled";
2361 }; 2334 };
2362 2335
2363 sdhi2: mmc@ee140000 { 2336 sdhi2: mmc@ee140000 {
2364 compatible = "renesas 2337 compatible = "renesas,sdhi-r8a77965",
2365 "renesas 2338 "renesas,rcar-gen3-sdhi";
2366 reg = <0 0xee140000 0 2339 reg = <0 0xee140000 0 0x2000>;
2367 interrupts = <GIC_SPI 2340 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2368 clocks = <&cpg CPG_MO !! 2341 clocks = <&cpg CPG_MOD 312>;
2369 clock-names = "core", <<
2370 max-frequency = <2000 2342 max-frequency = <200000000>;
2371 power-domains = <&sys 2343 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2372 resets = <&cpg 312>; 2344 resets = <&cpg 312>;
2373 iommus = <&ipmmu_ds1 2345 iommus = <&ipmmu_ds1 34>;
2374 status = "disabled"; 2346 status = "disabled";
2375 }; 2347 };
2376 2348
2377 sdhi3: mmc@ee160000 { 2349 sdhi3: mmc@ee160000 {
2378 compatible = "renesas 2350 compatible = "renesas,sdhi-r8a77965",
2379 "renesas 2351 "renesas,rcar-gen3-sdhi";
2380 reg = <0 0xee160000 0 2352 reg = <0 0xee160000 0 0x2000>;
2381 interrupts = <GIC_SPI 2353 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2382 clocks = <&cpg CPG_MO !! 2354 clocks = <&cpg CPG_MOD 311>;
2383 clock-names = "core", <<
2384 max-frequency = <2000 2355 max-frequency = <200000000>;
2385 power-domains = <&sys 2356 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2386 resets = <&cpg 311>; 2357 resets = <&cpg 311>;
2387 iommus = <&ipmmu_ds1 2358 iommus = <&ipmmu_ds1 35>;
2388 status = "disabled"; 2359 status = "disabled";
2389 }; 2360 };
2390 2361
2391 rpc: spi@ee200000 { <<
2392 compatible = "renesas <<
2393 "renesas <<
2394 reg = <0 0xee200000 0 <<
2395 <0 0x08000000 0 <<
2396 <0 0xee208000 0 <<
2397 reg-names = "regs", " <<
2398 interrupts = <GIC_SPI <<
2399 clocks = <&cpg CPG_MO <<
2400 power-domains = <&sys <<
2401 resets = <&cpg 917>; <<
2402 #address-cells = <1>; <<
2403 #size-cells = <0>; <<
2404 status = "disabled"; <<
2405 }; <<
2406 <<
2407 sata: sata@ee300000 { 2362 sata: sata@ee300000 {
2408 compatible = "renesas 2363 compatible = "renesas,sata-r8a77965",
2409 "renesas 2364 "renesas,rcar-gen3-sata";
2410 reg = <0 0xee300000 0 2365 reg = <0 0xee300000 0 0x200000>;
2411 interrupts = <GIC_SPI 2366 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2412 clocks = <&cpg CPG_MO 2367 clocks = <&cpg CPG_MOD 815>;
2413 power-domains = <&sys 2368 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2414 resets = <&cpg 815>; 2369 resets = <&cpg 815>;
2415 iommus = <&ipmmu_hc 2 <<
2416 status = "disabled"; 2370 status = "disabled";
2417 }; 2371 };
2418 2372
2419 gic: interrupt-controller@f10 2373 gic: interrupt-controller@f1010000 {
2420 compatible = "arm,gic 2374 compatible = "arm,gic-400";
2421 #interrupt-cells = <3 2375 #interrupt-cells = <3>;
2422 #address-cells = <0>; 2376 #address-cells = <0>;
2423 interrupt-controller; 2377 interrupt-controller;
2424 reg = <0x0 0xf1010000 2378 reg = <0x0 0xf1010000 0 0x1000>,
2425 <0x0 0xf1020000 2379 <0x0 0xf1020000 0 0x20000>,
2426 <0x0 0xf1040000 2380 <0x0 0xf1040000 0 0x20000>,
2427 <0x0 0xf1060000 2381 <0x0 0xf1060000 0 0x20000>;
2428 interrupts = <GIC_PPI 2382 interrupts = <GIC_PPI 9
2429 (GIC_ 2383 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2430 clocks = <&cpg CPG_MO 2384 clocks = <&cpg CPG_MOD 408>;
2431 clock-names = "clk"; 2385 clock-names = "clk";
2432 power-domains = <&sys 2386 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2433 resets = <&cpg 408>; 2387 resets = <&cpg 408>;
2434 }; 2388 };
2435 2389
2436 pciec0: pcie@fe000000 { 2390 pciec0: pcie@fe000000 {
2437 compatible = "renesas 2391 compatible = "renesas,pcie-r8a77965",
2438 "renesas 2392 "renesas,pcie-rcar-gen3";
2439 reg = <0 0xfe000000 0 2393 reg = <0 0xfe000000 0 0x80000>;
2440 #address-cells = <3>; 2394 #address-cells = <3>;
2441 #size-cells = <2>; 2395 #size-cells = <2>;
2442 bus-range = <0x00 0xf 2396 bus-range = <0x00 0xff>;
2443 device_type = "pci"; 2397 device_type = "pci";
2444 ranges = <0x01000000 2398 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2445 <0x02000000 2399 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2446 <0x02000000 2400 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2447 <0x42000000 2401 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2448 /* Map all possible D !! 2402 /* Map all possible DDR as inbound ranges */
2449 dma-ranges = <0x42000 !! 2403 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2450 interrupts = <GIC_SPI 2404 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 117 2405 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2452 <GIC_SPI 118 2406 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2453 #interrupt-cells = <1 2407 #interrupt-cells = <1>;
2454 interrupt-map-mask = 2408 interrupt-map-mask = <0 0 0 0>;
2455 interrupt-map = <0 0 2409 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2456 clocks = <&cpg CPG_MO 2410 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2457 clock-names = "pcie", 2411 clock-names = "pcie", "pcie_bus";
2458 power-domains = <&sys 2412 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2459 resets = <&cpg 319>; 2413 resets = <&cpg 319>;
2460 iommu-map = <0 &ipmmu <<
2461 iommu-map-mask = <0>; <<
2462 status = "disabled"; 2414 status = "disabled";
2463 }; 2415 };
2464 2416
2465 pciec1: pcie@ee800000 { 2417 pciec1: pcie@ee800000 {
2466 compatible = "renesas 2418 compatible = "renesas,pcie-r8a77965",
2467 "renesas 2419 "renesas,pcie-rcar-gen3";
2468 reg = <0 0xee800000 0 2420 reg = <0 0xee800000 0 0x80000>;
2469 #address-cells = <3>; 2421 #address-cells = <3>;
2470 #size-cells = <2>; 2422 #size-cells = <2>;
2471 bus-range = <0x00 0xf 2423 bus-range = <0x00 0xff>;
2472 device_type = "pci"; 2424 device_type = "pci";
2473 ranges = <0x01000000 2425 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2474 <0x02000000 2426 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2475 <0x02000000 2427 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2476 <0x42000000 2428 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2477 /* Map all possible D !! 2429 /* Map all possible DDR as inbound ranges */
2478 dma-ranges = <0x42000 !! 2430 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2479 interrupts = <GIC_SPI 2431 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2480 <GIC_SPI 149 2432 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 150 2433 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2482 #interrupt-cells = <1 2434 #interrupt-cells = <1>;
2483 interrupt-map-mask = 2435 interrupt-map-mask = <0 0 0 0>;
2484 interrupt-map = <0 0 2436 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MO 2437 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2486 clock-names = "pcie", 2438 clock-names = "pcie", "pcie_bus";
2487 power-domains = <&sys 2439 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2488 resets = <&cpg 318>; 2440 resets = <&cpg 318>;
2489 iommu-map = <0 &ipmmu <<
2490 iommu-map-mask = <0>; <<
2491 status = "disabled"; 2441 status = "disabled";
2492 }; 2442 };
2493 2443
2494 fdp1@fe940000 { 2444 fdp1@fe940000 {
2495 compatible = "renesas 2445 compatible = "renesas,fdp1";
2496 reg = <0 0xfe940000 0 2446 reg = <0 0xfe940000 0 0x2400>;
2497 interrupts = <GIC_SPI 2447 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2498 clocks = <&cpg CPG_MO 2448 clocks = <&cpg CPG_MOD 119>;
2499 power-domains = <&sys 2449 power-domains = <&sysc R8A77965_PD_A3VP>;
2500 resets = <&cpg 119>; 2450 resets = <&cpg 119>;
2501 renesas,fcp = <&fcpf0 2451 renesas,fcp = <&fcpf0>;
2502 }; 2452 };
2503 2453
2504 fcpf0: fcp@fe950000 { 2454 fcpf0: fcp@fe950000 {
2505 compatible = "renesas 2455 compatible = "renesas,fcpf";
2506 reg = <0 0xfe950000 0 2456 reg = <0 0xfe950000 0 0x200>;
2507 clocks = <&cpg CPG_MO 2457 clocks = <&cpg CPG_MOD 615>;
2508 power-domains = <&sys 2458 power-domains = <&sysc R8A77965_PD_A3VP>;
2509 resets = <&cpg 615>; 2459 resets = <&cpg 615>;
2510 iommus = <&ipmmu_vp0 <<
2511 }; 2460 };
2512 2461
2513 vspb: vsp@fe960000 { 2462 vspb: vsp@fe960000 {
2514 compatible = "renesas 2463 compatible = "renesas,vsp2";
2515 reg = <0 0xfe960000 0 2464 reg = <0 0xfe960000 0 0x8000>;
2516 interrupts = <GIC_SPI 2465 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2517 clocks = <&cpg CPG_MO 2466 clocks = <&cpg CPG_MOD 626>;
2518 power-domains = <&sys 2467 power-domains = <&sysc R8A77965_PD_A3VP>;
2519 resets = <&cpg 626>; 2468 resets = <&cpg 626>;
2520 2469
2521 renesas,fcp = <&fcpvb 2470 renesas,fcp = <&fcpvb0>;
2522 }; 2471 };
2523 2472
2524 vspi0: vsp@fe9a0000 { 2473 vspi0: vsp@fe9a0000 {
2525 compatible = "renesas 2474 compatible = "renesas,vsp2";
2526 reg = <0 0xfe9a0000 0 2475 reg = <0 0xfe9a0000 0 0x8000>;
2527 interrupts = <GIC_SPI 2476 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2528 clocks = <&cpg CPG_MO 2477 clocks = <&cpg CPG_MOD 631>;
2529 power-domains = <&sys 2478 power-domains = <&sysc R8A77965_PD_A3VP>;
2530 resets = <&cpg 631>; 2479 resets = <&cpg 631>;
2531 2480
2532 renesas,fcp = <&fcpvi 2481 renesas,fcp = <&fcpvi0>;
2533 }; 2482 };
2534 2483
2535 vspd0: vsp@fea20000 { 2484 vspd0: vsp@fea20000 {
2536 compatible = "renesas 2485 compatible = "renesas,vsp2";
2537 reg = <0 0xfea20000 0 2486 reg = <0 0xfea20000 0 0x5000>;
2538 interrupts = <GIC_SPI 2487 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2539 clocks = <&cpg CPG_MO 2488 clocks = <&cpg CPG_MOD 623>;
2540 power-domains = <&sys 2489 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2541 resets = <&cpg 623>; 2490 resets = <&cpg 623>;
2542 2491
2543 renesas,fcp = <&fcpvd 2492 renesas,fcp = <&fcpvd0>;
2544 }; 2493 };
2545 2494
2546 vspd1: vsp@fea28000 { 2495 vspd1: vsp@fea28000 {
2547 compatible = "renesas 2496 compatible = "renesas,vsp2";
2548 reg = <0 0xfea28000 0 2497 reg = <0 0xfea28000 0 0x5000>;
2549 interrupts = <GIC_SPI 2498 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2550 clocks = <&cpg CPG_MO 2499 clocks = <&cpg CPG_MOD 622>;
2551 power-domains = <&sys 2500 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2552 resets = <&cpg 622>; 2501 resets = <&cpg 622>;
2553 2502
2554 renesas,fcp = <&fcpvd 2503 renesas,fcp = <&fcpvd1>;
2555 }; 2504 };
2556 2505
2557 fcpvb0: fcp@fe96f000 { 2506 fcpvb0: fcp@fe96f000 {
2558 compatible = "renesas 2507 compatible = "renesas,fcpv";
2559 reg = <0 0xfe96f000 0 2508 reg = <0 0xfe96f000 0 0x200>;
2560 clocks = <&cpg CPG_MO 2509 clocks = <&cpg CPG_MOD 607>;
2561 power-domains = <&sys 2510 power-domains = <&sysc R8A77965_PD_A3VP>;
2562 resets = <&cpg 607>; 2511 resets = <&cpg 607>;
2563 iommus = <&ipmmu_vp0 <<
2564 }; 2512 };
2565 2513
2566 fcpvd0: fcp@fea27000 { 2514 fcpvd0: fcp@fea27000 {
2567 compatible = "renesas 2515 compatible = "renesas,fcpv";
2568 reg = <0 0xfea27000 0 2516 reg = <0 0xfea27000 0 0x200>;
2569 clocks = <&cpg CPG_MO 2517 clocks = <&cpg CPG_MOD 603>;
2570 power-domains = <&sys 2518 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2571 resets = <&cpg 603>; 2519 resets = <&cpg 603>;
2572 iommus = <&ipmmu_vi0 <<
2573 }; 2520 };
2574 2521
2575 fcpvd1: fcp@fea2f000 { 2522 fcpvd1: fcp@fea2f000 {
2576 compatible = "renesas 2523 compatible = "renesas,fcpv";
2577 reg = <0 0xfea2f000 0 2524 reg = <0 0xfea2f000 0 0x200>;
2578 clocks = <&cpg CPG_MO 2525 clocks = <&cpg CPG_MOD 602>;
2579 power-domains = <&sys 2526 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2580 resets = <&cpg 602>; 2527 resets = <&cpg 602>;
2581 iommus = <&ipmmu_vi0 <<
2582 }; 2528 };
2583 2529
2584 fcpvi0: fcp@fe9af000 { 2530 fcpvi0: fcp@fe9af000 {
2585 compatible = "renesas 2531 compatible = "renesas,fcpv";
2586 reg = <0 0xfe9af000 0 2532 reg = <0 0xfe9af000 0 0x200>;
2587 clocks = <&cpg CPG_MO 2533 clocks = <&cpg CPG_MOD 611>;
2588 power-domains = <&sys 2534 power-domains = <&sysc R8A77965_PD_A3VP>;
2589 resets = <&cpg 611>; 2535 resets = <&cpg 611>;
2590 iommus = <&ipmmu_vp0 <<
2591 }; 2536 };
2592 2537
2593 cmm0: cmm@fea40000 { 2538 cmm0: cmm@fea40000 {
2594 compatible = "renesas 2539 compatible = "renesas,r8a77965-cmm",
2595 "renesas 2540 "renesas,rcar-gen3-cmm";
2596 reg = <0 0xfea40000 0 2541 reg = <0 0xfea40000 0 0x1000>;
2597 power-domains = <&sys 2542 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2598 clocks = <&cpg CPG_MO 2543 clocks = <&cpg CPG_MOD 711>;
2599 resets = <&cpg 711>; 2544 resets = <&cpg 711>;
2600 }; 2545 };
2601 2546
2602 cmm1: cmm@fea50000 { 2547 cmm1: cmm@fea50000 {
2603 compatible = "renesas 2548 compatible = "renesas,r8a77965-cmm",
2604 "renesas 2549 "renesas,rcar-gen3-cmm";
2605 reg = <0 0xfea50000 0 2550 reg = <0 0xfea50000 0 0x1000>;
2606 power-domains = <&sys 2551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2607 clocks = <&cpg CPG_MO 2552 clocks = <&cpg CPG_MOD 710>;
2608 resets = <&cpg 710>; 2553 resets = <&cpg 710>;
2609 }; 2554 };
2610 2555
2611 cmm3: cmm@fea70000 { 2556 cmm3: cmm@fea70000 {
2612 compatible = "renesas 2557 compatible = "renesas,r8a77965-cmm",
2613 "renesas 2558 "renesas,rcar-gen3-cmm";
2614 reg = <0 0xfea70000 0 2559 reg = <0 0xfea70000 0 0x1000>;
2615 power-domains = <&sys 2560 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2616 clocks = <&cpg CPG_MO 2561 clocks = <&cpg CPG_MOD 708>;
2617 resets = <&cpg 708>; 2562 resets = <&cpg 708>;
2618 }; 2563 };
2619 2564
2620 csi20: csi2@fea80000 { 2565 csi20: csi2@fea80000 {
2621 compatible = "renesas 2566 compatible = "renesas,r8a77965-csi2";
2622 reg = <0 0xfea80000 0 2567 reg = <0 0xfea80000 0 0x10000>;
2623 interrupts = <GIC_SPI 2568 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2624 clocks = <&cpg CPG_MO 2569 clocks = <&cpg CPG_MOD 714>;
2625 power-domains = <&sys 2570 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2626 resets = <&cpg 714>; 2571 resets = <&cpg 714>;
2627 status = "disabled"; 2572 status = "disabled";
2628 2573
2629 ports { 2574 ports {
2630 #address-cell 2575 #address-cells = <1>;
2631 #size-cells = 2576 #size-cells = <0>;
2632 2577
2633 port@0 { <<
2634 reg = <<
2635 }; <<
2636 <<
2637 port@1 { 2578 port@1 {
2638 #addr 2579 #address-cells = <1>;
2639 #size 2580 #size-cells = <0>;
2640 2581
2641 reg = 2582 reg = <1>;
2642 2583
2643 csi20 2584 csi20vin0: endpoint@0 {
2644 2585 reg = <0>;
2645 2586 remote-endpoint = <&vin0csi20>;
2646 }; 2587 };
2647 csi20 2588 csi20vin1: endpoint@1 {
2648 2589 reg = <1>;
2649 2590 remote-endpoint = <&vin1csi20>;
2650 }; 2591 };
2651 csi20 2592 csi20vin2: endpoint@2 {
2652 2593 reg = <2>;
2653 2594 remote-endpoint = <&vin2csi20>;
2654 }; 2595 };
2655 csi20 2596 csi20vin3: endpoint@3 {
2656 2597 reg = <3>;
2657 2598 remote-endpoint = <&vin3csi20>;
2658 }; 2599 };
2659 csi20 2600 csi20vin4: endpoint@4 {
2660 2601 reg = <4>;
2661 2602 remote-endpoint = <&vin4csi20>;
2662 }; 2603 };
2663 csi20 2604 csi20vin5: endpoint@5 {
2664 2605 reg = <5>;
2665 2606 remote-endpoint = <&vin5csi20>;
2666 }; 2607 };
2667 csi20 2608 csi20vin6: endpoint@6 {
2668 2609 reg = <6>;
2669 2610 remote-endpoint = <&vin6csi20>;
2670 }; 2611 };
2671 csi20 2612 csi20vin7: endpoint@7 {
2672 2613 reg = <7>;
2673 2614 remote-endpoint = <&vin7csi20>;
2674 }; 2615 };
2675 }; 2616 };
2676 }; 2617 };
2677 }; 2618 };
2678 2619
2679 csi40: csi2@feaa0000 { 2620 csi40: csi2@feaa0000 {
2680 compatible = "renesas 2621 compatible = "renesas,r8a77965-csi2";
2681 reg = <0 0xfeaa0000 0 2622 reg = <0 0xfeaa0000 0 0x10000>;
2682 interrupts = <GIC_SPI 2623 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2683 clocks = <&cpg CPG_MO 2624 clocks = <&cpg CPG_MOD 716>;
2684 power-domains = <&sys 2625 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2685 resets = <&cpg 716>; 2626 resets = <&cpg 716>;
2686 status = "disabled"; 2627 status = "disabled";
2687 2628
2688 ports { 2629 ports {
2689 #address-cell 2630 #address-cells = <1>;
2690 #size-cells = 2631 #size-cells = <0>;
2691 2632
2692 port@0 { <<
2693 reg = <<
2694 }; <<
2695 <<
2696 port@1 { 2633 port@1 {
2697 #addr 2634 #address-cells = <1>;
2698 #size 2635 #size-cells = <0>;
2699 2636
2700 reg = 2637 reg = <1>;
2701 2638
2702 csi40 2639 csi40vin0: endpoint@0 {
2703 2640 reg = <0>;
2704 2641 remote-endpoint = <&vin0csi40>;
2705 }; 2642 };
2706 csi40 2643 csi40vin1: endpoint@1 {
2707 2644 reg = <1>;
2708 2645 remote-endpoint = <&vin1csi40>;
2709 }; 2646 };
2710 csi40 2647 csi40vin2: endpoint@2 {
2711 2648 reg = <2>;
2712 2649 remote-endpoint = <&vin2csi40>;
2713 }; 2650 };
2714 csi40 2651 csi40vin3: endpoint@3 {
2715 2652 reg = <3>;
2716 2653 remote-endpoint = <&vin3csi40>;
2717 }; 2654 };
2718 csi40 2655 csi40vin4: endpoint@4 {
2719 2656 reg = <4>;
2720 2657 remote-endpoint = <&vin4csi40>;
2721 }; 2658 };
2722 csi40 2659 csi40vin5: endpoint@5 {
2723 2660 reg = <5>;
2724 2661 remote-endpoint = <&vin5csi40>;
2725 }; 2662 };
2726 csi40 2663 csi40vin6: endpoint@6 {
2727 2664 reg = <6>;
2728 2665 remote-endpoint = <&vin6csi40>;
2729 }; 2666 };
2730 csi40 2667 csi40vin7: endpoint@7 {
2731 2668 reg = <7>;
2732 2669 remote-endpoint = <&vin7csi40>;
2733 }; 2670 };
2734 }; 2671 };
2735 }; 2672 };
2736 }; 2673 };
2737 2674
2738 hdmi0: hdmi@fead0000 { 2675 hdmi0: hdmi@fead0000 {
2739 compatible = "renesas 2676 compatible = "renesas,r8a77965-hdmi",
2740 "renesas 2677 "renesas,rcar-gen3-hdmi";
2741 reg = <0 0xfead0000 0 2678 reg = <0 0xfead0000 0 0x10000>;
2742 interrupts = <GIC_SPI 2679 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2743 clocks = <&cpg CPG_MO 2680 clocks = <&cpg CPG_MOD 729>,
2744 <&cpg CPG_CO 2681 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2745 clock-names = "iahb", 2682 clock-names = "iahb", "isfr";
2746 power-domains = <&sys 2683 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2747 resets = <&cpg 729>; 2684 resets = <&cpg 729>;
2748 status = "disabled"; 2685 status = "disabled";
2749 2686
2750 ports { 2687 ports {
2751 #address-cell 2688 #address-cells = <1>;
2752 #size-cells = 2689 #size-cells = <0>;
2753 port@0 { 2690 port@0 {
2754 reg = 2691 reg = <0>;
2755 dw_hd 2692 dw_hdmi0_in: endpoint {
2756 2693 remote-endpoint = <&du_out_hdmi0>;
2757 }; 2694 };
2758 }; 2695 };
2759 port@1 { 2696 port@1 {
2760 reg = 2697 reg = <1>;
2761 }; 2698 };
2762 }; 2699 };
2763 }; 2700 };
2764 2701
2765 du: display@feb00000 { 2702 du: display@feb00000 {
2766 compatible = "renesas 2703 compatible = "renesas,du-r8a77965";
2767 reg = <0 0xfeb00000 0 2704 reg = <0 0xfeb00000 0 0x80000>;
2768 interrupts = <GIC_SPI 2705 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2769 <GIC_SPI 2706 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2770 <GIC_SPI 2707 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2771 clocks = <&cpg CPG_MO 2708 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2772 <&cpg CPG_MO 2709 <&cpg CPG_MOD 721>;
2773 clock-names = "du.0", 2710 clock-names = "du.0", "du.1", "du.3";
2774 resets = <&cpg 724>, 2711 resets = <&cpg 724>, <&cpg 722>;
2775 reset-names = "du.0", 2712 reset-names = "du.0", "du.3";
2776 2713
2777 renesas,cmms = <&cmm0 2714 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
2778 renesas,vsps = <&vspd 2715 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2779 2716
2780 status = "disabled"; 2717 status = "disabled";
2781 2718
2782 ports { 2719 ports {
2783 #address-cell 2720 #address-cells = <1>;
2784 #size-cells = 2721 #size-cells = <0>;
2785 2722
2786 port@0 { 2723 port@0 {
2787 reg = 2724 reg = <0>;
>> 2725 du_out_rgb: endpoint {
>> 2726 };
2788 }; 2727 };
2789 port@1 { 2728 port@1 {
2790 reg = 2729 reg = <1>;
2791 du_ou 2730 du_out_hdmi0: endpoint {
2792 2731 remote-endpoint = <&dw_hdmi0_in>;
2793 }; 2732 };
2794 }; 2733 };
2795 port@2 { 2734 port@2 {
2796 reg = 2735 reg = <2>;
2797 du_ou 2736 du_out_lvds0: endpoint {
2798 2737 remote-endpoint = <&lvds0_in>;
2799 }; 2738 };
2800 }; 2739 };
2801 }; 2740 };
2802 }; 2741 };
2803 2742
2804 lvds0: lvds@feb90000 { 2743 lvds0: lvds@feb90000 {
2805 compatible = "renesas 2744 compatible = "renesas,r8a77965-lvds";
2806 reg = <0 0xfeb90000 0 2745 reg = <0 0xfeb90000 0 0x14>;
2807 clocks = <&cpg CPG_MO 2746 clocks = <&cpg CPG_MOD 727>;
2808 power-domains = <&sys 2747 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2809 resets = <&cpg 727>; 2748 resets = <&cpg 727>;
2810 status = "disabled"; 2749 status = "disabled";
2811 2750
2812 ports { 2751 ports {
2813 #address-cell 2752 #address-cells = <1>;
2814 #size-cells = 2753 #size-cells = <0>;
2815 2754
2816 port@0 { 2755 port@0 {
2817 reg = 2756 reg = <0>;
2818 lvds0 2757 lvds0_in: endpoint {
2819 2758 remote-endpoint = <&du_out_lvds0>;
2820 }; 2759 };
2821 }; 2760 };
2822 port@1 { 2761 port@1 {
2823 reg = 2762 reg = <1>;
>> 2763 lvds0_out: endpoint {
>> 2764 };
2824 }; 2765 };
2825 }; 2766 };
2826 }; 2767 };
2827 2768
2828 prr: chipid@fff00044 { 2769 prr: chipid@fff00044 {
2829 compatible = "renesas 2770 compatible = "renesas,prr";
2830 reg = <0 0xfff00044 0 2771 reg = <0 0xfff00044 0 4>;
2831 }; 2772 };
2832 }; 2773 };
2833 2774
2834 thermal-zones { 2775 thermal-zones {
2835 sensor1_thermal: sensor1-ther !! 2776 sensor_thermal1: sensor-thermal1 {
2836 polling-delay-passive 2777 polling-delay-passive = <250>;
2837 polling-delay = <1000 2778 polling-delay = <1000>;
2838 thermal-sensors = <&t 2779 thermal-sensors = <&tsc 0>;
2839 sustainable-power = < 2780 sustainable-power = <2439>;
2840 2781
2841 trips { 2782 trips {
2842 sensor1_crit: 2783 sensor1_crit: sensor1-crit {
2843 tempe 2784 temperature = <120000>;
2844 hyste 2785 hysteresis = <1000>;
2845 type 2786 type = "critical";
2846 }; 2787 };
2847 }; 2788 };
2848 }; 2789 };
2849 2790
2850 sensor2_thermal: sensor2-ther !! 2791 sensor_thermal2: sensor-thermal2 {
2851 polling-delay-passive 2792 polling-delay-passive = <250>;
2852 polling-delay = <1000 2793 polling-delay = <1000>;
2853 thermal-sensors = <&t 2794 thermal-sensors = <&tsc 1>;
2854 sustainable-power = < 2795 sustainable-power = <2439>;
2855 2796
2856 trips { 2797 trips {
2857 sensor2_crit: 2798 sensor2_crit: sensor2-crit {
2858 tempe 2799 temperature = <120000>;
2859 hyste 2800 hysteresis = <1000>;
2860 type 2801 type = "critical";
2861 }; 2802 };
2862 }; 2803 };
2863 }; 2804 };
2864 2805
2865 sensor3_thermal: sensor3-ther !! 2806 sensor_thermal3: sensor-thermal3 {
2866 polling-delay-passive 2807 polling-delay-passive = <250>;
2867 polling-delay = <1000 2808 polling-delay = <1000>;
2868 thermal-sensors = <&t 2809 thermal-sensors = <&tsc 2>;
2869 sustainable-power = < 2810 sustainable-power = <2439>;
2870 2811
2871 trips { 2812 trips {
2872 target: trip- 2813 target: trip-point1 {
2873 /* mi 2814 /* miliCelsius */
2874 tempe 2815 temperature = <100000>;
2875 hyste 2816 hysteresis = <1000>;
2876 type 2817 type = "passive";
2877 }; 2818 };
2878 2819
2879 sensor3_crit: 2820 sensor3_crit: sensor3-crit {
2880 tempe 2821 temperature = <120000>;
2881 hyste 2822 hysteresis = <1000>;
2882 type 2823 type = "critical";
2883 }; 2824 };
2884 }; 2825 };
2885 2826
2886 cooling-maps { 2827 cooling-maps {
2887 map0 { 2828 map0 {
2888 trip 2829 trip = <&target>;
2889 cooli 2830 cooling-device = <&a57_0 2 4>;
2890 contr 2831 contribution = <1024>;
2891 }; 2832 };
2892 }; 2833 };
2893 }; 2834 };
2894 }; 2835 };
2895 2836
2896 timer { 2837 timer {
2897 compatible = "arm,armv8-timer 2838 compatible = "arm,armv8-timer";
2898 interrupts-extended = <&gic G 2839 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2899 <&gic G 2840 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2900 <&gic G 2841 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2901 <&gic G 2842 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2902 interrupt-names = "sec-phys", <<
2903 }; 2843 };
2904 2844
2905 /* External USB clocks - can be overr 2845 /* External USB clocks - can be overridden by the board */
2906 usb3s0_clk: usb3s0 { 2846 usb3s0_clk: usb3s0 {
2907 compatible = "fixed-clock"; 2847 compatible = "fixed-clock";
2908 #clock-cells = <0>; 2848 #clock-cells = <0>;
2909 clock-frequency = <0>; 2849 clock-frequency = <0>;
2910 }; 2850 };
2911 2851
2912 usb_extal_clk: usb_extal { 2852 usb_extal_clk: usb_extal {
2913 compatible = "fixed-clock"; 2853 compatible = "fixed-clock";
2914 #clock-cells = <0>; 2854 #clock-cells = <0>;
2915 clock-frequency = <0>; 2855 clock-frequency = <0>;
2916 }; 2856 };
2917 }; 2857 };
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