1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car M3-N (R8A7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 * 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+rene 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 * 6 *
7 * Based on r8a7796.dtsi 7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp 8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */ 9 */
10 10
11 #include <dt-bindings/clock/r8a77965-cpg-mssr. 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h> 13 #include <dt-bindings/power/r8a77965-sysc.h>
14 14
>> 15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
>> 16
15 #define SOC_HAS_SATA 17 #define SOC_HAS_SATA
16 18
17 / { 19 / {
18 compatible = "renesas,r8a77965"; 20 compatible = "renesas,r8a77965";
19 #address-cells = <2>; 21 #address-cells = <2>;
20 #size-cells = <2>; 22 #size-cells = <2>;
21 23
>> 24 aliases {
>> 25 i2c0 = &i2c0;
>> 26 i2c1 = &i2c1;
>> 27 i2c2 = &i2c2;
>> 28 i2c3 = &i2c3;
>> 29 i2c4 = &i2c4;
>> 30 i2c5 = &i2c5;
>> 31 i2c6 = &i2c6;
>> 32 i2c7 = &i2c_dvfs;
>> 33 };
>> 34
22 /* 35 /*
23 * The external audio clocks are confi 36 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default. 37 * clocks by default.
25 * Boards that provide audio clocks sh 38 * Boards that provide audio clocks should override them.
26 */ 39 */
27 audio_clk_a: audio_clk_a { 40 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock"; 41 compatible = "fixed-clock";
29 #clock-cells = <0>; 42 #clock-cells = <0>;
30 clock-frequency = <0>; 43 clock-frequency = <0>;
31 }; 44 };
32 45
33 audio_clk_b: audio_clk_b { 46 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock"; 47 compatible = "fixed-clock";
35 #clock-cells = <0>; 48 #clock-cells = <0>;
36 clock-frequency = <0>; 49 clock-frequency = <0>;
37 }; 50 };
38 51
39 audio_clk_c: audio_clk_c { 52 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
41 #clock-cells = <0>; 54 #clock-cells = <0>;
42 clock-frequency = <0>; 55 clock-frequency = <0>;
43 }; 56 };
44 57
45 /* External CAN clock - to be overridd 58 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can { 59 can_clk: can {
47 compatible = "fixed-clock"; 60 compatible = "fixed-clock";
48 #clock-cells = <0>; 61 #clock-cells = <0>;
49 clock-frequency = <0>; 62 clock-frequency = <0>;
50 }; 63 };
51 64
52 cluster0_opp: opp-table-0 { !! 65 cluster0_opp: opp_table0 {
53 compatible = "operating-points 66 compatible = "operating-points-v2";
54 opp-shared; 67 opp-shared;
55 68
56 opp-500000000 { 69 opp-500000000 {
57 opp-hz = /bits/ 64 <50 70 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <83000 71 opp-microvolt = <830000>;
59 clock-latency-ns = <30 72 clock-latency-ns = <300000>;
60 }; 73 };
61 opp-1000000000 { 74 opp-1000000000 {
62 opp-hz = /bits/ 64 <10 75 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <83000 76 opp-microvolt = <830000>;
64 clock-latency-ns = <30 77 clock-latency-ns = <300000>;
65 }; 78 };
66 opp-1500000000 { 79 opp-1500000000 {
67 opp-hz = /bits/ 64 <15 80 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <83000 81 opp-microvolt = <830000>;
69 clock-latency-ns = <30 82 clock-latency-ns = <300000>;
70 opp-suspend; 83 opp-suspend;
71 }; 84 };
72 opp-1600000000 { 85 opp-1600000000 {
73 opp-hz = /bits/ 64 <16 86 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <90000 87 opp-microvolt = <900000>;
75 clock-latency-ns = <30 88 clock-latency-ns = <300000>;
>> 89 turbo-mode;
76 }; 90 };
77 opp-1700000000 { 91 opp-1700000000 {
78 opp-hz = /bits/ 64 <17 92 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <90000 93 opp-microvolt = <900000>;
80 clock-latency-ns = <30 94 clock-latency-ns = <300000>;
>> 95 turbo-mode;
81 }; 96 };
82 opp-1800000000 { 97 opp-1800000000 {
83 opp-hz = /bits/ 64 <18 98 opp-hz = /bits/ 64 <1800000000>;
84 opp-microvolt = <96000 99 opp-microvolt = <960000>;
85 clock-latency-ns = <30 100 clock-latency-ns = <300000>;
86 turbo-mode; 101 turbo-mode;
87 }; 102 };
88 }; 103 };
89 104
90 cpus { 105 cpus {
91 #address-cells = <1>; 106 #address-cells = <1>;
92 #size-cells = <0>; 107 #size-cells = <0>;
93 108
94 a57_0: cpu@0 { 109 a57_0: cpu@0 {
95 compatible = "arm,cort 110 compatible = "arm,cortex-a57";
96 reg = <0x0>; 111 reg = <0x0>;
97 device_type = "cpu"; 112 device_type = "cpu";
98 power-domains = <&sysc 113 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
99 next-level-cache = <&L 114 next-level-cache = <&L2_CA57>;
100 enable-method = "psci" 115 enable-method = "psci";
101 cpu-idle-states = <&CP 116 cpu-idle-states = <&CPU_SLEEP_0>;
102 #cooling-cells = <2>; 117 #cooling-cells = <2>;
103 dynamic-power-coeffici 118 dynamic-power-coefficient = <854>;
104 clocks = <&cpg CPG_COR 119 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
105 operating-points-v2 = 120 operating-points-v2 = <&cluster0_opp>;
106 }; 121 };
107 122
108 a57_1: cpu@1 { 123 a57_1: cpu@1 {
109 compatible = "arm,cort 124 compatible = "arm,cortex-a57";
110 reg = <0x1>; 125 reg = <0x1>;
111 device_type = "cpu"; 126 device_type = "cpu";
112 power-domains = <&sysc 127 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
113 next-level-cache = <&L 128 next-level-cache = <&L2_CA57>;
114 enable-method = "psci" 129 enable-method = "psci";
115 cpu-idle-states = <&CP 130 cpu-idle-states = <&CPU_SLEEP_0>;
116 clocks = <&cpg CPG_COR 131 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
117 operating-points-v2 = 132 operating-points-v2 = <&cluster0_opp>;
118 }; 133 };
119 134
120 L2_CA57: cache-controller-0 { 135 L2_CA57: cache-controller-0 {
121 compatible = "cache"; 136 compatible = "cache";
122 power-domains = <&sysc 137 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
123 cache-unified; 138 cache-unified;
124 cache-level = <2>; 139 cache-level = <2>;
125 }; 140 };
126 141
127 idle-states { 142 idle-states {
128 entry-method = "psci"; 143 entry-method = "psci";
129 144
130 CPU_SLEEP_0: cpu-sleep 145 CPU_SLEEP_0: cpu-sleep-0 {
131 compatible = " 146 compatible = "arm,idle-state";
132 arm,psci-suspe 147 arm,psci-suspend-param = <0x0010000>;
133 local-timer-st 148 local-timer-stop;
134 entry-latency- 149 entry-latency-us = <400>;
135 exit-latency-u 150 exit-latency-us = <500>;
136 min-residency- 151 min-residency-us = <4000>;
137 }; 152 };
138 }; 153 };
139 }; 154 };
140 155
141 extal_clk: extal { 156 extal_clk: extal {
142 compatible = "fixed-clock"; 157 compatible = "fixed-clock";
143 #clock-cells = <0>; 158 #clock-cells = <0>;
144 /* This value must be overridd 159 /* This value must be overridden by the board */
145 clock-frequency = <0>; 160 clock-frequency = <0>;
146 }; 161 };
147 162
148 extalr_clk: extalr { 163 extalr_clk: extalr {
149 compatible = "fixed-clock"; 164 compatible = "fixed-clock";
150 #clock-cells = <0>; 165 #clock-cells = <0>;
151 /* This value must be overridd 166 /* This value must be overridden by the board */
152 clock-frequency = <0>; 167 clock-frequency = <0>;
153 }; 168 };
154 169
155 /* External PCIe clock - can be overri 170 /* External PCIe clock - can be overridden by the board */
156 pcie_bus_clk: pcie_bus { 171 pcie_bus_clk: pcie_bus {
157 compatible = "fixed-clock"; 172 compatible = "fixed-clock";
158 #clock-cells = <0>; 173 #clock-cells = <0>;
159 clock-frequency = <0>; 174 clock-frequency = <0>;
160 }; 175 };
161 176
162 pmu_a57 { 177 pmu_a57 {
163 compatible = "arm,cortex-a57-p 178 compatible = "arm,cortex-a57-pmu";
164 interrupts-extended = <&gic GI 179 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
165 <&gic GI 180 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166 interrupt-affinity = <&a57_0>, 181 interrupt-affinity = <&a57_0>,
167 <&a57_1>; 182 <&a57_1>;
168 }; 183 };
169 184
170 psci { 185 psci {
171 compatible = "arm,psci-1.0", " 186 compatible = "arm,psci-1.0", "arm,psci-0.2";
172 method = "smc"; 187 method = "smc";
173 }; 188 };
174 189
175 /* External SCIF clock - to be overrid 190 /* External SCIF clock - to be overridden by boards that provide it */
176 scif_clk: scif { 191 scif_clk: scif {
177 compatible = "fixed-clock"; 192 compatible = "fixed-clock";
178 #clock-cells = <0>; 193 #clock-cells = <0>;
179 clock-frequency = <0>; 194 clock-frequency = <0>;
180 }; 195 };
181 196
182 soc { 197 soc {
183 compatible = "simple-bus"; 198 compatible = "simple-bus";
184 interrupt-parent = <&gic>; 199 interrupt-parent = <&gic>;
185 #address-cells = <2>; 200 #address-cells = <2>;
186 #size-cells = <2>; 201 #size-cells = <2>;
187 ranges; 202 ranges;
188 203
189 rwdt: watchdog@e6020000 { 204 rwdt: watchdog@e6020000 {
190 compatible = "renesas, 205 compatible = "renesas,r8a77965-wdt",
191 "renesas, 206 "renesas,rcar-gen3-wdt";
192 reg = <0 0xe6020000 0 207 reg = <0 0xe6020000 0 0x0c>;
193 interrupts = <GIC_SPI <<
194 clocks = <&cpg CPG_MOD 208 clocks = <&cpg CPG_MOD 402>;
195 power-domains = <&sysc 209 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
196 resets = <&cpg 402>; 210 resets = <&cpg 402>;
197 status = "disabled"; 211 status = "disabled";
198 }; 212 };
199 213
200 gpio0: gpio@e6050000 { 214 gpio0: gpio@e6050000 {
201 compatible = "renesas, 215 compatible = "renesas,gpio-r8a77965",
202 "renesas, 216 "renesas,rcar-gen3-gpio";
203 reg = <0 0xe6050000 0 217 reg = <0 0xe6050000 0 0x50>;
204 interrupts = <GIC_SPI 218 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>; 219 #gpio-cells = <2>;
206 gpio-controller; 220 gpio-controller;
207 gpio-ranges = <&pfc 0 221 gpio-ranges = <&pfc 0 0 16>;
208 #interrupt-cells = <2> 222 #interrupt-cells = <2>;
209 interrupt-controller; 223 interrupt-controller;
210 clocks = <&cpg CPG_MOD 224 clocks = <&cpg CPG_MOD 912>;
211 power-domains = <&sysc 225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
212 resets = <&cpg 912>; 226 resets = <&cpg 912>;
213 }; 227 };
214 228
215 gpio1: gpio@e6051000 { 229 gpio1: gpio@e6051000 {
216 compatible = "renesas, 230 compatible = "renesas,gpio-r8a77965",
217 "renesas, 231 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6051000 0 232 reg = <0 0xe6051000 0 0x50>;
219 interrupts = <GIC_SPI 233 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>; 234 #gpio-cells = <2>;
221 gpio-controller; 235 gpio-controller;
222 gpio-ranges = <&pfc 0 236 gpio-ranges = <&pfc 0 32 29>;
223 #interrupt-cells = <2> 237 #interrupt-cells = <2>;
224 interrupt-controller; 238 interrupt-controller;
225 clocks = <&cpg CPG_MOD 239 clocks = <&cpg CPG_MOD 911>;
226 power-domains = <&sysc 240 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
227 resets = <&cpg 911>; 241 resets = <&cpg 911>;
228 }; 242 };
229 243
230 gpio2: gpio@e6052000 { 244 gpio2: gpio@e6052000 {
231 compatible = "renesas, 245 compatible = "renesas,gpio-r8a77965",
232 "renesas, 246 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6052000 0 247 reg = <0 0xe6052000 0 0x50>;
234 interrupts = <GIC_SPI 248 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>; 249 #gpio-cells = <2>;
236 gpio-controller; 250 gpio-controller;
237 gpio-ranges = <&pfc 0 251 gpio-ranges = <&pfc 0 64 15>;
238 #interrupt-cells = <2> 252 #interrupt-cells = <2>;
239 interrupt-controller; 253 interrupt-controller;
240 clocks = <&cpg CPG_MOD 254 clocks = <&cpg CPG_MOD 910>;
241 power-domains = <&sysc 255 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
242 resets = <&cpg 910>; 256 resets = <&cpg 910>;
243 }; 257 };
244 258
245 gpio3: gpio@e6053000 { 259 gpio3: gpio@e6053000 {
246 compatible = "renesas, 260 compatible = "renesas,gpio-r8a77965",
247 "renesas, 261 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6053000 0 262 reg = <0 0xe6053000 0 0x50>;
249 interrupts = <GIC_SPI 263 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>; 264 #gpio-cells = <2>;
251 gpio-controller; 265 gpio-controller;
252 gpio-ranges = <&pfc 0 266 gpio-ranges = <&pfc 0 96 16>;
253 #interrupt-cells = <2> 267 #interrupt-cells = <2>;
254 interrupt-controller; 268 interrupt-controller;
255 clocks = <&cpg CPG_MOD 269 clocks = <&cpg CPG_MOD 909>;
256 power-domains = <&sysc 270 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
257 resets = <&cpg 909>; 271 resets = <&cpg 909>;
258 }; 272 };
259 273
260 gpio4: gpio@e6054000 { 274 gpio4: gpio@e6054000 {
261 compatible = "renesas, 275 compatible = "renesas,gpio-r8a77965",
262 "renesas, 276 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6054000 0 277 reg = <0 0xe6054000 0 0x50>;
264 interrupts = <GIC_SPI 278 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>; 279 #gpio-cells = <2>;
266 gpio-controller; 280 gpio-controller;
267 gpio-ranges = <&pfc 0 281 gpio-ranges = <&pfc 0 128 18>;
268 #interrupt-cells = <2> 282 #interrupt-cells = <2>;
269 interrupt-controller; 283 interrupt-controller;
270 clocks = <&cpg CPG_MOD 284 clocks = <&cpg CPG_MOD 908>;
271 power-domains = <&sysc 285 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
272 resets = <&cpg 908>; 286 resets = <&cpg 908>;
273 }; 287 };
274 288
275 gpio5: gpio@e6055000 { 289 gpio5: gpio@e6055000 {
276 compatible = "renesas, 290 compatible = "renesas,gpio-r8a77965",
277 "renesas, 291 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6055000 0 292 reg = <0 0xe6055000 0 0x50>;
279 interrupts = <GIC_SPI 293 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>; 294 #gpio-cells = <2>;
281 gpio-controller; 295 gpio-controller;
282 gpio-ranges = <&pfc 0 296 gpio-ranges = <&pfc 0 160 26>;
283 #interrupt-cells = <2> 297 #interrupt-cells = <2>;
284 interrupt-controller; 298 interrupt-controller;
285 clocks = <&cpg CPG_MOD 299 clocks = <&cpg CPG_MOD 907>;
286 power-domains = <&sysc 300 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
287 resets = <&cpg 907>; 301 resets = <&cpg 907>;
288 }; 302 };
289 303
290 gpio6: gpio@e6055400 { 304 gpio6: gpio@e6055400 {
291 compatible = "renesas, 305 compatible = "renesas,gpio-r8a77965",
292 "renesas, 306 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055400 0 307 reg = <0 0xe6055400 0 0x50>;
294 interrupts = <GIC_SPI 308 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>; 309 #gpio-cells = <2>;
296 gpio-controller; 310 gpio-controller;
297 gpio-ranges = <&pfc 0 311 gpio-ranges = <&pfc 0 192 32>;
298 #interrupt-cells = <2> 312 #interrupt-cells = <2>;
299 interrupt-controller; 313 interrupt-controller;
300 clocks = <&cpg CPG_MOD 314 clocks = <&cpg CPG_MOD 906>;
301 power-domains = <&sysc 315 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
302 resets = <&cpg 906>; 316 resets = <&cpg 906>;
303 }; 317 };
304 318
305 gpio7: gpio@e6055800 { 319 gpio7: gpio@e6055800 {
306 compatible = "renesas, 320 compatible = "renesas,gpio-r8a77965",
307 "renesas, 321 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055800 0 322 reg = <0 0xe6055800 0 0x50>;
309 interrupts = <GIC_SPI 323 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>; 324 #gpio-cells = <2>;
311 gpio-controller; 325 gpio-controller;
312 gpio-ranges = <&pfc 0 326 gpio-ranges = <&pfc 0 224 4>;
313 #interrupt-cells = <2> 327 #interrupt-cells = <2>;
314 interrupt-controller; 328 interrupt-controller;
315 clocks = <&cpg CPG_MOD 329 clocks = <&cpg CPG_MOD 905>;
316 power-domains = <&sysc 330 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
317 resets = <&cpg 905>; 331 resets = <&cpg 905>;
318 }; 332 };
319 333
320 pfc: pinctrl@e6060000 { 334 pfc: pinctrl@e6060000 {
321 compatible = "renesas, 335 compatible = "renesas,pfc-r8a77965";
322 reg = <0 0xe6060000 0 336 reg = <0 0xe6060000 0 0x50c>;
323 }; 337 };
324 338
325 cmt0: timer@e60f0000 { 339 cmt0: timer@e60f0000 {
326 compatible = "renesas, 340 compatible = "renesas,r8a77965-cmt0",
327 "renesas, 341 "renesas,rcar-gen3-cmt0";
328 reg = <0 0xe60f0000 0 342 reg = <0 0xe60f0000 0 0x1004>;
329 interrupts = <GIC_SPI 343 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 344 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&cpg CPG_MOD 345 clocks = <&cpg CPG_MOD 303>;
332 clock-names = "fck"; 346 clock-names = "fck";
333 power-domains = <&sysc 347 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
334 resets = <&cpg 303>; 348 resets = <&cpg 303>;
335 status = "disabled"; 349 status = "disabled";
336 }; 350 };
337 351
338 cmt1: timer@e6130000 { 352 cmt1: timer@e6130000 {
339 compatible = "renesas, 353 compatible = "renesas,r8a77965-cmt1",
340 "renesas, 354 "renesas,rcar-gen3-cmt1";
341 reg = <0 0xe6130000 0 355 reg = <0 0xe6130000 0 0x1004>;
342 interrupts = <GIC_SPI 356 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 357 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 358 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 359 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 360 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 361 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 362 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 363 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&cpg CPG_MOD 364 clocks = <&cpg CPG_MOD 302>;
351 clock-names = "fck"; 365 clock-names = "fck";
352 power-domains = <&sysc 366 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
353 resets = <&cpg 302>; 367 resets = <&cpg 302>;
354 status = "disabled"; 368 status = "disabled";
355 }; 369 };
356 370
357 cmt2: timer@e6140000 { 371 cmt2: timer@e6140000 {
358 compatible = "renesas, 372 compatible = "renesas,r8a77965-cmt1",
359 "renesas, 373 "renesas,rcar-gen3-cmt1";
360 reg = <0 0xe6140000 0 374 reg = <0 0xe6140000 0 0x1004>;
361 interrupts = <GIC_SPI 375 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 376 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 377 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 378 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 379 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 380 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 381 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 382 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 383 clocks = <&cpg CPG_MOD 301>;
370 clock-names = "fck"; 384 clock-names = "fck";
371 power-domains = <&sysc 385 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
372 resets = <&cpg 301>; 386 resets = <&cpg 301>;
373 status = "disabled"; 387 status = "disabled";
374 }; 388 };
375 389
376 cmt3: timer@e6148000 { 390 cmt3: timer@e6148000 {
377 compatible = "renesas, 391 compatible = "renesas,r8a77965-cmt1",
378 "renesas, 392 "renesas,rcar-gen3-cmt1";
379 reg = <0 0xe6148000 0 393 reg = <0 0xe6148000 0 0x1004>;
380 interrupts = <GIC_SPI 394 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 395 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 396 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 397 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 398 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 399 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 400 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 401 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 402 clocks = <&cpg CPG_MOD 300>;
389 clock-names = "fck"; 403 clock-names = "fck";
390 power-domains = <&sysc 404 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
391 resets = <&cpg 300>; 405 resets = <&cpg 300>;
392 status = "disabled"; 406 status = "disabled";
393 }; 407 };
394 408
395 cpg: clock-controller@e6150000 409 cpg: clock-controller@e6150000 {
396 compatible = "renesas, 410 compatible = "renesas,r8a77965-cpg-mssr";
397 reg = <0 0xe6150000 0 411 reg = <0 0xe6150000 0 0x1000>;
398 clocks = <&extal_clk>, 412 clocks = <&extal_clk>, <&extalr_clk>;
399 clock-names = "extal", 413 clock-names = "extal", "extalr";
400 #clock-cells = <2>; 414 #clock-cells = <2>;
401 #power-domain-cells = 415 #power-domain-cells = <0>;
402 #reset-cells = <1>; 416 #reset-cells = <1>;
403 }; 417 };
404 418
405 rst: reset-controller@e6160000 419 rst: reset-controller@e6160000 {
406 compatible = "renesas, 420 compatible = "renesas,r8a77965-rst";
407 reg = <0 0xe6160000 0 421 reg = <0 0xe6160000 0 0x0200>;
408 }; 422 };
409 423
410 sysc: system-controller@e61800 424 sysc: system-controller@e6180000 {
411 compatible = "renesas, 425 compatible = "renesas,r8a77965-sysc";
412 reg = <0 0xe6180000 0 426 reg = <0 0xe6180000 0 0x0400>;
413 #power-domain-cells = 427 #power-domain-cells = <1>;
414 }; 428 };
415 429
416 tsc: thermal@e6198000 { 430 tsc: thermal@e6198000 {
417 compatible = "renesas, 431 compatible = "renesas,r8a77965-thermal";
418 reg = <0 0xe6198000 0 432 reg = <0 0xe6198000 0 0x100>,
419 <0 0xe61a0000 0 433 <0 0xe61a0000 0 0x100>,
420 <0 0xe61a8000 0 434 <0 0xe61a8000 0 0x100>;
421 interrupts = <GIC_SPI 435 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 436 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 437 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 438 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc 439 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
426 resets = <&cpg 522>; 440 resets = <&cpg 522>;
427 #thermal-sensor-cells 441 #thermal-sensor-cells = <1>;
428 }; 442 };
429 443
430 intc_ex: interrupt-controller@ 444 intc_ex: interrupt-controller@e61c0000 {
431 compatible = "renesas, 445 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
432 #interrupt-cells = <2> 446 #interrupt-cells = <2>;
433 interrupt-controller; 447 interrupt-controller;
434 reg = <0 0xe61c0000 0 448 reg = <0 0xe61c0000 0 0x200>;
435 interrupts = <GIC_SPI 449 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
436 <GIC_SPI 450 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
437 <GIC_SPI 451 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
438 <GIC_SPI 452 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
439 <GIC_SPI 453 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 454 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 455 clocks = <&cpg CPG_MOD 407>;
442 power-domains = <&sysc 456 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
443 resets = <&cpg 407>; 457 resets = <&cpg 407>;
444 }; 458 };
445 459
446 tmu0: timer@e61e0000 { 460 tmu0: timer@e61e0000 {
447 compatible = "renesas, 461 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
448 reg = <0 0xe61e0000 0 462 reg = <0 0xe61e0000 0 0x30>;
449 interrupts = <GIC_SPI 463 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
450 <GIC_SPI 464 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 465 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
452 interrupt-names = "tun <<
453 clocks = <&cpg CPG_MOD 466 clocks = <&cpg CPG_MOD 125>;
454 clock-names = "fck"; 467 clock-names = "fck";
455 power-domains = <&sysc 468 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
456 resets = <&cpg 125>; 469 resets = <&cpg 125>;
457 status = "disabled"; 470 status = "disabled";
458 }; 471 };
459 472
460 tmu1: timer@e6fc0000 { 473 tmu1: timer@e6fc0000 {
461 compatible = "renesas, 474 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
462 reg = <0 0xe6fc0000 0 475 reg = <0 0xe6fc0000 0 0x30>;
463 interrupts = <GIC_SPI 476 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
464 <GIC_SPI 477 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
465 <GIC_SPI !! 478 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
466 <GIC_SPI <<
467 interrupt-names = "tun <<
468 clocks = <&cpg CPG_MOD 479 clocks = <&cpg CPG_MOD 124>;
469 clock-names = "fck"; 480 clock-names = "fck";
470 power-domains = <&sysc 481 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
471 resets = <&cpg 124>; 482 resets = <&cpg 124>;
472 status = "disabled"; 483 status = "disabled";
473 }; 484 };
474 485
475 tmu2: timer@e6fd0000 { 486 tmu2: timer@e6fd0000 {
476 compatible = "renesas, 487 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
477 reg = <0 0xe6fd0000 0 488 reg = <0 0xe6fd0000 0 0x30>;
478 interrupts = <GIC_SPI 489 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 490 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI !! 491 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
481 <GIC_SPI <<
482 interrupt-names = "tun <<
483 clocks = <&cpg CPG_MOD 492 clocks = <&cpg CPG_MOD 123>;
484 clock-names = "fck"; 493 clock-names = "fck";
485 power-domains = <&sysc 494 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
486 resets = <&cpg 123>; 495 resets = <&cpg 123>;
487 status = "disabled"; 496 status = "disabled";
488 }; 497 };
489 498
490 tmu3: timer@e6fe0000 { 499 tmu3: timer@e6fe0000 {
491 compatible = "renesas, 500 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
492 reg = <0 0xe6fe0000 0 501 reg = <0 0xe6fe0000 0 0x30>;
493 interrupts = <GIC_SPI 502 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
494 <GIC_SPI 503 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
495 <GIC_SPI 504 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
496 interrupt-names = "tun <<
497 clocks = <&cpg CPG_MOD 505 clocks = <&cpg CPG_MOD 122>;
498 clock-names = "fck"; 506 clock-names = "fck";
499 power-domains = <&sysc 507 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
500 resets = <&cpg 122>; 508 resets = <&cpg 122>;
501 status = "disabled"; 509 status = "disabled";
502 }; 510 };
503 511
504 tmu4: timer@ffc00000 { 512 tmu4: timer@ffc00000 {
505 compatible = "renesas, 513 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
506 reg = <0 0xffc00000 0 514 reg = <0 0xffc00000 0 0x30>;
507 interrupts = <GIC_SPI 515 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 516 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 517 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
510 interrupt-names = "tun <<
511 clocks = <&cpg CPG_MOD 518 clocks = <&cpg CPG_MOD 121>;
512 clock-names = "fck"; 519 clock-names = "fck";
513 power-domains = <&sysc 520 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
514 resets = <&cpg 121>; 521 resets = <&cpg 121>;
515 status = "disabled"; 522 status = "disabled";
516 }; 523 };
517 524
518 i2c0: i2c@e6500000 { 525 i2c0: i2c@e6500000 {
519 #address-cells = <1>; 526 #address-cells = <1>;
520 #size-cells = <0>; 527 #size-cells = <0>;
521 compatible = "renesas, 528 compatible = "renesas,i2c-r8a77965",
522 "renesas, 529 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6500000 0 530 reg = <0 0xe6500000 0 0x40>;
524 interrupts = <GIC_SPI 531 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 532 clocks = <&cpg CPG_MOD 931>;
526 power-domains = <&sysc 533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
527 resets = <&cpg 931>; 534 resets = <&cpg 931>;
528 dmas = <&dmac1 0x91>, 535 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
529 <&dmac2 0x91>, 536 <&dmac2 0x91>, <&dmac2 0x90>;
530 dma-names = "tx", "rx" 537 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 538 i2c-scl-internal-delay-ns = <110>;
532 status = "disabled"; 539 status = "disabled";
533 }; 540 };
534 541
535 i2c1: i2c@e6508000 { 542 i2c1: i2c@e6508000 {
536 #address-cells = <1>; 543 #address-cells = <1>;
537 #size-cells = <0>; 544 #size-cells = <0>;
538 compatible = "renesas, 545 compatible = "renesas,i2c-r8a77965",
539 "renesas, 546 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe6508000 0 547 reg = <0 0xe6508000 0 0x40>;
541 interrupts = <GIC_SPI 548 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 549 clocks = <&cpg CPG_MOD 930>;
543 power-domains = <&sysc 550 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
544 resets = <&cpg 930>; 551 resets = <&cpg 930>;
545 dmas = <&dmac1 0x93>, 552 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
546 <&dmac2 0x93>, 553 <&dmac2 0x93>, <&dmac2 0x92>;
547 dma-names = "tx", "rx" 554 dma-names = "tx", "rx", "tx", "rx";
548 i2c-scl-internal-delay 555 i2c-scl-internal-delay-ns = <6>;
549 status = "disabled"; 556 status = "disabled";
550 }; 557 };
551 558
552 i2c2: i2c@e6510000 { 559 i2c2: i2c@e6510000 {
553 #address-cells = <1>; 560 #address-cells = <1>;
554 #size-cells = <0>; 561 #size-cells = <0>;
555 compatible = "renesas, 562 compatible = "renesas,i2c-r8a77965",
556 "renesas, 563 "renesas,rcar-gen3-i2c";
557 reg = <0 0xe6510000 0 564 reg = <0 0xe6510000 0 0x40>;
558 interrupts = <GIC_SPI 565 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 566 clocks = <&cpg CPG_MOD 929>;
560 power-domains = <&sysc 567 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
561 resets = <&cpg 929>; 568 resets = <&cpg 929>;
562 dmas = <&dmac1 0x95>, 569 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
563 <&dmac2 0x95>, 570 <&dmac2 0x95>, <&dmac2 0x94>;
564 dma-names = "tx", "rx" 571 dma-names = "tx", "rx", "tx", "rx";
565 i2c-scl-internal-delay 572 i2c-scl-internal-delay-ns = <6>;
566 status = "disabled"; 573 status = "disabled";
567 }; 574 };
568 575
569 i2c3: i2c@e66d0000 { 576 i2c3: i2c@e66d0000 {
570 #address-cells = <1>; 577 #address-cells = <1>;
571 #size-cells = <0>; 578 #size-cells = <0>;
572 compatible = "renesas, 579 compatible = "renesas,i2c-r8a77965",
573 "renesas, 580 "renesas,rcar-gen3-i2c";
574 reg = <0 0xe66d0000 0 581 reg = <0 0xe66d0000 0 0x40>;
575 interrupts = <GIC_SPI 582 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 583 clocks = <&cpg CPG_MOD 928>;
577 power-domains = <&sysc 584 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
578 resets = <&cpg 928>; 585 resets = <&cpg 928>;
579 dmas = <&dmac0 0x97>, 586 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
580 dma-names = "tx", "rx" 587 dma-names = "tx", "rx";
581 i2c-scl-internal-delay 588 i2c-scl-internal-delay-ns = <110>;
582 status = "disabled"; 589 status = "disabled";
583 }; 590 };
584 591
585 i2c4: i2c@e66d8000 { 592 i2c4: i2c@e66d8000 {
586 #address-cells = <1>; 593 #address-cells = <1>;
587 #size-cells = <0>; 594 #size-cells = <0>;
588 compatible = "renesas, 595 compatible = "renesas,i2c-r8a77965",
589 "renesas, 596 "renesas,rcar-gen3-i2c";
590 reg = <0 0xe66d8000 0 597 reg = <0 0xe66d8000 0 0x40>;
591 interrupts = <GIC_SPI 598 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&cpg CPG_MOD 599 clocks = <&cpg CPG_MOD 927>;
593 power-domains = <&sysc 600 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
594 resets = <&cpg 927>; 601 resets = <&cpg 927>;
595 dmas = <&dmac0 0x99>, 602 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
596 dma-names = "tx", "rx" 603 dma-names = "tx", "rx";
597 i2c-scl-internal-delay 604 i2c-scl-internal-delay-ns = <110>;
598 status = "disabled"; 605 status = "disabled";
599 }; 606 };
600 607
601 i2c5: i2c@e66e0000 { 608 i2c5: i2c@e66e0000 {
602 #address-cells = <1>; 609 #address-cells = <1>;
603 #size-cells = <0>; 610 #size-cells = <0>;
604 compatible = "renesas, 611 compatible = "renesas,i2c-r8a77965",
605 "renesas, 612 "renesas,rcar-gen3-i2c";
606 reg = <0 0xe66e0000 0 613 reg = <0 0xe66e0000 0 0x40>;
607 interrupts = <GIC_SPI 614 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&cpg CPG_MOD 615 clocks = <&cpg CPG_MOD 919>;
609 power-domains = <&sysc 616 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
610 resets = <&cpg 919>; 617 resets = <&cpg 919>;
611 dmas = <&dmac0 0x9b>, 618 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
612 dma-names = "tx", "rx" 619 dma-names = "tx", "rx";
613 i2c-scl-internal-delay 620 i2c-scl-internal-delay-ns = <110>;
614 status = "disabled"; 621 status = "disabled";
615 }; 622 };
616 623
617 i2c6: i2c@e66e8000 { 624 i2c6: i2c@e66e8000 {
618 #address-cells = <1>; 625 #address-cells = <1>;
619 #size-cells = <0>; 626 #size-cells = <0>;
620 compatible = "renesas, 627 compatible = "renesas,i2c-r8a77965",
621 "renesas, 628 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66e8000 0 629 reg = <0 0xe66e8000 0 0x40>;
623 interrupts = <GIC_SPI 630 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&cpg CPG_MOD 631 clocks = <&cpg CPG_MOD 918>;
625 power-domains = <&sysc 632 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
626 resets = <&cpg 918>; 633 resets = <&cpg 918>;
627 dmas = <&dmac0 0x9d>, 634 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
628 dma-names = "tx", "rx" 635 dma-names = "tx", "rx";
629 i2c-scl-internal-delay 636 i2c-scl-internal-delay-ns = <6>;
630 status = "disabled"; 637 status = "disabled";
631 }; 638 };
632 639
633 i2c_dvfs: i2c@e60b0000 { 640 i2c_dvfs: i2c@e60b0000 {
634 #address-cells = <1>; 641 #address-cells = <1>;
635 #size-cells = <0>; 642 #size-cells = <0>;
636 compatible = "renesas, 643 compatible = "renesas,iic-r8a77965",
637 "renesas, 644 "renesas,rcar-gen3-iic",
638 "renesas, 645 "renesas,rmobile-iic";
639 reg = <0 0xe60b0000 0 646 reg = <0 0xe60b0000 0 0x425>;
640 interrupts = <GIC_SPI 647 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&cpg CPG_MOD 648 clocks = <&cpg CPG_MOD 926>;
642 power-domains = <&sysc 649 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
643 resets = <&cpg 926>; 650 resets = <&cpg 926>;
644 dmas = <&dmac0 0x11>, 651 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
645 dma-names = "tx", "rx" 652 dma-names = "tx", "rx";
646 status = "disabled"; 653 status = "disabled";
647 }; 654 };
648 655
649 hscif0: serial@e6540000 { 656 hscif0: serial@e6540000 {
650 compatible = "renesas, 657 compatible = "renesas,hscif-r8a77965",
651 "renesas, 658 "renesas,rcar-gen3-hscif",
652 "renesas, 659 "renesas,hscif";
653 reg = <0 0xe6540000 0 660 reg = <0 0xe6540000 0 0x60>;
654 interrupts = <GIC_SPI 661 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 662 clocks = <&cpg CPG_MOD 520>,
656 <&cpg CPG_COR 663 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
657 <&scif_clk>; 664 <&scif_clk>;
658 clock-names = "fck", " 665 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x31>, 666 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
660 <&dmac2 0x31>, 667 <&dmac2 0x31>, <&dmac2 0x30>;
661 dma-names = "tx", "rx" 668 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 669 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
663 resets = <&cpg 520>; 670 resets = <&cpg 520>;
664 status = "disabled"; 671 status = "disabled";
665 }; 672 };
666 673
667 hscif1: serial@e6550000 { 674 hscif1: serial@e6550000 {
668 compatible = "renesas, 675 compatible = "renesas,hscif-r8a77965",
669 "renesas, 676 "renesas,rcar-gen3-hscif",
670 "renesas, 677 "renesas,hscif";
671 reg = <0 0xe6550000 0 678 reg = <0 0xe6550000 0 0x60>;
672 interrupts = <GIC_SPI 679 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 680 clocks = <&cpg CPG_MOD 519>,
674 <&cpg CPG_COR 681 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
675 <&scif_clk>; 682 <&scif_clk>;
676 clock-names = "fck", " 683 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac1 0x33>, 684 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
678 <&dmac2 0x33>, 685 <&dmac2 0x33>, <&dmac2 0x32>;
679 dma-names = "tx", "rx" 686 dma-names = "tx", "rx", "tx", "rx";
680 power-domains = <&sysc 687 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
681 resets = <&cpg 519>; 688 resets = <&cpg 519>;
682 status = "disabled"; 689 status = "disabled";
683 }; 690 };
684 691
685 hscif2: serial@e6560000 { 692 hscif2: serial@e6560000 {
686 compatible = "renesas, 693 compatible = "renesas,hscif-r8a77965",
687 "renesas, 694 "renesas,rcar-gen3-hscif",
688 "renesas, 695 "renesas,hscif";
689 reg = <0 0xe6560000 0 696 reg = <0 0xe6560000 0 0x60>;
690 interrupts = <GIC_SPI 697 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&cpg CPG_MOD 698 clocks = <&cpg CPG_MOD 518>,
692 <&cpg CPG_COR 699 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
693 <&scif_clk>; 700 <&scif_clk>;
694 clock-names = "fck", " 701 clock-names = "fck", "brg_int", "scif_clk";
695 dmas = <&dmac1 0x35>, 702 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
696 <&dmac2 0x35>, 703 <&dmac2 0x35>, <&dmac2 0x34>;
697 dma-names = "tx", "rx" 704 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc 705 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
699 resets = <&cpg 518>; 706 resets = <&cpg 518>;
700 status = "disabled"; 707 status = "disabled";
701 }; 708 };
702 709
703 hscif3: serial@e66a0000 { 710 hscif3: serial@e66a0000 {
704 compatible = "renesas, 711 compatible = "renesas,hscif-r8a77965",
705 "renesas, 712 "renesas,rcar-gen3-hscif",
706 "renesas, 713 "renesas,hscif";
707 reg = <0 0xe66a0000 0 714 reg = <0 0xe66a0000 0 0x60>;
708 interrupts = <GIC_SPI 715 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 716 clocks = <&cpg CPG_MOD 517>,
710 <&cpg CPG_COR 717 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
711 <&scif_clk>; 718 <&scif_clk>;
712 clock-names = "fck", " 719 clock-names = "fck", "brg_int", "scif_clk";
713 dmas = <&dmac0 0x37>, 720 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
714 dma-names = "tx", "rx" 721 dma-names = "tx", "rx";
715 power-domains = <&sysc 722 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
716 resets = <&cpg 517>; 723 resets = <&cpg 517>;
717 status = "disabled"; 724 status = "disabled";
718 }; 725 };
719 726
720 hscif4: serial@e66b0000 { 727 hscif4: serial@e66b0000 {
721 compatible = "renesas, 728 compatible = "renesas,hscif-r8a77965",
722 "renesas, 729 "renesas,rcar-gen3-hscif",
723 "renesas, 730 "renesas,hscif";
724 reg = <0 0xe66b0000 0 731 reg = <0 0xe66b0000 0 0x60>;
725 interrupts = <GIC_SPI 732 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 733 clocks = <&cpg CPG_MOD 516>,
727 <&cpg CPG_COR 734 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
728 <&scif_clk>; 735 <&scif_clk>;
729 clock-names = "fck", " 736 clock-names = "fck", "brg_int", "scif_clk";
730 dmas = <&dmac0 0x39>, 737 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
731 dma-names = "tx", "rx" 738 dma-names = "tx", "rx";
732 power-domains = <&sysc 739 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
733 resets = <&cpg 516>; 740 resets = <&cpg 516>;
734 status = "disabled"; 741 status = "disabled";
735 }; 742 };
736 743
737 hsusb: usb@e6590000 { 744 hsusb: usb@e6590000 {
738 compatible = "renesas, 745 compatible = "renesas,usbhs-r8a77965",
739 "renesas, 746 "renesas,rcar-gen3-usbhs";
740 reg = <0 0xe6590000 0 747 reg = <0 0xe6590000 0 0x200>;
741 interrupts = <GIC_SPI 748 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 749 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
743 dmas = <&usb_dmac0 0>, 750 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
744 <&usb_dmac1 0>, 751 <&usb_dmac1 0>, <&usb_dmac1 1>;
745 dma-names = "ch0", "ch 752 dma-names = "ch0", "ch1", "ch2", "ch3";
746 renesas,buswait = <11> 753 renesas,buswait = <11>;
747 phys = <&usb2_phy0 3>; 754 phys = <&usb2_phy0 3>;
748 phy-names = "usb"; 755 phy-names = "usb";
749 power-domains = <&sysc 756 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
750 resets = <&cpg 704>, < 757 resets = <&cpg 704>, <&cpg 703>;
751 status = "disabled"; 758 status = "disabled";
752 }; 759 };
753 760
754 usb_dmac0: dma-controller@e65a 761 usb_dmac0: dma-controller@e65a0000 {
755 compatible = "renesas, 762 compatible = "renesas,r8a77965-usb-dmac",
756 "renesas, 763 "renesas,usb-dmac";
757 reg = <0 0xe65a0000 0 764 reg = <0 0xe65a0000 0 0x100>;
758 interrupts = <GIC_SPI 765 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 766 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
760 interrupt-names = "ch0 767 interrupt-names = "ch0", "ch1";
761 clocks = <&cpg CPG_MOD 768 clocks = <&cpg CPG_MOD 330>;
762 power-domains = <&sysc 769 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
763 resets = <&cpg 330>; 770 resets = <&cpg 330>;
764 #dma-cells = <1>; 771 #dma-cells = <1>;
765 dma-channels = <2>; 772 dma-channels = <2>;
766 }; 773 };
767 774
768 usb_dmac1: dma-controller@e65b 775 usb_dmac1: dma-controller@e65b0000 {
769 compatible = "renesas, 776 compatible = "renesas,r8a77965-usb-dmac",
770 "renesas, 777 "renesas,usb-dmac";
771 reg = <0 0xe65b0000 0 778 reg = <0 0xe65b0000 0 0x100>;
772 interrupts = <GIC_SPI 779 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 780 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
774 interrupt-names = "ch0 781 interrupt-names = "ch0", "ch1";
775 clocks = <&cpg CPG_MOD 782 clocks = <&cpg CPG_MOD 331>;
776 power-domains = <&sysc 783 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
777 resets = <&cpg 331>; 784 resets = <&cpg 331>;
778 #dma-cells = <1>; 785 #dma-cells = <1>;
779 dma-channels = <2>; 786 dma-channels = <2>;
780 }; 787 };
781 788
782 usb3_phy0: usb-phy@e65ee000 { 789 usb3_phy0: usb-phy@e65ee000 {
783 compatible = "renesas, 790 compatible = "renesas,r8a77965-usb3-phy",
784 "renesas, 791 "renesas,rcar-gen3-usb3-phy";
785 reg = <0 0xe65ee000 0 792 reg = <0 0xe65ee000 0 0x90>;
786 clocks = <&cpg CPG_MOD 793 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
787 <&usb_extal_c 794 <&usb_extal_clk>;
788 clock-names = "usb3-if 795 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
789 power-domains = <&sysc 796 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
790 resets = <&cpg 328>; 797 resets = <&cpg 328>;
791 #phy-cells = <0>; 798 #phy-cells = <0>;
792 status = "disabled"; 799 status = "disabled";
793 }; 800 };
794 801
795 arm_cc630p: crypto@e6601000 { 802 arm_cc630p: crypto@e6601000 {
796 compatible = "arm,cryp 803 compatible = "arm,cryptocell-630p-ree";
797 interrupts = <GIC_SPI 804 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
798 reg = <0x0 0xe6601000 805 reg = <0x0 0xe6601000 0 0x1000>;
799 clocks = <&cpg CPG_MOD 806 clocks = <&cpg CPG_MOD 229>;
800 resets = <&cpg 229>; 807 resets = <&cpg 229>;
801 power-domains = <&sysc 808 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
802 }; 809 };
803 810
804 dmac0: dma-controller@e6700000 811 dmac0: dma-controller@e6700000 {
805 compatible = "renesas, 812 compatible = "renesas,dmac-r8a77965",
806 "renesas, 813 "renesas,rcar-dmac";
807 reg = <0 0xe6700000 0 814 reg = <0 0xe6700000 0 0x10000>;
808 interrupts = <GIC_SPI 815 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 816 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 817 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 818 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 819 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 820 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 821 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 822 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 823 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 824 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
818 <GIC_SPI 825 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_SPI 826 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_SPI 827 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_SPI 828 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 829 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 830 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 831 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "err 832 interrupt-names = "error",
826 "ch0", 833 "ch0", "ch1", "ch2", "ch3",
827 "ch4", 834 "ch4", "ch5", "ch6", "ch7",
828 "ch8", 835 "ch8", "ch9", "ch10", "ch11",
829 "ch12" 836 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 837 clocks = <&cpg CPG_MOD 219>;
831 clock-names = "fck"; 838 clock-names = "fck";
832 power-domains = <&sysc 839 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
833 resets = <&cpg 219>; 840 resets = <&cpg 219>;
834 #dma-cells = <1>; 841 #dma-cells = <1>;
835 dma-channels = <16>; 842 dma-channels = <16>;
836 iommus = <&ipmmu_ds0 0 843 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
837 <&ipmmu_ds0 2>, 844 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
838 <&ipmmu_ds0 4>, 845 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
839 <&ipmmu_ds0 6>, 846 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
840 <&ipmmu_ds0 8>, 847 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
841 <&ipmmu_ds0 10> 848 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
842 <&ipmmu_ds0 12> 849 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
843 <&ipmmu_ds0 14> 850 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
844 }; 851 };
845 852
846 dmac1: dma-controller@e7300000 853 dmac1: dma-controller@e7300000 {
847 compatible = "renesas, 854 compatible = "renesas,dmac-r8a77965",
848 "renesas, 855 "renesas,rcar-dmac";
849 reg = <0 0xe7300000 0 856 reg = <0 0xe7300000 0 0x10000>;
850 interrupts = <GIC_SPI 857 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 858 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 859 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 860 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 861 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 862 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 863 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 864 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 865 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 866 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 867 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 868 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
862 <GIC_SPI 869 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 870 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 871 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 872 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 873 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
867 interrupt-names = "err 874 interrupt-names = "error",
868 "ch0", 875 "ch0", "ch1", "ch2", "ch3",
869 "ch4", 876 "ch4", "ch5", "ch6", "ch7",
870 "ch8", 877 "ch8", "ch9", "ch10", "ch11",
871 "ch12" 878 "ch12", "ch13", "ch14", "ch15";
872 clocks = <&cpg CPG_MOD 879 clocks = <&cpg CPG_MOD 218>;
873 clock-names = "fck"; 880 clock-names = "fck";
874 power-domains = <&sysc 881 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 resets = <&cpg 218>; 882 resets = <&cpg 218>;
876 #dma-cells = <1>; 883 #dma-cells = <1>;
877 dma-channels = <16>; 884 dma-channels = <16>;
878 iommus = <&ipmmu_ds1 0 885 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
879 <&ipmmu_ds1 2>, 886 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
880 <&ipmmu_ds1 4>, 887 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
881 <&ipmmu_ds1 6>, 888 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
882 <&ipmmu_ds1 8>, 889 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
883 <&ipmmu_ds1 10> 890 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
884 <&ipmmu_ds1 12> 891 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
885 <&ipmmu_ds1 14> 892 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
886 }; 893 };
887 894
888 dmac2: dma-controller@e7310000 895 dmac2: dma-controller@e7310000 {
889 compatible = "renesas, 896 compatible = "renesas,dmac-r8a77965",
890 "renesas, 897 "renesas,rcar-dmac";
891 reg = <0 0xe7310000 0 898 reg = <0 0xe7310000 0 0x10000>;
892 interrupts = <GIC_SPI 899 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
893 <GIC_SPI 900 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
894 <GIC_SPI 901 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
895 <GIC_SPI 902 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
896 <GIC_SPI 903 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
897 <GIC_SPI 904 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
898 <GIC_SPI 905 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
899 <GIC_SPI 906 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
900 <GIC_SPI 907 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
901 <GIC_SPI 908 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
902 <GIC_SPI 909 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
903 <GIC_SPI 910 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
904 <GIC_SPI 911 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
905 <GIC_SPI 912 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
906 <GIC_SPI 913 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
907 <GIC_SPI 914 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
908 <GIC_SPI 915 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
909 interrupt-names = "err 916 interrupt-names = "error",
910 "ch0", 917 "ch0", "ch1", "ch2", "ch3",
911 "ch4", 918 "ch4", "ch5", "ch6", "ch7",
912 "ch8", 919 "ch8", "ch9", "ch10", "ch11",
913 "ch12" 920 "ch12", "ch13", "ch14", "ch15";
914 clocks = <&cpg CPG_MOD 921 clocks = <&cpg CPG_MOD 217>;
915 clock-names = "fck"; 922 clock-names = "fck";
916 power-domains = <&sysc 923 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
917 resets = <&cpg 217>; 924 resets = <&cpg 217>;
918 #dma-cells = <1>; 925 #dma-cells = <1>;
919 dma-channels = <16>; 926 dma-channels = <16>;
920 iommus = <&ipmmu_ds1 1 927 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
921 <&ipmmu_ds1 18> 928 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
922 <&ipmmu_ds1 20> 929 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
923 <&ipmmu_ds1 22> 930 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
924 <&ipmmu_ds1 24> 931 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
925 <&ipmmu_ds1 26> 932 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
926 <&ipmmu_ds1 28> 933 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
927 <&ipmmu_ds1 30> 934 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
928 }; 935 };
929 936
930 ipmmu_ds0: iommu@e6740000 { 937 ipmmu_ds0: iommu@e6740000 {
931 compatible = "renesas, 938 compatible = "renesas,ipmmu-r8a77965";
932 reg = <0 0xe6740000 0 939 reg = <0 0xe6740000 0 0x1000>;
933 renesas,ipmmu-main = < 940 renesas,ipmmu-main = <&ipmmu_mm 0>;
934 power-domains = <&sysc 941 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 942 #iommu-cells = <1>;
936 }; 943 };
937 944
938 ipmmu_ds1: iommu@e7740000 { 945 ipmmu_ds1: iommu@e7740000 {
939 compatible = "renesas, 946 compatible = "renesas,ipmmu-r8a77965";
940 reg = <0 0xe7740000 0 947 reg = <0 0xe7740000 0 0x1000>;
941 renesas,ipmmu-main = < 948 renesas,ipmmu-main = <&ipmmu_mm 1>;
942 power-domains = <&sysc 949 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
943 #iommu-cells = <1>; 950 #iommu-cells = <1>;
944 }; 951 };
945 952
946 ipmmu_hc: iommu@e6570000 { 953 ipmmu_hc: iommu@e6570000 {
947 compatible = "renesas, 954 compatible = "renesas,ipmmu-r8a77965";
948 reg = <0 0xe6570000 0 955 reg = <0 0xe6570000 0 0x1000>;
949 renesas,ipmmu-main = < 956 renesas,ipmmu-main = <&ipmmu_mm 2>;
950 power-domains = <&sysc 957 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 958 #iommu-cells = <1>;
952 }; 959 };
953 960
954 ipmmu_mm: iommu@e67b0000 { 961 ipmmu_mm: iommu@e67b0000 {
955 compatible = "renesas, 962 compatible = "renesas,ipmmu-r8a77965";
956 reg = <0 0xe67b0000 0 963 reg = <0 0xe67b0000 0 0x1000>;
957 interrupts = <GIC_SPI 964 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 965 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
959 power-domains = <&sysc 966 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
960 #iommu-cells = <1>; 967 #iommu-cells = <1>;
961 }; 968 };
962 969
963 ipmmu_mp: iommu@ec670000 { 970 ipmmu_mp: iommu@ec670000 {
964 compatible = "renesas, 971 compatible = "renesas,ipmmu-r8a77965";
965 reg = <0 0xec670000 0 972 reg = <0 0xec670000 0 0x1000>;
966 renesas,ipmmu-main = < 973 renesas,ipmmu-main = <&ipmmu_mm 4>;
967 power-domains = <&sysc 974 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
968 #iommu-cells = <1>; 975 #iommu-cells = <1>;
969 }; 976 };
970 977
971 ipmmu_pv0: iommu@fd800000 { 978 ipmmu_pv0: iommu@fd800000 {
972 compatible = "renesas, 979 compatible = "renesas,ipmmu-r8a77965";
973 reg = <0 0xfd800000 0 980 reg = <0 0xfd800000 0 0x1000>;
974 renesas,ipmmu-main = < 981 renesas,ipmmu-main = <&ipmmu_mm 6>;
975 power-domains = <&sysc 982 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
976 #iommu-cells = <1>; 983 #iommu-cells = <1>;
977 }; 984 };
978 985
979 ipmmu_rt: iommu@ffc80000 { 986 ipmmu_rt: iommu@ffc80000 {
980 compatible = "renesas, 987 compatible = "renesas,ipmmu-r8a77965";
981 reg = <0 0xffc80000 0 988 reg = <0 0xffc80000 0 0x1000>;
982 renesas,ipmmu-main = < 989 renesas,ipmmu-main = <&ipmmu_mm 10>;
983 power-domains = <&sysc 990 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
984 #iommu-cells = <1>; 991 #iommu-cells = <1>;
985 }; 992 };
986 993
987 ipmmu_vc0: iommu@fe6b0000 { 994 ipmmu_vc0: iommu@fe6b0000 {
988 compatible = "renesas, 995 compatible = "renesas,ipmmu-r8a77965";
989 reg = <0 0xfe6b0000 0 996 reg = <0 0xfe6b0000 0 0x1000>;
990 renesas,ipmmu-main = < 997 renesas,ipmmu-main = <&ipmmu_mm 12>;
991 power-domains = <&sysc 998 power-domains = <&sysc R8A77965_PD_A3VC>;
992 #iommu-cells = <1>; 999 #iommu-cells = <1>;
993 }; 1000 };
994 1001
995 ipmmu_vi0: iommu@febd0000 { 1002 ipmmu_vi0: iommu@febd0000 {
996 compatible = "renesas, 1003 compatible = "renesas,ipmmu-r8a77965";
997 reg = <0 0xfebd0000 0 1004 reg = <0 0xfebd0000 0 0x1000>;
998 renesas,ipmmu-main = < 1005 renesas,ipmmu-main = <&ipmmu_mm 14>;
999 power-domains = <&sysc 1006 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1000 #iommu-cells = <1>; 1007 #iommu-cells = <1>;
1001 }; 1008 };
1002 1009
1003 ipmmu_vp0: iommu@fe990000 { 1010 ipmmu_vp0: iommu@fe990000 {
1004 compatible = "renesas 1011 compatible = "renesas,ipmmu-r8a77965";
1005 reg = <0 0xfe990000 0 1012 reg = <0 0xfe990000 0 0x1000>;
1006 renesas,ipmmu-main = 1013 renesas,ipmmu-main = <&ipmmu_mm 16>;
1007 power-domains = <&sys 1014 power-domains = <&sysc R8A77965_PD_A3VP>;
1008 #iommu-cells = <1>; 1015 #iommu-cells = <1>;
1009 }; 1016 };
1010 1017
1011 avb: ethernet@e6800000 { 1018 avb: ethernet@e6800000 {
1012 compatible = "renesas 1019 compatible = "renesas,etheravb-r8a77965",
1013 "renesas 1020 "renesas,etheravb-rcar-gen3";
1014 reg = <0 0xe6800000 0 1021 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1015 interrupts = <GIC_SPI 1022 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1016 <GIC_SPI 1023 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 1024 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 1025 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 1026 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 1027 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 1028 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 1029 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 1030 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 1031 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 1032 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 1033 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 1034 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 1035 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 1036 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 1037 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 1038 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 1039 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 1040 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 1041 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 1042 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 1043 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 1044 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 1045 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 1046 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1040 interrupt-names = "ch 1047 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1041 "ch 1048 "ch4", "ch5", "ch6", "ch7",
1042 "ch 1049 "ch8", "ch9", "ch10", "ch11",
1043 "ch 1050 "ch12", "ch13", "ch14", "ch15",
1044 "ch 1051 "ch16", "ch17", "ch18", "ch19",
1045 "ch 1052 "ch20", "ch21", "ch22", "ch23",
1046 "ch 1053 "ch24";
1047 clocks = <&cpg CPG_MO 1054 clocks = <&cpg CPG_MOD 812>;
1048 clock-names = "fck"; 1055 clock-names = "fck";
1049 power-domains = <&sys 1056 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1050 resets = <&cpg 812>; 1057 resets = <&cpg 812>;
1051 phy-mode = "rgmii"; 1058 phy-mode = "rgmii";
1052 rx-internal-delay-ps 1059 rx-internal-delay-ps = <0>;
1053 tx-internal-delay-ps 1060 tx-internal-delay-ps = <0>;
1054 iommus = <&ipmmu_ds0 1061 iommus = <&ipmmu_ds0 16>;
1055 #address-cells = <1>; 1062 #address-cells = <1>;
1056 #size-cells = <0>; 1063 #size-cells = <0>;
1057 status = "disabled"; 1064 status = "disabled";
1058 }; 1065 };
1059 1066
1060 can0: can@e6c30000 { 1067 can0: can@e6c30000 {
1061 compatible = "renesas 1068 compatible = "renesas,can-r8a77965",
1062 "renesas 1069 "renesas,rcar-gen3-can";
1063 reg = <0 0xe6c30000 0 1070 reg = <0 0xe6c30000 0 0x1000>;
1064 interrupts = <GIC_SPI 1071 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&cpg CPG_MO 1072 clocks = <&cpg CPG_MOD 916>,
1066 <&cpg CPG_CORE 1073 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1067 <&can_clk>; 1074 <&can_clk>;
1068 clock-names = "clkp1" 1075 clock-names = "clkp1", "clkp2", "can_clk";
1069 assigned-clocks = <&c 1076 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1070 assigned-clock-rates 1077 assigned-clock-rates = <40000000>;
1071 power-domains = <&sys 1078 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1072 resets = <&cpg 916>; 1079 resets = <&cpg 916>;
1073 status = "disabled"; 1080 status = "disabled";
1074 }; 1081 };
1075 1082
1076 can1: can@e6c38000 { 1083 can1: can@e6c38000 {
1077 compatible = "renesas 1084 compatible = "renesas,can-r8a77965",
1078 "renesas 1085 "renesas,rcar-gen3-can";
1079 reg = <0 0xe6c38000 0 1086 reg = <0 0xe6c38000 0 0x1000>;
1080 interrupts = <GIC_SPI 1087 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1081 clocks = <&cpg CPG_MO 1088 clocks = <&cpg CPG_MOD 915>,
1082 <&cpg CPG_CORE 1089 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1083 <&can_clk>; 1090 <&can_clk>;
1084 clock-names = "clkp1" 1091 clock-names = "clkp1", "clkp2", "can_clk";
1085 assigned-clocks = <&c 1092 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1086 assigned-clock-rates 1093 assigned-clock-rates = <40000000>;
1087 power-domains = <&sys 1094 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1088 resets = <&cpg 915>; 1095 resets = <&cpg 915>;
1089 status = "disabled"; 1096 status = "disabled";
1090 }; 1097 };
1091 1098
1092 canfd: can@e66c0000 { 1099 canfd: can@e66c0000 {
1093 compatible = "renesas 1100 compatible = "renesas,r8a77965-canfd",
1094 "renesas 1101 "renesas,rcar-gen3-canfd";
1095 reg = <0 0xe66c0000 0 1102 reg = <0 0xe66c0000 0 0x8000>;
1096 interrupts = <GIC_SPI 1103 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1097 <GIC_SPI 3 1104 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1098 interrupt-names = "ch <<
1099 clocks = <&cpg CPG_MO 1105 clocks = <&cpg CPG_MOD 914>,
1100 <&cpg CPG_CORE 1106 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1101 <&can_clk>; 1107 <&can_clk>;
1102 clock-names = "fck", 1108 clock-names = "fck", "canfd", "can_clk";
1103 assigned-clocks = <&c 1109 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1104 assigned-clock-rates 1110 assigned-clock-rates = <40000000>;
1105 power-domains = <&sys 1111 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1106 resets = <&cpg 914>; 1112 resets = <&cpg 914>;
1107 status = "disabled"; 1113 status = "disabled";
1108 1114
1109 channel0 { 1115 channel0 {
1110 status = "dis 1116 status = "disabled";
1111 }; 1117 };
1112 1118
1113 channel1 { 1119 channel1 {
1114 status = "dis 1120 status = "disabled";
1115 }; 1121 };
1116 }; 1122 };
1117 1123
1118 pwm0: pwm@e6e30000 { 1124 pwm0: pwm@e6e30000 {
1119 compatible = "renesas 1125 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1120 reg = <0 0xe6e30000 0 1126 reg = <0 0xe6e30000 0 8>;
1121 #pwm-cells = <2>; 1127 #pwm-cells = <2>;
1122 clocks = <&cpg CPG_MO 1128 clocks = <&cpg CPG_MOD 523>;
1123 resets = <&cpg 523>; 1129 resets = <&cpg 523>;
1124 power-domains = <&sys 1130 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1125 status = "disabled"; 1131 status = "disabled";
1126 }; 1132 };
1127 1133
1128 pwm1: pwm@e6e31000 { 1134 pwm1: pwm@e6e31000 {
1129 compatible = "renesas 1135 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1130 reg = <0 0xe6e31000 0 1136 reg = <0 0xe6e31000 0 8>;
1131 #pwm-cells = <2>; 1137 #pwm-cells = <2>;
1132 clocks = <&cpg CPG_MO 1138 clocks = <&cpg CPG_MOD 523>;
1133 resets = <&cpg 523>; 1139 resets = <&cpg 523>;
1134 power-domains = <&sys 1140 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1135 status = "disabled"; 1141 status = "disabled";
1136 }; 1142 };
1137 1143
1138 pwm2: pwm@e6e32000 { 1144 pwm2: pwm@e6e32000 {
1139 compatible = "renesas 1145 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1140 reg = <0 0xe6e32000 0 1146 reg = <0 0xe6e32000 0 8>;
1141 #pwm-cells = <2>; 1147 #pwm-cells = <2>;
1142 clocks = <&cpg CPG_MO 1148 clocks = <&cpg CPG_MOD 523>;
1143 resets = <&cpg 523>; 1149 resets = <&cpg 523>;
1144 power-domains = <&sys 1150 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1145 status = "disabled"; 1151 status = "disabled";
1146 }; 1152 };
1147 1153
1148 pwm3: pwm@e6e33000 { 1154 pwm3: pwm@e6e33000 {
1149 compatible = "renesas 1155 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1150 reg = <0 0xe6e33000 0 1156 reg = <0 0xe6e33000 0 8>;
1151 #pwm-cells = <2>; 1157 #pwm-cells = <2>;
1152 clocks = <&cpg CPG_MO 1158 clocks = <&cpg CPG_MOD 523>;
1153 resets = <&cpg 523>; 1159 resets = <&cpg 523>;
1154 power-domains = <&sys 1160 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1155 status = "disabled"; 1161 status = "disabled";
1156 }; 1162 };
1157 1163
1158 pwm4: pwm@e6e34000 { 1164 pwm4: pwm@e6e34000 {
1159 compatible = "renesas 1165 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1160 reg = <0 0xe6e34000 0 1166 reg = <0 0xe6e34000 0 8>;
1161 #pwm-cells = <2>; 1167 #pwm-cells = <2>;
1162 clocks = <&cpg CPG_MO 1168 clocks = <&cpg CPG_MOD 523>;
1163 resets = <&cpg 523>; 1169 resets = <&cpg 523>;
1164 power-domains = <&sys 1170 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1165 status = "disabled"; 1171 status = "disabled";
1166 }; 1172 };
1167 1173
1168 pwm5: pwm@e6e35000 { 1174 pwm5: pwm@e6e35000 {
1169 compatible = "renesas 1175 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1170 reg = <0 0xe6e35000 0 1176 reg = <0 0xe6e35000 0 8>;
1171 #pwm-cells = <2>; 1177 #pwm-cells = <2>;
1172 clocks = <&cpg CPG_MO 1178 clocks = <&cpg CPG_MOD 523>;
1173 resets = <&cpg 523>; 1179 resets = <&cpg 523>;
1174 power-domains = <&sys 1180 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1175 status = "disabled"; 1181 status = "disabled";
1176 }; 1182 };
1177 1183
1178 pwm6: pwm@e6e36000 { 1184 pwm6: pwm@e6e36000 {
1179 compatible = "renesas 1185 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1180 reg = <0 0xe6e36000 0 1186 reg = <0 0xe6e36000 0 8>;
1181 #pwm-cells = <2>; 1187 #pwm-cells = <2>;
1182 clocks = <&cpg CPG_MO 1188 clocks = <&cpg CPG_MOD 523>;
1183 resets = <&cpg 523>; 1189 resets = <&cpg 523>;
1184 power-domains = <&sys 1190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1185 status = "disabled"; 1191 status = "disabled";
1186 }; 1192 };
1187 1193
1188 scif0: serial@e6e60000 { 1194 scif0: serial@e6e60000 {
1189 compatible = "renesas 1195 compatible = "renesas,scif-r8a77965",
1190 "renesas 1196 "renesas,rcar-gen3-scif", "renesas,scif";
1191 reg = <0 0xe6e60000 0 1197 reg = <0 0xe6e60000 0 64>;
1192 interrupts = <GIC_SPI 1198 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MO 1199 clocks = <&cpg CPG_MOD 207>,
1194 <&cpg CPG_CO 1200 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1195 <&scif_clk>; 1201 <&scif_clk>;
1196 clock-names = "fck", 1202 clock-names = "fck", "brg_int", "scif_clk";
1197 dmas = <&dmac1 0x51>, 1203 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1198 <&dmac2 0x51>, 1204 <&dmac2 0x51>, <&dmac2 0x50>;
1199 dma-names = "tx", "rx 1205 dma-names = "tx", "rx", "tx", "rx";
1200 power-domains = <&sys 1206 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1201 resets = <&cpg 207>; 1207 resets = <&cpg 207>;
1202 status = "disabled"; 1208 status = "disabled";
1203 }; 1209 };
1204 1210
1205 scif1: serial@e6e68000 { 1211 scif1: serial@e6e68000 {
1206 compatible = "renesas 1212 compatible = "renesas,scif-r8a77965",
1207 "renesas 1213 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6e68000 0 1214 reg = <0 0xe6e68000 0 64>;
1209 interrupts = <GIC_SPI 1215 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1216 clocks = <&cpg CPG_MOD 206>,
1211 <&cpg CPG_CO 1217 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1212 <&scif_clk>; 1218 <&scif_clk>;
1213 clock-names = "fck", 1219 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac1 0x53>, 1220 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1215 <&dmac2 0x53>, 1221 <&dmac2 0x53>, <&dmac2 0x52>;
1216 dma-names = "tx", "rx 1222 dma-names = "tx", "rx", "tx", "rx";
1217 power-domains = <&sys 1223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1218 resets = <&cpg 206>; 1224 resets = <&cpg 206>;
1219 status = "disabled"; 1225 status = "disabled";
1220 }; 1226 };
1221 1227
1222 scif2: serial@e6e88000 { 1228 scif2: serial@e6e88000 {
1223 compatible = "renesas 1229 compatible = "renesas,scif-r8a77965",
1224 "renesas 1230 "renesas,rcar-gen3-scif", "renesas,scif";
1225 reg = <0 0xe6e88000 0 1231 reg = <0 0xe6e88000 0 64>;
1226 interrupts = <GIC_SPI 1232 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MO 1233 clocks = <&cpg CPG_MOD 310>,
1228 <&cpg CPG_CO 1234 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1229 <&scif_clk>; 1235 <&scif_clk>;
1230 clock-names = "fck", 1236 clock-names = "fck", "brg_int", "scif_clk";
1231 dmas = <&dmac1 0x13>, 1237 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1232 <&dmac2 0x13>, 1238 <&dmac2 0x13>, <&dmac2 0x12>;
1233 dma-names = "tx", "rx 1239 dma-names = "tx", "rx", "tx", "rx";
1234 power-domains = <&sys 1240 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1235 resets = <&cpg 310>; 1241 resets = <&cpg 310>;
1236 status = "disabled"; 1242 status = "disabled";
1237 }; 1243 };
1238 1244
1239 scif3: serial@e6c50000 { 1245 scif3: serial@e6c50000 {
1240 compatible = "renesas 1246 compatible = "renesas,scif-r8a77965",
1241 "renesas 1247 "renesas,rcar-gen3-scif", "renesas,scif";
1242 reg = <0 0xe6c50000 0 1248 reg = <0 0xe6c50000 0 64>;
1243 interrupts = <GIC_SPI 1249 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1244 clocks = <&cpg CPG_MO 1250 clocks = <&cpg CPG_MOD 204>,
1245 <&cpg CPG_CO 1251 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1246 <&scif_clk>; 1252 <&scif_clk>;
1247 clock-names = "fck", 1253 clock-names = "fck", "brg_int", "scif_clk";
1248 dmas = <&dmac0 0x57>, 1254 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1249 dma-names = "tx", "rx 1255 dma-names = "tx", "rx";
1250 power-domains = <&sys 1256 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1251 resets = <&cpg 204>; 1257 resets = <&cpg 204>;
1252 status = "disabled"; 1258 status = "disabled";
1253 }; 1259 };
1254 1260
1255 scif4: serial@e6c40000 { 1261 scif4: serial@e6c40000 {
1256 compatible = "renesas 1262 compatible = "renesas,scif-r8a77965",
1257 "renesas 1263 "renesas,rcar-gen3-scif", "renesas,scif";
1258 reg = <0 0xe6c40000 0 1264 reg = <0 0xe6c40000 0 64>;
1259 interrupts = <GIC_SPI 1265 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1260 clocks = <&cpg CPG_MO 1266 clocks = <&cpg CPG_MOD 203>,
1261 <&cpg CPG_CO 1267 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1262 <&scif_clk>; 1268 <&scif_clk>;
1263 clock-names = "fck", 1269 clock-names = "fck", "brg_int", "scif_clk";
1264 dmas = <&dmac0 0x59>, 1270 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1265 dma-names = "tx", "rx 1271 dma-names = "tx", "rx";
1266 power-domains = <&sys 1272 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1267 resets = <&cpg 203>; 1273 resets = <&cpg 203>;
1268 status = "disabled"; 1274 status = "disabled";
1269 }; 1275 };
1270 1276
1271 scif5: serial@e6f30000 { 1277 scif5: serial@e6f30000 {
1272 compatible = "renesas 1278 compatible = "renesas,scif-r8a77965",
1273 "renesas 1279 "renesas,rcar-gen3-scif", "renesas,scif";
1274 reg = <0 0xe6f30000 0 1280 reg = <0 0xe6f30000 0 64>;
1275 interrupts = <GIC_SPI 1281 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1276 clocks = <&cpg CPG_MO 1282 clocks = <&cpg CPG_MOD 202>,
1277 <&cpg CPG_CO 1283 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1278 <&scif_clk>; 1284 <&scif_clk>;
1279 clock-names = "fck", 1285 clock-names = "fck", "brg_int", "scif_clk";
1280 dmas = <&dmac1 0x5b>, 1286 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1281 <&dmac2 0x5b>, 1287 <&dmac2 0x5b>, <&dmac2 0x5a>;
1282 dma-names = "tx", "rx 1288 dma-names = "tx", "rx", "tx", "rx";
1283 power-domains = <&sys 1289 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1284 resets = <&cpg 202>; 1290 resets = <&cpg 202>;
1285 status = "disabled"; 1291 status = "disabled";
1286 }; 1292 };
1287 1293
1288 tpu: pwm@e6e80000 { 1294 tpu: pwm@e6e80000 {
1289 compatible = "renesas 1295 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1290 reg = <0 0xe6e80000 0 1296 reg = <0 0xe6e80000 0 0x148>;
1291 interrupts = <GIC_SPI 1297 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1292 clocks = <&cpg CPG_MO 1298 clocks = <&cpg CPG_MOD 304>;
1293 power-domains = <&sys 1299 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1294 resets = <&cpg 304>; 1300 resets = <&cpg 304>;
1295 #pwm-cells = <3>; 1301 #pwm-cells = <3>;
1296 status = "disabled"; 1302 status = "disabled";
1297 }; 1303 };
1298 1304
1299 msiof0: spi@e6e90000 { 1305 msiof0: spi@e6e90000 {
1300 compatible = "renesas 1306 compatible = "renesas,msiof-r8a77965",
1301 "renesas 1307 "renesas,rcar-gen3-msiof";
1302 reg = <0 0xe6e90000 0 1308 reg = <0 0xe6e90000 0 0x0064>;
1303 interrupts = <GIC_SPI 1309 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1304 clocks = <&cpg CPG_MO 1310 clocks = <&cpg CPG_MOD 211>;
1305 dmas = <&dmac1 0x41>, 1311 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1306 <&dmac2 0x41>, 1312 <&dmac2 0x41>, <&dmac2 0x40>;
1307 dma-names = "tx", "rx 1313 dma-names = "tx", "rx", "tx", "rx";
1308 power-domains = <&sys 1314 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1309 resets = <&cpg 211>; 1315 resets = <&cpg 211>;
1310 #address-cells = <1>; 1316 #address-cells = <1>;
1311 #size-cells = <0>; 1317 #size-cells = <0>;
1312 status = "disabled"; 1318 status = "disabled";
1313 }; 1319 };
1314 1320
1315 msiof1: spi@e6ea0000 { 1321 msiof1: spi@e6ea0000 {
1316 compatible = "renesas 1322 compatible = "renesas,msiof-r8a77965",
1317 "renesas 1323 "renesas,rcar-gen3-msiof";
1318 reg = <0 0xe6ea0000 0 1324 reg = <0 0xe6ea0000 0 0x0064>;
1319 interrupts = <GIC_SPI 1325 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MO 1326 clocks = <&cpg CPG_MOD 210>;
1321 dmas = <&dmac1 0x43>, 1327 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1322 <&dmac2 0x43>, 1328 <&dmac2 0x43>, <&dmac2 0x42>;
1323 dma-names = "tx", "rx 1329 dma-names = "tx", "rx", "tx", "rx";
1324 power-domains = <&sys 1330 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1325 resets = <&cpg 210>; 1331 resets = <&cpg 210>;
1326 #address-cells = <1>; 1332 #address-cells = <1>;
1327 #size-cells = <0>; 1333 #size-cells = <0>;
1328 status = "disabled"; 1334 status = "disabled";
1329 }; 1335 };
1330 1336
1331 msiof2: spi@e6c00000 { 1337 msiof2: spi@e6c00000 {
1332 compatible = "renesas 1338 compatible = "renesas,msiof-r8a77965",
1333 "renesas 1339 "renesas,rcar-gen3-msiof";
1334 reg = <0 0xe6c00000 0 1340 reg = <0 0xe6c00000 0 0x0064>;
1335 interrupts = <GIC_SPI 1341 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MO 1342 clocks = <&cpg CPG_MOD 209>;
1337 dmas = <&dmac0 0x45>, 1343 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1338 dma-names = "tx", "rx 1344 dma-names = "tx", "rx";
1339 power-domains = <&sys 1345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1340 resets = <&cpg 209>; 1346 resets = <&cpg 209>;
1341 #address-cells = <1>; 1347 #address-cells = <1>;
1342 #size-cells = <0>; 1348 #size-cells = <0>;
1343 status = "disabled"; 1349 status = "disabled";
1344 }; 1350 };
1345 1351
1346 msiof3: spi@e6c10000 { 1352 msiof3: spi@e6c10000 {
1347 compatible = "renesas 1353 compatible = "renesas,msiof-r8a77965",
1348 "renesas 1354 "renesas,rcar-gen3-msiof";
1349 reg = <0 0xe6c10000 0 1355 reg = <0 0xe6c10000 0 0x0064>;
1350 interrupts = <GIC_SPI 1356 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1351 clocks = <&cpg CPG_MO 1357 clocks = <&cpg CPG_MOD 208>;
1352 dmas = <&dmac0 0x47>, 1358 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1353 dma-names = "tx", "rx 1359 dma-names = "tx", "rx";
1354 power-domains = <&sys 1360 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1355 resets = <&cpg 208>; 1361 resets = <&cpg 208>;
1356 #address-cells = <1>; 1362 #address-cells = <1>;
1357 #size-cells = <0>; 1363 #size-cells = <0>;
1358 status = "disabled"; 1364 status = "disabled";
1359 }; 1365 };
1360 1366
1361 vin0: video@e6ef0000 { 1367 vin0: video@e6ef0000 {
1362 compatible = "renesas 1368 compatible = "renesas,vin-r8a77965";
1363 reg = <0 0xe6ef0000 0 1369 reg = <0 0xe6ef0000 0 0x1000>;
1364 interrupts = <GIC_SPI 1370 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MO 1371 clocks = <&cpg CPG_MOD 811>;
1366 power-domains = <&sys 1372 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1367 resets = <&cpg 811>; 1373 resets = <&cpg 811>;
1368 renesas,id = <0>; 1374 renesas,id = <0>;
1369 status = "disabled"; 1375 status = "disabled";
1370 1376
1371 ports { 1377 ports {
1372 #address-cell 1378 #address-cells = <1>;
1373 #size-cells = 1379 #size-cells = <0>;
1374 1380
1375 port@1 { 1381 port@1 {
1376 #addr 1382 #address-cells = <1>;
1377 #size 1383 #size-cells = <0>;
1378 1384
1379 reg = 1385 reg = <1>;
1380 1386
1381 vin0c 1387 vin0csi20: endpoint@0 {
1382 1388 reg = <0>;
1383 1389 remote-endpoint = <&csi20vin0>;
1384 }; 1390 };
1385 vin0c 1391 vin0csi40: endpoint@2 {
1386 1392 reg = <2>;
1387 1393 remote-endpoint = <&csi40vin0>;
1388 }; 1394 };
1389 }; 1395 };
1390 }; 1396 };
1391 }; 1397 };
1392 1398
1393 vin1: video@e6ef1000 { 1399 vin1: video@e6ef1000 {
1394 compatible = "renesas 1400 compatible = "renesas,vin-r8a77965";
1395 reg = <0 0xe6ef1000 0 1401 reg = <0 0xe6ef1000 0 0x1000>;
1396 interrupts = <GIC_SPI 1402 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MO 1403 clocks = <&cpg CPG_MOD 810>;
1398 power-domains = <&sys 1404 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1399 resets = <&cpg 810>; 1405 resets = <&cpg 810>;
1400 renesas,id = <1>; 1406 renesas,id = <1>;
1401 status = "disabled"; 1407 status = "disabled";
1402 1408
1403 ports { 1409 ports {
1404 #address-cell 1410 #address-cells = <1>;
1405 #size-cells = 1411 #size-cells = <0>;
1406 1412
1407 port@1 { 1413 port@1 {
1408 #addr 1414 #address-cells = <1>;
1409 #size 1415 #size-cells = <0>;
1410 1416
1411 reg = 1417 reg = <1>;
1412 1418
1413 vin1c 1419 vin1csi20: endpoint@0 {
1414 1420 reg = <0>;
1415 1421 remote-endpoint = <&csi20vin1>;
1416 }; 1422 };
1417 vin1c 1423 vin1csi40: endpoint@2 {
1418 1424 reg = <2>;
1419 1425 remote-endpoint = <&csi40vin1>;
1420 }; 1426 };
1421 }; 1427 };
1422 }; 1428 };
1423 }; 1429 };
1424 1430
1425 vin2: video@e6ef2000 { 1431 vin2: video@e6ef2000 {
1426 compatible = "renesas 1432 compatible = "renesas,vin-r8a77965";
1427 reg = <0 0xe6ef2000 0 1433 reg = <0 0xe6ef2000 0 0x1000>;
1428 interrupts = <GIC_SPI 1434 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MO 1435 clocks = <&cpg CPG_MOD 809>;
1430 power-domains = <&sys 1436 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1431 resets = <&cpg 809>; 1437 resets = <&cpg 809>;
1432 renesas,id = <2>; 1438 renesas,id = <2>;
1433 status = "disabled"; 1439 status = "disabled";
1434 1440
1435 ports { 1441 ports {
1436 #address-cell 1442 #address-cells = <1>;
1437 #size-cells = 1443 #size-cells = <0>;
1438 1444
1439 port@1 { 1445 port@1 {
1440 #addr 1446 #address-cells = <1>;
1441 #size 1447 #size-cells = <0>;
1442 1448
1443 reg = 1449 reg = <1>;
1444 1450
1445 vin2c 1451 vin2csi20: endpoint@0 {
1446 1452 reg = <0>;
1447 1453 remote-endpoint = <&csi20vin2>;
1448 }; 1454 };
1449 vin2c 1455 vin2csi40: endpoint@2 {
1450 1456 reg = <2>;
1451 1457 remote-endpoint = <&csi40vin2>;
1452 }; 1458 };
1453 }; 1459 };
1454 }; 1460 };
1455 }; 1461 };
1456 1462
1457 vin3: video@e6ef3000 { 1463 vin3: video@e6ef3000 {
1458 compatible = "renesas 1464 compatible = "renesas,vin-r8a77965";
1459 reg = <0 0xe6ef3000 0 1465 reg = <0 0xe6ef3000 0 0x1000>;
1460 interrupts = <GIC_SPI 1466 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MO 1467 clocks = <&cpg CPG_MOD 808>;
1462 power-domains = <&sys 1468 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1463 resets = <&cpg 808>; 1469 resets = <&cpg 808>;
1464 renesas,id = <3>; 1470 renesas,id = <3>;
1465 status = "disabled"; 1471 status = "disabled";
1466 1472
1467 ports { 1473 ports {
1468 #address-cell 1474 #address-cells = <1>;
1469 #size-cells = 1475 #size-cells = <0>;
1470 1476
1471 port@1 { 1477 port@1 {
1472 #addr 1478 #address-cells = <1>;
1473 #size 1479 #size-cells = <0>;
1474 1480
1475 reg = 1481 reg = <1>;
1476 1482
1477 vin3c 1483 vin3csi20: endpoint@0 {
1478 1484 reg = <0>;
1479 1485 remote-endpoint = <&csi20vin3>;
1480 }; 1486 };
1481 vin3c 1487 vin3csi40: endpoint@2 {
1482 1488 reg = <2>;
1483 1489 remote-endpoint = <&csi40vin3>;
1484 }; 1490 };
1485 }; 1491 };
1486 }; 1492 };
1487 }; 1493 };
1488 1494
1489 vin4: video@e6ef4000 { 1495 vin4: video@e6ef4000 {
1490 compatible = "renesas 1496 compatible = "renesas,vin-r8a77965";
1491 reg = <0 0xe6ef4000 0 1497 reg = <0 0xe6ef4000 0 0x1000>;
1492 interrupts = <GIC_SPI 1498 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MO 1499 clocks = <&cpg CPG_MOD 807>;
1494 power-domains = <&sys 1500 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1495 resets = <&cpg 807>; 1501 resets = <&cpg 807>;
1496 renesas,id = <4>; 1502 renesas,id = <4>;
1497 status = "disabled"; 1503 status = "disabled";
1498 1504
1499 ports { 1505 ports {
1500 #address-cell 1506 #address-cells = <1>;
1501 #size-cells = 1507 #size-cells = <0>;
1502 1508
1503 port@1 { 1509 port@1 {
1504 #addr 1510 #address-cells = <1>;
1505 #size 1511 #size-cells = <0>;
1506 1512
1507 reg = 1513 reg = <1>;
1508 1514
1509 vin4c 1515 vin4csi20: endpoint@0 {
1510 1516 reg = <0>;
1511 1517 remote-endpoint = <&csi20vin4>;
1512 }; 1518 };
1513 vin4c 1519 vin4csi40: endpoint@2 {
1514 1520 reg = <2>;
1515 1521 remote-endpoint = <&csi40vin4>;
1516 }; 1522 };
1517 }; 1523 };
1518 }; 1524 };
1519 }; 1525 };
1520 1526
1521 vin5: video@e6ef5000 { 1527 vin5: video@e6ef5000 {
1522 compatible = "renesas 1528 compatible = "renesas,vin-r8a77965";
1523 reg = <0 0xe6ef5000 0 1529 reg = <0 0xe6ef5000 0 0x1000>;
1524 interrupts = <GIC_SPI 1530 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MO 1531 clocks = <&cpg CPG_MOD 806>;
1526 power-domains = <&sys 1532 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1527 resets = <&cpg 806>; 1533 resets = <&cpg 806>;
1528 renesas,id = <5>; 1534 renesas,id = <5>;
1529 status = "disabled"; 1535 status = "disabled";
1530 1536
1531 ports { 1537 ports {
1532 #address-cell 1538 #address-cells = <1>;
1533 #size-cells = 1539 #size-cells = <0>;
1534 1540
1535 port@1 { 1541 port@1 {
1536 #addr 1542 #address-cells = <1>;
1537 #size 1543 #size-cells = <0>;
1538 1544
1539 reg = 1545 reg = <1>;
1540 1546
1541 vin5c 1547 vin5csi20: endpoint@0 {
1542 1548 reg = <0>;
1543 1549 remote-endpoint = <&csi20vin5>;
1544 }; 1550 };
1545 vin5c 1551 vin5csi40: endpoint@2 {
1546 1552 reg = <2>;
1547 1553 remote-endpoint = <&csi40vin5>;
1548 }; 1554 };
1549 }; 1555 };
1550 }; 1556 };
1551 }; 1557 };
1552 1558
1553 vin6: video@e6ef6000 { 1559 vin6: video@e6ef6000 {
1554 compatible = "renesas 1560 compatible = "renesas,vin-r8a77965";
1555 reg = <0 0xe6ef6000 0 1561 reg = <0 0xe6ef6000 0 0x1000>;
1556 interrupts = <GIC_SPI 1562 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1557 clocks = <&cpg CPG_MO 1563 clocks = <&cpg CPG_MOD 805>;
1558 power-domains = <&sys 1564 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1559 resets = <&cpg 805>; 1565 resets = <&cpg 805>;
1560 renesas,id = <6>; 1566 renesas,id = <6>;
1561 status = "disabled"; 1567 status = "disabled";
1562 1568
1563 ports { 1569 ports {
1564 #address-cell 1570 #address-cells = <1>;
1565 #size-cells = 1571 #size-cells = <0>;
1566 1572
1567 port@1 { 1573 port@1 {
1568 #addr 1574 #address-cells = <1>;
1569 #size 1575 #size-cells = <0>;
1570 1576
1571 reg = 1577 reg = <1>;
1572 1578
1573 vin6c 1579 vin6csi20: endpoint@0 {
1574 1580 reg = <0>;
1575 1581 remote-endpoint = <&csi20vin6>;
1576 }; 1582 };
1577 vin6c 1583 vin6csi40: endpoint@2 {
1578 1584 reg = <2>;
1579 1585 remote-endpoint = <&csi40vin6>;
1580 }; 1586 };
1581 }; 1587 };
1582 }; 1588 };
1583 }; 1589 };
1584 1590
1585 vin7: video@e6ef7000 { 1591 vin7: video@e6ef7000 {
1586 compatible = "renesas 1592 compatible = "renesas,vin-r8a77965";
1587 reg = <0 0xe6ef7000 0 1593 reg = <0 0xe6ef7000 0 0x1000>;
1588 interrupts = <GIC_SPI 1594 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1589 clocks = <&cpg CPG_MO 1595 clocks = <&cpg CPG_MOD 804>;
1590 power-domains = <&sys 1596 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1591 resets = <&cpg 804>; 1597 resets = <&cpg 804>;
1592 renesas,id = <7>; 1598 renesas,id = <7>;
1593 status = "disabled"; 1599 status = "disabled";
1594 1600
1595 ports { 1601 ports {
1596 #address-cell 1602 #address-cells = <1>;
1597 #size-cells = 1603 #size-cells = <0>;
1598 1604
1599 port@1 { 1605 port@1 {
1600 #addr 1606 #address-cells = <1>;
1601 #size 1607 #size-cells = <0>;
1602 1608
1603 reg = 1609 reg = <1>;
1604 1610
1605 vin7c 1611 vin7csi20: endpoint@0 {
1606 1612 reg = <0>;
1607 1613 remote-endpoint = <&csi20vin7>;
1608 }; 1614 };
1609 vin7c 1615 vin7csi40: endpoint@2 {
1610 1616 reg = <2>;
1611 1617 remote-endpoint = <&csi40vin7>;
1612 }; 1618 };
1613 }; 1619 };
1614 }; 1620 };
1615 }; 1621 };
1616 1622
1617 drif00: rif@e6f40000 { 1623 drif00: rif@e6f40000 {
1618 compatible = "renesas 1624 compatible = "renesas,r8a77965-drif",
1619 "renesas 1625 "renesas,rcar-gen3-drif";
1620 reg = <0 0xe6f40000 0 1626 reg = <0 0xe6f40000 0 0x84>;
1621 interrupts = <GIC_SPI 1627 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1622 clocks = <&cpg CPG_MO 1628 clocks = <&cpg CPG_MOD 515>;
1623 clock-names = "fck"; 1629 clock-names = "fck";
1624 dmas = <&dmac1 0x20>, 1630 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1625 dma-names = "rx", "rx 1631 dma-names = "rx", "rx";
1626 power-domains = <&sys 1632 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1627 resets = <&cpg 515>; 1633 resets = <&cpg 515>;
1628 renesas,bonding = <&d 1634 renesas,bonding = <&drif01>;
1629 status = "disabled"; 1635 status = "disabled";
1630 }; 1636 };
1631 1637
1632 drif01: rif@e6f50000 { 1638 drif01: rif@e6f50000 {
1633 compatible = "renesas 1639 compatible = "renesas,r8a77965-drif",
1634 "renesas 1640 "renesas,rcar-gen3-drif";
1635 reg = <0 0xe6f50000 0 1641 reg = <0 0xe6f50000 0 0x84>;
1636 interrupts = <GIC_SPI 1642 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1637 clocks = <&cpg CPG_MO 1643 clocks = <&cpg CPG_MOD 514>;
1638 clock-names = "fck"; 1644 clock-names = "fck";
1639 dmas = <&dmac1 0x22>, 1645 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1640 dma-names = "rx", "rx 1646 dma-names = "rx", "rx";
1641 power-domains = <&sys 1647 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1642 resets = <&cpg 514>; 1648 resets = <&cpg 514>;
1643 renesas,bonding = <&d 1649 renesas,bonding = <&drif00>;
1644 status = "disabled"; 1650 status = "disabled";
1645 }; 1651 };
1646 1652
1647 drif10: rif@e6f60000 { 1653 drif10: rif@e6f60000 {
1648 compatible = "renesas 1654 compatible = "renesas,r8a77965-drif",
1649 "renesas 1655 "renesas,rcar-gen3-drif";
1650 reg = <0 0xe6f60000 0 1656 reg = <0 0xe6f60000 0 0x84>;
1651 interrupts = <GIC_SPI 1657 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1652 clocks = <&cpg CPG_MO 1658 clocks = <&cpg CPG_MOD 513>;
1653 clock-names = "fck"; 1659 clock-names = "fck";
1654 dmas = <&dmac1 0x24>, 1660 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1655 dma-names = "rx", "rx 1661 dma-names = "rx", "rx";
1656 power-domains = <&sys 1662 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1657 resets = <&cpg 513>; 1663 resets = <&cpg 513>;
1658 renesas,bonding = <&d 1664 renesas,bonding = <&drif11>;
1659 status = "disabled"; 1665 status = "disabled";
1660 }; 1666 };
1661 1667
1662 drif11: rif@e6f70000 { 1668 drif11: rif@e6f70000 {
1663 compatible = "renesas 1669 compatible = "renesas,r8a77965-drif",
1664 "renesas 1670 "renesas,rcar-gen3-drif";
1665 reg = <0 0xe6f70000 0 1671 reg = <0 0xe6f70000 0 0x84>;
1666 interrupts = <GIC_SPI 1672 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1667 clocks = <&cpg CPG_MO 1673 clocks = <&cpg CPG_MOD 512>;
1668 clock-names = "fck"; 1674 clock-names = "fck";
1669 dmas = <&dmac1 0x26>, 1675 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1670 dma-names = "rx", "rx 1676 dma-names = "rx", "rx";
1671 power-domains = <&sys 1677 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1672 resets = <&cpg 512>; 1678 resets = <&cpg 512>;
1673 renesas,bonding = <&d 1679 renesas,bonding = <&drif10>;
1674 status = "disabled"; 1680 status = "disabled";
1675 }; 1681 };
1676 1682
1677 drif20: rif@e6f80000 { 1683 drif20: rif@e6f80000 {
1678 compatible = "renesas 1684 compatible = "renesas,r8a77965-drif",
1679 "renesas 1685 "renesas,rcar-gen3-drif";
1680 reg = <0 0xe6f80000 0 1686 reg = <0 0xe6f80000 0 0x84>;
1681 interrupts = <GIC_SPI 1687 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1682 clocks = <&cpg CPG_MO 1688 clocks = <&cpg CPG_MOD 511>;
1683 clock-names = "fck"; 1689 clock-names = "fck";
1684 dmas = <&dmac1 0x28>, 1690 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1685 dma-names = "rx", "rx 1691 dma-names = "rx", "rx";
1686 power-domains = <&sys 1692 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1687 resets = <&cpg 511>; 1693 resets = <&cpg 511>;
1688 renesas,bonding = <&d 1694 renesas,bonding = <&drif21>;
1689 status = "disabled"; 1695 status = "disabled";
1690 }; 1696 };
1691 1697
1692 drif21: rif@e6f90000 { 1698 drif21: rif@e6f90000 {
1693 compatible = "renesas 1699 compatible = "renesas,r8a77965-drif",
1694 "renesas 1700 "renesas,rcar-gen3-drif";
1695 reg = <0 0xe6f90000 0 1701 reg = <0 0xe6f90000 0 0x84>;
1696 interrupts = <GIC_SPI 1702 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1697 clocks = <&cpg CPG_MO 1703 clocks = <&cpg CPG_MOD 510>;
1698 clock-names = "fck"; 1704 clock-names = "fck";
1699 dmas = <&dmac1 0x2a>, 1705 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1700 dma-names = "rx", "rx 1706 dma-names = "rx", "rx";
1701 power-domains = <&sys 1707 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1702 resets = <&cpg 510>; 1708 resets = <&cpg 510>;
1703 renesas,bonding = <&d 1709 renesas,bonding = <&drif20>;
1704 status = "disabled"; 1710 status = "disabled";
1705 }; 1711 };
1706 1712
1707 drif30: rif@e6fa0000 { 1713 drif30: rif@e6fa0000 {
1708 compatible = "renesas 1714 compatible = "renesas,r8a77965-drif",
1709 "renesas 1715 "renesas,rcar-gen3-drif";
1710 reg = <0 0xe6fa0000 0 1716 reg = <0 0xe6fa0000 0 0x84>;
1711 interrupts = <GIC_SPI 1717 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1712 clocks = <&cpg CPG_MO 1718 clocks = <&cpg CPG_MOD 509>;
1713 clock-names = "fck"; 1719 clock-names = "fck";
1714 dmas = <&dmac1 0x2c>, 1720 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1715 dma-names = "rx", "rx 1721 dma-names = "rx", "rx";
1716 power-domains = <&sys 1722 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1717 resets = <&cpg 509>; 1723 resets = <&cpg 509>;
1718 renesas,bonding = <&d 1724 renesas,bonding = <&drif31>;
1719 status = "disabled"; 1725 status = "disabled";
1720 }; 1726 };
1721 1727
1722 drif31: rif@e6fb0000 { 1728 drif31: rif@e6fb0000 {
1723 compatible = "renesas 1729 compatible = "renesas,r8a77965-drif",
1724 "renesas 1730 "renesas,rcar-gen3-drif";
1725 reg = <0 0xe6fb0000 0 1731 reg = <0 0xe6fb0000 0 0x84>;
1726 interrupts = <GIC_SPI 1732 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1727 clocks = <&cpg CPG_MO 1733 clocks = <&cpg CPG_MOD 508>;
1728 clock-names = "fck"; 1734 clock-names = "fck";
1729 dmas = <&dmac1 0x2e>, 1735 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1730 dma-names = "rx", "rx 1736 dma-names = "rx", "rx";
1731 power-domains = <&sys 1737 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1732 resets = <&cpg 508>; 1738 resets = <&cpg 508>;
1733 renesas,bonding = <&d 1739 renesas,bonding = <&drif30>;
1734 status = "disabled"; 1740 status = "disabled";
1735 }; 1741 };
1736 1742
1737 rcar_sound: sound@ec500000 { 1743 rcar_sound: sound@ec500000 {
1738 /* 1744 /*
1739 * #sound-dai-cells i !! 1745 * #sound-dai-cells is required
1740 * 1746 *
1741 * Single DAI : #soun 1747 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1742 * Multi DAI : #soun 1748 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1743 */ 1749 */
1744 /* 1750 /*
1745 * #clock-cells is re 1751 * #clock-cells is required for audio_clkout0/1/2/3
1746 * 1752 *
1747 * clkout : #cl 1753 * clkout : #clock-cells = <0>; <&rcar_sound>;
1748 * clkout0/1/2/3: #cl 1754 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1749 */ 1755 */
1750 compatible = "renesas !! 1756 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1751 reg = <0 0xec500000 0 !! 1757 reg = <0 0xec500000 0 0x1000>, /* SCU */
1752 <0 0xec5a0000 0 !! 1758 <0 0xec5a0000 0 0x100>, /* ADG */
1753 <0 0xec540000 0 !! 1759 <0 0xec540000 0 0x1000>, /* SSIU */
1754 <0 0xec541000 0 !! 1760 <0 0xec541000 0 0x280>, /* SSI */
1755 <0 0xec760000 0 !! 1761 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1756 reg-names = "scu", "a 1762 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1757 1763
1758 clocks = <&cpg CPG_MO 1764 clocks = <&cpg CPG_MOD 1005>,
1759 <&cpg CPG_MO 1765 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1760 <&cpg CPG_MO 1766 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1761 <&cpg CPG_MO 1767 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1762 <&cpg CPG_MO 1768 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1763 <&cpg CPG_MO 1769 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1764 <&cpg CPG_MO 1770 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1765 <&cpg CPG_MO 1771 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1766 <&cpg CPG_MO 1772 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1767 <&cpg CPG_MO 1773 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1768 <&cpg CPG_MO 1774 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1769 <&cpg CPG_MO 1775 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1770 <&cpg CPG_MO 1776 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1771 <&cpg CPG_MO 1777 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1772 <&audio_clk_ 1778 <&audio_clk_a>, <&audio_clk_b>,
1773 <&audio_clk_ 1779 <&audio_clk_c>,
1774 <&cpg CPG_MO !! 1780 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1775 clock-names = "ssi-al 1781 clock-names = "ssi-all",
1776 "ssi.9" 1782 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1777 "ssi.5" 1783 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1778 "ssi.1" 1784 "ssi.1", "ssi.0",
1779 "src.9" 1785 "src.9", "src.8", "src.7", "src.6",
1780 "src.5" 1786 "src.5", "src.4", "src.3", "src.2",
1781 "src.1" 1787 "src.1", "src.0",
1782 "mix.1" 1788 "mix.1", "mix.0",
1783 "ctu.1" 1789 "ctu.1", "ctu.0",
1784 "dvc.0" 1790 "dvc.0", "dvc.1",
1785 "clk_a" 1791 "clk_a", "clk_b", "clk_c", "clk_i";
1786 power-domains = <&sys 1792 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1787 resets = <&cpg 1005>, 1793 resets = <&cpg 1005>,
1788 <&cpg 1006>, 1794 <&cpg 1006>, <&cpg 1007>,
1789 <&cpg 1008>, 1795 <&cpg 1008>, <&cpg 1009>,
1790 <&cpg 1010>, 1796 <&cpg 1010>, <&cpg 1011>,
1791 <&cpg 1012>, 1797 <&cpg 1012>, <&cpg 1013>,
1792 <&cpg 1014>, 1798 <&cpg 1014>, <&cpg 1015>;
1793 reset-names = "ssi-al 1799 reset-names = "ssi-all",
1794 "ssi.9" 1800 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1795 "ssi.5" 1801 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1796 "ssi.1" 1802 "ssi.1", "ssi.0";
1797 status = "disabled"; 1803 status = "disabled";
1798 1804
1799 rcar_sound,dvc { 1805 rcar_sound,dvc {
1800 dvc0: dvc-0 { 1806 dvc0: dvc-0 {
1801 dmas 1807 dmas = <&audma1 0xbc>;
1802 dma-n 1808 dma-names = "tx";
1803 }; 1809 };
1804 dvc1: dvc-1 { 1810 dvc1: dvc-1 {
1805 dmas 1811 dmas = <&audma1 0xbe>;
1806 dma-n 1812 dma-names = "tx";
1807 }; 1813 };
1808 }; 1814 };
1809 1815
1810 rcar_sound,mix { 1816 rcar_sound,mix {
1811 mix0: mix-0 { 1817 mix0: mix-0 { };
1812 mix1: mix-1 { 1818 mix1: mix-1 { };
1813 }; 1819 };
1814 1820
1815 rcar_sound,ctu { 1821 rcar_sound,ctu {
1816 ctu00: ctu-0 1822 ctu00: ctu-0 { };
1817 ctu01: ctu-1 1823 ctu01: ctu-1 { };
1818 ctu02: ctu-2 1824 ctu02: ctu-2 { };
1819 ctu03: ctu-3 1825 ctu03: ctu-3 { };
1820 ctu10: ctu-4 1826 ctu10: ctu-4 { };
1821 ctu11: ctu-5 1827 ctu11: ctu-5 { };
1822 ctu12: ctu-6 1828 ctu12: ctu-6 { };
1823 ctu13: ctu-7 1829 ctu13: ctu-7 { };
1824 }; 1830 };
1825 1831
1826 rcar_sound,src { 1832 rcar_sound,src {
1827 src0: src-0 { 1833 src0: src-0 {
1828 inter 1834 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas 1835 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1830 dma-n 1836 dma-names = "rx", "tx";
1831 }; 1837 };
1832 src1: src-1 { 1838 src1: src-1 {
1833 inter 1839 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas 1840 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1835 dma-n 1841 dma-names = "rx", "tx";
1836 }; 1842 };
1837 src2: src-2 { 1843 src2: src-2 {
1838 inter 1844 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas 1845 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1840 dma-n 1846 dma-names = "rx", "tx";
1841 }; 1847 };
1842 src3: src-3 { 1848 src3: src-3 {
1843 inter 1849 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas 1850 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1845 dma-n 1851 dma-names = "rx", "tx";
1846 }; 1852 };
1847 src4: src-4 { 1853 src4: src-4 {
1848 inter 1854 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas 1855 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1850 dma-n 1856 dma-names = "rx", "tx";
1851 }; 1857 };
1852 src5: src-5 { 1858 src5: src-5 {
1853 inter 1859 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas 1860 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1855 dma-n 1861 dma-names = "rx", "tx";
1856 }; 1862 };
1857 src6: src-6 { 1863 src6: src-6 {
1858 inter 1864 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas 1865 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1860 dma-n 1866 dma-names = "rx", "tx";
1861 }; 1867 };
1862 src7: src-7 { 1868 src7: src-7 {
1863 inter 1869 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1864 dmas 1870 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1865 dma-n 1871 dma-names = "rx", "tx";
1866 }; 1872 };
1867 src8: src-8 { 1873 src8: src-8 {
1868 inter 1874 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1869 dmas 1875 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1870 dma-n 1876 dma-names = "rx", "tx";
1871 }; 1877 };
1872 src9: src-9 { 1878 src9: src-9 {
1873 inter 1879 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1874 dmas 1880 dmas = <&audma0 0x97>, <&audma1 0xba>;
1875 dma-n 1881 dma-names = "rx", "tx";
1876 }; 1882 };
1877 }; 1883 };
1878 1884
1879 rcar_sound,ssiu { 1885 rcar_sound,ssiu {
1880 ssiu00: ssiu- 1886 ssiu00: ssiu-0 {
1881 dmas 1887 dmas = <&audma0 0x15>, <&audma1 0x16>;
1882 dma-n 1888 dma-names = "rx", "tx";
1883 }; 1889 };
1884 ssiu01: ssiu- 1890 ssiu01: ssiu-1 {
1885 dmas 1891 dmas = <&audma0 0x35>, <&audma1 0x36>;
1886 dma-n 1892 dma-names = "rx", "tx";
1887 }; 1893 };
1888 ssiu02: ssiu- 1894 ssiu02: ssiu-2 {
1889 dmas 1895 dmas = <&audma0 0x37>, <&audma1 0x38>;
1890 dma-n 1896 dma-names = "rx", "tx";
1891 }; 1897 };
1892 ssiu03: ssiu- 1898 ssiu03: ssiu-3 {
1893 dmas 1899 dmas = <&audma0 0x47>, <&audma1 0x48>;
1894 dma-n 1900 dma-names = "rx", "tx";
1895 }; 1901 };
1896 ssiu04: ssiu- 1902 ssiu04: ssiu-4 {
1897 dmas 1903 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1898 dma-n 1904 dma-names = "rx", "tx";
1899 }; 1905 };
1900 ssiu05: ssiu- 1906 ssiu05: ssiu-5 {
1901 dmas 1907 dmas = <&audma0 0x43>, <&audma1 0x44>;
1902 dma-n 1908 dma-names = "rx", "tx";
1903 }; 1909 };
1904 ssiu06: ssiu- 1910 ssiu06: ssiu-6 {
1905 dmas 1911 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1906 dma-n 1912 dma-names = "rx", "tx";
1907 }; 1913 };
1908 ssiu07: ssiu- 1914 ssiu07: ssiu-7 {
1909 dmas 1915 dmas = <&audma0 0x53>, <&audma1 0x54>;
1910 dma-n 1916 dma-names = "rx", "tx";
1911 }; 1917 };
1912 ssiu10: ssiu- 1918 ssiu10: ssiu-8 {
1913 dmas 1919 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1914 dma-n 1920 dma-names = "rx", "tx";
1915 }; 1921 };
1916 ssiu11: ssiu- 1922 ssiu11: ssiu-9 {
1917 dmas 1923 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1918 dma-n 1924 dma-names = "rx", "tx";
1919 }; 1925 };
1920 ssiu12: ssiu- 1926 ssiu12: ssiu-10 {
1921 dmas 1927 dmas = <&audma0 0x57>, <&audma1 0x58>;
1922 dma-n 1928 dma-names = "rx", "tx";
1923 }; 1929 };
1924 ssiu13: ssiu- 1930 ssiu13: ssiu-11 {
1925 dmas 1931 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1926 dma-n 1932 dma-names = "rx", "tx";
1927 }; 1933 };
1928 ssiu14: ssiu- 1934 ssiu14: ssiu-12 {
1929 dmas 1935 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1930 dma-n 1936 dma-names = "rx", "tx";
1931 }; 1937 };
1932 ssiu15: ssiu- 1938 ssiu15: ssiu-13 {
1933 dmas 1939 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1934 dma-n 1940 dma-names = "rx", "tx";
1935 }; 1941 };
1936 ssiu16: ssiu- 1942 ssiu16: ssiu-14 {
1937 dmas 1943 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1938 dma-n 1944 dma-names = "rx", "tx";
1939 }; 1945 };
1940 ssiu17: ssiu- 1946 ssiu17: ssiu-15 {
1941 dmas 1947 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1942 dma-n 1948 dma-names = "rx", "tx";
1943 }; 1949 };
1944 ssiu20: ssiu- 1950 ssiu20: ssiu-16 {
1945 dmas 1951 dmas = <&audma0 0x63>, <&audma1 0x64>;
1946 dma-n 1952 dma-names = "rx", "tx";
1947 }; 1953 };
1948 ssiu21: ssiu- 1954 ssiu21: ssiu-17 {
1949 dmas 1955 dmas = <&audma0 0x67>, <&audma1 0x68>;
1950 dma-n 1956 dma-names = "rx", "tx";
1951 }; 1957 };
1952 ssiu22: ssiu- 1958 ssiu22: ssiu-18 {
1953 dmas 1959 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1954 dma-n 1960 dma-names = "rx", "tx";
1955 }; 1961 };
1956 ssiu23: ssiu- 1962 ssiu23: ssiu-19 {
1957 dmas 1963 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1958 dma-n 1964 dma-names = "rx", "tx";
1959 }; 1965 };
1960 ssiu24: ssiu- 1966 ssiu24: ssiu-20 {
1961 dmas 1967 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1962 dma-n 1968 dma-names = "rx", "tx";
1963 }; 1969 };
1964 ssiu25: ssiu- 1970 ssiu25: ssiu-21 {
1965 dmas 1971 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1966 dma-n 1972 dma-names = "rx", "tx";
1967 }; 1973 };
1968 ssiu26: ssiu- 1974 ssiu26: ssiu-22 {
1969 dmas 1975 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1970 dma-n 1976 dma-names = "rx", "tx";
1971 }; 1977 };
1972 ssiu27: ssiu- 1978 ssiu27: ssiu-23 {
1973 dmas 1979 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1974 dma-n 1980 dma-names = "rx", "tx";
1975 }; 1981 };
1976 ssiu30: ssiu- 1982 ssiu30: ssiu-24 {
1977 dmas 1983 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1978 dma-n 1984 dma-names = "rx", "tx";
1979 }; 1985 };
1980 ssiu31: ssiu- 1986 ssiu31: ssiu-25 {
1981 dmas 1987 dmas = <&audma0 0x21>, <&audma1 0x22>;
1982 dma-n 1988 dma-names = "rx", "tx";
1983 }; 1989 };
1984 ssiu32: ssiu- 1990 ssiu32: ssiu-26 {
1985 dmas 1991 dmas = <&audma0 0x23>, <&audma1 0x24>;
1986 dma-n 1992 dma-names = "rx", "tx";
1987 }; 1993 };
1988 ssiu33: ssiu- 1994 ssiu33: ssiu-27 {
1989 dmas 1995 dmas = <&audma0 0x25>, <&audma1 0x26>;
1990 dma-n 1996 dma-names = "rx", "tx";
1991 }; 1997 };
1992 ssiu34: ssiu- 1998 ssiu34: ssiu-28 {
1993 dmas 1999 dmas = <&audma0 0x27>, <&audma1 0x28>;
1994 dma-n 2000 dma-names = "rx", "tx";
1995 }; 2001 };
1996 ssiu35: ssiu- 2002 ssiu35: ssiu-29 {
1997 dmas 2003 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1998 dma-n 2004 dma-names = "rx", "tx";
1999 }; 2005 };
2000 ssiu36: ssiu- 2006 ssiu36: ssiu-30 {
2001 dmas 2007 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2002 dma-n 2008 dma-names = "rx", "tx";
2003 }; 2009 };
2004 ssiu37: ssiu- 2010 ssiu37: ssiu-31 {
2005 dmas 2011 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2006 dma-n 2012 dma-names = "rx", "tx";
2007 }; 2013 };
2008 ssiu40: ssiu- 2014 ssiu40: ssiu-32 {
2009 dmas !! 2015 dmas = <&audma0 0x71>, <&audma1 0x72>;
2010 dma-n 2016 dma-names = "rx", "tx";
2011 }; 2017 };
2012 ssiu41: ssiu- 2018 ssiu41: ssiu-33 {
2013 dmas 2019 dmas = <&audma0 0x17>, <&audma1 0x18>;
2014 dma-n 2020 dma-names = "rx", "tx";
2015 }; 2021 };
2016 ssiu42: ssiu- 2022 ssiu42: ssiu-34 {
2017 dmas 2023 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2018 dma-n 2024 dma-names = "rx", "tx";
2019 }; 2025 };
2020 ssiu43: ssiu- 2026 ssiu43: ssiu-35 {
2021 dmas 2027 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2022 dma-n 2028 dma-names = "rx", "tx";
2023 }; 2029 };
2024 ssiu44: ssiu- 2030 ssiu44: ssiu-36 {
2025 dmas 2031 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2026 dma-n 2032 dma-names = "rx", "tx";
2027 }; 2033 };
2028 ssiu45: ssiu- 2034 ssiu45: ssiu-37 {
2029 dmas 2035 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2030 dma-n 2036 dma-names = "rx", "tx";
2031 }; 2037 };
2032 ssiu46: ssiu- 2038 ssiu46: ssiu-38 {
2033 dmas 2039 dmas = <&audma0 0x31>, <&audma1 0x32>;
2034 dma-n 2040 dma-names = "rx", "tx";
2035 }; 2041 };
2036 ssiu47: ssiu- 2042 ssiu47: ssiu-39 {
2037 dmas 2043 dmas = <&audma0 0x33>, <&audma1 0x34>;
2038 dma-n 2044 dma-names = "rx", "tx";
2039 }; 2045 };
2040 ssiu50: ssiu- 2046 ssiu50: ssiu-40 {
2041 dmas 2047 dmas = <&audma0 0x73>, <&audma1 0x74>;
2042 dma-n 2048 dma-names = "rx", "tx";
2043 }; 2049 };
2044 ssiu60: ssiu- 2050 ssiu60: ssiu-41 {
2045 dmas 2051 dmas = <&audma0 0x75>, <&audma1 0x76>;
2046 dma-n 2052 dma-names = "rx", "tx";
2047 }; 2053 };
2048 ssiu70: ssiu- 2054 ssiu70: ssiu-42 {
2049 dmas 2055 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2050 dma-n 2056 dma-names = "rx", "tx";
2051 }; 2057 };
2052 ssiu80: ssiu- 2058 ssiu80: ssiu-43 {
2053 dmas 2059 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2054 dma-n 2060 dma-names = "rx", "tx";
2055 }; 2061 };
2056 ssiu90: ssiu- 2062 ssiu90: ssiu-44 {
2057 dmas 2063 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2058 dma-n 2064 dma-names = "rx", "tx";
2059 }; 2065 };
2060 ssiu91: ssiu- 2066 ssiu91: ssiu-45 {
2061 dmas 2067 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2062 dma-n 2068 dma-names = "rx", "tx";
2063 }; 2069 };
2064 ssiu92: ssiu- 2070 ssiu92: ssiu-46 {
2065 dmas 2071 dmas = <&audma0 0x81>, <&audma1 0x82>;
2066 dma-n 2072 dma-names = "rx", "tx";
2067 }; 2073 };
2068 ssiu93: ssiu- 2074 ssiu93: ssiu-47 {
2069 dmas 2075 dmas = <&audma0 0x83>, <&audma1 0x84>;
2070 dma-n 2076 dma-names = "rx", "tx";
2071 }; 2077 };
2072 ssiu94: ssiu- 2078 ssiu94: ssiu-48 {
2073 dmas 2079 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2074 dma-n 2080 dma-names = "rx", "tx";
2075 }; 2081 };
2076 ssiu95: ssiu- 2082 ssiu95: ssiu-49 {
2077 dmas 2083 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2078 dma-n 2084 dma-names = "rx", "tx";
2079 }; 2085 };
2080 ssiu96: ssiu- 2086 ssiu96: ssiu-50 {
2081 dmas 2087 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2082 dma-n 2088 dma-names = "rx", "tx";
2083 }; 2089 };
2084 ssiu97: ssiu- 2090 ssiu97: ssiu-51 {
2085 dmas 2091 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2086 dma-n 2092 dma-names = "rx", "tx";
2087 }; 2093 };
2088 }; 2094 };
2089 2095
2090 rcar_sound,ssi { 2096 rcar_sound,ssi {
2091 ssi0: ssi-0 { 2097 ssi0: ssi-0 {
2092 inter 2098 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2093 dmas 2099 dmas = <&audma0 0x01>, <&audma1 0x02>;
2094 dma-n 2100 dma-names = "rx", "tx";
2095 }; 2101 };
2096 ssi1: ssi-1 { 2102 ssi1: ssi-1 {
2097 inter 2103 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2098 dmas 2104 dmas = <&audma0 0x03>, <&audma1 0x04>;
2099 dma-n 2105 dma-names = "rx", "tx";
2100 }; 2106 };
2101 ssi2: ssi-2 { 2107 ssi2: ssi-2 {
2102 inter 2108 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2103 dmas 2109 dmas = <&audma0 0x05>, <&audma1 0x06>;
2104 dma-n 2110 dma-names = "rx", "tx";
2105 }; 2111 };
2106 ssi3: ssi-3 { 2112 ssi3: ssi-3 {
2107 inter 2113 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2108 dmas 2114 dmas = <&audma0 0x07>, <&audma1 0x08>;
2109 dma-n 2115 dma-names = "rx", "tx";
2110 }; 2116 };
2111 ssi4: ssi-4 { 2117 ssi4: ssi-4 {
2112 inter 2118 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2113 dmas 2119 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2114 dma-n 2120 dma-names = "rx", "tx";
2115 }; 2121 };
2116 ssi5: ssi-5 { 2122 ssi5: ssi-5 {
2117 inter 2123 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2118 dmas 2124 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2119 dma-n 2125 dma-names = "rx", "tx";
2120 }; 2126 };
2121 ssi6: ssi-6 { 2127 ssi6: ssi-6 {
2122 inter 2128 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2123 dmas 2129 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2124 dma-n 2130 dma-names = "rx", "tx";
2125 }; 2131 };
2126 ssi7: ssi-7 { 2132 ssi7: ssi-7 {
2127 inter 2133 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2128 dmas 2134 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2129 dma-n 2135 dma-names = "rx", "tx";
2130 }; 2136 };
2131 ssi8: ssi-8 { 2137 ssi8: ssi-8 {
2132 inter 2138 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2133 dmas 2139 dmas = <&audma0 0x11>, <&audma1 0x12>;
2134 dma-n 2140 dma-names = "rx", "tx";
2135 }; 2141 };
2136 ssi9: ssi-9 { 2142 ssi9: ssi-9 {
2137 inter 2143 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2138 dmas 2144 dmas = <&audma0 0x13>, <&audma1 0x14>;
2139 dma-n 2145 dma-names = "rx", "tx";
2140 }; 2146 };
2141 }; 2147 };
2142 }; 2148 };
2143 2149
2144 mlp: mlp@ec520000 { <<
2145 compatible = "renesas <<
2146 "renesas <<
2147 reg = <0 0xec520000 0 <<
2148 interrupts = <GIC_SPI <<
2149 <GIC_SPI 385 <<
2150 clocks = <&cpg CPG_MO <<
2151 power-domains = <&sys <<
2152 resets = <&cpg 802>; <<
2153 status = "disabled"; <<
2154 }; <<
2155 <<
2156 audma0: dma-controller@ec7000 2150 audma0: dma-controller@ec700000 {
2157 compatible = "renesas 2151 compatible = "renesas,dmac-r8a77965",
2158 "renesas 2152 "renesas,rcar-dmac";
2159 reg = <0 0xec700000 0 2153 reg = <0 0xec700000 0 0x10000>;
2160 interrupts = <GIC_SPI 2154 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2161 <GIC_SPI 2155 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2162 <GIC_SPI 2156 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2163 <GIC_SPI 2157 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2164 <GIC_SPI 2158 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2165 <GIC_SPI 2159 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2166 <GIC_SPI 2160 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2167 <GIC_SPI 2161 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2168 <GIC_SPI 2162 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2169 <GIC_SPI 2163 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2170 <GIC_SPI 2164 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2171 <GIC_SPI 2165 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2172 <GIC_SPI 2166 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2173 <GIC_SPI 2167 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2174 <GIC_SPI 2168 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2175 <GIC_SPI 2169 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2176 <GIC_SPI 2170 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2177 interrupt-names = "er 2171 interrupt-names = "error",
2178 "ch0" 2172 "ch0", "ch1", "ch2", "ch3",
2179 "ch4" 2173 "ch4", "ch5", "ch6", "ch7",
2180 "ch8" 2174 "ch8", "ch9", "ch10", "ch11",
2181 "ch12 2175 "ch12", "ch13", "ch14", "ch15";
2182 clocks = <&cpg CPG_MO 2176 clocks = <&cpg CPG_MOD 502>;
2183 clock-names = "fck"; 2177 clock-names = "fck";
2184 power-domains = <&sys 2178 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2185 resets = <&cpg 502>; 2179 resets = <&cpg 502>;
2186 #dma-cells = <1>; 2180 #dma-cells = <1>;
2187 dma-channels = <16>; 2181 dma-channels = <16>;
2188 iommus = <&ipmmu_mp 0 <<
2189 <&ipmmu_mp 2 <<
2190 <&ipmmu_mp 4 <<
2191 <&ipmmu_mp 6 <<
2192 <&ipmmu_mp 8 <<
2193 <&ipmmu_mp 1 <<
2194 <&ipmmu_mp 1 <<
2195 <&ipmmu_mp 1 <<
2196 }; 2182 };
2197 2183
2198 audma1: dma-controller@ec7200 2184 audma1: dma-controller@ec720000 {
2199 compatible = "renesas 2185 compatible = "renesas,dmac-r8a77965",
2200 "renesas 2186 "renesas,rcar-dmac";
2201 reg = <0 0xec720000 0 2187 reg = <0 0xec720000 0 0x10000>;
2202 interrupts = <GIC_SPI 2188 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 2189 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2204 <GIC_SPI 2190 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2205 <GIC_SPI 2191 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2206 <GIC_SPI 2192 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2207 <GIC_SPI 2193 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2208 <GIC_SPI 2194 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2209 <GIC_SPI 2195 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2210 <GIC_SPI 2196 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2211 <GIC_SPI 2197 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2212 <GIC_SPI 2198 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2213 <GIC_SPI 2199 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2214 <GIC_SPI 2200 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2215 <GIC_SPI 2201 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2216 <GIC_SPI 2202 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2217 <GIC_SPI 2203 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2218 <GIC_SPI 2204 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2219 interrupt-names = "er 2205 interrupt-names = "error",
2220 "ch0" 2206 "ch0", "ch1", "ch2", "ch3",
2221 "ch4" 2207 "ch4", "ch5", "ch6", "ch7",
2222 "ch8" 2208 "ch8", "ch9", "ch10", "ch11",
2223 "ch12 2209 "ch12", "ch13", "ch14", "ch15";
2224 clocks = <&cpg CPG_MO 2210 clocks = <&cpg CPG_MOD 501>;
2225 clock-names = "fck"; 2211 clock-names = "fck";
2226 power-domains = <&sys 2212 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2227 resets = <&cpg 501>; 2213 resets = <&cpg 501>;
2228 #dma-cells = <1>; 2214 #dma-cells = <1>;
2229 dma-channels = <16>; 2215 dma-channels = <16>;
2230 iommus = <&ipmmu_mp 1 <<
2231 <&ipmmu_mp 1 <<
2232 <&ipmmu_mp 2 <<
2233 <&ipmmu_mp 2 <<
2234 <&ipmmu_mp 2 <<
2235 <&ipmmu_mp 2 <<
2236 <&ipmmu_mp 2 <<
2237 <&ipmmu_mp 3 <<
2238 }; 2216 };
2239 2217
2240 xhci0: usb@ee000000 { 2218 xhci0: usb@ee000000 {
2241 compatible = "renesas 2219 compatible = "renesas,xhci-r8a77965",
2242 "renesas 2220 "renesas,rcar-gen3-xhci";
2243 reg = <0 0xee000000 0 2221 reg = <0 0xee000000 0 0xc00>;
2244 interrupts = <GIC_SPI 2222 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2245 clocks = <&cpg CPG_MO 2223 clocks = <&cpg CPG_MOD 328>;
2246 power-domains = <&sys 2224 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2247 resets = <&cpg 328>; 2225 resets = <&cpg 328>;
2248 status = "disabled"; 2226 status = "disabled";
2249 }; 2227 };
2250 2228
2251 usb3_peri0: usb@ee020000 { 2229 usb3_peri0: usb@ee020000 {
2252 compatible = "renesas 2230 compatible = "renesas,r8a77965-usb3-peri",
2253 "renesas 2231 "renesas,rcar-gen3-usb3-peri";
2254 reg = <0 0xee020000 0 2232 reg = <0 0xee020000 0 0x400>;
2255 interrupts = <GIC_SPI 2233 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2256 clocks = <&cpg CPG_MO 2234 clocks = <&cpg CPG_MOD 328>;
2257 power-domains = <&sys 2235 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2258 resets = <&cpg 328>; 2236 resets = <&cpg 328>;
2259 status = "disabled"; 2237 status = "disabled";
2260 }; 2238 };
2261 2239
2262 ohci0: usb@ee080000 { 2240 ohci0: usb@ee080000 {
2263 compatible = "generic 2241 compatible = "generic-ohci";
2264 reg = <0 0xee080000 0 2242 reg = <0 0xee080000 0 0x100>;
2265 interrupts = <GIC_SPI 2243 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2266 clocks = <&cpg CPG_MO 2244 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2267 phys = <&usb2_phy0 1> 2245 phys = <&usb2_phy0 1>;
2268 phy-names = "usb"; 2246 phy-names = "usb";
2269 power-domains = <&sys 2247 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2270 resets = <&cpg 703>, 2248 resets = <&cpg 703>, <&cpg 704>;
2271 status = "disabled"; 2249 status = "disabled";
2272 }; 2250 };
2273 2251
2274 ohci1: usb@ee0a0000 { 2252 ohci1: usb@ee0a0000 {
2275 compatible = "generic 2253 compatible = "generic-ohci";
2276 reg = <0 0xee0a0000 0 2254 reg = <0 0xee0a0000 0 0x100>;
2277 interrupts = <GIC_SPI 2255 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2278 clocks = <&cpg CPG_MO 2256 clocks = <&cpg CPG_MOD 702>;
2279 phys = <&usb2_phy1 1> 2257 phys = <&usb2_phy1 1>;
2280 phy-names = "usb"; 2258 phy-names = "usb";
2281 power-domains = <&sys 2259 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2282 resets = <&cpg 702>; 2260 resets = <&cpg 702>;
2283 status = "disabled"; 2261 status = "disabled";
2284 }; 2262 };
2285 2263
2286 ehci0: usb@ee080100 { 2264 ehci0: usb@ee080100 {
2287 compatible = "generic 2265 compatible = "generic-ehci";
2288 reg = <0 0xee080100 0 2266 reg = <0 0xee080100 0 0x100>;
2289 interrupts = <GIC_SPI 2267 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2290 clocks = <&cpg CPG_MO 2268 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2291 phys = <&usb2_phy0 2> 2269 phys = <&usb2_phy0 2>;
2292 phy-names = "usb"; 2270 phy-names = "usb";
2293 companion = <&ohci0>; 2271 companion = <&ohci0>;
2294 power-domains = <&sys 2272 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2295 resets = <&cpg 703>, 2273 resets = <&cpg 703>, <&cpg 704>;
2296 status = "disabled"; 2274 status = "disabled";
2297 }; 2275 };
2298 2276
2299 ehci1: usb@ee0a0100 { 2277 ehci1: usb@ee0a0100 {
2300 compatible = "generic 2278 compatible = "generic-ehci";
2301 reg = <0 0xee0a0100 0 2279 reg = <0 0xee0a0100 0 0x100>;
2302 interrupts = <GIC_SPI 2280 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2303 clocks = <&cpg CPG_MO 2281 clocks = <&cpg CPG_MOD 702>;
2304 phys = <&usb2_phy1 2> 2282 phys = <&usb2_phy1 2>;
2305 phy-names = "usb"; 2283 phy-names = "usb";
2306 companion = <&ohci1>; 2284 companion = <&ohci1>;
2307 power-domains = <&sys 2285 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2308 resets = <&cpg 702>; 2286 resets = <&cpg 702>;
2309 status = "disabled"; 2287 status = "disabled";
2310 }; 2288 };
2311 2289
2312 usb2_phy0: usb-phy@ee080200 { 2290 usb2_phy0: usb-phy@ee080200 {
2313 compatible = "renesas 2291 compatible = "renesas,usb2-phy-r8a77965",
2314 "renesas 2292 "renesas,rcar-gen3-usb2-phy";
2315 reg = <0 0xee080200 0 2293 reg = <0 0xee080200 0 0x700>;
2316 interrupts = <GIC_SPI 2294 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MO 2295 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2318 power-domains = <&sys 2296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2319 resets = <&cpg 703>, 2297 resets = <&cpg 703>, <&cpg 704>;
2320 #phy-cells = <1>; 2298 #phy-cells = <1>;
2321 status = "disabled"; 2299 status = "disabled";
2322 }; 2300 };
2323 2301
2324 usb2_phy1: usb-phy@ee0a0200 { 2302 usb2_phy1: usb-phy@ee0a0200 {
2325 compatible = "renesas 2303 compatible = "renesas,usb2-phy-r8a77965",
2326 "renesas 2304 "renesas,rcar-gen3-usb2-phy";
2327 reg = <0 0xee0a0200 0 2305 reg = <0 0xee0a0200 0 0x700>;
2328 clocks = <&cpg CPG_MO 2306 clocks = <&cpg CPG_MOD 702>;
2329 power-domains = <&sys 2307 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2330 resets = <&cpg 702>; 2308 resets = <&cpg 702>;
2331 #phy-cells = <1>; 2309 #phy-cells = <1>;
2332 status = "disabled"; 2310 status = "disabled";
2333 }; 2311 };
2334 2312
2335 sdhi0: mmc@ee100000 { 2313 sdhi0: mmc@ee100000 {
2336 compatible = "renesas 2314 compatible = "renesas,sdhi-r8a77965",
2337 "renesas 2315 "renesas,rcar-gen3-sdhi";
2338 reg = <0 0xee100000 0 2316 reg = <0 0xee100000 0 0x2000>;
2339 interrupts = <GIC_SPI 2317 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2340 clocks = <&cpg CPG_MO !! 2318 clocks = <&cpg CPG_MOD 314>;
2341 clock-names = "core", <<
2342 max-frequency = <2000 2319 max-frequency = <200000000>;
2343 power-domains = <&sys 2320 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2344 resets = <&cpg 314>; 2321 resets = <&cpg 314>;
2345 iommus = <&ipmmu_ds1 2322 iommus = <&ipmmu_ds1 32>;
2346 status = "disabled"; 2323 status = "disabled";
2347 }; 2324 };
2348 2325
2349 sdhi1: mmc@ee120000 { 2326 sdhi1: mmc@ee120000 {
2350 compatible = "renesas 2327 compatible = "renesas,sdhi-r8a77965",
2351 "renesas 2328 "renesas,rcar-gen3-sdhi";
2352 reg = <0 0xee120000 0 2329 reg = <0 0xee120000 0 0x2000>;
2353 interrupts = <GIC_SPI 2330 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MO !! 2331 clocks = <&cpg CPG_MOD 313>;
2355 clock-names = "core", <<
2356 max-frequency = <2000 2332 max-frequency = <200000000>;
2357 power-domains = <&sys 2333 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2358 resets = <&cpg 313>; 2334 resets = <&cpg 313>;
2359 iommus = <&ipmmu_ds1 2335 iommus = <&ipmmu_ds1 33>;
2360 status = "disabled"; 2336 status = "disabled";
2361 }; 2337 };
2362 2338
2363 sdhi2: mmc@ee140000 { 2339 sdhi2: mmc@ee140000 {
2364 compatible = "renesas 2340 compatible = "renesas,sdhi-r8a77965",
2365 "renesas 2341 "renesas,rcar-gen3-sdhi";
2366 reg = <0 0xee140000 0 2342 reg = <0 0xee140000 0 0x2000>;
2367 interrupts = <GIC_SPI 2343 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2368 clocks = <&cpg CPG_MO !! 2344 clocks = <&cpg CPG_MOD 312>;
2369 clock-names = "core", <<
2370 max-frequency = <2000 2345 max-frequency = <200000000>;
2371 power-domains = <&sys 2346 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2372 resets = <&cpg 312>; 2347 resets = <&cpg 312>;
2373 iommus = <&ipmmu_ds1 2348 iommus = <&ipmmu_ds1 34>;
2374 status = "disabled"; 2349 status = "disabled";
2375 }; 2350 };
2376 2351
2377 sdhi3: mmc@ee160000 { 2352 sdhi3: mmc@ee160000 {
2378 compatible = "renesas 2353 compatible = "renesas,sdhi-r8a77965",
2379 "renesas 2354 "renesas,rcar-gen3-sdhi";
2380 reg = <0 0xee160000 0 2355 reg = <0 0xee160000 0 0x2000>;
2381 interrupts = <GIC_SPI 2356 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2382 clocks = <&cpg CPG_MO !! 2357 clocks = <&cpg CPG_MOD 311>;
2383 clock-names = "core", <<
2384 max-frequency = <2000 2358 max-frequency = <200000000>;
2385 power-domains = <&sys 2359 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2386 resets = <&cpg 311>; 2360 resets = <&cpg 311>;
2387 iommus = <&ipmmu_ds1 2361 iommus = <&ipmmu_ds1 35>;
2388 status = "disabled"; 2362 status = "disabled";
2389 }; 2363 };
2390 2364
2391 rpc: spi@ee200000 { <<
2392 compatible = "renesas <<
2393 "renesas <<
2394 reg = <0 0xee200000 0 <<
2395 <0 0x08000000 0 <<
2396 <0 0xee208000 0 <<
2397 reg-names = "regs", " <<
2398 interrupts = <GIC_SPI <<
2399 clocks = <&cpg CPG_MO <<
2400 power-domains = <&sys <<
2401 resets = <&cpg 917>; <<
2402 #address-cells = <1>; <<
2403 #size-cells = <0>; <<
2404 status = "disabled"; <<
2405 }; <<
2406 <<
2407 sata: sata@ee300000 { 2365 sata: sata@ee300000 {
2408 compatible = "renesas 2366 compatible = "renesas,sata-r8a77965",
2409 "renesas 2367 "renesas,rcar-gen3-sata";
2410 reg = <0 0xee300000 0 2368 reg = <0 0xee300000 0 0x200000>;
2411 interrupts = <GIC_SPI 2369 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2412 clocks = <&cpg CPG_MO 2370 clocks = <&cpg CPG_MOD 815>;
2413 power-domains = <&sys 2371 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2414 resets = <&cpg 815>; 2372 resets = <&cpg 815>;
2415 iommus = <&ipmmu_hc 2 <<
2416 status = "disabled"; 2373 status = "disabled";
2417 }; 2374 };
2418 2375
2419 gic: interrupt-controller@f10 2376 gic: interrupt-controller@f1010000 {
2420 compatible = "arm,gic 2377 compatible = "arm,gic-400";
2421 #interrupt-cells = <3 2378 #interrupt-cells = <3>;
2422 #address-cells = <0>; 2379 #address-cells = <0>;
2423 interrupt-controller; 2380 interrupt-controller;
2424 reg = <0x0 0xf1010000 2381 reg = <0x0 0xf1010000 0 0x1000>,
2425 <0x0 0xf1020000 2382 <0x0 0xf1020000 0 0x20000>,
2426 <0x0 0xf1040000 2383 <0x0 0xf1040000 0 0x20000>,
2427 <0x0 0xf1060000 2384 <0x0 0xf1060000 0 0x20000>;
2428 interrupts = <GIC_PPI 2385 interrupts = <GIC_PPI 9
2429 (GIC_ 2386 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2430 clocks = <&cpg CPG_MO 2387 clocks = <&cpg CPG_MOD 408>;
2431 clock-names = "clk"; 2388 clock-names = "clk";
2432 power-domains = <&sys 2389 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2433 resets = <&cpg 408>; 2390 resets = <&cpg 408>;
2434 }; 2391 };
2435 2392
2436 pciec0: pcie@fe000000 { 2393 pciec0: pcie@fe000000 {
2437 compatible = "renesas 2394 compatible = "renesas,pcie-r8a77965",
2438 "renesas 2395 "renesas,pcie-rcar-gen3";
2439 reg = <0 0xfe000000 0 2396 reg = <0 0xfe000000 0 0x80000>;
2440 #address-cells = <3>; 2397 #address-cells = <3>;
2441 #size-cells = <2>; 2398 #size-cells = <2>;
2442 bus-range = <0x00 0xf 2399 bus-range = <0x00 0xff>;
2443 device_type = "pci"; 2400 device_type = "pci";
2444 ranges = <0x01000000 2401 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2445 <0x02000000 2402 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2446 <0x02000000 2403 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2447 <0x42000000 2404 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2448 /* Map all possible D !! 2405 /* Map all possible DDR as inbound ranges */
2449 dma-ranges = <0x42000 !! 2406 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2450 interrupts = <GIC_SPI 2407 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 117 2408 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2452 <GIC_SPI 118 2409 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2453 #interrupt-cells = <1 2410 #interrupt-cells = <1>;
2454 interrupt-map-mask = 2411 interrupt-map-mask = <0 0 0 0>;
2455 interrupt-map = <0 0 2412 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2456 clocks = <&cpg CPG_MO 2413 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2457 clock-names = "pcie", 2414 clock-names = "pcie", "pcie_bus";
2458 power-domains = <&sys 2415 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2459 resets = <&cpg 319>; 2416 resets = <&cpg 319>;
2460 iommu-map = <0 &ipmmu <<
2461 iommu-map-mask = <0>; <<
2462 status = "disabled"; 2417 status = "disabled";
2463 }; 2418 };
2464 2419
2465 pciec1: pcie@ee800000 { 2420 pciec1: pcie@ee800000 {
2466 compatible = "renesas 2421 compatible = "renesas,pcie-r8a77965",
2467 "renesas 2422 "renesas,pcie-rcar-gen3";
2468 reg = <0 0xee800000 0 2423 reg = <0 0xee800000 0 0x80000>;
2469 #address-cells = <3>; 2424 #address-cells = <3>;
2470 #size-cells = <2>; 2425 #size-cells = <2>;
2471 bus-range = <0x00 0xf 2426 bus-range = <0x00 0xff>;
2472 device_type = "pci"; 2427 device_type = "pci";
2473 ranges = <0x01000000 2428 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2474 <0x02000000 2429 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2475 <0x02000000 2430 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2476 <0x42000000 2431 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2477 /* Map all possible D !! 2432 /* Map all possible DDR as inbound ranges */
2478 dma-ranges = <0x42000 !! 2433 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2479 interrupts = <GIC_SPI 2434 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2480 <GIC_SPI 149 2435 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 150 2436 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2482 #interrupt-cells = <1 2437 #interrupt-cells = <1>;
2483 interrupt-map-mask = 2438 interrupt-map-mask = <0 0 0 0>;
2484 interrupt-map = <0 0 2439 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MO 2440 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2486 clock-names = "pcie", 2441 clock-names = "pcie", "pcie_bus";
2487 power-domains = <&sys 2442 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2488 resets = <&cpg 318>; 2443 resets = <&cpg 318>;
2489 iommu-map = <0 &ipmmu <<
2490 iommu-map-mask = <0>; <<
2491 status = "disabled"; 2444 status = "disabled";
2492 }; 2445 };
2493 2446
2494 fdp1@fe940000 { 2447 fdp1@fe940000 {
2495 compatible = "renesas 2448 compatible = "renesas,fdp1";
2496 reg = <0 0xfe940000 0 2449 reg = <0 0xfe940000 0 0x2400>;
2497 interrupts = <GIC_SPI 2450 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2498 clocks = <&cpg CPG_MO 2451 clocks = <&cpg CPG_MOD 119>;
2499 power-domains = <&sys 2452 power-domains = <&sysc R8A77965_PD_A3VP>;
2500 resets = <&cpg 119>; 2453 resets = <&cpg 119>;
2501 renesas,fcp = <&fcpf0 2454 renesas,fcp = <&fcpf0>;
2502 }; 2455 };
2503 2456
2504 fcpf0: fcp@fe950000 { 2457 fcpf0: fcp@fe950000 {
2505 compatible = "renesas 2458 compatible = "renesas,fcpf";
2506 reg = <0 0xfe950000 0 2459 reg = <0 0xfe950000 0 0x200>;
2507 clocks = <&cpg CPG_MO 2460 clocks = <&cpg CPG_MOD 615>;
2508 power-domains = <&sys 2461 power-domains = <&sysc R8A77965_PD_A3VP>;
2509 resets = <&cpg 615>; 2462 resets = <&cpg 615>;
2510 iommus = <&ipmmu_vp0 <<
2511 }; 2463 };
2512 2464
2513 vspb: vsp@fe960000 { 2465 vspb: vsp@fe960000 {
2514 compatible = "renesas 2466 compatible = "renesas,vsp2";
2515 reg = <0 0xfe960000 0 2467 reg = <0 0xfe960000 0 0x8000>;
2516 interrupts = <GIC_SPI 2468 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2517 clocks = <&cpg CPG_MO 2469 clocks = <&cpg CPG_MOD 626>;
2518 power-domains = <&sys 2470 power-domains = <&sysc R8A77965_PD_A3VP>;
2519 resets = <&cpg 626>; 2471 resets = <&cpg 626>;
2520 2472
2521 renesas,fcp = <&fcpvb 2473 renesas,fcp = <&fcpvb0>;
2522 }; 2474 };
2523 2475
2524 vspi0: vsp@fe9a0000 { 2476 vspi0: vsp@fe9a0000 {
2525 compatible = "renesas 2477 compatible = "renesas,vsp2";
2526 reg = <0 0xfe9a0000 0 2478 reg = <0 0xfe9a0000 0 0x8000>;
2527 interrupts = <GIC_SPI 2479 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2528 clocks = <&cpg CPG_MO 2480 clocks = <&cpg CPG_MOD 631>;
2529 power-domains = <&sys 2481 power-domains = <&sysc R8A77965_PD_A3VP>;
2530 resets = <&cpg 631>; 2482 resets = <&cpg 631>;
2531 2483
2532 renesas,fcp = <&fcpvi 2484 renesas,fcp = <&fcpvi0>;
2533 }; 2485 };
2534 2486
2535 vspd0: vsp@fea20000 { 2487 vspd0: vsp@fea20000 {
2536 compatible = "renesas 2488 compatible = "renesas,vsp2";
2537 reg = <0 0xfea20000 0 2489 reg = <0 0xfea20000 0 0x5000>;
2538 interrupts = <GIC_SPI 2490 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2539 clocks = <&cpg CPG_MO 2491 clocks = <&cpg CPG_MOD 623>;
2540 power-domains = <&sys 2492 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2541 resets = <&cpg 623>; 2493 resets = <&cpg 623>;
2542 2494
2543 renesas,fcp = <&fcpvd 2495 renesas,fcp = <&fcpvd0>;
2544 }; 2496 };
2545 2497
2546 vspd1: vsp@fea28000 { 2498 vspd1: vsp@fea28000 {
2547 compatible = "renesas 2499 compatible = "renesas,vsp2";
2548 reg = <0 0xfea28000 0 2500 reg = <0 0xfea28000 0 0x5000>;
2549 interrupts = <GIC_SPI 2501 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2550 clocks = <&cpg CPG_MO 2502 clocks = <&cpg CPG_MOD 622>;
2551 power-domains = <&sys 2503 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2552 resets = <&cpg 622>; 2504 resets = <&cpg 622>;
2553 2505
2554 renesas,fcp = <&fcpvd 2506 renesas,fcp = <&fcpvd1>;
2555 }; 2507 };
2556 2508
2557 fcpvb0: fcp@fe96f000 { 2509 fcpvb0: fcp@fe96f000 {
2558 compatible = "renesas 2510 compatible = "renesas,fcpv";
2559 reg = <0 0xfe96f000 0 2511 reg = <0 0xfe96f000 0 0x200>;
2560 clocks = <&cpg CPG_MO 2512 clocks = <&cpg CPG_MOD 607>;
2561 power-domains = <&sys 2513 power-domains = <&sysc R8A77965_PD_A3VP>;
2562 resets = <&cpg 607>; 2514 resets = <&cpg 607>;
2563 iommus = <&ipmmu_vp0 <<
2564 }; 2515 };
2565 2516
2566 fcpvd0: fcp@fea27000 { 2517 fcpvd0: fcp@fea27000 {
2567 compatible = "renesas 2518 compatible = "renesas,fcpv";
2568 reg = <0 0xfea27000 0 2519 reg = <0 0xfea27000 0 0x200>;
2569 clocks = <&cpg CPG_MO 2520 clocks = <&cpg CPG_MOD 603>;
2570 power-domains = <&sys 2521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2571 resets = <&cpg 603>; 2522 resets = <&cpg 603>;
2572 iommus = <&ipmmu_vi0 <<
2573 }; 2523 };
2574 2524
2575 fcpvd1: fcp@fea2f000 { 2525 fcpvd1: fcp@fea2f000 {
2576 compatible = "renesas 2526 compatible = "renesas,fcpv";
2577 reg = <0 0xfea2f000 0 2527 reg = <0 0xfea2f000 0 0x200>;
2578 clocks = <&cpg CPG_MO 2528 clocks = <&cpg CPG_MOD 602>;
2579 power-domains = <&sys 2529 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2580 resets = <&cpg 602>; 2530 resets = <&cpg 602>;
2581 iommus = <&ipmmu_vi0 <<
2582 }; 2531 };
2583 2532
2584 fcpvi0: fcp@fe9af000 { 2533 fcpvi0: fcp@fe9af000 {
2585 compatible = "renesas 2534 compatible = "renesas,fcpv";
2586 reg = <0 0xfe9af000 0 2535 reg = <0 0xfe9af000 0 0x200>;
2587 clocks = <&cpg CPG_MO 2536 clocks = <&cpg CPG_MOD 611>;
2588 power-domains = <&sys 2537 power-domains = <&sysc R8A77965_PD_A3VP>;
2589 resets = <&cpg 611>; 2538 resets = <&cpg 611>;
2590 iommus = <&ipmmu_vp0 <<
2591 }; 2539 };
2592 2540
2593 cmm0: cmm@fea40000 { 2541 cmm0: cmm@fea40000 {
2594 compatible = "renesas 2542 compatible = "renesas,r8a77965-cmm",
2595 "renesas 2543 "renesas,rcar-gen3-cmm";
2596 reg = <0 0xfea40000 0 2544 reg = <0 0xfea40000 0 0x1000>;
2597 power-domains = <&sys 2545 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2598 clocks = <&cpg CPG_MO 2546 clocks = <&cpg CPG_MOD 711>;
2599 resets = <&cpg 711>; 2547 resets = <&cpg 711>;
2600 }; 2548 };
2601 2549
2602 cmm1: cmm@fea50000 { 2550 cmm1: cmm@fea50000 {
2603 compatible = "renesas 2551 compatible = "renesas,r8a77965-cmm",
2604 "renesas 2552 "renesas,rcar-gen3-cmm";
2605 reg = <0 0xfea50000 0 2553 reg = <0 0xfea50000 0 0x1000>;
2606 power-domains = <&sys 2554 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2607 clocks = <&cpg CPG_MO 2555 clocks = <&cpg CPG_MOD 710>;
2608 resets = <&cpg 710>; 2556 resets = <&cpg 710>;
2609 }; 2557 };
2610 2558
2611 cmm3: cmm@fea70000 { 2559 cmm3: cmm@fea70000 {
2612 compatible = "renesas 2560 compatible = "renesas,r8a77965-cmm",
2613 "renesas 2561 "renesas,rcar-gen3-cmm";
2614 reg = <0 0xfea70000 0 2562 reg = <0 0xfea70000 0 0x1000>;
2615 power-domains = <&sys 2563 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2616 clocks = <&cpg CPG_MO 2564 clocks = <&cpg CPG_MOD 708>;
2617 resets = <&cpg 708>; 2565 resets = <&cpg 708>;
2618 }; 2566 };
2619 2567
2620 csi20: csi2@fea80000 { 2568 csi20: csi2@fea80000 {
2621 compatible = "renesas 2569 compatible = "renesas,r8a77965-csi2";
2622 reg = <0 0xfea80000 0 2570 reg = <0 0xfea80000 0 0x10000>;
2623 interrupts = <GIC_SPI 2571 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2624 clocks = <&cpg CPG_MO 2572 clocks = <&cpg CPG_MOD 714>;
2625 power-domains = <&sys 2573 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2626 resets = <&cpg 714>; 2574 resets = <&cpg 714>;
2627 status = "disabled"; 2575 status = "disabled";
2628 2576
2629 ports { 2577 ports {
2630 #address-cell 2578 #address-cells = <1>;
2631 #size-cells = 2579 #size-cells = <0>;
2632 2580
2633 port@0 { 2581 port@0 {
2634 reg = 2582 reg = <0>;
2635 }; 2583 };
2636 2584
2637 port@1 { 2585 port@1 {
2638 #addr 2586 #address-cells = <1>;
2639 #size 2587 #size-cells = <0>;
2640 2588
2641 reg = 2589 reg = <1>;
2642 2590
2643 csi20 2591 csi20vin0: endpoint@0 {
2644 2592 reg = <0>;
2645 2593 remote-endpoint = <&vin0csi20>;
2646 }; 2594 };
2647 csi20 2595 csi20vin1: endpoint@1 {
2648 2596 reg = <1>;
2649 2597 remote-endpoint = <&vin1csi20>;
2650 }; 2598 };
2651 csi20 2599 csi20vin2: endpoint@2 {
2652 2600 reg = <2>;
2653 2601 remote-endpoint = <&vin2csi20>;
2654 }; 2602 };
2655 csi20 2603 csi20vin3: endpoint@3 {
2656 2604 reg = <3>;
2657 2605 remote-endpoint = <&vin3csi20>;
2658 }; 2606 };
2659 csi20 2607 csi20vin4: endpoint@4 {
2660 2608 reg = <4>;
2661 2609 remote-endpoint = <&vin4csi20>;
2662 }; 2610 };
2663 csi20 2611 csi20vin5: endpoint@5 {
2664 2612 reg = <5>;
2665 2613 remote-endpoint = <&vin5csi20>;
2666 }; 2614 };
2667 csi20 2615 csi20vin6: endpoint@6 {
2668 2616 reg = <6>;
2669 2617 remote-endpoint = <&vin6csi20>;
2670 }; 2618 };
2671 csi20 2619 csi20vin7: endpoint@7 {
2672 2620 reg = <7>;
2673 2621 remote-endpoint = <&vin7csi20>;
2674 }; 2622 };
2675 }; 2623 };
2676 }; 2624 };
2677 }; 2625 };
2678 2626
2679 csi40: csi2@feaa0000 { 2627 csi40: csi2@feaa0000 {
2680 compatible = "renesas 2628 compatible = "renesas,r8a77965-csi2";
2681 reg = <0 0xfeaa0000 0 2629 reg = <0 0xfeaa0000 0 0x10000>;
2682 interrupts = <GIC_SPI 2630 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2683 clocks = <&cpg CPG_MO 2631 clocks = <&cpg CPG_MOD 716>;
2684 power-domains = <&sys 2632 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2685 resets = <&cpg 716>; 2633 resets = <&cpg 716>;
2686 status = "disabled"; 2634 status = "disabled";
2687 2635
2688 ports { 2636 ports {
2689 #address-cell 2637 #address-cells = <1>;
2690 #size-cells = 2638 #size-cells = <0>;
2691 2639
2692 port@0 { 2640 port@0 {
2693 reg = 2641 reg = <0>;
2694 }; 2642 };
2695 2643
2696 port@1 { 2644 port@1 {
2697 #addr 2645 #address-cells = <1>;
2698 #size 2646 #size-cells = <0>;
2699 2647
2700 reg = 2648 reg = <1>;
2701 2649
2702 csi40 2650 csi40vin0: endpoint@0 {
2703 2651 reg = <0>;
2704 2652 remote-endpoint = <&vin0csi40>;
2705 }; 2653 };
2706 csi40 2654 csi40vin1: endpoint@1 {
2707 2655 reg = <1>;
2708 2656 remote-endpoint = <&vin1csi40>;
2709 }; 2657 };
2710 csi40 2658 csi40vin2: endpoint@2 {
2711 2659 reg = <2>;
2712 2660 remote-endpoint = <&vin2csi40>;
2713 }; 2661 };
2714 csi40 2662 csi40vin3: endpoint@3 {
2715 2663 reg = <3>;
2716 2664 remote-endpoint = <&vin3csi40>;
2717 }; 2665 };
2718 csi40 2666 csi40vin4: endpoint@4 {
2719 2667 reg = <4>;
2720 2668 remote-endpoint = <&vin4csi40>;
2721 }; 2669 };
2722 csi40 2670 csi40vin5: endpoint@5 {
2723 2671 reg = <5>;
2724 2672 remote-endpoint = <&vin5csi40>;
2725 }; 2673 };
2726 csi40 2674 csi40vin6: endpoint@6 {
2727 2675 reg = <6>;
2728 2676 remote-endpoint = <&vin6csi40>;
2729 }; 2677 };
2730 csi40 2678 csi40vin7: endpoint@7 {
2731 2679 reg = <7>;
2732 2680 remote-endpoint = <&vin7csi40>;
2733 }; 2681 };
2734 }; 2682 };
2735 }; 2683 };
2736 }; 2684 };
2737 2685
2738 hdmi0: hdmi@fead0000 { 2686 hdmi0: hdmi@fead0000 {
2739 compatible = "renesas 2687 compatible = "renesas,r8a77965-hdmi",
2740 "renesas 2688 "renesas,rcar-gen3-hdmi";
2741 reg = <0 0xfead0000 0 2689 reg = <0 0xfead0000 0 0x10000>;
2742 interrupts = <GIC_SPI 2690 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2743 clocks = <&cpg CPG_MO 2691 clocks = <&cpg CPG_MOD 729>,
2744 <&cpg CPG_CO 2692 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2745 clock-names = "iahb", 2693 clock-names = "iahb", "isfr";
2746 power-domains = <&sys 2694 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2747 resets = <&cpg 729>; 2695 resets = <&cpg 729>;
2748 status = "disabled"; 2696 status = "disabled";
2749 2697
2750 ports { 2698 ports {
2751 #address-cell 2699 #address-cells = <1>;
2752 #size-cells = 2700 #size-cells = <0>;
2753 port@0 { 2701 port@0 {
2754 reg = 2702 reg = <0>;
2755 dw_hd 2703 dw_hdmi0_in: endpoint {
2756 2704 remote-endpoint = <&du_out_hdmi0>;
2757 }; 2705 };
2758 }; 2706 };
2759 port@1 { 2707 port@1 {
2760 reg = 2708 reg = <1>;
2761 }; 2709 };
2762 }; 2710 };
2763 }; 2711 };
2764 2712
2765 du: display@feb00000 { 2713 du: display@feb00000 {
2766 compatible = "renesas 2714 compatible = "renesas,du-r8a77965";
2767 reg = <0 0xfeb00000 0 2715 reg = <0 0xfeb00000 0 0x80000>;
2768 interrupts = <GIC_SPI 2716 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2769 <GIC_SPI 2717 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2770 <GIC_SPI 2718 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2771 clocks = <&cpg CPG_MO 2719 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2772 <&cpg CPG_MO 2720 <&cpg CPG_MOD 721>;
2773 clock-names = "du.0", 2721 clock-names = "du.0", "du.1", "du.3";
2774 resets = <&cpg 724>, 2722 resets = <&cpg 724>, <&cpg 722>;
2775 reset-names = "du.0", 2723 reset-names = "du.0", "du.3";
2776 2724
2777 renesas,cmms = <&cmm0 2725 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
2778 renesas,vsps = <&vspd 2726 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2779 2727
2780 status = "disabled"; 2728 status = "disabled";
2781 2729
2782 ports { 2730 ports {
2783 #address-cell 2731 #address-cells = <1>;
2784 #size-cells = 2732 #size-cells = <0>;
2785 2733
2786 port@0 { 2734 port@0 {
2787 reg = 2735 reg = <0>;
>> 2736 du_out_rgb: endpoint {
>> 2737 };
2788 }; 2738 };
2789 port@1 { 2739 port@1 {
2790 reg = 2740 reg = <1>;
2791 du_ou 2741 du_out_hdmi0: endpoint {
2792 2742 remote-endpoint = <&dw_hdmi0_in>;
2793 }; 2743 };
2794 }; 2744 };
2795 port@2 { 2745 port@2 {
2796 reg = 2746 reg = <2>;
2797 du_ou 2747 du_out_lvds0: endpoint {
2798 2748 remote-endpoint = <&lvds0_in>;
2799 }; 2749 };
2800 }; 2750 };
2801 }; 2751 };
2802 }; 2752 };
2803 2753
2804 lvds0: lvds@feb90000 { 2754 lvds0: lvds@feb90000 {
2805 compatible = "renesas 2755 compatible = "renesas,r8a77965-lvds";
2806 reg = <0 0xfeb90000 0 2756 reg = <0 0xfeb90000 0 0x14>;
2807 clocks = <&cpg CPG_MO 2757 clocks = <&cpg CPG_MOD 727>;
2808 power-domains = <&sys 2758 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2809 resets = <&cpg 727>; 2759 resets = <&cpg 727>;
2810 status = "disabled"; 2760 status = "disabled";
2811 2761
2812 ports { 2762 ports {
2813 #address-cell 2763 #address-cells = <1>;
2814 #size-cells = 2764 #size-cells = <0>;
2815 2765
2816 port@0 { 2766 port@0 {
2817 reg = 2767 reg = <0>;
2818 lvds0 2768 lvds0_in: endpoint {
2819 2769 remote-endpoint = <&du_out_lvds0>;
2820 }; 2770 };
2821 }; 2771 };
2822 port@1 { 2772 port@1 {
2823 reg = 2773 reg = <1>;
>> 2774 lvds0_out: endpoint {
>> 2775 };
2824 }; 2776 };
2825 }; 2777 };
2826 }; 2778 };
2827 2779
2828 prr: chipid@fff00044 { 2780 prr: chipid@fff00044 {
2829 compatible = "renesas 2781 compatible = "renesas,prr";
2830 reg = <0 0xfff00044 0 2782 reg = <0 0xfff00044 0 4>;
2831 }; 2783 };
2832 }; 2784 };
2833 2785
2834 thermal-zones { 2786 thermal-zones {
2835 sensor1_thermal: sensor1-ther 2787 sensor1_thermal: sensor1-thermal {
2836 polling-delay-passive 2788 polling-delay-passive = <250>;
2837 polling-delay = <1000 2789 polling-delay = <1000>;
2838 thermal-sensors = <&t 2790 thermal-sensors = <&tsc 0>;
2839 sustainable-power = < 2791 sustainable-power = <2439>;
2840 2792
2841 trips { 2793 trips {
2842 sensor1_crit: 2794 sensor1_crit: sensor1-crit {
2843 tempe 2795 temperature = <120000>;
2844 hyste 2796 hysteresis = <1000>;
2845 type 2797 type = "critical";
2846 }; 2798 };
2847 }; 2799 };
2848 }; 2800 };
2849 2801
2850 sensor2_thermal: sensor2-ther 2802 sensor2_thermal: sensor2-thermal {
2851 polling-delay-passive 2803 polling-delay-passive = <250>;
2852 polling-delay = <1000 2804 polling-delay = <1000>;
2853 thermal-sensors = <&t 2805 thermal-sensors = <&tsc 1>;
2854 sustainable-power = < 2806 sustainable-power = <2439>;
2855 2807
2856 trips { 2808 trips {
2857 sensor2_crit: 2809 sensor2_crit: sensor2-crit {
2858 tempe 2810 temperature = <120000>;
2859 hyste 2811 hysteresis = <1000>;
2860 type 2812 type = "critical";
2861 }; 2813 };
2862 }; 2814 };
2863 }; 2815 };
2864 2816
2865 sensor3_thermal: sensor3-ther 2817 sensor3_thermal: sensor3-thermal {
2866 polling-delay-passive 2818 polling-delay-passive = <250>;
2867 polling-delay = <1000 2819 polling-delay = <1000>;
2868 thermal-sensors = <&t 2820 thermal-sensors = <&tsc 2>;
2869 sustainable-power = < 2821 sustainable-power = <2439>;
2870 2822
2871 trips { 2823 trips {
2872 target: trip- 2824 target: trip-point1 {
2873 /* mi 2825 /* miliCelsius */
2874 tempe 2826 temperature = <100000>;
2875 hyste 2827 hysteresis = <1000>;
2876 type 2828 type = "passive";
2877 }; 2829 };
2878 2830
2879 sensor3_crit: 2831 sensor3_crit: sensor3-crit {
2880 tempe 2832 temperature = <120000>;
2881 hyste 2833 hysteresis = <1000>;
2882 type 2834 type = "critical";
2883 }; 2835 };
2884 }; 2836 };
2885 2837
2886 cooling-maps { 2838 cooling-maps {
2887 map0 { 2839 map0 {
2888 trip 2840 trip = <&target>;
2889 cooli 2841 cooling-device = <&a57_0 2 4>;
2890 contr 2842 contribution = <1024>;
2891 }; 2843 };
2892 }; 2844 };
2893 }; 2845 };
2894 }; 2846 };
2895 2847
2896 timer { 2848 timer {
2897 compatible = "arm,armv8-timer 2849 compatible = "arm,armv8-timer";
2898 interrupts-extended = <&gic G 2850 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2899 <&gic G 2851 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2900 <&gic G 2852 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2901 <&gic G 2853 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2902 interrupt-names = "sec-phys", <<
2903 }; 2854 };
2904 2855
2905 /* External USB clocks - can be overr 2856 /* External USB clocks - can be overridden by the board */
2906 usb3s0_clk: usb3s0 { 2857 usb3s0_clk: usb3s0 {
2907 compatible = "fixed-clock"; 2858 compatible = "fixed-clock";
2908 #clock-cells = <0>; 2859 #clock-cells = <0>;
2909 clock-frequency = <0>; 2860 clock-frequency = <0>;
2910 }; 2861 };
2911 2862
2912 usb_extal_clk: usb_extal { 2863 usb_extal_clk: usb_extal {
2913 compatible = "fixed-clock"; 2864 compatible = "fixed-clock";
2914 #clock-cells = <0>; 2865 #clock-cells = <0>;
2915 clock-frequency = <0>; 2866 clock-frequency = <0>;
2916 }; 2867 };
2917 }; 2868 };
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