1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car M3-N (R8A7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 * 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+rene 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 * 6 *
7 * Based on r8a7796.dtsi 7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp 8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */ 9 */
10 10
11 #include <dt-bindings/clock/r8a77965-cpg-mssr. 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h> 13 #include <dt-bindings/power/r8a77965-sysc.h>
14 14
15 #define SOC_HAS_SATA !! 15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
16 16
17 / { 17 / {
18 compatible = "renesas,r8a77965"; 18 compatible = "renesas,r8a77965";
19 #address-cells = <2>; 19 #address-cells = <2>;
20 #size-cells = <2>; 20 #size-cells = <2>;
21 21
>> 22 aliases {
>> 23 i2c0 = &i2c0;
>> 24 i2c1 = &i2c1;
>> 25 i2c2 = &i2c2;
>> 26 i2c3 = &i2c3;
>> 27 i2c4 = &i2c4;
>> 28 i2c5 = &i2c5;
>> 29 i2c6 = &i2c6;
>> 30 i2c7 = &i2c_dvfs;
>> 31 };
>> 32
22 /* 33 /*
23 * The external audio clocks are confi 34 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default. 35 * clocks by default.
25 * Boards that provide audio clocks sh 36 * Boards that provide audio clocks should override them.
26 */ 37 */
27 audio_clk_a: audio_clk_a { 38 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock"; 39 compatible = "fixed-clock";
29 #clock-cells = <0>; 40 #clock-cells = <0>;
30 clock-frequency = <0>; 41 clock-frequency = <0>;
31 }; 42 };
32 43
33 audio_clk_b: audio_clk_b { 44 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock"; 45 compatible = "fixed-clock";
35 #clock-cells = <0>; 46 #clock-cells = <0>;
36 clock-frequency = <0>; 47 clock-frequency = <0>;
37 }; 48 };
38 49
39 audio_clk_c: audio_clk_c { 50 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock"; 51 compatible = "fixed-clock";
41 #clock-cells = <0>; 52 #clock-cells = <0>;
42 clock-frequency = <0>; 53 clock-frequency = <0>;
43 }; 54 };
44 55
45 /* External CAN clock - to be overridd 56 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can { 57 can_clk: can {
47 compatible = "fixed-clock"; 58 compatible = "fixed-clock";
48 #clock-cells = <0>; 59 #clock-cells = <0>;
49 clock-frequency = <0>; 60 clock-frequency = <0>;
50 }; 61 };
51 62
52 cluster0_opp: opp-table-0 { !! 63 cluster0_opp: opp_table0 {
53 compatible = "operating-points 64 compatible = "operating-points-v2";
54 opp-shared; 65 opp-shared;
55 66
56 opp-500000000 { 67 opp-500000000 {
57 opp-hz = /bits/ 64 <50 68 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <83000 69 opp-microvolt = <830000>;
59 clock-latency-ns = <30 70 clock-latency-ns = <300000>;
60 }; 71 };
61 opp-1000000000 { 72 opp-1000000000 {
62 opp-hz = /bits/ 64 <10 73 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <83000 74 opp-microvolt = <830000>;
64 clock-latency-ns = <30 75 clock-latency-ns = <300000>;
65 }; 76 };
66 opp-1500000000 { 77 opp-1500000000 {
67 opp-hz = /bits/ 64 <15 78 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <83000 79 opp-microvolt = <830000>;
69 clock-latency-ns = <30 80 clock-latency-ns = <300000>;
70 opp-suspend; 81 opp-suspend;
71 }; 82 };
72 opp-1600000000 { 83 opp-1600000000 {
73 opp-hz = /bits/ 64 <16 84 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <90000 85 opp-microvolt = <900000>;
75 clock-latency-ns = <30 86 clock-latency-ns = <300000>;
>> 87 turbo-mode;
76 }; 88 };
77 opp-1700000000 { 89 opp-1700000000 {
78 opp-hz = /bits/ 64 <17 90 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <90000 91 opp-microvolt = <900000>;
80 clock-latency-ns = <30 92 clock-latency-ns = <300000>;
>> 93 turbo-mode;
81 }; 94 };
82 opp-1800000000 { 95 opp-1800000000 {
83 opp-hz = /bits/ 64 <18 96 opp-hz = /bits/ 64 <1800000000>;
84 opp-microvolt = <96000 97 opp-microvolt = <960000>;
85 clock-latency-ns = <30 98 clock-latency-ns = <300000>;
86 turbo-mode; 99 turbo-mode;
87 }; 100 };
88 }; 101 };
89 102
90 cpus { 103 cpus {
91 #address-cells = <1>; 104 #address-cells = <1>;
92 #size-cells = <0>; 105 #size-cells = <0>;
93 106
94 a57_0: cpu@0 { 107 a57_0: cpu@0 {
95 compatible = "arm,cort 108 compatible = "arm,cortex-a57";
96 reg = <0x0>; 109 reg = <0x0>;
97 device_type = "cpu"; 110 device_type = "cpu";
98 power-domains = <&sysc 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
99 next-level-cache = <&L 112 next-level-cache = <&L2_CA57>;
100 enable-method = "psci" 113 enable-method = "psci";
101 cpu-idle-states = <&CP <<
102 #cooling-cells = <2>; 114 #cooling-cells = <2>;
103 dynamic-power-coeffici 115 dynamic-power-coefficient = <854>;
104 clocks = <&cpg CPG_COR 116 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
105 operating-points-v2 = 117 operating-points-v2 = <&cluster0_opp>;
106 }; 118 };
107 119
108 a57_1: cpu@1 { 120 a57_1: cpu@1 {
109 compatible = "arm,cort 121 compatible = "arm,cortex-a57";
110 reg = <0x1>; 122 reg = <0x1>;
111 device_type = "cpu"; 123 device_type = "cpu";
112 power-domains = <&sysc 124 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
113 next-level-cache = <&L 125 next-level-cache = <&L2_CA57>;
114 enable-method = "psci" 126 enable-method = "psci";
115 cpu-idle-states = <&CP <<
116 clocks = <&cpg CPG_COR 127 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
117 operating-points-v2 = 128 operating-points-v2 = <&cluster0_opp>;
118 }; 129 };
119 130
120 L2_CA57: cache-controller-0 { 131 L2_CA57: cache-controller-0 {
121 compatible = "cache"; 132 compatible = "cache";
122 power-domains = <&sysc 133 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
123 cache-unified; 134 cache-unified;
124 cache-level = <2>; 135 cache-level = <2>;
125 }; 136 };
126 <<
127 idle-states { <<
128 entry-method = "psci"; <<
129 <<
130 CPU_SLEEP_0: cpu-sleep <<
131 compatible = " <<
132 arm,psci-suspe <<
133 local-timer-st <<
134 entry-latency- <<
135 exit-latency-u <<
136 min-residency- <<
137 }; <<
138 }; <<
139 }; 137 };
140 138
141 extal_clk: extal { 139 extal_clk: extal {
142 compatible = "fixed-clock"; 140 compatible = "fixed-clock";
143 #clock-cells = <0>; 141 #clock-cells = <0>;
144 /* This value must be overridd 142 /* This value must be overridden by the board */
145 clock-frequency = <0>; 143 clock-frequency = <0>;
146 }; 144 };
147 145
148 extalr_clk: extalr { 146 extalr_clk: extalr {
149 compatible = "fixed-clock"; 147 compatible = "fixed-clock";
150 #clock-cells = <0>; 148 #clock-cells = <0>;
151 /* This value must be overridd 149 /* This value must be overridden by the board */
152 clock-frequency = <0>; 150 clock-frequency = <0>;
153 }; 151 };
154 152
155 /* External PCIe clock - can be overri 153 /* External PCIe clock - can be overridden by the board */
156 pcie_bus_clk: pcie_bus { 154 pcie_bus_clk: pcie_bus {
157 compatible = "fixed-clock"; 155 compatible = "fixed-clock";
158 #clock-cells = <0>; 156 #clock-cells = <0>;
159 clock-frequency = <0>; 157 clock-frequency = <0>;
160 }; 158 };
161 159
162 pmu_a57 { 160 pmu_a57 {
163 compatible = "arm,cortex-a57-p 161 compatible = "arm,cortex-a57-pmu";
164 interrupts-extended = <&gic GI 162 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
165 <&gic GI 163 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166 interrupt-affinity = <&a57_0>, 164 interrupt-affinity = <&a57_0>,
167 <&a57_1>; 165 <&a57_1>;
168 }; 166 };
169 167
170 psci { 168 psci {
171 compatible = "arm,psci-1.0", " 169 compatible = "arm,psci-1.0", "arm,psci-0.2";
172 method = "smc"; 170 method = "smc";
173 }; 171 };
174 172
175 /* External SCIF clock - to be overrid 173 /* External SCIF clock - to be overridden by boards that provide it */
176 scif_clk: scif { 174 scif_clk: scif {
177 compatible = "fixed-clock"; 175 compatible = "fixed-clock";
178 #clock-cells = <0>; 176 #clock-cells = <0>;
179 clock-frequency = <0>; 177 clock-frequency = <0>;
180 }; 178 };
181 179
182 soc { 180 soc {
183 compatible = "simple-bus"; 181 compatible = "simple-bus";
184 interrupt-parent = <&gic>; 182 interrupt-parent = <&gic>;
185 #address-cells = <2>; 183 #address-cells = <2>;
186 #size-cells = <2>; 184 #size-cells = <2>;
187 ranges; 185 ranges;
188 186
189 rwdt: watchdog@e6020000 { 187 rwdt: watchdog@e6020000 {
190 compatible = "renesas, 188 compatible = "renesas,r8a77965-wdt",
191 "renesas, 189 "renesas,rcar-gen3-wdt";
192 reg = <0 0xe6020000 0 190 reg = <0 0xe6020000 0 0x0c>;
193 interrupts = <GIC_SPI <<
194 clocks = <&cpg CPG_MOD 191 clocks = <&cpg CPG_MOD 402>;
195 power-domains = <&sysc 192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
196 resets = <&cpg 402>; 193 resets = <&cpg 402>;
197 status = "disabled"; 194 status = "disabled";
198 }; 195 };
199 196
200 gpio0: gpio@e6050000 { 197 gpio0: gpio@e6050000 {
201 compatible = "renesas, 198 compatible = "renesas,gpio-r8a77965",
202 "renesas, 199 "renesas,rcar-gen3-gpio";
203 reg = <0 0xe6050000 0 200 reg = <0 0xe6050000 0 0x50>;
204 interrupts = <GIC_SPI 201 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>; 202 #gpio-cells = <2>;
206 gpio-controller; 203 gpio-controller;
207 gpio-ranges = <&pfc 0 204 gpio-ranges = <&pfc 0 0 16>;
208 #interrupt-cells = <2> 205 #interrupt-cells = <2>;
209 interrupt-controller; 206 interrupt-controller;
210 clocks = <&cpg CPG_MOD 207 clocks = <&cpg CPG_MOD 912>;
211 power-domains = <&sysc 208 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
212 resets = <&cpg 912>; 209 resets = <&cpg 912>;
213 }; 210 };
214 211
215 gpio1: gpio@e6051000 { 212 gpio1: gpio@e6051000 {
216 compatible = "renesas, 213 compatible = "renesas,gpio-r8a77965",
217 "renesas, 214 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6051000 0 215 reg = <0 0xe6051000 0 0x50>;
219 interrupts = <GIC_SPI 216 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>; 217 #gpio-cells = <2>;
221 gpio-controller; 218 gpio-controller;
222 gpio-ranges = <&pfc 0 219 gpio-ranges = <&pfc 0 32 29>;
223 #interrupt-cells = <2> 220 #interrupt-cells = <2>;
224 interrupt-controller; 221 interrupt-controller;
225 clocks = <&cpg CPG_MOD 222 clocks = <&cpg CPG_MOD 911>;
226 power-domains = <&sysc 223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
227 resets = <&cpg 911>; 224 resets = <&cpg 911>;
228 }; 225 };
229 226
230 gpio2: gpio@e6052000 { 227 gpio2: gpio@e6052000 {
231 compatible = "renesas, 228 compatible = "renesas,gpio-r8a77965",
232 "renesas, 229 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6052000 0 230 reg = <0 0xe6052000 0 0x50>;
234 interrupts = <GIC_SPI 231 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>; 232 #gpio-cells = <2>;
236 gpio-controller; 233 gpio-controller;
237 gpio-ranges = <&pfc 0 234 gpio-ranges = <&pfc 0 64 15>;
238 #interrupt-cells = <2> 235 #interrupt-cells = <2>;
239 interrupt-controller; 236 interrupt-controller;
240 clocks = <&cpg CPG_MOD 237 clocks = <&cpg CPG_MOD 910>;
241 power-domains = <&sysc 238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
242 resets = <&cpg 910>; 239 resets = <&cpg 910>;
243 }; 240 };
244 241
245 gpio3: gpio@e6053000 { 242 gpio3: gpio@e6053000 {
246 compatible = "renesas, 243 compatible = "renesas,gpio-r8a77965",
247 "renesas, 244 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6053000 0 245 reg = <0 0xe6053000 0 0x50>;
249 interrupts = <GIC_SPI 246 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>; 247 #gpio-cells = <2>;
251 gpio-controller; 248 gpio-controller;
252 gpio-ranges = <&pfc 0 249 gpio-ranges = <&pfc 0 96 16>;
253 #interrupt-cells = <2> 250 #interrupt-cells = <2>;
254 interrupt-controller; 251 interrupt-controller;
255 clocks = <&cpg CPG_MOD 252 clocks = <&cpg CPG_MOD 909>;
256 power-domains = <&sysc 253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
257 resets = <&cpg 909>; 254 resets = <&cpg 909>;
258 }; 255 };
259 256
260 gpio4: gpio@e6054000 { 257 gpio4: gpio@e6054000 {
261 compatible = "renesas, 258 compatible = "renesas,gpio-r8a77965",
262 "renesas, 259 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6054000 0 260 reg = <0 0xe6054000 0 0x50>;
264 interrupts = <GIC_SPI 261 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>; 262 #gpio-cells = <2>;
266 gpio-controller; 263 gpio-controller;
267 gpio-ranges = <&pfc 0 264 gpio-ranges = <&pfc 0 128 18>;
268 #interrupt-cells = <2> 265 #interrupt-cells = <2>;
269 interrupt-controller; 266 interrupt-controller;
270 clocks = <&cpg CPG_MOD 267 clocks = <&cpg CPG_MOD 908>;
271 power-domains = <&sysc 268 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
272 resets = <&cpg 908>; 269 resets = <&cpg 908>;
273 }; 270 };
274 271
275 gpio5: gpio@e6055000 { 272 gpio5: gpio@e6055000 {
276 compatible = "renesas, 273 compatible = "renesas,gpio-r8a77965",
277 "renesas, 274 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6055000 0 275 reg = <0 0xe6055000 0 0x50>;
279 interrupts = <GIC_SPI 276 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>; 277 #gpio-cells = <2>;
281 gpio-controller; 278 gpio-controller;
282 gpio-ranges = <&pfc 0 279 gpio-ranges = <&pfc 0 160 26>;
283 #interrupt-cells = <2> 280 #interrupt-cells = <2>;
284 interrupt-controller; 281 interrupt-controller;
285 clocks = <&cpg CPG_MOD 282 clocks = <&cpg CPG_MOD 907>;
286 power-domains = <&sysc 283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
287 resets = <&cpg 907>; 284 resets = <&cpg 907>;
288 }; 285 };
289 286
290 gpio6: gpio@e6055400 { 287 gpio6: gpio@e6055400 {
291 compatible = "renesas, 288 compatible = "renesas,gpio-r8a77965",
292 "renesas, 289 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055400 0 290 reg = <0 0xe6055400 0 0x50>;
294 interrupts = <GIC_SPI 291 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>; 292 #gpio-cells = <2>;
296 gpio-controller; 293 gpio-controller;
297 gpio-ranges = <&pfc 0 294 gpio-ranges = <&pfc 0 192 32>;
298 #interrupt-cells = <2> 295 #interrupt-cells = <2>;
299 interrupt-controller; 296 interrupt-controller;
300 clocks = <&cpg CPG_MOD 297 clocks = <&cpg CPG_MOD 906>;
301 power-domains = <&sysc 298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
302 resets = <&cpg 906>; 299 resets = <&cpg 906>;
303 }; 300 };
304 301
305 gpio7: gpio@e6055800 { 302 gpio7: gpio@e6055800 {
306 compatible = "renesas, 303 compatible = "renesas,gpio-r8a77965",
307 "renesas, 304 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055800 0 305 reg = <0 0xe6055800 0 0x50>;
309 interrupts = <GIC_SPI 306 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>; 307 #gpio-cells = <2>;
311 gpio-controller; 308 gpio-controller;
312 gpio-ranges = <&pfc 0 309 gpio-ranges = <&pfc 0 224 4>;
313 #interrupt-cells = <2> 310 #interrupt-cells = <2>;
314 interrupt-controller; 311 interrupt-controller;
315 clocks = <&cpg CPG_MOD 312 clocks = <&cpg CPG_MOD 905>;
316 power-domains = <&sysc 313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
317 resets = <&cpg 905>; 314 resets = <&cpg 905>;
318 }; 315 };
319 316
320 pfc: pinctrl@e6060000 { !! 317 pfc: pin-controller@e6060000 {
321 compatible = "renesas, 318 compatible = "renesas,pfc-r8a77965";
322 reg = <0 0xe6060000 0 319 reg = <0 0xe6060000 0 0x50c>;
323 }; 320 };
324 321
325 cmt0: timer@e60f0000 { 322 cmt0: timer@e60f0000 {
326 compatible = "renesas, 323 compatible = "renesas,r8a77965-cmt0",
327 "renesas, 324 "renesas,rcar-gen3-cmt0";
328 reg = <0 0xe60f0000 0 325 reg = <0 0xe60f0000 0 0x1004>;
329 interrupts = <GIC_SPI 326 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 327 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&cpg CPG_MOD 328 clocks = <&cpg CPG_MOD 303>;
332 clock-names = "fck"; 329 clock-names = "fck";
333 power-domains = <&sysc 330 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
334 resets = <&cpg 303>; 331 resets = <&cpg 303>;
335 status = "disabled"; 332 status = "disabled";
336 }; 333 };
337 334
338 cmt1: timer@e6130000 { 335 cmt1: timer@e6130000 {
339 compatible = "renesas, 336 compatible = "renesas,r8a77965-cmt1",
340 "renesas, 337 "renesas,rcar-gen3-cmt1";
341 reg = <0 0xe6130000 0 338 reg = <0 0xe6130000 0 0x1004>;
342 interrupts = <GIC_SPI 339 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 340 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 341 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 342 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 343 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 344 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 345 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 346 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&cpg CPG_MOD 347 clocks = <&cpg CPG_MOD 302>;
351 clock-names = "fck"; 348 clock-names = "fck";
352 power-domains = <&sysc 349 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
353 resets = <&cpg 302>; 350 resets = <&cpg 302>;
354 status = "disabled"; 351 status = "disabled";
355 }; 352 };
356 353
357 cmt2: timer@e6140000 { 354 cmt2: timer@e6140000 {
358 compatible = "renesas, 355 compatible = "renesas,r8a77965-cmt1",
359 "renesas, 356 "renesas,rcar-gen3-cmt1";
360 reg = <0 0xe6140000 0 357 reg = <0 0xe6140000 0 0x1004>;
361 interrupts = <GIC_SPI 358 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 359 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 360 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 361 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 362 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 363 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 364 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 365 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 366 clocks = <&cpg CPG_MOD 301>;
370 clock-names = "fck"; 367 clock-names = "fck";
371 power-domains = <&sysc 368 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
372 resets = <&cpg 301>; 369 resets = <&cpg 301>;
373 status = "disabled"; 370 status = "disabled";
374 }; 371 };
375 372
376 cmt3: timer@e6148000 { 373 cmt3: timer@e6148000 {
377 compatible = "renesas, 374 compatible = "renesas,r8a77965-cmt1",
378 "renesas, 375 "renesas,rcar-gen3-cmt1";
379 reg = <0 0xe6148000 0 376 reg = <0 0xe6148000 0 0x1004>;
380 interrupts = <GIC_SPI 377 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 378 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 379 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 380 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 381 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 382 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 383 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 384 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 385 clocks = <&cpg CPG_MOD 300>;
389 clock-names = "fck"; 386 clock-names = "fck";
390 power-domains = <&sysc 387 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
391 resets = <&cpg 300>; 388 resets = <&cpg 300>;
392 status = "disabled"; 389 status = "disabled";
393 }; 390 };
394 391
395 cpg: clock-controller@e6150000 392 cpg: clock-controller@e6150000 {
396 compatible = "renesas, 393 compatible = "renesas,r8a77965-cpg-mssr";
397 reg = <0 0xe6150000 0 394 reg = <0 0xe6150000 0 0x1000>;
398 clocks = <&extal_clk>, 395 clocks = <&extal_clk>, <&extalr_clk>;
399 clock-names = "extal", 396 clock-names = "extal", "extalr";
400 #clock-cells = <2>; 397 #clock-cells = <2>;
401 #power-domain-cells = 398 #power-domain-cells = <0>;
402 #reset-cells = <1>; 399 #reset-cells = <1>;
403 }; 400 };
404 401
405 rst: reset-controller@e6160000 402 rst: reset-controller@e6160000 {
406 compatible = "renesas, 403 compatible = "renesas,r8a77965-rst";
407 reg = <0 0xe6160000 0 404 reg = <0 0xe6160000 0 0x0200>;
408 }; 405 };
409 406
410 sysc: system-controller@e61800 407 sysc: system-controller@e6180000 {
411 compatible = "renesas, 408 compatible = "renesas,r8a77965-sysc";
412 reg = <0 0xe6180000 0 409 reg = <0 0xe6180000 0 0x0400>;
413 #power-domain-cells = 410 #power-domain-cells = <1>;
414 }; 411 };
415 412
416 tsc: thermal@e6198000 { 413 tsc: thermal@e6198000 {
417 compatible = "renesas, 414 compatible = "renesas,r8a77965-thermal";
418 reg = <0 0xe6198000 0 415 reg = <0 0xe6198000 0 0x100>,
419 <0 0xe61a0000 0 416 <0 0xe61a0000 0 0x100>,
420 <0 0xe61a8000 0 417 <0 0xe61a8000 0 0x100>;
421 interrupts = <GIC_SPI 418 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 419 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 420 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 421 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc 422 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
426 resets = <&cpg 522>; 423 resets = <&cpg 522>;
427 #thermal-sensor-cells 424 #thermal-sensor-cells = <1>;
428 }; 425 };
429 426
430 intc_ex: interrupt-controller@ 427 intc_ex: interrupt-controller@e61c0000 {
431 compatible = "renesas, 428 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
432 #interrupt-cells = <2> 429 #interrupt-cells = <2>;
433 interrupt-controller; 430 interrupt-controller;
434 reg = <0 0xe61c0000 0 431 reg = <0 0xe61c0000 0 0x200>;
435 interrupts = <GIC_SPI !! 432 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
436 <GIC_SPI !! 433 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
437 <GIC_SPI !! 434 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
438 <GIC_SPI !! 435 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
439 <GIC_SPI !! 436 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
440 <GIC_SPI !! 437 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 438 clocks = <&cpg CPG_MOD 407>;
442 power-domains = <&sysc 439 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
443 resets = <&cpg 407>; 440 resets = <&cpg 407>;
444 }; 441 };
445 442
446 tmu0: timer@e61e0000 { <<
447 compatible = "renesas, <<
448 reg = <0 0xe61e0000 0 <<
449 interrupts = <GIC_SPI <<
450 <GIC_SPI <<
451 <GIC_SPI <<
452 interrupt-names = "tun <<
453 clocks = <&cpg CPG_MOD <<
454 clock-names = "fck"; <<
455 power-domains = <&sysc <<
456 resets = <&cpg 125>; <<
457 status = "disabled"; <<
458 }; <<
459 <<
460 tmu1: timer@e6fc0000 { <<
461 compatible = "renesas, <<
462 reg = <0 0xe6fc0000 0 <<
463 interrupts = <GIC_SPI <<
464 <GIC_SPI <<
465 <GIC_SPI <<
466 <GIC_SPI <<
467 interrupt-names = "tun <<
468 clocks = <&cpg CPG_MOD <<
469 clock-names = "fck"; <<
470 power-domains = <&sysc <<
471 resets = <&cpg 124>; <<
472 status = "disabled"; <<
473 }; <<
474 <<
475 tmu2: timer@e6fd0000 { <<
476 compatible = "renesas, <<
477 reg = <0 0xe6fd0000 0 <<
478 interrupts = <GIC_SPI <<
479 <GIC_SPI <<
480 <GIC_SPI <<
481 <GIC_SPI <<
482 interrupt-names = "tun <<
483 clocks = <&cpg CPG_MOD <<
484 clock-names = "fck"; <<
485 power-domains = <&sysc <<
486 resets = <&cpg 123>; <<
487 status = "disabled"; <<
488 }; <<
489 <<
490 tmu3: timer@e6fe0000 { <<
491 compatible = "renesas, <<
492 reg = <0 0xe6fe0000 0 <<
493 interrupts = <GIC_SPI <<
494 <GIC_SPI <<
495 <GIC_SPI <<
496 interrupt-names = "tun <<
497 clocks = <&cpg CPG_MOD <<
498 clock-names = "fck"; <<
499 power-domains = <&sysc <<
500 resets = <&cpg 122>; <<
501 status = "disabled"; <<
502 }; <<
503 <<
504 tmu4: timer@ffc00000 { <<
505 compatible = "renesas, <<
506 reg = <0 0xffc00000 0 <<
507 interrupts = <GIC_SPI <<
508 <GIC_SPI <<
509 <GIC_SPI <<
510 interrupt-names = "tun <<
511 clocks = <&cpg CPG_MOD <<
512 clock-names = "fck"; <<
513 power-domains = <&sysc <<
514 resets = <&cpg 121>; <<
515 status = "disabled"; <<
516 }; <<
517 <<
518 i2c0: i2c@e6500000 { 443 i2c0: i2c@e6500000 {
519 #address-cells = <1>; 444 #address-cells = <1>;
520 #size-cells = <0>; 445 #size-cells = <0>;
521 compatible = "renesas, 446 compatible = "renesas,i2c-r8a77965",
522 "renesas, 447 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6500000 0 448 reg = <0 0xe6500000 0 0x40>;
524 interrupts = <GIC_SPI 449 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 450 clocks = <&cpg CPG_MOD 931>;
526 power-domains = <&sysc 451 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
527 resets = <&cpg 931>; 452 resets = <&cpg 931>;
528 dmas = <&dmac1 0x91>, 453 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
529 <&dmac2 0x91>, 454 <&dmac2 0x91>, <&dmac2 0x90>;
530 dma-names = "tx", "rx" 455 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 456 i2c-scl-internal-delay-ns = <110>;
532 status = "disabled"; 457 status = "disabled";
533 }; 458 };
534 459
535 i2c1: i2c@e6508000 { 460 i2c1: i2c@e6508000 {
536 #address-cells = <1>; 461 #address-cells = <1>;
537 #size-cells = <0>; 462 #size-cells = <0>;
538 compatible = "renesas, 463 compatible = "renesas,i2c-r8a77965",
539 "renesas, 464 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe6508000 0 465 reg = <0 0xe6508000 0 0x40>;
541 interrupts = <GIC_SPI 466 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 467 clocks = <&cpg CPG_MOD 930>;
543 power-domains = <&sysc 468 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
544 resets = <&cpg 930>; 469 resets = <&cpg 930>;
545 dmas = <&dmac1 0x93>, 470 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
546 <&dmac2 0x93>, 471 <&dmac2 0x93>, <&dmac2 0x92>;
547 dma-names = "tx", "rx" 472 dma-names = "tx", "rx", "tx", "rx";
548 i2c-scl-internal-delay 473 i2c-scl-internal-delay-ns = <6>;
549 status = "disabled"; 474 status = "disabled";
550 }; 475 };
551 476
552 i2c2: i2c@e6510000 { 477 i2c2: i2c@e6510000 {
553 #address-cells = <1>; 478 #address-cells = <1>;
554 #size-cells = <0>; 479 #size-cells = <0>;
555 compatible = "renesas, 480 compatible = "renesas,i2c-r8a77965",
556 "renesas, 481 "renesas,rcar-gen3-i2c";
557 reg = <0 0xe6510000 0 482 reg = <0 0xe6510000 0 0x40>;
558 interrupts = <GIC_SPI 483 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 484 clocks = <&cpg CPG_MOD 929>;
560 power-domains = <&sysc 485 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
561 resets = <&cpg 929>; 486 resets = <&cpg 929>;
562 dmas = <&dmac1 0x95>, 487 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
563 <&dmac2 0x95>, 488 <&dmac2 0x95>, <&dmac2 0x94>;
564 dma-names = "tx", "rx" 489 dma-names = "tx", "rx", "tx", "rx";
565 i2c-scl-internal-delay 490 i2c-scl-internal-delay-ns = <6>;
566 status = "disabled"; 491 status = "disabled";
567 }; 492 };
568 493
569 i2c3: i2c@e66d0000 { 494 i2c3: i2c@e66d0000 {
570 #address-cells = <1>; 495 #address-cells = <1>;
571 #size-cells = <0>; 496 #size-cells = <0>;
572 compatible = "renesas, 497 compatible = "renesas,i2c-r8a77965",
573 "renesas, 498 "renesas,rcar-gen3-i2c";
574 reg = <0 0xe66d0000 0 499 reg = <0 0xe66d0000 0 0x40>;
575 interrupts = <GIC_SPI 500 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 501 clocks = <&cpg CPG_MOD 928>;
577 power-domains = <&sysc 502 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
578 resets = <&cpg 928>; 503 resets = <&cpg 928>;
579 dmas = <&dmac0 0x97>, 504 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
580 dma-names = "tx", "rx" 505 dma-names = "tx", "rx";
581 i2c-scl-internal-delay 506 i2c-scl-internal-delay-ns = <110>;
582 status = "disabled"; 507 status = "disabled";
583 }; 508 };
584 509
585 i2c4: i2c@e66d8000 { 510 i2c4: i2c@e66d8000 {
586 #address-cells = <1>; 511 #address-cells = <1>;
587 #size-cells = <0>; 512 #size-cells = <0>;
588 compatible = "renesas, 513 compatible = "renesas,i2c-r8a77965",
589 "renesas, 514 "renesas,rcar-gen3-i2c";
590 reg = <0 0xe66d8000 0 515 reg = <0 0xe66d8000 0 0x40>;
591 interrupts = <GIC_SPI 516 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&cpg CPG_MOD 517 clocks = <&cpg CPG_MOD 927>;
593 power-domains = <&sysc 518 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
594 resets = <&cpg 927>; 519 resets = <&cpg 927>;
595 dmas = <&dmac0 0x99>, 520 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
596 dma-names = "tx", "rx" 521 dma-names = "tx", "rx";
597 i2c-scl-internal-delay 522 i2c-scl-internal-delay-ns = <110>;
598 status = "disabled"; 523 status = "disabled";
599 }; 524 };
600 525
601 i2c5: i2c@e66e0000 { 526 i2c5: i2c@e66e0000 {
602 #address-cells = <1>; 527 #address-cells = <1>;
603 #size-cells = <0>; 528 #size-cells = <0>;
604 compatible = "renesas, 529 compatible = "renesas,i2c-r8a77965",
605 "renesas, 530 "renesas,rcar-gen3-i2c";
606 reg = <0 0xe66e0000 0 531 reg = <0 0xe66e0000 0 0x40>;
607 interrupts = <GIC_SPI 532 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&cpg CPG_MOD 533 clocks = <&cpg CPG_MOD 919>;
609 power-domains = <&sysc 534 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
610 resets = <&cpg 919>; 535 resets = <&cpg 919>;
611 dmas = <&dmac0 0x9b>, 536 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
612 dma-names = "tx", "rx" 537 dma-names = "tx", "rx";
613 i2c-scl-internal-delay 538 i2c-scl-internal-delay-ns = <110>;
614 status = "disabled"; 539 status = "disabled";
615 }; 540 };
616 541
617 i2c6: i2c@e66e8000 { 542 i2c6: i2c@e66e8000 {
618 #address-cells = <1>; 543 #address-cells = <1>;
619 #size-cells = <0>; 544 #size-cells = <0>;
620 compatible = "renesas, 545 compatible = "renesas,i2c-r8a77965",
621 "renesas, 546 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66e8000 0 547 reg = <0 0xe66e8000 0 0x40>;
623 interrupts = <GIC_SPI 548 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&cpg CPG_MOD 549 clocks = <&cpg CPG_MOD 918>;
625 power-domains = <&sysc 550 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
626 resets = <&cpg 918>; 551 resets = <&cpg 918>;
627 dmas = <&dmac0 0x9d>, 552 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
628 dma-names = "tx", "rx" 553 dma-names = "tx", "rx";
629 i2c-scl-internal-delay 554 i2c-scl-internal-delay-ns = <6>;
630 status = "disabled"; 555 status = "disabled";
631 }; 556 };
632 557
633 i2c_dvfs: i2c@e60b0000 { 558 i2c_dvfs: i2c@e60b0000 {
634 #address-cells = <1>; 559 #address-cells = <1>;
635 #size-cells = <0>; 560 #size-cells = <0>;
636 compatible = "renesas, 561 compatible = "renesas,iic-r8a77965",
637 "renesas, 562 "renesas,rcar-gen3-iic",
638 "renesas, 563 "renesas,rmobile-iic";
639 reg = <0 0xe60b0000 0 564 reg = <0 0xe60b0000 0 0x425>;
640 interrupts = <GIC_SPI 565 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&cpg CPG_MOD 566 clocks = <&cpg CPG_MOD 926>;
642 power-domains = <&sysc 567 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
643 resets = <&cpg 926>; 568 resets = <&cpg 926>;
644 dmas = <&dmac0 0x11>, 569 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
645 dma-names = "tx", "rx" 570 dma-names = "tx", "rx";
646 status = "disabled"; 571 status = "disabled";
647 }; 572 };
648 573
649 hscif0: serial@e6540000 { 574 hscif0: serial@e6540000 {
650 compatible = "renesas, 575 compatible = "renesas,hscif-r8a77965",
651 "renesas, 576 "renesas,rcar-gen3-hscif",
652 "renesas, 577 "renesas,hscif";
653 reg = <0 0xe6540000 0 578 reg = <0 0xe6540000 0 0x60>;
654 interrupts = <GIC_SPI 579 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 580 clocks = <&cpg CPG_MOD 520>,
656 <&cpg CPG_COR 581 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
657 <&scif_clk>; 582 <&scif_clk>;
658 clock-names = "fck", " 583 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x31>, 584 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
660 <&dmac2 0x31>, 585 <&dmac2 0x31>, <&dmac2 0x30>;
661 dma-names = "tx", "rx" 586 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 587 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
663 resets = <&cpg 520>; 588 resets = <&cpg 520>;
664 status = "disabled"; 589 status = "disabled";
665 }; 590 };
666 591
667 hscif1: serial@e6550000 { 592 hscif1: serial@e6550000 {
668 compatible = "renesas, 593 compatible = "renesas,hscif-r8a77965",
669 "renesas, 594 "renesas,rcar-gen3-hscif",
670 "renesas, 595 "renesas,hscif";
671 reg = <0 0xe6550000 0 596 reg = <0 0xe6550000 0 0x60>;
672 interrupts = <GIC_SPI 597 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 598 clocks = <&cpg CPG_MOD 519>,
674 <&cpg CPG_COR 599 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
675 <&scif_clk>; 600 <&scif_clk>;
676 clock-names = "fck", " 601 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac1 0x33>, 602 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
678 <&dmac2 0x33>, 603 <&dmac2 0x33>, <&dmac2 0x32>;
679 dma-names = "tx", "rx" 604 dma-names = "tx", "rx", "tx", "rx";
680 power-domains = <&sysc 605 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
681 resets = <&cpg 519>; 606 resets = <&cpg 519>;
682 status = "disabled"; 607 status = "disabled";
683 }; 608 };
684 609
685 hscif2: serial@e6560000 { 610 hscif2: serial@e6560000 {
686 compatible = "renesas, 611 compatible = "renesas,hscif-r8a77965",
687 "renesas, 612 "renesas,rcar-gen3-hscif",
688 "renesas, 613 "renesas,hscif";
689 reg = <0 0xe6560000 0 614 reg = <0 0xe6560000 0 0x60>;
690 interrupts = <GIC_SPI 615 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&cpg CPG_MOD 616 clocks = <&cpg CPG_MOD 518>,
692 <&cpg CPG_COR 617 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
693 <&scif_clk>; 618 <&scif_clk>;
694 clock-names = "fck", " 619 clock-names = "fck", "brg_int", "scif_clk";
695 dmas = <&dmac1 0x35>, 620 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
696 <&dmac2 0x35>, 621 <&dmac2 0x35>, <&dmac2 0x34>;
697 dma-names = "tx", "rx" 622 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc 623 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
699 resets = <&cpg 518>; 624 resets = <&cpg 518>;
700 status = "disabled"; 625 status = "disabled";
701 }; 626 };
702 627
703 hscif3: serial@e66a0000 { 628 hscif3: serial@e66a0000 {
704 compatible = "renesas, 629 compatible = "renesas,hscif-r8a77965",
705 "renesas, 630 "renesas,rcar-gen3-hscif",
706 "renesas, 631 "renesas,hscif";
707 reg = <0 0xe66a0000 0 632 reg = <0 0xe66a0000 0 0x60>;
708 interrupts = <GIC_SPI 633 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 634 clocks = <&cpg CPG_MOD 517>,
710 <&cpg CPG_COR 635 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
711 <&scif_clk>; 636 <&scif_clk>;
712 clock-names = "fck", " 637 clock-names = "fck", "brg_int", "scif_clk";
713 dmas = <&dmac0 0x37>, 638 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
714 dma-names = "tx", "rx" 639 dma-names = "tx", "rx";
715 power-domains = <&sysc 640 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
716 resets = <&cpg 517>; 641 resets = <&cpg 517>;
717 status = "disabled"; 642 status = "disabled";
718 }; 643 };
719 644
720 hscif4: serial@e66b0000 { 645 hscif4: serial@e66b0000 {
721 compatible = "renesas, 646 compatible = "renesas,hscif-r8a77965",
722 "renesas, 647 "renesas,rcar-gen3-hscif",
723 "renesas, 648 "renesas,hscif";
724 reg = <0 0xe66b0000 0 649 reg = <0 0xe66b0000 0 0x60>;
725 interrupts = <GIC_SPI 650 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 651 clocks = <&cpg CPG_MOD 516>,
727 <&cpg CPG_COR 652 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
728 <&scif_clk>; 653 <&scif_clk>;
729 clock-names = "fck", " 654 clock-names = "fck", "brg_int", "scif_clk";
730 dmas = <&dmac0 0x39>, 655 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
731 dma-names = "tx", "rx" 656 dma-names = "tx", "rx";
732 power-domains = <&sysc 657 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
733 resets = <&cpg 516>; 658 resets = <&cpg 516>;
734 status = "disabled"; 659 status = "disabled";
735 }; 660 };
736 661
737 hsusb: usb@e6590000 { 662 hsusb: usb@e6590000 {
738 compatible = "renesas, 663 compatible = "renesas,usbhs-r8a77965",
739 "renesas, 664 "renesas,rcar-gen3-usbhs";
740 reg = <0 0xe6590000 0 665 reg = <0 0xe6590000 0 0x200>;
741 interrupts = <GIC_SPI 666 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 667 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
743 dmas = <&usb_dmac0 0>, 668 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
744 <&usb_dmac1 0>, 669 <&usb_dmac1 0>, <&usb_dmac1 1>;
745 dma-names = "ch0", "ch 670 dma-names = "ch0", "ch1", "ch2", "ch3";
746 renesas,buswait = <11> 671 renesas,buswait = <11>;
747 phys = <&usb2_phy0 3>; 672 phys = <&usb2_phy0 3>;
748 phy-names = "usb"; 673 phy-names = "usb";
749 power-domains = <&sysc 674 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
750 resets = <&cpg 704>, < 675 resets = <&cpg 704>, <&cpg 703>;
751 status = "disabled"; 676 status = "disabled";
752 }; 677 };
753 678
754 usb_dmac0: dma-controller@e65a 679 usb_dmac0: dma-controller@e65a0000 {
755 compatible = "renesas, 680 compatible = "renesas,r8a77965-usb-dmac",
756 "renesas, 681 "renesas,usb-dmac";
757 reg = <0 0xe65a0000 0 682 reg = <0 0xe65a0000 0 0x100>;
758 interrupts = <GIC_SPI !! 683 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
759 <GIC_SPI !! 684 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
760 interrupt-names = "ch0 685 interrupt-names = "ch0", "ch1";
761 clocks = <&cpg CPG_MOD 686 clocks = <&cpg CPG_MOD 330>;
762 power-domains = <&sysc 687 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
763 resets = <&cpg 330>; 688 resets = <&cpg 330>;
764 #dma-cells = <1>; 689 #dma-cells = <1>;
765 dma-channels = <2>; 690 dma-channels = <2>;
766 }; 691 };
767 692
768 usb_dmac1: dma-controller@e65b 693 usb_dmac1: dma-controller@e65b0000 {
769 compatible = "renesas, 694 compatible = "renesas,r8a77965-usb-dmac",
770 "renesas, 695 "renesas,usb-dmac";
771 reg = <0 0xe65b0000 0 696 reg = <0 0xe65b0000 0 0x100>;
772 interrupts = <GIC_SPI !! 697 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
773 <GIC_SPI !! 698 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
774 interrupt-names = "ch0 699 interrupt-names = "ch0", "ch1";
775 clocks = <&cpg CPG_MOD 700 clocks = <&cpg CPG_MOD 331>;
776 power-domains = <&sysc 701 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
777 resets = <&cpg 331>; 702 resets = <&cpg 331>;
778 #dma-cells = <1>; 703 #dma-cells = <1>;
779 dma-channels = <2>; 704 dma-channels = <2>;
780 }; 705 };
781 706
782 usb3_phy0: usb-phy@e65ee000 { 707 usb3_phy0: usb-phy@e65ee000 {
783 compatible = "renesas, 708 compatible = "renesas,r8a77965-usb3-phy",
784 "renesas, 709 "renesas,rcar-gen3-usb3-phy";
785 reg = <0 0xe65ee000 0 710 reg = <0 0xe65ee000 0 0x90>;
786 clocks = <&cpg CPG_MOD 711 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
787 <&usb_extal_c 712 <&usb_extal_clk>;
788 clock-names = "usb3-if 713 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
789 power-domains = <&sysc 714 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
790 resets = <&cpg 328>; 715 resets = <&cpg 328>;
791 #phy-cells = <0>; 716 #phy-cells = <0>;
792 status = "disabled"; 717 status = "disabled";
793 }; 718 };
794 719
795 arm_cc630p: crypto@e6601000 { <<
796 compatible = "arm,cryp <<
797 interrupts = <GIC_SPI <<
798 reg = <0x0 0xe6601000 <<
799 clocks = <&cpg CPG_MOD <<
800 resets = <&cpg 229>; <<
801 power-domains = <&sysc <<
802 }; <<
803 <<
804 dmac0: dma-controller@e6700000 720 dmac0: dma-controller@e6700000 {
805 compatible = "renesas, 721 compatible = "renesas,dmac-r8a77965",
806 "renesas, 722 "renesas,rcar-dmac";
807 reg = <0 0xe6700000 0 723 reg = <0 0xe6700000 0 0x10000>;
808 interrupts = <GIC_SPI !! 724 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
809 <GIC_SPI !! 725 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
810 <GIC_SPI !! 726 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
811 <GIC_SPI !! 727 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
812 <GIC_SPI !! 728 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
813 <GIC_SPI !! 729 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
814 <GIC_SPI !! 730 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
815 <GIC_SPI !! 731 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
816 <GIC_SPI !! 732 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
817 <GIC_SPI !! 733 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
818 <GIC_SPI !! 734 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
819 <GIC_SPI !! 735 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
820 <GIC_SPI !! 736 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
821 <GIC_SPI !! 737 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
822 <GIC_SPI !! 738 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
823 <GIC_SPI !! 739 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
824 <GIC_SPI !! 740 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "err 741 interrupt-names = "error",
826 "ch0", 742 "ch0", "ch1", "ch2", "ch3",
827 "ch4", 743 "ch4", "ch5", "ch6", "ch7",
828 "ch8", 744 "ch8", "ch9", "ch10", "ch11",
829 "ch12" 745 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 746 clocks = <&cpg CPG_MOD 219>;
831 clock-names = "fck"; 747 clock-names = "fck";
832 power-domains = <&sysc 748 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
833 resets = <&cpg 219>; 749 resets = <&cpg 219>;
834 #dma-cells = <1>; 750 #dma-cells = <1>;
835 dma-channels = <16>; 751 dma-channels = <16>;
836 iommus = <&ipmmu_ds0 0 752 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
837 <&ipmmu_ds0 2>, 753 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
838 <&ipmmu_ds0 4>, 754 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
839 <&ipmmu_ds0 6>, 755 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
840 <&ipmmu_ds0 8>, 756 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
841 <&ipmmu_ds0 10> 757 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
842 <&ipmmu_ds0 12> 758 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
843 <&ipmmu_ds0 14> 759 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
844 }; 760 };
845 761
846 dmac1: dma-controller@e7300000 762 dmac1: dma-controller@e7300000 {
847 compatible = "renesas, 763 compatible = "renesas,dmac-r8a77965",
848 "renesas, 764 "renesas,rcar-dmac";
849 reg = <0 0xe7300000 0 765 reg = <0 0xe7300000 0 0x10000>;
850 interrupts = <GIC_SPI !! 766 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
851 <GIC_SPI !! 767 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
852 <GIC_SPI !! 768 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
853 <GIC_SPI !! 769 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
854 <GIC_SPI !! 770 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
855 <GIC_SPI !! 771 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
856 <GIC_SPI !! 772 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
857 <GIC_SPI !! 773 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
858 <GIC_SPI !! 774 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
859 <GIC_SPI !! 775 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
860 <GIC_SPI !! 776 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
861 <GIC_SPI !! 777 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
862 <GIC_SPI !! 778 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
863 <GIC_SPI !! 779 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
864 <GIC_SPI !! 780 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
865 <GIC_SPI !! 781 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
866 <GIC_SPI !! 782 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
867 interrupt-names = "err 783 interrupt-names = "error",
868 "ch0", 784 "ch0", "ch1", "ch2", "ch3",
869 "ch4", 785 "ch4", "ch5", "ch6", "ch7",
870 "ch8", 786 "ch8", "ch9", "ch10", "ch11",
871 "ch12" 787 "ch12", "ch13", "ch14", "ch15";
872 clocks = <&cpg CPG_MOD 788 clocks = <&cpg CPG_MOD 218>;
873 clock-names = "fck"; 789 clock-names = "fck";
874 power-domains = <&sysc 790 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 resets = <&cpg 218>; 791 resets = <&cpg 218>;
876 #dma-cells = <1>; 792 #dma-cells = <1>;
877 dma-channels = <16>; 793 dma-channels = <16>;
878 iommus = <&ipmmu_ds1 0 794 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
879 <&ipmmu_ds1 2>, 795 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
880 <&ipmmu_ds1 4>, 796 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
881 <&ipmmu_ds1 6>, 797 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
882 <&ipmmu_ds1 8>, 798 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
883 <&ipmmu_ds1 10> 799 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
884 <&ipmmu_ds1 12> 800 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
885 <&ipmmu_ds1 14> 801 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
886 }; 802 };
887 803
888 dmac2: dma-controller@e7310000 804 dmac2: dma-controller@e7310000 {
889 compatible = "renesas, 805 compatible = "renesas,dmac-r8a77965",
890 "renesas, 806 "renesas,rcar-dmac";
891 reg = <0 0xe7310000 0 807 reg = <0 0xe7310000 0 0x10000>;
892 interrupts = <GIC_SPI !! 808 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
893 <GIC_SPI !! 809 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
894 <GIC_SPI !! 810 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
895 <GIC_SPI !! 811 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
896 <GIC_SPI !! 812 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
897 <GIC_SPI !! 813 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
898 <GIC_SPI !! 814 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
899 <GIC_SPI !! 815 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
900 <GIC_SPI !! 816 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
901 <GIC_SPI !! 817 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
902 <GIC_SPI !! 818 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
903 <GIC_SPI !! 819 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
904 <GIC_SPI !! 820 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
905 <GIC_SPI !! 821 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
906 <GIC_SPI !! 822 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
907 <GIC_SPI !! 823 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
908 <GIC_SPI !! 824 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
909 interrupt-names = "err 825 interrupt-names = "error",
910 "ch0", 826 "ch0", "ch1", "ch2", "ch3",
911 "ch4", 827 "ch4", "ch5", "ch6", "ch7",
912 "ch8", 828 "ch8", "ch9", "ch10", "ch11",
913 "ch12" 829 "ch12", "ch13", "ch14", "ch15";
914 clocks = <&cpg CPG_MOD 830 clocks = <&cpg CPG_MOD 217>;
915 clock-names = "fck"; 831 clock-names = "fck";
916 power-domains = <&sysc 832 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
917 resets = <&cpg 217>; 833 resets = <&cpg 217>;
918 #dma-cells = <1>; 834 #dma-cells = <1>;
919 dma-channels = <16>; 835 dma-channels = <16>;
920 iommus = <&ipmmu_ds1 1 836 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
921 <&ipmmu_ds1 18> 837 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
922 <&ipmmu_ds1 20> 838 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
923 <&ipmmu_ds1 22> 839 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
924 <&ipmmu_ds1 24> 840 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
925 <&ipmmu_ds1 26> 841 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
926 <&ipmmu_ds1 28> 842 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
927 <&ipmmu_ds1 30> 843 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
928 }; 844 };
929 845
930 ipmmu_ds0: iommu@e6740000 { !! 846 ipmmu_ds0: mmu@e6740000 {
931 compatible = "renesas, 847 compatible = "renesas,ipmmu-r8a77965";
932 reg = <0 0xe6740000 0 848 reg = <0 0xe6740000 0 0x1000>;
933 renesas,ipmmu-main = < 849 renesas,ipmmu-main = <&ipmmu_mm 0>;
934 power-domains = <&sysc 850 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 851 #iommu-cells = <1>;
936 }; 852 };
937 853
938 ipmmu_ds1: iommu@e7740000 { !! 854 ipmmu_ds1: mmu@e7740000 {
939 compatible = "renesas, 855 compatible = "renesas,ipmmu-r8a77965";
940 reg = <0 0xe7740000 0 856 reg = <0 0xe7740000 0 0x1000>;
941 renesas,ipmmu-main = < 857 renesas,ipmmu-main = <&ipmmu_mm 1>;
942 power-domains = <&sysc 858 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
943 #iommu-cells = <1>; 859 #iommu-cells = <1>;
944 }; 860 };
945 861
946 ipmmu_hc: iommu@e6570000 { !! 862 ipmmu_hc: mmu@e6570000 {
947 compatible = "renesas, 863 compatible = "renesas,ipmmu-r8a77965";
948 reg = <0 0xe6570000 0 864 reg = <0 0xe6570000 0 0x1000>;
949 renesas,ipmmu-main = < 865 renesas,ipmmu-main = <&ipmmu_mm 2>;
950 power-domains = <&sysc 866 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 867 #iommu-cells = <1>;
952 }; 868 };
953 869
954 ipmmu_mm: iommu@e67b0000 { !! 870 ipmmu_mm: mmu@e67b0000 {
955 compatible = "renesas, 871 compatible = "renesas,ipmmu-r8a77965";
956 reg = <0 0xe67b0000 0 872 reg = <0 0xe67b0000 0 0x1000>;
957 interrupts = <GIC_SPI 873 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 874 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
959 power-domains = <&sysc 875 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
960 #iommu-cells = <1>; 876 #iommu-cells = <1>;
961 }; 877 };
962 878
963 ipmmu_mp: iommu@ec670000 { !! 879 ipmmu_mp: mmu@ec670000 {
964 compatible = "renesas, 880 compatible = "renesas,ipmmu-r8a77965";
965 reg = <0 0xec670000 0 881 reg = <0 0xec670000 0 0x1000>;
966 renesas,ipmmu-main = < 882 renesas,ipmmu-main = <&ipmmu_mm 4>;
967 power-domains = <&sysc 883 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
968 #iommu-cells = <1>; 884 #iommu-cells = <1>;
969 }; 885 };
970 886
971 ipmmu_pv0: iommu@fd800000 { !! 887 ipmmu_pv0: mmu@fd800000 {
972 compatible = "renesas, 888 compatible = "renesas,ipmmu-r8a77965";
973 reg = <0 0xfd800000 0 889 reg = <0 0xfd800000 0 0x1000>;
974 renesas,ipmmu-main = < 890 renesas,ipmmu-main = <&ipmmu_mm 6>;
975 power-domains = <&sysc 891 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
976 #iommu-cells = <1>; 892 #iommu-cells = <1>;
977 }; 893 };
978 894
979 ipmmu_rt: iommu@ffc80000 { !! 895 ipmmu_rt: mmu@ffc80000 {
980 compatible = "renesas, 896 compatible = "renesas,ipmmu-r8a77965";
981 reg = <0 0xffc80000 0 897 reg = <0 0xffc80000 0 0x1000>;
982 renesas,ipmmu-main = < 898 renesas,ipmmu-main = <&ipmmu_mm 10>;
983 power-domains = <&sysc 899 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
984 #iommu-cells = <1>; 900 #iommu-cells = <1>;
985 }; 901 };
986 902
987 ipmmu_vc0: iommu@fe6b0000 { !! 903 ipmmu_vc0: mmu@fe6b0000 {
988 compatible = "renesas, 904 compatible = "renesas,ipmmu-r8a77965";
989 reg = <0 0xfe6b0000 0 905 reg = <0 0xfe6b0000 0 0x1000>;
990 renesas,ipmmu-main = < 906 renesas,ipmmu-main = <&ipmmu_mm 12>;
991 power-domains = <&sysc 907 power-domains = <&sysc R8A77965_PD_A3VC>;
992 #iommu-cells = <1>; 908 #iommu-cells = <1>;
993 }; 909 };
994 910
995 ipmmu_vi0: iommu@febd0000 { !! 911 ipmmu_vi0: mmu@febd0000 {
996 compatible = "renesas, 912 compatible = "renesas,ipmmu-r8a77965";
997 reg = <0 0xfebd0000 0 913 reg = <0 0xfebd0000 0 0x1000>;
998 renesas,ipmmu-main = < 914 renesas,ipmmu-main = <&ipmmu_mm 14>;
999 power-domains = <&sysc 915 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1000 #iommu-cells = <1>; 916 #iommu-cells = <1>;
1001 }; 917 };
1002 918
1003 ipmmu_vp0: iommu@fe990000 { !! 919 ipmmu_vp0: mmu@fe990000 {
1004 compatible = "renesas 920 compatible = "renesas,ipmmu-r8a77965";
1005 reg = <0 0xfe990000 0 921 reg = <0 0xfe990000 0 0x1000>;
1006 renesas,ipmmu-main = 922 renesas,ipmmu-main = <&ipmmu_mm 16>;
1007 power-domains = <&sys 923 power-domains = <&sysc R8A77965_PD_A3VP>;
1008 #iommu-cells = <1>; 924 #iommu-cells = <1>;
1009 }; 925 };
1010 926
1011 avb: ethernet@e6800000 { 927 avb: ethernet@e6800000 {
1012 compatible = "renesas 928 compatible = "renesas,etheravb-r8a77965",
1013 "renesas 929 "renesas,etheravb-rcar-gen3";
1014 reg = <0 0xe6800000 0 930 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1015 interrupts = <GIC_SPI 931 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1016 <GIC_SPI 932 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 933 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 934 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 935 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 936 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 937 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 938 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 939 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 940 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 941 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 942 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 943 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 944 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 945 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 946 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 947 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 948 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 949 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 950 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 951 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 952 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 953 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 954 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 955 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1040 interrupt-names = "ch 956 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1041 "ch 957 "ch4", "ch5", "ch6", "ch7",
1042 "ch 958 "ch8", "ch9", "ch10", "ch11",
1043 "ch 959 "ch12", "ch13", "ch14", "ch15",
1044 "ch 960 "ch16", "ch17", "ch18", "ch19",
1045 "ch 961 "ch20", "ch21", "ch22", "ch23",
1046 "ch 962 "ch24";
1047 clocks = <&cpg CPG_MO 963 clocks = <&cpg CPG_MOD 812>;
1048 clock-names = "fck"; <<
1049 power-domains = <&sys 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1050 resets = <&cpg 812>; 965 resets = <&cpg 812>;
1051 phy-mode = "rgmii"; 966 phy-mode = "rgmii";
1052 rx-internal-delay-ps <<
1053 tx-internal-delay-ps <<
1054 iommus = <&ipmmu_ds0 967 iommus = <&ipmmu_ds0 16>;
1055 #address-cells = <1>; 968 #address-cells = <1>;
1056 #size-cells = <0>; 969 #size-cells = <0>;
1057 status = "disabled"; 970 status = "disabled";
1058 }; 971 };
1059 972
1060 can0: can@e6c30000 { 973 can0: can@e6c30000 {
1061 compatible = "renesas 974 compatible = "renesas,can-r8a77965",
1062 "renesas 975 "renesas,rcar-gen3-can";
1063 reg = <0 0xe6c30000 0 976 reg = <0 0xe6c30000 0 0x1000>;
1064 interrupts = <GIC_SPI 977 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&cpg CPG_MO 978 clocks = <&cpg CPG_MOD 916>,
1066 <&cpg CPG_CORE 979 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1067 <&can_clk>; 980 <&can_clk>;
1068 clock-names = "clkp1" 981 clock-names = "clkp1", "clkp2", "can_clk";
1069 assigned-clocks = <&c 982 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1070 assigned-clock-rates 983 assigned-clock-rates = <40000000>;
1071 power-domains = <&sys 984 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1072 resets = <&cpg 916>; 985 resets = <&cpg 916>;
1073 status = "disabled"; 986 status = "disabled";
1074 }; 987 };
1075 988
1076 can1: can@e6c38000 { 989 can1: can@e6c38000 {
1077 compatible = "renesas 990 compatible = "renesas,can-r8a77965",
1078 "renesas 991 "renesas,rcar-gen3-can";
1079 reg = <0 0xe6c38000 0 992 reg = <0 0xe6c38000 0 0x1000>;
1080 interrupts = <GIC_SPI 993 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1081 clocks = <&cpg CPG_MO 994 clocks = <&cpg CPG_MOD 915>,
1082 <&cpg CPG_CORE 995 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1083 <&can_clk>; 996 <&can_clk>;
1084 clock-names = "clkp1" 997 clock-names = "clkp1", "clkp2", "can_clk";
1085 assigned-clocks = <&c 998 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1086 assigned-clock-rates 999 assigned-clock-rates = <40000000>;
1087 power-domains = <&sys 1000 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1088 resets = <&cpg 915>; 1001 resets = <&cpg 915>;
1089 status = "disabled"; 1002 status = "disabled";
1090 }; 1003 };
1091 1004
1092 canfd: can@e66c0000 { 1005 canfd: can@e66c0000 {
1093 compatible = "renesas 1006 compatible = "renesas,r8a77965-canfd",
1094 "renesas 1007 "renesas,rcar-gen3-canfd";
1095 reg = <0 0xe66c0000 0 1008 reg = <0 0xe66c0000 0 0x8000>;
1096 interrupts = <GIC_SPI 1009 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1097 <GIC_SPI 3 1010 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1098 interrupt-names = "ch <<
1099 clocks = <&cpg CPG_MO 1011 clocks = <&cpg CPG_MOD 914>,
1100 <&cpg CPG_CORE 1012 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1101 <&can_clk>; 1013 <&can_clk>;
1102 clock-names = "fck", 1014 clock-names = "fck", "canfd", "can_clk";
1103 assigned-clocks = <&c 1015 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1104 assigned-clock-rates 1016 assigned-clock-rates = <40000000>;
1105 power-domains = <&sys 1017 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1106 resets = <&cpg 914>; 1018 resets = <&cpg 914>;
1107 status = "disabled"; 1019 status = "disabled";
1108 1020
1109 channel0 { 1021 channel0 {
1110 status = "dis 1022 status = "disabled";
1111 }; 1023 };
1112 1024
1113 channel1 { 1025 channel1 {
1114 status = "dis 1026 status = "disabled";
1115 }; 1027 };
1116 }; 1028 };
1117 1029
1118 pwm0: pwm@e6e30000 { 1030 pwm0: pwm@e6e30000 {
1119 compatible = "renesas 1031 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1120 reg = <0 0xe6e30000 0 1032 reg = <0 0xe6e30000 0 8>;
1121 #pwm-cells = <2>; 1033 #pwm-cells = <2>;
1122 clocks = <&cpg CPG_MO 1034 clocks = <&cpg CPG_MOD 523>;
1123 resets = <&cpg 523>; 1035 resets = <&cpg 523>;
1124 power-domains = <&sys 1036 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1125 status = "disabled"; 1037 status = "disabled";
1126 }; 1038 };
1127 1039
1128 pwm1: pwm@e6e31000 { 1040 pwm1: pwm@e6e31000 {
1129 compatible = "renesas 1041 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1130 reg = <0 0xe6e31000 0 1042 reg = <0 0xe6e31000 0 8>;
1131 #pwm-cells = <2>; 1043 #pwm-cells = <2>;
1132 clocks = <&cpg CPG_MO 1044 clocks = <&cpg CPG_MOD 523>;
1133 resets = <&cpg 523>; 1045 resets = <&cpg 523>;
1134 power-domains = <&sys 1046 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1135 status = "disabled"; 1047 status = "disabled";
1136 }; 1048 };
1137 1049
1138 pwm2: pwm@e6e32000 { 1050 pwm2: pwm@e6e32000 {
1139 compatible = "renesas 1051 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1140 reg = <0 0xe6e32000 0 1052 reg = <0 0xe6e32000 0 8>;
1141 #pwm-cells = <2>; 1053 #pwm-cells = <2>;
1142 clocks = <&cpg CPG_MO 1054 clocks = <&cpg CPG_MOD 523>;
1143 resets = <&cpg 523>; 1055 resets = <&cpg 523>;
1144 power-domains = <&sys 1056 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1145 status = "disabled"; 1057 status = "disabled";
1146 }; 1058 };
1147 1059
1148 pwm3: pwm@e6e33000 { 1060 pwm3: pwm@e6e33000 {
1149 compatible = "renesas 1061 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1150 reg = <0 0xe6e33000 0 1062 reg = <0 0xe6e33000 0 8>;
1151 #pwm-cells = <2>; 1063 #pwm-cells = <2>;
1152 clocks = <&cpg CPG_MO 1064 clocks = <&cpg CPG_MOD 523>;
1153 resets = <&cpg 523>; 1065 resets = <&cpg 523>;
1154 power-domains = <&sys 1066 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1155 status = "disabled"; 1067 status = "disabled";
1156 }; 1068 };
1157 1069
1158 pwm4: pwm@e6e34000 { 1070 pwm4: pwm@e6e34000 {
1159 compatible = "renesas 1071 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1160 reg = <0 0xe6e34000 0 1072 reg = <0 0xe6e34000 0 8>;
1161 #pwm-cells = <2>; 1073 #pwm-cells = <2>;
1162 clocks = <&cpg CPG_MO 1074 clocks = <&cpg CPG_MOD 523>;
1163 resets = <&cpg 523>; 1075 resets = <&cpg 523>;
1164 power-domains = <&sys 1076 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1165 status = "disabled"; 1077 status = "disabled";
1166 }; 1078 };
1167 1079
1168 pwm5: pwm@e6e35000 { 1080 pwm5: pwm@e6e35000 {
1169 compatible = "renesas 1081 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1170 reg = <0 0xe6e35000 0 1082 reg = <0 0xe6e35000 0 8>;
1171 #pwm-cells = <2>; 1083 #pwm-cells = <2>;
1172 clocks = <&cpg CPG_MO 1084 clocks = <&cpg CPG_MOD 523>;
1173 resets = <&cpg 523>; 1085 resets = <&cpg 523>;
1174 power-domains = <&sys 1086 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1175 status = "disabled"; 1087 status = "disabled";
1176 }; 1088 };
1177 1089
1178 pwm6: pwm@e6e36000 { 1090 pwm6: pwm@e6e36000 {
1179 compatible = "renesas 1091 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1180 reg = <0 0xe6e36000 0 1092 reg = <0 0xe6e36000 0 8>;
1181 #pwm-cells = <2>; 1093 #pwm-cells = <2>;
1182 clocks = <&cpg CPG_MO 1094 clocks = <&cpg CPG_MOD 523>;
1183 resets = <&cpg 523>; 1095 resets = <&cpg 523>;
1184 power-domains = <&sys 1096 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1185 status = "disabled"; 1097 status = "disabled";
1186 }; 1098 };
1187 1099
1188 scif0: serial@e6e60000 { 1100 scif0: serial@e6e60000 {
1189 compatible = "renesas 1101 compatible = "renesas,scif-r8a77965",
1190 "renesas 1102 "renesas,rcar-gen3-scif", "renesas,scif";
1191 reg = <0 0xe6e60000 0 1103 reg = <0 0xe6e60000 0 64>;
1192 interrupts = <GIC_SPI 1104 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MO 1105 clocks = <&cpg CPG_MOD 207>,
1194 <&cpg CPG_CO 1106 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1195 <&scif_clk>; 1107 <&scif_clk>;
1196 clock-names = "fck", 1108 clock-names = "fck", "brg_int", "scif_clk";
1197 dmas = <&dmac1 0x51>, 1109 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1198 <&dmac2 0x51>, 1110 <&dmac2 0x51>, <&dmac2 0x50>;
1199 dma-names = "tx", "rx 1111 dma-names = "tx", "rx", "tx", "rx";
1200 power-domains = <&sys 1112 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1201 resets = <&cpg 207>; 1113 resets = <&cpg 207>;
1202 status = "disabled"; 1114 status = "disabled";
1203 }; 1115 };
1204 1116
1205 scif1: serial@e6e68000 { 1117 scif1: serial@e6e68000 {
1206 compatible = "renesas 1118 compatible = "renesas,scif-r8a77965",
1207 "renesas 1119 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6e68000 0 1120 reg = <0 0xe6e68000 0 64>;
1209 interrupts = <GIC_SPI 1121 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1122 clocks = <&cpg CPG_MOD 206>,
1211 <&cpg CPG_CO 1123 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1212 <&scif_clk>; 1124 <&scif_clk>;
1213 clock-names = "fck", 1125 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac1 0x53>, 1126 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1215 <&dmac2 0x53>, 1127 <&dmac2 0x53>, <&dmac2 0x52>;
1216 dma-names = "tx", "rx 1128 dma-names = "tx", "rx", "tx", "rx";
1217 power-domains = <&sys 1129 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1218 resets = <&cpg 206>; 1130 resets = <&cpg 206>;
1219 status = "disabled"; 1131 status = "disabled";
1220 }; 1132 };
1221 1133
1222 scif2: serial@e6e88000 { 1134 scif2: serial@e6e88000 {
1223 compatible = "renesas 1135 compatible = "renesas,scif-r8a77965",
1224 "renesas 1136 "renesas,rcar-gen3-scif", "renesas,scif";
1225 reg = <0 0xe6e88000 0 1137 reg = <0 0xe6e88000 0 64>;
1226 interrupts = <GIC_SPI 1138 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MO 1139 clocks = <&cpg CPG_MOD 310>,
1228 <&cpg CPG_CO 1140 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1229 <&scif_clk>; 1141 <&scif_clk>;
1230 clock-names = "fck", 1142 clock-names = "fck", "brg_int", "scif_clk";
1231 dmas = <&dmac1 0x13>, 1143 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1232 <&dmac2 0x13>, 1144 <&dmac2 0x13>, <&dmac2 0x12>;
1233 dma-names = "tx", "rx 1145 dma-names = "tx", "rx", "tx", "rx";
1234 power-domains = <&sys 1146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1235 resets = <&cpg 310>; 1147 resets = <&cpg 310>;
1236 status = "disabled"; 1148 status = "disabled";
1237 }; 1149 };
1238 1150
1239 scif3: serial@e6c50000 { 1151 scif3: serial@e6c50000 {
1240 compatible = "renesas 1152 compatible = "renesas,scif-r8a77965",
1241 "renesas 1153 "renesas,rcar-gen3-scif", "renesas,scif";
1242 reg = <0 0xe6c50000 0 1154 reg = <0 0xe6c50000 0 64>;
1243 interrupts = <GIC_SPI 1155 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1244 clocks = <&cpg CPG_MO 1156 clocks = <&cpg CPG_MOD 204>,
1245 <&cpg CPG_CO 1157 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1246 <&scif_clk>; 1158 <&scif_clk>;
1247 clock-names = "fck", 1159 clock-names = "fck", "brg_int", "scif_clk";
1248 dmas = <&dmac0 0x57>, 1160 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1249 dma-names = "tx", "rx 1161 dma-names = "tx", "rx";
1250 power-domains = <&sys 1162 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1251 resets = <&cpg 204>; 1163 resets = <&cpg 204>;
1252 status = "disabled"; 1164 status = "disabled";
1253 }; 1165 };
1254 1166
1255 scif4: serial@e6c40000 { 1167 scif4: serial@e6c40000 {
1256 compatible = "renesas 1168 compatible = "renesas,scif-r8a77965",
1257 "renesas 1169 "renesas,rcar-gen3-scif", "renesas,scif";
1258 reg = <0 0xe6c40000 0 1170 reg = <0 0xe6c40000 0 64>;
1259 interrupts = <GIC_SPI 1171 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1260 clocks = <&cpg CPG_MO 1172 clocks = <&cpg CPG_MOD 203>,
1261 <&cpg CPG_CO 1173 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1262 <&scif_clk>; 1174 <&scif_clk>;
1263 clock-names = "fck", 1175 clock-names = "fck", "brg_int", "scif_clk";
1264 dmas = <&dmac0 0x59>, 1176 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1265 dma-names = "tx", "rx 1177 dma-names = "tx", "rx";
1266 power-domains = <&sys 1178 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1267 resets = <&cpg 203>; 1179 resets = <&cpg 203>;
1268 status = "disabled"; 1180 status = "disabled";
1269 }; 1181 };
1270 1182
1271 scif5: serial@e6f30000 { 1183 scif5: serial@e6f30000 {
1272 compatible = "renesas 1184 compatible = "renesas,scif-r8a77965",
1273 "renesas 1185 "renesas,rcar-gen3-scif", "renesas,scif";
1274 reg = <0 0xe6f30000 0 1186 reg = <0 0xe6f30000 0 64>;
1275 interrupts = <GIC_SPI 1187 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1276 clocks = <&cpg CPG_MO 1188 clocks = <&cpg CPG_MOD 202>,
1277 <&cpg CPG_CO 1189 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1278 <&scif_clk>; 1190 <&scif_clk>;
1279 clock-names = "fck", 1191 clock-names = "fck", "brg_int", "scif_clk";
1280 dmas = <&dmac1 0x5b>, 1192 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1281 <&dmac2 0x5b>, 1193 <&dmac2 0x5b>, <&dmac2 0x5a>;
1282 dma-names = "tx", "rx 1194 dma-names = "tx", "rx", "tx", "rx";
1283 power-domains = <&sys 1195 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1284 resets = <&cpg 202>; 1196 resets = <&cpg 202>;
1285 status = "disabled"; 1197 status = "disabled";
1286 }; 1198 };
1287 1199
1288 tpu: pwm@e6e80000 { 1200 tpu: pwm@e6e80000 {
1289 compatible = "renesas 1201 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1290 reg = <0 0xe6e80000 0 1202 reg = <0 0xe6e80000 0 0x148>;
1291 interrupts = <GIC_SPI 1203 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1292 clocks = <&cpg CPG_MO 1204 clocks = <&cpg CPG_MOD 304>;
1293 power-domains = <&sys 1205 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1294 resets = <&cpg 304>; 1206 resets = <&cpg 304>;
1295 #pwm-cells = <3>; 1207 #pwm-cells = <3>;
1296 status = "disabled"; 1208 status = "disabled";
1297 }; 1209 };
1298 1210
1299 msiof0: spi@e6e90000 { 1211 msiof0: spi@e6e90000 {
1300 compatible = "renesas 1212 compatible = "renesas,msiof-r8a77965",
1301 "renesas 1213 "renesas,rcar-gen3-msiof";
1302 reg = <0 0xe6e90000 0 1214 reg = <0 0xe6e90000 0 0x0064>;
1303 interrupts = <GIC_SPI 1215 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1304 clocks = <&cpg CPG_MO 1216 clocks = <&cpg CPG_MOD 211>;
1305 dmas = <&dmac1 0x41>, 1217 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1306 <&dmac2 0x41>, 1218 <&dmac2 0x41>, <&dmac2 0x40>;
1307 dma-names = "tx", "rx 1219 dma-names = "tx", "rx", "tx", "rx";
1308 power-domains = <&sys 1220 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1309 resets = <&cpg 211>; 1221 resets = <&cpg 211>;
1310 #address-cells = <1>; 1222 #address-cells = <1>;
1311 #size-cells = <0>; 1223 #size-cells = <0>;
1312 status = "disabled"; 1224 status = "disabled";
1313 }; 1225 };
1314 1226
1315 msiof1: spi@e6ea0000 { 1227 msiof1: spi@e6ea0000 {
1316 compatible = "renesas 1228 compatible = "renesas,msiof-r8a77965",
1317 "renesas 1229 "renesas,rcar-gen3-msiof";
1318 reg = <0 0xe6ea0000 0 1230 reg = <0 0xe6ea0000 0 0x0064>;
1319 interrupts = <GIC_SPI 1231 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MO 1232 clocks = <&cpg CPG_MOD 210>;
1321 dmas = <&dmac1 0x43>, 1233 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1322 <&dmac2 0x43>, 1234 <&dmac2 0x43>, <&dmac2 0x42>;
1323 dma-names = "tx", "rx 1235 dma-names = "tx", "rx", "tx", "rx";
1324 power-domains = <&sys 1236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1325 resets = <&cpg 210>; 1237 resets = <&cpg 210>;
1326 #address-cells = <1>; 1238 #address-cells = <1>;
1327 #size-cells = <0>; 1239 #size-cells = <0>;
1328 status = "disabled"; 1240 status = "disabled";
1329 }; 1241 };
1330 1242
1331 msiof2: spi@e6c00000 { 1243 msiof2: spi@e6c00000 {
1332 compatible = "renesas 1244 compatible = "renesas,msiof-r8a77965",
1333 "renesas 1245 "renesas,rcar-gen3-msiof";
1334 reg = <0 0xe6c00000 0 1246 reg = <0 0xe6c00000 0 0x0064>;
1335 interrupts = <GIC_SPI 1247 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MO 1248 clocks = <&cpg CPG_MOD 209>;
1337 dmas = <&dmac0 0x45>, 1249 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1338 dma-names = "tx", "rx 1250 dma-names = "tx", "rx";
1339 power-domains = <&sys 1251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1340 resets = <&cpg 209>; 1252 resets = <&cpg 209>;
1341 #address-cells = <1>; 1253 #address-cells = <1>;
1342 #size-cells = <0>; 1254 #size-cells = <0>;
1343 status = "disabled"; 1255 status = "disabled";
1344 }; 1256 };
1345 1257
1346 msiof3: spi@e6c10000 { 1258 msiof3: spi@e6c10000 {
1347 compatible = "renesas 1259 compatible = "renesas,msiof-r8a77965",
1348 "renesas 1260 "renesas,rcar-gen3-msiof";
1349 reg = <0 0xe6c10000 0 1261 reg = <0 0xe6c10000 0 0x0064>;
1350 interrupts = <GIC_SPI 1262 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1351 clocks = <&cpg CPG_MO 1263 clocks = <&cpg CPG_MOD 208>;
1352 dmas = <&dmac0 0x47>, 1264 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1353 dma-names = "tx", "rx 1265 dma-names = "tx", "rx";
1354 power-domains = <&sys 1266 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1355 resets = <&cpg 208>; 1267 resets = <&cpg 208>;
1356 #address-cells = <1>; 1268 #address-cells = <1>;
1357 #size-cells = <0>; 1269 #size-cells = <0>;
1358 status = "disabled"; 1270 status = "disabled";
1359 }; 1271 };
1360 1272
1361 vin0: video@e6ef0000 { 1273 vin0: video@e6ef0000 {
1362 compatible = "renesas 1274 compatible = "renesas,vin-r8a77965";
1363 reg = <0 0xe6ef0000 0 1275 reg = <0 0xe6ef0000 0 0x1000>;
1364 interrupts = <GIC_SPI 1276 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MO 1277 clocks = <&cpg CPG_MOD 811>;
1366 power-domains = <&sys 1278 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1367 resets = <&cpg 811>; 1279 resets = <&cpg 811>;
1368 renesas,id = <0>; 1280 renesas,id = <0>;
1369 status = "disabled"; 1281 status = "disabled";
1370 1282
1371 ports { 1283 ports {
1372 #address-cell 1284 #address-cells = <1>;
1373 #size-cells = 1285 #size-cells = <0>;
1374 1286
1375 port@1 { 1287 port@1 {
1376 #addr 1288 #address-cells = <1>;
1377 #size 1289 #size-cells = <0>;
1378 1290
1379 reg = 1291 reg = <1>;
1380 1292
1381 vin0c 1293 vin0csi20: endpoint@0 {
1382 1294 reg = <0>;
1383 1295 remote-endpoint = <&csi20vin0>;
1384 }; 1296 };
1385 vin0c 1297 vin0csi40: endpoint@2 {
1386 1298 reg = <2>;
1387 1299 remote-endpoint = <&csi40vin0>;
1388 }; 1300 };
1389 }; 1301 };
1390 }; 1302 };
1391 }; 1303 };
1392 1304
1393 vin1: video@e6ef1000 { 1305 vin1: video@e6ef1000 {
1394 compatible = "renesas 1306 compatible = "renesas,vin-r8a77965";
1395 reg = <0 0xe6ef1000 0 1307 reg = <0 0xe6ef1000 0 0x1000>;
1396 interrupts = <GIC_SPI 1308 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MO 1309 clocks = <&cpg CPG_MOD 810>;
1398 power-domains = <&sys 1310 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1399 resets = <&cpg 810>; 1311 resets = <&cpg 810>;
1400 renesas,id = <1>; 1312 renesas,id = <1>;
1401 status = "disabled"; 1313 status = "disabled";
1402 1314
1403 ports { 1315 ports {
1404 #address-cell 1316 #address-cells = <1>;
1405 #size-cells = 1317 #size-cells = <0>;
1406 1318
1407 port@1 { 1319 port@1 {
1408 #addr 1320 #address-cells = <1>;
1409 #size 1321 #size-cells = <0>;
1410 1322
1411 reg = 1323 reg = <1>;
1412 1324
1413 vin1c 1325 vin1csi20: endpoint@0 {
1414 1326 reg = <0>;
1415 1327 remote-endpoint = <&csi20vin1>;
1416 }; 1328 };
1417 vin1c 1329 vin1csi40: endpoint@2 {
1418 1330 reg = <2>;
1419 1331 remote-endpoint = <&csi40vin1>;
1420 }; 1332 };
1421 }; 1333 };
1422 }; 1334 };
1423 }; 1335 };
1424 1336
1425 vin2: video@e6ef2000 { 1337 vin2: video@e6ef2000 {
1426 compatible = "renesas 1338 compatible = "renesas,vin-r8a77965";
1427 reg = <0 0xe6ef2000 0 1339 reg = <0 0xe6ef2000 0 0x1000>;
1428 interrupts = <GIC_SPI 1340 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MO 1341 clocks = <&cpg CPG_MOD 809>;
1430 power-domains = <&sys 1342 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1431 resets = <&cpg 809>; 1343 resets = <&cpg 809>;
1432 renesas,id = <2>; 1344 renesas,id = <2>;
1433 status = "disabled"; 1345 status = "disabled";
1434 1346
1435 ports { 1347 ports {
1436 #address-cell 1348 #address-cells = <1>;
1437 #size-cells = 1349 #size-cells = <0>;
1438 1350
1439 port@1 { 1351 port@1 {
1440 #addr 1352 #address-cells = <1>;
1441 #size 1353 #size-cells = <0>;
1442 1354
1443 reg = 1355 reg = <1>;
1444 1356
1445 vin2c 1357 vin2csi20: endpoint@0 {
1446 1358 reg = <0>;
1447 1359 remote-endpoint = <&csi20vin2>;
1448 }; 1360 };
1449 vin2c 1361 vin2csi40: endpoint@2 {
1450 1362 reg = <2>;
1451 1363 remote-endpoint = <&csi40vin2>;
1452 }; 1364 };
1453 }; 1365 };
1454 }; 1366 };
1455 }; 1367 };
1456 1368
1457 vin3: video@e6ef3000 { 1369 vin3: video@e6ef3000 {
1458 compatible = "renesas 1370 compatible = "renesas,vin-r8a77965";
1459 reg = <0 0xe6ef3000 0 1371 reg = <0 0xe6ef3000 0 0x1000>;
1460 interrupts = <GIC_SPI 1372 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MO 1373 clocks = <&cpg CPG_MOD 808>;
1462 power-domains = <&sys 1374 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1463 resets = <&cpg 808>; 1375 resets = <&cpg 808>;
1464 renesas,id = <3>; 1376 renesas,id = <3>;
1465 status = "disabled"; 1377 status = "disabled";
1466 1378
1467 ports { 1379 ports {
1468 #address-cell 1380 #address-cells = <1>;
1469 #size-cells = 1381 #size-cells = <0>;
1470 1382
1471 port@1 { 1383 port@1 {
1472 #addr 1384 #address-cells = <1>;
1473 #size 1385 #size-cells = <0>;
1474 1386
1475 reg = 1387 reg = <1>;
1476 1388
1477 vin3c 1389 vin3csi20: endpoint@0 {
1478 1390 reg = <0>;
1479 1391 remote-endpoint = <&csi20vin3>;
1480 }; 1392 };
1481 vin3c 1393 vin3csi40: endpoint@2 {
1482 1394 reg = <2>;
1483 1395 remote-endpoint = <&csi40vin3>;
1484 }; 1396 };
1485 }; 1397 };
1486 }; 1398 };
1487 }; 1399 };
1488 1400
1489 vin4: video@e6ef4000 { 1401 vin4: video@e6ef4000 {
1490 compatible = "renesas 1402 compatible = "renesas,vin-r8a77965";
1491 reg = <0 0xe6ef4000 0 1403 reg = <0 0xe6ef4000 0 0x1000>;
1492 interrupts = <GIC_SPI 1404 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MO 1405 clocks = <&cpg CPG_MOD 807>;
1494 power-domains = <&sys 1406 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1495 resets = <&cpg 807>; 1407 resets = <&cpg 807>;
1496 renesas,id = <4>; 1408 renesas,id = <4>;
1497 status = "disabled"; 1409 status = "disabled";
1498 1410
1499 ports { 1411 ports {
1500 #address-cell 1412 #address-cells = <1>;
1501 #size-cells = 1413 #size-cells = <0>;
1502 1414
1503 port@1 { 1415 port@1 {
1504 #addr 1416 #address-cells = <1>;
1505 #size 1417 #size-cells = <0>;
1506 1418
1507 reg = 1419 reg = <1>;
1508 1420
1509 vin4c 1421 vin4csi20: endpoint@0 {
1510 1422 reg = <0>;
1511 1423 remote-endpoint = <&csi20vin4>;
1512 }; 1424 };
1513 vin4c 1425 vin4csi40: endpoint@2 {
1514 1426 reg = <2>;
1515 1427 remote-endpoint = <&csi40vin4>;
1516 }; 1428 };
1517 }; 1429 };
1518 }; 1430 };
1519 }; 1431 };
1520 1432
1521 vin5: video@e6ef5000 { 1433 vin5: video@e6ef5000 {
1522 compatible = "renesas 1434 compatible = "renesas,vin-r8a77965";
1523 reg = <0 0xe6ef5000 0 1435 reg = <0 0xe6ef5000 0 0x1000>;
1524 interrupts = <GIC_SPI 1436 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MO 1437 clocks = <&cpg CPG_MOD 806>;
1526 power-domains = <&sys 1438 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1527 resets = <&cpg 806>; 1439 resets = <&cpg 806>;
1528 renesas,id = <5>; 1440 renesas,id = <5>;
1529 status = "disabled"; 1441 status = "disabled";
1530 1442
1531 ports { 1443 ports {
1532 #address-cell 1444 #address-cells = <1>;
1533 #size-cells = 1445 #size-cells = <0>;
1534 1446
1535 port@1 { 1447 port@1 {
1536 #addr 1448 #address-cells = <1>;
1537 #size 1449 #size-cells = <0>;
1538 1450
1539 reg = 1451 reg = <1>;
1540 1452
1541 vin5c 1453 vin5csi20: endpoint@0 {
1542 1454 reg = <0>;
1543 1455 remote-endpoint = <&csi20vin5>;
1544 }; 1456 };
1545 vin5c 1457 vin5csi40: endpoint@2 {
1546 1458 reg = <2>;
1547 1459 remote-endpoint = <&csi40vin5>;
1548 }; 1460 };
1549 }; 1461 };
1550 }; 1462 };
1551 }; 1463 };
1552 1464
1553 vin6: video@e6ef6000 { 1465 vin6: video@e6ef6000 {
1554 compatible = "renesas 1466 compatible = "renesas,vin-r8a77965";
1555 reg = <0 0xe6ef6000 0 1467 reg = <0 0xe6ef6000 0 0x1000>;
1556 interrupts = <GIC_SPI 1468 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1557 clocks = <&cpg CPG_MO 1469 clocks = <&cpg CPG_MOD 805>;
1558 power-domains = <&sys 1470 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1559 resets = <&cpg 805>; 1471 resets = <&cpg 805>;
1560 renesas,id = <6>; 1472 renesas,id = <6>;
1561 status = "disabled"; 1473 status = "disabled";
1562 1474
1563 ports { 1475 ports {
1564 #address-cell 1476 #address-cells = <1>;
1565 #size-cells = 1477 #size-cells = <0>;
1566 1478
1567 port@1 { 1479 port@1 {
1568 #addr 1480 #address-cells = <1>;
1569 #size 1481 #size-cells = <0>;
1570 1482
1571 reg = 1483 reg = <1>;
1572 1484
1573 vin6c 1485 vin6csi20: endpoint@0 {
1574 1486 reg = <0>;
1575 1487 remote-endpoint = <&csi20vin6>;
1576 }; 1488 };
1577 vin6c 1489 vin6csi40: endpoint@2 {
1578 1490 reg = <2>;
1579 1491 remote-endpoint = <&csi40vin6>;
1580 }; 1492 };
1581 }; 1493 };
1582 }; 1494 };
1583 }; 1495 };
1584 1496
1585 vin7: video@e6ef7000 { 1497 vin7: video@e6ef7000 {
1586 compatible = "renesas 1498 compatible = "renesas,vin-r8a77965";
1587 reg = <0 0xe6ef7000 0 1499 reg = <0 0xe6ef7000 0 0x1000>;
1588 interrupts = <GIC_SPI 1500 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1589 clocks = <&cpg CPG_MO 1501 clocks = <&cpg CPG_MOD 804>;
1590 power-domains = <&sys 1502 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1591 resets = <&cpg 804>; 1503 resets = <&cpg 804>;
1592 renesas,id = <7>; 1504 renesas,id = <7>;
1593 status = "disabled"; 1505 status = "disabled";
1594 1506
1595 ports { 1507 ports {
1596 #address-cell 1508 #address-cells = <1>;
1597 #size-cells = 1509 #size-cells = <0>;
1598 1510
1599 port@1 { 1511 port@1 {
1600 #addr 1512 #address-cells = <1>;
1601 #size 1513 #size-cells = <0>;
1602 1514
1603 reg = 1515 reg = <1>;
1604 1516
1605 vin7c 1517 vin7csi20: endpoint@0 {
1606 1518 reg = <0>;
1607 1519 remote-endpoint = <&csi20vin7>;
1608 }; 1520 };
1609 vin7c 1521 vin7csi40: endpoint@2 {
1610 1522 reg = <2>;
1611 1523 remote-endpoint = <&csi40vin7>;
1612 }; 1524 };
1613 }; 1525 };
1614 }; 1526 };
1615 }; 1527 };
1616 1528
1617 drif00: rif@e6f40000 { <<
1618 compatible = "renesas <<
1619 "renesas <<
1620 reg = <0 0xe6f40000 0 <<
1621 interrupts = <GIC_SPI <<
1622 clocks = <&cpg CPG_MO <<
1623 clock-names = "fck"; <<
1624 dmas = <&dmac1 0x20>, <<
1625 dma-names = "rx", "rx <<
1626 power-domains = <&sys <<
1627 resets = <&cpg 515>; <<
1628 renesas,bonding = <&d <<
1629 status = "disabled"; <<
1630 }; <<
1631 <<
1632 drif01: rif@e6f50000 { <<
1633 compatible = "renesas <<
1634 "renesas <<
1635 reg = <0 0xe6f50000 0 <<
1636 interrupts = <GIC_SPI <<
1637 clocks = <&cpg CPG_MO <<
1638 clock-names = "fck"; <<
1639 dmas = <&dmac1 0x22>, <<
1640 dma-names = "rx", "rx <<
1641 power-domains = <&sys <<
1642 resets = <&cpg 514>; <<
1643 renesas,bonding = <&d <<
1644 status = "disabled"; <<
1645 }; <<
1646 <<
1647 drif10: rif@e6f60000 { <<
1648 compatible = "renesas <<
1649 "renesas <<
1650 reg = <0 0xe6f60000 0 <<
1651 interrupts = <GIC_SPI <<
1652 clocks = <&cpg CPG_MO <<
1653 clock-names = "fck"; <<
1654 dmas = <&dmac1 0x24>, <<
1655 dma-names = "rx", "rx <<
1656 power-domains = <&sys <<
1657 resets = <&cpg 513>; <<
1658 renesas,bonding = <&d <<
1659 status = "disabled"; <<
1660 }; <<
1661 <<
1662 drif11: rif@e6f70000 { <<
1663 compatible = "renesas <<
1664 "renesas <<
1665 reg = <0 0xe6f70000 0 <<
1666 interrupts = <GIC_SPI <<
1667 clocks = <&cpg CPG_MO <<
1668 clock-names = "fck"; <<
1669 dmas = <&dmac1 0x26>, <<
1670 dma-names = "rx", "rx <<
1671 power-domains = <&sys <<
1672 resets = <&cpg 512>; <<
1673 renesas,bonding = <&d <<
1674 status = "disabled"; <<
1675 }; <<
1676 <<
1677 drif20: rif@e6f80000 { <<
1678 compatible = "renesas <<
1679 "renesas <<
1680 reg = <0 0xe6f80000 0 <<
1681 interrupts = <GIC_SPI <<
1682 clocks = <&cpg CPG_MO <<
1683 clock-names = "fck"; <<
1684 dmas = <&dmac1 0x28>, <<
1685 dma-names = "rx", "rx <<
1686 power-domains = <&sys <<
1687 resets = <&cpg 511>; <<
1688 renesas,bonding = <&d <<
1689 status = "disabled"; <<
1690 }; <<
1691 <<
1692 drif21: rif@e6f90000 { <<
1693 compatible = "renesas <<
1694 "renesas <<
1695 reg = <0 0xe6f90000 0 <<
1696 interrupts = <GIC_SPI <<
1697 clocks = <&cpg CPG_MO <<
1698 clock-names = "fck"; <<
1699 dmas = <&dmac1 0x2a>, <<
1700 dma-names = "rx", "rx <<
1701 power-domains = <&sys <<
1702 resets = <&cpg 510>; <<
1703 renesas,bonding = <&d <<
1704 status = "disabled"; <<
1705 }; <<
1706 <<
1707 drif30: rif@e6fa0000 { <<
1708 compatible = "renesas <<
1709 "renesas <<
1710 reg = <0 0xe6fa0000 0 <<
1711 interrupts = <GIC_SPI <<
1712 clocks = <&cpg CPG_MO <<
1713 clock-names = "fck"; <<
1714 dmas = <&dmac1 0x2c>, <<
1715 dma-names = "rx", "rx <<
1716 power-domains = <&sys <<
1717 resets = <&cpg 509>; <<
1718 renesas,bonding = <&d <<
1719 status = "disabled"; <<
1720 }; <<
1721 <<
1722 drif31: rif@e6fb0000 { <<
1723 compatible = "renesas <<
1724 "renesas <<
1725 reg = <0 0xe6fb0000 0 <<
1726 interrupts = <GIC_SPI <<
1727 clocks = <&cpg CPG_MO <<
1728 clock-names = "fck"; <<
1729 dmas = <&dmac1 0x2e>, <<
1730 dma-names = "rx", "rx <<
1731 power-domains = <&sys <<
1732 resets = <&cpg 508>; <<
1733 renesas,bonding = <&d <<
1734 status = "disabled"; <<
1735 }; <<
1736 <<
1737 rcar_sound: sound@ec500000 { 1529 rcar_sound: sound@ec500000 {
1738 /* 1530 /*
1739 * #sound-dai-cells i !! 1531 * #sound-dai-cells is required
1740 * 1532 *
1741 * Single DAI : #soun 1533 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1742 * Multi DAI : #soun 1534 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1743 */ 1535 */
1744 /* 1536 /*
1745 * #clock-cells is re 1537 * #clock-cells is required for audio_clkout0/1/2/3
1746 * 1538 *
1747 * clkout : #cl 1539 * clkout : #clock-cells = <0>; <&rcar_sound>;
1748 * clkout0/1/2/3: #cl 1540 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1749 */ 1541 */
1750 compatible = "renesas !! 1542 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1751 reg = <0 0xec500000 0 !! 1543 reg = <0 0xec500000 0 0x1000>, /* SCU */
1752 <0 0xec5a0000 0 !! 1544 <0 0xec5a0000 0 0x100>, /* ADG */
1753 <0 0xec540000 0 !! 1545 <0 0xec540000 0 0x1000>, /* SSIU */
1754 <0 0xec541000 0 !! 1546 <0 0xec541000 0 0x280>, /* SSI */
1755 <0 0xec760000 0 !! 1547 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1756 reg-names = "scu", "a 1548 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1757 1549
1758 clocks = <&cpg CPG_MO 1550 clocks = <&cpg CPG_MOD 1005>,
1759 <&cpg CPG_MO 1551 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1760 <&cpg CPG_MO 1552 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1761 <&cpg CPG_MO 1553 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1762 <&cpg CPG_MO 1554 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1763 <&cpg CPG_MO 1555 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1764 <&cpg CPG_MO 1556 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1765 <&cpg CPG_MO 1557 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1766 <&cpg CPG_MO 1558 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1767 <&cpg CPG_MO 1559 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1768 <&cpg CPG_MO 1560 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1769 <&cpg CPG_MO 1561 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1770 <&cpg CPG_MO 1562 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1771 <&cpg CPG_MO 1563 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1772 <&audio_clk_ 1564 <&audio_clk_a>, <&audio_clk_b>,
1773 <&audio_clk_ 1565 <&audio_clk_c>,
1774 <&cpg CPG_MO !! 1566 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1775 clock-names = "ssi-al 1567 clock-names = "ssi-all",
1776 "ssi.9" 1568 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1777 "ssi.5" 1569 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1778 "ssi.1" 1570 "ssi.1", "ssi.0",
1779 "src.9" 1571 "src.9", "src.8", "src.7", "src.6",
1780 "src.5" 1572 "src.5", "src.4", "src.3", "src.2",
1781 "src.1" 1573 "src.1", "src.0",
1782 "mix.1" 1574 "mix.1", "mix.0",
1783 "ctu.1" 1575 "ctu.1", "ctu.0",
1784 "dvc.0" 1576 "dvc.0", "dvc.1",
1785 "clk_a" 1577 "clk_a", "clk_b", "clk_c", "clk_i";
1786 power-domains = <&sys 1578 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1787 resets = <&cpg 1005>, 1579 resets = <&cpg 1005>,
1788 <&cpg 1006>, 1580 <&cpg 1006>, <&cpg 1007>,
1789 <&cpg 1008>, 1581 <&cpg 1008>, <&cpg 1009>,
1790 <&cpg 1010>, 1582 <&cpg 1010>, <&cpg 1011>,
1791 <&cpg 1012>, 1583 <&cpg 1012>, <&cpg 1013>,
1792 <&cpg 1014>, 1584 <&cpg 1014>, <&cpg 1015>;
1793 reset-names = "ssi-al 1585 reset-names = "ssi-all",
1794 "ssi.9" 1586 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1795 "ssi.5" 1587 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1796 "ssi.1" 1588 "ssi.1", "ssi.0";
1797 status = "disabled"; 1589 status = "disabled";
1798 1590
1799 rcar_sound,dvc { 1591 rcar_sound,dvc {
1800 dvc0: dvc-0 { 1592 dvc0: dvc-0 {
1801 dmas 1593 dmas = <&audma1 0xbc>;
1802 dma-n 1594 dma-names = "tx";
1803 }; 1595 };
1804 dvc1: dvc-1 { 1596 dvc1: dvc-1 {
1805 dmas 1597 dmas = <&audma1 0xbe>;
1806 dma-n 1598 dma-names = "tx";
1807 }; 1599 };
1808 }; 1600 };
1809 1601
1810 rcar_sound,mix { 1602 rcar_sound,mix {
1811 mix0: mix-0 { 1603 mix0: mix-0 { };
1812 mix1: mix-1 { 1604 mix1: mix-1 { };
1813 }; 1605 };
1814 1606
1815 rcar_sound,ctu { 1607 rcar_sound,ctu {
1816 ctu00: ctu-0 1608 ctu00: ctu-0 { };
1817 ctu01: ctu-1 1609 ctu01: ctu-1 { };
1818 ctu02: ctu-2 1610 ctu02: ctu-2 { };
1819 ctu03: ctu-3 1611 ctu03: ctu-3 { };
1820 ctu10: ctu-4 1612 ctu10: ctu-4 { };
1821 ctu11: ctu-5 1613 ctu11: ctu-5 { };
1822 ctu12: ctu-6 1614 ctu12: ctu-6 { };
1823 ctu13: ctu-7 1615 ctu13: ctu-7 { };
1824 }; 1616 };
1825 1617
1826 rcar_sound,src { 1618 rcar_sound,src {
1827 src0: src-0 { 1619 src0: src-0 {
1828 inter 1620 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas 1621 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1830 dma-n 1622 dma-names = "rx", "tx";
1831 }; 1623 };
1832 src1: src-1 { 1624 src1: src-1 {
1833 inter 1625 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas 1626 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1835 dma-n 1627 dma-names = "rx", "tx";
1836 }; 1628 };
1837 src2: src-2 { 1629 src2: src-2 {
1838 inter 1630 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas 1631 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1840 dma-n 1632 dma-names = "rx", "tx";
1841 }; 1633 };
1842 src3: src-3 { 1634 src3: src-3 {
1843 inter 1635 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas 1636 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1845 dma-n 1637 dma-names = "rx", "tx";
1846 }; 1638 };
1847 src4: src-4 { 1639 src4: src-4 {
1848 inter 1640 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas 1641 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1850 dma-n 1642 dma-names = "rx", "tx";
1851 }; 1643 };
1852 src5: src-5 { 1644 src5: src-5 {
1853 inter 1645 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas 1646 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1855 dma-n 1647 dma-names = "rx", "tx";
1856 }; 1648 };
1857 src6: src-6 { 1649 src6: src-6 {
1858 inter 1650 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas 1651 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1860 dma-n 1652 dma-names = "rx", "tx";
1861 }; 1653 };
1862 src7: src-7 { 1654 src7: src-7 {
1863 inter 1655 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1864 dmas 1656 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1865 dma-n 1657 dma-names = "rx", "tx";
1866 }; 1658 };
1867 src8: src-8 { 1659 src8: src-8 {
1868 inter 1660 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1869 dmas 1661 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1870 dma-n 1662 dma-names = "rx", "tx";
1871 }; 1663 };
1872 src9: src-9 { 1664 src9: src-9 {
1873 inter 1665 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1874 dmas 1666 dmas = <&audma0 0x97>, <&audma1 0xba>;
1875 dma-n 1667 dma-names = "rx", "tx";
1876 }; 1668 };
1877 }; 1669 };
1878 1670
1879 rcar_sound,ssiu { 1671 rcar_sound,ssiu {
1880 ssiu00: ssiu- 1672 ssiu00: ssiu-0 {
1881 dmas 1673 dmas = <&audma0 0x15>, <&audma1 0x16>;
1882 dma-n 1674 dma-names = "rx", "tx";
1883 }; 1675 };
1884 ssiu01: ssiu- 1676 ssiu01: ssiu-1 {
1885 dmas 1677 dmas = <&audma0 0x35>, <&audma1 0x36>;
1886 dma-n 1678 dma-names = "rx", "tx";
1887 }; 1679 };
1888 ssiu02: ssiu- 1680 ssiu02: ssiu-2 {
1889 dmas 1681 dmas = <&audma0 0x37>, <&audma1 0x38>;
1890 dma-n 1682 dma-names = "rx", "tx";
1891 }; 1683 };
1892 ssiu03: ssiu- 1684 ssiu03: ssiu-3 {
1893 dmas 1685 dmas = <&audma0 0x47>, <&audma1 0x48>;
1894 dma-n 1686 dma-names = "rx", "tx";
1895 }; 1687 };
1896 ssiu04: ssiu- 1688 ssiu04: ssiu-4 {
1897 dmas 1689 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1898 dma-n 1690 dma-names = "rx", "tx";
1899 }; 1691 };
1900 ssiu05: ssiu- 1692 ssiu05: ssiu-5 {
1901 dmas 1693 dmas = <&audma0 0x43>, <&audma1 0x44>;
1902 dma-n 1694 dma-names = "rx", "tx";
1903 }; 1695 };
1904 ssiu06: ssiu- 1696 ssiu06: ssiu-6 {
1905 dmas 1697 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1906 dma-n 1698 dma-names = "rx", "tx";
1907 }; 1699 };
1908 ssiu07: ssiu- 1700 ssiu07: ssiu-7 {
1909 dmas 1701 dmas = <&audma0 0x53>, <&audma1 0x54>;
1910 dma-n 1702 dma-names = "rx", "tx";
1911 }; 1703 };
1912 ssiu10: ssiu- 1704 ssiu10: ssiu-8 {
1913 dmas 1705 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1914 dma-n 1706 dma-names = "rx", "tx";
1915 }; 1707 };
1916 ssiu11: ssiu- 1708 ssiu11: ssiu-9 {
1917 dmas 1709 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1918 dma-n 1710 dma-names = "rx", "tx";
1919 }; 1711 };
1920 ssiu12: ssiu- 1712 ssiu12: ssiu-10 {
1921 dmas 1713 dmas = <&audma0 0x57>, <&audma1 0x58>;
1922 dma-n 1714 dma-names = "rx", "tx";
1923 }; 1715 };
1924 ssiu13: ssiu- 1716 ssiu13: ssiu-11 {
1925 dmas 1717 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1926 dma-n 1718 dma-names = "rx", "tx";
1927 }; 1719 };
1928 ssiu14: ssiu- 1720 ssiu14: ssiu-12 {
1929 dmas 1721 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1930 dma-n 1722 dma-names = "rx", "tx";
1931 }; 1723 };
1932 ssiu15: ssiu- 1724 ssiu15: ssiu-13 {
1933 dmas 1725 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1934 dma-n 1726 dma-names = "rx", "tx";
1935 }; 1727 };
1936 ssiu16: ssiu- 1728 ssiu16: ssiu-14 {
1937 dmas 1729 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1938 dma-n 1730 dma-names = "rx", "tx";
1939 }; 1731 };
1940 ssiu17: ssiu- 1732 ssiu17: ssiu-15 {
1941 dmas 1733 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1942 dma-n 1734 dma-names = "rx", "tx";
1943 }; 1735 };
1944 ssiu20: ssiu- 1736 ssiu20: ssiu-16 {
1945 dmas 1737 dmas = <&audma0 0x63>, <&audma1 0x64>;
1946 dma-n 1738 dma-names = "rx", "tx";
1947 }; 1739 };
1948 ssiu21: ssiu- 1740 ssiu21: ssiu-17 {
1949 dmas 1741 dmas = <&audma0 0x67>, <&audma1 0x68>;
1950 dma-n 1742 dma-names = "rx", "tx";
1951 }; 1743 };
1952 ssiu22: ssiu- 1744 ssiu22: ssiu-18 {
1953 dmas 1745 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1954 dma-n 1746 dma-names = "rx", "tx";
1955 }; 1747 };
1956 ssiu23: ssiu- 1748 ssiu23: ssiu-19 {
1957 dmas 1749 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1958 dma-n 1750 dma-names = "rx", "tx";
1959 }; 1751 };
1960 ssiu24: ssiu- 1752 ssiu24: ssiu-20 {
1961 dmas 1753 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1962 dma-n 1754 dma-names = "rx", "tx";
1963 }; 1755 };
1964 ssiu25: ssiu- 1756 ssiu25: ssiu-21 {
1965 dmas 1757 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1966 dma-n 1758 dma-names = "rx", "tx";
1967 }; 1759 };
1968 ssiu26: ssiu- 1760 ssiu26: ssiu-22 {
1969 dmas 1761 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1970 dma-n 1762 dma-names = "rx", "tx";
1971 }; 1763 };
1972 ssiu27: ssiu- 1764 ssiu27: ssiu-23 {
1973 dmas 1765 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1974 dma-n 1766 dma-names = "rx", "tx";
1975 }; 1767 };
1976 ssiu30: ssiu- 1768 ssiu30: ssiu-24 {
1977 dmas 1769 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1978 dma-n 1770 dma-names = "rx", "tx";
1979 }; 1771 };
1980 ssiu31: ssiu- 1772 ssiu31: ssiu-25 {
1981 dmas 1773 dmas = <&audma0 0x21>, <&audma1 0x22>;
1982 dma-n 1774 dma-names = "rx", "tx";
1983 }; 1775 };
1984 ssiu32: ssiu- 1776 ssiu32: ssiu-26 {
1985 dmas 1777 dmas = <&audma0 0x23>, <&audma1 0x24>;
1986 dma-n 1778 dma-names = "rx", "tx";
1987 }; 1779 };
1988 ssiu33: ssiu- 1780 ssiu33: ssiu-27 {
1989 dmas 1781 dmas = <&audma0 0x25>, <&audma1 0x26>;
1990 dma-n 1782 dma-names = "rx", "tx";
1991 }; 1783 };
1992 ssiu34: ssiu- 1784 ssiu34: ssiu-28 {
1993 dmas 1785 dmas = <&audma0 0x27>, <&audma1 0x28>;
1994 dma-n 1786 dma-names = "rx", "tx";
1995 }; 1787 };
1996 ssiu35: ssiu- 1788 ssiu35: ssiu-29 {
1997 dmas 1789 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1998 dma-n 1790 dma-names = "rx", "tx";
1999 }; 1791 };
2000 ssiu36: ssiu- 1792 ssiu36: ssiu-30 {
2001 dmas 1793 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2002 dma-n 1794 dma-names = "rx", "tx";
2003 }; 1795 };
2004 ssiu37: ssiu- 1796 ssiu37: ssiu-31 {
2005 dmas 1797 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2006 dma-n 1798 dma-names = "rx", "tx";
2007 }; 1799 };
2008 ssiu40: ssiu- 1800 ssiu40: ssiu-32 {
2009 dmas !! 1801 dmas = <&audma0 0x71>, <&audma1 0x72>;
2010 dma-n 1802 dma-names = "rx", "tx";
2011 }; 1803 };
2012 ssiu41: ssiu- 1804 ssiu41: ssiu-33 {
2013 dmas 1805 dmas = <&audma0 0x17>, <&audma1 0x18>;
2014 dma-n 1806 dma-names = "rx", "tx";
2015 }; 1807 };
2016 ssiu42: ssiu- 1808 ssiu42: ssiu-34 {
2017 dmas 1809 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2018 dma-n 1810 dma-names = "rx", "tx";
2019 }; 1811 };
2020 ssiu43: ssiu- 1812 ssiu43: ssiu-35 {
2021 dmas 1813 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2022 dma-n 1814 dma-names = "rx", "tx";
2023 }; 1815 };
2024 ssiu44: ssiu- 1816 ssiu44: ssiu-36 {
2025 dmas 1817 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2026 dma-n 1818 dma-names = "rx", "tx";
2027 }; 1819 };
2028 ssiu45: ssiu- 1820 ssiu45: ssiu-37 {
2029 dmas 1821 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2030 dma-n 1822 dma-names = "rx", "tx";
2031 }; 1823 };
2032 ssiu46: ssiu- 1824 ssiu46: ssiu-38 {
2033 dmas 1825 dmas = <&audma0 0x31>, <&audma1 0x32>;
2034 dma-n 1826 dma-names = "rx", "tx";
2035 }; 1827 };
2036 ssiu47: ssiu- 1828 ssiu47: ssiu-39 {
2037 dmas 1829 dmas = <&audma0 0x33>, <&audma1 0x34>;
2038 dma-n 1830 dma-names = "rx", "tx";
2039 }; 1831 };
2040 ssiu50: ssiu- 1832 ssiu50: ssiu-40 {
2041 dmas 1833 dmas = <&audma0 0x73>, <&audma1 0x74>;
2042 dma-n 1834 dma-names = "rx", "tx";
2043 }; 1835 };
2044 ssiu60: ssiu- 1836 ssiu60: ssiu-41 {
2045 dmas 1837 dmas = <&audma0 0x75>, <&audma1 0x76>;
2046 dma-n 1838 dma-names = "rx", "tx";
2047 }; 1839 };
2048 ssiu70: ssiu- 1840 ssiu70: ssiu-42 {
2049 dmas 1841 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2050 dma-n 1842 dma-names = "rx", "tx";
2051 }; 1843 };
2052 ssiu80: ssiu- 1844 ssiu80: ssiu-43 {
2053 dmas 1845 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2054 dma-n 1846 dma-names = "rx", "tx";
2055 }; 1847 };
2056 ssiu90: ssiu- 1848 ssiu90: ssiu-44 {
2057 dmas 1849 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2058 dma-n 1850 dma-names = "rx", "tx";
2059 }; 1851 };
2060 ssiu91: ssiu- 1852 ssiu91: ssiu-45 {
2061 dmas 1853 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2062 dma-n 1854 dma-names = "rx", "tx";
2063 }; 1855 };
2064 ssiu92: ssiu- 1856 ssiu92: ssiu-46 {
2065 dmas 1857 dmas = <&audma0 0x81>, <&audma1 0x82>;
2066 dma-n 1858 dma-names = "rx", "tx";
2067 }; 1859 };
2068 ssiu93: ssiu- 1860 ssiu93: ssiu-47 {
2069 dmas 1861 dmas = <&audma0 0x83>, <&audma1 0x84>;
2070 dma-n 1862 dma-names = "rx", "tx";
2071 }; 1863 };
2072 ssiu94: ssiu- 1864 ssiu94: ssiu-48 {
2073 dmas 1865 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2074 dma-n 1866 dma-names = "rx", "tx";
2075 }; 1867 };
2076 ssiu95: ssiu- 1868 ssiu95: ssiu-49 {
2077 dmas 1869 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2078 dma-n 1870 dma-names = "rx", "tx";
2079 }; 1871 };
2080 ssiu96: ssiu- 1872 ssiu96: ssiu-50 {
2081 dmas 1873 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2082 dma-n 1874 dma-names = "rx", "tx";
2083 }; 1875 };
2084 ssiu97: ssiu- 1876 ssiu97: ssiu-51 {
2085 dmas 1877 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2086 dma-n 1878 dma-names = "rx", "tx";
2087 }; 1879 };
2088 }; 1880 };
2089 1881
2090 rcar_sound,ssi { 1882 rcar_sound,ssi {
2091 ssi0: ssi-0 { 1883 ssi0: ssi-0 {
2092 inter 1884 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2093 dmas 1885 dmas = <&audma0 0x01>, <&audma1 0x02>;
2094 dma-n 1886 dma-names = "rx", "tx";
2095 }; 1887 };
2096 ssi1: ssi-1 { 1888 ssi1: ssi-1 {
2097 inter 1889 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2098 dmas 1890 dmas = <&audma0 0x03>, <&audma1 0x04>;
2099 dma-n 1891 dma-names = "rx", "tx";
2100 }; 1892 };
2101 ssi2: ssi-2 { 1893 ssi2: ssi-2 {
2102 inter 1894 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2103 dmas 1895 dmas = <&audma0 0x05>, <&audma1 0x06>;
2104 dma-n 1896 dma-names = "rx", "tx";
2105 }; 1897 };
2106 ssi3: ssi-3 { 1898 ssi3: ssi-3 {
2107 inter 1899 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2108 dmas 1900 dmas = <&audma0 0x07>, <&audma1 0x08>;
2109 dma-n 1901 dma-names = "rx", "tx";
2110 }; 1902 };
2111 ssi4: ssi-4 { 1903 ssi4: ssi-4 {
2112 inter 1904 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2113 dmas 1905 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2114 dma-n 1906 dma-names = "rx", "tx";
2115 }; 1907 };
2116 ssi5: ssi-5 { 1908 ssi5: ssi-5 {
2117 inter 1909 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2118 dmas 1910 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2119 dma-n 1911 dma-names = "rx", "tx";
2120 }; 1912 };
2121 ssi6: ssi-6 { 1913 ssi6: ssi-6 {
2122 inter 1914 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2123 dmas 1915 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2124 dma-n 1916 dma-names = "rx", "tx";
2125 }; 1917 };
2126 ssi7: ssi-7 { 1918 ssi7: ssi-7 {
2127 inter 1919 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2128 dmas 1920 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2129 dma-n 1921 dma-names = "rx", "tx";
2130 }; 1922 };
2131 ssi8: ssi-8 { 1923 ssi8: ssi-8 {
2132 inter 1924 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2133 dmas 1925 dmas = <&audma0 0x11>, <&audma1 0x12>;
2134 dma-n 1926 dma-names = "rx", "tx";
2135 }; 1927 };
2136 ssi9: ssi-9 { 1928 ssi9: ssi-9 {
2137 inter 1929 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2138 dmas 1930 dmas = <&audma0 0x13>, <&audma1 0x14>;
2139 dma-n 1931 dma-names = "rx", "tx";
2140 }; 1932 };
2141 }; 1933 };
2142 }; 1934 };
2143 1935
2144 mlp: mlp@ec520000 { <<
2145 compatible = "renesas <<
2146 "renesas <<
2147 reg = <0 0xec520000 0 <<
2148 interrupts = <GIC_SPI <<
2149 <GIC_SPI 385 <<
2150 clocks = <&cpg CPG_MO <<
2151 power-domains = <&sys <<
2152 resets = <&cpg 802>; <<
2153 status = "disabled"; <<
2154 }; <<
2155 <<
2156 audma0: dma-controller@ec7000 1936 audma0: dma-controller@ec700000 {
2157 compatible = "renesas 1937 compatible = "renesas,dmac-r8a77965",
2158 "renesas 1938 "renesas,rcar-dmac";
2159 reg = <0 0xec700000 0 1939 reg = <0 0xec700000 0 0x10000>;
2160 interrupts = <GIC_SPI !! 1940 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
2161 <GIC_SPI !! 1941 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
2162 <GIC_SPI !! 1942 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
2163 <GIC_SPI !! 1943 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
2164 <GIC_SPI !! 1944 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
2165 <GIC_SPI !! 1945 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
2166 <GIC_SPI !! 1946 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
2167 <GIC_SPI !! 1947 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
2168 <GIC_SPI !! 1948 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
2169 <GIC_SPI !! 1949 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
2170 <GIC_SPI !! 1950 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
2171 <GIC_SPI !! 1951 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
2172 <GIC_SPI !! 1952 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
2173 <GIC_SPI !! 1953 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
2174 <GIC_SPI !! 1954 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
2175 <GIC_SPI !! 1955 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
2176 <GIC_SPI !! 1956 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2177 interrupt-names = "er 1957 interrupt-names = "error",
2178 "ch0" 1958 "ch0", "ch1", "ch2", "ch3",
2179 "ch4" 1959 "ch4", "ch5", "ch6", "ch7",
2180 "ch8" 1960 "ch8", "ch9", "ch10", "ch11",
2181 "ch12 1961 "ch12", "ch13", "ch14", "ch15";
2182 clocks = <&cpg CPG_MO 1962 clocks = <&cpg CPG_MOD 502>;
2183 clock-names = "fck"; 1963 clock-names = "fck";
2184 power-domains = <&sys 1964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2185 resets = <&cpg 502>; 1965 resets = <&cpg 502>;
2186 #dma-cells = <1>; 1966 #dma-cells = <1>;
2187 dma-channels = <16>; 1967 dma-channels = <16>;
2188 iommus = <&ipmmu_mp 0 <<
2189 <&ipmmu_mp 2 <<
2190 <&ipmmu_mp 4 <<
2191 <&ipmmu_mp 6 <<
2192 <&ipmmu_mp 8 <<
2193 <&ipmmu_mp 1 <<
2194 <&ipmmu_mp 1 <<
2195 <&ipmmu_mp 1 <<
2196 }; 1968 };
2197 1969
2198 audma1: dma-controller@ec7200 1970 audma1: dma-controller@ec720000 {
2199 compatible = "renesas 1971 compatible = "renesas,dmac-r8a77965",
2200 "renesas 1972 "renesas,rcar-dmac";
2201 reg = <0 0xec720000 0 1973 reg = <0 0xec720000 0 0x10000>;
2202 interrupts = <GIC_SPI !! 1974 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
2203 <GIC_SPI !! 1975 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
2204 <GIC_SPI !! 1976 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
2205 <GIC_SPI !! 1977 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
2206 <GIC_SPI !! 1978 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
2207 <GIC_SPI !! 1979 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
2208 <GIC_SPI !! 1980 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
2209 <GIC_SPI !! 1981 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
2210 <GIC_SPI !! 1982 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
2211 <GIC_SPI !! 1983 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
2212 <GIC_SPI !! 1984 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
2213 <GIC_SPI !! 1985 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
2214 <GIC_SPI !! 1986 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
2215 <GIC_SPI !! 1987 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
2216 <GIC_SPI !! 1988 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
2217 <GIC_SPI !! 1989 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
2218 <GIC_SPI !! 1990 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2219 interrupt-names = "er 1991 interrupt-names = "error",
2220 "ch0" 1992 "ch0", "ch1", "ch2", "ch3",
2221 "ch4" 1993 "ch4", "ch5", "ch6", "ch7",
2222 "ch8" 1994 "ch8", "ch9", "ch10", "ch11",
2223 "ch12 1995 "ch12", "ch13", "ch14", "ch15";
2224 clocks = <&cpg CPG_MO 1996 clocks = <&cpg CPG_MOD 501>;
2225 clock-names = "fck"; 1997 clock-names = "fck";
2226 power-domains = <&sys 1998 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2227 resets = <&cpg 501>; 1999 resets = <&cpg 501>;
2228 #dma-cells = <1>; 2000 #dma-cells = <1>;
2229 dma-channels = <16>; 2001 dma-channels = <16>;
2230 iommus = <&ipmmu_mp 1 <<
2231 <&ipmmu_mp 1 <<
2232 <&ipmmu_mp 2 <<
2233 <&ipmmu_mp 2 <<
2234 <&ipmmu_mp 2 <<
2235 <&ipmmu_mp 2 <<
2236 <&ipmmu_mp 2 <<
2237 <&ipmmu_mp 3 <<
2238 }; 2002 };
2239 2003
2240 xhci0: usb@ee000000 { 2004 xhci0: usb@ee000000 {
2241 compatible = "renesas 2005 compatible = "renesas,xhci-r8a77965",
2242 "renesas 2006 "renesas,rcar-gen3-xhci";
2243 reg = <0 0xee000000 0 2007 reg = <0 0xee000000 0 0xc00>;
2244 interrupts = <GIC_SPI 2008 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2245 clocks = <&cpg CPG_MO 2009 clocks = <&cpg CPG_MOD 328>;
2246 power-domains = <&sys 2010 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2247 resets = <&cpg 328>; 2011 resets = <&cpg 328>;
2248 status = "disabled"; 2012 status = "disabled";
2249 }; 2013 };
2250 2014
2251 usb3_peri0: usb@ee020000 { 2015 usb3_peri0: usb@ee020000 {
2252 compatible = "renesas 2016 compatible = "renesas,r8a77965-usb3-peri",
2253 "renesas 2017 "renesas,rcar-gen3-usb3-peri";
2254 reg = <0 0xee020000 0 2018 reg = <0 0xee020000 0 0x400>;
2255 interrupts = <GIC_SPI 2019 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2256 clocks = <&cpg CPG_MO 2020 clocks = <&cpg CPG_MOD 328>;
2257 power-domains = <&sys 2021 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2258 resets = <&cpg 328>; 2022 resets = <&cpg 328>;
2259 status = "disabled"; 2023 status = "disabled";
2260 }; 2024 };
2261 2025
2262 ohci0: usb@ee080000 { 2026 ohci0: usb@ee080000 {
2263 compatible = "generic 2027 compatible = "generic-ohci";
2264 reg = <0 0xee080000 0 2028 reg = <0 0xee080000 0 0x100>;
2265 interrupts = <GIC_SPI 2029 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2266 clocks = <&cpg CPG_MO 2030 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2267 phys = <&usb2_phy0 1> 2031 phys = <&usb2_phy0 1>;
2268 phy-names = "usb"; 2032 phy-names = "usb";
2269 power-domains = <&sys 2033 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2270 resets = <&cpg 703>, 2034 resets = <&cpg 703>, <&cpg 704>;
2271 status = "disabled"; 2035 status = "disabled";
2272 }; 2036 };
2273 2037
2274 ohci1: usb@ee0a0000 { 2038 ohci1: usb@ee0a0000 {
2275 compatible = "generic 2039 compatible = "generic-ohci";
2276 reg = <0 0xee0a0000 0 2040 reg = <0 0xee0a0000 0 0x100>;
2277 interrupts = <GIC_SPI 2041 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2278 clocks = <&cpg CPG_MO 2042 clocks = <&cpg CPG_MOD 702>;
2279 phys = <&usb2_phy1 1> 2043 phys = <&usb2_phy1 1>;
2280 phy-names = "usb"; 2044 phy-names = "usb";
2281 power-domains = <&sys 2045 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2282 resets = <&cpg 702>; 2046 resets = <&cpg 702>;
2283 status = "disabled"; 2047 status = "disabled";
2284 }; 2048 };
2285 2049
2286 ehci0: usb@ee080100 { 2050 ehci0: usb@ee080100 {
2287 compatible = "generic 2051 compatible = "generic-ehci";
2288 reg = <0 0xee080100 0 2052 reg = <0 0xee080100 0 0x100>;
2289 interrupts = <GIC_SPI 2053 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2290 clocks = <&cpg CPG_MO 2054 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2291 phys = <&usb2_phy0 2> 2055 phys = <&usb2_phy0 2>;
2292 phy-names = "usb"; 2056 phy-names = "usb";
2293 companion = <&ohci0>; 2057 companion = <&ohci0>;
2294 power-domains = <&sys 2058 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2295 resets = <&cpg 703>, 2059 resets = <&cpg 703>, <&cpg 704>;
2296 status = "disabled"; 2060 status = "disabled";
2297 }; 2061 };
2298 2062
2299 ehci1: usb@ee0a0100 { 2063 ehci1: usb@ee0a0100 {
2300 compatible = "generic 2064 compatible = "generic-ehci";
2301 reg = <0 0xee0a0100 0 2065 reg = <0 0xee0a0100 0 0x100>;
2302 interrupts = <GIC_SPI 2066 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2303 clocks = <&cpg CPG_MO 2067 clocks = <&cpg CPG_MOD 702>;
2304 phys = <&usb2_phy1 2> 2068 phys = <&usb2_phy1 2>;
2305 phy-names = "usb"; 2069 phy-names = "usb";
2306 companion = <&ohci1>; 2070 companion = <&ohci1>;
2307 power-domains = <&sys 2071 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2308 resets = <&cpg 702>; 2072 resets = <&cpg 702>;
2309 status = "disabled"; 2073 status = "disabled";
2310 }; 2074 };
2311 2075
2312 usb2_phy0: usb-phy@ee080200 { 2076 usb2_phy0: usb-phy@ee080200 {
2313 compatible = "renesas 2077 compatible = "renesas,usb2-phy-r8a77965",
2314 "renesas 2078 "renesas,rcar-gen3-usb2-phy";
2315 reg = <0 0xee080200 0 2079 reg = <0 0xee080200 0 0x700>;
2316 interrupts = <GIC_SPI 2080 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MO 2081 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2318 power-domains = <&sys 2082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2319 resets = <&cpg 703>, 2083 resets = <&cpg 703>, <&cpg 704>;
2320 #phy-cells = <1>; 2084 #phy-cells = <1>;
2321 status = "disabled"; 2085 status = "disabled";
2322 }; 2086 };
2323 2087
2324 usb2_phy1: usb-phy@ee0a0200 { 2088 usb2_phy1: usb-phy@ee0a0200 {
2325 compatible = "renesas 2089 compatible = "renesas,usb2-phy-r8a77965",
2326 "renesas 2090 "renesas,rcar-gen3-usb2-phy";
2327 reg = <0 0xee0a0200 0 2091 reg = <0 0xee0a0200 0 0x700>;
2328 clocks = <&cpg CPG_MO 2092 clocks = <&cpg CPG_MOD 702>;
2329 power-domains = <&sys 2093 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2330 resets = <&cpg 702>; 2094 resets = <&cpg 702>;
2331 #phy-cells = <1>; 2095 #phy-cells = <1>;
2332 status = "disabled"; 2096 status = "disabled";
2333 }; 2097 };
2334 2098
2335 sdhi0: mmc@ee100000 { !! 2099 sdhi0: sd@ee100000 {
2336 compatible = "renesas 2100 compatible = "renesas,sdhi-r8a77965",
2337 "renesas 2101 "renesas,rcar-gen3-sdhi";
2338 reg = <0 0xee100000 0 2102 reg = <0 0xee100000 0 0x2000>;
2339 interrupts = <GIC_SPI 2103 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2340 clocks = <&cpg CPG_MO !! 2104 clocks = <&cpg CPG_MOD 314>;
2341 clock-names = "core", <<
2342 max-frequency = <2000 2105 max-frequency = <200000000>;
2343 power-domains = <&sys 2106 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2344 resets = <&cpg 314>; 2107 resets = <&cpg 314>;
2345 iommus = <&ipmmu_ds1 <<
2346 status = "disabled"; 2108 status = "disabled";
2347 }; 2109 };
2348 2110
2349 sdhi1: mmc@ee120000 { !! 2111 sdhi1: sd@ee120000 {
2350 compatible = "renesas 2112 compatible = "renesas,sdhi-r8a77965",
2351 "renesas 2113 "renesas,rcar-gen3-sdhi";
2352 reg = <0 0xee120000 0 2114 reg = <0 0xee120000 0 0x2000>;
2353 interrupts = <GIC_SPI 2115 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MO !! 2116 clocks = <&cpg CPG_MOD 313>;
2355 clock-names = "core", <<
2356 max-frequency = <2000 2117 max-frequency = <200000000>;
2357 power-domains = <&sys 2118 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2358 resets = <&cpg 313>; 2119 resets = <&cpg 313>;
2359 iommus = <&ipmmu_ds1 <<
2360 status = "disabled"; 2120 status = "disabled";
2361 }; 2121 };
2362 2122
2363 sdhi2: mmc@ee140000 { !! 2123 sdhi2: sd@ee140000 {
2364 compatible = "renesas 2124 compatible = "renesas,sdhi-r8a77965",
2365 "renesas 2125 "renesas,rcar-gen3-sdhi";
2366 reg = <0 0xee140000 0 2126 reg = <0 0xee140000 0 0x2000>;
2367 interrupts = <GIC_SPI 2127 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2368 clocks = <&cpg CPG_MO !! 2128 clocks = <&cpg CPG_MOD 312>;
2369 clock-names = "core", <<
2370 max-frequency = <2000 2129 max-frequency = <200000000>;
2371 power-domains = <&sys 2130 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2372 resets = <&cpg 312>; 2131 resets = <&cpg 312>;
2373 iommus = <&ipmmu_ds1 <<
2374 status = "disabled"; 2132 status = "disabled";
2375 }; 2133 };
2376 2134
2377 sdhi3: mmc@ee160000 { !! 2135 sdhi3: sd@ee160000 {
2378 compatible = "renesas 2136 compatible = "renesas,sdhi-r8a77965",
2379 "renesas 2137 "renesas,rcar-gen3-sdhi";
2380 reg = <0 0xee160000 0 2138 reg = <0 0xee160000 0 0x2000>;
2381 interrupts = <GIC_SPI 2139 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2382 clocks = <&cpg CPG_MO !! 2140 clocks = <&cpg CPG_MOD 311>;
2383 clock-names = "core", <<
2384 max-frequency = <2000 2141 max-frequency = <200000000>;
2385 power-domains = <&sys 2142 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2386 resets = <&cpg 311>; 2143 resets = <&cpg 311>;
2387 iommus = <&ipmmu_ds1 <<
2388 status = "disabled"; <<
2389 }; <<
2390 <<
2391 rpc: spi@ee200000 { <<
2392 compatible = "renesas <<
2393 "renesas <<
2394 reg = <0 0xee200000 0 <<
2395 <0 0x08000000 0 <<
2396 <0 0xee208000 0 <<
2397 reg-names = "regs", " <<
2398 interrupts = <GIC_SPI <<
2399 clocks = <&cpg CPG_MO <<
2400 power-domains = <&sys <<
2401 resets = <&cpg 917>; <<
2402 #address-cells = <1>; <<
2403 #size-cells = <0>; <<
2404 status = "disabled"; 2144 status = "disabled";
2405 }; 2145 };
2406 2146
2407 sata: sata@ee300000 { 2147 sata: sata@ee300000 {
2408 compatible = "renesas 2148 compatible = "renesas,sata-r8a77965",
2409 "renesas 2149 "renesas,rcar-gen3-sata";
2410 reg = <0 0xee300000 0 2150 reg = <0 0xee300000 0 0x200000>;
2411 interrupts = <GIC_SPI 2151 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2412 clocks = <&cpg CPG_MO 2152 clocks = <&cpg CPG_MOD 815>;
2413 power-domains = <&sys 2153 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2414 resets = <&cpg 815>; 2154 resets = <&cpg 815>;
2415 iommus = <&ipmmu_hc 2 <<
2416 status = "disabled"; 2155 status = "disabled";
2417 }; 2156 };
2418 2157
2419 gic: interrupt-controller@f10 2158 gic: interrupt-controller@f1010000 {
2420 compatible = "arm,gic 2159 compatible = "arm,gic-400";
2421 #interrupt-cells = <3 2160 #interrupt-cells = <3>;
2422 #address-cells = <0>; 2161 #address-cells = <0>;
2423 interrupt-controller; 2162 interrupt-controller;
2424 reg = <0x0 0xf1010000 2163 reg = <0x0 0xf1010000 0 0x1000>,
2425 <0x0 0xf1020000 2164 <0x0 0xf1020000 0 0x20000>,
2426 <0x0 0xf1040000 2165 <0x0 0xf1040000 0 0x20000>,
2427 <0x0 0xf1060000 2166 <0x0 0xf1060000 0 0x20000>;
2428 interrupts = <GIC_PPI 2167 interrupts = <GIC_PPI 9
2429 (GIC_ 2168 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2430 clocks = <&cpg CPG_MO 2169 clocks = <&cpg CPG_MOD 408>;
2431 clock-names = "clk"; 2170 clock-names = "clk";
2432 power-domains = <&sys 2171 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2433 resets = <&cpg 408>; 2172 resets = <&cpg 408>;
2434 }; 2173 };
2435 2174
2436 pciec0: pcie@fe000000 { 2175 pciec0: pcie@fe000000 {
2437 compatible = "renesas 2176 compatible = "renesas,pcie-r8a77965",
2438 "renesas 2177 "renesas,pcie-rcar-gen3";
2439 reg = <0 0xfe000000 0 2178 reg = <0 0xfe000000 0 0x80000>;
2440 #address-cells = <3>; 2179 #address-cells = <3>;
2441 #size-cells = <2>; 2180 #size-cells = <2>;
2442 bus-range = <0x00 0xf 2181 bus-range = <0x00 0xff>;
2443 device_type = "pci"; 2182 device_type = "pci";
2444 ranges = <0x01000000 !! 2183 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2445 <0x02000000 !! 2184 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2446 <0x02000000 !! 2185 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2447 <0x42000000 !! 2186 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2448 /* Map all possible D !! 2187 /* Map all possible DDR as inbound ranges */
2449 dma-ranges = <0x42000 !! 2188 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2450 interrupts = <GIC_SPI 2189 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 117 2190 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2452 <GIC_SPI 118 2191 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2453 #interrupt-cells = <1 2192 #interrupt-cells = <1>;
2454 interrupt-map-mask = 2193 interrupt-map-mask = <0 0 0 0>;
2455 interrupt-map = <0 0 2194 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2456 clocks = <&cpg CPG_MO 2195 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2457 clock-names = "pcie", 2196 clock-names = "pcie", "pcie_bus";
2458 power-domains = <&sys 2197 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2459 resets = <&cpg 319>; 2198 resets = <&cpg 319>;
2460 iommu-map = <0 &ipmmu <<
2461 iommu-map-mask = <0>; <<
2462 status = "disabled"; 2199 status = "disabled";
2463 }; 2200 };
2464 2201
2465 pciec1: pcie@ee800000 { 2202 pciec1: pcie@ee800000 {
2466 compatible = "renesas 2203 compatible = "renesas,pcie-r8a77965",
2467 "renesas 2204 "renesas,pcie-rcar-gen3";
2468 reg = <0 0xee800000 0 2205 reg = <0 0xee800000 0 0x80000>;
2469 #address-cells = <3>; 2206 #address-cells = <3>;
2470 #size-cells = <2>; 2207 #size-cells = <2>;
2471 bus-range = <0x00 0xf 2208 bus-range = <0x00 0xff>;
2472 device_type = "pci"; 2209 device_type = "pci";
2473 ranges = <0x01000000 !! 2210 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2474 <0x02000000 !! 2211 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2475 <0x02000000 !! 2212 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2476 <0x42000000 !! 2213 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2477 /* Map all possible D !! 2214 /* Map all possible DDR as inbound ranges */
2478 dma-ranges = <0x42000 !! 2215 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2479 interrupts = <GIC_SPI 2216 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2480 <GIC_SPI 149 2217 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 150 2218 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2482 #interrupt-cells = <1 2219 #interrupt-cells = <1>;
2483 interrupt-map-mask = 2220 interrupt-map-mask = <0 0 0 0>;
2484 interrupt-map = <0 0 2221 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MO 2222 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2486 clock-names = "pcie", 2223 clock-names = "pcie", "pcie_bus";
2487 power-domains = <&sys 2224 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2488 resets = <&cpg 318>; 2225 resets = <&cpg 318>;
2489 iommu-map = <0 &ipmmu <<
2490 iommu-map-mask = <0>; <<
2491 status = "disabled"; 2226 status = "disabled";
2492 }; 2227 };
2493 2228
2494 fdp1@fe940000 { 2229 fdp1@fe940000 {
2495 compatible = "renesas 2230 compatible = "renesas,fdp1";
2496 reg = <0 0xfe940000 0 2231 reg = <0 0xfe940000 0 0x2400>;
2497 interrupts = <GIC_SPI 2232 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2498 clocks = <&cpg CPG_MO 2233 clocks = <&cpg CPG_MOD 119>;
2499 power-domains = <&sys 2234 power-domains = <&sysc R8A77965_PD_A3VP>;
2500 resets = <&cpg 119>; 2235 resets = <&cpg 119>;
2501 renesas,fcp = <&fcpf0 2236 renesas,fcp = <&fcpf0>;
2502 }; 2237 };
2503 2238
2504 fcpf0: fcp@fe950000 { 2239 fcpf0: fcp@fe950000 {
2505 compatible = "renesas 2240 compatible = "renesas,fcpf";
2506 reg = <0 0xfe950000 0 2241 reg = <0 0xfe950000 0 0x200>;
2507 clocks = <&cpg CPG_MO 2242 clocks = <&cpg CPG_MOD 615>;
2508 power-domains = <&sys 2243 power-domains = <&sysc R8A77965_PD_A3VP>;
2509 resets = <&cpg 615>; 2244 resets = <&cpg 615>;
2510 iommus = <&ipmmu_vp0 <<
2511 }; 2245 };
2512 2246
2513 vspb: vsp@fe960000 { 2247 vspb: vsp@fe960000 {
2514 compatible = "renesas 2248 compatible = "renesas,vsp2";
2515 reg = <0 0xfe960000 0 2249 reg = <0 0xfe960000 0 0x8000>;
2516 interrupts = <GIC_SPI 2250 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2517 clocks = <&cpg CPG_MO 2251 clocks = <&cpg CPG_MOD 626>;
2518 power-domains = <&sys 2252 power-domains = <&sysc R8A77965_PD_A3VP>;
2519 resets = <&cpg 626>; 2253 resets = <&cpg 626>;
2520 2254
2521 renesas,fcp = <&fcpvb 2255 renesas,fcp = <&fcpvb0>;
2522 }; 2256 };
2523 2257
2524 vspi0: vsp@fe9a0000 { 2258 vspi0: vsp@fe9a0000 {
2525 compatible = "renesas 2259 compatible = "renesas,vsp2";
2526 reg = <0 0xfe9a0000 0 2260 reg = <0 0xfe9a0000 0 0x8000>;
2527 interrupts = <GIC_SPI 2261 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2528 clocks = <&cpg CPG_MO 2262 clocks = <&cpg CPG_MOD 631>;
2529 power-domains = <&sys 2263 power-domains = <&sysc R8A77965_PD_A3VP>;
2530 resets = <&cpg 631>; 2264 resets = <&cpg 631>;
2531 2265
2532 renesas,fcp = <&fcpvi 2266 renesas,fcp = <&fcpvi0>;
2533 }; 2267 };
2534 2268
2535 vspd0: vsp@fea20000 { 2269 vspd0: vsp@fea20000 {
2536 compatible = "renesas 2270 compatible = "renesas,vsp2";
2537 reg = <0 0xfea20000 0 2271 reg = <0 0xfea20000 0 0x5000>;
2538 interrupts = <GIC_SPI 2272 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2539 clocks = <&cpg CPG_MO 2273 clocks = <&cpg CPG_MOD 623>;
2540 power-domains = <&sys 2274 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2541 resets = <&cpg 623>; 2275 resets = <&cpg 623>;
2542 2276
2543 renesas,fcp = <&fcpvd 2277 renesas,fcp = <&fcpvd0>;
2544 }; 2278 };
2545 2279
2546 vspd1: vsp@fea28000 { 2280 vspd1: vsp@fea28000 {
2547 compatible = "renesas 2281 compatible = "renesas,vsp2";
2548 reg = <0 0xfea28000 0 2282 reg = <0 0xfea28000 0 0x5000>;
2549 interrupts = <GIC_SPI 2283 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2550 clocks = <&cpg CPG_MO 2284 clocks = <&cpg CPG_MOD 622>;
2551 power-domains = <&sys 2285 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2552 resets = <&cpg 622>; 2286 resets = <&cpg 622>;
2553 2287
2554 renesas,fcp = <&fcpvd 2288 renesas,fcp = <&fcpvd1>;
2555 }; 2289 };
2556 2290
2557 fcpvb0: fcp@fe96f000 { 2291 fcpvb0: fcp@fe96f000 {
2558 compatible = "renesas 2292 compatible = "renesas,fcpv";
2559 reg = <0 0xfe96f000 0 2293 reg = <0 0xfe96f000 0 0x200>;
2560 clocks = <&cpg CPG_MO 2294 clocks = <&cpg CPG_MOD 607>;
2561 power-domains = <&sys 2295 power-domains = <&sysc R8A77965_PD_A3VP>;
2562 resets = <&cpg 607>; 2296 resets = <&cpg 607>;
2563 iommus = <&ipmmu_vp0 <<
2564 }; 2297 };
2565 2298
2566 fcpvd0: fcp@fea27000 { 2299 fcpvd0: fcp@fea27000 {
2567 compatible = "renesas 2300 compatible = "renesas,fcpv";
2568 reg = <0 0xfea27000 0 2301 reg = <0 0xfea27000 0 0x200>;
2569 clocks = <&cpg CPG_MO 2302 clocks = <&cpg CPG_MOD 603>;
2570 power-domains = <&sys 2303 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2571 resets = <&cpg 603>; 2304 resets = <&cpg 603>;
2572 iommus = <&ipmmu_vi0 <<
2573 }; 2305 };
2574 2306
2575 fcpvd1: fcp@fea2f000 { 2307 fcpvd1: fcp@fea2f000 {
2576 compatible = "renesas 2308 compatible = "renesas,fcpv";
2577 reg = <0 0xfea2f000 0 2309 reg = <0 0xfea2f000 0 0x200>;
2578 clocks = <&cpg CPG_MO 2310 clocks = <&cpg CPG_MOD 602>;
2579 power-domains = <&sys 2311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2580 resets = <&cpg 602>; 2312 resets = <&cpg 602>;
2581 iommus = <&ipmmu_vi0 <<
2582 }; 2313 };
2583 2314
2584 fcpvi0: fcp@fe9af000 { 2315 fcpvi0: fcp@fe9af000 {
2585 compatible = "renesas 2316 compatible = "renesas,fcpv";
2586 reg = <0 0xfe9af000 0 2317 reg = <0 0xfe9af000 0 0x200>;
2587 clocks = <&cpg CPG_MO 2318 clocks = <&cpg CPG_MOD 611>;
2588 power-domains = <&sys 2319 power-domains = <&sysc R8A77965_PD_A3VP>;
2589 resets = <&cpg 611>; 2320 resets = <&cpg 611>;
2590 iommus = <&ipmmu_vp0 <<
2591 }; <<
2592 <<
2593 cmm0: cmm@fea40000 { <<
2594 compatible = "renesas <<
2595 "renesas <<
2596 reg = <0 0xfea40000 0 <<
2597 power-domains = <&sys <<
2598 clocks = <&cpg CPG_MO <<
2599 resets = <&cpg 711>; <<
2600 }; <<
2601 <<
2602 cmm1: cmm@fea50000 { <<
2603 compatible = "renesas <<
2604 "renesas <<
2605 reg = <0 0xfea50000 0 <<
2606 power-domains = <&sys <<
2607 clocks = <&cpg CPG_MO <<
2608 resets = <&cpg 710>; <<
2609 }; <<
2610 <<
2611 cmm3: cmm@fea70000 { <<
2612 compatible = "renesas <<
2613 "renesas <<
2614 reg = <0 0xfea70000 0 <<
2615 power-domains = <&sys <<
2616 clocks = <&cpg CPG_MO <<
2617 resets = <&cpg 708>; <<
2618 }; 2321 };
2619 2322
2620 csi20: csi2@fea80000 { 2323 csi20: csi2@fea80000 {
2621 compatible = "renesas 2324 compatible = "renesas,r8a77965-csi2";
2622 reg = <0 0xfea80000 0 2325 reg = <0 0xfea80000 0 0x10000>;
2623 interrupts = <GIC_SPI 2326 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2624 clocks = <&cpg CPG_MO 2327 clocks = <&cpg CPG_MOD 714>;
2625 power-domains = <&sys 2328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2626 resets = <&cpg 714>; 2329 resets = <&cpg 714>;
2627 status = "disabled"; 2330 status = "disabled";
2628 2331
2629 ports { 2332 ports {
2630 #address-cell 2333 #address-cells = <1>;
2631 #size-cells = 2334 #size-cells = <0>;
2632 2335
2633 port@0 { <<
2634 reg = <<
2635 }; <<
2636 <<
2637 port@1 { 2336 port@1 {
2638 #addr 2337 #address-cells = <1>;
2639 #size 2338 #size-cells = <0>;
2640 2339
2641 reg = 2340 reg = <1>;
2642 2341
2643 csi20 2342 csi20vin0: endpoint@0 {
2644 2343 reg = <0>;
2645 2344 remote-endpoint = <&vin0csi20>;
2646 }; 2345 };
2647 csi20 2346 csi20vin1: endpoint@1 {
2648 2347 reg = <1>;
2649 2348 remote-endpoint = <&vin1csi20>;
2650 }; 2349 };
2651 csi20 2350 csi20vin2: endpoint@2 {
2652 2351 reg = <2>;
2653 2352 remote-endpoint = <&vin2csi20>;
2654 }; 2353 };
2655 csi20 2354 csi20vin3: endpoint@3 {
2656 2355 reg = <3>;
2657 2356 remote-endpoint = <&vin3csi20>;
2658 }; 2357 };
2659 csi20 2358 csi20vin4: endpoint@4 {
2660 2359 reg = <4>;
2661 2360 remote-endpoint = <&vin4csi20>;
2662 }; 2361 };
2663 csi20 2362 csi20vin5: endpoint@5 {
2664 2363 reg = <5>;
2665 2364 remote-endpoint = <&vin5csi20>;
2666 }; 2365 };
2667 csi20 2366 csi20vin6: endpoint@6 {
2668 2367 reg = <6>;
2669 2368 remote-endpoint = <&vin6csi20>;
2670 }; 2369 };
2671 csi20 2370 csi20vin7: endpoint@7 {
2672 2371 reg = <7>;
2673 2372 remote-endpoint = <&vin7csi20>;
2674 }; 2373 };
2675 }; 2374 };
2676 }; 2375 };
2677 }; 2376 };
2678 2377
2679 csi40: csi2@feaa0000 { 2378 csi40: csi2@feaa0000 {
2680 compatible = "renesas 2379 compatible = "renesas,r8a77965-csi2";
2681 reg = <0 0xfeaa0000 0 2380 reg = <0 0xfeaa0000 0 0x10000>;
2682 interrupts = <GIC_SPI 2381 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2683 clocks = <&cpg CPG_MO 2382 clocks = <&cpg CPG_MOD 716>;
2684 power-domains = <&sys 2383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2685 resets = <&cpg 716>; 2384 resets = <&cpg 716>;
2686 status = "disabled"; 2385 status = "disabled";
2687 2386
2688 ports { 2387 ports {
2689 #address-cell 2388 #address-cells = <1>;
2690 #size-cells = 2389 #size-cells = <0>;
2691 2390
2692 port@0 { <<
2693 reg = <<
2694 }; <<
2695 <<
2696 port@1 { 2391 port@1 {
2697 #addr 2392 #address-cells = <1>;
2698 #size 2393 #size-cells = <0>;
2699 2394
2700 reg = 2395 reg = <1>;
2701 2396
2702 csi40 2397 csi40vin0: endpoint@0 {
2703 2398 reg = <0>;
2704 2399 remote-endpoint = <&vin0csi40>;
2705 }; 2400 };
2706 csi40 2401 csi40vin1: endpoint@1 {
2707 2402 reg = <1>;
2708 2403 remote-endpoint = <&vin1csi40>;
2709 }; 2404 };
2710 csi40 2405 csi40vin2: endpoint@2 {
2711 2406 reg = <2>;
2712 2407 remote-endpoint = <&vin2csi40>;
2713 }; 2408 };
2714 csi40 2409 csi40vin3: endpoint@3 {
2715 2410 reg = <3>;
2716 2411 remote-endpoint = <&vin3csi40>;
2717 }; 2412 };
2718 csi40 2413 csi40vin4: endpoint@4 {
2719 2414 reg = <4>;
2720 2415 remote-endpoint = <&vin4csi40>;
2721 }; 2416 };
2722 csi40 2417 csi40vin5: endpoint@5 {
2723 2418 reg = <5>;
2724 2419 remote-endpoint = <&vin5csi40>;
2725 }; 2420 };
2726 csi40 2421 csi40vin6: endpoint@6 {
2727 2422 reg = <6>;
2728 2423 remote-endpoint = <&vin6csi40>;
2729 }; 2424 };
2730 csi40 2425 csi40vin7: endpoint@7 {
2731 2426 reg = <7>;
2732 2427 remote-endpoint = <&vin7csi40>;
2733 }; 2428 };
2734 }; 2429 };
2735 }; 2430 };
2736 }; 2431 };
2737 2432
2738 hdmi0: hdmi@fead0000 { 2433 hdmi0: hdmi@fead0000 {
2739 compatible = "renesas 2434 compatible = "renesas,r8a77965-hdmi",
2740 "renesas 2435 "renesas,rcar-gen3-hdmi";
2741 reg = <0 0xfead0000 0 2436 reg = <0 0xfead0000 0 0x10000>;
2742 interrupts = <GIC_SPI 2437 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2743 clocks = <&cpg CPG_MO 2438 clocks = <&cpg CPG_MOD 729>,
2744 <&cpg CPG_CO 2439 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2745 clock-names = "iahb", 2440 clock-names = "iahb", "isfr";
2746 power-domains = <&sys 2441 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2747 resets = <&cpg 729>; 2442 resets = <&cpg 729>;
2748 status = "disabled"; 2443 status = "disabled";
2749 2444
2750 ports { 2445 ports {
2751 #address-cell 2446 #address-cells = <1>;
2752 #size-cells = 2447 #size-cells = <0>;
2753 port@0 { 2448 port@0 {
2754 reg = 2449 reg = <0>;
2755 dw_hd 2450 dw_hdmi0_in: endpoint {
2756 2451 remote-endpoint = <&du_out_hdmi0>;
2757 }; 2452 };
2758 }; 2453 };
2759 port@1 { 2454 port@1 {
2760 reg = 2455 reg = <1>;
2761 }; 2456 };
2762 }; 2457 };
2763 }; 2458 };
2764 2459
2765 du: display@feb00000 { 2460 du: display@feb00000 {
2766 compatible = "renesas 2461 compatible = "renesas,du-r8a77965";
2767 reg = <0 0xfeb00000 0 2462 reg = <0 0xfeb00000 0 0x80000>;
2768 interrupts = <GIC_SPI 2463 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2769 <GIC_SPI 2464 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2770 <GIC_SPI 2465 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2771 clocks = <&cpg CPG_MO !! 2466 clocks = <&cpg CPG_MOD 724>,
>> 2467 <&cpg CPG_MOD 723>,
2772 <&cpg CPG_MO 2468 <&cpg CPG_MOD 721>;
2773 clock-names = "du.0", 2469 clock-names = "du.0", "du.1", "du.3";
2774 resets = <&cpg 724>, <<
2775 reset-names = "du.0", <<
2776 <<
2777 renesas,cmms = <&cmm0 <<
2778 renesas,vsps = <&vspd <<
2779 <<
2780 status = "disabled"; 2470 status = "disabled";
2781 2471
>> 2472 vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
>> 2473
2782 ports { 2474 ports {
2783 #address-cell 2475 #address-cells = <1>;
2784 #size-cells = 2476 #size-cells = <0>;
2785 2477
2786 port@0 { 2478 port@0 {
2787 reg = 2479 reg = <0>;
>> 2480 du_out_rgb: endpoint {
>> 2481 };
2788 }; 2482 };
2789 port@1 { 2483 port@1 {
2790 reg = 2484 reg = <1>;
2791 du_ou 2485 du_out_hdmi0: endpoint {
2792 2486 remote-endpoint = <&dw_hdmi0_in>;
2793 }; 2487 };
2794 }; 2488 };
2795 port@2 { 2489 port@2 {
2796 reg = 2490 reg = <2>;
2797 du_ou 2491 du_out_lvds0: endpoint {
2798 2492 remote-endpoint = <&lvds0_in>;
2799 }; 2493 };
2800 }; 2494 };
2801 }; 2495 };
2802 }; 2496 };
2803 2497
2804 lvds0: lvds@feb90000 { 2498 lvds0: lvds@feb90000 {
2805 compatible = "renesas 2499 compatible = "renesas,r8a77965-lvds";
2806 reg = <0 0xfeb90000 0 2500 reg = <0 0xfeb90000 0 0x14>;
2807 clocks = <&cpg CPG_MO 2501 clocks = <&cpg CPG_MOD 727>;
2808 power-domains = <&sys 2502 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2809 resets = <&cpg 727>; 2503 resets = <&cpg 727>;
2810 status = "disabled"; 2504 status = "disabled";
2811 2505
2812 ports { 2506 ports {
2813 #address-cell 2507 #address-cells = <1>;
2814 #size-cells = 2508 #size-cells = <0>;
2815 2509
2816 port@0 { 2510 port@0 {
2817 reg = 2511 reg = <0>;
2818 lvds0 2512 lvds0_in: endpoint {
2819 2513 remote-endpoint = <&du_out_lvds0>;
2820 }; 2514 };
2821 }; 2515 };
2822 port@1 { 2516 port@1 {
2823 reg = 2517 reg = <1>;
>> 2518 lvds0_out: endpoint {
>> 2519 };
2824 }; 2520 };
2825 }; 2521 };
2826 }; 2522 };
2827 2523
2828 prr: chipid@fff00044 { 2524 prr: chipid@fff00044 {
2829 compatible = "renesas 2525 compatible = "renesas,prr";
2830 reg = <0 0xfff00044 0 2526 reg = <0 0xfff00044 0 4>;
2831 }; 2527 };
2832 }; 2528 };
2833 2529
2834 thermal-zones { 2530 thermal-zones {
2835 sensor1_thermal: sensor1-ther !! 2531 sensor_thermal1: sensor-thermal1 {
2836 polling-delay-passive 2532 polling-delay-passive = <250>;
2837 polling-delay = <1000 2533 polling-delay = <1000>;
2838 thermal-sensors = <&t 2534 thermal-sensors = <&tsc 0>;
2839 sustainable-power = < 2535 sustainable-power = <2439>;
2840 2536
2841 trips { 2537 trips {
2842 sensor1_crit: 2538 sensor1_crit: sensor1-crit {
2843 tempe 2539 temperature = <120000>;
2844 hyste 2540 hysteresis = <1000>;
2845 type 2541 type = "critical";
2846 }; 2542 };
2847 }; 2543 };
2848 }; 2544 };
2849 2545
2850 sensor2_thermal: sensor2-ther !! 2546 sensor_thermal2: sensor-thermal2 {
2851 polling-delay-passive 2547 polling-delay-passive = <250>;
2852 polling-delay = <1000 2548 polling-delay = <1000>;
2853 thermal-sensors = <&t 2549 thermal-sensors = <&tsc 1>;
2854 sustainable-power = < 2550 sustainable-power = <2439>;
2855 2551
2856 trips { 2552 trips {
2857 sensor2_crit: 2553 sensor2_crit: sensor2-crit {
2858 tempe 2554 temperature = <120000>;
2859 hyste 2555 hysteresis = <1000>;
2860 type 2556 type = "critical";
2861 }; 2557 };
2862 }; 2558 };
2863 }; 2559 };
2864 2560
2865 sensor3_thermal: sensor3-ther !! 2561 sensor_thermal3: sensor-thermal3 {
2866 polling-delay-passive 2562 polling-delay-passive = <250>;
2867 polling-delay = <1000 2563 polling-delay = <1000>;
2868 thermal-sensors = <&t 2564 thermal-sensors = <&tsc 2>;
2869 sustainable-power = < 2565 sustainable-power = <2439>;
2870 2566
2871 trips { 2567 trips {
2872 target: trip- 2568 target: trip-point1 {
2873 /* mi 2569 /* miliCelsius */
2874 tempe 2570 temperature = <100000>;
2875 hyste 2571 hysteresis = <1000>;
2876 type 2572 type = "passive";
2877 }; 2573 };
2878 2574
2879 sensor3_crit: 2575 sensor3_crit: sensor3-crit {
2880 tempe 2576 temperature = <120000>;
2881 hyste 2577 hysteresis = <1000>;
2882 type 2578 type = "critical";
2883 }; 2579 };
2884 }; 2580 };
2885 2581
2886 cooling-maps { 2582 cooling-maps {
2887 map0 { 2583 map0 {
2888 trip 2584 trip = <&target>;
2889 cooli 2585 cooling-device = <&a57_0 2 4>;
2890 contr 2586 contribution = <1024>;
2891 }; 2587 };
2892 }; 2588 };
2893 }; 2589 };
2894 }; 2590 };
2895 2591
2896 timer { 2592 timer {
2897 compatible = "arm,armv8-timer 2593 compatible = "arm,armv8-timer";
2898 interrupts-extended = <&gic G 2594 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2899 <&gic G 2595 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2900 <&gic G 2596 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2901 <&gic G 2597 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2902 interrupt-names = "sec-phys", <<
2903 }; 2598 };
2904 2599
2905 /* External USB clocks - can be overr 2600 /* External USB clocks - can be overridden by the board */
2906 usb3s0_clk: usb3s0 { 2601 usb3s0_clk: usb3s0 {
2907 compatible = "fixed-clock"; 2602 compatible = "fixed-clock";
2908 #clock-cells = <0>; 2603 #clock-cells = <0>;
2909 clock-frequency = <0>; 2604 clock-frequency = <0>;
2910 }; 2605 };
2911 2606
2912 usb_extal_clk: usb_extal { 2607 usb_extal_clk: usb_extal {
2913 compatible = "fixed-clock"; 2608 compatible = "fixed-clock";
2914 #clock-cells = <0>; 2609 #clock-cells = <0>;
2915 clock-frequency = <0>; 2610 clock-frequency = <0>;
2916 }; 2611 };
2917 }; 2612 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.