1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car M3-N (R8A7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 * 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+rene 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 * 6 *
7 * Based on r8a7796.dtsi 7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp 8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */ 9 */
10 10
11 #include <dt-bindings/clock/r8a77965-cpg-mssr. 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h> 13 #include <dt-bindings/power/r8a77965-sysc.h>
14 14
15 #define SOC_HAS_SATA !! 15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
16 16
17 / { 17 / {
18 compatible = "renesas,r8a77965"; 18 compatible = "renesas,r8a77965";
19 #address-cells = <2>; 19 #address-cells = <2>;
20 #size-cells = <2>; 20 #size-cells = <2>;
21 21
>> 22 aliases {
>> 23 i2c0 = &i2c0;
>> 24 i2c1 = &i2c1;
>> 25 i2c2 = &i2c2;
>> 26 i2c3 = &i2c3;
>> 27 i2c4 = &i2c4;
>> 28 i2c5 = &i2c5;
>> 29 i2c6 = &i2c6;
>> 30 i2c7 = &i2c_dvfs;
>> 31 };
>> 32
22 /* 33 /*
23 * The external audio clocks are confi 34 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default. 35 * clocks by default.
25 * Boards that provide audio clocks sh 36 * Boards that provide audio clocks should override them.
26 */ 37 */
27 audio_clk_a: audio_clk_a { 38 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock"; 39 compatible = "fixed-clock";
29 #clock-cells = <0>; 40 #clock-cells = <0>;
30 clock-frequency = <0>; 41 clock-frequency = <0>;
31 }; 42 };
32 43
33 audio_clk_b: audio_clk_b { 44 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock"; 45 compatible = "fixed-clock";
35 #clock-cells = <0>; 46 #clock-cells = <0>;
36 clock-frequency = <0>; 47 clock-frequency = <0>;
37 }; 48 };
38 49
39 audio_clk_c: audio_clk_c { 50 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock"; 51 compatible = "fixed-clock";
41 #clock-cells = <0>; 52 #clock-cells = <0>;
42 clock-frequency = <0>; 53 clock-frequency = <0>;
43 }; 54 };
44 55
45 /* External CAN clock - to be overridd 56 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can { 57 can_clk: can {
47 compatible = "fixed-clock"; 58 compatible = "fixed-clock";
48 #clock-cells = <0>; 59 #clock-cells = <0>;
49 clock-frequency = <0>; 60 clock-frequency = <0>;
50 }; 61 };
51 62
52 cluster0_opp: opp-table-0 { !! 63 cluster0_opp: opp_table0 {
53 compatible = "operating-points 64 compatible = "operating-points-v2";
54 opp-shared; 65 opp-shared;
55 66
56 opp-500000000 { 67 opp-500000000 {
57 opp-hz = /bits/ 64 <50 68 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <83000 69 opp-microvolt = <830000>;
59 clock-latency-ns = <30 70 clock-latency-ns = <300000>;
60 }; 71 };
61 opp-1000000000 { 72 opp-1000000000 {
62 opp-hz = /bits/ 64 <10 73 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <83000 74 opp-microvolt = <830000>;
64 clock-latency-ns = <30 75 clock-latency-ns = <300000>;
65 }; 76 };
66 opp-1500000000 { 77 opp-1500000000 {
67 opp-hz = /bits/ 64 <15 78 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <83000 79 opp-microvolt = <830000>;
69 clock-latency-ns = <30 80 clock-latency-ns = <300000>;
70 opp-suspend; 81 opp-suspend;
71 }; 82 };
72 opp-1600000000 { 83 opp-1600000000 {
73 opp-hz = /bits/ 64 <16 84 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <90000 85 opp-microvolt = <900000>;
75 clock-latency-ns = <30 86 clock-latency-ns = <300000>;
>> 87 turbo-mode;
76 }; 88 };
77 opp-1700000000 { 89 opp-1700000000 {
78 opp-hz = /bits/ 64 <17 90 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <90000 91 opp-microvolt = <900000>;
80 clock-latency-ns = <30 92 clock-latency-ns = <300000>;
>> 93 turbo-mode;
81 }; 94 };
82 opp-1800000000 { 95 opp-1800000000 {
83 opp-hz = /bits/ 64 <18 96 opp-hz = /bits/ 64 <1800000000>;
84 opp-microvolt = <96000 97 opp-microvolt = <960000>;
85 clock-latency-ns = <30 98 clock-latency-ns = <300000>;
86 turbo-mode; 99 turbo-mode;
87 }; 100 };
88 }; 101 };
89 102
90 cpus { 103 cpus {
91 #address-cells = <1>; 104 #address-cells = <1>;
92 #size-cells = <0>; 105 #size-cells = <0>;
93 106
94 a57_0: cpu@0 { 107 a57_0: cpu@0 {
95 compatible = "arm,cort 108 compatible = "arm,cortex-a57";
96 reg = <0x0>; 109 reg = <0x0>;
97 device_type = "cpu"; 110 device_type = "cpu";
98 power-domains = <&sysc 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
99 next-level-cache = <&L 112 next-level-cache = <&L2_CA57>;
100 enable-method = "psci" 113 enable-method = "psci";
101 cpu-idle-states = <&CP 114 cpu-idle-states = <&CPU_SLEEP_0>;
102 #cooling-cells = <2>; 115 #cooling-cells = <2>;
103 dynamic-power-coeffici 116 dynamic-power-coefficient = <854>;
104 clocks = <&cpg CPG_COR 117 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
105 operating-points-v2 = 118 operating-points-v2 = <&cluster0_opp>;
106 }; 119 };
107 120
108 a57_1: cpu@1 { 121 a57_1: cpu@1 {
109 compatible = "arm,cort 122 compatible = "arm,cortex-a57";
110 reg = <0x1>; 123 reg = <0x1>;
111 device_type = "cpu"; 124 device_type = "cpu";
112 power-domains = <&sysc 125 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
113 next-level-cache = <&L 126 next-level-cache = <&L2_CA57>;
114 enable-method = "psci" 127 enable-method = "psci";
115 cpu-idle-states = <&CP 128 cpu-idle-states = <&CPU_SLEEP_0>;
116 clocks = <&cpg CPG_COR 129 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
117 operating-points-v2 = 130 operating-points-v2 = <&cluster0_opp>;
118 }; 131 };
119 132
120 L2_CA57: cache-controller-0 { 133 L2_CA57: cache-controller-0 {
121 compatible = "cache"; 134 compatible = "cache";
122 power-domains = <&sysc 135 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
123 cache-unified; 136 cache-unified;
124 cache-level = <2>; 137 cache-level = <2>;
125 }; 138 };
126 139
127 idle-states { 140 idle-states {
128 entry-method = "psci"; 141 entry-method = "psci";
129 142
130 CPU_SLEEP_0: cpu-sleep 143 CPU_SLEEP_0: cpu-sleep-0 {
131 compatible = " 144 compatible = "arm,idle-state";
132 arm,psci-suspe 145 arm,psci-suspend-param = <0x0010000>;
133 local-timer-st 146 local-timer-stop;
134 entry-latency- 147 entry-latency-us = <400>;
135 exit-latency-u 148 exit-latency-us = <500>;
136 min-residency- 149 min-residency-us = <4000>;
137 }; 150 };
138 }; 151 };
139 }; 152 };
140 153
141 extal_clk: extal { 154 extal_clk: extal {
142 compatible = "fixed-clock"; 155 compatible = "fixed-clock";
143 #clock-cells = <0>; 156 #clock-cells = <0>;
144 /* This value must be overridd 157 /* This value must be overridden by the board */
145 clock-frequency = <0>; 158 clock-frequency = <0>;
146 }; 159 };
147 160
148 extalr_clk: extalr { 161 extalr_clk: extalr {
149 compatible = "fixed-clock"; 162 compatible = "fixed-clock";
150 #clock-cells = <0>; 163 #clock-cells = <0>;
151 /* This value must be overridd 164 /* This value must be overridden by the board */
152 clock-frequency = <0>; 165 clock-frequency = <0>;
153 }; 166 };
154 167
155 /* External PCIe clock - can be overri 168 /* External PCIe clock - can be overridden by the board */
156 pcie_bus_clk: pcie_bus { 169 pcie_bus_clk: pcie_bus {
157 compatible = "fixed-clock"; 170 compatible = "fixed-clock";
158 #clock-cells = <0>; 171 #clock-cells = <0>;
159 clock-frequency = <0>; 172 clock-frequency = <0>;
160 }; 173 };
161 174
162 pmu_a57 { 175 pmu_a57 {
163 compatible = "arm,cortex-a57-p 176 compatible = "arm,cortex-a57-pmu";
164 interrupts-extended = <&gic GI 177 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
165 <&gic GI 178 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166 interrupt-affinity = <&a57_0>, 179 interrupt-affinity = <&a57_0>,
167 <&a57_1>; 180 <&a57_1>;
168 }; 181 };
169 182
170 psci { 183 psci {
171 compatible = "arm,psci-1.0", " 184 compatible = "arm,psci-1.0", "arm,psci-0.2";
172 method = "smc"; 185 method = "smc";
173 }; 186 };
174 187
175 /* External SCIF clock - to be overrid 188 /* External SCIF clock - to be overridden by boards that provide it */
176 scif_clk: scif { 189 scif_clk: scif {
177 compatible = "fixed-clock"; 190 compatible = "fixed-clock";
178 #clock-cells = <0>; 191 #clock-cells = <0>;
179 clock-frequency = <0>; 192 clock-frequency = <0>;
180 }; 193 };
181 194
182 soc { 195 soc {
183 compatible = "simple-bus"; 196 compatible = "simple-bus";
184 interrupt-parent = <&gic>; 197 interrupt-parent = <&gic>;
185 #address-cells = <2>; 198 #address-cells = <2>;
186 #size-cells = <2>; 199 #size-cells = <2>;
187 ranges; 200 ranges;
188 201
189 rwdt: watchdog@e6020000 { 202 rwdt: watchdog@e6020000 {
190 compatible = "renesas, 203 compatible = "renesas,r8a77965-wdt",
191 "renesas, 204 "renesas,rcar-gen3-wdt";
192 reg = <0 0xe6020000 0 205 reg = <0 0xe6020000 0 0x0c>;
193 interrupts = <GIC_SPI <<
194 clocks = <&cpg CPG_MOD 206 clocks = <&cpg CPG_MOD 402>;
195 power-domains = <&sysc 207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
196 resets = <&cpg 402>; 208 resets = <&cpg 402>;
197 status = "disabled"; 209 status = "disabled";
198 }; 210 };
199 211
200 gpio0: gpio@e6050000 { 212 gpio0: gpio@e6050000 {
201 compatible = "renesas, 213 compatible = "renesas,gpio-r8a77965",
202 "renesas, 214 "renesas,rcar-gen3-gpio";
203 reg = <0 0xe6050000 0 215 reg = <0 0xe6050000 0 0x50>;
204 interrupts = <GIC_SPI 216 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>; 217 #gpio-cells = <2>;
206 gpio-controller; 218 gpio-controller;
207 gpio-ranges = <&pfc 0 219 gpio-ranges = <&pfc 0 0 16>;
208 #interrupt-cells = <2> 220 #interrupt-cells = <2>;
209 interrupt-controller; 221 interrupt-controller;
210 clocks = <&cpg CPG_MOD 222 clocks = <&cpg CPG_MOD 912>;
211 power-domains = <&sysc 223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
212 resets = <&cpg 912>; 224 resets = <&cpg 912>;
213 }; 225 };
214 226
215 gpio1: gpio@e6051000 { 227 gpio1: gpio@e6051000 {
216 compatible = "renesas, 228 compatible = "renesas,gpio-r8a77965",
217 "renesas, 229 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6051000 0 230 reg = <0 0xe6051000 0 0x50>;
219 interrupts = <GIC_SPI 231 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>; 232 #gpio-cells = <2>;
221 gpio-controller; 233 gpio-controller;
222 gpio-ranges = <&pfc 0 234 gpio-ranges = <&pfc 0 32 29>;
223 #interrupt-cells = <2> 235 #interrupt-cells = <2>;
224 interrupt-controller; 236 interrupt-controller;
225 clocks = <&cpg CPG_MOD 237 clocks = <&cpg CPG_MOD 911>;
226 power-domains = <&sysc 238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
227 resets = <&cpg 911>; 239 resets = <&cpg 911>;
228 }; 240 };
229 241
230 gpio2: gpio@e6052000 { 242 gpio2: gpio@e6052000 {
231 compatible = "renesas, 243 compatible = "renesas,gpio-r8a77965",
232 "renesas, 244 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6052000 0 245 reg = <0 0xe6052000 0 0x50>;
234 interrupts = <GIC_SPI 246 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>; 247 #gpio-cells = <2>;
236 gpio-controller; 248 gpio-controller;
237 gpio-ranges = <&pfc 0 249 gpio-ranges = <&pfc 0 64 15>;
238 #interrupt-cells = <2> 250 #interrupt-cells = <2>;
239 interrupt-controller; 251 interrupt-controller;
240 clocks = <&cpg CPG_MOD 252 clocks = <&cpg CPG_MOD 910>;
241 power-domains = <&sysc 253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
242 resets = <&cpg 910>; 254 resets = <&cpg 910>;
243 }; 255 };
244 256
245 gpio3: gpio@e6053000 { 257 gpio3: gpio@e6053000 {
246 compatible = "renesas, 258 compatible = "renesas,gpio-r8a77965",
247 "renesas, 259 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6053000 0 260 reg = <0 0xe6053000 0 0x50>;
249 interrupts = <GIC_SPI 261 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>; 262 #gpio-cells = <2>;
251 gpio-controller; 263 gpio-controller;
252 gpio-ranges = <&pfc 0 264 gpio-ranges = <&pfc 0 96 16>;
253 #interrupt-cells = <2> 265 #interrupt-cells = <2>;
254 interrupt-controller; 266 interrupt-controller;
255 clocks = <&cpg CPG_MOD 267 clocks = <&cpg CPG_MOD 909>;
256 power-domains = <&sysc 268 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
257 resets = <&cpg 909>; 269 resets = <&cpg 909>;
258 }; 270 };
259 271
260 gpio4: gpio@e6054000 { 272 gpio4: gpio@e6054000 {
261 compatible = "renesas, 273 compatible = "renesas,gpio-r8a77965",
262 "renesas, 274 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6054000 0 275 reg = <0 0xe6054000 0 0x50>;
264 interrupts = <GIC_SPI 276 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>; 277 #gpio-cells = <2>;
266 gpio-controller; 278 gpio-controller;
267 gpio-ranges = <&pfc 0 279 gpio-ranges = <&pfc 0 128 18>;
268 #interrupt-cells = <2> 280 #interrupt-cells = <2>;
269 interrupt-controller; 281 interrupt-controller;
270 clocks = <&cpg CPG_MOD 282 clocks = <&cpg CPG_MOD 908>;
271 power-domains = <&sysc 283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
272 resets = <&cpg 908>; 284 resets = <&cpg 908>;
273 }; 285 };
274 286
275 gpio5: gpio@e6055000 { 287 gpio5: gpio@e6055000 {
276 compatible = "renesas, 288 compatible = "renesas,gpio-r8a77965",
277 "renesas, 289 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6055000 0 290 reg = <0 0xe6055000 0 0x50>;
279 interrupts = <GIC_SPI 291 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>; 292 #gpio-cells = <2>;
281 gpio-controller; 293 gpio-controller;
282 gpio-ranges = <&pfc 0 294 gpio-ranges = <&pfc 0 160 26>;
283 #interrupt-cells = <2> 295 #interrupt-cells = <2>;
284 interrupt-controller; 296 interrupt-controller;
285 clocks = <&cpg CPG_MOD 297 clocks = <&cpg CPG_MOD 907>;
286 power-domains = <&sysc 298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
287 resets = <&cpg 907>; 299 resets = <&cpg 907>;
288 }; 300 };
289 301
290 gpio6: gpio@e6055400 { 302 gpio6: gpio@e6055400 {
291 compatible = "renesas, 303 compatible = "renesas,gpio-r8a77965",
292 "renesas, 304 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055400 0 305 reg = <0 0xe6055400 0 0x50>;
294 interrupts = <GIC_SPI 306 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>; 307 #gpio-cells = <2>;
296 gpio-controller; 308 gpio-controller;
297 gpio-ranges = <&pfc 0 309 gpio-ranges = <&pfc 0 192 32>;
298 #interrupt-cells = <2> 310 #interrupt-cells = <2>;
299 interrupt-controller; 311 interrupt-controller;
300 clocks = <&cpg CPG_MOD 312 clocks = <&cpg CPG_MOD 906>;
301 power-domains = <&sysc 313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
302 resets = <&cpg 906>; 314 resets = <&cpg 906>;
303 }; 315 };
304 316
305 gpio7: gpio@e6055800 { 317 gpio7: gpio@e6055800 {
306 compatible = "renesas, 318 compatible = "renesas,gpio-r8a77965",
307 "renesas, 319 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055800 0 320 reg = <0 0xe6055800 0 0x50>;
309 interrupts = <GIC_SPI 321 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>; 322 #gpio-cells = <2>;
311 gpio-controller; 323 gpio-controller;
312 gpio-ranges = <&pfc 0 324 gpio-ranges = <&pfc 0 224 4>;
313 #interrupt-cells = <2> 325 #interrupt-cells = <2>;
314 interrupt-controller; 326 interrupt-controller;
315 clocks = <&cpg CPG_MOD 327 clocks = <&cpg CPG_MOD 905>;
316 power-domains = <&sysc 328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
317 resets = <&cpg 905>; 329 resets = <&cpg 905>;
318 }; 330 };
319 331
320 pfc: pinctrl@e6060000 { !! 332 pfc: pin-controller@e6060000 {
321 compatible = "renesas, 333 compatible = "renesas,pfc-r8a77965";
322 reg = <0 0xe6060000 0 334 reg = <0 0xe6060000 0 0x50c>;
323 }; 335 };
324 336
325 cmt0: timer@e60f0000 { 337 cmt0: timer@e60f0000 {
326 compatible = "renesas, 338 compatible = "renesas,r8a77965-cmt0",
327 "renesas, 339 "renesas,rcar-gen3-cmt0";
328 reg = <0 0xe60f0000 0 340 reg = <0 0xe60f0000 0 0x1004>;
329 interrupts = <GIC_SPI 341 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 342 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&cpg CPG_MOD 343 clocks = <&cpg CPG_MOD 303>;
332 clock-names = "fck"; 344 clock-names = "fck";
333 power-domains = <&sysc 345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
334 resets = <&cpg 303>; 346 resets = <&cpg 303>;
335 status = "disabled"; 347 status = "disabled";
336 }; 348 };
337 349
338 cmt1: timer@e6130000 { 350 cmt1: timer@e6130000 {
339 compatible = "renesas, 351 compatible = "renesas,r8a77965-cmt1",
340 "renesas, 352 "renesas,rcar-gen3-cmt1";
341 reg = <0 0xe6130000 0 353 reg = <0 0xe6130000 0 0x1004>;
342 interrupts = <GIC_SPI 354 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 355 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 356 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 357 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 358 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 359 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 360 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 361 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&cpg CPG_MOD 362 clocks = <&cpg CPG_MOD 302>;
351 clock-names = "fck"; 363 clock-names = "fck";
352 power-domains = <&sysc 364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
353 resets = <&cpg 302>; 365 resets = <&cpg 302>;
354 status = "disabled"; 366 status = "disabled";
355 }; 367 };
356 368
357 cmt2: timer@e6140000 { 369 cmt2: timer@e6140000 {
358 compatible = "renesas, 370 compatible = "renesas,r8a77965-cmt1",
359 "renesas, 371 "renesas,rcar-gen3-cmt1";
360 reg = <0 0xe6140000 0 372 reg = <0 0xe6140000 0 0x1004>;
361 interrupts = <GIC_SPI 373 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 374 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 375 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 376 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 377 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 378 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 379 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 380 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 381 clocks = <&cpg CPG_MOD 301>;
370 clock-names = "fck"; 382 clock-names = "fck";
371 power-domains = <&sysc 383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
372 resets = <&cpg 301>; 384 resets = <&cpg 301>;
373 status = "disabled"; 385 status = "disabled";
374 }; 386 };
375 387
376 cmt3: timer@e6148000 { 388 cmt3: timer@e6148000 {
377 compatible = "renesas, 389 compatible = "renesas,r8a77965-cmt1",
378 "renesas, 390 "renesas,rcar-gen3-cmt1";
379 reg = <0 0xe6148000 0 391 reg = <0 0xe6148000 0 0x1004>;
380 interrupts = <GIC_SPI 392 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 393 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 394 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 395 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 396 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 397 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 398 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 399 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 400 clocks = <&cpg CPG_MOD 300>;
389 clock-names = "fck"; 401 clock-names = "fck";
390 power-domains = <&sysc 402 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
391 resets = <&cpg 300>; 403 resets = <&cpg 300>;
392 status = "disabled"; 404 status = "disabled";
393 }; 405 };
394 406
395 cpg: clock-controller@e6150000 407 cpg: clock-controller@e6150000 {
396 compatible = "renesas, 408 compatible = "renesas,r8a77965-cpg-mssr";
397 reg = <0 0xe6150000 0 409 reg = <0 0xe6150000 0 0x1000>;
398 clocks = <&extal_clk>, 410 clocks = <&extal_clk>, <&extalr_clk>;
399 clock-names = "extal", 411 clock-names = "extal", "extalr";
400 #clock-cells = <2>; 412 #clock-cells = <2>;
401 #power-domain-cells = 413 #power-domain-cells = <0>;
402 #reset-cells = <1>; 414 #reset-cells = <1>;
403 }; 415 };
404 416
405 rst: reset-controller@e6160000 417 rst: reset-controller@e6160000 {
406 compatible = "renesas, 418 compatible = "renesas,r8a77965-rst";
407 reg = <0 0xe6160000 0 419 reg = <0 0xe6160000 0 0x0200>;
408 }; 420 };
409 421
410 sysc: system-controller@e61800 422 sysc: system-controller@e6180000 {
411 compatible = "renesas, 423 compatible = "renesas,r8a77965-sysc";
412 reg = <0 0xe6180000 0 424 reg = <0 0xe6180000 0 0x0400>;
413 #power-domain-cells = 425 #power-domain-cells = <1>;
414 }; 426 };
415 427
416 tsc: thermal@e6198000 { 428 tsc: thermal@e6198000 {
417 compatible = "renesas, 429 compatible = "renesas,r8a77965-thermal";
418 reg = <0 0xe6198000 0 430 reg = <0 0xe6198000 0 0x100>,
419 <0 0xe61a0000 0 431 <0 0xe61a0000 0 0x100>,
420 <0 0xe61a8000 0 432 <0 0xe61a8000 0 0x100>;
421 interrupts = <GIC_SPI 433 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 434 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 435 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 436 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc 437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
426 resets = <&cpg 522>; 438 resets = <&cpg 522>;
427 #thermal-sensor-cells 439 #thermal-sensor-cells = <1>;
428 }; 440 };
429 441
430 intc_ex: interrupt-controller@ 442 intc_ex: interrupt-controller@e61c0000 {
431 compatible = "renesas, 443 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
432 #interrupt-cells = <2> 444 #interrupt-cells = <2>;
433 interrupt-controller; 445 interrupt-controller;
434 reg = <0 0xe61c0000 0 446 reg = <0 0xe61c0000 0 0x200>;
435 interrupts = <GIC_SPI 447 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
436 <GIC_SPI 448 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
437 <GIC_SPI 449 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
438 <GIC_SPI 450 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
439 <GIC_SPI 451 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 452 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 453 clocks = <&cpg CPG_MOD 407>;
442 power-domains = <&sysc 454 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
443 resets = <&cpg 407>; 455 resets = <&cpg 407>;
444 }; 456 };
445 457
446 tmu0: timer@e61e0000 { <<
447 compatible = "renesas, <<
448 reg = <0 0xe61e0000 0 <<
449 interrupts = <GIC_SPI <<
450 <GIC_SPI <<
451 <GIC_SPI <<
452 interrupt-names = "tun <<
453 clocks = <&cpg CPG_MOD <<
454 clock-names = "fck"; <<
455 power-domains = <&sysc <<
456 resets = <&cpg 125>; <<
457 status = "disabled"; <<
458 }; <<
459 <<
460 tmu1: timer@e6fc0000 { <<
461 compatible = "renesas, <<
462 reg = <0 0xe6fc0000 0 <<
463 interrupts = <GIC_SPI <<
464 <GIC_SPI <<
465 <GIC_SPI <<
466 <GIC_SPI <<
467 interrupt-names = "tun <<
468 clocks = <&cpg CPG_MOD <<
469 clock-names = "fck"; <<
470 power-domains = <&sysc <<
471 resets = <&cpg 124>; <<
472 status = "disabled"; <<
473 }; <<
474 <<
475 tmu2: timer@e6fd0000 { <<
476 compatible = "renesas, <<
477 reg = <0 0xe6fd0000 0 <<
478 interrupts = <GIC_SPI <<
479 <GIC_SPI <<
480 <GIC_SPI <<
481 <GIC_SPI <<
482 interrupt-names = "tun <<
483 clocks = <&cpg CPG_MOD <<
484 clock-names = "fck"; <<
485 power-domains = <&sysc <<
486 resets = <&cpg 123>; <<
487 status = "disabled"; <<
488 }; <<
489 <<
490 tmu3: timer@e6fe0000 { <<
491 compatible = "renesas, <<
492 reg = <0 0xe6fe0000 0 <<
493 interrupts = <GIC_SPI <<
494 <GIC_SPI <<
495 <GIC_SPI <<
496 interrupt-names = "tun <<
497 clocks = <&cpg CPG_MOD <<
498 clock-names = "fck"; <<
499 power-domains = <&sysc <<
500 resets = <&cpg 122>; <<
501 status = "disabled"; <<
502 }; <<
503 <<
504 tmu4: timer@ffc00000 { <<
505 compatible = "renesas, <<
506 reg = <0 0xffc00000 0 <<
507 interrupts = <GIC_SPI <<
508 <GIC_SPI <<
509 <GIC_SPI <<
510 interrupt-names = "tun <<
511 clocks = <&cpg CPG_MOD <<
512 clock-names = "fck"; <<
513 power-domains = <&sysc <<
514 resets = <&cpg 121>; <<
515 status = "disabled"; <<
516 }; <<
517 <<
518 i2c0: i2c@e6500000 { 458 i2c0: i2c@e6500000 {
519 #address-cells = <1>; 459 #address-cells = <1>;
520 #size-cells = <0>; 460 #size-cells = <0>;
521 compatible = "renesas, 461 compatible = "renesas,i2c-r8a77965",
522 "renesas, 462 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6500000 0 463 reg = <0 0xe6500000 0 0x40>;
524 interrupts = <GIC_SPI 464 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 465 clocks = <&cpg CPG_MOD 931>;
526 power-domains = <&sysc 466 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
527 resets = <&cpg 931>; 467 resets = <&cpg 931>;
528 dmas = <&dmac1 0x91>, 468 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
529 <&dmac2 0x91>, 469 <&dmac2 0x91>, <&dmac2 0x90>;
530 dma-names = "tx", "rx" 470 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 471 i2c-scl-internal-delay-ns = <110>;
532 status = "disabled"; 472 status = "disabled";
533 }; 473 };
534 474
535 i2c1: i2c@e6508000 { 475 i2c1: i2c@e6508000 {
536 #address-cells = <1>; 476 #address-cells = <1>;
537 #size-cells = <0>; 477 #size-cells = <0>;
538 compatible = "renesas, 478 compatible = "renesas,i2c-r8a77965",
539 "renesas, 479 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe6508000 0 480 reg = <0 0xe6508000 0 0x40>;
541 interrupts = <GIC_SPI 481 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 482 clocks = <&cpg CPG_MOD 930>;
543 power-domains = <&sysc 483 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
544 resets = <&cpg 930>; 484 resets = <&cpg 930>;
545 dmas = <&dmac1 0x93>, 485 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
546 <&dmac2 0x93>, 486 <&dmac2 0x93>, <&dmac2 0x92>;
547 dma-names = "tx", "rx" 487 dma-names = "tx", "rx", "tx", "rx";
548 i2c-scl-internal-delay 488 i2c-scl-internal-delay-ns = <6>;
549 status = "disabled"; 489 status = "disabled";
550 }; 490 };
551 491
552 i2c2: i2c@e6510000 { 492 i2c2: i2c@e6510000 {
553 #address-cells = <1>; 493 #address-cells = <1>;
554 #size-cells = <0>; 494 #size-cells = <0>;
555 compatible = "renesas, 495 compatible = "renesas,i2c-r8a77965",
556 "renesas, 496 "renesas,rcar-gen3-i2c";
557 reg = <0 0xe6510000 0 497 reg = <0 0xe6510000 0 0x40>;
558 interrupts = <GIC_SPI 498 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 499 clocks = <&cpg CPG_MOD 929>;
560 power-domains = <&sysc 500 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
561 resets = <&cpg 929>; 501 resets = <&cpg 929>;
562 dmas = <&dmac1 0x95>, 502 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
563 <&dmac2 0x95>, 503 <&dmac2 0x95>, <&dmac2 0x94>;
564 dma-names = "tx", "rx" 504 dma-names = "tx", "rx", "tx", "rx";
565 i2c-scl-internal-delay 505 i2c-scl-internal-delay-ns = <6>;
566 status = "disabled"; 506 status = "disabled";
567 }; 507 };
568 508
569 i2c3: i2c@e66d0000 { 509 i2c3: i2c@e66d0000 {
570 #address-cells = <1>; 510 #address-cells = <1>;
571 #size-cells = <0>; 511 #size-cells = <0>;
572 compatible = "renesas, 512 compatible = "renesas,i2c-r8a77965",
573 "renesas, 513 "renesas,rcar-gen3-i2c";
574 reg = <0 0xe66d0000 0 514 reg = <0 0xe66d0000 0 0x40>;
575 interrupts = <GIC_SPI 515 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 516 clocks = <&cpg CPG_MOD 928>;
577 power-domains = <&sysc 517 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
578 resets = <&cpg 928>; 518 resets = <&cpg 928>;
579 dmas = <&dmac0 0x97>, 519 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
580 dma-names = "tx", "rx" 520 dma-names = "tx", "rx";
581 i2c-scl-internal-delay 521 i2c-scl-internal-delay-ns = <110>;
582 status = "disabled"; 522 status = "disabled";
583 }; 523 };
584 524
585 i2c4: i2c@e66d8000 { 525 i2c4: i2c@e66d8000 {
586 #address-cells = <1>; 526 #address-cells = <1>;
587 #size-cells = <0>; 527 #size-cells = <0>;
588 compatible = "renesas, 528 compatible = "renesas,i2c-r8a77965",
589 "renesas, 529 "renesas,rcar-gen3-i2c";
590 reg = <0 0xe66d8000 0 530 reg = <0 0xe66d8000 0 0x40>;
591 interrupts = <GIC_SPI 531 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&cpg CPG_MOD 532 clocks = <&cpg CPG_MOD 927>;
593 power-domains = <&sysc 533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
594 resets = <&cpg 927>; 534 resets = <&cpg 927>;
595 dmas = <&dmac0 0x99>, 535 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
596 dma-names = "tx", "rx" 536 dma-names = "tx", "rx";
597 i2c-scl-internal-delay 537 i2c-scl-internal-delay-ns = <110>;
598 status = "disabled"; 538 status = "disabled";
599 }; 539 };
600 540
601 i2c5: i2c@e66e0000 { 541 i2c5: i2c@e66e0000 {
602 #address-cells = <1>; 542 #address-cells = <1>;
603 #size-cells = <0>; 543 #size-cells = <0>;
604 compatible = "renesas, 544 compatible = "renesas,i2c-r8a77965",
605 "renesas, 545 "renesas,rcar-gen3-i2c";
606 reg = <0 0xe66e0000 0 546 reg = <0 0xe66e0000 0 0x40>;
607 interrupts = <GIC_SPI 547 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&cpg CPG_MOD 548 clocks = <&cpg CPG_MOD 919>;
609 power-domains = <&sysc 549 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
610 resets = <&cpg 919>; 550 resets = <&cpg 919>;
611 dmas = <&dmac0 0x9b>, 551 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
612 dma-names = "tx", "rx" 552 dma-names = "tx", "rx";
613 i2c-scl-internal-delay 553 i2c-scl-internal-delay-ns = <110>;
614 status = "disabled"; 554 status = "disabled";
615 }; 555 };
616 556
617 i2c6: i2c@e66e8000 { 557 i2c6: i2c@e66e8000 {
618 #address-cells = <1>; 558 #address-cells = <1>;
619 #size-cells = <0>; 559 #size-cells = <0>;
620 compatible = "renesas, 560 compatible = "renesas,i2c-r8a77965",
621 "renesas, 561 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66e8000 0 562 reg = <0 0xe66e8000 0 0x40>;
623 interrupts = <GIC_SPI 563 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&cpg CPG_MOD 564 clocks = <&cpg CPG_MOD 918>;
625 power-domains = <&sysc 565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
626 resets = <&cpg 918>; 566 resets = <&cpg 918>;
627 dmas = <&dmac0 0x9d>, 567 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
628 dma-names = "tx", "rx" 568 dma-names = "tx", "rx";
629 i2c-scl-internal-delay 569 i2c-scl-internal-delay-ns = <6>;
630 status = "disabled"; 570 status = "disabled";
631 }; 571 };
632 572
633 i2c_dvfs: i2c@e60b0000 { 573 i2c_dvfs: i2c@e60b0000 {
634 #address-cells = <1>; 574 #address-cells = <1>;
635 #size-cells = <0>; 575 #size-cells = <0>;
636 compatible = "renesas, 576 compatible = "renesas,iic-r8a77965",
637 "renesas, 577 "renesas,rcar-gen3-iic",
638 "renesas, 578 "renesas,rmobile-iic";
639 reg = <0 0xe60b0000 0 579 reg = <0 0xe60b0000 0 0x425>;
640 interrupts = <GIC_SPI 580 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&cpg CPG_MOD 581 clocks = <&cpg CPG_MOD 926>;
642 power-domains = <&sysc 582 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
643 resets = <&cpg 926>; 583 resets = <&cpg 926>;
644 dmas = <&dmac0 0x11>, 584 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
645 dma-names = "tx", "rx" 585 dma-names = "tx", "rx";
646 status = "disabled"; 586 status = "disabled";
647 }; 587 };
648 588
649 hscif0: serial@e6540000 { 589 hscif0: serial@e6540000 {
650 compatible = "renesas, 590 compatible = "renesas,hscif-r8a77965",
651 "renesas, 591 "renesas,rcar-gen3-hscif",
652 "renesas, 592 "renesas,hscif";
653 reg = <0 0xe6540000 0 593 reg = <0 0xe6540000 0 0x60>;
654 interrupts = <GIC_SPI 594 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 595 clocks = <&cpg CPG_MOD 520>,
656 <&cpg CPG_COR 596 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
657 <&scif_clk>; 597 <&scif_clk>;
658 clock-names = "fck", " 598 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x31>, 599 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
660 <&dmac2 0x31>, 600 <&dmac2 0x31>, <&dmac2 0x30>;
661 dma-names = "tx", "rx" 601 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
663 resets = <&cpg 520>; 603 resets = <&cpg 520>;
664 status = "disabled"; 604 status = "disabled";
665 }; 605 };
666 606
667 hscif1: serial@e6550000 { 607 hscif1: serial@e6550000 {
668 compatible = "renesas, 608 compatible = "renesas,hscif-r8a77965",
669 "renesas, 609 "renesas,rcar-gen3-hscif",
670 "renesas, 610 "renesas,hscif";
671 reg = <0 0xe6550000 0 611 reg = <0 0xe6550000 0 0x60>;
672 interrupts = <GIC_SPI 612 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 613 clocks = <&cpg CPG_MOD 519>,
674 <&cpg CPG_COR 614 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
675 <&scif_clk>; 615 <&scif_clk>;
676 clock-names = "fck", " 616 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac1 0x33>, 617 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
678 <&dmac2 0x33>, 618 <&dmac2 0x33>, <&dmac2 0x32>;
679 dma-names = "tx", "rx" 619 dma-names = "tx", "rx", "tx", "rx";
680 power-domains = <&sysc 620 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
681 resets = <&cpg 519>; 621 resets = <&cpg 519>;
682 status = "disabled"; 622 status = "disabled";
683 }; 623 };
684 624
685 hscif2: serial@e6560000 { 625 hscif2: serial@e6560000 {
686 compatible = "renesas, 626 compatible = "renesas,hscif-r8a77965",
687 "renesas, 627 "renesas,rcar-gen3-hscif",
688 "renesas, 628 "renesas,hscif";
689 reg = <0 0xe6560000 0 629 reg = <0 0xe6560000 0 0x60>;
690 interrupts = <GIC_SPI 630 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&cpg CPG_MOD 631 clocks = <&cpg CPG_MOD 518>,
692 <&cpg CPG_COR 632 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
693 <&scif_clk>; 633 <&scif_clk>;
694 clock-names = "fck", " 634 clock-names = "fck", "brg_int", "scif_clk";
695 dmas = <&dmac1 0x35>, 635 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
696 <&dmac2 0x35>, 636 <&dmac2 0x35>, <&dmac2 0x34>;
697 dma-names = "tx", "rx" 637 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc 638 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
699 resets = <&cpg 518>; 639 resets = <&cpg 518>;
700 status = "disabled"; 640 status = "disabled";
701 }; 641 };
702 642
703 hscif3: serial@e66a0000 { 643 hscif3: serial@e66a0000 {
704 compatible = "renesas, 644 compatible = "renesas,hscif-r8a77965",
705 "renesas, 645 "renesas,rcar-gen3-hscif",
706 "renesas, 646 "renesas,hscif";
707 reg = <0 0xe66a0000 0 647 reg = <0 0xe66a0000 0 0x60>;
708 interrupts = <GIC_SPI 648 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 649 clocks = <&cpg CPG_MOD 517>,
710 <&cpg CPG_COR 650 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
711 <&scif_clk>; 651 <&scif_clk>;
712 clock-names = "fck", " 652 clock-names = "fck", "brg_int", "scif_clk";
713 dmas = <&dmac0 0x37>, 653 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
714 dma-names = "tx", "rx" 654 dma-names = "tx", "rx";
715 power-domains = <&sysc 655 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
716 resets = <&cpg 517>; 656 resets = <&cpg 517>;
717 status = "disabled"; 657 status = "disabled";
718 }; 658 };
719 659
720 hscif4: serial@e66b0000 { 660 hscif4: serial@e66b0000 {
721 compatible = "renesas, 661 compatible = "renesas,hscif-r8a77965",
722 "renesas, 662 "renesas,rcar-gen3-hscif",
723 "renesas, 663 "renesas,hscif";
724 reg = <0 0xe66b0000 0 664 reg = <0 0xe66b0000 0 0x60>;
725 interrupts = <GIC_SPI 665 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 666 clocks = <&cpg CPG_MOD 516>,
727 <&cpg CPG_COR 667 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
728 <&scif_clk>; 668 <&scif_clk>;
729 clock-names = "fck", " 669 clock-names = "fck", "brg_int", "scif_clk";
730 dmas = <&dmac0 0x39>, 670 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
731 dma-names = "tx", "rx" 671 dma-names = "tx", "rx";
732 power-domains = <&sysc 672 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
733 resets = <&cpg 516>; 673 resets = <&cpg 516>;
734 status = "disabled"; 674 status = "disabled";
735 }; 675 };
736 676
737 hsusb: usb@e6590000 { 677 hsusb: usb@e6590000 {
738 compatible = "renesas, 678 compatible = "renesas,usbhs-r8a77965",
739 "renesas, 679 "renesas,rcar-gen3-usbhs";
740 reg = <0 0xe6590000 0 680 reg = <0 0xe6590000 0 0x200>;
741 interrupts = <GIC_SPI 681 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 682 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
743 dmas = <&usb_dmac0 0>, 683 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
744 <&usb_dmac1 0>, 684 <&usb_dmac1 0>, <&usb_dmac1 1>;
745 dma-names = "ch0", "ch 685 dma-names = "ch0", "ch1", "ch2", "ch3";
746 renesas,buswait = <11> 686 renesas,buswait = <11>;
747 phys = <&usb2_phy0 3>; 687 phys = <&usb2_phy0 3>;
748 phy-names = "usb"; 688 phy-names = "usb";
749 power-domains = <&sysc 689 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
750 resets = <&cpg 704>, < 690 resets = <&cpg 704>, <&cpg 703>;
751 status = "disabled"; 691 status = "disabled";
752 }; 692 };
753 693
754 usb_dmac0: dma-controller@e65a 694 usb_dmac0: dma-controller@e65a0000 {
755 compatible = "renesas, 695 compatible = "renesas,r8a77965-usb-dmac",
756 "renesas, 696 "renesas,usb-dmac";
757 reg = <0 0xe65a0000 0 697 reg = <0 0xe65a0000 0 0x100>;
758 interrupts = <GIC_SPI 698 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 699 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
760 interrupt-names = "ch0 700 interrupt-names = "ch0", "ch1";
761 clocks = <&cpg CPG_MOD 701 clocks = <&cpg CPG_MOD 330>;
762 power-domains = <&sysc 702 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
763 resets = <&cpg 330>; 703 resets = <&cpg 330>;
764 #dma-cells = <1>; 704 #dma-cells = <1>;
765 dma-channels = <2>; 705 dma-channels = <2>;
766 }; 706 };
767 707
768 usb_dmac1: dma-controller@e65b 708 usb_dmac1: dma-controller@e65b0000 {
769 compatible = "renesas, 709 compatible = "renesas,r8a77965-usb-dmac",
770 "renesas, 710 "renesas,usb-dmac";
771 reg = <0 0xe65b0000 0 711 reg = <0 0xe65b0000 0 0x100>;
772 interrupts = <GIC_SPI 712 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 713 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
774 interrupt-names = "ch0 714 interrupt-names = "ch0", "ch1";
775 clocks = <&cpg CPG_MOD 715 clocks = <&cpg CPG_MOD 331>;
776 power-domains = <&sysc 716 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
777 resets = <&cpg 331>; 717 resets = <&cpg 331>;
778 #dma-cells = <1>; 718 #dma-cells = <1>;
779 dma-channels = <2>; 719 dma-channels = <2>;
780 }; 720 };
781 721
782 usb3_phy0: usb-phy@e65ee000 { 722 usb3_phy0: usb-phy@e65ee000 {
783 compatible = "renesas, 723 compatible = "renesas,r8a77965-usb3-phy",
784 "renesas, 724 "renesas,rcar-gen3-usb3-phy";
785 reg = <0 0xe65ee000 0 725 reg = <0 0xe65ee000 0 0x90>;
786 clocks = <&cpg CPG_MOD 726 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
787 <&usb_extal_c 727 <&usb_extal_clk>;
788 clock-names = "usb3-if 728 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
789 power-domains = <&sysc 729 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
790 resets = <&cpg 328>; 730 resets = <&cpg 328>;
791 #phy-cells = <0>; 731 #phy-cells = <0>;
792 status = "disabled"; 732 status = "disabled";
793 }; 733 };
794 734
795 arm_cc630p: crypto@e6601000 { 735 arm_cc630p: crypto@e6601000 {
796 compatible = "arm,cryp 736 compatible = "arm,cryptocell-630p-ree";
797 interrupts = <GIC_SPI 737 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
798 reg = <0x0 0xe6601000 738 reg = <0x0 0xe6601000 0 0x1000>;
799 clocks = <&cpg CPG_MOD 739 clocks = <&cpg CPG_MOD 229>;
800 resets = <&cpg 229>; 740 resets = <&cpg 229>;
801 power-domains = <&sysc 741 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
802 }; 742 };
803 743
804 dmac0: dma-controller@e6700000 744 dmac0: dma-controller@e6700000 {
805 compatible = "renesas, 745 compatible = "renesas,dmac-r8a77965",
806 "renesas, 746 "renesas,rcar-dmac";
807 reg = <0 0xe6700000 0 747 reg = <0 0xe6700000 0 0x10000>;
808 interrupts = <GIC_SPI 748 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 749 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 750 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 751 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 752 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 753 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 754 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 755 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 756 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 757 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
818 <GIC_SPI 758 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_SPI 759 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_SPI 760 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_SPI 761 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 762 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 763 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 764 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "err 765 interrupt-names = "error",
826 "ch0", 766 "ch0", "ch1", "ch2", "ch3",
827 "ch4", 767 "ch4", "ch5", "ch6", "ch7",
828 "ch8", 768 "ch8", "ch9", "ch10", "ch11",
829 "ch12" 769 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 770 clocks = <&cpg CPG_MOD 219>;
831 clock-names = "fck"; 771 clock-names = "fck";
832 power-domains = <&sysc 772 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
833 resets = <&cpg 219>; 773 resets = <&cpg 219>;
834 #dma-cells = <1>; 774 #dma-cells = <1>;
835 dma-channels = <16>; 775 dma-channels = <16>;
836 iommus = <&ipmmu_ds0 0 776 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
837 <&ipmmu_ds0 2>, 777 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
838 <&ipmmu_ds0 4>, 778 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
839 <&ipmmu_ds0 6>, 779 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
840 <&ipmmu_ds0 8>, 780 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
841 <&ipmmu_ds0 10> 781 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
842 <&ipmmu_ds0 12> 782 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
843 <&ipmmu_ds0 14> 783 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
844 }; 784 };
845 785
846 dmac1: dma-controller@e7300000 786 dmac1: dma-controller@e7300000 {
847 compatible = "renesas, 787 compatible = "renesas,dmac-r8a77965",
848 "renesas, 788 "renesas,rcar-dmac";
849 reg = <0 0xe7300000 0 789 reg = <0 0xe7300000 0 0x10000>;
850 interrupts = <GIC_SPI 790 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 791 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 792 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 793 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 794 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 795 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 796 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 797 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 798 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 799 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 800 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 801 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
862 <GIC_SPI 802 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 803 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 804 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 805 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 806 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
867 interrupt-names = "err 807 interrupt-names = "error",
868 "ch0", 808 "ch0", "ch1", "ch2", "ch3",
869 "ch4", 809 "ch4", "ch5", "ch6", "ch7",
870 "ch8", 810 "ch8", "ch9", "ch10", "ch11",
871 "ch12" 811 "ch12", "ch13", "ch14", "ch15";
872 clocks = <&cpg CPG_MOD 812 clocks = <&cpg CPG_MOD 218>;
873 clock-names = "fck"; 813 clock-names = "fck";
874 power-domains = <&sysc 814 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 resets = <&cpg 218>; 815 resets = <&cpg 218>;
876 #dma-cells = <1>; 816 #dma-cells = <1>;
877 dma-channels = <16>; 817 dma-channels = <16>;
878 iommus = <&ipmmu_ds1 0 818 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
879 <&ipmmu_ds1 2>, 819 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
880 <&ipmmu_ds1 4>, 820 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
881 <&ipmmu_ds1 6>, 821 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
882 <&ipmmu_ds1 8>, 822 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
883 <&ipmmu_ds1 10> 823 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
884 <&ipmmu_ds1 12> 824 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
885 <&ipmmu_ds1 14> 825 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
886 }; 826 };
887 827
888 dmac2: dma-controller@e7310000 828 dmac2: dma-controller@e7310000 {
889 compatible = "renesas, 829 compatible = "renesas,dmac-r8a77965",
890 "renesas, 830 "renesas,rcar-dmac";
891 reg = <0 0xe7310000 0 831 reg = <0 0xe7310000 0 0x10000>;
892 interrupts = <GIC_SPI 832 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
893 <GIC_SPI 833 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
894 <GIC_SPI 834 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
895 <GIC_SPI 835 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
896 <GIC_SPI 836 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
897 <GIC_SPI 837 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
898 <GIC_SPI 838 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
899 <GIC_SPI 839 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
900 <GIC_SPI 840 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
901 <GIC_SPI 841 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
902 <GIC_SPI 842 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
903 <GIC_SPI 843 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
904 <GIC_SPI 844 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
905 <GIC_SPI 845 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
906 <GIC_SPI 846 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
907 <GIC_SPI 847 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
908 <GIC_SPI 848 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
909 interrupt-names = "err 849 interrupt-names = "error",
910 "ch0", 850 "ch0", "ch1", "ch2", "ch3",
911 "ch4", 851 "ch4", "ch5", "ch6", "ch7",
912 "ch8", 852 "ch8", "ch9", "ch10", "ch11",
913 "ch12" 853 "ch12", "ch13", "ch14", "ch15";
914 clocks = <&cpg CPG_MOD 854 clocks = <&cpg CPG_MOD 217>;
915 clock-names = "fck"; 855 clock-names = "fck";
916 power-domains = <&sysc 856 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
917 resets = <&cpg 217>; 857 resets = <&cpg 217>;
918 #dma-cells = <1>; 858 #dma-cells = <1>;
919 dma-channels = <16>; 859 dma-channels = <16>;
920 iommus = <&ipmmu_ds1 1 860 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
921 <&ipmmu_ds1 18> 861 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
922 <&ipmmu_ds1 20> 862 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
923 <&ipmmu_ds1 22> 863 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
924 <&ipmmu_ds1 24> 864 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
925 <&ipmmu_ds1 26> 865 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
926 <&ipmmu_ds1 28> 866 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
927 <&ipmmu_ds1 30> 867 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
928 }; 868 };
929 869
930 ipmmu_ds0: iommu@e6740000 { 870 ipmmu_ds0: iommu@e6740000 {
931 compatible = "renesas, 871 compatible = "renesas,ipmmu-r8a77965";
932 reg = <0 0xe6740000 0 872 reg = <0 0xe6740000 0 0x1000>;
933 renesas,ipmmu-main = < 873 renesas,ipmmu-main = <&ipmmu_mm 0>;
934 power-domains = <&sysc 874 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 875 #iommu-cells = <1>;
936 }; 876 };
937 877
938 ipmmu_ds1: iommu@e7740000 { 878 ipmmu_ds1: iommu@e7740000 {
939 compatible = "renesas, 879 compatible = "renesas,ipmmu-r8a77965";
940 reg = <0 0xe7740000 0 880 reg = <0 0xe7740000 0 0x1000>;
941 renesas,ipmmu-main = < 881 renesas,ipmmu-main = <&ipmmu_mm 1>;
942 power-domains = <&sysc 882 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
943 #iommu-cells = <1>; 883 #iommu-cells = <1>;
944 }; 884 };
945 885
946 ipmmu_hc: iommu@e6570000 { 886 ipmmu_hc: iommu@e6570000 {
947 compatible = "renesas, 887 compatible = "renesas,ipmmu-r8a77965";
948 reg = <0 0xe6570000 0 888 reg = <0 0xe6570000 0 0x1000>;
949 renesas,ipmmu-main = < 889 renesas,ipmmu-main = <&ipmmu_mm 2>;
950 power-domains = <&sysc 890 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 891 #iommu-cells = <1>;
952 }; 892 };
953 893
954 ipmmu_mm: iommu@e67b0000 { 894 ipmmu_mm: iommu@e67b0000 {
955 compatible = "renesas, 895 compatible = "renesas,ipmmu-r8a77965";
956 reg = <0 0xe67b0000 0 896 reg = <0 0xe67b0000 0 0x1000>;
957 interrupts = <GIC_SPI 897 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 898 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
959 power-domains = <&sysc 899 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
960 #iommu-cells = <1>; 900 #iommu-cells = <1>;
961 }; 901 };
962 902
963 ipmmu_mp: iommu@ec670000 { 903 ipmmu_mp: iommu@ec670000 {
964 compatible = "renesas, 904 compatible = "renesas,ipmmu-r8a77965";
965 reg = <0 0xec670000 0 905 reg = <0 0xec670000 0 0x1000>;
966 renesas,ipmmu-main = < 906 renesas,ipmmu-main = <&ipmmu_mm 4>;
967 power-domains = <&sysc 907 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
968 #iommu-cells = <1>; 908 #iommu-cells = <1>;
969 }; 909 };
970 910
971 ipmmu_pv0: iommu@fd800000 { 911 ipmmu_pv0: iommu@fd800000 {
972 compatible = "renesas, 912 compatible = "renesas,ipmmu-r8a77965";
973 reg = <0 0xfd800000 0 913 reg = <0 0xfd800000 0 0x1000>;
974 renesas,ipmmu-main = < 914 renesas,ipmmu-main = <&ipmmu_mm 6>;
975 power-domains = <&sysc 915 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
976 #iommu-cells = <1>; 916 #iommu-cells = <1>;
977 }; 917 };
978 918
979 ipmmu_rt: iommu@ffc80000 { 919 ipmmu_rt: iommu@ffc80000 {
980 compatible = "renesas, 920 compatible = "renesas,ipmmu-r8a77965";
981 reg = <0 0xffc80000 0 921 reg = <0 0xffc80000 0 0x1000>;
982 renesas,ipmmu-main = < 922 renesas,ipmmu-main = <&ipmmu_mm 10>;
983 power-domains = <&sysc 923 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
984 #iommu-cells = <1>; 924 #iommu-cells = <1>;
985 }; 925 };
986 926
987 ipmmu_vc0: iommu@fe6b0000 { 927 ipmmu_vc0: iommu@fe6b0000 {
988 compatible = "renesas, 928 compatible = "renesas,ipmmu-r8a77965";
989 reg = <0 0xfe6b0000 0 929 reg = <0 0xfe6b0000 0 0x1000>;
990 renesas,ipmmu-main = < 930 renesas,ipmmu-main = <&ipmmu_mm 12>;
991 power-domains = <&sysc 931 power-domains = <&sysc R8A77965_PD_A3VC>;
992 #iommu-cells = <1>; 932 #iommu-cells = <1>;
993 }; 933 };
994 934
995 ipmmu_vi0: iommu@febd0000 { 935 ipmmu_vi0: iommu@febd0000 {
996 compatible = "renesas, 936 compatible = "renesas,ipmmu-r8a77965";
997 reg = <0 0xfebd0000 0 937 reg = <0 0xfebd0000 0 0x1000>;
998 renesas,ipmmu-main = < 938 renesas,ipmmu-main = <&ipmmu_mm 14>;
999 power-domains = <&sysc 939 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1000 #iommu-cells = <1>; 940 #iommu-cells = <1>;
1001 }; 941 };
1002 942
1003 ipmmu_vp0: iommu@fe990000 { 943 ipmmu_vp0: iommu@fe990000 {
1004 compatible = "renesas 944 compatible = "renesas,ipmmu-r8a77965";
1005 reg = <0 0xfe990000 0 945 reg = <0 0xfe990000 0 0x1000>;
1006 renesas,ipmmu-main = 946 renesas,ipmmu-main = <&ipmmu_mm 16>;
1007 power-domains = <&sys 947 power-domains = <&sysc R8A77965_PD_A3VP>;
1008 #iommu-cells = <1>; 948 #iommu-cells = <1>;
1009 }; 949 };
1010 950
1011 avb: ethernet@e6800000 { 951 avb: ethernet@e6800000 {
1012 compatible = "renesas 952 compatible = "renesas,etheravb-r8a77965",
1013 "renesas 953 "renesas,etheravb-rcar-gen3";
1014 reg = <0 0xe6800000 0 954 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1015 interrupts = <GIC_SPI 955 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1016 <GIC_SPI 956 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 957 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 958 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 959 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 960 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 961 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 962 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 963 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 964 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 965 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 966 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 967 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 968 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 969 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 970 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 971 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 972 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 973 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 974 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 975 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 976 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 977 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 978 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 979 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1040 interrupt-names = "ch 980 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1041 "ch 981 "ch4", "ch5", "ch6", "ch7",
1042 "ch 982 "ch8", "ch9", "ch10", "ch11",
1043 "ch 983 "ch12", "ch13", "ch14", "ch15",
1044 "ch 984 "ch16", "ch17", "ch18", "ch19",
1045 "ch 985 "ch20", "ch21", "ch22", "ch23",
1046 "ch 986 "ch24";
1047 clocks = <&cpg CPG_MO 987 clocks = <&cpg CPG_MOD 812>;
1048 clock-names = "fck"; <<
1049 power-domains = <&sys 988 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1050 resets = <&cpg 812>; 989 resets = <&cpg 812>;
1051 phy-mode = "rgmii"; 990 phy-mode = "rgmii";
1052 rx-internal-delay-ps <<
1053 tx-internal-delay-ps <<
1054 iommus = <&ipmmu_ds0 991 iommus = <&ipmmu_ds0 16>;
1055 #address-cells = <1>; 992 #address-cells = <1>;
1056 #size-cells = <0>; 993 #size-cells = <0>;
1057 status = "disabled"; 994 status = "disabled";
1058 }; 995 };
1059 996
1060 can0: can@e6c30000 { 997 can0: can@e6c30000 {
1061 compatible = "renesas 998 compatible = "renesas,can-r8a77965",
1062 "renesas 999 "renesas,rcar-gen3-can";
1063 reg = <0 0xe6c30000 0 1000 reg = <0 0xe6c30000 0 0x1000>;
1064 interrupts = <GIC_SPI 1001 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&cpg CPG_MO 1002 clocks = <&cpg CPG_MOD 916>,
1066 <&cpg CPG_CORE 1003 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1067 <&can_clk>; 1004 <&can_clk>;
1068 clock-names = "clkp1" 1005 clock-names = "clkp1", "clkp2", "can_clk";
1069 assigned-clocks = <&c 1006 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1070 assigned-clock-rates 1007 assigned-clock-rates = <40000000>;
1071 power-domains = <&sys 1008 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1072 resets = <&cpg 916>; 1009 resets = <&cpg 916>;
1073 status = "disabled"; 1010 status = "disabled";
1074 }; 1011 };
1075 1012
1076 can1: can@e6c38000 { 1013 can1: can@e6c38000 {
1077 compatible = "renesas 1014 compatible = "renesas,can-r8a77965",
1078 "renesas 1015 "renesas,rcar-gen3-can";
1079 reg = <0 0xe6c38000 0 1016 reg = <0 0xe6c38000 0 0x1000>;
1080 interrupts = <GIC_SPI 1017 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1081 clocks = <&cpg CPG_MO 1018 clocks = <&cpg CPG_MOD 915>,
1082 <&cpg CPG_CORE 1019 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1083 <&can_clk>; 1020 <&can_clk>;
1084 clock-names = "clkp1" 1021 clock-names = "clkp1", "clkp2", "can_clk";
1085 assigned-clocks = <&c 1022 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1086 assigned-clock-rates 1023 assigned-clock-rates = <40000000>;
1087 power-domains = <&sys 1024 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1088 resets = <&cpg 915>; 1025 resets = <&cpg 915>;
1089 status = "disabled"; 1026 status = "disabled";
1090 }; 1027 };
1091 1028
1092 canfd: can@e66c0000 { 1029 canfd: can@e66c0000 {
1093 compatible = "renesas 1030 compatible = "renesas,r8a77965-canfd",
1094 "renesas 1031 "renesas,rcar-gen3-canfd";
1095 reg = <0 0xe66c0000 0 1032 reg = <0 0xe66c0000 0 0x8000>;
1096 interrupts = <GIC_SPI 1033 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1097 <GIC_SPI 3 1034 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1098 interrupt-names = "ch <<
1099 clocks = <&cpg CPG_MO 1035 clocks = <&cpg CPG_MOD 914>,
1100 <&cpg CPG_CORE 1036 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1101 <&can_clk>; 1037 <&can_clk>;
1102 clock-names = "fck", 1038 clock-names = "fck", "canfd", "can_clk";
1103 assigned-clocks = <&c 1039 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1104 assigned-clock-rates 1040 assigned-clock-rates = <40000000>;
1105 power-domains = <&sys 1041 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1106 resets = <&cpg 914>; 1042 resets = <&cpg 914>;
1107 status = "disabled"; 1043 status = "disabled";
1108 1044
1109 channel0 { 1045 channel0 {
1110 status = "dis 1046 status = "disabled";
1111 }; 1047 };
1112 1048
1113 channel1 { 1049 channel1 {
1114 status = "dis 1050 status = "disabled";
1115 }; 1051 };
1116 }; 1052 };
1117 1053
1118 pwm0: pwm@e6e30000 { 1054 pwm0: pwm@e6e30000 {
1119 compatible = "renesas 1055 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1120 reg = <0 0xe6e30000 0 1056 reg = <0 0xe6e30000 0 8>;
1121 #pwm-cells = <2>; 1057 #pwm-cells = <2>;
1122 clocks = <&cpg CPG_MO 1058 clocks = <&cpg CPG_MOD 523>;
1123 resets = <&cpg 523>; 1059 resets = <&cpg 523>;
1124 power-domains = <&sys 1060 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1125 status = "disabled"; 1061 status = "disabled";
1126 }; 1062 };
1127 1063
1128 pwm1: pwm@e6e31000 { 1064 pwm1: pwm@e6e31000 {
1129 compatible = "renesas 1065 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1130 reg = <0 0xe6e31000 0 1066 reg = <0 0xe6e31000 0 8>;
1131 #pwm-cells = <2>; 1067 #pwm-cells = <2>;
1132 clocks = <&cpg CPG_MO 1068 clocks = <&cpg CPG_MOD 523>;
1133 resets = <&cpg 523>; 1069 resets = <&cpg 523>;
1134 power-domains = <&sys 1070 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1135 status = "disabled"; 1071 status = "disabled";
1136 }; 1072 };
1137 1073
1138 pwm2: pwm@e6e32000 { 1074 pwm2: pwm@e6e32000 {
1139 compatible = "renesas 1075 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1140 reg = <0 0xe6e32000 0 1076 reg = <0 0xe6e32000 0 8>;
1141 #pwm-cells = <2>; 1077 #pwm-cells = <2>;
1142 clocks = <&cpg CPG_MO 1078 clocks = <&cpg CPG_MOD 523>;
1143 resets = <&cpg 523>; 1079 resets = <&cpg 523>;
1144 power-domains = <&sys 1080 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1145 status = "disabled"; 1081 status = "disabled";
1146 }; 1082 };
1147 1083
1148 pwm3: pwm@e6e33000 { 1084 pwm3: pwm@e6e33000 {
1149 compatible = "renesas 1085 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1150 reg = <0 0xe6e33000 0 1086 reg = <0 0xe6e33000 0 8>;
1151 #pwm-cells = <2>; 1087 #pwm-cells = <2>;
1152 clocks = <&cpg CPG_MO 1088 clocks = <&cpg CPG_MOD 523>;
1153 resets = <&cpg 523>; 1089 resets = <&cpg 523>;
1154 power-domains = <&sys 1090 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1155 status = "disabled"; 1091 status = "disabled";
1156 }; 1092 };
1157 1093
1158 pwm4: pwm@e6e34000 { 1094 pwm4: pwm@e6e34000 {
1159 compatible = "renesas 1095 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1160 reg = <0 0xe6e34000 0 1096 reg = <0 0xe6e34000 0 8>;
1161 #pwm-cells = <2>; 1097 #pwm-cells = <2>;
1162 clocks = <&cpg CPG_MO 1098 clocks = <&cpg CPG_MOD 523>;
1163 resets = <&cpg 523>; 1099 resets = <&cpg 523>;
1164 power-domains = <&sys 1100 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1165 status = "disabled"; 1101 status = "disabled";
1166 }; 1102 };
1167 1103
1168 pwm5: pwm@e6e35000 { 1104 pwm5: pwm@e6e35000 {
1169 compatible = "renesas 1105 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1170 reg = <0 0xe6e35000 0 1106 reg = <0 0xe6e35000 0 8>;
1171 #pwm-cells = <2>; 1107 #pwm-cells = <2>;
1172 clocks = <&cpg CPG_MO 1108 clocks = <&cpg CPG_MOD 523>;
1173 resets = <&cpg 523>; 1109 resets = <&cpg 523>;
1174 power-domains = <&sys 1110 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1175 status = "disabled"; 1111 status = "disabled";
1176 }; 1112 };
1177 1113
1178 pwm6: pwm@e6e36000 { 1114 pwm6: pwm@e6e36000 {
1179 compatible = "renesas 1115 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1180 reg = <0 0xe6e36000 0 1116 reg = <0 0xe6e36000 0 8>;
1181 #pwm-cells = <2>; 1117 #pwm-cells = <2>;
1182 clocks = <&cpg CPG_MO 1118 clocks = <&cpg CPG_MOD 523>;
1183 resets = <&cpg 523>; 1119 resets = <&cpg 523>;
1184 power-domains = <&sys 1120 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1185 status = "disabled"; 1121 status = "disabled";
1186 }; 1122 };
1187 1123
1188 scif0: serial@e6e60000 { 1124 scif0: serial@e6e60000 {
1189 compatible = "renesas 1125 compatible = "renesas,scif-r8a77965",
1190 "renesas 1126 "renesas,rcar-gen3-scif", "renesas,scif";
1191 reg = <0 0xe6e60000 0 1127 reg = <0 0xe6e60000 0 64>;
1192 interrupts = <GIC_SPI 1128 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MO 1129 clocks = <&cpg CPG_MOD 207>,
1194 <&cpg CPG_CO 1130 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1195 <&scif_clk>; 1131 <&scif_clk>;
1196 clock-names = "fck", 1132 clock-names = "fck", "brg_int", "scif_clk";
1197 dmas = <&dmac1 0x51>, 1133 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1198 <&dmac2 0x51>, 1134 <&dmac2 0x51>, <&dmac2 0x50>;
1199 dma-names = "tx", "rx 1135 dma-names = "tx", "rx", "tx", "rx";
1200 power-domains = <&sys 1136 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1201 resets = <&cpg 207>; 1137 resets = <&cpg 207>;
1202 status = "disabled"; 1138 status = "disabled";
1203 }; 1139 };
1204 1140
1205 scif1: serial@e6e68000 { 1141 scif1: serial@e6e68000 {
1206 compatible = "renesas 1142 compatible = "renesas,scif-r8a77965",
1207 "renesas 1143 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6e68000 0 1144 reg = <0 0xe6e68000 0 64>;
1209 interrupts = <GIC_SPI 1145 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1146 clocks = <&cpg CPG_MOD 206>,
1211 <&cpg CPG_CO 1147 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1212 <&scif_clk>; 1148 <&scif_clk>;
1213 clock-names = "fck", 1149 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac1 0x53>, 1150 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1215 <&dmac2 0x53>, 1151 <&dmac2 0x53>, <&dmac2 0x52>;
1216 dma-names = "tx", "rx 1152 dma-names = "tx", "rx", "tx", "rx";
1217 power-domains = <&sys 1153 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1218 resets = <&cpg 206>; 1154 resets = <&cpg 206>;
1219 status = "disabled"; 1155 status = "disabled";
1220 }; 1156 };
1221 1157
1222 scif2: serial@e6e88000 { 1158 scif2: serial@e6e88000 {
1223 compatible = "renesas 1159 compatible = "renesas,scif-r8a77965",
1224 "renesas 1160 "renesas,rcar-gen3-scif", "renesas,scif";
1225 reg = <0 0xe6e88000 0 1161 reg = <0 0xe6e88000 0 64>;
1226 interrupts = <GIC_SPI 1162 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MO 1163 clocks = <&cpg CPG_MOD 310>,
1228 <&cpg CPG_CO 1164 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1229 <&scif_clk>; 1165 <&scif_clk>;
1230 clock-names = "fck", 1166 clock-names = "fck", "brg_int", "scif_clk";
1231 dmas = <&dmac1 0x13>, 1167 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1232 <&dmac2 0x13>, 1168 <&dmac2 0x13>, <&dmac2 0x12>;
1233 dma-names = "tx", "rx 1169 dma-names = "tx", "rx", "tx", "rx";
1234 power-domains = <&sys 1170 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1235 resets = <&cpg 310>; 1171 resets = <&cpg 310>;
1236 status = "disabled"; 1172 status = "disabled";
1237 }; 1173 };
1238 1174
1239 scif3: serial@e6c50000 { 1175 scif3: serial@e6c50000 {
1240 compatible = "renesas 1176 compatible = "renesas,scif-r8a77965",
1241 "renesas 1177 "renesas,rcar-gen3-scif", "renesas,scif";
1242 reg = <0 0xe6c50000 0 1178 reg = <0 0xe6c50000 0 64>;
1243 interrupts = <GIC_SPI 1179 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1244 clocks = <&cpg CPG_MO 1180 clocks = <&cpg CPG_MOD 204>,
1245 <&cpg CPG_CO 1181 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1246 <&scif_clk>; 1182 <&scif_clk>;
1247 clock-names = "fck", 1183 clock-names = "fck", "brg_int", "scif_clk";
1248 dmas = <&dmac0 0x57>, 1184 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1249 dma-names = "tx", "rx 1185 dma-names = "tx", "rx";
1250 power-domains = <&sys 1186 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1251 resets = <&cpg 204>; 1187 resets = <&cpg 204>;
1252 status = "disabled"; 1188 status = "disabled";
1253 }; 1189 };
1254 1190
1255 scif4: serial@e6c40000 { 1191 scif4: serial@e6c40000 {
1256 compatible = "renesas 1192 compatible = "renesas,scif-r8a77965",
1257 "renesas 1193 "renesas,rcar-gen3-scif", "renesas,scif";
1258 reg = <0 0xe6c40000 0 1194 reg = <0 0xe6c40000 0 64>;
1259 interrupts = <GIC_SPI 1195 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1260 clocks = <&cpg CPG_MO 1196 clocks = <&cpg CPG_MOD 203>,
1261 <&cpg CPG_CO 1197 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1262 <&scif_clk>; 1198 <&scif_clk>;
1263 clock-names = "fck", 1199 clock-names = "fck", "brg_int", "scif_clk";
1264 dmas = <&dmac0 0x59>, 1200 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1265 dma-names = "tx", "rx 1201 dma-names = "tx", "rx";
1266 power-domains = <&sys 1202 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1267 resets = <&cpg 203>; 1203 resets = <&cpg 203>;
1268 status = "disabled"; 1204 status = "disabled";
1269 }; 1205 };
1270 1206
1271 scif5: serial@e6f30000 { 1207 scif5: serial@e6f30000 {
1272 compatible = "renesas 1208 compatible = "renesas,scif-r8a77965",
1273 "renesas 1209 "renesas,rcar-gen3-scif", "renesas,scif";
1274 reg = <0 0xe6f30000 0 1210 reg = <0 0xe6f30000 0 64>;
1275 interrupts = <GIC_SPI 1211 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1276 clocks = <&cpg CPG_MO 1212 clocks = <&cpg CPG_MOD 202>,
1277 <&cpg CPG_CO 1213 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1278 <&scif_clk>; 1214 <&scif_clk>;
1279 clock-names = "fck", 1215 clock-names = "fck", "brg_int", "scif_clk";
1280 dmas = <&dmac1 0x5b>, 1216 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1281 <&dmac2 0x5b>, 1217 <&dmac2 0x5b>, <&dmac2 0x5a>;
1282 dma-names = "tx", "rx 1218 dma-names = "tx", "rx", "tx", "rx";
1283 power-domains = <&sys 1219 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1284 resets = <&cpg 202>; 1220 resets = <&cpg 202>;
1285 status = "disabled"; 1221 status = "disabled";
1286 }; 1222 };
1287 1223
1288 tpu: pwm@e6e80000 { 1224 tpu: pwm@e6e80000 {
1289 compatible = "renesas 1225 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1290 reg = <0 0xe6e80000 0 1226 reg = <0 0xe6e80000 0 0x148>;
1291 interrupts = <GIC_SPI 1227 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1292 clocks = <&cpg CPG_MO 1228 clocks = <&cpg CPG_MOD 304>;
1293 power-domains = <&sys 1229 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1294 resets = <&cpg 304>; 1230 resets = <&cpg 304>;
1295 #pwm-cells = <3>; 1231 #pwm-cells = <3>;
1296 status = "disabled"; 1232 status = "disabled";
1297 }; 1233 };
1298 1234
1299 msiof0: spi@e6e90000 { 1235 msiof0: spi@e6e90000 {
1300 compatible = "renesas 1236 compatible = "renesas,msiof-r8a77965",
1301 "renesas 1237 "renesas,rcar-gen3-msiof";
1302 reg = <0 0xe6e90000 0 1238 reg = <0 0xe6e90000 0 0x0064>;
1303 interrupts = <GIC_SPI 1239 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1304 clocks = <&cpg CPG_MO 1240 clocks = <&cpg CPG_MOD 211>;
1305 dmas = <&dmac1 0x41>, 1241 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1306 <&dmac2 0x41>, 1242 <&dmac2 0x41>, <&dmac2 0x40>;
1307 dma-names = "tx", "rx 1243 dma-names = "tx", "rx", "tx", "rx";
1308 power-domains = <&sys 1244 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1309 resets = <&cpg 211>; 1245 resets = <&cpg 211>;
1310 #address-cells = <1>; 1246 #address-cells = <1>;
1311 #size-cells = <0>; 1247 #size-cells = <0>;
1312 status = "disabled"; 1248 status = "disabled";
1313 }; 1249 };
1314 1250
1315 msiof1: spi@e6ea0000 { 1251 msiof1: spi@e6ea0000 {
1316 compatible = "renesas 1252 compatible = "renesas,msiof-r8a77965",
1317 "renesas 1253 "renesas,rcar-gen3-msiof";
1318 reg = <0 0xe6ea0000 0 1254 reg = <0 0xe6ea0000 0 0x0064>;
1319 interrupts = <GIC_SPI 1255 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MO 1256 clocks = <&cpg CPG_MOD 210>;
1321 dmas = <&dmac1 0x43>, 1257 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1322 <&dmac2 0x43>, 1258 <&dmac2 0x43>, <&dmac2 0x42>;
1323 dma-names = "tx", "rx 1259 dma-names = "tx", "rx", "tx", "rx";
1324 power-domains = <&sys 1260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1325 resets = <&cpg 210>; 1261 resets = <&cpg 210>;
1326 #address-cells = <1>; 1262 #address-cells = <1>;
1327 #size-cells = <0>; 1263 #size-cells = <0>;
1328 status = "disabled"; 1264 status = "disabled";
1329 }; 1265 };
1330 1266
1331 msiof2: spi@e6c00000 { 1267 msiof2: spi@e6c00000 {
1332 compatible = "renesas 1268 compatible = "renesas,msiof-r8a77965",
1333 "renesas 1269 "renesas,rcar-gen3-msiof";
1334 reg = <0 0xe6c00000 0 1270 reg = <0 0xe6c00000 0 0x0064>;
1335 interrupts = <GIC_SPI 1271 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MO 1272 clocks = <&cpg CPG_MOD 209>;
1337 dmas = <&dmac0 0x45>, 1273 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1338 dma-names = "tx", "rx 1274 dma-names = "tx", "rx";
1339 power-domains = <&sys 1275 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1340 resets = <&cpg 209>; 1276 resets = <&cpg 209>;
1341 #address-cells = <1>; 1277 #address-cells = <1>;
1342 #size-cells = <0>; 1278 #size-cells = <0>;
1343 status = "disabled"; 1279 status = "disabled";
1344 }; 1280 };
1345 1281
1346 msiof3: spi@e6c10000 { 1282 msiof3: spi@e6c10000 {
1347 compatible = "renesas 1283 compatible = "renesas,msiof-r8a77965",
1348 "renesas 1284 "renesas,rcar-gen3-msiof";
1349 reg = <0 0xe6c10000 0 1285 reg = <0 0xe6c10000 0 0x0064>;
1350 interrupts = <GIC_SPI 1286 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1351 clocks = <&cpg CPG_MO 1287 clocks = <&cpg CPG_MOD 208>;
1352 dmas = <&dmac0 0x47>, 1288 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1353 dma-names = "tx", "rx 1289 dma-names = "tx", "rx";
1354 power-domains = <&sys 1290 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1355 resets = <&cpg 208>; 1291 resets = <&cpg 208>;
1356 #address-cells = <1>; 1292 #address-cells = <1>;
1357 #size-cells = <0>; 1293 #size-cells = <0>;
1358 status = "disabled"; 1294 status = "disabled";
1359 }; 1295 };
1360 1296
1361 vin0: video@e6ef0000 { 1297 vin0: video@e6ef0000 {
1362 compatible = "renesas 1298 compatible = "renesas,vin-r8a77965";
1363 reg = <0 0xe6ef0000 0 1299 reg = <0 0xe6ef0000 0 0x1000>;
1364 interrupts = <GIC_SPI 1300 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MO 1301 clocks = <&cpg CPG_MOD 811>;
1366 power-domains = <&sys 1302 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1367 resets = <&cpg 811>; 1303 resets = <&cpg 811>;
1368 renesas,id = <0>; 1304 renesas,id = <0>;
1369 status = "disabled"; 1305 status = "disabled";
1370 1306
1371 ports { 1307 ports {
1372 #address-cell 1308 #address-cells = <1>;
1373 #size-cells = 1309 #size-cells = <0>;
1374 1310
1375 port@1 { 1311 port@1 {
1376 #addr 1312 #address-cells = <1>;
1377 #size 1313 #size-cells = <0>;
1378 1314
1379 reg = 1315 reg = <1>;
1380 1316
1381 vin0c 1317 vin0csi20: endpoint@0 {
1382 1318 reg = <0>;
1383 1319 remote-endpoint = <&csi20vin0>;
1384 }; 1320 };
1385 vin0c 1321 vin0csi40: endpoint@2 {
1386 1322 reg = <2>;
1387 1323 remote-endpoint = <&csi40vin0>;
1388 }; 1324 };
1389 }; 1325 };
1390 }; 1326 };
1391 }; 1327 };
1392 1328
1393 vin1: video@e6ef1000 { 1329 vin1: video@e6ef1000 {
1394 compatible = "renesas 1330 compatible = "renesas,vin-r8a77965";
1395 reg = <0 0xe6ef1000 0 1331 reg = <0 0xe6ef1000 0 0x1000>;
1396 interrupts = <GIC_SPI 1332 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MO 1333 clocks = <&cpg CPG_MOD 810>;
1398 power-domains = <&sys 1334 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1399 resets = <&cpg 810>; 1335 resets = <&cpg 810>;
1400 renesas,id = <1>; 1336 renesas,id = <1>;
1401 status = "disabled"; 1337 status = "disabled";
1402 1338
1403 ports { 1339 ports {
1404 #address-cell 1340 #address-cells = <1>;
1405 #size-cells = 1341 #size-cells = <0>;
1406 1342
1407 port@1 { 1343 port@1 {
1408 #addr 1344 #address-cells = <1>;
1409 #size 1345 #size-cells = <0>;
1410 1346
1411 reg = 1347 reg = <1>;
1412 1348
1413 vin1c 1349 vin1csi20: endpoint@0 {
1414 1350 reg = <0>;
1415 1351 remote-endpoint = <&csi20vin1>;
1416 }; 1352 };
1417 vin1c 1353 vin1csi40: endpoint@2 {
1418 1354 reg = <2>;
1419 1355 remote-endpoint = <&csi40vin1>;
1420 }; 1356 };
1421 }; 1357 };
1422 }; 1358 };
1423 }; 1359 };
1424 1360
1425 vin2: video@e6ef2000 { 1361 vin2: video@e6ef2000 {
1426 compatible = "renesas 1362 compatible = "renesas,vin-r8a77965";
1427 reg = <0 0xe6ef2000 0 1363 reg = <0 0xe6ef2000 0 0x1000>;
1428 interrupts = <GIC_SPI 1364 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MO 1365 clocks = <&cpg CPG_MOD 809>;
1430 power-domains = <&sys 1366 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1431 resets = <&cpg 809>; 1367 resets = <&cpg 809>;
1432 renesas,id = <2>; 1368 renesas,id = <2>;
1433 status = "disabled"; 1369 status = "disabled";
1434 1370
1435 ports { 1371 ports {
1436 #address-cell 1372 #address-cells = <1>;
1437 #size-cells = 1373 #size-cells = <0>;
1438 1374
1439 port@1 { 1375 port@1 {
1440 #addr 1376 #address-cells = <1>;
1441 #size 1377 #size-cells = <0>;
1442 1378
1443 reg = 1379 reg = <1>;
1444 1380
1445 vin2c 1381 vin2csi20: endpoint@0 {
1446 1382 reg = <0>;
1447 1383 remote-endpoint = <&csi20vin2>;
1448 }; 1384 };
1449 vin2c 1385 vin2csi40: endpoint@2 {
1450 1386 reg = <2>;
1451 1387 remote-endpoint = <&csi40vin2>;
1452 }; 1388 };
1453 }; 1389 };
1454 }; 1390 };
1455 }; 1391 };
1456 1392
1457 vin3: video@e6ef3000 { 1393 vin3: video@e6ef3000 {
1458 compatible = "renesas 1394 compatible = "renesas,vin-r8a77965";
1459 reg = <0 0xe6ef3000 0 1395 reg = <0 0xe6ef3000 0 0x1000>;
1460 interrupts = <GIC_SPI 1396 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MO 1397 clocks = <&cpg CPG_MOD 808>;
1462 power-domains = <&sys 1398 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1463 resets = <&cpg 808>; 1399 resets = <&cpg 808>;
1464 renesas,id = <3>; 1400 renesas,id = <3>;
1465 status = "disabled"; 1401 status = "disabled";
1466 1402
1467 ports { 1403 ports {
1468 #address-cell 1404 #address-cells = <1>;
1469 #size-cells = 1405 #size-cells = <0>;
1470 1406
1471 port@1 { 1407 port@1 {
1472 #addr 1408 #address-cells = <1>;
1473 #size 1409 #size-cells = <0>;
1474 1410
1475 reg = 1411 reg = <1>;
1476 1412
1477 vin3c 1413 vin3csi20: endpoint@0 {
1478 1414 reg = <0>;
1479 1415 remote-endpoint = <&csi20vin3>;
1480 }; 1416 };
1481 vin3c 1417 vin3csi40: endpoint@2 {
1482 1418 reg = <2>;
1483 1419 remote-endpoint = <&csi40vin3>;
1484 }; 1420 };
1485 }; 1421 };
1486 }; 1422 };
1487 }; 1423 };
1488 1424
1489 vin4: video@e6ef4000 { 1425 vin4: video@e6ef4000 {
1490 compatible = "renesas 1426 compatible = "renesas,vin-r8a77965";
1491 reg = <0 0xe6ef4000 0 1427 reg = <0 0xe6ef4000 0 0x1000>;
1492 interrupts = <GIC_SPI 1428 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MO 1429 clocks = <&cpg CPG_MOD 807>;
1494 power-domains = <&sys 1430 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1495 resets = <&cpg 807>; 1431 resets = <&cpg 807>;
1496 renesas,id = <4>; 1432 renesas,id = <4>;
1497 status = "disabled"; 1433 status = "disabled";
1498 1434
1499 ports { 1435 ports {
1500 #address-cell 1436 #address-cells = <1>;
1501 #size-cells = 1437 #size-cells = <0>;
1502 1438
1503 port@1 { 1439 port@1 {
1504 #addr 1440 #address-cells = <1>;
1505 #size 1441 #size-cells = <0>;
1506 1442
1507 reg = 1443 reg = <1>;
1508 1444
1509 vin4c 1445 vin4csi20: endpoint@0 {
1510 1446 reg = <0>;
1511 1447 remote-endpoint = <&csi20vin4>;
1512 }; 1448 };
1513 vin4c 1449 vin4csi40: endpoint@2 {
1514 1450 reg = <2>;
1515 1451 remote-endpoint = <&csi40vin4>;
1516 }; 1452 };
1517 }; 1453 };
1518 }; 1454 };
1519 }; 1455 };
1520 1456
1521 vin5: video@e6ef5000 { 1457 vin5: video@e6ef5000 {
1522 compatible = "renesas 1458 compatible = "renesas,vin-r8a77965";
1523 reg = <0 0xe6ef5000 0 1459 reg = <0 0xe6ef5000 0 0x1000>;
1524 interrupts = <GIC_SPI 1460 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MO 1461 clocks = <&cpg CPG_MOD 806>;
1526 power-domains = <&sys 1462 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1527 resets = <&cpg 806>; 1463 resets = <&cpg 806>;
1528 renesas,id = <5>; 1464 renesas,id = <5>;
1529 status = "disabled"; 1465 status = "disabled";
1530 1466
1531 ports { 1467 ports {
1532 #address-cell 1468 #address-cells = <1>;
1533 #size-cells = 1469 #size-cells = <0>;
1534 1470
1535 port@1 { 1471 port@1 {
1536 #addr 1472 #address-cells = <1>;
1537 #size 1473 #size-cells = <0>;
1538 1474
1539 reg = 1475 reg = <1>;
1540 1476
1541 vin5c 1477 vin5csi20: endpoint@0 {
1542 1478 reg = <0>;
1543 1479 remote-endpoint = <&csi20vin5>;
1544 }; 1480 };
1545 vin5c 1481 vin5csi40: endpoint@2 {
1546 1482 reg = <2>;
1547 1483 remote-endpoint = <&csi40vin5>;
1548 }; 1484 };
1549 }; 1485 };
1550 }; 1486 };
1551 }; 1487 };
1552 1488
1553 vin6: video@e6ef6000 { 1489 vin6: video@e6ef6000 {
1554 compatible = "renesas 1490 compatible = "renesas,vin-r8a77965";
1555 reg = <0 0xe6ef6000 0 1491 reg = <0 0xe6ef6000 0 0x1000>;
1556 interrupts = <GIC_SPI 1492 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1557 clocks = <&cpg CPG_MO 1493 clocks = <&cpg CPG_MOD 805>;
1558 power-domains = <&sys 1494 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1559 resets = <&cpg 805>; 1495 resets = <&cpg 805>;
1560 renesas,id = <6>; 1496 renesas,id = <6>;
1561 status = "disabled"; 1497 status = "disabled";
1562 1498
1563 ports { 1499 ports {
1564 #address-cell 1500 #address-cells = <1>;
1565 #size-cells = 1501 #size-cells = <0>;
1566 1502
1567 port@1 { 1503 port@1 {
1568 #addr 1504 #address-cells = <1>;
1569 #size 1505 #size-cells = <0>;
1570 1506
1571 reg = 1507 reg = <1>;
1572 1508
1573 vin6c 1509 vin6csi20: endpoint@0 {
1574 1510 reg = <0>;
1575 1511 remote-endpoint = <&csi20vin6>;
1576 }; 1512 };
1577 vin6c 1513 vin6csi40: endpoint@2 {
1578 1514 reg = <2>;
1579 1515 remote-endpoint = <&csi40vin6>;
1580 }; 1516 };
1581 }; 1517 };
1582 }; 1518 };
1583 }; 1519 };
1584 1520
1585 vin7: video@e6ef7000 { 1521 vin7: video@e6ef7000 {
1586 compatible = "renesas 1522 compatible = "renesas,vin-r8a77965";
1587 reg = <0 0xe6ef7000 0 1523 reg = <0 0xe6ef7000 0 0x1000>;
1588 interrupts = <GIC_SPI 1524 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1589 clocks = <&cpg CPG_MO 1525 clocks = <&cpg CPG_MOD 804>;
1590 power-domains = <&sys 1526 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1591 resets = <&cpg 804>; 1527 resets = <&cpg 804>;
1592 renesas,id = <7>; 1528 renesas,id = <7>;
1593 status = "disabled"; 1529 status = "disabled";
1594 1530
1595 ports { 1531 ports {
1596 #address-cell 1532 #address-cells = <1>;
1597 #size-cells = 1533 #size-cells = <0>;
1598 1534
1599 port@1 { 1535 port@1 {
1600 #addr 1536 #address-cells = <1>;
1601 #size 1537 #size-cells = <0>;
1602 1538
1603 reg = 1539 reg = <1>;
1604 1540
1605 vin7c 1541 vin7csi20: endpoint@0 {
1606 1542 reg = <0>;
1607 1543 remote-endpoint = <&csi20vin7>;
1608 }; 1544 };
1609 vin7c 1545 vin7csi40: endpoint@2 {
1610 1546 reg = <2>;
1611 1547 remote-endpoint = <&csi40vin7>;
1612 }; 1548 };
1613 }; 1549 };
1614 }; 1550 };
1615 }; 1551 };
1616 1552
1617 drif00: rif@e6f40000 { <<
1618 compatible = "renesas <<
1619 "renesas <<
1620 reg = <0 0xe6f40000 0 <<
1621 interrupts = <GIC_SPI <<
1622 clocks = <&cpg CPG_MO <<
1623 clock-names = "fck"; <<
1624 dmas = <&dmac1 0x20>, <<
1625 dma-names = "rx", "rx <<
1626 power-domains = <&sys <<
1627 resets = <&cpg 515>; <<
1628 renesas,bonding = <&d <<
1629 status = "disabled"; <<
1630 }; <<
1631 <<
1632 drif01: rif@e6f50000 { <<
1633 compatible = "renesas <<
1634 "renesas <<
1635 reg = <0 0xe6f50000 0 <<
1636 interrupts = <GIC_SPI <<
1637 clocks = <&cpg CPG_MO <<
1638 clock-names = "fck"; <<
1639 dmas = <&dmac1 0x22>, <<
1640 dma-names = "rx", "rx <<
1641 power-domains = <&sys <<
1642 resets = <&cpg 514>; <<
1643 renesas,bonding = <&d <<
1644 status = "disabled"; <<
1645 }; <<
1646 <<
1647 drif10: rif@e6f60000 { <<
1648 compatible = "renesas <<
1649 "renesas <<
1650 reg = <0 0xe6f60000 0 <<
1651 interrupts = <GIC_SPI <<
1652 clocks = <&cpg CPG_MO <<
1653 clock-names = "fck"; <<
1654 dmas = <&dmac1 0x24>, <<
1655 dma-names = "rx", "rx <<
1656 power-domains = <&sys <<
1657 resets = <&cpg 513>; <<
1658 renesas,bonding = <&d <<
1659 status = "disabled"; <<
1660 }; <<
1661 <<
1662 drif11: rif@e6f70000 { <<
1663 compatible = "renesas <<
1664 "renesas <<
1665 reg = <0 0xe6f70000 0 <<
1666 interrupts = <GIC_SPI <<
1667 clocks = <&cpg CPG_MO <<
1668 clock-names = "fck"; <<
1669 dmas = <&dmac1 0x26>, <<
1670 dma-names = "rx", "rx <<
1671 power-domains = <&sys <<
1672 resets = <&cpg 512>; <<
1673 renesas,bonding = <&d <<
1674 status = "disabled"; <<
1675 }; <<
1676 <<
1677 drif20: rif@e6f80000 { <<
1678 compatible = "renesas <<
1679 "renesas <<
1680 reg = <0 0xe6f80000 0 <<
1681 interrupts = <GIC_SPI <<
1682 clocks = <&cpg CPG_MO <<
1683 clock-names = "fck"; <<
1684 dmas = <&dmac1 0x28>, <<
1685 dma-names = "rx", "rx <<
1686 power-domains = <&sys <<
1687 resets = <&cpg 511>; <<
1688 renesas,bonding = <&d <<
1689 status = "disabled"; <<
1690 }; <<
1691 <<
1692 drif21: rif@e6f90000 { <<
1693 compatible = "renesas <<
1694 "renesas <<
1695 reg = <0 0xe6f90000 0 <<
1696 interrupts = <GIC_SPI <<
1697 clocks = <&cpg CPG_MO <<
1698 clock-names = "fck"; <<
1699 dmas = <&dmac1 0x2a>, <<
1700 dma-names = "rx", "rx <<
1701 power-domains = <&sys <<
1702 resets = <&cpg 510>; <<
1703 renesas,bonding = <&d <<
1704 status = "disabled"; <<
1705 }; <<
1706 <<
1707 drif30: rif@e6fa0000 { <<
1708 compatible = "renesas <<
1709 "renesas <<
1710 reg = <0 0xe6fa0000 0 <<
1711 interrupts = <GIC_SPI <<
1712 clocks = <&cpg CPG_MO <<
1713 clock-names = "fck"; <<
1714 dmas = <&dmac1 0x2c>, <<
1715 dma-names = "rx", "rx <<
1716 power-domains = <&sys <<
1717 resets = <&cpg 509>; <<
1718 renesas,bonding = <&d <<
1719 status = "disabled"; <<
1720 }; <<
1721 <<
1722 drif31: rif@e6fb0000 { <<
1723 compatible = "renesas <<
1724 "renesas <<
1725 reg = <0 0xe6fb0000 0 <<
1726 interrupts = <GIC_SPI <<
1727 clocks = <&cpg CPG_MO <<
1728 clock-names = "fck"; <<
1729 dmas = <&dmac1 0x2e>, <<
1730 dma-names = "rx", "rx <<
1731 power-domains = <&sys <<
1732 resets = <&cpg 508>; <<
1733 renesas,bonding = <&d <<
1734 status = "disabled"; <<
1735 }; <<
1736 <<
1737 rcar_sound: sound@ec500000 { 1553 rcar_sound: sound@ec500000 {
1738 /* 1554 /*
1739 * #sound-dai-cells i !! 1555 * #sound-dai-cells is required
1740 * 1556 *
1741 * Single DAI : #soun 1557 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1742 * Multi DAI : #soun 1558 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1743 */ 1559 */
1744 /* 1560 /*
1745 * #clock-cells is re 1561 * #clock-cells is required for audio_clkout0/1/2/3
1746 * 1562 *
1747 * clkout : #cl 1563 * clkout : #clock-cells = <0>; <&rcar_sound>;
1748 * clkout0/1/2/3: #cl 1564 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1749 */ 1565 */
1750 compatible = "renesas !! 1566 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1751 reg = <0 0xec500000 0 !! 1567 reg = <0 0xec500000 0 0x1000>, /* SCU */
1752 <0 0xec5a0000 0 !! 1568 <0 0xec5a0000 0 0x100>, /* ADG */
1753 <0 0xec540000 0 !! 1569 <0 0xec540000 0 0x1000>, /* SSIU */
1754 <0 0xec541000 0 !! 1570 <0 0xec541000 0 0x280>, /* SSI */
1755 <0 0xec760000 0 !! 1571 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1756 reg-names = "scu", "a 1572 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1757 1573
1758 clocks = <&cpg CPG_MO 1574 clocks = <&cpg CPG_MOD 1005>,
1759 <&cpg CPG_MO 1575 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1760 <&cpg CPG_MO 1576 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1761 <&cpg CPG_MO 1577 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1762 <&cpg CPG_MO 1578 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1763 <&cpg CPG_MO 1579 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1764 <&cpg CPG_MO 1580 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1765 <&cpg CPG_MO 1581 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1766 <&cpg CPG_MO 1582 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1767 <&cpg CPG_MO 1583 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1768 <&cpg CPG_MO 1584 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1769 <&cpg CPG_MO 1585 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1770 <&cpg CPG_MO 1586 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1771 <&cpg CPG_MO 1587 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1772 <&audio_clk_ 1588 <&audio_clk_a>, <&audio_clk_b>,
1773 <&audio_clk_ 1589 <&audio_clk_c>,
1774 <&cpg CPG_MO !! 1590 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1775 clock-names = "ssi-al 1591 clock-names = "ssi-all",
1776 "ssi.9" 1592 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1777 "ssi.5" 1593 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1778 "ssi.1" 1594 "ssi.1", "ssi.0",
1779 "src.9" 1595 "src.9", "src.8", "src.7", "src.6",
1780 "src.5" 1596 "src.5", "src.4", "src.3", "src.2",
1781 "src.1" 1597 "src.1", "src.0",
1782 "mix.1" 1598 "mix.1", "mix.0",
1783 "ctu.1" 1599 "ctu.1", "ctu.0",
1784 "dvc.0" 1600 "dvc.0", "dvc.1",
1785 "clk_a" 1601 "clk_a", "clk_b", "clk_c", "clk_i";
1786 power-domains = <&sys 1602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1787 resets = <&cpg 1005>, 1603 resets = <&cpg 1005>,
1788 <&cpg 1006>, 1604 <&cpg 1006>, <&cpg 1007>,
1789 <&cpg 1008>, 1605 <&cpg 1008>, <&cpg 1009>,
1790 <&cpg 1010>, 1606 <&cpg 1010>, <&cpg 1011>,
1791 <&cpg 1012>, 1607 <&cpg 1012>, <&cpg 1013>,
1792 <&cpg 1014>, 1608 <&cpg 1014>, <&cpg 1015>;
1793 reset-names = "ssi-al 1609 reset-names = "ssi-all",
1794 "ssi.9" 1610 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1795 "ssi.5" 1611 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1796 "ssi.1" 1612 "ssi.1", "ssi.0";
1797 status = "disabled"; 1613 status = "disabled";
1798 1614
1799 rcar_sound,dvc { 1615 rcar_sound,dvc {
1800 dvc0: dvc-0 { 1616 dvc0: dvc-0 {
1801 dmas 1617 dmas = <&audma1 0xbc>;
1802 dma-n 1618 dma-names = "tx";
1803 }; 1619 };
1804 dvc1: dvc-1 { 1620 dvc1: dvc-1 {
1805 dmas 1621 dmas = <&audma1 0xbe>;
1806 dma-n 1622 dma-names = "tx";
1807 }; 1623 };
1808 }; 1624 };
1809 1625
1810 rcar_sound,mix { 1626 rcar_sound,mix {
1811 mix0: mix-0 { 1627 mix0: mix-0 { };
1812 mix1: mix-1 { 1628 mix1: mix-1 { };
1813 }; 1629 };
1814 1630
1815 rcar_sound,ctu { 1631 rcar_sound,ctu {
1816 ctu00: ctu-0 1632 ctu00: ctu-0 { };
1817 ctu01: ctu-1 1633 ctu01: ctu-1 { };
1818 ctu02: ctu-2 1634 ctu02: ctu-2 { };
1819 ctu03: ctu-3 1635 ctu03: ctu-3 { };
1820 ctu10: ctu-4 1636 ctu10: ctu-4 { };
1821 ctu11: ctu-5 1637 ctu11: ctu-5 { };
1822 ctu12: ctu-6 1638 ctu12: ctu-6 { };
1823 ctu13: ctu-7 1639 ctu13: ctu-7 { };
1824 }; 1640 };
1825 1641
1826 rcar_sound,src { 1642 rcar_sound,src {
1827 src0: src-0 { 1643 src0: src-0 {
1828 inter 1644 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas 1645 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1830 dma-n 1646 dma-names = "rx", "tx";
1831 }; 1647 };
1832 src1: src-1 { 1648 src1: src-1 {
1833 inter 1649 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas 1650 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1835 dma-n 1651 dma-names = "rx", "tx";
1836 }; 1652 };
1837 src2: src-2 { 1653 src2: src-2 {
1838 inter 1654 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas 1655 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1840 dma-n 1656 dma-names = "rx", "tx";
1841 }; 1657 };
1842 src3: src-3 { 1658 src3: src-3 {
1843 inter 1659 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas 1660 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1845 dma-n 1661 dma-names = "rx", "tx";
1846 }; 1662 };
1847 src4: src-4 { 1663 src4: src-4 {
1848 inter 1664 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas 1665 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1850 dma-n 1666 dma-names = "rx", "tx";
1851 }; 1667 };
1852 src5: src-5 { 1668 src5: src-5 {
1853 inter 1669 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas 1670 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1855 dma-n 1671 dma-names = "rx", "tx";
1856 }; 1672 };
1857 src6: src-6 { 1673 src6: src-6 {
1858 inter 1674 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas 1675 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1860 dma-n 1676 dma-names = "rx", "tx";
1861 }; 1677 };
1862 src7: src-7 { 1678 src7: src-7 {
1863 inter 1679 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1864 dmas 1680 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1865 dma-n 1681 dma-names = "rx", "tx";
1866 }; 1682 };
1867 src8: src-8 { 1683 src8: src-8 {
1868 inter 1684 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1869 dmas 1685 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1870 dma-n 1686 dma-names = "rx", "tx";
1871 }; 1687 };
1872 src9: src-9 { 1688 src9: src-9 {
1873 inter 1689 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1874 dmas 1690 dmas = <&audma0 0x97>, <&audma1 0xba>;
1875 dma-n 1691 dma-names = "rx", "tx";
1876 }; 1692 };
1877 }; 1693 };
1878 1694
1879 rcar_sound,ssiu { 1695 rcar_sound,ssiu {
1880 ssiu00: ssiu- 1696 ssiu00: ssiu-0 {
1881 dmas 1697 dmas = <&audma0 0x15>, <&audma1 0x16>;
1882 dma-n 1698 dma-names = "rx", "tx";
1883 }; 1699 };
1884 ssiu01: ssiu- 1700 ssiu01: ssiu-1 {
1885 dmas 1701 dmas = <&audma0 0x35>, <&audma1 0x36>;
1886 dma-n 1702 dma-names = "rx", "tx";
1887 }; 1703 };
1888 ssiu02: ssiu- 1704 ssiu02: ssiu-2 {
1889 dmas 1705 dmas = <&audma0 0x37>, <&audma1 0x38>;
1890 dma-n 1706 dma-names = "rx", "tx";
1891 }; 1707 };
1892 ssiu03: ssiu- 1708 ssiu03: ssiu-3 {
1893 dmas 1709 dmas = <&audma0 0x47>, <&audma1 0x48>;
1894 dma-n 1710 dma-names = "rx", "tx";
1895 }; 1711 };
1896 ssiu04: ssiu- 1712 ssiu04: ssiu-4 {
1897 dmas 1713 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1898 dma-n 1714 dma-names = "rx", "tx";
1899 }; 1715 };
1900 ssiu05: ssiu- 1716 ssiu05: ssiu-5 {
1901 dmas 1717 dmas = <&audma0 0x43>, <&audma1 0x44>;
1902 dma-n 1718 dma-names = "rx", "tx";
1903 }; 1719 };
1904 ssiu06: ssiu- 1720 ssiu06: ssiu-6 {
1905 dmas 1721 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1906 dma-n 1722 dma-names = "rx", "tx";
1907 }; 1723 };
1908 ssiu07: ssiu- 1724 ssiu07: ssiu-7 {
1909 dmas 1725 dmas = <&audma0 0x53>, <&audma1 0x54>;
1910 dma-n 1726 dma-names = "rx", "tx";
1911 }; 1727 };
1912 ssiu10: ssiu- 1728 ssiu10: ssiu-8 {
1913 dmas 1729 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1914 dma-n 1730 dma-names = "rx", "tx";
1915 }; 1731 };
1916 ssiu11: ssiu- 1732 ssiu11: ssiu-9 {
1917 dmas 1733 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1918 dma-n 1734 dma-names = "rx", "tx";
1919 }; 1735 };
1920 ssiu12: ssiu- 1736 ssiu12: ssiu-10 {
1921 dmas 1737 dmas = <&audma0 0x57>, <&audma1 0x58>;
1922 dma-n 1738 dma-names = "rx", "tx";
1923 }; 1739 };
1924 ssiu13: ssiu- 1740 ssiu13: ssiu-11 {
1925 dmas 1741 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1926 dma-n 1742 dma-names = "rx", "tx";
1927 }; 1743 };
1928 ssiu14: ssiu- 1744 ssiu14: ssiu-12 {
1929 dmas 1745 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1930 dma-n 1746 dma-names = "rx", "tx";
1931 }; 1747 };
1932 ssiu15: ssiu- 1748 ssiu15: ssiu-13 {
1933 dmas 1749 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1934 dma-n 1750 dma-names = "rx", "tx";
1935 }; 1751 };
1936 ssiu16: ssiu- 1752 ssiu16: ssiu-14 {
1937 dmas 1753 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1938 dma-n 1754 dma-names = "rx", "tx";
1939 }; 1755 };
1940 ssiu17: ssiu- 1756 ssiu17: ssiu-15 {
1941 dmas 1757 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1942 dma-n 1758 dma-names = "rx", "tx";
1943 }; 1759 };
1944 ssiu20: ssiu- 1760 ssiu20: ssiu-16 {
1945 dmas 1761 dmas = <&audma0 0x63>, <&audma1 0x64>;
1946 dma-n 1762 dma-names = "rx", "tx";
1947 }; 1763 };
1948 ssiu21: ssiu- 1764 ssiu21: ssiu-17 {
1949 dmas 1765 dmas = <&audma0 0x67>, <&audma1 0x68>;
1950 dma-n 1766 dma-names = "rx", "tx";
1951 }; 1767 };
1952 ssiu22: ssiu- 1768 ssiu22: ssiu-18 {
1953 dmas 1769 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1954 dma-n 1770 dma-names = "rx", "tx";
1955 }; 1771 };
1956 ssiu23: ssiu- 1772 ssiu23: ssiu-19 {
1957 dmas 1773 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1958 dma-n 1774 dma-names = "rx", "tx";
1959 }; 1775 };
1960 ssiu24: ssiu- 1776 ssiu24: ssiu-20 {
1961 dmas 1777 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1962 dma-n 1778 dma-names = "rx", "tx";
1963 }; 1779 };
1964 ssiu25: ssiu- 1780 ssiu25: ssiu-21 {
1965 dmas 1781 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1966 dma-n 1782 dma-names = "rx", "tx";
1967 }; 1783 };
1968 ssiu26: ssiu- 1784 ssiu26: ssiu-22 {
1969 dmas 1785 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1970 dma-n 1786 dma-names = "rx", "tx";
1971 }; 1787 };
1972 ssiu27: ssiu- 1788 ssiu27: ssiu-23 {
1973 dmas 1789 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1974 dma-n 1790 dma-names = "rx", "tx";
1975 }; 1791 };
1976 ssiu30: ssiu- 1792 ssiu30: ssiu-24 {
1977 dmas 1793 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1978 dma-n 1794 dma-names = "rx", "tx";
1979 }; 1795 };
1980 ssiu31: ssiu- 1796 ssiu31: ssiu-25 {
1981 dmas 1797 dmas = <&audma0 0x21>, <&audma1 0x22>;
1982 dma-n 1798 dma-names = "rx", "tx";
1983 }; 1799 };
1984 ssiu32: ssiu- 1800 ssiu32: ssiu-26 {
1985 dmas 1801 dmas = <&audma0 0x23>, <&audma1 0x24>;
1986 dma-n 1802 dma-names = "rx", "tx";
1987 }; 1803 };
1988 ssiu33: ssiu- 1804 ssiu33: ssiu-27 {
1989 dmas 1805 dmas = <&audma0 0x25>, <&audma1 0x26>;
1990 dma-n 1806 dma-names = "rx", "tx";
1991 }; 1807 };
1992 ssiu34: ssiu- 1808 ssiu34: ssiu-28 {
1993 dmas 1809 dmas = <&audma0 0x27>, <&audma1 0x28>;
1994 dma-n 1810 dma-names = "rx", "tx";
1995 }; 1811 };
1996 ssiu35: ssiu- 1812 ssiu35: ssiu-29 {
1997 dmas 1813 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1998 dma-n 1814 dma-names = "rx", "tx";
1999 }; 1815 };
2000 ssiu36: ssiu- 1816 ssiu36: ssiu-30 {
2001 dmas 1817 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2002 dma-n 1818 dma-names = "rx", "tx";
2003 }; 1819 };
2004 ssiu37: ssiu- 1820 ssiu37: ssiu-31 {
2005 dmas 1821 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2006 dma-n 1822 dma-names = "rx", "tx";
2007 }; 1823 };
2008 ssiu40: ssiu- 1824 ssiu40: ssiu-32 {
2009 dmas !! 1825 dmas = <&audma0 0x71>, <&audma1 0x72>;
2010 dma-n 1826 dma-names = "rx", "tx";
2011 }; 1827 };
2012 ssiu41: ssiu- 1828 ssiu41: ssiu-33 {
2013 dmas 1829 dmas = <&audma0 0x17>, <&audma1 0x18>;
2014 dma-n 1830 dma-names = "rx", "tx";
2015 }; 1831 };
2016 ssiu42: ssiu- 1832 ssiu42: ssiu-34 {
2017 dmas 1833 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2018 dma-n 1834 dma-names = "rx", "tx";
2019 }; 1835 };
2020 ssiu43: ssiu- 1836 ssiu43: ssiu-35 {
2021 dmas 1837 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2022 dma-n 1838 dma-names = "rx", "tx";
2023 }; 1839 };
2024 ssiu44: ssiu- 1840 ssiu44: ssiu-36 {
2025 dmas 1841 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2026 dma-n 1842 dma-names = "rx", "tx";
2027 }; 1843 };
2028 ssiu45: ssiu- 1844 ssiu45: ssiu-37 {
2029 dmas 1845 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2030 dma-n 1846 dma-names = "rx", "tx";
2031 }; 1847 };
2032 ssiu46: ssiu- 1848 ssiu46: ssiu-38 {
2033 dmas 1849 dmas = <&audma0 0x31>, <&audma1 0x32>;
2034 dma-n 1850 dma-names = "rx", "tx";
2035 }; 1851 };
2036 ssiu47: ssiu- 1852 ssiu47: ssiu-39 {
2037 dmas 1853 dmas = <&audma0 0x33>, <&audma1 0x34>;
2038 dma-n 1854 dma-names = "rx", "tx";
2039 }; 1855 };
2040 ssiu50: ssiu- 1856 ssiu50: ssiu-40 {
2041 dmas 1857 dmas = <&audma0 0x73>, <&audma1 0x74>;
2042 dma-n 1858 dma-names = "rx", "tx";
2043 }; 1859 };
2044 ssiu60: ssiu- 1860 ssiu60: ssiu-41 {
2045 dmas 1861 dmas = <&audma0 0x75>, <&audma1 0x76>;
2046 dma-n 1862 dma-names = "rx", "tx";
2047 }; 1863 };
2048 ssiu70: ssiu- 1864 ssiu70: ssiu-42 {
2049 dmas 1865 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2050 dma-n 1866 dma-names = "rx", "tx";
2051 }; 1867 };
2052 ssiu80: ssiu- 1868 ssiu80: ssiu-43 {
2053 dmas 1869 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2054 dma-n 1870 dma-names = "rx", "tx";
2055 }; 1871 };
2056 ssiu90: ssiu- 1872 ssiu90: ssiu-44 {
2057 dmas 1873 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2058 dma-n 1874 dma-names = "rx", "tx";
2059 }; 1875 };
2060 ssiu91: ssiu- 1876 ssiu91: ssiu-45 {
2061 dmas 1877 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2062 dma-n 1878 dma-names = "rx", "tx";
2063 }; 1879 };
2064 ssiu92: ssiu- 1880 ssiu92: ssiu-46 {
2065 dmas 1881 dmas = <&audma0 0x81>, <&audma1 0x82>;
2066 dma-n 1882 dma-names = "rx", "tx";
2067 }; 1883 };
2068 ssiu93: ssiu- 1884 ssiu93: ssiu-47 {
2069 dmas 1885 dmas = <&audma0 0x83>, <&audma1 0x84>;
2070 dma-n 1886 dma-names = "rx", "tx";
2071 }; 1887 };
2072 ssiu94: ssiu- 1888 ssiu94: ssiu-48 {
2073 dmas 1889 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2074 dma-n 1890 dma-names = "rx", "tx";
2075 }; 1891 };
2076 ssiu95: ssiu- 1892 ssiu95: ssiu-49 {
2077 dmas 1893 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2078 dma-n 1894 dma-names = "rx", "tx";
2079 }; 1895 };
2080 ssiu96: ssiu- 1896 ssiu96: ssiu-50 {
2081 dmas 1897 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2082 dma-n 1898 dma-names = "rx", "tx";
2083 }; 1899 };
2084 ssiu97: ssiu- 1900 ssiu97: ssiu-51 {
2085 dmas 1901 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2086 dma-n 1902 dma-names = "rx", "tx";
2087 }; 1903 };
2088 }; 1904 };
2089 1905
2090 rcar_sound,ssi { 1906 rcar_sound,ssi {
2091 ssi0: ssi-0 { 1907 ssi0: ssi-0 {
2092 inter 1908 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2093 dmas 1909 dmas = <&audma0 0x01>, <&audma1 0x02>;
2094 dma-n 1910 dma-names = "rx", "tx";
2095 }; 1911 };
2096 ssi1: ssi-1 { 1912 ssi1: ssi-1 {
2097 inter 1913 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2098 dmas 1914 dmas = <&audma0 0x03>, <&audma1 0x04>;
2099 dma-n 1915 dma-names = "rx", "tx";
2100 }; 1916 };
2101 ssi2: ssi-2 { 1917 ssi2: ssi-2 {
2102 inter 1918 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2103 dmas 1919 dmas = <&audma0 0x05>, <&audma1 0x06>;
2104 dma-n 1920 dma-names = "rx", "tx";
2105 }; 1921 };
2106 ssi3: ssi-3 { 1922 ssi3: ssi-3 {
2107 inter 1923 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2108 dmas 1924 dmas = <&audma0 0x07>, <&audma1 0x08>;
2109 dma-n 1925 dma-names = "rx", "tx";
2110 }; 1926 };
2111 ssi4: ssi-4 { 1927 ssi4: ssi-4 {
2112 inter 1928 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2113 dmas 1929 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2114 dma-n 1930 dma-names = "rx", "tx";
2115 }; 1931 };
2116 ssi5: ssi-5 { 1932 ssi5: ssi-5 {
2117 inter 1933 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2118 dmas 1934 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2119 dma-n 1935 dma-names = "rx", "tx";
2120 }; 1936 };
2121 ssi6: ssi-6 { 1937 ssi6: ssi-6 {
2122 inter 1938 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2123 dmas 1939 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2124 dma-n 1940 dma-names = "rx", "tx";
2125 }; 1941 };
2126 ssi7: ssi-7 { 1942 ssi7: ssi-7 {
2127 inter 1943 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2128 dmas 1944 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2129 dma-n 1945 dma-names = "rx", "tx";
2130 }; 1946 };
2131 ssi8: ssi-8 { 1947 ssi8: ssi-8 {
2132 inter 1948 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2133 dmas 1949 dmas = <&audma0 0x11>, <&audma1 0x12>;
2134 dma-n 1950 dma-names = "rx", "tx";
2135 }; 1951 };
2136 ssi9: ssi-9 { 1952 ssi9: ssi-9 {
2137 inter 1953 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2138 dmas 1954 dmas = <&audma0 0x13>, <&audma1 0x14>;
2139 dma-n 1955 dma-names = "rx", "tx";
2140 }; 1956 };
2141 }; 1957 };
2142 }; 1958 };
2143 1959
2144 mlp: mlp@ec520000 { <<
2145 compatible = "renesas <<
2146 "renesas <<
2147 reg = <0 0xec520000 0 <<
2148 interrupts = <GIC_SPI <<
2149 <GIC_SPI 385 <<
2150 clocks = <&cpg CPG_MO <<
2151 power-domains = <&sys <<
2152 resets = <&cpg 802>; <<
2153 status = "disabled"; <<
2154 }; <<
2155 <<
2156 audma0: dma-controller@ec7000 1960 audma0: dma-controller@ec700000 {
2157 compatible = "renesas 1961 compatible = "renesas,dmac-r8a77965",
2158 "renesas 1962 "renesas,rcar-dmac";
2159 reg = <0 0xec700000 0 1963 reg = <0 0xec700000 0 0x10000>;
2160 interrupts = <GIC_SPI 1964 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2161 <GIC_SPI 1965 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2162 <GIC_SPI 1966 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2163 <GIC_SPI 1967 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2164 <GIC_SPI 1968 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2165 <GIC_SPI 1969 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2166 <GIC_SPI 1970 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2167 <GIC_SPI 1971 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2168 <GIC_SPI 1972 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2169 <GIC_SPI 1973 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2170 <GIC_SPI 1974 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2171 <GIC_SPI 1975 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2172 <GIC_SPI 1976 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2173 <GIC_SPI 1977 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2174 <GIC_SPI 1978 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2175 <GIC_SPI 1979 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2176 <GIC_SPI 1980 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2177 interrupt-names = "er 1981 interrupt-names = "error",
2178 "ch0" 1982 "ch0", "ch1", "ch2", "ch3",
2179 "ch4" 1983 "ch4", "ch5", "ch6", "ch7",
2180 "ch8" 1984 "ch8", "ch9", "ch10", "ch11",
2181 "ch12 1985 "ch12", "ch13", "ch14", "ch15";
2182 clocks = <&cpg CPG_MO 1986 clocks = <&cpg CPG_MOD 502>;
2183 clock-names = "fck"; 1987 clock-names = "fck";
2184 power-domains = <&sys 1988 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2185 resets = <&cpg 502>; 1989 resets = <&cpg 502>;
2186 #dma-cells = <1>; 1990 #dma-cells = <1>;
2187 dma-channels = <16>; 1991 dma-channels = <16>;
2188 iommus = <&ipmmu_mp 0 <<
2189 <&ipmmu_mp 2 <<
2190 <&ipmmu_mp 4 <<
2191 <&ipmmu_mp 6 <<
2192 <&ipmmu_mp 8 <<
2193 <&ipmmu_mp 1 <<
2194 <&ipmmu_mp 1 <<
2195 <&ipmmu_mp 1 <<
2196 }; 1992 };
2197 1993
2198 audma1: dma-controller@ec7200 1994 audma1: dma-controller@ec720000 {
2199 compatible = "renesas 1995 compatible = "renesas,dmac-r8a77965",
2200 "renesas 1996 "renesas,rcar-dmac";
2201 reg = <0 0xec720000 0 1997 reg = <0 0xec720000 0 0x10000>;
2202 interrupts = <GIC_SPI 1998 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 1999 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2204 <GIC_SPI 2000 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2205 <GIC_SPI 2001 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2206 <GIC_SPI 2002 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2207 <GIC_SPI 2003 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2208 <GIC_SPI 2004 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2209 <GIC_SPI 2005 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2210 <GIC_SPI 2006 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2211 <GIC_SPI 2007 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2212 <GIC_SPI 2008 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2213 <GIC_SPI 2009 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2214 <GIC_SPI 2010 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2215 <GIC_SPI 2011 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2216 <GIC_SPI 2012 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2217 <GIC_SPI 2013 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2218 <GIC_SPI 2014 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2219 interrupt-names = "er 2015 interrupt-names = "error",
2220 "ch0" 2016 "ch0", "ch1", "ch2", "ch3",
2221 "ch4" 2017 "ch4", "ch5", "ch6", "ch7",
2222 "ch8" 2018 "ch8", "ch9", "ch10", "ch11",
2223 "ch12 2019 "ch12", "ch13", "ch14", "ch15";
2224 clocks = <&cpg CPG_MO 2020 clocks = <&cpg CPG_MOD 501>;
2225 clock-names = "fck"; 2021 clock-names = "fck";
2226 power-domains = <&sys 2022 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2227 resets = <&cpg 501>; 2023 resets = <&cpg 501>;
2228 #dma-cells = <1>; 2024 #dma-cells = <1>;
2229 dma-channels = <16>; 2025 dma-channels = <16>;
2230 iommus = <&ipmmu_mp 1 <<
2231 <&ipmmu_mp 1 <<
2232 <&ipmmu_mp 2 <<
2233 <&ipmmu_mp 2 <<
2234 <&ipmmu_mp 2 <<
2235 <&ipmmu_mp 2 <<
2236 <&ipmmu_mp 2 <<
2237 <&ipmmu_mp 3 <<
2238 }; 2026 };
2239 2027
2240 xhci0: usb@ee000000 { 2028 xhci0: usb@ee000000 {
2241 compatible = "renesas 2029 compatible = "renesas,xhci-r8a77965",
2242 "renesas 2030 "renesas,rcar-gen3-xhci";
2243 reg = <0 0xee000000 0 2031 reg = <0 0xee000000 0 0xc00>;
2244 interrupts = <GIC_SPI 2032 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2245 clocks = <&cpg CPG_MO 2033 clocks = <&cpg CPG_MOD 328>;
2246 power-domains = <&sys 2034 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2247 resets = <&cpg 328>; 2035 resets = <&cpg 328>;
2248 status = "disabled"; 2036 status = "disabled";
2249 }; 2037 };
2250 2038
2251 usb3_peri0: usb@ee020000 { 2039 usb3_peri0: usb@ee020000 {
2252 compatible = "renesas 2040 compatible = "renesas,r8a77965-usb3-peri",
2253 "renesas 2041 "renesas,rcar-gen3-usb3-peri";
2254 reg = <0 0xee020000 0 2042 reg = <0 0xee020000 0 0x400>;
2255 interrupts = <GIC_SPI 2043 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2256 clocks = <&cpg CPG_MO 2044 clocks = <&cpg CPG_MOD 328>;
2257 power-domains = <&sys 2045 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2258 resets = <&cpg 328>; 2046 resets = <&cpg 328>;
2259 status = "disabled"; 2047 status = "disabled";
2260 }; 2048 };
2261 2049
2262 ohci0: usb@ee080000 { 2050 ohci0: usb@ee080000 {
2263 compatible = "generic 2051 compatible = "generic-ohci";
2264 reg = <0 0xee080000 0 2052 reg = <0 0xee080000 0 0x100>;
2265 interrupts = <GIC_SPI 2053 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2266 clocks = <&cpg CPG_MO 2054 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2267 phys = <&usb2_phy0 1> 2055 phys = <&usb2_phy0 1>;
2268 phy-names = "usb"; 2056 phy-names = "usb";
2269 power-domains = <&sys 2057 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2270 resets = <&cpg 703>, 2058 resets = <&cpg 703>, <&cpg 704>;
2271 status = "disabled"; 2059 status = "disabled";
2272 }; 2060 };
2273 2061
2274 ohci1: usb@ee0a0000 { 2062 ohci1: usb@ee0a0000 {
2275 compatible = "generic 2063 compatible = "generic-ohci";
2276 reg = <0 0xee0a0000 0 2064 reg = <0 0xee0a0000 0 0x100>;
2277 interrupts = <GIC_SPI 2065 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2278 clocks = <&cpg CPG_MO 2066 clocks = <&cpg CPG_MOD 702>;
2279 phys = <&usb2_phy1 1> 2067 phys = <&usb2_phy1 1>;
2280 phy-names = "usb"; 2068 phy-names = "usb";
2281 power-domains = <&sys 2069 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2282 resets = <&cpg 702>; 2070 resets = <&cpg 702>;
2283 status = "disabled"; 2071 status = "disabled";
2284 }; 2072 };
2285 2073
2286 ehci0: usb@ee080100 { 2074 ehci0: usb@ee080100 {
2287 compatible = "generic 2075 compatible = "generic-ehci";
2288 reg = <0 0xee080100 0 2076 reg = <0 0xee080100 0 0x100>;
2289 interrupts = <GIC_SPI 2077 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2290 clocks = <&cpg CPG_MO 2078 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2291 phys = <&usb2_phy0 2> 2079 phys = <&usb2_phy0 2>;
2292 phy-names = "usb"; 2080 phy-names = "usb";
2293 companion = <&ohci0>; 2081 companion = <&ohci0>;
2294 power-domains = <&sys 2082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2295 resets = <&cpg 703>, 2083 resets = <&cpg 703>, <&cpg 704>;
2296 status = "disabled"; 2084 status = "disabled";
2297 }; 2085 };
2298 2086
2299 ehci1: usb@ee0a0100 { 2087 ehci1: usb@ee0a0100 {
2300 compatible = "generic 2088 compatible = "generic-ehci";
2301 reg = <0 0xee0a0100 0 2089 reg = <0 0xee0a0100 0 0x100>;
2302 interrupts = <GIC_SPI 2090 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2303 clocks = <&cpg CPG_MO 2091 clocks = <&cpg CPG_MOD 702>;
2304 phys = <&usb2_phy1 2> 2092 phys = <&usb2_phy1 2>;
2305 phy-names = "usb"; 2093 phy-names = "usb";
2306 companion = <&ohci1>; 2094 companion = <&ohci1>;
2307 power-domains = <&sys 2095 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2308 resets = <&cpg 702>; 2096 resets = <&cpg 702>;
2309 status = "disabled"; 2097 status = "disabled";
2310 }; 2098 };
2311 2099
2312 usb2_phy0: usb-phy@ee080200 { 2100 usb2_phy0: usb-phy@ee080200 {
2313 compatible = "renesas 2101 compatible = "renesas,usb2-phy-r8a77965",
2314 "renesas 2102 "renesas,rcar-gen3-usb2-phy";
2315 reg = <0 0xee080200 0 2103 reg = <0 0xee080200 0 0x700>;
2316 interrupts = <GIC_SPI 2104 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MO 2105 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2318 power-domains = <&sys 2106 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2319 resets = <&cpg 703>, 2107 resets = <&cpg 703>, <&cpg 704>;
2320 #phy-cells = <1>; 2108 #phy-cells = <1>;
2321 status = "disabled"; 2109 status = "disabled";
2322 }; 2110 };
2323 2111
2324 usb2_phy1: usb-phy@ee0a0200 { 2112 usb2_phy1: usb-phy@ee0a0200 {
2325 compatible = "renesas 2113 compatible = "renesas,usb2-phy-r8a77965",
2326 "renesas 2114 "renesas,rcar-gen3-usb2-phy";
2327 reg = <0 0xee0a0200 0 2115 reg = <0 0xee0a0200 0 0x700>;
2328 clocks = <&cpg CPG_MO 2116 clocks = <&cpg CPG_MOD 702>;
2329 power-domains = <&sys 2117 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2330 resets = <&cpg 702>; 2118 resets = <&cpg 702>;
2331 #phy-cells = <1>; 2119 #phy-cells = <1>;
2332 status = "disabled"; 2120 status = "disabled";
2333 }; 2121 };
2334 2122
2335 sdhi0: mmc@ee100000 { 2123 sdhi0: mmc@ee100000 {
2336 compatible = "renesas 2124 compatible = "renesas,sdhi-r8a77965",
2337 "renesas 2125 "renesas,rcar-gen3-sdhi";
2338 reg = <0 0xee100000 0 2126 reg = <0 0xee100000 0 0x2000>;
2339 interrupts = <GIC_SPI 2127 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2340 clocks = <&cpg CPG_MO !! 2128 clocks = <&cpg CPG_MOD 314>;
2341 clock-names = "core", <<
2342 max-frequency = <2000 2129 max-frequency = <200000000>;
2343 power-domains = <&sys 2130 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2344 resets = <&cpg 314>; 2131 resets = <&cpg 314>;
2345 iommus = <&ipmmu_ds1 2132 iommus = <&ipmmu_ds1 32>;
2346 status = "disabled"; 2133 status = "disabled";
2347 }; 2134 };
2348 2135
2349 sdhi1: mmc@ee120000 { 2136 sdhi1: mmc@ee120000 {
2350 compatible = "renesas 2137 compatible = "renesas,sdhi-r8a77965",
2351 "renesas 2138 "renesas,rcar-gen3-sdhi";
2352 reg = <0 0xee120000 0 2139 reg = <0 0xee120000 0 0x2000>;
2353 interrupts = <GIC_SPI 2140 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MO !! 2141 clocks = <&cpg CPG_MOD 313>;
2355 clock-names = "core", <<
2356 max-frequency = <2000 2142 max-frequency = <200000000>;
2357 power-domains = <&sys 2143 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2358 resets = <&cpg 313>; 2144 resets = <&cpg 313>;
2359 iommus = <&ipmmu_ds1 2145 iommus = <&ipmmu_ds1 33>;
2360 status = "disabled"; 2146 status = "disabled";
2361 }; 2147 };
2362 2148
2363 sdhi2: mmc@ee140000 { 2149 sdhi2: mmc@ee140000 {
2364 compatible = "renesas 2150 compatible = "renesas,sdhi-r8a77965",
2365 "renesas 2151 "renesas,rcar-gen3-sdhi";
2366 reg = <0 0xee140000 0 2152 reg = <0 0xee140000 0 0x2000>;
2367 interrupts = <GIC_SPI 2153 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2368 clocks = <&cpg CPG_MO !! 2154 clocks = <&cpg CPG_MOD 312>;
2369 clock-names = "core", <<
2370 max-frequency = <2000 2155 max-frequency = <200000000>;
2371 power-domains = <&sys 2156 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2372 resets = <&cpg 312>; 2157 resets = <&cpg 312>;
2373 iommus = <&ipmmu_ds1 2158 iommus = <&ipmmu_ds1 34>;
2374 status = "disabled"; 2159 status = "disabled";
2375 }; 2160 };
2376 2161
2377 sdhi3: mmc@ee160000 { 2162 sdhi3: mmc@ee160000 {
2378 compatible = "renesas 2163 compatible = "renesas,sdhi-r8a77965",
2379 "renesas 2164 "renesas,rcar-gen3-sdhi";
2380 reg = <0 0xee160000 0 2165 reg = <0 0xee160000 0 0x2000>;
2381 interrupts = <GIC_SPI 2166 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2382 clocks = <&cpg CPG_MO !! 2167 clocks = <&cpg CPG_MOD 311>;
2383 clock-names = "core", <<
2384 max-frequency = <2000 2168 max-frequency = <200000000>;
2385 power-domains = <&sys 2169 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2386 resets = <&cpg 311>; 2170 resets = <&cpg 311>;
2387 iommus = <&ipmmu_ds1 2171 iommus = <&ipmmu_ds1 35>;
2388 status = "disabled"; 2172 status = "disabled";
2389 }; 2173 };
2390 2174
2391 rpc: spi@ee200000 { <<
2392 compatible = "renesas <<
2393 "renesas <<
2394 reg = <0 0xee200000 0 <<
2395 <0 0x08000000 0 <<
2396 <0 0xee208000 0 <<
2397 reg-names = "regs", " <<
2398 interrupts = <GIC_SPI <<
2399 clocks = <&cpg CPG_MO <<
2400 power-domains = <&sys <<
2401 resets = <&cpg 917>; <<
2402 #address-cells = <1>; <<
2403 #size-cells = <0>; <<
2404 status = "disabled"; <<
2405 }; <<
2406 <<
2407 sata: sata@ee300000 { 2175 sata: sata@ee300000 {
2408 compatible = "renesas 2176 compatible = "renesas,sata-r8a77965",
2409 "renesas 2177 "renesas,rcar-gen3-sata";
2410 reg = <0 0xee300000 0 2178 reg = <0 0xee300000 0 0x200000>;
2411 interrupts = <GIC_SPI 2179 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2412 clocks = <&cpg CPG_MO 2180 clocks = <&cpg CPG_MOD 815>;
2413 power-domains = <&sys 2181 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2414 resets = <&cpg 815>; 2182 resets = <&cpg 815>;
2415 iommus = <&ipmmu_hc 2 <<
2416 status = "disabled"; 2183 status = "disabled";
2417 }; 2184 };
2418 2185
2419 gic: interrupt-controller@f10 2186 gic: interrupt-controller@f1010000 {
2420 compatible = "arm,gic 2187 compatible = "arm,gic-400";
2421 #interrupt-cells = <3 2188 #interrupt-cells = <3>;
2422 #address-cells = <0>; 2189 #address-cells = <0>;
2423 interrupt-controller; 2190 interrupt-controller;
2424 reg = <0x0 0xf1010000 2191 reg = <0x0 0xf1010000 0 0x1000>,
2425 <0x0 0xf1020000 2192 <0x0 0xf1020000 0 0x20000>,
2426 <0x0 0xf1040000 2193 <0x0 0xf1040000 0 0x20000>,
2427 <0x0 0xf1060000 2194 <0x0 0xf1060000 0 0x20000>;
2428 interrupts = <GIC_PPI 2195 interrupts = <GIC_PPI 9
2429 (GIC_ 2196 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2430 clocks = <&cpg CPG_MO 2197 clocks = <&cpg CPG_MOD 408>;
2431 clock-names = "clk"; 2198 clock-names = "clk";
2432 power-domains = <&sys 2199 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2433 resets = <&cpg 408>; 2200 resets = <&cpg 408>;
2434 }; 2201 };
2435 2202
2436 pciec0: pcie@fe000000 { 2203 pciec0: pcie@fe000000 {
2437 compatible = "renesas 2204 compatible = "renesas,pcie-r8a77965",
2438 "renesas 2205 "renesas,pcie-rcar-gen3";
2439 reg = <0 0xfe000000 0 2206 reg = <0 0xfe000000 0 0x80000>;
2440 #address-cells = <3>; 2207 #address-cells = <3>;
2441 #size-cells = <2>; 2208 #size-cells = <2>;
2442 bus-range = <0x00 0xf 2209 bus-range = <0x00 0xff>;
2443 device_type = "pci"; 2210 device_type = "pci";
2444 ranges = <0x01000000 2211 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2445 <0x02000000 2212 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2446 <0x02000000 2213 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2447 <0x42000000 2214 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2448 /* Map all possible D !! 2215 /* Map all possible DDR as inbound ranges */
2449 dma-ranges = <0x42000 !! 2216 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2450 interrupts = <GIC_SPI 2217 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 117 2218 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2452 <GIC_SPI 118 2219 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2453 #interrupt-cells = <1 2220 #interrupt-cells = <1>;
2454 interrupt-map-mask = 2221 interrupt-map-mask = <0 0 0 0>;
2455 interrupt-map = <0 0 2222 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2456 clocks = <&cpg CPG_MO 2223 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2457 clock-names = "pcie", 2224 clock-names = "pcie", "pcie_bus";
2458 power-domains = <&sys 2225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2459 resets = <&cpg 319>; 2226 resets = <&cpg 319>;
2460 iommu-map = <0 &ipmmu <<
2461 iommu-map-mask = <0>; <<
2462 status = "disabled"; 2227 status = "disabled";
2463 }; 2228 };
2464 2229
2465 pciec1: pcie@ee800000 { 2230 pciec1: pcie@ee800000 {
2466 compatible = "renesas 2231 compatible = "renesas,pcie-r8a77965",
2467 "renesas 2232 "renesas,pcie-rcar-gen3";
2468 reg = <0 0xee800000 0 2233 reg = <0 0xee800000 0 0x80000>;
2469 #address-cells = <3>; 2234 #address-cells = <3>;
2470 #size-cells = <2>; 2235 #size-cells = <2>;
2471 bus-range = <0x00 0xf 2236 bus-range = <0x00 0xff>;
2472 device_type = "pci"; 2237 device_type = "pci";
2473 ranges = <0x01000000 2238 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2474 <0x02000000 2239 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2475 <0x02000000 2240 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2476 <0x42000000 2241 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2477 /* Map all possible D !! 2242 /* Map all possible DDR as inbound ranges */
2478 dma-ranges = <0x42000 !! 2243 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2479 interrupts = <GIC_SPI 2244 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2480 <GIC_SPI 149 2245 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 150 2246 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2482 #interrupt-cells = <1 2247 #interrupt-cells = <1>;
2483 interrupt-map-mask = 2248 interrupt-map-mask = <0 0 0 0>;
2484 interrupt-map = <0 0 2249 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MO 2250 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2486 clock-names = "pcie", 2251 clock-names = "pcie", "pcie_bus";
2487 power-domains = <&sys 2252 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2488 resets = <&cpg 318>; 2253 resets = <&cpg 318>;
2489 iommu-map = <0 &ipmmu <<
2490 iommu-map-mask = <0>; <<
2491 status = "disabled"; 2254 status = "disabled";
2492 }; 2255 };
2493 2256
2494 fdp1@fe940000 { 2257 fdp1@fe940000 {
2495 compatible = "renesas 2258 compatible = "renesas,fdp1";
2496 reg = <0 0xfe940000 0 2259 reg = <0 0xfe940000 0 0x2400>;
2497 interrupts = <GIC_SPI 2260 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2498 clocks = <&cpg CPG_MO 2261 clocks = <&cpg CPG_MOD 119>;
2499 power-domains = <&sys 2262 power-domains = <&sysc R8A77965_PD_A3VP>;
2500 resets = <&cpg 119>; 2263 resets = <&cpg 119>;
2501 renesas,fcp = <&fcpf0 2264 renesas,fcp = <&fcpf0>;
2502 }; 2265 };
2503 2266
2504 fcpf0: fcp@fe950000 { 2267 fcpf0: fcp@fe950000 {
2505 compatible = "renesas 2268 compatible = "renesas,fcpf";
2506 reg = <0 0xfe950000 0 2269 reg = <0 0xfe950000 0 0x200>;
2507 clocks = <&cpg CPG_MO 2270 clocks = <&cpg CPG_MOD 615>;
2508 power-domains = <&sys 2271 power-domains = <&sysc R8A77965_PD_A3VP>;
2509 resets = <&cpg 615>; 2272 resets = <&cpg 615>;
2510 iommus = <&ipmmu_vp0 <<
2511 }; 2273 };
2512 2274
2513 vspb: vsp@fe960000 { 2275 vspb: vsp@fe960000 {
2514 compatible = "renesas 2276 compatible = "renesas,vsp2";
2515 reg = <0 0xfe960000 0 2277 reg = <0 0xfe960000 0 0x8000>;
2516 interrupts = <GIC_SPI 2278 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2517 clocks = <&cpg CPG_MO 2279 clocks = <&cpg CPG_MOD 626>;
2518 power-domains = <&sys 2280 power-domains = <&sysc R8A77965_PD_A3VP>;
2519 resets = <&cpg 626>; 2281 resets = <&cpg 626>;
2520 2282
2521 renesas,fcp = <&fcpvb 2283 renesas,fcp = <&fcpvb0>;
2522 }; 2284 };
2523 2285
2524 vspi0: vsp@fe9a0000 { 2286 vspi0: vsp@fe9a0000 {
2525 compatible = "renesas 2287 compatible = "renesas,vsp2";
2526 reg = <0 0xfe9a0000 0 2288 reg = <0 0xfe9a0000 0 0x8000>;
2527 interrupts = <GIC_SPI 2289 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2528 clocks = <&cpg CPG_MO 2290 clocks = <&cpg CPG_MOD 631>;
2529 power-domains = <&sys 2291 power-domains = <&sysc R8A77965_PD_A3VP>;
2530 resets = <&cpg 631>; 2292 resets = <&cpg 631>;
2531 2293
2532 renesas,fcp = <&fcpvi 2294 renesas,fcp = <&fcpvi0>;
2533 }; 2295 };
2534 2296
2535 vspd0: vsp@fea20000 { 2297 vspd0: vsp@fea20000 {
2536 compatible = "renesas 2298 compatible = "renesas,vsp2";
2537 reg = <0 0xfea20000 0 2299 reg = <0 0xfea20000 0 0x5000>;
2538 interrupts = <GIC_SPI 2300 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2539 clocks = <&cpg CPG_MO 2301 clocks = <&cpg CPG_MOD 623>;
2540 power-domains = <&sys 2302 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2541 resets = <&cpg 623>; 2303 resets = <&cpg 623>;
2542 2304
2543 renesas,fcp = <&fcpvd 2305 renesas,fcp = <&fcpvd0>;
2544 }; 2306 };
2545 2307
2546 vspd1: vsp@fea28000 { 2308 vspd1: vsp@fea28000 {
2547 compatible = "renesas 2309 compatible = "renesas,vsp2";
2548 reg = <0 0xfea28000 0 2310 reg = <0 0xfea28000 0 0x5000>;
2549 interrupts = <GIC_SPI 2311 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2550 clocks = <&cpg CPG_MO 2312 clocks = <&cpg CPG_MOD 622>;
2551 power-domains = <&sys 2313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2552 resets = <&cpg 622>; 2314 resets = <&cpg 622>;
2553 2315
2554 renesas,fcp = <&fcpvd 2316 renesas,fcp = <&fcpvd1>;
2555 }; 2317 };
2556 2318
2557 fcpvb0: fcp@fe96f000 { 2319 fcpvb0: fcp@fe96f000 {
2558 compatible = "renesas 2320 compatible = "renesas,fcpv";
2559 reg = <0 0xfe96f000 0 2321 reg = <0 0xfe96f000 0 0x200>;
2560 clocks = <&cpg CPG_MO 2322 clocks = <&cpg CPG_MOD 607>;
2561 power-domains = <&sys 2323 power-domains = <&sysc R8A77965_PD_A3VP>;
2562 resets = <&cpg 607>; 2324 resets = <&cpg 607>;
2563 iommus = <&ipmmu_vp0 <<
2564 }; 2325 };
2565 2326
2566 fcpvd0: fcp@fea27000 { 2327 fcpvd0: fcp@fea27000 {
2567 compatible = "renesas 2328 compatible = "renesas,fcpv";
2568 reg = <0 0xfea27000 0 2329 reg = <0 0xfea27000 0 0x200>;
2569 clocks = <&cpg CPG_MO 2330 clocks = <&cpg CPG_MOD 603>;
2570 power-domains = <&sys 2331 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2571 resets = <&cpg 603>; 2332 resets = <&cpg 603>;
2572 iommus = <&ipmmu_vi0 <<
2573 }; 2333 };
2574 2334
2575 fcpvd1: fcp@fea2f000 { 2335 fcpvd1: fcp@fea2f000 {
2576 compatible = "renesas 2336 compatible = "renesas,fcpv";
2577 reg = <0 0xfea2f000 0 2337 reg = <0 0xfea2f000 0 0x200>;
2578 clocks = <&cpg CPG_MO 2338 clocks = <&cpg CPG_MOD 602>;
2579 power-domains = <&sys 2339 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2580 resets = <&cpg 602>; 2340 resets = <&cpg 602>;
2581 iommus = <&ipmmu_vi0 <<
2582 }; 2341 };
2583 2342
2584 fcpvi0: fcp@fe9af000 { 2343 fcpvi0: fcp@fe9af000 {
2585 compatible = "renesas 2344 compatible = "renesas,fcpv";
2586 reg = <0 0xfe9af000 0 2345 reg = <0 0xfe9af000 0 0x200>;
2587 clocks = <&cpg CPG_MO 2346 clocks = <&cpg CPG_MOD 611>;
2588 power-domains = <&sys 2347 power-domains = <&sysc R8A77965_PD_A3VP>;
2589 resets = <&cpg 611>; 2348 resets = <&cpg 611>;
2590 iommus = <&ipmmu_vp0 <<
2591 }; 2349 };
2592 2350
2593 cmm0: cmm@fea40000 { 2351 cmm0: cmm@fea40000 {
2594 compatible = "renesas 2352 compatible = "renesas,r8a77965-cmm",
2595 "renesas 2353 "renesas,rcar-gen3-cmm";
2596 reg = <0 0xfea40000 0 2354 reg = <0 0xfea40000 0 0x1000>;
2597 power-domains = <&sys 2355 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2598 clocks = <&cpg CPG_MO 2356 clocks = <&cpg CPG_MOD 711>;
2599 resets = <&cpg 711>; 2357 resets = <&cpg 711>;
2600 }; 2358 };
2601 2359
2602 cmm1: cmm@fea50000 { 2360 cmm1: cmm@fea50000 {
2603 compatible = "renesas 2361 compatible = "renesas,r8a77965-cmm",
2604 "renesas 2362 "renesas,rcar-gen3-cmm";
2605 reg = <0 0xfea50000 0 2363 reg = <0 0xfea50000 0 0x1000>;
2606 power-domains = <&sys 2364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2607 clocks = <&cpg CPG_MO 2365 clocks = <&cpg CPG_MOD 710>;
2608 resets = <&cpg 710>; 2366 resets = <&cpg 710>;
2609 }; 2367 };
2610 2368
2611 cmm3: cmm@fea70000 { 2369 cmm3: cmm@fea70000 {
2612 compatible = "renesas 2370 compatible = "renesas,r8a77965-cmm",
2613 "renesas 2371 "renesas,rcar-gen3-cmm";
2614 reg = <0 0xfea70000 0 2372 reg = <0 0xfea70000 0 0x1000>;
2615 power-domains = <&sys 2373 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2616 clocks = <&cpg CPG_MO 2374 clocks = <&cpg CPG_MOD 708>;
2617 resets = <&cpg 708>; 2375 resets = <&cpg 708>;
2618 }; 2376 };
2619 2377
2620 csi20: csi2@fea80000 { 2378 csi20: csi2@fea80000 {
2621 compatible = "renesas 2379 compatible = "renesas,r8a77965-csi2";
2622 reg = <0 0xfea80000 0 2380 reg = <0 0xfea80000 0 0x10000>;
2623 interrupts = <GIC_SPI 2381 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2624 clocks = <&cpg CPG_MO 2382 clocks = <&cpg CPG_MOD 714>;
2625 power-domains = <&sys 2383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2626 resets = <&cpg 714>; 2384 resets = <&cpg 714>;
2627 status = "disabled"; 2385 status = "disabled";
2628 2386
2629 ports { 2387 ports {
2630 #address-cell 2388 #address-cells = <1>;
2631 #size-cells = 2389 #size-cells = <0>;
2632 2390
2633 port@0 { <<
2634 reg = <<
2635 }; <<
2636 <<
2637 port@1 { 2391 port@1 {
2638 #addr 2392 #address-cells = <1>;
2639 #size 2393 #size-cells = <0>;
2640 2394
2641 reg = 2395 reg = <1>;
2642 2396
2643 csi20 2397 csi20vin0: endpoint@0 {
2644 2398 reg = <0>;
2645 2399 remote-endpoint = <&vin0csi20>;
2646 }; 2400 };
2647 csi20 2401 csi20vin1: endpoint@1 {
2648 2402 reg = <1>;
2649 2403 remote-endpoint = <&vin1csi20>;
2650 }; 2404 };
2651 csi20 2405 csi20vin2: endpoint@2 {
2652 2406 reg = <2>;
2653 2407 remote-endpoint = <&vin2csi20>;
2654 }; 2408 };
2655 csi20 2409 csi20vin3: endpoint@3 {
2656 2410 reg = <3>;
2657 2411 remote-endpoint = <&vin3csi20>;
2658 }; 2412 };
2659 csi20 2413 csi20vin4: endpoint@4 {
2660 2414 reg = <4>;
2661 2415 remote-endpoint = <&vin4csi20>;
2662 }; 2416 };
2663 csi20 2417 csi20vin5: endpoint@5 {
2664 2418 reg = <5>;
2665 2419 remote-endpoint = <&vin5csi20>;
2666 }; 2420 };
2667 csi20 2421 csi20vin6: endpoint@6 {
2668 2422 reg = <6>;
2669 2423 remote-endpoint = <&vin6csi20>;
2670 }; 2424 };
2671 csi20 2425 csi20vin7: endpoint@7 {
2672 2426 reg = <7>;
2673 2427 remote-endpoint = <&vin7csi20>;
2674 }; 2428 };
2675 }; 2429 };
2676 }; 2430 };
2677 }; 2431 };
2678 2432
2679 csi40: csi2@feaa0000 { 2433 csi40: csi2@feaa0000 {
2680 compatible = "renesas 2434 compatible = "renesas,r8a77965-csi2";
2681 reg = <0 0xfeaa0000 0 2435 reg = <0 0xfeaa0000 0 0x10000>;
2682 interrupts = <GIC_SPI 2436 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2683 clocks = <&cpg CPG_MO 2437 clocks = <&cpg CPG_MOD 716>;
2684 power-domains = <&sys 2438 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2685 resets = <&cpg 716>; 2439 resets = <&cpg 716>;
2686 status = "disabled"; 2440 status = "disabled";
2687 2441
2688 ports { 2442 ports {
2689 #address-cell 2443 #address-cells = <1>;
2690 #size-cells = 2444 #size-cells = <0>;
2691 2445
2692 port@0 { <<
2693 reg = <<
2694 }; <<
2695 <<
2696 port@1 { 2446 port@1 {
2697 #addr 2447 #address-cells = <1>;
2698 #size 2448 #size-cells = <0>;
2699 2449
2700 reg = 2450 reg = <1>;
2701 2451
2702 csi40 2452 csi40vin0: endpoint@0 {
2703 2453 reg = <0>;
2704 2454 remote-endpoint = <&vin0csi40>;
2705 }; 2455 };
2706 csi40 2456 csi40vin1: endpoint@1 {
2707 2457 reg = <1>;
2708 2458 remote-endpoint = <&vin1csi40>;
2709 }; 2459 };
2710 csi40 2460 csi40vin2: endpoint@2 {
2711 2461 reg = <2>;
2712 2462 remote-endpoint = <&vin2csi40>;
2713 }; 2463 };
2714 csi40 2464 csi40vin3: endpoint@3 {
2715 2465 reg = <3>;
2716 2466 remote-endpoint = <&vin3csi40>;
2717 }; 2467 };
2718 csi40 2468 csi40vin4: endpoint@4 {
2719 2469 reg = <4>;
2720 2470 remote-endpoint = <&vin4csi40>;
2721 }; 2471 };
2722 csi40 2472 csi40vin5: endpoint@5 {
2723 2473 reg = <5>;
2724 2474 remote-endpoint = <&vin5csi40>;
2725 }; 2475 };
2726 csi40 2476 csi40vin6: endpoint@6 {
2727 2477 reg = <6>;
2728 2478 remote-endpoint = <&vin6csi40>;
2729 }; 2479 };
2730 csi40 2480 csi40vin7: endpoint@7 {
2731 2481 reg = <7>;
2732 2482 remote-endpoint = <&vin7csi40>;
2733 }; 2483 };
2734 }; 2484 };
2735 }; 2485 };
2736 }; 2486 };
2737 2487
2738 hdmi0: hdmi@fead0000 { 2488 hdmi0: hdmi@fead0000 {
2739 compatible = "renesas 2489 compatible = "renesas,r8a77965-hdmi",
2740 "renesas 2490 "renesas,rcar-gen3-hdmi";
2741 reg = <0 0xfead0000 0 2491 reg = <0 0xfead0000 0 0x10000>;
2742 interrupts = <GIC_SPI 2492 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2743 clocks = <&cpg CPG_MO 2493 clocks = <&cpg CPG_MOD 729>,
2744 <&cpg CPG_CO 2494 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2745 clock-names = "iahb", 2495 clock-names = "iahb", "isfr";
2746 power-domains = <&sys 2496 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2747 resets = <&cpg 729>; 2497 resets = <&cpg 729>;
2748 status = "disabled"; 2498 status = "disabled";
2749 2499
2750 ports { 2500 ports {
2751 #address-cell 2501 #address-cells = <1>;
2752 #size-cells = 2502 #size-cells = <0>;
2753 port@0 { 2503 port@0 {
2754 reg = 2504 reg = <0>;
2755 dw_hd 2505 dw_hdmi0_in: endpoint {
2756 2506 remote-endpoint = <&du_out_hdmi0>;
2757 }; 2507 };
2758 }; 2508 };
2759 port@1 { 2509 port@1 {
2760 reg = 2510 reg = <1>;
2761 }; 2511 };
2762 }; 2512 };
2763 }; 2513 };
2764 2514
2765 du: display@feb00000 { 2515 du: display@feb00000 {
2766 compatible = "renesas 2516 compatible = "renesas,du-r8a77965";
2767 reg = <0 0xfeb00000 0 2517 reg = <0 0xfeb00000 0 0x80000>;
2768 interrupts = <GIC_SPI 2518 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2769 <GIC_SPI 2519 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2770 <GIC_SPI 2520 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2771 clocks = <&cpg CPG_MO 2521 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2772 <&cpg CPG_MO 2522 <&cpg CPG_MOD 721>;
2773 clock-names = "du.0", 2523 clock-names = "du.0", "du.1", "du.3";
2774 resets = <&cpg 724>, 2524 resets = <&cpg 724>, <&cpg 722>;
2775 reset-names = "du.0", 2525 reset-names = "du.0", "du.3";
2776 2526
2777 renesas,cmms = <&cmm0 2527 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
2778 renesas,vsps = <&vspd 2528 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2779 2529
2780 status = "disabled"; 2530 status = "disabled";
2781 2531
2782 ports { 2532 ports {
2783 #address-cell 2533 #address-cells = <1>;
2784 #size-cells = 2534 #size-cells = <0>;
2785 2535
2786 port@0 { 2536 port@0 {
2787 reg = 2537 reg = <0>;
>> 2538 du_out_rgb: endpoint {
>> 2539 };
2788 }; 2540 };
2789 port@1 { 2541 port@1 {
2790 reg = 2542 reg = <1>;
2791 du_ou 2543 du_out_hdmi0: endpoint {
2792 2544 remote-endpoint = <&dw_hdmi0_in>;
2793 }; 2545 };
2794 }; 2546 };
2795 port@2 { 2547 port@2 {
2796 reg = 2548 reg = <2>;
2797 du_ou 2549 du_out_lvds0: endpoint {
2798 2550 remote-endpoint = <&lvds0_in>;
2799 }; 2551 };
2800 }; 2552 };
2801 }; 2553 };
2802 }; 2554 };
2803 2555
2804 lvds0: lvds@feb90000 { 2556 lvds0: lvds@feb90000 {
2805 compatible = "renesas 2557 compatible = "renesas,r8a77965-lvds";
2806 reg = <0 0xfeb90000 0 2558 reg = <0 0xfeb90000 0 0x14>;
2807 clocks = <&cpg CPG_MO 2559 clocks = <&cpg CPG_MOD 727>;
2808 power-domains = <&sys 2560 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2809 resets = <&cpg 727>; 2561 resets = <&cpg 727>;
2810 status = "disabled"; 2562 status = "disabled";
2811 2563
2812 ports { 2564 ports {
2813 #address-cell 2565 #address-cells = <1>;
2814 #size-cells = 2566 #size-cells = <0>;
2815 2567
2816 port@0 { 2568 port@0 {
2817 reg = 2569 reg = <0>;
2818 lvds0 2570 lvds0_in: endpoint {
2819 2571 remote-endpoint = <&du_out_lvds0>;
2820 }; 2572 };
2821 }; 2573 };
2822 port@1 { 2574 port@1 {
2823 reg = 2575 reg = <1>;
>> 2576 lvds0_out: endpoint {
>> 2577 };
2824 }; 2578 };
2825 }; 2579 };
2826 }; 2580 };
2827 2581
2828 prr: chipid@fff00044 { 2582 prr: chipid@fff00044 {
2829 compatible = "renesas 2583 compatible = "renesas,prr";
2830 reg = <0 0xfff00044 0 2584 reg = <0 0xfff00044 0 4>;
2831 }; 2585 };
2832 }; 2586 };
2833 2587
2834 thermal-zones { 2588 thermal-zones {
2835 sensor1_thermal: sensor1-ther !! 2589 sensor_thermal1: sensor-thermal1 {
2836 polling-delay-passive 2590 polling-delay-passive = <250>;
2837 polling-delay = <1000 2591 polling-delay = <1000>;
2838 thermal-sensors = <&t 2592 thermal-sensors = <&tsc 0>;
2839 sustainable-power = < 2593 sustainable-power = <2439>;
2840 2594
2841 trips { 2595 trips {
2842 sensor1_crit: 2596 sensor1_crit: sensor1-crit {
2843 tempe 2597 temperature = <120000>;
2844 hyste 2598 hysteresis = <1000>;
2845 type 2599 type = "critical";
2846 }; 2600 };
2847 }; 2601 };
2848 }; 2602 };
2849 2603
2850 sensor2_thermal: sensor2-ther !! 2604 sensor_thermal2: sensor-thermal2 {
2851 polling-delay-passive 2605 polling-delay-passive = <250>;
2852 polling-delay = <1000 2606 polling-delay = <1000>;
2853 thermal-sensors = <&t 2607 thermal-sensors = <&tsc 1>;
2854 sustainable-power = < 2608 sustainable-power = <2439>;
2855 2609
2856 trips { 2610 trips {
2857 sensor2_crit: 2611 sensor2_crit: sensor2-crit {
2858 tempe 2612 temperature = <120000>;
2859 hyste 2613 hysteresis = <1000>;
2860 type 2614 type = "critical";
2861 }; 2615 };
2862 }; 2616 };
2863 }; 2617 };
2864 2618
2865 sensor3_thermal: sensor3-ther !! 2619 sensor_thermal3: sensor-thermal3 {
2866 polling-delay-passive 2620 polling-delay-passive = <250>;
2867 polling-delay = <1000 2621 polling-delay = <1000>;
2868 thermal-sensors = <&t 2622 thermal-sensors = <&tsc 2>;
2869 sustainable-power = < 2623 sustainable-power = <2439>;
2870 2624
2871 trips { 2625 trips {
2872 target: trip- 2626 target: trip-point1 {
2873 /* mi 2627 /* miliCelsius */
2874 tempe 2628 temperature = <100000>;
2875 hyste 2629 hysteresis = <1000>;
2876 type 2630 type = "passive";
2877 }; 2631 };
2878 2632
2879 sensor3_crit: 2633 sensor3_crit: sensor3-crit {
2880 tempe 2634 temperature = <120000>;
2881 hyste 2635 hysteresis = <1000>;
2882 type 2636 type = "critical";
2883 }; 2637 };
2884 }; 2638 };
2885 2639
2886 cooling-maps { 2640 cooling-maps {
2887 map0 { 2641 map0 {
2888 trip 2642 trip = <&target>;
2889 cooli 2643 cooling-device = <&a57_0 2 4>;
2890 contr 2644 contribution = <1024>;
2891 }; 2645 };
2892 }; 2646 };
2893 }; 2647 };
2894 }; 2648 };
2895 2649
2896 timer { 2650 timer {
2897 compatible = "arm,armv8-timer 2651 compatible = "arm,armv8-timer";
2898 interrupts-extended = <&gic G 2652 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2899 <&gic G 2653 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2900 <&gic G 2654 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2901 <&gic G 2655 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2902 interrupt-names = "sec-phys", <<
2903 }; 2656 };
2904 2657
2905 /* External USB clocks - can be overr 2658 /* External USB clocks - can be overridden by the board */
2906 usb3s0_clk: usb3s0 { 2659 usb3s0_clk: usb3s0 {
2907 compatible = "fixed-clock"; 2660 compatible = "fixed-clock";
2908 #clock-cells = <0>; 2661 #clock-cells = <0>;
2909 clock-frequency = <0>; 2662 clock-frequency = <0>;
2910 }; 2663 };
2911 2664
2912 usb_extal_clk: usb_extal { 2665 usb_extal_clk: usb_extal {
2913 compatible = "fixed-clock"; 2666 compatible = "fixed-clock";
2914 #clock-cells = <0>; 2667 #clock-cells = <0>;
2915 clock-frequency = <0>; 2668 clock-frequency = <0>;
2916 }; 2669 };
2917 }; 2670 };
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