1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car M3-N (R8A7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 * 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+rene 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 * 6 *
7 * Based on r8a7796.dtsi 7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp 8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */ 9 */
10 10
11 #include <dt-bindings/clock/r8a77965-cpg-mssr. 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h> 13 #include <dt-bindings/power/r8a77965-sysc.h>
14 14
>> 15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
>> 16
15 #define SOC_HAS_SATA 17 #define SOC_HAS_SATA
16 18
17 / { 19 / {
18 compatible = "renesas,r8a77965"; 20 compatible = "renesas,r8a77965";
19 #address-cells = <2>; 21 #address-cells = <2>;
20 #size-cells = <2>; 22 #size-cells = <2>;
21 23
>> 24 aliases {
>> 25 i2c0 = &i2c0;
>> 26 i2c1 = &i2c1;
>> 27 i2c2 = &i2c2;
>> 28 i2c3 = &i2c3;
>> 29 i2c4 = &i2c4;
>> 30 i2c5 = &i2c5;
>> 31 i2c6 = &i2c6;
>> 32 i2c7 = &i2c_dvfs;
>> 33 };
>> 34
22 /* 35 /*
23 * The external audio clocks are confi 36 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default. 37 * clocks by default.
25 * Boards that provide audio clocks sh 38 * Boards that provide audio clocks should override them.
26 */ 39 */
27 audio_clk_a: audio_clk_a { 40 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock"; 41 compatible = "fixed-clock";
29 #clock-cells = <0>; 42 #clock-cells = <0>;
30 clock-frequency = <0>; 43 clock-frequency = <0>;
31 }; 44 };
32 45
33 audio_clk_b: audio_clk_b { 46 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock"; 47 compatible = "fixed-clock";
35 #clock-cells = <0>; 48 #clock-cells = <0>;
36 clock-frequency = <0>; 49 clock-frequency = <0>;
37 }; 50 };
38 51
39 audio_clk_c: audio_clk_c { 52 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
41 #clock-cells = <0>; 54 #clock-cells = <0>;
42 clock-frequency = <0>; 55 clock-frequency = <0>;
43 }; 56 };
44 57
45 /* External CAN clock - to be overridd 58 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can { 59 can_clk: can {
47 compatible = "fixed-clock"; 60 compatible = "fixed-clock";
48 #clock-cells = <0>; 61 #clock-cells = <0>;
49 clock-frequency = <0>; 62 clock-frequency = <0>;
50 }; 63 };
51 64
52 cluster0_opp: opp-table-0 { 65 cluster0_opp: opp-table-0 {
53 compatible = "operating-points 66 compatible = "operating-points-v2";
54 opp-shared; 67 opp-shared;
55 68
56 opp-500000000 { 69 opp-500000000 {
57 opp-hz = /bits/ 64 <50 70 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <83000 71 opp-microvolt = <830000>;
59 clock-latency-ns = <30 72 clock-latency-ns = <300000>;
60 }; 73 };
61 opp-1000000000 { 74 opp-1000000000 {
62 opp-hz = /bits/ 64 <10 75 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <83000 76 opp-microvolt = <830000>;
64 clock-latency-ns = <30 77 clock-latency-ns = <300000>;
65 }; 78 };
66 opp-1500000000 { 79 opp-1500000000 {
67 opp-hz = /bits/ 64 <15 80 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <83000 81 opp-microvolt = <830000>;
69 clock-latency-ns = <30 82 clock-latency-ns = <300000>;
70 opp-suspend; 83 opp-suspend;
71 }; 84 };
72 opp-1600000000 { 85 opp-1600000000 {
73 opp-hz = /bits/ 64 <16 86 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <90000 87 opp-microvolt = <900000>;
75 clock-latency-ns = <30 88 clock-latency-ns = <300000>;
>> 89 turbo-mode;
76 }; 90 };
77 opp-1700000000 { 91 opp-1700000000 {
78 opp-hz = /bits/ 64 <17 92 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <90000 93 opp-microvolt = <900000>;
80 clock-latency-ns = <30 94 clock-latency-ns = <300000>;
>> 95 turbo-mode;
81 }; 96 };
82 opp-1800000000 { 97 opp-1800000000 {
83 opp-hz = /bits/ 64 <18 98 opp-hz = /bits/ 64 <1800000000>;
84 opp-microvolt = <96000 99 opp-microvolt = <960000>;
85 clock-latency-ns = <30 100 clock-latency-ns = <300000>;
86 turbo-mode; 101 turbo-mode;
87 }; 102 };
88 }; 103 };
89 104
90 cpus { 105 cpus {
91 #address-cells = <1>; 106 #address-cells = <1>;
92 #size-cells = <0>; 107 #size-cells = <0>;
93 108
94 a57_0: cpu@0 { 109 a57_0: cpu@0 {
95 compatible = "arm,cort 110 compatible = "arm,cortex-a57";
96 reg = <0x0>; 111 reg = <0x0>;
97 device_type = "cpu"; 112 device_type = "cpu";
98 power-domains = <&sysc 113 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
99 next-level-cache = <&L 114 next-level-cache = <&L2_CA57>;
100 enable-method = "psci" 115 enable-method = "psci";
101 cpu-idle-states = <&CP 116 cpu-idle-states = <&CPU_SLEEP_0>;
102 #cooling-cells = <2>; 117 #cooling-cells = <2>;
103 dynamic-power-coeffici 118 dynamic-power-coefficient = <854>;
104 clocks = <&cpg CPG_COR 119 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
105 operating-points-v2 = 120 operating-points-v2 = <&cluster0_opp>;
106 }; 121 };
107 122
108 a57_1: cpu@1 { 123 a57_1: cpu@1 {
109 compatible = "arm,cort 124 compatible = "arm,cortex-a57";
110 reg = <0x1>; 125 reg = <0x1>;
111 device_type = "cpu"; 126 device_type = "cpu";
112 power-domains = <&sysc 127 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
113 next-level-cache = <&L 128 next-level-cache = <&L2_CA57>;
114 enable-method = "psci" 129 enable-method = "psci";
115 cpu-idle-states = <&CP 130 cpu-idle-states = <&CPU_SLEEP_0>;
116 clocks = <&cpg CPG_COR 131 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
117 operating-points-v2 = 132 operating-points-v2 = <&cluster0_opp>;
118 }; 133 };
119 134
120 L2_CA57: cache-controller-0 { 135 L2_CA57: cache-controller-0 {
121 compatible = "cache"; 136 compatible = "cache";
122 power-domains = <&sysc 137 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
123 cache-unified; 138 cache-unified;
124 cache-level = <2>; 139 cache-level = <2>;
125 }; 140 };
126 141
127 idle-states { 142 idle-states {
128 entry-method = "psci"; 143 entry-method = "psci";
129 144
130 CPU_SLEEP_0: cpu-sleep 145 CPU_SLEEP_0: cpu-sleep-0 {
131 compatible = " 146 compatible = "arm,idle-state";
132 arm,psci-suspe 147 arm,psci-suspend-param = <0x0010000>;
133 local-timer-st 148 local-timer-stop;
134 entry-latency- 149 entry-latency-us = <400>;
135 exit-latency-u 150 exit-latency-us = <500>;
136 min-residency- 151 min-residency-us = <4000>;
137 }; 152 };
138 }; 153 };
139 }; 154 };
140 155
141 extal_clk: extal { 156 extal_clk: extal {
142 compatible = "fixed-clock"; 157 compatible = "fixed-clock";
143 #clock-cells = <0>; 158 #clock-cells = <0>;
144 /* This value must be overridd 159 /* This value must be overridden by the board */
145 clock-frequency = <0>; 160 clock-frequency = <0>;
146 }; 161 };
147 162
148 extalr_clk: extalr { 163 extalr_clk: extalr {
149 compatible = "fixed-clock"; 164 compatible = "fixed-clock";
150 #clock-cells = <0>; 165 #clock-cells = <0>;
151 /* This value must be overridd 166 /* This value must be overridden by the board */
152 clock-frequency = <0>; 167 clock-frequency = <0>;
153 }; 168 };
154 169
155 /* External PCIe clock - can be overri 170 /* External PCIe clock - can be overridden by the board */
156 pcie_bus_clk: pcie_bus { 171 pcie_bus_clk: pcie_bus {
157 compatible = "fixed-clock"; 172 compatible = "fixed-clock";
158 #clock-cells = <0>; 173 #clock-cells = <0>;
159 clock-frequency = <0>; 174 clock-frequency = <0>;
160 }; 175 };
161 176
162 pmu_a57 { 177 pmu_a57 {
163 compatible = "arm,cortex-a57-p 178 compatible = "arm,cortex-a57-pmu";
164 interrupts-extended = <&gic GI 179 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
165 <&gic GI 180 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166 interrupt-affinity = <&a57_0>, 181 interrupt-affinity = <&a57_0>,
167 <&a57_1>; 182 <&a57_1>;
168 }; 183 };
169 184
170 psci { 185 psci {
171 compatible = "arm,psci-1.0", " 186 compatible = "arm,psci-1.0", "arm,psci-0.2";
172 method = "smc"; 187 method = "smc";
173 }; 188 };
174 189
175 /* External SCIF clock - to be overrid 190 /* External SCIF clock - to be overridden by boards that provide it */
176 scif_clk: scif { 191 scif_clk: scif {
177 compatible = "fixed-clock"; 192 compatible = "fixed-clock";
178 #clock-cells = <0>; 193 #clock-cells = <0>;
179 clock-frequency = <0>; 194 clock-frequency = <0>;
180 }; 195 };
181 196
182 soc { 197 soc {
183 compatible = "simple-bus"; 198 compatible = "simple-bus";
184 interrupt-parent = <&gic>; 199 interrupt-parent = <&gic>;
185 #address-cells = <2>; 200 #address-cells = <2>;
186 #size-cells = <2>; 201 #size-cells = <2>;
187 ranges; 202 ranges;
188 203
189 rwdt: watchdog@e6020000 { 204 rwdt: watchdog@e6020000 {
190 compatible = "renesas, 205 compatible = "renesas,r8a77965-wdt",
191 "renesas, 206 "renesas,rcar-gen3-wdt";
192 reg = <0 0xe6020000 0 207 reg = <0 0xe6020000 0 0x0c>;
193 interrupts = <GIC_SPI 208 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
194 clocks = <&cpg CPG_MOD 209 clocks = <&cpg CPG_MOD 402>;
195 power-domains = <&sysc 210 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
196 resets = <&cpg 402>; 211 resets = <&cpg 402>;
197 status = "disabled"; 212 status = "disabled";
198 }; 213 };
199 214
200 gpio0: gpio@e6050000 { 215 gpio0: gpio@e6050000 {
201 compatible = "renesas, 216 compatible = "renesas,gpio-r8a77965",
202 "renesas, 217 "renesas,rcar-gen3-gpio";
203 reg = <0 0xe6050000 0 218 reg = <0 0xe6050000 0 0x50>;
204 interrupts = <GIC_SPI 219 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>; 220 #gpio-cells = <2>;
206 gpio-controller; 221 gpio-controller;
207 gpio-ranges = <&pfc 0 222 gpio-ranges = <&pfc 0 0 16>;
208 #interrupt-cells = <2> 223 #interrupt-cells = <2>;
209 interrupt-controller; 224 interrupt-controller;
210 clocks = <&cpg CPG_MOD 225 clocks = <&cpg CPG_MOD 912>;
211 power-domains = <&sysc 226 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
212 resets = <&cpg 912>; 227 resets = <&cpg 912>;
213 }; 228 };
214 229
215 gpio1: gpio@e6051000 { 230 gpio1: gpio@e6051000 {
216 compatible = "renesas, 231 compatible = "renesas,gpio-r8a77965",
217 "renesas, 232 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6051000 0 233 reg = <0 0xe6051000 0 0x50>;
219 interrupts = <GIC_SPI 234 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>; 235 #gpio-cells = <2>;
221 gpio-controller; 236 gpio-controller;
222 gpio-ranges = <&pfc 0 237 gpio-ranges = <&pfc 0 32 29>;
223 #interrupt-cells = <2> 238 #interrupt-cells = <2>;
224 interrupt-controller; 239 interrupt-controller;
225 clocks = <&cpg CPG_MOD 240 clocks = <&cpg CPG_MOD 911>;
226 power-domains = <&sysc 241 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
227 resets = <&cpg 911>; 242 resets = <&cpg 911>;
228 }; 243 };
229 244
230 gpio2: gpio@e6052000 { 245 gpio2: gpio@e6052000 {
231 compatible = "renesas, 246 compatible = "renesas,gpio-r8a77965",
232 "renesas, 247 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6052000 0 248 reg = <0 0xe6052000 0 0x50>;
234 interrupts = <GIC_SPI 249 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>; 250 #gpio-cells = <2>;
236 gpio-controller; 251 gpio-controller;
237 gpio-ranges = <&pfc 0 252 gpio-ranges = <&pfc 0 64 15>;
238 #interrupt-cells = <2> 253 #interrupt-cells = <2>;
239 interrupt-controller; 254 interrupt-controller;
240 clocks = <&cpg CPG_MOD 255 clocks = <&cpg CPG_MOD 910>;
241 power-domains = <&sysc 256 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
242 resets = <&cpg 910>; 257 resets = <&cpg 910>;
243 }; 258 };
244 259
245 gpio3: gpio@e6053000 { 260 gpio3: gpio@e6053000 {
246 compatible = "renesas, 261 compatible = "renesas,gpio-r8a77965",
247 "renesas, 262 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6053000 0 263 reg = <0 0xe6053000 0 0x50>;
249 interrupts = <GIC_SPI 264 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>; 265 #gpio-cells = <2>;
251 gpio-controller; 266 gpio-controller;
252 gpio-ranges = <&pfc 0 267 gpio-ranges = <&pfc 0 96 16>;
253 #interrupt-cells = <2> 268 #interrupt-cells = <2>;
254 interrupt-controller; 269 interrupt-controller;
255 clocks = <&cpg CPG_MOD 270 clocks = <&cpg CPG_MOD 909>;
256 power-domains = <&sysc 271 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
257 resets = <&cpg 909>; 272 resets = <&cpg 909>;
258 }; 273 };
259 274
260 gpio4: gpio@e6054000 { 275 gpio4: gpio@e6054000 {
261 compatible = "renesas, 276 compatible = "renesas,gpio-r8a77965",
262 "renesas, 277 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6054000 0 278 reg = <0 0xe6054000 0 0x50>;
264 interrupts = <GIC_SPI 279 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>; 280 #gpio-cells = <2>;
266 gpio-controller; 281 gpio-controller;
267 gpio-ranges = <&pfc 0 282 gpio-ranges = <&pfc 0 128 18>;
268 #interrupt-cells = <2> 283 #interrupt-cells = <2>;
269 interrupt-controller; 284 interrupt-controller;
270 clocks = <&cpg CPG_MOD 285 clocks = <&cpg CPG_MOD 908>;
271 power-domains = <&sysc 286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
272 resets = <&cpg 908>; 287 resets = <&cpg 908>;
273 }; 288 };
274 289
275 gpio5: gpio@e6055000 { 290 gpio5: gpio@e6055000 {
276 compatible = "renesas, 291 compatible = "renesas,gpio-r8a77965",
277 "renesas, 292 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6055000 0 293 reg = <0 0xe6055000 0 0x50>;
279 interrupts = <GIC_SPI 294 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>; 295 #gpio-cells = <2>;
281 gpio-controller; 296 gpio-controller;
282 gpio-ranges = <&pfc 0 297 gpio-ranges = <&pfc 0 160 26>;
283 #interrupt-cells = <2> 298 #interrupt-cells = <2>;
284 interrupt-controller; 299 interrupt-controller;
285 clocks = <&cpg CPG_MOD 300 clocks = <&cpg CPG_MOD 907>;
286 power-domains = <&sysc 301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
287 resets = <&cpg 907>; 302 resets = <&cpg 907>;
288 }; 303 };
289 304
290 gpio6: gpio@e6055400 { 305 gpio6: gpio@e6055400 {
291 compatible = "renesas, 306 compatible = "renesas,gpio-r8a77965",
292 "renesas, 307 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055400 0 308 reg = <0 0xe6055400 0 0x50>;
294 interrupts = <GIC_SPI 309 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>; 310 #gpio-cells = <2>;
296 gpio-controller; 311 gpio-controller;
297 gpio-ranges = <&pfc 0 312 gpio-ranges = <&pfc 0 192 32>;
298 #interrupt-cells = <2> 313 #interrupt-cells = <2>;
299 interrupt-controller; 314 interrupt-controller;
300 clocks = <&cpg CPG_MOD 315 clocks = <&cpg CPG_MOD 906>;
301 power-domains = <&sysc 316 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
302 resets = <&cpg 906>; 317 resets = <&cpg 906>;
303 }; 318 };
304 319
305 gpio7: gpio@e6055800 { 320 gpio7: gpio@e6055800 {
306 compatible = "renesas, 321 compatible = "renesas,gpio-r8a77965",
307 "renesas, 322 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055800 0 323 reg = <0 0xe6055800 0 0x50>;
309 interrupts = <GIC_SPI 324 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>; 325 #gpio-cells = <2>;
311 gpio-controller; 326 gpio-controller;
312 gpio-ranges = <&pfc 0 327 gpio-ranges = <&pfc 0 224 4>;
313 #interrupt-cells = <2> 328 #interrupt-cells = <2>;
314 interrupt-controller; 329 interrupt-controller;
315 clocks = <&cpg CPG_MOD 330 clocks = <&cpg CPG_MOD 905>;
316 power-domains = <&sysc 331 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
317 resets = <&cpg 905>; 332 resets = <&cpg 905>;
318 }; 333 };
319 334
320 pfc: pinctrl@e6060000 { 335 pfc: pinctrl@e6060000 {
321 compatible = "renesas, 336 compatible = "renesas,pfc-r8a77965";
322 reg = <0 0xe6060000 0 337 reg = <0 0xe6060000 0 0x50c>;
323 }; 338 };
324 339
325 cmt0: timer@e60f0000 { 340 cmt0: timer@e60f0000 {
326 compatible = "renesas, 341 compatible = "renesas,r8a77965-cmt0",
327 "renesas, 342 "renesas,rcar-gen3-cmt0";
328 reg = <0 0xe60f0000 0 343 reg = <0 0xe60f0000 0 0x1004>;
329 interrupts = <GIC_SPI 344 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 345 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&cpg CPG_MOD 346 clocks = <&cpg CPG_MOD 303>;
332 clock-names = "fck"; 347 clock-names = "fck";
333 power-domains = <&sysc 348 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
334 resets = <&cpg 303>; 349 resets = <&cpg 303>;
335 status = "disabled"; 350 status = "disabled";
336 }; 351 };
337 352
338 cmt1: timer@e6130000 { 353 cmt1: timer@e6130000 {
339 compatible = "renesas, 354 compatible = "renesas,r8a77965-cmt1",
340 "renesas, 355 "renesas,rcar-gen3-cmt1";
341 reg = <0 0xe6130000 0 356 reg = <0 0xe6130000 0 0x1004>;
342 interrupts = <GIC_SPI 357 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 358 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 359 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 360 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 361 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 362 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 363 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 364 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&cpg CPG_MOD 365 clocks = <&cpg CPG_MOD 302>;
351 clock-names = "fck"; 366 clock-names = "fck";
352 power-domains = <&sysc 367 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
353 resets = <&cpg 302>; 368 resets = <&cpg 302>;
354 status = "disabled"; 369 status = "disabled";
355 }; 370 };
356 371
357 cmt2: timer@e6140000 { 372 cmt2: timer@e6140000 {
358 compatible = "renesas, 373 compatible = "renesas,r8a77965-cmt1",
359 "renesas, 374 "renesas,rcar-gen3-cmt1";
360 reg = <0 0xe6140000 0 375 reg = <0 0xe6140000 0 0x1004>;
361 interrupts = <GIC_SPI 376 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 377 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 378 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 379 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 380 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 381 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 382 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 383 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 384 clocks = <&cpg CPG_MOD 301>;
370 clock-names = "fck"; 385 clock-names = "fck";
371 power-domains = <&sysc 386 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
372 resets = <&cpg 301>; 387 resets = <&cpg 301>;
373 status = "disabled"; 388 status = "disabled";
374 }; 389 };
375 390
376 cmt3: timer@e6148000 { 391 cmt3: timer@e6148000 {
377 compatible = "renesas, 392 compatible = "renesas,r8a77965-cmt1",
378 "renesas, 393 "renesas,rcar-gen3-cmt1";
379 reg = <0 0xe6148000 0 394 reg = <0 0xe6148000 0 0x1004>;
380 interrupts = <GIC_SPI 395 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 396 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 397 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 398 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 399 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 400 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 401 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 402 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 403 clocks = <&cpg CPG_MOD 300>;
389 clock-names = "fck"; 404 clock-names = "fck";
390 power-domains = <&sysc 405 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
391 resets = <&cpg 300>; 406 resets = <&cpg 300>;
392 status = "disabled"; 407 status = "disabled";
393 }; 408 };
394 409
395 cpg: clock-controller@e6150000 410 cpg: clock-controller@e6150000 {
396 compatible = "renesas, 411 compatible = "renesas,r8a77965-cpg-mssr";
397 reg = <0 0xe6150000 0 412 reg = <0 0xe6150000 0 0x1000>;
398 clocks = <&extal_clk>, 413 clocks = <&extal_clk>, <&extalr_clk>;
399 clock-names = "extal", 414 clock-names = "extal", "extalr";
400 #clock-cells = <2>; 415 #clock-cells = <2>;
401 #power-domain-cells = 416 #power-domain-cells = <0>;
402 #reset-cells = <1>; 417 #reset-cells = <1>;
403 }; 418 };
404 419
405 rst: reset-controller@e6160000 420 rst: reset-controller@e6160000 {
406 compatible = "renesas, 421 compatible = "renesas,r8a77965-rst";
407 reg = <0 0xe6160000 0 422 reg = <0 0xe6160000 0 0x0200>;
408 }; 423 };
409 424
410 sysc: system-controller@e61800 425 sysc: system-controller@e6180000 {
411 compatible = "renesas, 426 compatible = "renesas,r8a77965-sysc";
412 reg = <0 0xe6180000 0 427 reg = <0 0xe6180000 0 0x0400>;
413 #power-domain-cells = 428 #power-domain-cells = <1>;
414 }; 429 };
415 430
416 tsc: thermal@e6198000 { 431 tsc: thermal@e6198000 {
417 compatible = "renesas, 432 compatible = "renesas,r8a77965-thermal";
418 reg = <0 0xe6198000 0 433 reg = <0 0xe6198000 0 0x100>,
419 <0 0xe61a0000 0 434 <0 0xe61a0000 0 0x100>,
420 <0 0xe61a8000 0 435 <0 0xe61a8000 0 0x100>;
421 interrupts = <GIC_SPI 436 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 437 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 438 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 439 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc 440 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
426 resets = <&cpg 522>; 441 resets = <&cpg 522>;
427 #thermal-sensor-cells 442 #thermal-sensor-cells = <1>;
428 }; 443 };
429 444
430 intc_ex: interrupt-controller@ 445 intc_ex: interrupt-controller@e61c0000 {
431 compatible = "renesas, 446 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
432 #interrupt-cells = <2> 447 #interrupt-cells = <2>;
433 interrupt-controller; 448 interrupt-controller;
434 reg = <0 0xe61c0000 0 449 reg = <0 0xe61c0000 0 0x200>;
435 interrupts = <GIC_SPI 450 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
436 <GIC_SPI 451 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
437 <GIC_SPI 452 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
438 <GIC_SPI 453 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
439 <GIC_SPI 454 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 455 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 456 clocks = <&cpg CPG_MOD 407>;
442 power-domains = <&sysc 457 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
443 resets = <&cpg 407>; 458 resets = <&cpg 407>;
444 }; 459 };
445 460
446 tmu0: timer@e61e0000 { 461 tmu0: timer@e61e0000 {
447 compatible = "renesas, 462 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
448 reg = <0 0xe61e0000 0 463 reg = <0 0xe61e0000 0 0x30>;
449 interrupts = <GIC_SPI 464 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
450 <GIC_SPI 465 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 466 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
452 interrupt-names = "tun <<
453 clocks = <&cpg CPG_MOD 467 clocks = <&cpg CPG_MOD 125>;
454 clock-names = "fck"; 468 clock-names = "fck";
455 power-domains = <&sysc 469 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
456 resets = <&cpg 125>; 470 resets = <&cpg 125>;
457 status = "disabled"; 471 status = "disabled";
458 }; 472 };
459 473
460 tmu1: timer@e6fc0000 { 474 tmu1: timer@e6fc0000 {
461 compatible = "renesas, 475 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
462 reg = <0 0xe6fc0000 0 476 reg = <0 0xe6fc0000 0 0x30>;
463 interrupts = <GIC_SPI 477 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
464 <GIC_SPI 478 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
465 <GIC_SPI !! 479 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
466 <GIC_SPI <<
467 interrupt-names = "tun <<
468 clocks = <&cpg CPG_MOD 480 clocks = <&cpg CPG_MOD 124>;
469 clock-names = "fck"; 481 clock-names = "fck";
470 power-domains = <&sysc 482 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
471 resets = <&cpg 124>; 483 resets = <&cpg 124>;
472 status = "disabled"; 484 status = "disabled";
473 }; 485 };
474 486
475 tmu2: timer@e6fd0000 { 487 tmu2: timer@e6fd0000 {
476 compatible = "renesas, 488 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
477 reg = <0 0xe6fd0000 0 489 reg = <0 0xe6fd0000 0 0x30>;
478 interrupts = <GIC_SPI 490 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 491 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI !! 492 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
481 <GIC_SPI <<
482 interrupt-names = "tun <<
483 clocks = <&cpg CPG_MOD 493 clocks = <&cpg CPG_MOD 123>;
484 clock-names = "fck"; 494 clock-names = "fck";
485 power-domains = <&sysc 495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
486 resets = <&cpg 123>; 496 resets = <&cpg 123>;
487 status = "disabled"; 497 status = "disabled";
488 }; 498 };
489 499
490 tmu3: timer@e6fe0000 { 500 tmu3: timer@e6fe0000 {
491 compatible = "renesas, 501 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
492 reg = <0 0xe6fe0000 0 502 reg = <0 0xe6fe0000 0 0x30>;
493 interrupts = <GIC_SPI 503 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
494 <GIC_SPI 504 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
495 <GIC_SPI 505 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
496 interrupt-names = "tun <<
497 clocks = <&cpg CPG_MOD 506 clocks = <&cpg CPG_MOD 122>;
498 clock-names = "fck"; 507 clock-names = "fck";
499 power-domains = <&sysc 508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
500 resets = <&cpg 122>; 509 resets = <&cpg 122>;
501 status = "disabled"; 510 status = "disabled";
502 }; 511 };
503 512
504 tmu4: timer@ffc00000 { 513 tmu4: timer@ffc00000 {
505 compatible = "renesas, 514 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
506 reg = <0 0xffc00000 0 515 reg = <0 0xffc00000 0 0x30>;
507 interrupts = <GIC_SPI 516 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 517 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 518 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
510 interrupt-names = "tun <<
511 clocks = <&cpg CPG_MOD 519 clocks = <&cpg CPG_MOD 121>;
512 clock-names = "fck"; 520 clock-names = "fck";
513 power-domains = <&sysc 521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
514 resets = <&cpg 121>; 522 resets = <&cpg 121>;
515 status = "disabled"; 523 status = "disabled";
516 }; 524 };
517 525
518 i2c0: i2c@e6500000 { 526 i2c0: i2c@e6500000 {
519 #address-cells = <1>; 527 #address-cells = <1>;
520 #size-cells = <0>; 528 #size-cells = <0>;
521 compatible = "renesas, 529 compatible = "renesas,i2c-r8a77965",
522 "renesas, 530 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6500000 0 531 reg = <0 0xe6500000 0 0x40>;
524 interrupts = <GIC_SPI 532 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 533 clocks = <&cpg CPG_MOD 931>;
526 power-domains = <&sysc 534 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
527 resets = <&cpg 931>; 535 resets = <&cpg 931>;
528 dmas = <&dmac1 0x91>, 536 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
529 <&dmac2 0x91>, 537 <&dmac2 0x91>, <&dmac2 0x90>;
530 dma-names = "tx", "rx" 538 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 539 i2c-scl-internal-delay-ns = <110>;
532 status = "disabled"; 540 status = "disabled";
533 }; 541 };
534 542
535 i2c1: i2c@e6508000 { 543 i2c1: i2c@e6508000 {
536 #address-cells = <1>; 544 #address-cells = <1>;
537 #size-cells = <0>; 545 #size-cells = <0>;
538 compatible = "renesas, 546 compatible = "renesas,i2c-r8a77965",
539 "renesas, 547 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe6508000 0 548 reg = <0 0xe6508000 0 0x40>;
541 interrupts = <GIC_SPI 549 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 550 clocks = <&cpg CPG_MOD 930>;
543 power-domains = <&sysc 551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
544 resets = <&cpg 930>; 552 resets = <&cpg 930>;
545 dmas = <&dmac1 0x93>, 553 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
546 <&dmac2 0x93>, 554 <&dmac2 0x93>, <&dmac2 0x92>;
547 dma-names = "tx", "rx" 555 dma-names = "tx", "rx", "tx", "rx";
548 i2c-scl-internal-delay 556 i2c-scl-internal-delay-ns = <6>;
549 status = "disabled"; 557 status = "disabled";
550 }; 558 };
551 559
552 i2c2: i2c@e6510000 { 560 i2c2: i2c@e6510000 {
553 #address-cells = <1>; 561 #address-cells = <1>;
554 #size-cells = <0>; 562 #size-cells = <0>;
555 compatible = "renesas, 563 compatible = "renesas,i2c-r8a77965",
556 "renesas, 564 "renesas,rcar-gen3-i2c";
557 reg = <0 0xe6510000 0 565 reg = <0 0xe6510000 0 0x40>;
558 interrupts = <GIC_SPI 566 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 567 clocks = <&cpg CPG_MOD 929>;
560 power-domains = <&sysc 568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
561 resets = <&cpg 929>; 569 resets = <&cpg 929>;
562 dmas = <&dmac1 0x95>, 570 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
563 <&dmac2 0x95>, 571 <&dmac2 0x95>, <&dmac2 0x94>;
564 dma-names = "tx", "rx" 572 dma-names = "tx", "rx", "tx", "rx";
565 i2c-scl-internal-delay 573 i2c-scl-internal-delay-ns = <6>;
566 status = "disabled"; 574 status = "disabled";
567 }; 575 };
568 576
569 i2c3: i2c@e66d0000 { 577 i2c3: i2c@e66d0000 {
570 #address-cells = <1>; 578 #address-cells = <1>;
571 #size-cells = <0>; 579 #size-cells = <0>;
572 compatible = "renesas, 580 compatible = "renesas,i2c-r8a77965",
573 "renesas, 581 "renesas,rcar-gen3-i2c";
574 reg = <0 0xe66d0000 0 582 reg = <0 0xe66d0000 0 0x40>;
575 interrupts = <GIC_SPI 583 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 584 clocks = <&cpg CPG_MOD 928>;
577 power-domains = <&sysc 585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
578 resets = <&cpg 928>; 586 resets = <&cpg 928>;
579 dmas = <&dmac0 0x97>, 587 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
580 dma-names = "tx", "rx" 588 dma-names = "tx", "rx";
581 i2c-scl-internal-delay 589 i2c-scl-internal-delay-ns = <110>;
582 status = "disabled"; 590 status = "disabled";
583 }; 591 };
584 592
585 i2c4: i2c@e66d8000 { 593 i2c4: i2c@e66d8000 {
586 #address-cells = <1>; 594 #address-cells = <1>;
587 #size-cells = <0>; 595 #size-cells = <0>;
588 compatible = "renesas, 596 compatible = "renesas,i2c-r8a77965",
589 "renesas, 597 "renesas,rcar-gen3-i2c";
590 reg = <0 0xe66d8000 0 598 reg = <0 0xe66d8000 0 0x40>;
591 interrupts = <GIC_SPI 599 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&cpg CPG_MOD 600 clocks = <&cpg CPG_MOD 927>;
593 power-domains = <&sysc 601 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
594 resets = <&cpg 927>; 602 resets = <&cpg 927>;
595 dmas = <&dmac0 0x99>, 603 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
596 dma-names = "tx", "rx" 604 dma-names = "tx", "rx";
597 i2c-scl-internal-delay 605 i2c-scl-internal-delay-ns = <110>;
598 status = "disabled"; 606 status = "disabled";
599 }; 607 };
600 608
601 i2c5: i2c@e66e0000 { 609 i2c5: i2c@e66e0000 {
602 #address-cells = <1>; 610 #address-cells = <1>;
603 #size-cells = <0>; 611 #size-cells = <0>;
604 compatible = "renesas, 612 compatible = "renesas,i2c-r8a77965",
605 "renesas, 613 "renesas,rcar-gen3-i2c";
606 reg = <0 0xe66e0000 0 614 reg = <0 0xe66e0000 0 0x40>;
607 interrupts = <GIC_SPI 615 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&cpg CPG_MOD 616 clocks = <&cpg CPG_MOD 919>;
609 power-domains = <&sysc 617 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
610 resets = <&cpg 919>; 618 resets = <&cpg 919>;
611 dmas = <&dmac0 0x9b>, 619 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
612 dma-names = "tx", "rx" 620 dma-names = "tx", "rx";
613 i2c-scl-internal-delay 621 i2c-scl-internal-delay-ns = <110>;
614 status = "disabled"; 622 status = "disabled";
615 }; 623 };
616 624
617 i2c6: i2c@e66e8000 { 625 i2c6: i2c@e66e8000 {
618 #address-cells = <1>; 626 #address-cells = <1>;
619 #size-cells = <0>; 627 #size-cells = <0>;
620 compatible = "renesas, 628 compatible = "renesas,i2c-r8a77965",
621 "renesas, 629 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66e8000 0 630 reg = <0 0xe66e8000 0 0x40>;
623 interrupts = <GIC_SPI 631 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&cpg CPG_MOD 632 clocks = <&cpg CPG_MOD 918>;
625 power-domains = <&sysc 633 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
626 resets = <&cpg 918>; 634 resets = <&cpg 918>;
627 dmas = <&dmac0 0x9d>, 635 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
628 dma-names = "tx", "rx" 636 dma-names = "tx", "rx";
629 i2c-scl-internal-delay 637 i2c-scl-internal-delay-ns = <6>;
630 status = "disabled"; 638 status = "disabled";
631 }; 639 };
632 640
633 i2c_dvfs: i2c@e60b0000 { 641 i2c_dvfs: i2c@e60b0000 {
634 #address-cells = <1>; 642 #address-cells = <1>;
635 #size-cells = <0>; 643 #size-cells = <0>;
636 compatible = "renesas, 644 compatible = "renesas,iic-r8a77965",
637 "renesas, 645 "renesas,rcar-gen3-iic",
638 "renesas, 646 "renesas,rmobile-iic";
639 reg = <0 0xe60b0000 0 647 reg = <0 0xe60b0000 0 0x425>;
640 interrupts = <GIC_SPI 648 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&cpg CPG_MOD 649 clocks = <&cpg CPG_MOD 926>;
642 power-domains = <&sysc 650 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
643 resets = <&cpg 926>; 651 resets = <&cpg 926>;
644 dmas = <&dmac0 0x11>, 652 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
645 dma-names = "tx", "rx" 653 dma-names = "tx", "rx";
646 status = "disabled"; 654 status = "disabled";
647 }; 655 };
648 656
649 hscif0: serial@e6540000 { 657 hscif0: serial@e6540000 {
650 compatible = "renesas, 658 compatible = "renesas,hscif-r8a77965",
651 "renesas, 659 "renesas,rcar-gen3-hscif",
652 "renesas, 660 "renesas,hscif";
653 reg = <0 0xe6540000 0 661 reg = <0 0xe6540000 0 0x60>;
654 interrupts = <GIC_SPI 662 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 663 clocks = <&cpg CPG_MOD 520>,
656 <&cpg CPG_COR 664 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
657 <&scif_clk>; 665 <&scif_clk>;
658 clock-names = "fck", " 666 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x31>, 667 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
660 <&dmac2 0x31>, 668 <&dmac2 0x31>, <&dmac2 0x30>;
661 dma-names = "tx", "rx" 669 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 670 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
663 resets = <&cpg 520>; 671 resets = <&cpg 520>;
664 status = "disabled"; 672 status = "disabled";
665 }; 673 };
666 674
667 hscif1: serial@e6550000 { 675 hscif1: serial@e6550000 {
668 compatible = "renesas, 676 compatible = "renesas,hscif-r8a77965",
669 "renesas, 677 "renesas,rcar-gen3-hscif",
670 "renesas, 678 "renesas,hscif";
671 reg = <0 0xe6550000 0 679 reg = <0 0xe6550000 0 0x60>;
672 interrupts = <GIC_SPI 680 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 681 clocks = <&cpg CPG_MOD 519>,
674 <&cpg CPG_COR 682 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
675 <&scif_clk>; 683 <&scif_clk>;
676 clock-names = "fck", " 684 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac1 0x33>, 685 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
678 <&dmac2 0x33>, 686 <&dmac2 0x33>, <&dmac2 0x32>;
679 dma-names = "tx", "rx" 687 dma-names = "tx", "rx", "tx", "rx";
680 power-domains = <&sysc 688 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
681 resets = <&cpg 519>; 689 resets = <&cpg 519>;
682 status = "disabled"; 690 status = "disabled";
683 }; 691 };
684 692
685 hscif2: serial@e6560000 { 693 hscif2: serial@e6560000 {
686 compatible = "renesas, 694 compatible = "renesas,hscif-r8a77965",
687 "renesas, 695 "renesas,rcar-gen3-hscif",
688 "renesas, 696 "renesas,hscif";
689 reg = <0 0xe6560000 0 697 reg = <0 0xe6560000 0 0x60>;
690 interrupts = <GIC_SPI 698 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&cpg CPG_MOD 699 clocks = <&cpg CPG_MOD 518>,
692 <&cpg CPG_COR 700 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
693 <&scif_clk>; 701 <&scif_clk>;
694 clock-names = "fck", " 702 clock-names = "fck", "brg_int", "scif_clk";
695 dmas = <&dmac1 0x35>, 703 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
696 <&dmac2 0x35>, 704 <&dmac2 0x35>, <&dmac2 0x34>;
697 dma-names = "tx", "rx" 705 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc 706 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
699 resets = <&cpg 518>; 707 resets = <&cpg 518>;
700 status = "disabled"; 708 status = "disabled";
701 }; 709 };
702 710
703 hscif3: serial@e66a0000 { 711 hscif3: serial@e66a0000 {
704 compatible = "renesas, 712 compatible = "renesas,hscif-r8a77965",
705 "renesas, 713 "renesas,rcar-gen3-hscif",
706 "renesas, 714 "renesas,hscif";
707 reg = <0 0xe66a0000 0 715 reg = <0 0xe66a0000 0 0x60>;
708 interrupts = <GIC_SPI 716 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 717 clocks = <&cpg CPG_MOD 517>,
710 <&cpg CPG_COR 718 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
711 <&scif_clk>; 719 <&scif_clk>;
712 clock-names = "fck", " 720 clock-names = "fck", "brg_int", "scif_clk";
713 dmas = <&dmac0 0x37>, 721 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
714 dma-names = "tx", "rx" 722 dma-names = "tx", "rx";
715 power-domains = <&sysc 723 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
716 resets = <&cpg 517>; 724 resets = <&cpg 517>;
717 status = "disabled"; 725 status = "disabled";
718 }; 726 };
719 727
720 hscif4: serial@e66b0000 { 728 hscif4: serial@e66b0000 {
721 compatible = "renesas, 729 compatible = "renesas,hscif-r8a77965",
722 "renesas, 730 "renesas,rcar-gen3-hscif",
723 "renesas, 731 "renesas,hscif";
724 reg = <0 0xe66b0000 0 732 reg = <0 0xe66b0000 0 0x60>;
725 interrupts = <GIC_SPI 733 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 734 clocks = <&cpg CPG_MOD 516>,
727 <&cpg CPG_COR 735 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
728 <&scif_clk>; 736 <&scif_clk>;
729 clock-names = "fck", " 737 clock-names = "fck", "brg_int", "scif_clk";
730 dmas = <&dmac0 0x39>, 738 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
731 dma-names = "tx", "rx" 739 dma-names = "tx", "rx";
732 power-domains = <&sysc 740 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
733 resets = <&cpg 516>; 741 resets = <&cpg 516>;
734 status = "disabled"; 742 status = "disabled";
735 }; 743 };
736 744
737 hsusb: usb@e6590000 { 745 hsusb: usb@e6590000 {
738 compatible = "renesas, 746 compatible = "renesas,usbhs-r8a77965",
739 "renesas, 747 "renesas,rcar-gen3-usbhs";
740 reg = <0 0xe6590000 0 748 reg = <0 0xe6590000 0 0x200>;
741 interrupts = <GIC_SPI 749 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 750 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
743 dmas = <&usb_dmac0 0>, 751 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
744 <&usb_dmac1 0>, 752 <&usb_dmac1 0>, <&usb_dmac1 1>;
745 dma-names = "ch0", "ch 753 dma-names = "ch0", "ch1", "ch2", "ch3";
746 renesas,buswait = <11> 754 renesas,buswait = <11>;
747 phys = <&usb2_phy0 3>; 755 phys = <&usb2_phy0 3>;
748 phy-names = "usb"; 756 phy-names = "usb";
749 power-domains = <&sysc 757 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
750 resets = <&cpg 704>, < 758 resets = <&cpg 704>, <&cpg 703>;
751 status = "disabled"; 759 status = "disabled";
752 }; 760 };
753 761
754 usb_dmac0: dma-controller@e65a 762 usb_dmac0: dma-controller@e65a0000 {
755 compatible = "renesas, 763 compatible = "renesas,r8a77965-usb-dmac",
756 "renesas, 764 "renesas,usb-dmac";
757 reg = <0 0xe65a0000 0 765 reg = <0 0xe65a0000 0 0x100>;
758 interrupts = <GIC_SPI 766 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 767 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
760 interrupt-names = "ch0 768 interrupt-names = "ch0", "ch1";
761 clocks = <&cpg CPG_MOD 769 clocks = <&cpg CPG_MOD 330>;
762 power-domains = <&sysc 770 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
763 resets = <&cpg 330>; 771 resets = <&cpg 330>;
764 #dma-cells = <1>; 772 #dma-cells = <1>;
765 dma-channels = <2>; 773 dma-channels = <2>;
766 }; 774 };
767 775
768 usb_dmac1: dma-controller@e65b 776 usb_dmac1: dma-controller@e65b0000 {
769 compatible = "renesas, 777 compatible = "renesas,r8a77965-usb-dmac",
770 "renesas, 778 "renesas,usb-dmac";
771 reg = <0 0xe65b0000 0 779 reg = <0 0xe65b0000 0 0x100>;
772 interrupts = <GIC_SPI 780 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 781 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
774 interrupt-names = "ch0 782 interrupt-names = "ch0", "ch1";
775 clocks = <&cpg CPG_MOD 783 clocks = <&cpg CPG_MOD 331>;
776 power-domains = <&sysc 784 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
777 resets = <&cpg 331>; 785 resets = <&cpg 331>;
778 #dma-cells = <1>; 786 #dma-cells = <1>;
779 dma-channels = <2>; 787 dma-channels = <2>;
780 }; 788 };
781 789
782 usb3_phy0: usb-phy@e65ee000 { 790 usb3_phy0: usb-phy@e65ee000 {
783 compatible = "renesas, 791 compatible = "renesas,r8a77965-usb3-phy",
784 "renesas, 792 "renesas,rcar-gen3-usb3-phy";
785 reg = <0 0xe65ee000 0 793 reg = <0 0xe65ee000 0 0x90>;
786 clocks = <&cpg CPG_MOD 794 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
787 <&usb_extal_c 795 <&usb_extal_clk>;
788 clock-names = "usb3-if 796 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
789 power-domains = <&sysc 797 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
790 resets = <&cpg 328>; 798 resets = <&cpg 328>;
791 #phy-cells = <0>; 799 #phy-cells = <0>;
792 status = "disabled"; 800 status = "disabled";
793 }; 801 };
794 802
795 arm_cc630p: crypto@e6601000 { 803 arm_cc630p: crypto@e6601000 {
796 compatible = "arm,cryp 804 compatible = "arm,cryptocell-630p-ree";
797 interrupts = <GIC_SPI 805 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
798 reg = <0x0 0xe6601000 806 reg = <0x0 0xe6601000 0 0x1000>;
799 clocks = <&cpg CPG_MOD 807 clocks = <&cpg CPG_MOD 229>;
800 resets = <&cpg 229>; 808 resets = <&cpg 229>;
801 power-domains = <&sysc 809 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
802 }; 810 };
803 811
804 dmac0: dma-controller@e6700000 812 dmac0: dma-controller@e6700000 {
805 compatible = "renesas, 813 compatible = "renesas,dmac-r8a77965",
806 "renesas, 814 "renesas,rcar-dmac";
807 reg = <0 0xe6700000 0 815 reg = <0 0xe6700000 0 0x10000>;
808 interrupts = <GIC_SPI 816 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 817 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 818 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 819 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 820 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 821 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 822 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 823 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 824 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 825 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
818 <GIC_SPI 826 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_SPI 827 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_SPI 828 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_SPI 829 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 830 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 831 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 832 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "err 833 interrupt-names = "error",
826 "ch0", 834 "ch0", "ch1", "ch2", "ch3",
827 "ch4", 835 "ch4", "ch5", "ch6", "ch7",
828 "ch8", 836 "ch8", "ch9", "ch10", "ch11",
829 "ch12" 837 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 838 clocks = <&cpg CPG_MOD 219>;
831 clock-names = "fck"; 839 clock-names = "fck";
832 power-domains = <&sysc 840 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
833 resets = <&cpg 219>; 841 resets = <&cpg 219>;
834 #dma-cells = <1>; 842 #dma-cells = <1>;
835 dma-channels = <16>; 843 dma-channels = <16>;
836 iommus = <&ipmmu_ds0 0 844 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
837 <&ipmmu_ds0 2>, 845 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
838 <&ipmmu_ds0 4>, 846 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
839 <&ipmmu_ds0 6>, 847 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
840 <&ipmmu_ds0 8>, 848 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
841 <&ipmmu_ds0 10> 849 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
842 <&ipmmu_ds0 12> 850 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
843 <&ipmmu_ds0 14> 851 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
844 }; 852 };
845 853
846 dmac1: dma-controller@e7300000 854 dmac1: dma-controller@e7300000 {
847 compatible = "renesas, 855 compatible = "renesas,dmac-r8a77965",
848 "renesas, 856 "renesas,rcar-dmac";
849 reg = <0 0xe7300000 0 857 reg = <0 0xe7300000 0 0x10000>;
850 interrupts = <GIC_SPI 858 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 859 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 860 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 861 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 862 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 863 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 864 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 865 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 866 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 867 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 868 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 869 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
862 <GIC_SPI 870 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 871 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 872 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 873 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 874 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
867 interrupt-names = "err 875 interrupt-names = "error",
868 "ch0", 876 "ch0", "ch1", "ch2", "ch3",
869 "ch4", 877 "ch4", "ch5", "ch6", "ch7",
870 "ch8", 878 "ch8", "ch9", "ch10", "ch11",
871 "ch12" 879 "ch12", "ch13", "ch14", "ch15";
872 clocks = <&cpg CPG_MOD 880 clocks = <&cpg CPG_MOD 218>;
873 clock-names = "fck"; 881 clock-names = "fck";
874 power-domains = <&sysc 882 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 resets = <&cpg 218>; 883 resets = <&cpg 218>;
876 #dma-cells = <1>; 884 #dma-cells = <1>;
877 dma-channels = <16>; 885 dma-channels = <16>;
878 iommus = <&ipmmu_ds1 0 886 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
879 <&ipmmu_ds1 2>, 887 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
880 <&ipmmu_ds1 4>, 888 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
881 <&ipmmu_ds1 6>, 889 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
882 <&ipmmu_ds1 8>, 890 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
883 <&ipmmu_ds1 10> 891 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
884 <&ipmmu_ds1 12> 892 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
885 <&ipmmu_ds1 14> 893 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
886 }; 894 };
887 895
888 dmac2: dma-controller@e7310000 896 dmac2: dma-controller@e7310000 {
889 compatible = "renesas, 897 compatible = "renesas,dmac-r8a77965",
890 "renesas, 898 "renesas,rcar-dmac";
891 reg = <0 0xe7310000 0 899 reg = <0 0xe7310000 0 0x10000>;
892 interrupts = <GIC_SPI 900 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
893 <GIC_SPI 901 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
894 <GIC_SPI 902 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
895 <GIC_SPI 903 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
896 <GIC_SPI 904 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
897 <GIC_SPI 905 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
898 <GIC_SPI 906 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
899 <GIC_SPI 907 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
900 <GIC_SPI 908 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
901 <GIC_SPI 909 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
902 <GIC_SPI 910 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
903 <GIC_SPI 911 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
904 <GIC_SPI 912 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
905 <GIC_SPI 913 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
906 <GIC_SPI 914 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
907 <GIC_SPI 915 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
908 <GIC_SPI 916 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
909 interrupt-names = "err 917 interrupt-names = "error",
910 "ch0", 918 "ch0", "ch1", "ch2", "ch3",
911 "ch4", 919 "ch4", "ch5", "ch6", "ch7",
912 "ch8", 920 "ch8", "ch9", "ch10", "ch11",
913 "ch12" 921 "ch12", "ch13", "ch14", "ch15";
914 clocks = <&cpg CPG_MOD 922 clocks = <&cpg CPG_MOD 217>;
915 clock-names = "fck"; 923 clock-names = "fck";
916 power-domains = <&sysc 924 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
917 resets = <&cpg 217>; 925 resets = <&cpg 217>;
918 #dma-cells = <1>; 926 #dma-cells = <1>;
919 dma-channels = <16>; 927 dma-channels = <16>;
920 iommus = <&ipmmu_ds1 1 928 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
921 <&ipmmu_ds1 18> 929 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
922 <&ipmmu_ds1 20> 930 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
923 <&ipmmu_ds1 22> 931 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
924 <&ipmmu_ds1 24> 932 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
925 <&ipmmu_ds1 26> 933 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
926 <&ipmmu_ds1 28> 934 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
927 <&ipmmu_ds1 30> 935 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
928 }; 936 };
929 937
930 ipmmu_ds0: iommu@e6740000 { 938 ipmmu_ds0: iommu@e6740000 {
931 compatible = "renesas, 939 compatible = "renesas,ipmmu-r8a77965";
932 reg = <0 0xe6740000 0 940 reg = <0 0xe6740000 0 0x1000>;
933 renesas,ipmmu-main = < 941 renesas,ipmmu-main = <&ipmmu_mm 0>;
934 power-domains = <&sysc 942 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 943 #iommu-cells = <1>;
936 }; 944 };
937 945
938 ipmmu_ds1: iommu@e7740000 { 946 ipmmu_ds1: iommu@e7740000 {
939 compatible = "renesas, 947 compatible = "renesas,ipmmu-r8a77965";
940 reg = <0 0xe7740000 0 948 reg = <0 0xe7740000 0 0x1000>;
941 renesas,ipmmu-main = < 949 renesas,ipmmu-main = <&ipmmu_mm 1>;
942 power-domains = <&sysc 950 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
943 #iommu-cells = <1>; 951 #iommu-cells = <1>;
944 }; 952 };
945 953
946 ipmmu_hc: iommu@e6570000 { 954 ipmmu_hc: iommu@e6570000 {
947 compatible = "renesas, 955 compatible = "renesas,ipmmu-r8a77965";
948 reg = <0 0xe6570000 0 956 reg = <0 0xe6570000 0 0x1000>;
949 renesas,ipmmu-main = < 957 renesas,ipmmu-main = <&ipmmu_mm 2>;
950 power-domains = <&sysc 958 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 959 #iommu-cells = <1>;
952 }; 960 };
953 961
954 ipmmu_mm: iommu@e67b0000 { 962 ipmmu_mm: iommu@e67b0000 {
955 compatible = "renesas, 963 compatible = "renesas,ipmmu-r8a77965";
956 reg = <0 0xe67b0000 0 964 reg = <0 0xe67b0000 0 0x1000>;
957 interrupts = <GIC_SPI 965 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 966 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
959 power-domains = <&sysc 967 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
960 #iommu-cells = <1>; 968 #iommu-cells = <1>;
961 }; 969 };
962 970
963 ipmmu_mp: iommu@ec670000 { 971 ipmmu_mp: iommu@ec670000 {
964 compatible = "renesas, 972 compatible = "renesas,ipmmu-r8a77965";
965 reg = <0 0xec670000 0 973 reg = <0 0xec670000 0 0x1000>;
966 renesas,ipmmu-main = < 974 renesas,ipmmu-main = <&ipmmu_mm 4>;
967 power-domains = <&sysc 975 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
968 #iommu-cells = <1>; 976 #iommu-cells = <1>;
969 }; 977 };
970 978
971 ipmmu_pv0: iommu@fd800000 { 979 ipmmu_pv0: iommu@fd800000 {
972 compatible = "renesas, 980 compatible = "renesas,ipmmu-r8a77965";
973 reg = <0 0xfd800000 0 981 reg = <0 0xfd800000 0 0x1000>;
974 renesas,ipmmu-main = < 982 renesas,ipmmu-main = <&ipmmu_mm 6>;
975 power-domains = <&sysc 983 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
976 #iommu-cells = <1>; 984 #iommu-cells = <1>;
977 }; 985 };
978 986
979 ipmmu_rt: iommu@ffc80000 { 987 ipmmu_rt: iommu@ffc80000 {
980 compatible = "renesas, 988 compatible = "renesas,ipmmu-r8a77965";
981 reg = <0 0xffc80000 0 989 reg = <0 0xffc80000 0 0x1000>;
982 renesas,ipmmu-main = < 990 renesas,ipmmu-main = <&ipmmu_mm 10>;
983 power-domains = <&sysc 991 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
984 #iommu-cells = <1>; 992 #iommu-cells = <1>;
985 }; 993 };
986 994
987 ipmmu_vc0: iommu@fe6b0000 { 995 ipmmu_vc0: iommu@fe6b0000 {
988 compatible = "renesas, 996 compatible = "renesas,ipmmu-r8a77965";
989 reg = <0 0xfe6b0000 0 997 reg = <0 0xfe6b0000 0 0x1000>;
990 renesas,ipmmu-main = < 998 renesas,ipmmu-main = <&ipmmu_mm 12>;
991 power-domains = <&sysc 999 power-domains = <&sysc R8A77965_PD_A3VC>;
992 #iommu-cells = <1>; 1000 #iommu-cells = <1>;
993 }; 1001 };
994 1002
995 ipmmu_vi0: iommu@febd0000 { 1003 ipmmu_vi0: iommu@febd0000 {
996 compatible = "renesas, 1004 compatible = "renesas,ipmmu-r8a77965";
997 reg = <0 0xfebd0000 0 1005 reg = <0 0xfebd0000 0 0x1000>;
998 renesas,ipmmu-main = < 1006 renesas,ipmmu-main = <&ipmmu_mm 14>;
999 power-domains = <&sysc 1007 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1000 #iommu-cells = <1>; 1008 #iommu-cells = <1>;
1001 }; 1009 };
1002 1010
1003 ipmmu_vp0: iommu@fe990000 { 1011 ipmmu_vp0: iommu@fe990000 {
1004 compatible = "renesas 1012 compatible = "renesas,ipmmu-r8a77965";
1005 reg = <0 0xfe990000 0 1013 reg = <0 0xfe990000 0 0x1000>;
1006 renesas,ipmmu-main = 1014 renesas,ipmmu-main = <&ipmmu_mm 16>;
1007 power-domains = <&sys 1015 power-domains = <&sysc R8A77965_PD_A3VP>;
1008 #iommu-cells = <1>; 1016 #iommu-cells = <1>;
1009 }; 1017 };
1010 1018
1011 avb: ethernet@e6800000 { 1019 avb: ethernet@e6800000 {
1012 compatible = "renesas 1020 compatible = "renesas,etheravb-r8a77965",
1013 "renesas 1021 "renesas,etheravb-rcar-gen3";
1014 reg = <0 0xe6800000 0 1022 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1015 interrupts = <GIC_SPI 1023 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1016 <GIC_SPI 1024 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 1025 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 1026 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 1027 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 1028 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 1029 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 1030 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 1031 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 1032 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 1033 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 1034 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 1035 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 1036 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 1037 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 1038 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 1039 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 1040 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 1041 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 1042 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 1043 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 1044 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 1045 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 1046 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 1047 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1040 interrupt-names = "ch 1048 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1041 "ch 1049 "ch4", "ch5", "ch6", "ch7",
1042 "ch 1050 "ch8", "ch9", "ch10", "ch11",
1043 "ch 1051 "ch12", "ch13", "ch14", "ch15",
1044 "ch 1052 "ch16", "ch17", "ch18", "ch19",
1045 "ch 1053 "ch20", "ch21", "ch22", "ch23",
1046 "ch 1054 "ch24";
1047 clocks = <&cpg CPG_MO 1055 clocks = <&cpg CPG_MOD 812>;
1048 clock-names = "fck"; 1056 clock-names = "fck";
1049 power-domains = <&sys 1057 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1050 resets = <&cpg 812>; 1058 resets = <&cpg 812>;
1051 phy-mode = "rgmii"; 1059 phy-mode = "rgmii";
1052 rx-internal-delay-ps 1060 rx-internal-delay-ps = <0>;
1053 tx-internal-delay-ps 1061 tx-internal-delay-ps = <0>;
1054 iommus = <&ipmmu_ds0 1062 iommus = <&ipmmu_ds0 16>;
1055 #address-cells = <1>; 1063 #address-cells = <1>;
1056 #size-cells = <0>; 1064 #size-cells = <0>;
1057 status = "disabled"; 1065 status = "disabled";
1058 }; 1066 };
1059 1067
1060 can0: can@e6c30000 { 1068 can0: can@e6c30000 {
1061 compatible = "renesas 1069 compatible = "renesas,can-r8a77965",
1062 "renesas 1070 "renesas,rcar-gen3-can";
1063 reg = <0 0xe6c30000 0 1071 reg = <0 0xe6c30000 0 0x1000>;
1064 interrupts = <GIC_SPI 1072 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&cpg CPG_MO 1073 clocks = <&cpg CPG_MOD 916>,
1066 <&cpg CPG_CORE 1074 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1067 <&can_clk>; 1075 <&can_clk>;
1068 clock-names = "clkp1" 1076 clock-names = "clkp1", "clkp2", "can_clk";
1069 assigned-clocks = <&c 1077 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1070 assigned-clock-rates 1078 assigned-clock-rates = <40000000>;
1071 power-domains = <&sys 1079 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1072 resets = <&cpg 916>; 1080 resets = <&cpg 916>;
1073 status = "disabled"; 1081 status = "disabled";
1074 }; 1082 };
1075 1083
1076 can1: can@e6c38000 { 1084 can1: can@e6c38000 {
1077 compatible = "renesas 1085 compatible = "renesas,can-r8a77965",
1078 "renesas 1086 "renesas,rcar-gen3-can";
1079 reg = <0 0xe6c38000 0 1087 reg = <0 0xe6c38000 0 0x1000>;
1080 interrupts = <GIC_SPI 1088 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1081 clocks = <&cpg CPG_MO 1089 clocks = <&cpg CPG_MOD 915>,
1082 <&cpg CPG_CORE 1090 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1083 <&can_clk>; 1091 <&can_clk>;
1084 clock-names = "clkp1" 1092 clock-names = "clkp1", "clkp2", "can_clk";
1085 assigned-clocks = <&c 1093 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1086 assigned-clock-rates 1094 assigned-clock-rates = <40000000>;
1087 power-domains = <&sys 1095 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1088 resets = <&cpg 915>; 1096 resets = <&cpg 915>;
1089 status = "disabled"; 1097 status = "disabled";
1090 }; 1098 };
1091 1099
1092 canfd: can@e66c0000 { 1100 canfd: can@e66c0000 {
1093 compatible = "renesas 1101 compatible = "renesas,r8a77965-canfd",
1094 "renesas 1102 "renesas,rcar-gen3-canfd";
1095 reg = <0 0xe66c0000 0 1103 reg = <0 0xe66c0000 0 0x8000>;
1096 interrupts = <GIC_SPI 1104 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1097 <GIC_SPI 3 1105 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1098 interrupt-names = "ch 1106 interrupt-names = "ch_int", "g_int";
1099 clocks = <&cpg CPG_MO 1107 clocks = <&cpg CPG_MOD 914>,
1100 <&cpg CPG_CORE 1108 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1101 <&can_clk>; 1109 <&can_clk>;
1102 clock-names = "fck", 1110 clock-names = "fck", "canfd", "can_clk";
1103 assigned-clocks = <&c 1111 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1104 assigned-clock-rates 1112 assigned-clock-rates = <40000000>;
1105 power-domains = <&sys 1113 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1106 resets = <&cpg 914>; 1114 resets = <&cpg 914>;
1107 status = "disabled"; 1115 status = "disabled";
1108 1116
1109 channel0 { 1117 channel0 {
1110 status = "dis 1118 status = "disabled";
1111 }; 1119 };
1112 1120
1113 channel1 { 1121 channel1 {
1114 status = "dis 1122 status = "disabled";
1115 }; 1123 };
1116 }; 1124 };
1117 1125
1118 pwm0: pwm@e6e30000 { 1126 pwm0: pwm@e6e30000 {
1119 compatible = "renesas 1127 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1120 reg = <0 0xe6e30000 0 1128 reg = <0 0xe6e30000 0 8>;
1121 #pwm-cells = <2>; 1129 #pwm-cells = <2>;
1122 clocks = <&cpg CPG_MO 1130 clocks = <&cpg CPG_MOD 523>;
1123 resets = <&cpg 523>; 1131 resets = <&cpg 523>;
1124 power-domains = <&sys 1132 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1125 status = "disabled"; 1133 status = "disabled";
1126 }; 1134 };
1127 1135
1128 pwm1: pwm@e6e31000 { 1136 pwm1: pwm@e6e31000 {
1129 compatible = "renesas 1137 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1130 reg = <0 0xe6e31000 0 1138 reg = <0 0xe6e31000 0 8>;
1131 #pwm-cells = <2>; 1139 #pwm-cells = <2>;
1132 clocks = <&cpg CPG_MO 1140 clocks = <&cpg CPG_MOD 523>;
1133 resets = <&cpg 523>; 1141 resets = <&cpg 523>;
1134 power-domains = <&sys 1142 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1135 status = "disabled"; 1143 status = "disabled";
1136 }; 1144 };
1137 1145
1138 pwm2: pwm@e6e32000 { 1146 pwm2: pwm@e6e32000 {
1139 compatible = "renesas 1147 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1140 reg = <0 0xe6e32000 0 1148 reg = <0 0xe6e32000 0 8>;
1141 #pwm-cells = <2>; 1149 #pwm-cells = <2>;
1142 clocks = <&cpg CPG_MO 1150 clocks = <&cpg CPG_MOD 523>;
1143 resets = <&cpg 523>; 1151 resets = <&cpg 523>;
1144 power-domains = <&sys 1152 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1145 status = "disabled"; 1153 status = "disabled";
1146 }; 1154 };
1147 1155
1148 pwm3: pwm@e6e33000 { 1156 pwm3: pwm@e6e33000 {
1149 compatible = "renesas 1157 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1150 reg = <0 0xe6e33000 0 1158 reg = <0 0xe6e33000 0 8>;
1151 #pwm-cells = <2>; 1159 #pwm-cells = <2>;
1152 clocks = <&cpg CPG_MO 1160 clocks = <&cpg CPG_MOD 523>;
1153 resets = <&cpg 523>; 1161 resets = <&cpg 523>;
1154 power-domains = <&sys 1162 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1155 status = "disabled"; 1163 status = "disabled";
1156 }; 1164 };
1157 1165
1158 pwm4: pwm@e6e34000 { 1166 pwm4: pwm@e6e34000 {
1159 compatible = "renesas 1167 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1160 reg = <0 0xe6e34000 0 1168 reg = <0 0xe6e34000 0 8>;
1161 #pwm-cells = <2>; 1169 #pwm-cells = <2>;
1162 clocks = <&cpg CPG_MO 1170 clocks = <&cpg CPG_MOD 523>;
1163 resets = <&cpg 523>; 1171 resets = <&cpg 523>;
1164 power-domains = <&sys 1172 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1165 status = "disabled"; 1173 status = "disabled";
1166 }; 1174 };
1167 1175
1168 pwm5: pwm@e6e35000 { 1176 pwm5: pwm@e6e35000 {
1169 compatible = "renesas 1177 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1170 reg = <0 0xe6e35000 0 1178 reg = <0 0xe6e35000 0 8>;
1171 #pwm-cells = <2>; 1179 #pwm-cells = <2>;
1172 clocks = <&cpg CPG_MO 1180 clocks = <&cpg CPG_MOD 523>;
1173 resets = <&cpg 523>; 1181 resets = <&cpg 523>;
1174 power-domains = <&sys 1182 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1175 status = "disabled"; 1183 status = "disabled";
1176 }; 1184 };
1177 1185
1178 pwm6: pwm@e6e36000 { 1186 pwm6: pwm@e6e36000 {
1179 compatible = "renesas 1187 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1180 reg = <0 0xe6e36000 0 1188 reg = <0 0xe6e36000 0 8>;
1181 #pwm-cells = <2>; 1189 #pwm-cells = <2>;
1182 clocks = <&cpg CPG_MO 1190 clocks = <&cpg CPG_MOD 523>;
1183 resets = <&cpg 523>; 1191 resets = <&cpg 523>;
1184 power-domains = <&sys 1192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1185 status = "disabled"; 1193 status = "disabled";
1186 }; 1194 };
1187 1195
1188 scif0: serial@e6e60000 { 1196 scif0: serial@e6e60000 {
1189 compatible = "renesas 1197 compatible = "renesas,scif-r8a77965",
1190 "renesas 1198 "renesas,rcar-gen3-scif", "renesas,scif";
1191 reg = <0 0xe6e60000 0 1199 reg = <0 0xe6e60000 0 64>;
1192 interrupts = <GIC_SPI 1200 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MO 1201 clocks = <&cpg CPG_MOD 207>,
1194 <&cpg CPG_CO 1202 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1195 <&scif_clk>; 1203 <&scif_clk>;
1196 clock-names = "fck", 1204 clock-names = "fck", "brg_int", "scif_clk";
1197 dmas = <&dmac1 0x51>, 1205 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1198 <&dmac2 0x51>, 1206 <&dmac2 0x51>, <&dmac2 0x50>;
1199 dma-names = "tx", "rx 1207 dma-names = "tx", "rx", "tx", "rx";
1200 power-domains = <&sys 1208 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1201 resets = <&cpg 207>; 1209 resets = <&cpg 207>;
1202 status = "disabled"; 1210 status = "disabled";
1203 }; 1211 };
1204 1212
1205 scif1: serial@e6e68000 { 1213 scif1: serial@e6e68000 {
1206 compatible = "renesas 1214 compatible = "renesas,scif-r8a77965",
1207 "renesas 1215 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6e68000 0 1216 reg = <0 0xe6e68000 0 64>;
1209 interrupts = <GIC_SPI 1217 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1218 clocks = <&cpg CPG_MOD 206>,
1211 <&cpg CPG_CO 1219 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1212 <&scif_clk>; 1220 <&scif_clk>;
1213 clock-names = "fck", 1221 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac1 0x53>, 1222 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1215 <&dmac2 0x53>, 1223 <&dmac2 0x53>, <&dmac2 0x52>;
1216 dma-names = "tx", "rx 1224 dma-names = "tx", "rx", "tx", "rx";
1217 power-domains = <&sys 1225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1218 resets = <&cpg 206>; 1226 resets = <&cpg 206>;
1219 status = "disabled"; 1227 status = "disabled";
1220 }; 1228 };
1221 1229
1222 scif2: serial@e6e88000 { 1230 scif2: serial@e6e88000 {
1223 compatible = "renesas 1231 compatible = "renesas,scif-r8a77965",
1224 "renesas 1232 "renesas,rcar-gen3-scif", "renesas,scif";
1225 reg = <0 0xe6e88000 0 1233 reg = <0 0xe6e88000 0 64>;
1226 interrupts = <GIC_SPI 1234 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MO 1235 clocks = <&cpg CPG_MOD 310>,
1228 <&cpg CPG_CO 1236 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1229 <&scif_clk>; 1237 <&scif_clk>;
1230 clock-names = "fck", 1238 clock-names = "fck", "brg_int", "scif_clk";
1231 dmas = <&dmac1 0x13>, 1239 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1232 <&dmac2 0x13>, 1240 <&dmac2 0x13>, <&dmac2 0x12>;
1233 dma-names = "tx", "rx 1241 dma-names = "tx", "rx", "tx", "rx";
1234 power-domains = <&sys 1242 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1235 resets = <&cpg 310>; 1243 resets = <&cpg 310>;
1236 status = "disabled"; 1244 status = "disabled";
1237 }; 1245 };
1238 1246
1239 scif3: serial@e6c50000 { 1247 scif3: serial@e6c50000 {
1240 compatible = "renesas 1248 compatible = "renesas,scif-r8a77965",
1241 "renesas 1249 "renesas,rcar-gen3-scif", "renesas,scif";
1242 reg = <0 0xe6c50000 0 1250 reg = <0 0xe6c50000 0 64>;
1243 interrupts = <GIC_SPI 1251 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1244 clocks = <&cpg CPG_MO 1252 clocks = <&cpg CPG_MOD 204>,
1245 <&cpg CPG_CO 1253 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1246 <&scif_clk>; 1254 <&scif_clk>;
1247 clock-names = "fck", 1255 clock-names = "fck", "brg_int", "scif_clk";
1248 dmas = <&dmac0 0x57>, 1256 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1249 dma-names = "tx", "rx 1257 dma-names = "tx", "rx";
1250 power-domains = <&sys 1258 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1251 resets = <&cpg 204>; 1259 resets = <&cpg 204>;
1252 status = "disabled"; 1260 status = "disabled";
1253 }; 1261 };
1254 1262
1255 scif4: serial@e6c40000 { 1263 scif4: serial@e6c40000 {
1256 compatible = "renesas 1264 compatible = "renesas,scif-r8a77965",
1257 "renesas 1265 "renesas,rcar-gen3-scif", "renesas,scif";
1258 reg = <0 0xe6c40000 0 1266 reg = <0 0xe6c40000 0 64>;
1259 interrupts = <GIC_SPI 1267 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1260 clocks = <&cpg CPG_MO 1268 clocks = <&cpg CPG_MOD 203>,
1261 <&cpg CPG_CO 1269 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1262 <&scif_clk>; 1270 <&scif_clk>;
1263 clock-names = "fck", 1271 clock-names = "fck", "brg_int", "scif_clk";
1264 dmas = <&dmac0 0x59>, 1272 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1265 dma-names = "tx", "rx 1273 dma-names = "tx", "rx";
1266 power-domains = <&sys 1274 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1267 resets = <&cpg 203>; 1275 resets = <&cpg 203>;
1268 status = "disabled"; 1276 status = "disabled";
1269 }; 1277 };
1270 1278
1271 scif5: serial@e6f30000 { 1279 scif5: serial@e6f30000 {
1272 compatible = "renesas 1280 compatible = "renesas,scif-r8a77965",
1273 "renesas 1281 "renesas,rcar-gen3-scif", "renesas,scif";
1274 reg = <0 0xe6f30000 0 1282 reg = <0 0xe6f30000 0 64>;
1275 interrupts = <GIC_SPI 1283 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1276 clocks = <&cpg CPG_MO 1284 clocks = <&cpg CPG_MOD 202>,
1277 <&cpg CPG_CO 1285 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1278 <&scif_clk>; 1286 <&scif_clk>;
1279 clock-names = "fck", 1287 clock-names = "fck", "brg_int", "scif_clk";
1280 dmas = <&dmac1 0x5b>, 1288 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1281 <&dmac2 0x5b>, 1289 <&dmac2 0x5b>, <&dmac2 0x5a>;
1282 dma-names = "tx", "rx 1290 dma-names = "tx", "rx", "tx", "rx";
1283 power-domains = <&sys 1291 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1284 resets = <&cpg 202>; 1292 resets = <&cpg 202>;
1285 status = "disabled"; 1293 status = "disabled";
1286 }; 1294 };
1287 1295
1288 tpu: pwm@e6e80000 { 1296 tpu: pwm@e6e80000 {
1289 compatible = "renesas 1297 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1290 reg = <0 0xe6e80000 0 1298 reg = <0 0xe6e80000 0 0x148>;
1291 interrupts = <GIC_SPI 1299 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1292 clocks = <&cpg CPG_MO 1300 clocks = <&cpg CPG_MOD 304>;
1293 power-domains = <&sys 1301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1294 resets = <&cpg 304>; 1302 resets = <&cpg 304>;
1295 #pwm-cells = <3>; 1303 #pwm-cells = <3>;
1296 status = "disabled"; 1304 status = "disabled";
1297 }; 1305 };
1298 1306
1299 msiof0: spi@e6e90000 { 1307 msiof0: spi@e6e90000 {
1300 compatible = "renesas 1308 compatible = "renesas,msiof-r8a77965",
1301 "renesas 1309 "renesas,rcar-gen3-msiof";
1302 reg = <0 0xe6e90000 0 1310 reg = <0 0xe6e90000 0 0x0064>;
1303 interrupts = <GIC_SPI 1311 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1304 clocks = <&cpg CPG_MO 1312 clocks = <&cpg CPG_MOD 211>;
1305 dmas = <&dmac1 0x41>, 1313 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1306 <&dmac2 0x41>, 1314 <&dmac2 0x41>, <&dmac2 0x40>;
1307 dma-names = "tx", "rx 1315 dma-names = "tx", "rx", "tx", "rx";
1308 power-domains = <&sys 1316 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1309 resets = <&cpg 211>; 1317 resets = <&cpg 211>;
1310 #address-cells = <1>; 1318 #address-cells = <1>;
1311 #size-cells = <0>; 1319 #size-cells = <0>;
1312 status = "disabled"; 1320 status = "disabled";
1313 }; 1321 };
1314 1322
1315 msiof1: spi@e6ea0000 { 1323 msiof1: spi@e6ea0000 {
1316 compatible = "renesas 1324 compatible = "renesas,msiof-r8a77965",
1317 "renesas 1325 "renesas,rcar-gen3-msiof";
1318 reg = <0 0xe6ea0000 0 1326 reg = <0 0xe6ea0000 0 0x0064>;
1319 interrupts = <GIC_SPI 1327 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MO 1328 clocks = <&cpg CPG_MOD 210>;
1321 dmas = <&dmac1 0x43>, 1329 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1322 <&dmac2 0x43>, 1330 <&dmac2 0x43>, <&dmac2 0x42>;
1323 dma-names = "tx", "rx 1331 dma-names = "tx", "rx", "tx", "rx";
1324 power-domains = <&sys 1332 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1325 resets = <&cpg 210>; 1333 resets = <&cpg 210>;
1326 #address-cells = <1>; 1334 #address-cells = <1>;
1327 #size-cells = <0>; 1335 #size-cells = <0>;
1328 status = "disabled"; 1336 status = "disabled";
1329 }; 1337 };
1330 1338
1331 msiof2: spi@e6c00000 { 1339 msiof2: spi@e6c00000 {
1332 compatible = "renesas 1340 compatible = "renesas,msiof-r8a77965",
1333 "renesas 1341 "renesas,rcar-gen3-msiof";
1334 reg = <0 0xe6c00000 0 1342 reg = <0 0xe6c00000 0 0x0064>;
1335 interrupts = <GIC_SPI 1343 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MO 1344 clocks = <&cpg CPG_MOD 209>;
1337 dmas = <&dmac0 0x45>, 1345 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1338 dma-names = "tx", "rx 1346 dma-names = "tx", "rx";
1339 power-domains = <&sys 1347 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1340 resets = <&cpg 209>; 1348 resets = <&cpg 209>;
1341 #address-cells = <1>; 1349 #address-cells = <1>;
1342 #size-cells = <0>; 1350 #size-cells = <0>;
1343 status = "disabled"; 1351 status = "disabled";
1344 }; 1352 };
1345 1353
1346 msiof3: spi@e6c10000 { 1354 msiof3: spi@e6c10000 {
1347 compatible = "renesas 1355 compatible = "renesas,msiof-r8a77965",
1348 "renesas 1356 "renesas,rcar-gen3-msiof";
1349 reg = <0 0xe6c10000 0 1357 reg = <0 0xe6c10000 0 0x0064>;
1350 interrupts = <GIC_SPI 1358 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1351 clocks = <&cpg CPG_MO 1359 clocks = <&cpg CPG_MOD 208>;
1352 dmas = <&dmac0 0x47>, 1360 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1353 dma-names = "tx", "rx 1361 dma-names = "tx", "rx";
1354 power-domains = <&sys 1362 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1355 resets = <&cpg 208>; 1363 resets = <&cpg 208>;
1356 #address-cells = <1>; 1364 #address-cells = <1>;
1357 #size-cells = <0>; 1365 #size-cells = <0>;
1358 status = "disabled"; 1366 status = "disabled";
1359 }; 1367 };
1360 1368
1361 vin0: video@e6ef0000 { 1369 vin0: video@e6ef0000 {
1362 compatible = "renesas 1370 compatible = "renesas,vin-r8a77965";
1363 reg = <0 0xe6ef0000 0 1371 reg = <0 0xe6ef0000 0 0x1000>;
1364 interrupts = <GIC_SPI 1372 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MO 1373 clocks = <&cpg CPG_MOD 811>;
1366 power-domains = <&sys 1374 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1367 resets = <&cpg 811>; 1375 resets = <&cpg 811>;
1368 renesas,id = <0>; 1376 renesas,id = <0>;
1369 status = "disabled"; 1377 status = "disabled";
1370 1378
1371 ports { 1379 ports {
1372 #address-cell 1380 #address-cells = <1>;
1373 #size-cells = 1381 #size-cells = <0>;
1374 1382
1375 port@1 { 1383 port@1 {
1376 #addr 1384 #address-cells = <1>;
1377 #size 1385 #size-cells = <0>;
1378 1386
1379 reg = 1387 reg = <1>;
1380 1388
1381 vin0c 1389 vin0csi20: endpoint@0 {
1382 1390 reg = <0>;
1383 1391 remote-endpoint = <&csi20vin0>;
1384 }; 1392 };
1385 vin0c 1393 vin0csi40: endpoint@2 {
1386 1394 reg = <2>;
1387 1395 remote-endpoint = <&csi40vin0>;
1388 }; 1396 };
1389 }; 1397 };
1390 }; 1398 };
1391 }; 1399 };
1392 1400
1393 vin1: video@e6ef1000 { 1401 vin1: video@e6ef1000 {
1394 compatible = "renesas 1402 compatible = "renesas,vin-r8a77965";
1395 reg = <0 0xe6ef1000 0 1403 reg = <0 0xe6ef1000 0 0x1000>;
1396 interrupts = <GIC_SPI 1404 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MO 1405 clocks = <&cpg CPG_MOD 810>;
1398 power-domains = <&sys 1406 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1399 resets = <&cpg 810>; 1407 resets = <&cpg 810>;
1400 renesas,id = <1>; 1408 renesas,id = <1>;
1401 status = "disabled"; 1409 status = "disabled";
1402 1410
1403 ports { 1411 ports {
1404 #address-cell 1412 #address-cells = <1>;
1405 #size-cells = 1413 #size-cells = <0>;
1406 1414
1407 port@1 { 1415 port@1 {
1408 #addr 1416 #address-cells = <1>;
1409 #size 1417 #size-cells = <0>;
1410 1418
1411 reg = 1419 reg = <1>;
1412 1420
1413 vin1c 1421 vin1csi20: endpoint@0 {
1414 1422 reg = <0>;
1415 1423 remote-endpoint = <&csi20vin1>;
1416 }; 1424 };
1417 vin1c 1425 vin1csi40: endpoint@2 {
1418 1426 reg = <2>;
1419 1427 remote-endpoint = <&csi40vin1>;
1420 }; 1428 };
1421 }; 1429 };
1422 }; 1430 };
1423 }; 1431 };
1424 1432
1425 vin2: video@e6ef2000 { 1433 vin2: video@e6ef2000 {
1426 compatible = "renesas 1434 compatible = "renesas,vin-r8a77965";
1427 reg = <0 0xe6ef2000 0 1435 reg = <0 0xe6ef2000 0 0x1000>;
1428 interrupts = <GIC_SPI 1436 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MO 1437 clocks = <&cpg CPG_MOD 809>;
1430 power-domains = <&sys 1438 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1431 resets = <&cpg 809>; 1439 resets = <&cpg 809>;
1432 renesas,id = <2>; 1440 renesas,id = <2>;
1433 status = "disabled"; 1441 status = "disabled";
1434 1442
1435 ports { 1443 ports {
1436 #address-cell 1444 #address-cells = <1>;
1437 #size-cells = 1445 #size-cells = <0>;
1438 1446
1439 port@1 { 1447 port@1 {
1440 #addr 1448 #address-cells = <1>;
1441 #size 1449 #size-cells = <0>;
1442 1450
1443 reg = 1451 reg = <1>;
1444 1452
1445 vin2c 1453 vin2csi20: endpoint@0 {
1446 1454 reg = <0>;
1447 1455 remote-endpoint = <&csi20vin2>;
1448 }; 1456 };
1449 vin2c 1457 vin2csi40: endpoint@2 {
1450 1458 reg = <2>;
1451 1459 remote-endpoint = <&csi40vin2>;
1452 }; 1460 };
1453 }; 1461 };
1454 }; 1462 };
1455 }; 1463 };
1456 1464
1457 vin3: video@e6ef3000 { 1465 vin3: video@e6ef3000 {
1458 compatible = "renesas 1466 compatible = "renesas,vin-r8a77965";
1459 reg = <0 0xe6ef3000 0 1467 reg = <0 0xe6ef3000 0 0x1000>;
1460 interrupts = <GIC_SPI 1468 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MO 1469 clocks = <&cpg CPG_MOD 808>;
1462 power-domains = <&sys 1470 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1463 resets = <&cpg 808>; 1471 resets = <&cpg 808>;
1464 renesas,id = <3>; 1472 renesas,id = <3>;
1465 status = "disabled"; 1473 status = "disabled";
1466 1474
1467 ports { 1475 ports {
1468 #address-cell 1476 #address-cells = <1>;
1469 #size-cells = 1477 #size-cells = <0>;
1470 1478
1471 port@1 { 1479 port@1 {
1472 #addr 1480 #address-cells = <1>;
1473 #size 1481 #size-cells = <0>;
1474 1482
1475 reg = 1483 reg = <1>;
1476 1484
1477 vin3c 1485 vin3csi20: endpoint@0 {
1478 1486 reg = <0>;
1479 1487 remote-endpoint = <&csi20vin3>;
1480 }; 1488 };
1481 vin3c 1489 vin3csi40: endpoint@2 {
1482 1490 reg = <2>;
1483 1491 remote-endpoint = <&csi40vin3>;
1484 }; 1492 };
1485 }; 1493 };
1486 }; 1494 };
1487 }; 1495 };
1488 1496
1489 vin4: video@e6ef4000 { 1497 vin4: video@e6ef4000 {
1490 compatible = "renesas 1498 compatible = "renesas,vin-r8a77965";
1491 reg = <0 0xe6ef4000 0 1499 reg = <0 0xe6ef4000 0 0x1000>;
1492 interrupts = <GIC_SPI 1500 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MO 1501 clocks = <&cpg CPG_MOD 807>;
1494 power-domains = <&sys 1502 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1495 resets = <&cpg 807>; 1503 resets = <&cpg 807>;
1496 renesas,id = <4>; 1504 renesas,id = <4>;
1497 status = "disabled"; 1505 status = "disabled";
1498 1506
1499 ports { 1507 ports {
1500 #address-cell 1508 #address-cells = <1>;
1501 #size-cells = 1509 #size-cells = <0>;
1502 1510
1503 port@1 { 1511 port@1 {
1504 #addr 1512 #address-cells = <1>;
1505 #size 1513 #size-cells = <0>;
1506 1514
1507 reg = 1515 reg = <1>;
1508 1516
1509 vin4c 1517 vin4csi20: endpoint@0 {
1510 1518 reg = <0>;
1511 1519 remote-endpoint = <&csi20vin4>;
1512 }; 1520 };
1513 vin4c 1521 vin4csi40: endpoint@2 {
1514 1522 reg = <2>;
1515 1523 remote-endpoint = <&csi40vin4>;
1516 }; 1524 };
1517 }; 1525 };
1518 }; 1526 };
1519 }; 1527 };
1520 1528
1521 vin5: video@e6ef5000 { 1529 vin5: video@e6ef5000 {
1522 compatible = "renesas 1530 compatible = "renesas,vin-r8a77965";
1523 reg = <0 0xe6ef5000 0 1531 reg = <0 0xe6ef5000 0 0x1000>;
1524 interrupts = <GIC_SPI 1532 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MO 1533 clocks = <&cpg CPG_MOD 806>;
1526 power-domains = <&sys 1534 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1527 resets = <&cpg 806>; 1535 resets = <&cpg 806>;
1528 renesas,id = <5>; 1536 renesas,id = <5>;
1529 status = "disabled"; 1537 status = "disabled";
1530 1538
1531 ports { 1539 ports {
1532 #address-cell 1540 #address-cells = <1>;
1533 #size-cells = 1541 #size-cells = <0>;
1534 1542
1535 port@1 { 1543 port@1 {
1536 #addr 1544 #address-cells = <1>;
1537 #size 1545 #size-cells = <0>;
1538 1546
1539 reg = 1547 reg = <1>;
1540 1548
1541 vin5c 1549 vin5csi20: endpoint@0 {
1542 1550 reg = <0>;
1543 1551 remote-endpoint = <&csi20vin5>;
1544 }; 1552 };
1545 vin5c 1553 vin5csi40: endpoint@2 {
1546 1554 reg = <2>;
1547 1555 remote-endpoint = <&csi40vin5>;
1548 }; 1556 };
1549 }; 1557 };
1550 }; 1558 };
1551 }; 1559 };
1552 1560
1553 vin6: video@e6ef6000 { 1561 vin6: video@e6ef6000 {
1554 compatible = "renesas 1562 compatible = "renesas,vin-r8a77965";
1555 reg = <0 0xe6ef6000 0 1563 reg = <0 0xe6ef6000 0 0x1000>;
1556 interrupts = <GIC_SPI 1564 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1557 clocks = <&cpg CPG_MO 1565 clocks = <&cpg CPG_MOD 805>;
1558 power-domains = <&sys 1566 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1559 resets = <&cpg 805>; 1567 resets = <&cpg 805>;
1560 renesas,id = <6>; 1568 renesas,id = <6>;
1561 status = "disabled"; 1569 status = "disabled";
1562 1570
1563 ports { 1571 ports {
1564 #address-cell 1572 #address-cells = <1>;
1565 #size-cells = 1573 #size-cells = <0>;
1566 1574
1567 port@1 { 1575 port@1 {
1568 #addr 1576 #address-cells = <1>;
1569 #size 1577 #size-cells = <0>;
1570 1578
1571 reg = 1579 reg = <1>;
1572 1580
1573 vin6c 1581 vin6csi20: endpoint@0 {
1574 1582 reg = <0>;
1575 1583 remote-endpoint = <&csi20vin6>;
1576 }; 1584 };
1577 vin6c 1585 vin6csi40: endpoint@2 {
1578 1586 reg = <2>;
1579 1587 remote-endpoint = <&csi40vin6>;
1580 }; 1588 };
1581 }; 1589 };
1582 }; 1590 };
1583 }; 1591 };
1584 1592
1585 vin7: video@e6ef7000 { 1593 vin7: video@e6ef7000 {
1586 compatible = "renesas 1594 compatible = "renesas,vin-r8a77965";
1587 reg = <0 0xe6ef7000 0 1595 reg = <0 0xe6ef7000 0 0x1000>;
1588 interrupts = <GIC_SPI 1596 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1589 clocks = <&cpg CPG_MO 1597 clocks = <&cpg CPG_MOD 804>;
1590 power-domains = <&sys 1598 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1591 resets = <&cpg 804>; 1599 resets = <&cpg 804>;
1592 renesas,id = <7>; 1600 renesas,id = <7>;
1593 status = "disabled"; 1601 status = "disabled";
1594 1602
1595 ports { 1603 ports {
1596 #address-cell 1604 #address-cells = <1>;
1597 #size-cells = 1605 #size-cells = <0>;
1598 1606
1599 port@1 { 1607 port@1 {
1600 #addr 1608 #address-cells = <1>;
1601 #size 1609 #size-cells = <0>;
1602 1610
1603 reg = 1611 reg = <1>;
1604 1612
1605 vin7c 1613 vin7csi20: endpoint@0 {
1606 1614 reg = <0>;
1607 1615 remote-endpoint = <&csi20vin7>;
1608 }; 1616 };
1609 vin7c 1617 vin7csi40: endpoint@2 {
1610 1618 reg = <2>;
1611 1619 remote-endpoint = <&csi40vin7>;
1612 }; 1620 };
1613 }; 1621 };
1614 }; 1622 };
1615 }; 1623 };
1616 1624
1617 drif00: rif@e6f40000 { 1625 drif00: rif@e6f40000 {
1618 compatible = "renesas 1626 compatible = "renesas,r8a77965-drif",
1619 "renesas 1627 "renesas,rcar-gen3-drif";
1620 reg = <0 0xe6f40000 0 1628 reg = <0 0xe6f40000 0 0x84>;
1621 interrupts = <GIC_SPI 1629 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1622 clocks = <&cpg CPG_MO 1630 clocks = <&cpg CPG_MOD 515>;
1623 clock-names = "fck"; 1631 clock-names = "fck";
1624 dmas = <&dmac1 0x20>, 1632 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1625 dma-names = "rx", "rx 1633 dma-names = "rx", "rx";
1626 power-domains = <&sys 1634 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1627 resets = <&cpg 515>; 1635 resets = <&cpg 515>;
1628 renesas,bonding = <&d 1636 renesas,bonding = <&drif01>;
1629 status = "disabled"; 1637 status = "disabled";
1630 }; 1638 };
1631 1639
1632 drif01: rif@e6f50000 { 1640 drif01: rif@e6f50000 {
1633 compatible = "renesas 1641 compatible = "renesas,r8a77965-drif",
1634 "renesas 1642 "renesas,rcar-gen3-drif";
1635 reg = <0 0xe6f50000 0 1643 reg = <0 0xe6f50000 0 0x84>;
1636 interrupts = <GIC_SPI 1644 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1637 clocks = <&cpg CPG_MO 1645 clocks = <&cpg CPG_MOD 514>;
1638 clock-names = "fck"; 1646 clock-names = "fck";
1639 dmas = <&dmac1 0x22>, 1647 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1640 dma-names = "rx", "rx 1648 dma-names = "rx", "rx";
1641 power-domains = <&sys 1649 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1642 resets = <&cpg 514>; 1650 resets = <&cpg 514>;
1643 renesas,bonding = <&d 1651 renesas,bonding = <&drif00>;
1644 status = "disabled"; 1652 status = "disabled";
1645 }; 1653 };
1646 1654
1647 drif10: rif@e6f60000 { 1655 drif10: rif@e6f60000 {
1648 compatible = "renesas 1656 compatible = "renesas,r8a77965-drif",
1649 "renesas 1657 "renesas,rcar-gen3-drif";
1650 reg = <0 0xe6f60000 0 1658 reg = <0 0xe6f60000 0 0x84>;
1651 interrupts = <GIC_SPI 1659 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1652 clocks = <&cpg CPG_MO 1660 clocks = <&cpg CPG_MOD 513>;
1653 clock-names = "fck"; 1661 clock-names = "fck";
1654 dmas = <&dmac1 0x24>, 1662 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1655 dma-names = "rx", "rx 1663 dma-names = "rx", "rx";
1656 power-domains = <&sys 1664 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1657 resets = <&cpg 513>; 1665 resets = <&cpg 513>;
1658 renesas,bonding = <&d 1666 renesas,bonding = <&drif11>;
1659 status = "disabled"; 1667 status = "disabled";
1660 }; 1668 };
1661 1669
1662 drif11: rif@e6f70000 { 1670 drif11: rif@e6f70000 {
1663 compatible = "renesas 1671 compatible = "renesas,r8a77965-drif",
1664 "renesas 1672 "renesas,rcar-gen3-drif";
1665 reg = <0 0xe6f70000 0 1673 reg = <0 0xe6f70000 0 0x84>;
1666 interrupts = <GIC_SPI 1674 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1667 clocks = <&cpg CPG_MO 1675 clocks = <&cpg CPG_MOD 512>;
1668 clock-names = "fck"; 1676 clock-names = "fck";
1669 dmas = <&dmac1 0x26>, 1677 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1670 dma-names = "rx", "rx 1678 dma-names = "rx", "rx";
1671 power-domains = <&sys 1679 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1672 resets = <&cpg 512>; 1680 resets = <&cpg 512>;
1673 renesas,bonding = <&d 1681 renesas,bonding = <&drif10>;
1674 status = "disabled"; 1682 status = "disabled";
1675 }; 1683 };
1676 1684
1677 drif20: rif@e6f80000 { 1685 drif20: rif@e6f80000 {
1678 compatible = "renesas 1686 compatible = "renesas,r8a77965-drif",
1679 "renesas 1687 "renesas,rcar-gen3-drif";
1680 reg = <0 0xe6f80000 0 1688 reg = <0 0xe6f80000 0 0x84>;
1681 interrupts = <GIC_SPI 1689 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1682 clocks = <&cpg CPG_MO 1690 clocks = <&cpg CPG_MOD 511>;
1683 clock-names = "fck"; 1691 clock-names = "fck";
1684 dmas = <&dmac1 0x28>, 1692 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1685 dma-names = "rx", "rx 1693 dma-names = "rx", "rx";
1686 power-domains = <&sys 1694 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1687 resets = <&cpg 511>; 1695 resets = <&cpg 511>;
1688 renesas,bonding = <&d 1696 renesas,bonding = <&drif21>;
1689 status = "disabled"; 1697 status = "disabled";
1690 }; 1698 };
1691 1699
1692 drif21: rif@e6f90000 { 1700 drif21: rif@e6f90000 {
1693 compatible = "renesas 1701 compatible = "renesas,r8a77965-drif",
1694 "renesas 1702 "renesas,rcar-gen3-drif";
1695 reg = <0 0xe6f90000 0 1703 reg = <0 0xe6f90000 0 0x84>;
1696 interrupts = <GIC_SPI 1704 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1697 clocks = <&cpg CPG_MO 1705 clocks = <&cpg CPG_MOD 510>;
1698 clock-names = "fck"; 1706 clock-names = "fck";
1699 dmas = <&dmac1 0x2a>, 1707 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1700 dma-names = "rx", "rx 1708 dma-names = "rx", "rx";
1701 power-domains = <&sys 1709 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1702 resets = <&cpg 510>; 1710 resets = <&cpg 510>;
1703 renesas,bonding = <&d 1711 renesas,bonding = <&drif20>;
1704 status = "disabled"; 1712 status = "disabled";
1705 }; 1713 };
1706 1714
1707 drif30: rif@e6fa0000 { 1715 drif30: rif@e6fa0000 {
1708 compatible = "renesas 1716 compatible = "renesas,r8a77965-drif",
1709 "renesas 1717 "renesas,rcar-gen3-drif";
1710 reg = <0 0xe6fa0000 0 1718 reg = <0 0xe6fa0000 0 0x84>;
1711 interrupts = <GIC_SPI 1719 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1712 clocks = <&cpg CPG_MO 1720 clocks = <&cpg CPG_MOD 509>;
1713 clock-names = "fck"; 1721 clock-names = "fck";
1714 dmas = <&dmac1 0x2c>, 1722 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1715 dma-names = "rx", "rx 1723 dma-names = "rx", "rx";
1716 power-domains = <&sys 1724 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1717 resets = <&cpg 509>; 1725 resets = <&cpg 509>;
1718 renesas,bonding = <&d 1726 renesas,bonding = <&drif31>;
1719 status = "disabled"; 1727 status = "disabled";
1720 }; 1728 };
1721 1729
1722 drif31: rif@e6fb0000 { 1730 drif31: rif@e6fb0000 {
1723 compatible = "renesas 1731 compatible = "renesas,r8a77965-drif",
1724 "renesas 1732 "renesas,rcar-gen3-drif";
1725 reg = <0 0xe6fb0000 0 1733 reg = <0 0xe6fb0000 0 0x84>;
1726 interrupts = <GIC_SPI 1734 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1727 clocks = <&cpg CPG_MO 1735 clocks = <&cpg CPG_MOD 508>;
1728 clock-names = "fck"; 1736 clock-names = "fck";
1729 dmas = <&dmac1 0x2e>, 1737 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1730 dma-names = "rx", "rx 1738 dma-names = "rx", "rx";
1731 power-domains = <&sys 1739 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1732 resets = <&cpg 508>; 1740 resets = <&cpg 508>;
1733 renesas,bonding = <&d 1741 renesas,bonding = <&drif30>;
1734 status = "disabled"; 1742 status = "disabled";
1735 }; 1743 };
1736 1744
1737 rcar_sound: sound@ec500000 { 1745 rcar_sound: sound@ec500000 {
1738 /* 1746 /*
1739 * #sound-dai-cells i !! 1747 * #sound-dai-cells is required
1740 * 1748 *
1741 * Single DAI : #soun 1749 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1742 * Multi DAI : #soun 1750 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1743 */ 1751 */
1744 /* 1752 /*
1745 * #clock-cells is re 1753 * #clock-cells is required for audio_clkout0/1/2/3
1746 * 1754 *
1747 * clkout : #cl 1755 * clkout : #clock-cells = <0>; <&rcar_sound>;
1748 * clkout0/1/2/3: #cl 1756 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1749 */ 1757 */
1750 compatible = "renesas 1758 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1751 reg = <0 0xec500000 0 1759 reg = <0 0xec500000 0 0x1000>, /* SCU */
1752 <0 0xec5a0000 0 1760 <0 0xec5a0000 0 0x100>, /* ADG */
1753 <0 0xec540000 0 1761 <0 0xec540000 0 0x1000>, /* SSIU */
1754 <0 0xec541000 0 1762 <0 0xec541000 0 0x280>, /* SSI */
1755 <0 0xec760000 0 1763 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1756 reg-names = "scu", "a 1764 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1757 1765
1758 clocks = <&cpg CPG_MO 1766 clocks = <&cpg CPG_MOD 1005>,
1759 <&cpg CPG_MO 1767 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1760 <&cpg CPG_MO 1768 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1761 <&cpg CPG_MO 1769 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1762 <&cpg CPG_MO 1770 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1763 <&cpg CPG_MO 1771 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1764 <&cpg CPG_MO 1772 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1765 <&cpg CPG_MO 1773 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1766 <&cpg CPG_MO 1774 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1767 <&cpg CPG_MO 1775 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1768 <&cpg CPG_MO 1776 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1769 <&cpg CPG_MO 1777 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1770 <&cpg CPG_MO 1778 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1771 <&cpg CPG_MO 1779 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1772 <&audio_clk_ 1780 <&audio_clk_a>, <&audio_clk_b>,
1773 <&audio_clk_ 1781 <&audio_clk_c>,
1774 <&cpg CPG_MO !! 1782 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1775 clock-names = "ssi-al 1783 clock-names = "ssi-all",
1776 "ssi.9" 1784 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1777 "ssi.5" 1785 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1778 "ssi.1" 1786 "ssi.1", "ssi.0",
1779 "src.9" 1787 "src.9", "src.8", "src.7", "src.6",
1780 "src.5" 1788 "src.5", "src.4", "src.3", "src.2",
1781 "src.1" 1789 "src.1", "src.0",
1782 "mix.1" 1790 "mix.1", "mix.0",
1783 "ctu.1" 1791 "ctu.1", "ctu.0",
1784 "dvc.0" 1792 "dvc.0", "dvc.1",
1785 "clk_a" 1793 "clk_a", "clk_b", "clk_c", "clk_i";
1786 power-domains = <&sys 1794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1787 resets = <&cpg 1005>, 1795 resets = <&cpg 1005>,
1788 <&cpg 1006>, 1796 <&cpg 1006>, <&cpg 1007>,
1789 <&cpg 1008>, 1797 <&cpg 1008>, <&cpg 1009>,
1790 <&cpg 1010>, 1798 <&cpg 1010>, <&cpg 1011>,
1791 <&cpg 1012>, 1799 <&cpg 1012>, <&cpg 1013>,
1792 <&cpg 1014>, 1800 <&cpg 1014>, <&cpg 1015>;
1793 reset-names = "ssi-al 1801 reset-names = "ssi-all",
1794 "ssi.9" 1802 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1795 "ssi.5" 1803 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1796 "ssi.1" 1804 "ssi.1", "ssi.0";
1797 status = "disabled"; 1805 status = "disabled";
1798 1806
1799 rcar_sound,dvc { 1807 rcar_sound,dvc {
1800 dvc0: dvc-0 { 1808 dvc0: dvc-0 {
1801 dmas 1809 dmas = <&audma1 0xbc>;
1802 dma-n 1810 dma-names = "tx";
1803 }; 1811 };
1804 dvc1: dvc-1 { 1812 dvc1: dvc-1 {
1805 dmas 1813 dmas = <&audma1 0xbe>;
1806 dma-n 1814 dma-names = "tx";
1807 }; 1815 };
1808 }; 1816 };
1809 1817
1810 rcar_sound,mix { 1818 rcar_sound,mix {
1811 mix0: mix-0 { 1819 mix0: mix-0 { };
1812 mix1: mix-1 { 1820 mix1: mix-1 { };
1813 }; 1821 };
1814 1822
1815 rcar_sound,ctu { 1823 rcar_sound,ctu {
1816 ctu00: ctu-0 1824 ctu00: ctu-0 { };
1817 ctu01: ctu-1 1825 ctu01: ctu-1 { };
1818 ctu02: ctu-2 1826 ctu02: ctu-2 { };
1819 ctu03: ctu-3 1827 ctu03: ctu-3 { };
1820 ctu10: ctu-4 1828 ctu10: ctu-4 { };
1821 ctu11: ctu-5 1829 ctu11: ctu-5 { };
1822 ctu12: ctu-6 1830 ctu12: ctu-6 { };
1823 ctu13: ctu-7 1831 ctu13: ctu-7 { };
1824 }; 1832 };
1825 1833
1826 rcar_sound,src { 1834 rcar_sound,src {
1827 src0: src-0 { 1835 src0: src-0 {
1828 inter 1836 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas 1837 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1830 dma-n 1838 dma-names = "rx", "tx";
1831 }; 1839 };
1832 src1: src-1 { 1840 src1: src-1 {
1833 inter 1841 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas 1842 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1835 dma-n 1843 dma-names = "rx", "tx";
1836 }; 1844 };
1837 src2: src-2 { 1845 src2: src-2 {
1838 inter 1846 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas 1847 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1840 dma-n 1848 dma-names = "rx", "tx";
1841 }; 1849 };
1842 src3: src-3 { 1850 src3: src-3 {
1843 inter 1851 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas 1852 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1845 dma-n 1853 dma-names = "rx", "tx";
1846 }; 1854 };
1847 src4: src-4 { 1855 src4: src-4 {
1848 inter 1856 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas 1857 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1850 dma-n 1858 dma-names = "rx", "tx";
1851 }; 1859 };
1852 src5: src-5 { 1860 src5: src-5 {
1853 inter 1861 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas 1862 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1855 dma-n 1863 dma-names = "rx", "tx";
1856 }; 1864 };
1857 src6: src-6 { 1865 src6: src-6 {
1858 inter 1866 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas 1867 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1860 dma-n 1868 dma-names = "rx", "tx";
1861 }; 1869 };
1862 src7: src-7 { 1870 src7: src-7 {
1863 inter 1871 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1864 dmas 1872 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1865 dma-n 1873 dma-names = "rx", "tx";
1866 }; 1874 };
1867 src8: src-8 { 1875 src8: src-8 {
1868 inter 1876 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1869 dmas 1877 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1870 dma-n 1878 dma-names = "rx", "tx";
1871 }; 1879 };
1872 src9: src-9 { 1880 src9: src-9 {
1873 inter 1881 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1874 dmas 1882 dmas = <&audma0 0x97>, <&audma1 0xba>;
1875 dma-n 1883 dma-names = "rx", "tx";
1876 }; 1884 };
1877 }; 1885 };
1878 1886
1879 rcar_sound,ssiu { 1887 rcar_sound,ssiu {
1880 ssiu00: ssiu- 1888 ssiu00: ssiu-0 {
1881 dmas 1889 dmas = <&audma0 0x15>, <&audma1 0x16>;
1882 dma-n 1890 dma-names = "rx", "tx";
1883 }; 1891 };
1884 ssiu01: ssiu- 1892 ssiu01: ssiu-1 {
1885 dmas 1893 dmas = <&audma0 0x35>, <&audma1 0x36>;
1886 dma-n 1894 dma-names = "rx", "tx";
1887 }; 1895 };
1888 ssiu02: ssiu- 1896 ssiu02: ssiu-2 {
1889 dmas 1897 dmas = <&audma0 0x37>, <&audma1 0x38>;
1890 dma-n 1898 dma-names = "rx", "tx";
1891 }; 1899 };
1892 ssiu03: ssiu- 1900 ssiu03: ssiu-3 {
1893 dmas 1901 dmas = <&audma0 0x47>, <&audma1 0x48>;
1894 dma-n 1902 dma-names = "rx", "tx";
1895 }; 1903 };
1896 ssiu04: ssiu- 1904 ssiu04: ssiu-4 {
1897 dmas 1905 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1898 dma-n 1906 dma-names = "rx", "tx";
1899 }; 1907 };
1900 ssiu05: ssiu- 1908 ssiu05: ssiu-5 {
1901 dmas 1909 dmas = <&audma0 0x43>, <&audma1 0x44>;
1902 dma-n 1910 dma-names = "rx", "tx";
1903 }; 1911 };
1904 ssiu06: ssiu- 1912 ssiu06: ssiu-6 {
1905 dmas 1913 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1906 dma-n 1914 dma-names = "rx", "tx";
1907 }; 1915 };
1908 ssiu07: ssiu- 1916 ssiu07: ssiu-7 {
1909 dmas 1917 dmas = <&audma0 0x53>, <&audma1 0x54>;
1910 dma-n 1918 dma-names = "rx", "tx";
1911 }; 1919 };
1912 ssiu10: ssiu- 1920 ssiu10: ssiu-8 {
1913 dmas 1921 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1914 dma-n 1922 dma-names = "rx", "tx";
1915 }; 1923 };
1916 ssiu11: ssiu- 1924 ssiu11: ssiu-9 {
1917 dmas 1925 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1918 dma-n 1926 dma-names = "rx", "tx";
1919 }; 1927 };
1920 ssiu12: ssiu- 1928 ssiu12: ssiu-10 {
1921 dmas 1929 dmas = <&audma0 0x57>, <&audma1 0x58>;
1922 dma-n 1930 dma-names = "rx", "tx";
1923 }; 1931 };
1924 ssiu13: ssiu- 1932 ssiu13: ssiu-11 {
1925 dmas 1933 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1926 dma-n 1934 dma-names = "rx", "tx";
1927 }; 1935 };
1928 ssiu14: ssiu- 1936 ssiu14: ssiu-12 {
1929 dmas 1937 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1930 dma-n 1938 dma-names = "rx", "tx";
1931 }; 1939 };
1932 ssiu15: ssiu- 1940 ssiu15: ssiu-13 {
1933 dmas 1941 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1934 dma-n 1942 dma-names = "rx", "tx";
1935 }; 1943 };
1936 ssiu16: ssiu- 1944 ssiu16: ssiu-14 {
1937 dmas 1945 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1938 dma-n 1946 dma-names = "rx", "tx";
1939 }; 1947 };
1940 ssiu17: ssiu- 1948 ssiu17: ssiu-15 {
1941 dmas 1949 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1942 dma-n 1950 dma-names = "rx", "tx";
1943 }; 1951 };
1944 ssiu20: ssiu- 1952 ssiu20: ssiu-16 {
1945 dmas 1953 dmas = <&audma0 0x63>, <&audma1 0x64>;
1946 dma-n 1954 dma-names = "rx", "tx";
1947 }; 1955 };
1948 ssiu21: ssiu- 1956 ssiu21: ssiu-17 {
1949 dmas 1957 dmas = <&audma0 0x67>, <&audma1 0x68>;
1950 dma-n 1958 dma-names = "rx", "tx";
1951 }; 1959 };
1952 ssiu22: ssiu- 1960 ssiu22: ssiu-18 {
1953 dmas 1961 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1954 dma-n 1962 dma-names = "rx", "tx";
1955 }; 1963 };
1956 ssiu23: ssiu- 1964 ssiu23: ssiu-19 {
1957 dmas 1965 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1958 dma-n 1966 dma-names = "rx", "tx";
1959 }; 1967 };
1960 ssiu24: ssiu- 1968 ssiu24: ssiu-20 {
1961 dmas 1969 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1962 dma-n 1970 dma-names = "rx", "tx";
1963 }; 1971 };
1964 ssiu25: ssiu- 1972 ssiu25: ssiu-21 {
1965 dmas 1973 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1966 dma-n 1974 dma-names = "rx", "tx";
1967 }; 1975 };
1968 ssiu26: ssiu- 1976 ssiu26: ssiu-22 {
1969 dmas 1977 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1970 dma-n 1978 dma-names = "rx", "tx";
1971 }; 1979 };
1972 ssiu27: ssiu- 1980 ssiu27: ssiu-23 {
1973 dmas 1981 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1974 dma-n 1982 dma-names = "rx", "tx";
1975 }; 1983 };
1976 ssiu30: ssiu- 1984 ssiu30: ssiu-24 {
1977 dmas 1985 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1978 dma-n 1986 dma-names = "rx", "tx";
1979 }; 1987 };
1980 ssiu31: ssiu- 1988 ssiu31: ssiu-25 {
1981 dmas 1989 dmas = <&audma0 0x21>, <&audma1 0x22>;
1982 dma-n 1990 dma-names = "rx", "tx";
1983 }; 1991 };
1984 ssiu32: ssiu- 1992 ssiu32: ssiu-26 {
1985 dmas 1993 dmas = <&audma0 0x23>, <&audma1 0x24>;
1986 dma-n 1994 dma-names = "rx", "tx";
1987 }; 1995 };
1988 ssiu33: ssiu- 1996 ssiu33: ssiu-27 {
1989 dmas 1997 dmas = <&audma0 0x25>, <&audma1 0x26>;
1990 dma-n 1998 dma-names = "rx", "tx";
1991 }; 1999 };
1992 ssiu34: ssiu- 2000 ssiu34: ssiu-28 {
1993 dmas 2001 dmas = <&audma0 0x27>, <&audma1 0x28>;
1994 dma-n 2002 dma-names = "rx", "tx";
1995 }; 2003 };
1996 ssiu35: ssiu- 2004 ssiu35: ssiu-29 {
1997 dmas 2005 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1998 dma-n 2006 dma-names = "rx", "tx";
1999 }; 2007 };
2000 ssiu36: ssiu- 2008 ssiu36: ssiu-30 {
2001 dmas 2009 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2002 dma-n 2010 dma-names = "rx", "tx";
2003 }; 2011 };
2004 ssiu37: ssiu- 2012 ssiu37: ssiu-31 {
2005 dmas 2013 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2006 dma-n 2014 dma-names = "rx", "tx";
2007 }; 2015 };
2008 ssiu40: ssiu- 2016 ssiu40: ssiu-32 {
2009 dmas 2017 dmas = <&audma0 0x71>, <&audma1 0x72>;
2010 dma-n 2018 dma-names = "rx", "tx";
2011 }; 2019 };
2012 ssiu41: ssiu- 2020 ssiu41: ssiu-33 {
2013 dmas 2021 dmas = <&audma0 0x17>, <&audma1 0x18>;
2014 dma-n 2022 dma-names = "rx", "tx";
2015 }; 2023 };
2016 ssiu42: ssiu- 2024 ssiu42: ssiu-34 {
2017 dmas 2025 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2018 dma-n 2026 dma-names = "rx", "tx";
2019 }; 2027 };
2020 ssiu43: ssiu- 2028 ssiu43: ssiu-35 {
2021 dmas 2029 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2022 dma-n 2030 dma-names = "rx", "tx";
2023 }; 2031 };
2024 ssiu44: ssiu- 2032 ssiu44: ssiu-36 {
2025 dmas 2033 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2026 dma-n 2034 dma-names = "rx", "tx";
2027 }; 2035 };
2028 ssiu45: ssiu- 2036 ssiu45: ssiu-37 {
2029 dmas 2037 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2030 dma-n 2038 dma-names = "rx", "tx";
2031 }; 2039 };
2032 ssiu46: ssiu- 2040 ssiu46: ssiu-38 {
2033 dmas 2041 dmas = <&audma0 0x31>, <&audma1 0x32>;
2034 dma-n 2042 dma-names = "rx", "tx";
2035 }; 2043 };
2036 ssiu47: ssiu- 2044 ssiu47: ssiu-39 {
2037 dmas 2045 dmas = <&audma0 0x33>, <&audma1 0x34>;
2038 dma-n 2046 dma-names = "rx", "tx";
2039 }; 2047 };
2040 ssiu50: ssiu- 2048 ssiu50: ssiu-40 {
2041 dmas 2049 dmas = <&audma0 0x73>, <&audma1 0x74>;
2042 dma-n 2050 dma-names = "rx", "tx";
2043 }; 2051 };
2044 ssiu60: ssiu- 2052 ssiu60: ssiu-41 {
2045 dmas 2053 dmas = <&audma0 0x75>, <&audma1 0x76>;
2046 dma-n 2054 dma-names = "rx", "tx";
2047 }; 2055 };
2048 ssiu70: ssiu- 2056 ssiu70: ssiu-42 {
2049 dmas 2057 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2050 dma-n 2058 dma-names = "rx", "tx";
2051 }; 2059 };
2052 ssiu80: ssiu- 2060 ssiu80: ssiu-43 {
2053 dmas 2061 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2054 dma-n 2062 dma-names = "rx", "tx";
2055 }; 2063 };
2056 ssiu90: ssiu- 2064 ssiu90: ssiu-44 {
2057 dmas 2065 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2058 dma-n 2066 dma-names = "rx", "tx";
2059 }; 2067 };
2060 ssiu91: ssiu- 2068 ssiu91: ssiu-45 {
2061 dmas 2069 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2062 dma-n 2070 dma-names = "rx", "tx";
2063 }; 2071 };
2064 ssiu92: ssiu- 2072 ssiu92: ssiu-46 {
2065 dmas 2073 dmas = <&audma0 0x81>, <&audma1 0x82>;
2066 dma-n 2074 dma-names = "rx", "tx";
2067 }; 2075 };
2068 ssiu93: ssiu- 2076 ssiu93: ssiu-47 {
2069 dmas 2077 dmas = <&audma0 0x83>, <&audma1 0x84>;
2070 dma-n 2078 dma-names = "rx", "tx";
2071 }; 2079 };
2072 ssiu94: ssiu- 2080 ssiu94: ssiu-48 {
2073 dmas 2081 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2074 dma-n 2082 dma-names = "rx", "tx";
2075 }; 2083 };
2076 ssiu95: ssiu- 2084 ssiu95: ssiu-49 {
2077 dmas 2085 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2078 dma-n 2086 dma-names = "rx", "tx";
2079 }; 2087 };
2080 ssiu96: ssiu- 2088 ssiu96: ssiu-50 {
2081 dmas 2089 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2082 dma-n 2090 dma-names = "rx", "tx";
2083 }; 2091 };
2084 ssiu97: ssiu- 2092 ssiu97: ssiu-51 {
2085 dmas 2093 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2086 dma-n 2094 dma-names = "rx", "tx";
2087 }; 2095 };
2088 }; 2096 };
2089 2097
2090 rcar_sound,ssi { 2098 rcar_sound,ssi {
2091 ssi0: ssi-0 { 2099 ssi0: ssi-0 {
2092 inter 2100 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2093 dmas 2101 dmas = <&audma0 0x01>, <&audma1 0x02>;
2094 dma-n 2102 dma-names = "rx", "tx";
2095 }; 2103 };
2096 ssi1: ssi-1 { 2104 ssi1: ssi-1 {
2097 inter 2105 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2098 dmas 2106 dmas = <&audma0 0x03>, <&audma1 0x04>;
2099 dma-n 2107 dma-names = "rx", "tx";
2100 }; 2108 };
2101 ssi2: ssi-2 { 2109 ssi2: ssi-2 {
2102 inter 2110 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2103 dmas 2111 dmas = <&audma0 0x05>, <&audma1 0x06>;
2104 dma-n 2112 dma-names = "rx", "tx";
2105 }; 2113 };
2106 ssi3: ssi-3 { 2114 ssi3: ssi-3 {
2107 inter 2115 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2108 dmas 2116 dmas = <&audma0 0x07>, <&audma1 0x08>;
2109 dma-n 2117 dma-names = "rx", "tx";
2110 }; 2118 };
2111 ssi4: ssi-4 { 2119 ssi4: ssi-4 {
2112 inter 2120 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2113 dmas 2121 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2114 dma-n 2122 dma-names = "rx", "tx";
2115 }; 2123 };
2116 ssi5: ssi-5 { 2124 ssi5: ssi-5 {
2117 inter 2125 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2118 dmas 2126 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2119 dma-n 2127 dma-names = "rx", "tx";
2120 }; 2128 };
2121 ssi6: ssi-6 { 2129 ssi6: ssi-6 {
2122 inter 2130 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2123 dmas 2131 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2124 dma-n 2132 dma-names = "rx", "tx";
2125 }; 2133 };
2126 ssi7: ssi-7 { 2134 ssi7: ssi-7 {
2127 inter 2135 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2128 dmas 2136 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2129 dma-n 2137 dma-names = "rx", "tx";
2130 }; 2138 };
2131 ssi8: ssi-8 { 2139 ssi8: ssi-8 {
2132 inter 2140 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2133 dmas 2141 dmas = <&audma0 0x11>, <&audma1 0x12>;
2134 dma-n 2142 dma-names = "rx", "tx";
2135 }; 2143 };
2136 ssi9: ssi-9 { 2144 ssi9: ssi-9 {
2137 inter 2145 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2138 dmas 2146 dmas = <&audma0 0x13>, <&audma1 0x14>;
2139 dma-n 2147 dma-names = "rx", "tx";
2140 }; 2148 };
2141 }; 2149 };
2142 }; 2150 };
2143 2151
2144 mlp: mlp@ec520000 { 2152 mlp: mlp@ec520000 {
2145 compatible = "renesas 2153 compatible = "renesas,r8a77965-mlp",
2146 "renesas 2154 "renesas,rcar-gen3-mlp";
2147 reg = <0 0xec520000 0 2155 reg = <0 0xec520000 0 0x800>;
2148 interrupts = <GIC_SPI 2156 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2149 <GIC_SPI 385 2157 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2150 clocks = <&cpg CPG_MO 2158 clocks = <&cpg CPG_MOD 802>;
2151 power-domains = <&sys 2159 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2152 resets = <&cpg 802>; 2160 resets = <&cpg 802>;
2153 status = "disabled"; 2161 status = "disabled";
2154 }; 2162 };
2155 2163
2156 audma0: dma-controller@ec7000 2164 audma0: dma-controller@ec700000 {
2157 compatible = "renesas 2165 compatible = "renesas,dmac-r8a77965",
2158 "renesas 2166 "renesas,rcar-dmac";
2159 reg = <0 0xec700000 0 2167 reg = <0 0xec700000 0 0x10000>;
2160 interrupts = <GIC_SPI 2168 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2161 <GIC_SPI 2169 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2162 <GIC_SPI 2170 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2163 <GIC_SPI 2171 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2164 <GIC_SPI 2172 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2165 <GIC_SPI 2173 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2166 <GIC_SPI 2174 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2167 <GIC_SPI 2175 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2168 <GIC_SPI 2176 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2169 <GIC_SPI 2177 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2170 <GIC_SPI 2178 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2171 <GIC_SPI 2179 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2172 <GIC_SPI 2180 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2173 <GIC_SPI 2181 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2174 <GIC_SPI 2182 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2175 <GIC_SPI 2183 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2176 <GIC_SPI 2184 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2177 interrupt-names = "er 2185 interrupt-names = "error",
2178 "ch0" 2186 "ch0", "ch1", "ch2", "ch3",
2179 "ch4" 2187 "ch4", "ch5", "ch6", "ch7",
2180 "ch8" 2188 "ch8", "ch9", "ch10", "ch11",
2181 "ch12 2189 "ch12", "ch13", "ch14", "ch15";
2182 clocks = <&cpg CPG_MO 2190 clocks = <&cpg CPG_MOD 502>;
2183 clock-names = "fck"; 2191 clock-names = "fck";
2184 power-domains = <&sys 2192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2185 resets = <&cpg 502>; 2193 resets = <&cpg 502>;
2186 #dma-cells = <1>; 2194 #dma-cells = <1>;
2187 dma-channels = <16>; 2195 dma-channels = <16>;
2188 iommus = <&ipmmu_mp 0 <<
2189 <&ipmmu_mp 2 <<
2190 <&ipmmu_mp 4 <<
2191 <&ipmmu_mp 6 <<
2192 <&ipmmu_mp 8 <<
2193 <&ipmmu_mp 1 <<
2194 <&ipmmu_mp 1 <<
2195 <&ipmmu_mp 1 <<
2196 }; 2196 };
2197 2197
2198 audma1: dma-controller@ec7200 2198 audma1: dma-controller@ec720000 {
2199 compatible = "renesas 2199 compatible = "renesas,dmac-r8a77965",
2200 "renesas 2200 "renesas,rcar-dmac";
2201 reg = <0 0xec720000 0 2201 reg = <0 0xec720000 0 0x10000>;
2202 interrupts = <GIC_SPI 2202 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 2203 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2204 <GIC_SPI 2204 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2205 <GIC_SPI 2205 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2206 <GIC_SPI 2206 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2207 <GIC_SPI 2207 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2208 <GIC_SPI 2208 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2209 <GIC_SPI 2209 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2210 <GIC_SPI 2210 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2211 <GIC_SPI 2211 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2212 <GIC_SPI 2212 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2213 <GIC_SPI 2213 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2214 <GIC_SPI 2214 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2215 <GIC_SPI 2215 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2216 <GIC_SPI 2216 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2217 <GIC_SPI 2217 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2218 <GIC_SPI 2218 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2219 interrupt-names = "er 2219 interrupt-names = "error",
2220 "ch0" 2220 "ch0", "ch1", "ch2", "ch3",
2221 "ch4" 2221 "ch4", "ch5", "ch6", "ch7",
2222 "ch8" 2222 "ch8", "ch9", "ch10", "ch11",
2223 "ch12 2223 "ch12", "ch13", "ch14", "ch15";
2224 clocks = <&cpg CPG_MO 2224 clocks = <&cpg CPG_MOD 501>;
2225 clock-names = "fck"; 2225 clock-names = "fck";
2226 power-domains = <&sys 2226 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2227 resets = <&cpg 501>; 2227 resets = <&cpg 501>;
2228 #dma-cells = <1>; 2228 #dma-cells = <1>;
2229 dma-channels = <16>; 2229 dma-channels = <16>;
2230 iommus = <&ipmmu_mp 1 <<
2231 <&ipmmu_mp 1 <<
2232 <&ipmmu_mp 2 <<
2233 <&ipmmu_mp 2 <<
2234 <&ipmmu_mp 2 <<
2235 <&ipmmu_mp 2 <<
2236 <&ipmmu_mp 2 <<
2237 <&ipmmu_mp 3 <<
2238 }; 2230 };
2239 2231
2240 xhci0: usb@ee000000 { 2232 xhci0: usb@ee000000 {
2241 compatible = "renesas 2233 compatible = "renesas,xhci-r8a77965",
2242 "renesas 2234 "renesas,rcar-gen3-xhci";
2243 reg = <0 0xee000000 0 2235 reg = <0 0xee000000 0 0xc00>;
2244 interrupts = <GIC_SPI 2236 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2245 clocks = <&cpg CPG_MO 2237 clocks = <&cpg CPG_MOD 328>;
2246 power-domains = <&sys 2238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2247 resets = <&cpg 328>; 2239 resets = <&cpg 328>;
2248 status = "disabled"; 2240 status = "disabled";
2249 }; 2241 };
2250 2242
2251 usb3_peri0: usb@ee020000 { 2243 usb3_peri0: usb@ee020000 {
2252 compatible = "renesas 2244 compatible = "renesas,r8a77965-usb3-peri",
2253 "renesas 2245 "renesas,rcar-gen3-usb3-peri";
2254 reg = <0 0xee020000 0 2246 reg = <0 0xee020000 0 0x400>;
2255 interrupts = <GIC_SPI 2247 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2256 clocks = <&cpg CPG_MO 2248 clocks = <&cpg CPG_MOD 328>;
2257 power-domains = <&sys 2249 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2258 resets = <&cpg 328>; 2250 resets = <&cpg 328>;
2259 status = "disabled"; 2251 status = "disabled";
2260 }; 2252 };
2261 2253
2262 ohci0: usb@ee080000 { 2254 ohci0: usb@ee080000 {
2263 compatible = "generic 2255 compatible = "generic-ohci";
2264 reg = <0 0xee080000 0 2256 reg = <0 0xee080000 0 0x100>;
2265 interrupts = <GIC_SPI 2257 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2266 clocks = <&cpg CPG_MO 2258 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2267 phys = <&usb2_phy0 1> 2259 phys = <&usb2_phy0 1>;
2268 phy-names = "usb"; 2260 phy-names = "usb";
2269 power-domains = <&sys 2261 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2270 resets = <&cpg 703>, 2262 resets = <&cpg 703>, <&cpg 704>;
2271 status = "disabled"; 2263 status = "disabled";
2272 }; 2264 };
2273 2265
2274 ohci1: usb@ee0a0000 { 2266 ohci1: usb@ee0a0000 {
2275 compatible = "generic 2267 compatible = "generic-ohci";
2276 reg = <0 0xee0a0000 0 2268 reg = <0 0xee0a0000 0 0x100>;
2277 interrupts = <GIC_SPI 2269 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2278 clocks = <&cpg CPG_MO 2270 clocks = <&cpg CPG_MOD 702>;
2279 phys = <&usb2_phy1 1> 2271 phys = <&usb2_phy1 1>;
2280 phy-names = "usb"; 2272 phy-names = "usb";
2281 power-domains = <&sys 2273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2282 resets = <&cpg 702>; 2274 resets = <&cpg 702>;
2283 status = "disabled"; 2275 status = "disabled";
2284 }; 2276 };
2285 2277
2286 ehci0: usb@ee080100 { 2278 ehci0: usb@ee080100 {
2287 compatible = "generic 2279 compatible = "generic-ehci";
2288 reg = <0 0xee080100 0 2280 reg = <0 0xee080100 0 0x100>;
2289 interrupts = <GIC_SPI 2281 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2290 clocks = <&cpg CPG_MO 2282 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2291 phys = <&usb2_phy0 2> 2283 phys = <&usb2_phy0 2>;
2292 phy-names = "usb"; 2284 phy-names = "usb";
2293 companion = <&ohci0>; 2285 companion = <&ohci0>;
2294 power-domains = <&sys 2286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2295 resets = <&cpg 703>, 2287 resets = <&cpg 703>, <&cpg 704>;
2296 status = "disabled"; 2288 status = "disabled";
2297 }; 2289 };
2298 2290
2299 ehci1: usb@ee0a0100 { 2291 ehci1: usb@ee0a0100 {
2300 compatible = "generic 2292 compatible = "generic-ehci";
2301 reg = <0 0xee0a0100 0 2293 reg = <0 0xee0a0100 0 0x100>;
2302 interrupts = <GIC_SPI 2294 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2303 clocks = <&cpg CPG_MO 2295 clocks = <&cpg CPG_MOD 702>;
2304 phys = <&usb2_phy1 2> 2296 phys = <&usb2_phy1 2>;
2305 phy-names = "usb"; 2297 phy-names = "usb";
2306 companion = <&ohci1>; 2298 companion = <&ohci1>;
2307 power-domains = <&sys 2299 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2308 resets = <&cpg 702>; 2300 resets = <&cpg 702>;
2309 status = "disabled"; 2301 status = "disabled";
2310 }; 2302 };
2311 2303
2312 usb2_phy0: usb-phy@ee080200 { 2304 usb2_phy0: usb-phy@ee080200 {
2313 compatible = "renesas 2305 compatible = "renesas,usb2-phy-r8a77965",
2314 "renesas 2306 "renesas,rcar-gen3-usb2-phy";
2315 reg = <0 0xee080200 0 2307 reg = <0 0xee080200 0 0x700>;
2316 interrupts = <GIC_SPI 2308 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MO 2309 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2318 power-domains = <&sys 2310 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2319 resets = <&cpg 703>, 2311 resets = <&cpg 703>, <&cpg 704>;
2320 #phy-cells = <1>; 2312 #phy-cells = <1>;
2321 status = "disabled"; 2313 status = "disabled";
2322 }; 2314 };
2323 2315
2324 usb2_phy1: usb-phy@ee0a0200 { 2316 usb2_phy1: usb-phy@ee0a0200 {
2325 compatible = "renesas 2317 compatible = "renesas,usb2-phy-r8a77965",
2326 "renesas 2318 "renesas,rcar-gen3-usb2-phy";
2327 reg = <0 0xee0a0200 0 2319 reg = <0 0xee0a0200 0 0x700>;
2328 clocks = <&cpg CPG_MO 2320 clocks = <&cpg CPG_MOD 702>;
2329 power-domains = <&sys 2321 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2330 resets = <&cpg 702>; 2322 resets = <&cpg 702>;
2331 #phy-cells = <1>; 2323 #phy-cells = <1>;
2332 status = "disabled"; 2324 status = "disabled";
2333 }; 2325 };
2334 2326
2335 sdhi0: mmc@ee100000 { 2327 sdhi0: mmc@ee100000 {
2336 compatible = "renesas 2328 compatible = "renesas,sdhi-r8a77965",
2337 "renesas 2329 "renesas,rcar-gen3-sdhi";
2338 reg = <0 0xee100000 0 2330 reg = <0 0xee100000 0 0x2000>;
2339 interrupts = <GIC_SPI 2331 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2340 clocks = <&cpg CPG_MO 2332 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>;
2341 clock-names = "core", 2333 clock-names = "core", "clkh";
2342 max-frequency = <2000 2334 max-frequency = <200000000>;
2343 power-domains = <&sys 2335 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2344 resets = <&cpg 314>; 2336 resets = <&cpg 314>;
2345 iommus = <&ipmmu_ds1 2337 iommus = <&ipmmu_ds1 32>;
2346 status = "disabled"; 2338 status = "disabled";
2347 }; 2339 };
2348 2340
2349 sdhi1: mmc@ee120000 { 2341 sdhi1: mmc@ee120000 {
2350 compatible = "renesas 2342 compatible = "renesas,sdhi-r8a77965",
2351 "renesas 2343 "renesas,rcar-gen3-sdhi";
2352 reg = <0 0xee120000 0 2344 reg = <0 0xee120000 0 0x2000>;
2353 interrupts = <GIC_SPI 2345 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MO 2346 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>;
2355 clock-names = "core", 2347 clock-names = "core", "clkh";
2356 max-frequency = <2000 2348 max-frequency = <200000000>;
2357 power-domains = <&sys 2349 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2358 resets = <&cpg 313>; 2350 resets = <&cpg 313>;
2359 iommus = <&ipmmu_ds1 2351 iommus = <&ipmmu_ds1 33>;
2360 status = "disabled"; 2352 status = "disabled";
2361 }; 2353 };
2362 2354
2363 sdhi2: mmc@ee140000 { 2355 sdhi2: mmc@ee140000 {
2364 compatible = "renesas 2356 compatible = "renesas,sdhi-r8a77965",
2365 "renesas 2357 "renesas,rcar-gen3-sdhi";
2366 reg = <0 0xee140000 0 2358 reg = <0 0xee140000 0 0x2000>;
2367 interrupts = <GIC_SPI 2359 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2368 clocks = <&cpg CPG_MO 2360 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>;
2369 clock-names = "core", 2361 clock-names = "core", "clkh";
2370 max-frequency = <2000 2362 max-frequency = <200000000>;
2371 power-domains = <&sys 2363 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2372 resets = <&cpg 312>; 2364 resets = <&cpg 312>;
2373 iommus = <&ipmmu_ds1 2365 iommus = <&ipmmu_ds1 34>;
2374 status = "disabled"; 2366 status = "disabled";
2375 }; 2367 };
2376 2368
2377 sdhi3: mmc@ee160000 { 2369 sdhi3: mmc@ee160000 {
2378 compatible = "renesas 2370 compatible = "renesas,sdhi-r8a77965",
2379 "renesas 2371 "renesas,rcar-gen3-sdhi";
2380 reg = <0 0xee160000 0 2372 reg = <0 0xee160000 0 0x2000>;
2381 interrupts = <GIC_SPI 2373 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2382 clocks = <&cpg CPG_MO 2374 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>;
2383 clock-names = "core", 2375 clock-names = "core", "clkh";
2384 max-frequency = <2000 2376 max-frequency = <200000000>;
2385 power-domains = <&sys 2377 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2386 resets = <&cpg 311>; 2378 resets = <&cpg 311>;
2387 iommus = <&ipmmu_ds1 2379 iommus = <&ipmmu_ds1 35>;
2388 status = "disabled"; 2380 status = "disabled";
2389 }; 2381 };
2390 2382
2391 rpc: spi@ee200000 { 2383 rpc: spi@ee200000 {
2392 compatible = "renesas 2384 compatible = "renesas,r8a77965-rpc-if",
2393 "renesas 2385 "renesas,rcar-gen3-rpc-if";
2394 reg = <0 0xee200000 0 2386 reg = <0 0xee200000 0 0x200>,
2395 <0 0x08000000 0 2387 <0 0x08000000 0 0x04000000>,
2396 <0 0xee208000 0 2388 <0 0xee208000 0 0x100>;
2397 reg-names = "regs", " 2389 reg-names = "regs", "dirmap", "wbuf";
2398 interrupts = <GIC_SPI 2390 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2399 clocks = <&cpg CPG_MO 2391 clocks = <&cpg CPG_MOD 917>;
2400 power-domains = <&sys 2392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2401 resets = <&cpg 917>; 2393 resets = <&cpg 917>;
2402 #address-cells = <1>; 2394 #address-cells = <1>;
2403 #size-cells = <0>; 2395 #size-cells = <0>;
2404 status = "disabled"; 2396 status = "disabled";
2405 }; 2397 };
2406 2398
2407 sata: sata@ee300000 { 2399 sata: sata@ee300000 {
2408 compatible = "renesas 2400 compatible = "renesas,sata-r8a77965",
2409 "renesas 2401 "renesas,rcar-gen3-sata";
2410 reg = <0 0xee300000 0 2402 reg = <0 0xee300000 0 0x200000>;
2411 interrupts = <GIC_SPI 2403 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2412 clocks = <&cpg CPG_MO 2404 clocks = <&cpg CPG_MOD 815>;
2413 power-domains = <&sys 2405 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2414 resets = <&cpg 815>; 2406 resets = <&cpg 815>;
2415 iommus = <&ipmmu_hc 2 <<
2416 status = "disabled"; 2407 status = "disabled";
2417 }; 2408 };
2418 2409
2419 gic: interrupt-controller@f10 2410 gic: interrupt-controller@f1010000 {
2420 compatible = "arm,gic 2411 compatible = "arm,gic-400";
2421 #interrupt-cells = <3 2412 #interrupt-cells = <3>;
2422 #address-cells = <0>; 2413 #address-cells = <0>;
2423 interrupt-controller; 2414 interrupt-controller;
2424 reg = <0x0 0xf1010000 2415 reg = <0x0 0xf1010000 0 0x1000>,
2425 <0x0 0xf1020000 2416 <0x0 0xf1020000 0 0x20000>,
2426 <0x0 0xf1040000 2417 <0x0 0xf1040000 0 0x20000>,
2427 <0x0 0xf1060000 2418 <0x0 0xf1060000 0 0x20000>;
2428 interrupts = <GIC_PPI 2419 interrupts = <GIC_PPI 9
2429 (GIC_ 2420 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2430 clocks = <&cpg CPG_MO 2421 clocks = <&cpg CPG_MOD 408>;
2431 clock-names = "clk"; 2422 clock-names = "clk";
2432 power-domains = <&sys 2423 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2433 resets = <&cpg 408>; 2424 resets = <&cpg 408>;
2434 }; 2425 };
2435 2426
2436 pciec0: pcie@fe000000 { 2427 pciec0: pcie@fe000000 {
2437 compatible = "renesas 2428 compatible = "renesas,pcie-r8a77965",
2438 "renesas 2429 "renesas,pcie-rcar-gen3";
2439 reg = <0 0xfe000000 0 2430 reg = <0 0xfe000000 0 0x80000>;
2440 #address-cells = <3>; 2431 #address-cells = <3>;
2441 #size-cells = <2>; 2432 #size-cells = <2>;
2442 bus-range = <0x00 0xf 2433 bus-range = <0x00 0xff>;
2443 device_type = "pci"; 2434 device_type = "pci";
2444 ranges = <0x01000000 2435 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2445 <0x02000000 2436 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2446 <0x02000000 2437 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2447 <0x42000000 2438 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2448 /* Map all possible D !! 2439 /* Map all possible DDR as inbound ranges */
2449 dma-ranges = <0x42000 !! 2440 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2450 interrupts = <GIC_SPI 2441 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 117 2442 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2452 <GIC_SPI 118 2443 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2453 #interrupt-cells = <1 2444 #interrupt-cells = <1>;
2454 interrupt-map-mask = 2445 interrupt-map-mask = <0 0 0 0>;
2455 interrupt-map = <0 0 2446 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2456 clocks = <&cpg CPG_MO 2447 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2457 clock-names = "pcie", 2448 clock-names = "pcie", "pcie_bus";
2458 power-domains = <&sys 2449 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2459 resets = <&cpg 319>; 2450 resets = <&cpg 319>;
2460 iommu-map = <0 &ipmmu <<
2461 iommu-map-mask = <0>; <<
2462 status = "disabled"; 2451 status = "disabled";
2463 }; 2452 };
2464 2453
2465 pciec1: pcie@ee800000 { 2454 pciec1: pcie@ee800000 {
2466 compatible = "renesas 2455 compatible = "renesas,pcie-r8a77965",
2467 "renesas 2456 "renesas,pcie-rcar-gen3";
2468 reg = <0 0xee800000 0 2457 reg = <0 0xee800000 0 0x80000>;
2469 #address-cells = <3>; 2458 #address-cells = <3>;
2470 #size-cells = <2>; 2459 #size-cells = <2>;
2471 bus-range = <0x00 0xf 2460 bus-range = <0x00 0xff>;
2472 device_type = "pci"; 2461 device_type = "pci";
2473 ranges = <0x01000000 2462 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2474 <0x02000000 2463 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2475 <0x02000000 2464 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2476 <0x42000000 2465 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2477 /* Map all possible D !! 2466 /* Map all possible DDR as inbound ranges */
2478 dma-ranges = <0x42000 !! 2467 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2479 interrupts = <GIC_SPI 2468 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2480 <GIC_SPI 149 2469 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 150 2470 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2482 #interrupt-cells = <1 2471 #interrupt-cells = <1>;
2483 interrupt-map-mask = 2472 interrupt-map-mask = <0 0 0 0>;
2484 interrupt-map = <0 0 2473 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MO 2474 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2486 clock-names = "pcie", 2475 clock-names = "pcie", "pcie_bus";
2487 power-domains = <&sys 2476 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2488 resets = <&cpg 318>; 2477 resets = <&cpg 318>;
2489 iommu-map = <0 &ipmmu <<
2490 iommu-map-mask = <0>; <<
2491 status = "disabled"; 2478 status = "disabled";
2492 }; 2479 };
2493 2480
2494 fdp1@fe940000 { 2481 fdp1@fe940000 {
2495 compatible = "renesas 2482 compatible = "renesas,fdp1";
2496 reg = <0 0xfe940000 0 2483 reg = <0 0xfe940000 0 0x2400>;
2497 interrupts = <GIC_SPI 2484 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2498 clocks = <&cpg CPG_MO 2485 clocks = <&cpg CPG_MOD 119>;
2499 power-domains = <&sys 2486 power-domains = <&sysc R8A77965_PD_A3VP>;
2500 resets = <&cpg 119>; 2487 resets = <&cpg 119>;
2501 renesas,fcp = <&fcpf0 2488 renesas,fcp = <&fcpf0>;
2502 }; 2489 };
2503 2490
2504 fcpf0: fcp@fe950000 { 2491 fcpf0: fcp@fe950000 {
2505 compatible = "renesas 2492 compatible = "renesas,fcpf";
2506 reg = <0 0xfe950000 0 2493 reg = <0 0xfe950000 0 0x200>;
2507 clocks = <&cpg CPG_MO 2494 clocks = <&cpg CPG_MOD 615>;
2508 power-domains = <&sys 2495 power-domains = <&sysc R8A77965_PD_A3VP>;
2509 resets = <&cpg 615>; 2496 resets = <&cpg 615>;
2510 iommus = <&ipmmu_vp0 <<
2511 }; 2497 };
2512 2498
2513 vspb: vsp@fe960000 { 2499 vspb: vsp@fe960000 {
2514 compatible = "renesas 2500 compatible = "renesas,vsp2";
2515 reg = <0 0xfe960000 0 2501 reg = <0 0xfe960000 0 0x8000>;
2516 interrupts = <GIC_SPI 2502 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2517 clocks = <&cpg CPG_MO 2503 clocks = <&cpg CPG_MOD 626>;
2518 power-domains = <&sys 2504 power-domains = <&sysc R8A77965_PD_A3VP>;
2519 resets = <&cpg 626>; 2505 resets = <&cpg 626>;
2520 2506
2521 renesas,fcp = <&fcpvb 2507 renesas,fcp = <&fcpvb0>;
2522 }; 2508 };
2523 2509
2524 vspi0: vsp@fe9a0000 { 2510 vspi0: vsp@fe9a0000 {
2525 compatible = "renesas 2511 compatible = "renesas,vsp2";
2526 reg = <0 0xfe9a0000 0 2512 reg = <0 0xfe9a0000 0 0x8000>;
2527 interrupts = <GIC_SPI 2513 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2528 clocks = <&cpg CPG_MO 2514 clocks = <&cpg CPG_MOD 631>;
2529 power-domains = <&sys 2515 power-domains = <&sysc R8A77965_PD_A3VP>;
2530 resets = <&cpg 631>; 2516 resets = <&cpg 631>;
2531 2517
2532 renesas,fcp = <&fcpvi 2518 renesas,fcp = <&fcpvi0>;
2533 }; 2519 };
2534 2520
2535 vspd0: vsp@fea20000 { 2521 vspd0: vsp@fea20000 {
2536 compatible = "renesas 2522 compatible = "renesas,vsp2";
2537 reg = <0 0xfea20000 0 2523 reg = <0 0xfea20000 0 0x5000>;
2538 interrupts = <GIC_SPI 2524 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2539 clocks = <&cpg CPG_MO 2525 clocks = <&cpg CPG_MOD 623>;
2540 power-domains = <&sys 2526 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2541 resets = <&cpg 623>; 2527 resets = <&cpg 623>;
2542 2528
2543 renesas,fcp = <&fcpvd 2529 renesas,fcp = <&fcpvd0>;
2544 }; 2530 };
2545 2531
2546 vspd1: vsp@fea28000 { 2532 vspd1: vsp@fea28000 {
2547 compatible = "renesas 2533 compatible = "renesas,vsp2";
2548 reg = <0 0xfea28000 0 2534 reg = <0 0xfea28000 0 0x5000>;
2549 interrupts = <GIC_SPI 2535 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2550 clocks = <&cpg CPG_MO 2536 clocks = <&cpg CPG_MOD 622>;
2551 power-domains = <&sys 2537 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2552 resets = <&cpg 622>; 2538 resets = <&cpg 622>;
2553 2539
2554 renesas,fcp = <&fcpvd 2540 renesas,fcp = <&fcpvd1>;
2555 }; 2541 };
2556 2542
2557 fcpvb0: fcp@fe96f000 { 2543 fcpvb0: fcp@fe96f000 {
2558 compatible = "renesas 2544 compatible = "renesas,fcpv";
2559 reg = <0 0xfe96f000 0 2545 reg = <0 0xfe96f000 0 0x200>;
2560 clocks = <&cpg CPG_MO 2546 clocks = <&cpg CPG_MOD 607>;
2561 power-domains = <&sys 2547 power-domains = <&sysc R8A77965_PD_A3VP>;
2562 resets = <&cpg 607>; 2548 resets = <&cpg 607>;
2563 iommus = <&ipmmu_vp0 <<
2564 }; 2549 };
2565 2550
2566 fcpvd0: fcp@fea27000 { 2551 fcpvd0: fcp@fea27000 {
2567 compatible = "renesas 2552 compatible = "renesas,fcpv";
2568 reg = <0 0xfea27000 0 2553 reg = <0 0xfea27000 0 0x200>;
2569 clocks = <&cpg CPG_MO 2554 clocks = <&cpg CPG_MOD 603>;
2570 power-domains = <&sys 2555 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2571 resets = <&cpg 603>; 2556 resets = <&cpg 603>;
2572 iommus = <&ipmmu_vi0 <<
2573 }; 2557 };
2574 2558
2575 fcpvd1: fcp@fea2f000 { 2559 fcpvd1: fcp@fea2f000 {
2576 compatible = "renesas 2560 compatible = "renesas,fcpv";
2577 reg = <0 0xfea2f000 0 2561 reg = <0 0xfea2f000 0 0x200>;
2578 clocks = <&cpg CPG_MO 2562 clocks = <&cpg CPG_MOD 602>;
2579 power-domains = <&sys 2563 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2580 resets = <&cpg 602>; 2564 resets = <&cpg 602>;
2581 iommus = <&ipmmu_vi0 <<
2582 }; 2565 };
2583 2566
2584 fcpvi0: fcp@fe9af000 { 2567 fcpvi0: fcp@fe9af000 {
2585 compatible = "renesas 2568 compatible = "renesas,fcpv";
2586 reg = <0 0xfe9af000 0 2569 reg = <0 0xfe9af000 0 0x200>;
2587 clocks = <&cpg CPG_MO 2570 clocks = <&cpg CPG_MOD 611>;
2588 power-domains = <&sys 2571 power-domains = <&sysc R8A77965_PD_A3VP>;
2589 resets = <&cpg 611>; 2572 resets = <&cpg 611>;
2590 iommus = <&ipmmu_vp0 <<
2591 }; 2573 };
2592 2574
2593 cmm0: cmm@fea40000 { 2575 cmm0: cmm@fea40000 {
2594 compatible = "renesas 2576 compatible = "renesas,r8a77965-cmm",
2595 "renesas 2577 "renesas,rcar-gen3-cmm";
2596 reg = <0 0xfea40000 0 2578 reg = <0 0xfea40000 0 0x1000>;
2597 power-domains = <&sys 2579 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2598 clocks = <&cpg CPG_MO 2580 clocks = <&cpg CPG_MOD 711>;
2599 resets = <&cpg 711>; 2581 resets = <&cpg 711>;
2600 }; 2582 };
2601 2583
2602 cmm1: cmm@fea50000 { 2584 cmm1: cmm@fea50000 {
2603 compatible = "renesas 2585 compatible = "renesas,r8a77965-cmm",
2604 "renesas 2586 "renesas,rcar-gen3-cmm";
2605 reg = <0 0xfea50000 0 2587 reg = <0 0xfea50000 0 0x1000>;
2606 power-domains = <&sys 2588 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2607 clocks = <&cpg CPG_MO 2589 clocks = <&cpg CPG_MOD 710>;
2608 resets = <&cpg 710>; 2590 resets = <&cpg 710>;
2609 }; 2591 };
2610 2592
2611 cmm3: cmm@fea70000 { 2593 cmm3: cmm@fea70000 {
2612 compatible = "renesas 2594 compatible = "renesas,r8a77965-cmm",
2613 "renesas 2595 "renesas,rcar-gen3-cmm";
2614 reg = <0 0xfea70000 0 2596 reg = <0 0xfea70000 0 0x1000>;
2615 power-domains = <&sys 2597 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2616 clocks = <&cpg CPG_MO 2598 clocks = <&cpg CPG_MOD 708>;
2617 resets = <&cpg 708>; 2599 resets = <&cpg 708>;
2618 }; 2600 };
2619 2601
2620 csi20: csi2@fea80000 { 2602 csi20: csi2@fea80000 {
2621 compatible = "renesas 2603 compatible = "renesas,r8a77965-csi2";
2622 reg = <0 0xfea80000 0 2604 reg = <0 0xfea80000 0 0x10000>;
2623 interrupts = <GIC_SPI 2605 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2624 clocks = <&cpg CPG_MO 2606 clocks = <&cpg CPG_MOD 714>;
2625 power-domains = <&sys 2607 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2626 resets = <&cpg 714>; 2608 resets = <&cpg 714>;
2627 status = "disabled"; 2609 status = "disabled";
2628 2610
2629 ports { 2611 ports {
2630 #address-cell 2612 #address-cells = <1>;
2631 #size-cells = 2613 #size-cells = <0>;
2632 2614
2633 port@0 { 2615 port@0 {
2634 reg = 2616 reg = <0>;
2635 }; 2617 };
2636 2618
2637 port@1 { 2619 port@1 {
2638 #addr 2620 #address-cells = <1>;
2639 #size 2621 #size-cells = <0>;
2640 2622
2641 reg = 2623 reg = <1>;
2642 2624
2643 csi20 2625 csi20vin0: endpoint@0 {
2644 2626 reg = <0>;
2645 2627 remote-endpoint = <&vin0csi20>;
2646 }; 2628 };
2647 csi20 2629 csi20vin1: endpoint@1 {
2648 2630 reg = <1>;
2649 2631 remote-endpoint = <&vin1csi20>;
2650 }; 2632 };
2651 csi20 2633 csi20vin2: endpoint@2 {
2652 2634 reg = <2>;
2653 2635 remote-endpoint = <&vin2csi20>;
2654 }; 2636 };
2655 csi20 2637 csi20vin3: endpoint@3 {
2656 2638 reg = <3>;
2657 2639 remote-endpoint = <&vin3csi20>;
2658 }; 2640 };
2659 csi20 2641 csi20vin4: endpoint@4 {
2660 2642 reg = <4>;
2661 2643 remote-endpoint = <&vin4csi20>;
2662 }; 2644 };
2663 csi20 2645 csi20vin5: endpoint@5 {
2664 2646 reg = <5>;
2665 2647 remote-endpoint = <&vin5csi20>;
2666 }; 2648 };
2667 csi20 2649 csi20vin6: endpoint@6 {
2668 2650 reg = <6>;
2669 2651 remote-endpoint = <&vin6csi20>;
2670 }; 2652 };
2671 csi20 2653 csi20vin7: endpoint@7 {
2672 2654 reg = <7>;
2673 2655 remote-endpoint = <&vin7csi20>;
2674 }; 2656 };
2675 }; 2657 };
2676 }; 2658 };
2677 }; 2659 };
2678 2660
2679 csi40: csi2@feaa0000 { 2661 csi40: csi2@feaa0000 {
2680 compatible = "renesas 2662 compatible = "renesas,r8a77965-csi2";
2681 reg = <0 0xfeaa0000 0 2663 reg = <0 0xfeaa0000 0 0x10000>;
2682 interrupts = <GIC_SPI 2664 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2683 clocks = <&cpg CPG_MO 2665 clocks = <&cpg CPG_MOD 716>;
2684 power-domains = <&sys 2666 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2685 resets = <&cpg 716>; 2667 resets = <&cpg 716>;
2686 status = "disabled"; 2668 status = "disabled";
2687 2669
2688 ports { 2670 ports {
2689 #address-cell 2671 #address-cells = <1>;
2690 #size-cells = 2672 #size-cells = <0>;
2691 2673
2692 port@0 { 2674 port@0 {
2693 reg = 2675 reg = <0>;
2694 }; 2676 };
2695 2677
2696 port@1 { 2678 port@1 {
2697 #addr 2679 #address-cells = <1>;
2698 #size 2680 #size-cells = <0>;
2699 2681
2700 reg = 2682 reg = <1>;
2701 2683
2702 csi40 2684 csi40vin0: endpoint@0 {
2703 2685 reg = <0>;
2704 2686 remote-endpoint = <&vin0csi40>;
2705 }; 2687 };
2706 csi40 2688 csi40vin1: endpoint@1 {
2707 2689 reg = <1>;
2708 2690 remote-endpoint = <&vin1csi40>;
2709 }; 2691 };
2710 csi40 2692 csi40vin2: endpoint@2 {
2711 2693 reg = <2>;
2712 2694 remote-endpoint = <&vin2csi40>;
2713 }; 2695 };
2714 csi40 2696 csi40vin3: endpoint@3 {
2715 2697 reg = <3>;
2716 2698 remote-endpoint = <&vin3csi40>;
2717 }; 2699 };
2718 csi40 2700 csi40vin4: endpoint@4 {
2719 2701 reg = <4>;
2720 2702 remote-endpoint = <&vin4csi40>;
2721 }; 2703 };
2722 csi40 2704 csi40vin5: endpoint@5 {
2723 2705 reg = <5>;
2724 2706 remote-endpoint = <&vin5csi40>;
2725 }; 2707 };
2726 csi40 2708 csi40vin6: endpoint@6 {
2727 2709 reg = <6>;
2728 2710 remote-endpoint = <&vin6csi40>;
2729 }; 2711 };
2730 csi40 2712 csi40vin7: endpoint@7 {
2731 2713 reg = <7>;
2732 2714 remote-endpoint = <&vin7csi40>;
2733 }; 2715 };
2734 }; 2716 };
2735 }; 2717 };
2736 }; 2718 };
2737 2719
2738 hdmi0: hdmi@fead0000 { 2720 hdmi0: hdmi@fead0000 {
2739 compatible = "renesas 2721 compatible = "renesas,r8a77965-hdmi",
2740 "renesas 2722 "renesas,rcar-gen3-hdmi";
2741 reg = <0 0xfead0000 0 2723 reg = <0 0xfead0000 0 0x10000>;
2742 interrupts = <GIC_SPI 2724 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2743 clocks = <&cpg CPG_MO 2725 clocks = <&cpg CPG_MOD 729>,
2744 <&cpg CPG_CO 2726 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2745 clock-names = "iahb", 2727 clock-names = "iahb", "isfr";
2746 power-domains = <&sys 2728 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2747 resets = <&cpg 729>; 2729 resets = <&cpg 729>;
2748 status = "disabled"; 2730 status = "disabled";
2749 2731
2750 ports { 2732 ports {
2751 #address-cell 2733 #address-cells = <1>;
2752 #size-cells = 2734 #size-cells = <0>;
2753 port@0 { 2735 port@0 {
2754 reg = 2736 reg = <0>;
2755 dw_hd 2737 dw_hdmi0_in: endpoint {
2756 2738 remote-endpoint = <&du_out_hdmi0>;
2757 }; 2739 };
2758 }; 2740 };
2759 port@1 { 2741 port@1 {
2760 reg = 2742 reg = <1>;
2761 }; 2743 };
2762 }; 2744 };
2763 }; 2745 };
2764 2746
2765 du: display@feb00000 { 2747 du: display@feb00000 {
2766 compatible = "renesas 2748 compatible = "renesas,du-r8a77965";
2767 reg = <0 0xfeb00000 0 2749 reg = <0 0xfeb00000 0 0x80000>;
2768 interrupts = <GIC_SPI 2750 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2769 <GIC_SPI 2751 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2770 <GIC_SPI 2752 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2771 clocks = <&cpg CPG_MO 2753 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2772 <&cpg CPG_MO 2754 <&cpg CPG_MOD 721>;
2773 clock-names = "du.0", 2755 clock-names = "du.0", "du.1", "du.3";
2774 resets = <&cpg 724>, 2756 resets = <&cpg 724>, <&cpg 722>;
2775 reset-names = "du.0", 2757 reset-names = "du.0", "du.3";
2776 2758
2777 renesas,cmms = <&cmm0 2759 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
2778 renesas,vsps = <&vspd 2760 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2779 2761
2780 status = "disabled"; 2762 status = "disabled";
2781 2763
2782 ports { 2764 ports {
2783 #address-cell 2765 #address-cells = <1>;
2784 #size-cells = 2766 #size-cells = <0>;
2785 2767
2786 port@0 { 2768 port@0 {
2787 reg = 2769 reg = <0>;
2788 }; 2770 };
2789 port@1 { 2771 port@1 {
2790 reg = 2772 reg = <1>;
2791 du_ou 2773 du_out_hdmi0: endpoint {
2792 2774 remote-endpoint = <&dw_hdmi0_in>;
2793 }; 2775 };
2794 }; 2776 };
2795 port@2 { 2777 port@2 {
2796 reg = 2778 reg = <2>;
2797 du_ou 2779 du_out_lvds0: endpoint {
2798 2780 remote-endpoint = <&lvds0_in>;
2799 }; 2781 };
2800 }; 2782 };
2801 }; 2783 };
2802 }; 2784 };
2803 2785
2804 lvds0: lvds@feb90000 { 2786 lvds0: lvds@feb90000 {
2805 compatible = "renesas 2787 compatible = "renesas,r8a77965-lvds";
2806 reg = <0 0xfeb90000 0 2788 reg = <0 0xfeb90000 0 0x14>;
2807 clocks = <&cpg CPG_MO 2789 clocks = <&cpg CPG_MOD 727>;
2808 power-domains = <&sys 2790 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2809 resets = <&cpg 727>; 2791 resets = <&cpg 727>;
2810 status = "disabled"; 2792 status = "disabled";
2811 2793
2812 ports { 2794 ports {
2813 #address-cell 2795 #address-cells = <1>;
2814 #size-cells = 2796 #size-cells = <0>;
2815 2797
2816 port@0 { 2798 port@0 {
2817 reg = 2799 reg = <0>;
2818 lvds0 2800 lvds0_in: endpoint {
2819 2801 remote-endpoint = <&du_out_lvds0>;
2820 }; 2802 };
2821 }; 2803 };
2822 port@1 { 2804 port@1 {
2823 reg = 2805 reg = <1>;
2824 }; 2806 };
2825 }; 2807 };
2826 }; 2808 };
2827 2809
2828 prr: chipid@fff00044 { 2810 prr: chipid@fff00044 {
2829 compatible = "renesas 2811 compatible = "renesas,prr";
2830 reg = <0 0xfff00044 0 2812 reg = <0 0xfff00044 0 4>;
2831 }; 2813 };
2832 }; 2814 };
2833 2815
2834 thermal-zones { 2816 thermal-zones {
2835 sensor1_thermal: sensor1-ther 2817 sensor1_thermal: sensor1-thermal {
2836 polling-delay-passive 2818 polling-delay-passive = <250>;
2837 polling-delay = <1000 2819 polling-delay = <1000>;
2838 thermal-sensors = <&t 2820 thermal-sensors = <&tsc 0>;
2839 sustainable-power = < 2821 sustainable-power = <2439>;
2840 2822
2841 trips { 2823 trips {
2842 sensor1_crit: 2824 sensor1_crit: sensor1-crit {
2843 tempe 2825 temperature = <120000>;
2844 hyste 2826 hysteresis = <1000>;
2845 type 2827 type = "critical";
2846 }; 2828 };
2847 }; 2829 };
2848 }; 2830 };
2849 2831
2850 sensor2_thermal: sensor2-ther 2832 sensor2_thermal: sensor2-thermal {
2851 polling-delay-passive 2833 polling-delay-passive = <250>;
2852 polling-delay = <1000 2834 polling-delay = <1000>;
2853 thermal-sensors = <&t 2835 thermal-sensors = <&tsc 1>;
2854 sustainable-power = < 2836 sustainable-power = <2439>;
2855 2837
2856 trips { 2838 trips {
2857 sensor2_crit: 2839 sensor2_crit: sensor2-crit {
2858 tempe 2840 temperature = <120000>;
2859 hyste 2841 hysteresis = <1000>;
2860 type 2842 type = "critical";
2861 }; 2843 };
2862 }; 2844 };
2863 }; 2845 };
2864 2846
2865 sensor3_thermal: sensor3-ther 2847 sensor3_thermal: sensor3-thermal {
2866 polling-delay-passive 2848 polling-delay-passive = <250>;
2867 polling-delay = <1000 2849 polling-delay = <1000>;
2868 thermal-sensors = <&t 2850 thermal-sensors = <&tsc 2>;
2869 sustainable-power = < 2851 sustainable-power = <2439>;
2870 2852
2871 trips { 2853 trips {
2872 target: trip- 2854 target: trip-point1 {
2873 /* mi 2855 /* miliCelsius */
2874 tempe 2856 temperature = <100000>;
2875 hyste 2857 hysteresis = <1000>;
2876 type 2858 type = "passive";
2877 }; 2859 };
2878 2860
2879 sensor3_crit: 2861 sensor3_crit: sensor3-crit {
2880 tempe 2862 temperature = <120000>;
2881 hyste 2863 hysteresis = <1000>;
2882 type 2864 type = "critical";
2883 }; 2865 };
2884 }; 2866 };
2885 2867
2886 cooling-maps { 2868 cooling-maps {
2887 map0 { 2869 map0 {
2888 trip 2870 trip = <&target>;
2889 cooli 2871 cooling-device = <&a57_0 2 4>;
2890 contr 2872 contribution = <1024>;
2891 }; 2873 };
2892 }; 2874 };
2893 }; 2875 };
2894 }; 2876 };
2895 2877
2896 timer { 2878 timer {
2897 compatible = "arm,armv8-timer 2879 compatible = "arm,armv8-timer";
2898 interrupts-extended = <&gic G 2880 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2899 <&gic G 2881 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2900 <&gic G 2882 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2901 <&gic G 2883 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2902 interrupt-names = "sec-phys", <<
2903 }; 2884 };
2904 2885
2905 /* External USB clocks - can be overr 2886 /* External USB clocks - can be overridden by the board */
2906 usb3s0_clk: usb3s0 { 2887 usb3s0_clk: usb3s0 {
2907 compatible = "fixed-clock"; 2888 compatible = "fixed-clock";
2908 #clock-cells = <0>; 2889 #clock-cells = <0>;
2909 clock-frequency = <0>; 2890 clock-frequency = <0>;
2910 }; 2891 };
2911 2892
2912 usb_extal_clk: usb_extal { 2893 usb_extal_clk: usb_extal {
2913 compatible = "fixed-clock"; 2894 compatible = "fixed-clock";
2914 #clock-cells = <0>; 2895 #clock-cells = <0>;
2915 clock-frequency = <0>; 2896 clock-frequency = <0>;
2916 }; 2897 };
2917 }; 2898 };
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