1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car M3-N (R8A7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 * 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+rene 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 * 6 *
7 * Based on r8a7796.dtsi 7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp 8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */ 9 */
10 10
11 #include <dt-bindings/clock/r8a77965-cpg-mssr. 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h> 13 #include <dt-bindings/power/r8a77965-sysc.h>
14 14
>> 15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
>> 16
15 #define SOC_HAS_SATA 17 #define SOC_HAS_SATA
16 18
17 / { 19 / {
18 compatible = "renesas,r8a77965"; 20 compatible = "renesas,r8a77965";
19 #address-cells = <2>; 21 #address-cells = <2>;
20 #size-cells = <2>; 22 #size-cells = <2>;
21 23
22 /* 24 /*
23 * The external audio clocks are confi 25 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default. 26 * clocks by default.
25 * Boards that provide audio clocks sh 27 * Boards that provide audio clocks should override them.
26 */ 28 */
27 audio_clk_a: audio_clk_a { 29 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock"; 30 compatible = "fixed-clock";
29 #clock-cells = <0>; 31 #clock-cells = <0>;
30 clock-frequency = <0>; 32 clock-frequency = <0>;
31 }; 33 };
32 34
33 audio_clk_b: audio_clk_b { 35 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock"; 36 compatible = "fixed-clock";
35 #clock-cells = <0>; 37 #clock-cells = <0>;
36 clock-frequency = <0>; 38 clock-frequency = <0>;
37 }; 39 };
38 40
39 audio_clk_c: audio_clk_c { 41 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock"; 42 compatible = "fixed-clock";
41 #clock-cells = <0>; 43 #clock-cells = <0>;
42 clock-frequency = <0>; 44 clock-frequency = <0>;
43 }; 45 };
44 46
45 /* External CAN clock - to be overridd 47 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can { 48 can_clk: can {
47 compatible = "fixed-clock"; 49 compatible = "fixed-clock";
48 #clock-cells = <0>; 50 #clock-cells = <0>;
49 clock-frequency = <0>; 51 clock-frequency = <0>;
50 }; 52 };
51 53
52 cluster0_opp: opp-table-0 { 54 cluster0_opp: opp-table-0 {
53 compatible = "operating-points 55 compatible = "operating-points-v2";
54 opp-shared; 56 opp-shared;
55 57
56 opp-500000000 { 58 opp-500000000 {
57 opp-hz = /bits/ 64 <50 59 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <83000 60 opp-microvolt = <830000>;
59 clock-latency-ns = <30 61 clock-latency-ns = <300000>;
60 }; 62 };
61 opp-1000000000 { 63 opp-1000000000 {
62 opp-hz = /bits/ 64 <10 64 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <83000 65 opp-microvolt = <830000>;
64 clock-latency-ns = <30 66 clock-latency-ns = <300000>;
65 }; 67 };
66 opp-1500000000 { 68 opp-1500000000 {
67 opp-hz = /bits/ 64 <15 69 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <83000 70 opp-microvolt = <830000>;
69 clock-latency-ns = <30 71 clock-latency-ns = <300000>;
70 opp-suspend; 72 opp-suspend;
71 }; 73 };
72 opp-1600000000 { 74 opp-1600000000 {
73 opp-hz = /bits/ 64 <16 75 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <90000 76 opp-microvolt = <900000>;
75 clock-latency-ns = <30 77 clock-latency-ns = <300000>;
>> 78 turbo-mode;
76 }; 79 };
77 opp-1700000000 { 80 opp-1700000000 {
78 opp-hz = /bits/ 64 <17 81 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <90000 82 opp-microvolt = <900000>;
80 clock-latency-ns = <30 83 clock-latency-ns = <300000>;
>> 84 turbo-mode;
81 }; 85 };
82 opp-1800000000 { 86 opp-1800000000 {
83 opp-hz = /bits/ 64 <18 87 opp-hz = /bits/ 64 <1800000000>;
84 opp-microvolt = <96000 88 opp-microvolt = <960000>;
85 clock-latency-ns = <30 89 clock-latency-ns = <300000>;
86 turbo-mode; 90 turbo-mode;
87 }; 91 };
88 }; 92 };
89 93
90 cpus { 94 cpus {
91 #address-cells = <1>; 95 #address-cells = <1>;
92 #size-cells = <0>; 96 #size-cells = <0>;
93 97
94 a57_0: cpu@0 { 98 a57_0: cpu@0 {
95 compatible = "arm,cort 99 compatible = "arm,cortex-a57";
96 reg = <0x0>; 100 reg = <0x0>;
97 device_type = "cpu"; 101 device_type = "cpu";
98 power-domains = <&sysc 102 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
99 next-level-cache = <&L 103 next-level-cache = <&L2_CA57>;
100 enable-method = "psci" 104 enable-method = "psci";
101 cpu-idle-states = <&CP 105 cpu-idle-states = <&CPU_SLEEP_0>;
102 #cooling-cells = <2>; 106 #cooling-cells = <2>;
103 dynamic-power-coeffici 107 dynamic-power-coefficient = <854>;
104 clocks = <&cpg CPG_COR 108 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
105 operating-points-v2 = 109 operating-points-v2 = <&cluster0_opp>;
106 }; 110 };
107 111
108 a57_1: cpu@1 { 112 a57_1: cpu@1 {
109 compatible = "arm,cort 113 compatible = "arm,cortex-a57";
110 reg = <0x1>; 114 reg = <0x1>;
111 device_type = "cpu"; 115 device_type = "cpu";
112 power-domains = <&sysc 116 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
113 next-level-cache = <&L 117 next-level-cache = <&L2_CA57>;
114 enable-method = "psci" 118 enable-method = "psci";
115 cpu-idle-states = <&CP 119 cpu-idle-states = <&CPU_SLEEP_0>;
116 clocks = <&cpg CPG_COR 120 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
117 operating-points-v2 = 121 operating-points-v2 = <&cluster0_opp>;
118 }; 122 };
119 123
120 L2_CA57: cache-controller-0 { 124 L2_CA57: cache-controller-0 {
121 compatible = "cache"; 125 compatible = "cache";
122 power-domains = <&sysc 126 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
123 cache-unified; 127 cache-unified;
124 cache-level = <2>; 128 cache-level = <2>;
125 }; 129 };
126 130
127 idle-states { 131 idle-states {
128 entry-method = "psci"; 132 entry-method = "psci";
129 133
130 CPU_SLEEP_0: cpu-sleep 134 CPU_SLEEP_0: cpu-sleep-0 {
131 compatible = " 135 compatible = "arm,idle-state";
132 arm,psci-suspe 136 arm,psci-suspend-param = <0x0010000>;
133 local-timer-st 137 local-timer-stop;
134 entry-latency- 138 entry-latency-us = <400>;
135 exit-latency-u 139 exit-latency-us = <500>;
136 min-residency- 140 min-residency-us = <4000>;
137 }; 141 };
138 }; 142 };
139 }; 143 };
140 144
141 extal_clk: extal { 145 extal_clk: extal {
142 compatible = "fixed-clock"; 146 compatible = "fixed-clock";
143 #clock-cells = <0>; 147 #clock-cells = <0>;
144 /* This value must be overridd 148 /* This value must be overridden by the board */
145 clock-frequency = <0>; 149 clock-frequency = <0>;
146 }; 150 };
147 151
148 extalr_clk: extalr { 152 extalr_clk: extalr {
149 compatible = "fixed-clock"; 153 compatible = "fixed-clock";
150 #clock-cells = <0>; 154 #clock-cells = <0>;
151 /* This value must be overridd 155 /* This value must be overridden by the board */
152 clock-frequency = <0>; 156 clock-frequency = <0>;
153 }; 157 };
154 158
155 /* External PCIe clock - can be overri 159 /* External PCIe clock - can be overridden by the board */
156 pcie_bus_clk: pcie_bus { 160 pcie_bus_clk: pcie_bus {
157 compatible = "fixed-clock"; 161 compatible = "fixed-clock";
158 #clock-cells = <0>; 162 #clock-cells = <0>;
159 clock-frequency = <0>; 163 clock-frequency = <0>;
160 }; 164 };
161 165
162 pmu_a57 { 166 pmu_a57 {
163 compatible = "arm,cortex-a57-p 167 compatible = "arm,cortex-a57-pmu";
164 interrupts-extended = <&gic GI 168 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
165 <&gic GI 169 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166 interrupt-affinity = <&a57_0>, 170 interrupt-affinity = <&a57_0>,
167 <&a57_1>; 171 <&a57_1>;
168 }; 172 };
169 173
170 psci { 174 psci {
171 compatible = "arm,psci-1.0", " 175 compatible = "arm,psci-1.0", "arm,psci-0.2";
172 method = "smc"; 176 method = "smc";
173 }; 177 };
174 178
175 /* External SCIF clock - to be overrid 179 /* External SCIF clock - to be overridden by boards that provide it */
176 scif_clk: scif { 180 scif_clk: scif {
177 compatible = "fixed-clock"; 181 compatible = "fixed-clock";
178 #clock-cells = <0>; 182 #clock-cells = <0>;
179 clock-frequency = <0>; 183 clock-frequency = <0>;
180 }; 184 };
181 185
182 soc { 186 soc {
183 compatible = "simple-bus"; 187 compatible = "simple-bus";
184 interrupt-parent = <&gic>; 188 interrupt-parent = <&gic>;
185 #address-cells = <2>; 189 #address-cells = <2>;
186 #size-cells = <2>; 190 #size-cells = <2>;
187 ranges; 191 ranges;
188 192
189 rwdt: watchdog@e6020000 { 193 rwdt: watchdog@e6020000 {
190 compatible = "renesas, 194 compatible = "renesas,r8a77965-wdt",
191 "renesas, 195 "renesas,rcar-gen3-wdt";
192 reg = <0 0xe6020000 0 196 reg = <0 0xe6020000 0 0x0c>;
193 interrupts = <GIC_SPI 197 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
194 clocks = <&cpg CPG_MOD 198 clocks = <&cpg CPG_MOD 402>;
195 power-domains = <&sysc 199 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
196 resets = <&cpg 402>; 200 resets = <&cpg 402>;
197 status = "disabled"; 201 status = "disabled";
198 }; 202 };
199 203
200 gpio0: gpio@e6050000 { 204 gpio0: gpio@e6050000 {
201 compatible = "renesas, 205 compatible = "renesas,gpio-r8a77965",
202 "renesas, 206 "renesas,rcar-gen3-gpio";
203 reg = <0 0xe6050000 0 207 reg = <0 0xe6050000 0 0x50>;
204 interrupts = <GIC_SPI 208 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>; 209 #gpio-cells = <2>;
206 gpio-controller; 210 gpio-controller;
207 gpio-ranges = <&pfc 0 211 gpio-ranges = <&pfc 0 0 16>;
208 #interrupt-cells = <2> 212 #interrupt-cells = <2>;
209 interrupt-controller; 213 interrupt-controller;
210 clocks = <&cpg CPG_MOD 214 clocks = <&cpg CPG_MOD 912>;
211 power-domains = <&sysc 215 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
212 resets = <&cpg 912>; 216 resets = <&cpg 912>;
213 }; 217 };
214 218
215 gpio1: gpio@e6051000 { 219 gpio1: gpio@e6051000 {
216 compatible = "renesas, 220 compatible = "renesas,gpio-r8a77965",
217 "renesas, 221 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6051000 0 222 reg = <0 0xe6051000 0 0x50>;
219 interrupts = <GIC_SPI 223 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>; 224 #gpio-cells = <2>;
221 gpio-controller; 225 gpio-controller;
222 gpio-ranges = <&pfc 0 226 gpio-ranges = <&pfc 0 32 29>;
223 #interrupt-cells = <2> 227 #interrupt-cells = <2>;
224 interrupt-controller; 228 interrupt-controller;
225 clocks = <&cpg CPG_MOD 229 clocks = <&cpg CPG_MOD 911>;
226 power-domains = <&sysc 230 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
227 resets = <&cpg 911>; 231 resets = <&cpg 911>;
228 }; 232 };
229 233
230 gpio2: gpio@e6052000 { 234 gpio2: gpio@e6052000 {
231 compatible = "renesas, 235 compatible = "renesas,gpio-r8a77965",
232 "renesas, 236 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6052000 0 237 reg = <0 0xe6052000 0 0x50>;
234 interrupts = <GIC_SPI 238 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>; 239 #gpio-cells = <2>;
236 gpio-controller; 240 gpio-controller;
237 gpio-ranges = <&pfc 0 241 gpio-ranges = <&pfc 0 64 15>;
238 #interrupt-cells = <2> 242 #interrupt-cells = <2>;
239 interrupt-controller; 243 interrupt-controller;
240 clocks = <&cpg CPG_MOD 244 clocks = <&cpg CPG_MOD 910>;
241 power-domains = <&sysc 245 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
242 resets = <&cpg 910>; 246 resets = <&cpg 910>;
243 }; 247 };
244 248
245 gpio3: gpio@e6053000 { 249 gpio3: gpio@e6053000 {
246 compatible = "renesas, 250 compatible = "renesas,gpio-r8a77965",
247 "renesas, 251 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6053000 0 252 reg = <0 0xe6053000 0 0x50>;
249 interrupts = <GIC_SPI 253 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>; 254 #gpio-cells = <2>;
251 gpio-controller; 255 gpio-controller;
252 gpio-ranges = <&pfc 0 256 gpio-ranges = <&pfc 0 96 16>;
253 #interrupt-cells = <2> 257 #interrupt-cells = <2>;
254 interrupt-controller; 258 interrupt-controller;
255 clocks = <&cpg CPG_MOD 259 clocks = <&cpg CPG_MOD 909>;
256 power-domains = <&sysc 260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
257 resets = <&cpg 909>; 261 resets = <&cpg 909>;
258 }; 262 };
259 263
260 gpio4: gpio@e6054000 { 264 gpio4: gpio@e6054000 {
261 compatible = "renesas, 265 compatible = "renesas,gpio-r8a77965",
262 "renesas, 266 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6054000 0 267 reg = <0 0xe6054000 0 0x50>;
264 interrupts = <GIC_SPI 268 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>; 269 #gpio-cells = <2>;
266 gpio-controller; 270 gpio-controller;
267 gpio-ranges = <&pfc 0 271 gpio-ranges = <&pfc 0 128 18>;
268 #interrupt-cells = <2> 272 #interrupt-cells = <2>;
269 interrupt-controller; 273 interrupt-controller;
270 clocks = <&cpg CPG_MOD 274 clocks = <&cpg CPG_MOD 908>;
271 power-domains = <&sysc 275 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
272 resets = <&cpg 908>; 276 resets = <&cpg 908>;
273 }; 277 };
274 278
275 gpio5: gpio@e6055000 { 279 gpio5: gpio@e6055000 {
276 compatible = "renesas, 280 compatible = "renesas,gpio-r8a77965",
277 "renesas, 281 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6055000 0 282 reg = <0 0xe6055000 0 0x50>;
279 interrupts = <GIC_SPI 283 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>; 284 #gpio-cells = <2>;
281 gpio-controller; 285 gpio-controller;
282 gpio-ranges = <&pfc 0 286 gpio-ranges = <&pfc 0 160 26>;
283 #interrupt-cells = <2> 287 #interrupt-cells = <2>;
284 interrupt-controller; 288 interrupt-controller;
285 clocks = <&cpg CPG_MOD 289 clocks = <&cpg CPG_MOD 907>;
286 power-domains = <&sysc 290 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
287 resets = <&cpg 907>; 291 resets = <&cpg 907>;
288 }; 292 };
289 293
290 gpio6: gpio@e6055400 { 294 gpio6: gpio@e6055400 {
291 compatible = "renesas, 295 compatible = "renesas,gpio-r8a77965",
292 "renesas, 296 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055400 0 297 reg = <0 0xe6055400 0 0x50>;
294 interrupts = <GIC_SPI 298 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>; 299 #gpio-cells = <2>;
296 gpio-controller; 300 gpio-controller;
297 gpio-ranges = <&pfc 0 301 gpio-ranges = <&pfc 0 192 32>;
298 #interrupt-cells = <2> 302 #interrupt-cells = <2>;
299 interrupt-controller; 303 interrupt-controller;
300 clocks = <&cpg CPG_MOD 304 clocks = <&cpg CPG_MOD 906>;
301 power-domains = <&sysc 305 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
302 resets = <&cpg 906>; 306 resets = <&cpg 906>;
303 }; 307 };
304 308
305 gpio7: gpio@e6055800 { 309 gpio7: gpio@e6055800 {
306 compatible = "renesas, 310 compatible = "renesas,gpio-r8a77965",
307 "renesas, 311 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055800 0 312 reg = <0 0xe6055800 0 0x50>;
309 interrupts = <GIC_SPI 313 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>; 314 #gpio-cells = <2>;
311 gpio-controller; 315 gpio-controller;
312 gpio-ranges = <&pfc 0 316 gpio-ranges = <&pfc 0 224 4>;
313 #interrupt-cells = <2> 317 #interrupt-cells = <2>;
314 interrupt-controller; 318 interrupt-controller;
315 clocks = <&cpg CPG_MOD 319 clocks = <&cpg CPG_MOD 905>;
316 power-domains = <&sysc 320 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
317 resets = <&cpg 905>; 321 resets = <&cpg 905>;
318 }; 322 };
319 323
320 pfc: pinctrl@e6060000 { 324 pfc: pinctrl@e6060000 {
321 compatible = "renesas, 325 compatible = "renesas,pfc-r8a77965";
322 reg = <0 0xe6060000 0 326 reg = <0 0xe6060000 0 0x50c>;
323 }; 327 };
324 328
325 cmt0: timer@e60f0000 { 329 cmt0: timer@e60f0000 {
326 compatible = "renesas, 330 compatible = "renesas,r8a77965-cmt0",
327 "renesas, 331 "renesas,rcar-gen3-cmt0";
328 reg = <0 0xe60f0000 0 332 reg = <0 0xe60f0000 0 0x1004>;
329 interrupts = <GIC_SPI 333 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 334 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&cpg CPG_MOD 335 clocks = <&cpg CPG_MOD 303>;
332 clock-names = "fck"; 336 clock-names = "fck";
333 power-domains = <&sysc 337 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
334 resets = <&cpg 303>; 338 resets = <&cpg 303>;
335 status = "disabled"; 339 status = "disabled";
336 }; 340 };
337 341
338 cmt1: timer@e6130000 { 342 cmt1: timer@e6130000 {
339 compatible = "renesas, 343 compatible = "renesas,r8a77965-cmt1",
340 "renesas, 344 "renesas,rcar-gen3-cmt1";
341 reg = <0 0xe6130000 0 345 reg = <0 0xe6130000 0 0x1004>;
342 interrupts = <GIC_SPI 346 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 347 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 348 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 349 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 350 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 351 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 352 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 353 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&cpg CPG_MOD 354 clocks = <&cpg CPG_MOD 302>;
351 clock-names = "fck"; 355 clock-names = "fck";
352 power-domains = <&sysc 356 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
353 resets = <&cpg 302>; 357 resets = <&cpg 302>;
354 status = "disabled"; 358 status = "disabled";
355 }; 359 };
356 360
357 cmt2: timer@e6140000 { 361 cmt2: timer@e6140000 {
358 compatible = "renesas, 362 compatible = "renesas,r8a77965-cmt1",
359 "renesas, 363 "renesas,rcar-gen3-cmt1";
360 reg = <0 0xe6140000 0 364 reg = <0 0xe6140000 0 0x1004>;
361 interrupts = <GIC_SPI 365 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 366 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 367 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 368 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 369 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 370 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 371 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 372 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 373 clocks = <&cpg CPG_MOD 301>;
370 clock-names = "fck"; 374 clock-names = "fck";
371 power-domains = <&sysc 375 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
372 resets = <&cpg 301>; 376 resets = <&cpg 301>;
373 status = "disabled"; 377 status = "disabled";
374 }; 378 };
375 379
376 cmt3: timer@e6148000 { 380 cmt3: timer@e6148000 {
377 compatible = "renesas, 381 compatible = "renesas,r8a77965-cmt1",
378 "renesas, 382 "renesas,rcar-gen3-cmt1";
379 reg = <0 0xe6148000 0 383 reg = <0 0xe6148000 0 0x1004>;
380 interrupts = <GIC_SPI 384 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 385 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 386 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 387 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 388 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 389 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 390 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 391 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 392 clocks = <&cpg CPG_MOD 300>;
389 clock-names = "fck"; 393 clock-names = "fck";
390 power-domains = <&sysc 394 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
391 resets = <&cpg 300>; 395 resets = <&cpg 300>;
392 status = "disabled"; 396 status = "disabled";
393 }; 397 };
394 398
395 cpg: clock-controller@e6150000 399 cpg: clock-controller@e6150000 {
396 compatible = "renesas, 400 compatible = "renesas,r8a77965-cpg-mssr";
397 reg = <0 0xe6150000 0 401 reg = <0 0xe6150000 0 0x1000>;
398 clocks = <&extal_clk>, 402 clocks = <&extal_clk>, <&extalr_clk>;
399 clock-names = "extal", 403 clock-names = "extal", "extalr";
400 #clock-cells = <2>; 404 #clock-cells = <2>;
401 #power-domain-cells = 405 #power-domain-cells = <0>;
402 #reset-cells = <1>; 406 #reset-cells = <1>;
403 }; 407 };
404 408
405 rst: reset-controller@e6160000 409 rst: reset-controller@e6160000 {
406 compatible = "renesas, 410 compatible = "renesas,r8a77965-rst";
407 reg = <0 0xe6160000 0 411 reg = <0 0xe6160000 0 0x0200>;
408 }; 412 };
409 413
410 sysc: system-controller@e61800 414 sysc: system-controller@e6180000 {
411 compatible = "renesas, 415 compatible = "renesas,r8a77965-sysc";
412 reg = <0 0xe6180000 0 416 reg = <0 0xe6180000 0 0x0400>;
413 #power-domain-cells = 417 #power-domain-cells = <1>;
414 }; 418 };
415 419
416 tsc: thermal@e6198000 { 420 tsc: thermal@e6198000 {
417 compatible = "renesas, 421 compatible = "renesas,r8a77965-thermal";
418 reg = <0 0xe6198000 0 422 reg = <0 0xe6198000 0 0x100>,
419 <0 0xe61a0000 0 423 <0 0xe61a0000 0 0x100>,
420 <0 0xe61a8000 0 424 <0 0xe61a8000 0 0x100>;
421 interrupts = <GIC_SPI 425 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 426 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 427 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 428 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc 429 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
426 resets = <&cpg 522>; 430 resets = <&cpg 522>;
427 #thermal-sensor-cells 431 #thermal-sensor-cells = <1>;
428 }; 432 };
429 433
430 intc_ex: interrupt-controller@ 434 intc_ex: interrupt-controller@e61c0000 {
431 compatible = "renesas, 435 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
432 #interrupt-cells = <2> 436 #interrupt-cells = <2>;
433 interrupt-controller; 437 interrupt-controller;
434 reg = <0 0xe61c0000 0 438 reg = <0 0xe61c0000 0 0x200>;
435 interrupts = <GIC_SPI 439 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
436 <GIC_SPI 440 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
437 <GIC_SPI 441 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
438 <GIC_SPI 442 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
439 <GIC_SPI 443 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 444 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 445 clocks = <&cpg CPG_MOD 407>;
442 power-domains = <&sysc 446 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
443 resets = <&cpg 407>; 447 resets = <&cpg 407>;
444 }; 448 };
445 449
446 tmu0: timer@e61e0000 { 450 tmu0: timer@e61e0000 {
447 compatible = "renesas, 451 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
448 reg = <0 0xe61e0000 0 452 reg = <0 0xe61e0000 0 0x30>;
449 interrupts = <GIC_SPI 453 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
450 <GIC_SPI 454 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 455 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
452 interrupt-names = "tun <<
453 clocks = <&cpg CPG_MOD 456 clocks = <&cpg CPG_MOD 125>;
454 clock-names = "fck"; 457 clock-names = "fck";
455 power-domains = <&sysc 458 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
456 resets = <&cpg 125>; 459 resets = <&cpg 125>;
457 status = "disabled"; 460 status = "disabled";
458 }; 461 };
459 462
460 tmu1: timer@e6fc0000 { 463 tmu1: timer@e6fc0000 {
461 compatible = "renesas, 464 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
462 reg = <0 0xe6fc0000 0 465 reg = <0 0xe6fc0000 0 0x30>;
463 interrupts = <GIC_SPI 466 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
464 <GIC_SPI 467 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
465 <GIC_SPI !! 468 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
466 <GIC_SPI <<
467 interrupt-names = "tun <<
468 clocks = <&cpg CPG_MOD 469 clocks = <&cpg CPG_MOD 124>;
469 clock-names = "fck"; 470 clock-names = "fck";
470 power-domains = <&sysc 471 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
471 resets = <&cpg 124>; 472 resets = <&cpg 124>;
472 status = "disabled"; 473 status = "disabled";
473 }; 474 };
474 475
475 tmu2: timer@e6fd0000 { 476 tmu2: timer@e6fd0000 {
476 compatible = "renesas, 477 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
477 reg = <0 0xe6fd0000 0 478 reg = <0 0xe6fd0000 0 0x30>;
478 interrupts = <GIC_SPI 479 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 480 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI !! 481 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
481 <GIC_SPI <<
482 interrupt-names = "tun <<
483 clocks = <&cpg CPG_MOD 482 clocks = <&cpg CPG_MOD 123>;
484 clock-names = "fck"; 483 clock-names = "fck";
485 power-domains = <&sysc 484 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
486 resets = <&cpg 123>; 485 resets = <&cpg 123>;
487 status = "disabled"; 486 status = "disabled";
488 }; 487 };
489 488
490 tmu3: timer@e6fe0000 { 489 tmu3: timer@e6fe0000 {
491 compatible = "renesas, 490 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
492 reg = <0 0xe6fe0000 0 491 reg = <0 0xe6fe0000 0 0x30>;
493 interrupts = <GIC_SPI 492 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
494 <GIC_SPI 493 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
495 <GIC_SPI 494 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
496 interrupt-names = "tun <<
497 clocks = <&cpg CPG_MOD 495 clocks = <&cpg CPG_MOD 122>;
498 clock-names = "fck"; 496 clock-names = "fck";
499 power-domains = <&sysc 497 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
500 resets = <&cpg 122>; 498 resets = <&cpg 122>;
501 status = "disabled"; 499 status = "disabled";
502 }; 500 };
503 501
504 tmu4: timer@ffc00000 { 502 tmu4: timer@ffc00000 {
505 compatible = "renesas, 503 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
506 reg = <0 0xffc00000 0 504 reg = <0 0xffc00000 0 0x30>;
507 interrupts = <GIC_SPI 505 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 506 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 507 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
510 interrupt-names = "tun <<
511 clocks = <&cpg CPG_MOD 508 clocks = <&cpg CPG_MOD 121>;
512 clock-names = "fck"; 509 clock-names = "fck";
513 power-domains = <&sysc 510 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
514 resets = <&cpg 121>; 511 resets = <&cpg 121>;
515 status = "disabled"; 512 status = "disabled";
516 }; 513 };
517 514
518 i2c0: i2c@e6500000 { 515 i2c0: i2c@e6500000 {
519 #address-cells = <1>; 516 #address-cells = <1>;
520 #size-cells = <0>; 517 #size-cells = <0>;
521 compatible = "renesas, 518 compatible = "renesas,i2c-r8a77965",
522 "renesas, 519 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6500000 0 520 reg = <0 0xe6500000 0 0x40>;
524 interrupts = <GIC_SPI 521 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 522 clocks = <&cpg CPG_MOD 931>;
526 power-domains = <&sysc 523 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
527 resets = <&cpg 931>; 524 resets = <&cpg 931>;
528 dmas = <&dmac1 0x91>, 525 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
529 <&dmac2 0x91>, 526 <&dmac2 0x91>, <&dmac2 0x90>;
530 dma-names = "tx", "rx" 527 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 528 i2c-scl-internal-delay-ns = <110>;
532 status = "disabled"; 529 status = "disabled";
533 }; 530 };
534 531
535 i2c1: i2c@e6508000 { 532 i2c1: i2c@e6508000 {
536 #address-cells = <1>; 533 #address-cells = <1>;
537 #size-cells = <0>; 534 #size-cells = <0>;
538 compatible = "renesas, 535 compatible = "renesas,i2c-r8a77965",
539 "renesas, 536 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe6508000 0 537 reg = <0 0xe6508000 0 0x40>;
541 interrupts = <GIC_SPI 538 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 539 clocks = <&cpg CPG_MOD 930>;
543 power-domains = <&sysc 540 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
544 resets = <&cpg 930>; 541 resets = <&cpg 930>;
545 dmas = <&dmac1 0x93>, 542 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
546 <&dmac2 0x93>, 543 <&dmac2 0x93>, <&dmac2 0x92>;
547 dma-names = "tx", "rx" 544 dma-names = "tx", "rx", "tx", "rx";
548 i2c-scl-internal-delay 545 i2c-scl-internal-delay-ns = <6>;
549 status = "disabled"; 546 status = "disabled";
550 }; 547 };
551 548
552 i2c2: i2c@e6510000 { 549 i2c2: i2c@e6510000 {
553 #address-cells = <1>; 550 #address-cells = <1>;
554 #size-cells = <0>; 551 #size-cells = <0>;
555 compatible = "renesas, 552 compatible = "renesas,i2c-r8a77965",
556 "renesas, 553 "renesas,rcar-gen3-i2c";
557 reg = <0 0xe6510000 0 554 reg = <0 0xe6510000 0 0x40>;
558 interrupts = <GIC_SPI 555 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 556 clocks = <&cpg CPG_MOD 929>;
560 power-domains = <&sysc 557 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
561 resets = <&cpg 929>; 558 resets = <&cpg 929>;
562 dmas = <&dmac1 0x95>, 559 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
563 <&dmac2 0x95>, 560 <&dmac2 0x95>, <&dmac2 0x94>;
564 dma-names = "tx", "rx" 561 dma-names = "tx", "rx", "tx", "rx";
565 i2c-scl-internal-delay 562 i2c-scl-internal-delay-ns = <6>;
566 status = "disabled"; 563 status = "disabled";
567 }; 564 };
568 565
569 i2c3: i2c@e66d0000 { 566 i2c3: i2c@e66d0000 {
570 #address-cells = <1>; 567 #address-cells = <1>;
571 #size-cells = <0>; 568 #size-cells = <0>;
572 compatible = "renesas, 569 compatible = "renesas,i2c-r8a77965",
573 "renesas, 570 "renesas,rcar-gen3-i2c";
574 reg = <0 0xe66d0000 0 571 reg = <0 0xe66d0000 0 0x40>;
575 interrupts = <GIC_SPI 572 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 573 clocks = <&cpg CPG_MOD 928>;
577 power-domains = <&sysc 574 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
578 resets = <&cpg 928>; 575 resets = <&cpg 928>;
579 dmas = <&dmac0 0x97>, 576 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
580 dma-names = "tx", "rx" 577 dma-names = "tx", "rx";
581 i2c-scl-internal-delay 578 i2c-scl-internal-delay-ns = <110>;
582 status = "disabled"; 579 status = "disabled";
583 }; 580 };
584 581
585 i2c4: i2c@e66d8000 { 582 i2c4: i2c@e66d8000 {
586 #address-cells = <1>; 583 #address-cells = <1>;
587 #size-cells = <0>; 584 #size-cells = <0>;
588 compatible = "renesas, 585 compatible = "renesas,i2c-r8a77965",
589 "renesas, 586 "renesas,rcar-gen3-i2c";
590 reg = <0 0xe66d8000 0 587 reg = <0 0xe66d8000 0 0x40>;
591 interrupts = <GIC_SPI 588 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&cpg CPG_MOD 589 clocks = <&cpg CPG_MOD 927>;
593 power-domains = <&sysc 590 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
594 resets = <&cpg 927>; 591 resets = <&cpg 927>;
595 dmas = <&dmac0 0x99>, 592 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
596 dma-names = "tx", "rx" 593 dma-names = "tx", "rx";
597 i2c-scl-internal-delay 594 i2c-scl-internal-delay-ns = <110>;
598 status = "disabled"; 595 status = "disabled";
599 }; 596 };
600 597
601 i2c5: i2c@e66e0000 { 598 i2c5: i2c@e66e0000 {
602 #address-cells = <1>; 599 #address-cells = <1>;
603 #size-cells = <0>; 600 #size-cells = <0>;
604 compatible = "renesas, 601 compatible = "renesas,i2c-r8a77965",
605 "renesas, 602 "renesas,rcar-gen3-i2c";
606 reg = <0 0xe66e0000 0 603 reg = <0 0xe66e0000 0 0x40>;
607 interrupts = <GIC_SPI 604 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&cpg CPG_MOD 605 clocks = <&cpg CPG_MOD 919>;
609 power-domains = <&sysc 606 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
610 resets = <&cpg 919>; 607 resets = <&cpg 919>;
611 dmas = <&dmac0 0x9b>, 608 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
612 dma-names = "tx", "rx" 609 dma-names = "tx", "rx";
613 i2c-scl-internal-delay 610 i2c-scl-internal-delay-ns = <110>;
614 status = "disabled"; 611 status = "disabled";
615 }; 612 };
616 613
617 i2c6: i2c@e66e8000 { 614 i2c6: i2c@e66e8000 {
618 #address-cells = <1>; 615 #address-cells = <1>;
619 #size-cells = <0>; 616 #size-cells = <0>;
620 compatible = "renesas, 617 compatible = "renesas,i2c-r8a77965",
621 "renesas, 618 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66e8000 0 619 reg = <0 0xe66e8000 0 0x40>;
623 interrupts = <GIC_SPI 620 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&cpg CPG_MOD 621 clocks = <&cpg CPG_MOD 918>;
625 power-domains = <&sysc 622 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
626 resets = <&cpg 918>; 623 resets = <&cpg 918>;
627 dmas = <&dmac0 0x9d>, 624 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
628 dma-names = "tx", "rx" 625 dma-names = "tx", "rx";
629 i2c-scl-internal-delay 626 i2c-scl-internal-delay-ns = <6>;
630 status = "disabled"; 627 status = "disabled";
631 }; 628 };
632 629
633 i2c_dvfs: i2c@e60b0000 { 630 i2c_dvfs: i2c@e60b0000 {
634 #address-cells = <1>; 631 #address-cells = <1>;
635 #size-cells = <0>; 632 #size-cells = <0>;
636 compatible = "renesas, 633 compatible = "renesas,iic-r8a77965",
637 "renesas, 634 "renesas,rcar-gen3-iic",
638 "renesas, 635 "renesas,rmobile-iic";
639 reg = <0 0xe60b0000 0 636 reg = <0 0xe60b0000 0 0x425>;
640 interrupts = <GIC_SPI 637 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&cpg CPG_MOD 638 clocks = <&cpg CPG_MOD 926>;
642 power-domains = <&sysc 639 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
643 resets = <&cpg 926>; 640 resets = <&cpg 926>;
644 dmas = <&dmac0 0x11>, 641 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
645 dma-names = "tx", "rx" 642 dma-names = "tx", "rx";
646 status = "disabled"; 643 status = "disabled";
647 }; 644 };
648 645
649 hscif0: serial@e6540000 { 646 hscif0: serial@e6540000 {
650 compatible = "renesas, 647 compatible = "renesas,hscif-r8a77965",
651 "renesas, 648 "renesas,rcar-gen3-hscif",
652 "renesas, 649 "renesas,hscif";
653 reg = <0 0xe6540000 0 650 reg = <0 0xe6540000 0 0x60>;
654 interrupts = <GIC_SPI 651 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 652 clocks = <&cpg CPG_MOD 520>,
656 <&cpg CPG_COR 653 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
657 <&scif_clk>; 654 <&scif_clk>;
658 clock-names = "fck", " 655 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x31>, 656 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
660 <&dmac2 0x31>, 657 <&dmac2 0x31>, <&dmac2 0x30>;
661 dma-names = "tx", "rx" 658 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 659 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
663 resets = <&cpg 520>; 660 resets = <&cpg 520>;
664 status = "disabled"; 661 status = "disabled";
665 }; 662 };
666 663
667 hscif1: serial@e6550000 { 664 hscif1: serial@e6550000 {
668 compatible = "renesas, 665 compatible = "renesas,hscif-r8a77965",
669 "renesas, 666 "renesas,rcar-gen3-hscif",
670 "renesas, 667 "renesas,hscif";
671 reg = <0 0xe6550000 0 668 reg = <0 0xe6550000 0 0x60>;
672 interrupts = <GIC_SPI 669 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 670 clocks = <&cpg CPG_MOD 519>,
674 <&cpg CPG_COR 671 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
675 <&scif_clk>; 672 <&scif_clk>;
676 clock-names = "fck", " 673 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac1 0x33>, 674 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
678 <&dmac2 0x33>, 675 <&dmac2 0x33>, <&dmac2 0x32>;
679 dma-names = "tx", "rx" 676 dma-names = "tx", "rx", "tx", "rx";
680 power-domains = <&sysc 677 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
681 resets = <&cpg 519>; 678 resets = <&cpg 519>;
682 status = "disabled"; 679 status = "disabled";
683 }; 680 };
684 681
685 hscif2: serial@e6560000 { 682 hscif2: serial@e6560000 {
686 compatible = "renesas, 683 compatible = "renesas,hscif-r8a77965",
687 "renesas, 684 "renesas,rcar-gen3-hscif",
688 "renesas, 685 "renesas,hscif";
689 reg = <0 0xe6560000 0 686 reg = <0 0xe6560000 0 0x60>;
690 interrupts = <GIC_SPI 687 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&cpg CPG_MOD 688 clocks = <&cpg CPG_MOD 518>,
692 <&cpg CPG_COR 689 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
693 <&scif_clk>; 690 <&scif_clk>;
694 clock-names = "fck", " 691 clock-names = "fck", "brg_int", "scif_clk";
695 dmas = <&dmac1 0x35>, 692 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
696 <&dmac2 0x35>, 693 <&dmac2 0x35>, <&dmac2 0x34>;
697 dma-names = "tx", "rx" 694 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc 695 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
699 resets = <&cpg 518>; 696 resets = <&cpg 518>;
700 status = "disabled"; 697 status = "disabled";
701 }; 698 };
702 699
703 hscif3: serial@e66a0000 { 700 hscif3: serial@e66a0000 {
704 compatible = "renesas, 701 compatible = "renesas,hscif-r8a77965",
705 "renesas, 702 "renesas,rcar-gen3-hscif",
706 "renesas, 703 "renesas,hscif";
707 reg = <0 0xe66a0000 0 704 reg = <0 0xe66a0000 0 0x60>;
708 interrupts = <GIC_SPI 705 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 706 clocks = <&cpg CPG_MOD 517>,
710 <&cpg CPG_COR 707 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
711 <&scif_clk>; 708 <&scif_clk>;
712 clock-names = "fck", " 709 clock-names = "fck", "brg_int", "scif_clk";
713 dmas = <&dmac0 0x37>, 710 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
714 dma-names = "tx", "rx" 711 dma-names = "tx", "rx";
715 power-domains = <&sysc 712 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
716 resets = <&cpg 517>; 713 resets = <&cpg 517>;
717 status = "disabled"; 714 status = "disabled";
718 }; 715 };
719 716
720 hscif4: serial@e66b0000 { 717 hscif4: serial@e66b0000 {
721 compatible = "renesas, 718 compatible = "renesas,hscif-r8a77965",
722 "renesas, 719 "renesas,rcar-gen3-hscif",
723 "renesas, 720 "renesas,hscif";
724 reg = <0 0xe66b0000 0 721 reg = <0 0xe66b0000 0 0x60>;
725 interrupts = <GIC_SPI 722 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 723 clocks = <&cpg CPG_MOD 516>,
727 <&cpg CPG_COR 724 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
728 <&scif_clk>; 725 <&scif_clk>;
729 clock-names = "fck", " 726 clock-names = "fck", "brg_int", "scif_clk";
730 dmas = <&dmac0 0x39>, 727 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
731 dma-names = "tx", "rx" 728 dma-names = "tx", "rx";
732 power-domains = <&sysc 729 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
733 resets = <&cpg 516>; 730 resets = <&cpg 516>;
734 status = "disabled"; 731 status = "disabled";
735 }; 732 };
736 733
737 hsusb: usb@e6590000 { 734 hsusb: usb@e6590000 {
738 compatible = "renesas, 735 compatible = "renesas,usbhs-r8a77965",
739 "renesas, 736 "renesas,rcar-gen3-usbhs";
740 reg = <0 0xe6590000 0 737 reg = <0 0xe6590000 0 0x200>;
741 interrupts = <GIC_SPI 738 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 739 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
743 dmas = <&usb_dmac0 0>, 740 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
744 <&usb_dmac1 0>, 741 <&usb_dmac1 0>, <&usb_dmac1 1>;
745 dma-names = "ch0", "ch 742 dma-names = "ch0", "ch1", "ch2", "ch3";
746 renesas,buswait = <11> 743 renesas,buswait = <11>;
747 phys = <&usb2_phy0 3>; 744 phys = <&usb2_phy0 3>;
748 phy-names = "usb"; 745 phy-names = "usb";
749 power-domains = <&sysc 746 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
750 resets = <&cpg 704>, < 747 resets = <&cpg 704>, <&cpg 703>;
751 status = "disabled"; 748 status = "disabled";
752 }; 749 };
753 750
754 usb_dmac0: dma-controller@e65a 751 usb_dmac0: dma-controller@e65a0000 {
755 compatible = "renesas, 752 compatible = "renesas,r8a77965-usb-dmac",
756 "renesas, 753 "renesas,usb-dmac";
757 reg = <0 0xe65a0000 0 754 reg = <0 0xe65a0000 0 0x100>;
758 interrupts = <GIC_SPI 755 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 756 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
760 interrupt-names = "ch0 757 interrupt-names = "ch0", "ch1";
761 clocks = <&cpg CPG_MOD 758 clocks = <&cpg CPG_MOD 330>;
762 power-domains = <&sysc 759 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
763 resets = <&cpg 330>; 760 resets = <&cpg 330>;
764 #dma-cells = <1>; 761 #dma-cells = <1>;
765 dma-channels = <2>; 762 dma-channels = <2>;
766 }; 763 };
767 764
768 usb_dmac1: dma-controller@e65b 765 usb_dmac1: dma-controller@e65b0000 {
769 compatible = "renesas, 766 compatible = "renesas,r8a77965-usb-dmac",
770 "renesas, 767 "renesas,usb-dmac";
771 reg = <0 0xe65b0000 0 768 reg = <0 0xe65b0000 0 0x100>;
772 interrupts = <GIC_SPI 769 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 770 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
774 interrupt-names = "ch0 771 interrupt-names = "ch0", "ch1";
775 clocks = <&cpg CPG_MOD 772 clocks = <&cpg CPG_MOD 331>;
776 power-domains = <&sysc 773 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
777 resets = <&cpg 331>; 774 resets = <&cpg 331>;
778 #dma-cells = <1>; 775 #dma-cells = <1>;
779 dma-channels = <2>; 776 dma-channels = <2>;
780 }; 777 };
781 778
782 usb3_phy0: usb-phy@e65ee000 { 779 usb3_phy0: usb-phy@e65ee000 {
783 compatible = "renesas, 780 compatible = "renesas,r8a77965-usb3-phy",
784 "renesas, 781 "renesas,rcar-gen3-usb3-phy";
785 reg = <0 0xe65ee000 0 782 reg = <0 0xe65ee000 0 0x90>;
786 clocks = <&cpg CPG_MOD 783 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
787 <&usb_extal_c 784 <&usb_extal_clk>;
788 clock-names = "usb3-if 785 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
789 power-domains = <&sysc 786 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
790 resets = <&cpg 328>; 787 resets = <&cpg 328>;
791 #phy-cells = <0>; 788 #phy-cells = <0>;
792 status = "disabled"; 789 status = "disabled";
793 }; 790 };
794 791
795 arm_cc630p: crypto@e6601000 { 792 arm_cc630p: crypto@e6601000 {
796 compatible = "arm,cryp 793 compatible = "arm,cryptocell-630p-ree";
797 interrupts = <GIC_SPI 794 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
798 reg = <0x0 0xe6601000 795 reg = <0x0 0xe6601000 0 0x1000>;
799 clocks = <&cpg CPG_MOD 796 clocks = <&cpg CPG_MOD 229>;
800 resets = <&cpg 229>; 797 resets = <&cpg 229>;
801 power-domains = <&sysc 798 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
802 }; 799 };
803 800
804 dmac0: dma-controller@e6700000 801 dmac0: dma-controller@e6700000 {
805 compatible = "renesas, 802 compatible = "renesas,dmac-r8a77965",
806 "renesas, 803 "renesas,rcar-dmac";
807 reg = <0 0xe6700000 0 804 reg = <0 0xe6700000 0 0x10000>;
808 interrupts = <GIC_SPI 805 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 806 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 807 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 808 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 809 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 810 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 811 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 812 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 813 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 814 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
818 <GIC_SPI 815 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_SPI 816 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_SPI 817 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_SPI 818 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 819 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 820 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 821 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "err 822 interrupt-names = "error",
826 "ch0", 823 "ch0", "ch1", "ch2", "ch3",
827 "ch4", 824 "ch4", "ch5", "ch6", "ch7",
828 "ch8", 825 "ch8", "ch9", "ch10", "ch11",
829 "ch12" 826 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 827 clocks = <&cpg CPG_MOD 219>;
831 clock-names = "fck"; 828 clock-names = "fck";
832 power-domains = <&sysc 829 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
833 resets = <&cpg 219>; 830 resets = <&cpg 219>;
834 #dma-cells = <1>; 831 #dma-cells = <1>;
835 dma-channels = <16>; 832 dma-channels = <16>;
836 iommus = <&ipmmu_ds0 0 833 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
837 <&ipmmu_ds0 2>, 834 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
838 <&ipmmu_ds0 4>, 835 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
839 <&ipmmu_ds0 6>, 836 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
840 <&ipmmu_ds0 8>, 837 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
841 <&ipmmu_ds0 10> 838 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
842 <&ipmmu_ds0 12> 839 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
843 <&ipmmu_ds0 14> 840 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
844 }; 841 };
845 842
846 dmac1: dma-controller@e7300000 843 dmac1: dma-controller@e7300000 {
847 compatible = "renesas, 844 compatible = "renesas,dmac-r8a77965",
848 "renesas, 845 "renesas,rcar-dmac";
849 reg = <0 0xe7300000 0 846 reg = <0 0xe7300000 0 0x10000>;
850 interrupts = <GIC_SPI 847 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 848 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 849 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 850 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 851 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 852 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 853 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 854 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 855 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 856 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 857 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 858 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
862 <GIC_SPI 859 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 860 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 861 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 862 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 863 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
867 interrupt-names = "err 864 interrupt-names = "error",
868 "ch0", 865 "ch0", "ch1", "ch2", "ch3",
869 "ch4", 866 "ch4", "ch5", "ch6", "ch7",
870 "ch8", 867 "ch8", "ch9", "ch10", "ch11",
871 "ch12" 868 "ch12", "ch13", "ch14", "ch15";
872 clocks = <&cpg CPG_MOD 869 clocks = <&cpg CPG_MOD 218>;
873 clock-names = "fck"; 870 clock-names = "fck";
874 power-domains = <&sysc 871 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 resets = <&cpg 218>; 872 resets = <&cpg 218>;
876 #dma-cells = <1>; 873 #dma-cells = <1>;
877 dma-channels = <16>; 874 dma-channels = <16>;
878 iommus = <&ipmmu_ds1 0 875 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
879 <&ipmmu_ds1 2>, 876 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
880 <&ipmmu_ds1 4>, 877 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
881 <&ipmmu_ds1 6>, 878 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
882 <&ipmmu_ds1 8>, 879 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
883 <&ipmmu_ds1 10> 880 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
884 <&ipmmu_ds1 12> 881 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
885 <&ipmmu_ds1 14> 882 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
886 }; 883 };
887 884
888 dmac2: dma-controller@e7310000 885 dmac2: dma-controller@e7310000 {
889 compatible = "renesas, 886 compatible = "renesas,dmac-r8a77965",
890 "renesas, 887 "renesas,rcar-dmac";
891 reg = <0 0xe7310000 0 888 reg = <0 0xe7310000 0 0x10000>;
892 interrupts = <GIC_SPI 889 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
893 <GIC_SPI 890 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
894 <GIC_SPI 891 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
895 <GIC_SPI 892 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
896 <GIC_SPI 893 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
897 <GIC_SPI 894 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
898 <GIC_SPI 895 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
899 <GIC_SPI 896 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
900 <GIC_SPI 897 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
901 <GIC_SPI 898 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
902 <GIC_SPI 899 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
903 <GIC_SPI 900 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
904 <GIC_SPI 901 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
905 <GIC_SPI 902 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
906 <GIC_SPI 903 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
907 <GIC_SPI 904 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
908 <GIC_SPI 905 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
909 interrupt-names = "err 906 interrupt-names = "error",
910 "ch0", 907 "ch0", "ch1", "ch2", "ch3",
911 "ch4", 908 "ch4", "ch5", "ch6", "ch7",
912 "ch8", 909 "ch8", "ch9", "ch10", "ch11",
913 "ch12" 910 "ch12", "ch13", "ch14", "ch15";
914 clocks = <&cpg CPG_MOD 911 clocks = <&cpg CPG_MOD 217>;
915 clock-names = "fck"; 912 clock-names = "fck";
916 power-domains = <&sysc 913 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
917 resets = <&cpg 217>; 914 resets = <&cpg 217>;
918 #dma-cells = <1>; 915 #dma-cells = <1>;
919 dma-channels = <16>; 916 dma-channels = <16>;
920 iommus = <&ipmmu_ds1 1 917 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
921 <&ipmmu_ds1 18> 918 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
922 <&ipmmu_ds1 20> 919 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
923 <&ipmmu_ds1 22> 920 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
924 <&ipmmu_ds1 24> 921 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
925 <&ipmmu_ds1 26> 922 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
926 <&ipmmu_ds1 28> 923 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
927 <&ipmmu_ds1 30> 924 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
928 }; 925 };
929 926
930 ipmmu_ds0: iommu@e6740000 { 927 ipmmu_ds0: iommu@e6740000 {
931 compatible = "renesas, 928 compatible = "renesas,ipmmu-r8a77965";
932 reg = <0 0xe6740000 0 929 reg = <0 0xe6740000 0 0x1000>;
933 renesas,ipmmu-main = < 930 renesas,ipmmu-main = <&ipmmu_mm 0>;
934 power-domains = <&sysc 931 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 932 #iommu-cells = <1>;
936 }; 933 };
937 934
938 ipmmu_ds1: iommu@e7740000 { 935 ipmmu_ds1: iommu@e7740000 {
939 compatible = "renesas, 936 compatible = "renesas,ipmmu-r8a77965";
940 reg = <0 0xe7740000 0 937 reg = <0 0xe7740000 0 0x1000>;
941 renesas,ipmmu-main = < 938 renesas,ipmmu-main = <&ipmmu_mm 1>;
942 power-domains = <&sysc 939 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
943 #iommu-cells = <1>; 940 #iommu-cells = <1>;
944 }; 941 };
945 942
946 ipmmu_hc: iommu@e6570000 { 943 ipmmu_hc: iommu@e6570000 {
947 compatible = "renesas, 944 compatible = "renesas,ipmmu-r8a77965";
948 reg = <0 0xe6570000 0 945 reg = <0 0xe6570000 0 0x1000>;
949 renesas,ipmmu-main = < 946 renesas,ipmmu-main = <&ipmmu_mm 2>;
950 power-domains = <&sysc 947 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 948 #iommu-cells = <1>;
952 }; 949 };
953 950
954 ipmmu_mm: iommu@e67b0000 { 951 ipmmu_mm: iommu@e67b0000 {
955 compatible = "renesas, 952 compatible = "renesas,ipmmu-r8a77965";
956 reg = <0 0xe67b0000 0 953 reg = <0 0xe67b0000 0 0x1000>;
957 interrupts = <GIC_SPI 954 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 955 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
959 power-domains = <&sysc 956 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
960 #iommu-cells = <1>; 957 #iommu-cells = <1>;
961 }; 958 };
962 959
963 ipmmu_mp: iommu@ec670000 { 960 ipmmu_mp: iommu@ec670000 {
964 compatible = "renesas, 961 compatible = "renesas,ipmmu-r8a77965";
965 reg = <0 0xec670000 0 962 reg = <0 0xec670000 0 0x1000>;
966 renesas,ipmmu-main = < 963 renesas,ipmmu-main = <&ipmmu_mm 4>;
967 power-domains = <&sysc 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
968 #iommu-cells = <1>; 965 #iommu-cells = <1>;
969 }; 966 };
970 967
971 ipmmu_pv0: iommu@fd800000 { 968 ipmmu_pv0: iommu@fd800000 {
972 compatible = "renesas, 969 compatible = "renesas,ipmmu-r8a77965";
973 reg = <0 0xfd800000 0 970 reg = <0 0xfd800000 0 0x1000>;
974 renesas,ipmmu-main = < 971 renesas,ipmmu-main = <&ipmmu_mm 6>;
975 power-domains = <&sysc 972 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
976 #iommu-cells = <1>; 973 #iommu-cells = <1>;
977 }; 974 };
978 975
979 ipmmu_rt: iommu@ffc80000 { 976 ipmmu_rt: iommu@ffc80000 {
980 compatible = "renesas, 977 compatible = "renesas,ipmmu-r8a77965";
981 reg = <0 0xffc80000 0 978 reg = <0 0xffc80000 0 0x1000>;
982 renesas,ipmmu-main = < 979 renesas,ipmmu-main = <&ipmmu_mm 10>;
983 power-domains = <&sysc 980 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
984 #iommu-cells = <1>; 981 #iommu-cells = <1>;
985 }; 982 };
986 983
987 ipmmu_vc0: iommu@fe6b0000 { 984 ipmmu_vc0: iommu@fe6b0000 {
988 compatible = "renesas, 985 compatible = "renesas,ipmmu-r8a77965";
989 reg = <0 0xfe6b0000 0 986 reg = <0 0xfe6b0000 0 0x1000>;
990 renesas,ipmmu-main = < 987 renesas,ipmmu-main = <&ipmmu_mm 12>;
991 power-domains = <&sysc 988 power-domains = <&sysc R8A77965_PD_A3VC>;
992 #iommu-cells = <1>; 989 #iommu-cells = <1>;
993 }; 990 };
994 991
995 ipmmu_vi0: iommu@febd0000 { 992 ipmmu_vi0: iommu@febd0000 {
996 compatible = "renesas, 993 compatible = "renesas,ipmmu-r8a77965";
997 reg = <0 0xfebd0000 0 994 reg = <0 0xfebd0000 0 0x1000>;
998 renesas,ipmmu-main = < 995 renesas,ipmmu-main = <&ipmmu_mm 14>;
999 power-domains = <&sysc 996 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1000 #iommu-cells = <1>; 997 #iommu-cells = <1>;
1001 }; 998 };
1002 999
1003 ipmmu_vp0: iommu@fe990000 { 1000 ipmmu_vp0: iommu@fe990000 {
1004 compatible = "renesas 1001 compatible = "renesas,ipmmu-r8a77965";
1005 reg = <0 0xfe990000 0 1002 reg = <0 0xfe990000 0 0x1000>;
1006 renesas,ipmmu-main = 1003 renesas,ipmmu-main = <&ipmmu_mm 16>;
1007 power-domains = <&sys 1004 power-domains = <&sysc R8A77965_PD_A3VP>;
1008 #iommu-cells = <1>; 1005 #iommu-cells = <1>;
1009 }; 1006 };
1010 1007
1011 avb: ethernet@e6800000 { 1008 avb: ethernet@e6800000 {
1012 compatible = "renesas 1009 compatible = "renesas,etheravb-r8a77965",
1013 "renesas 1010 "renesas,etheravb-rcar-gen3";
1014 reg = <0 0xe6800000 0 1011 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1015 interrupts = <GIC_SPI 1012 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1016 <GIC_SPI 1013 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 1014 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 1015 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 1016 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 1017 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 1018 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 1019 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 1020 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 1021 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 1022 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 1023 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 1024 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 1025 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 1026 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 1027 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 1028 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 1029 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 1030 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 1031 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 1032 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 1033 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 1034 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 1035 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 1036 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1040 interrupt-names = "ch 1037 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1041 "ch 1038 "ch4", "ch5", "ch6", "ch7",
1042 "ch 1039 "ch8", "ch9", "ch10", "ch11",
1043 "ch 1040 "ch12", "ch13", "ch14", "ch15",
1044 "ch 1041 "ch16", "ch17", "ch18", "ch19",
1045 "ch 1042 "ch20", "ch21", "ch22", "ch23",
1046 "ch 1043 "ch24";
1047 clocks = <&cpg CPG_MO 1044 clocks = <&cpg CPG_MOD 812>;
1048 clock-names = "fck"; 1045 clock-names = "fck";
1049 power-domains = <&sys 1046 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1050 resets = <&cpg 812>; 1047 resets = <&cpg 812>;
1051 phy-mode = "rgmii"; 1048 phy-mode = "rgmii";
1052 rx-internal-delay-ps 1049 rx-internal-delay-ps = <0>;
1053 tx-internal-delay-ps 1050 tx-internal-delay-ps = <0>;
1054 iommus = <&ipmmu_ds0 1051 iommus = <&ipmmu_ds0 16>;
1055 #address-cells = <1>; 1052 #address-cells = <1>;
1056 #size-cells = <0>; 1053 #size-cells = <0>;
1057 status = "disabled"; 1054 status = "disabled";
1058 }; 1055 };
1059 1056
1060 can0: can@e6c30000 { 1057 can0: can@e6c30000 {
1061 compatible = "renesas 1058 compatible = "renesas,can-r8a77965",
1062 "renesas 1059 "renesas,rcar-gen3-can";
1063 reg = <0 0xe6c30000 0 1060 reg = <0 0xe6c30000 0 0x1000>;
1064 interrupts = <GIC_SPI 1061 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&cpg CPG_MO 1062 clocks = <&cpg CPG_MOD 916>,
1066 <&cpg CPG_CORE 1063 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1067 <&can_clk>; 1064 <&can_clk>;
1068 clock-names = "clkp1" 1065 clock-names = "clkp1", "clkp2", "can_clk";
1069 assigned-clocks = <&c 1066 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1070 assigned-clock-rates 1067 assigned-clock-rates = <40000000>;
1071 power-domains = <&sys 1068 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1072 resets = <&cpg 916>; 1069 resets = <&cpg 916>;
1073 status = "disabled"; 1070 status = "disabled";
1074 }; 1071 };
1075 1072
1076 can1: can@e6c38000 { 1073 can1: can@e6c38000 {
1077 compatible = "renesas 1074 compatible = "renesas,can-r8a77965",
1078 "renesas 1075 "renesas,rcar-gen3-can";
1079 reg = <0 0xe6c38000 0 1076 reg = <0 0xe6c38000 0 0x1000>;
1080 interrupts = <GIC_SPI 1077 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1081 clocks = <&cpg CPG_MO 1078 clocks = <&cpg CPG_MOD 915>,
1082 <&cpg CPG_CORE 1079 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1083 <&can_clk>; 1080 <&can_clk>;
1084 clock-names = "clkp1" 1081 clock-names = "clkp1", "clkp2", "can_clk";
1085 assigned-clocks = <&c 1082 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1086 assigned-clock-rates 1083 assigned-clock-rates = <40000000>;
1087 power-domains = <&sys 1084 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1088 resets = <&cpg 915>; 1085 resets = <&cpg 915>;
1089 status = "disabled"; 1086 status = "disabled";
1090 }; 1087 };
1091 1088
1092 canfd: can@e66c0000 { 1089 canfd: can@e66c0000 {
1093 compatible = "renesas 1090 compatible = "renesas,r8a77965-canfd",
1094 "renesas 1091 "renesas,rcar-gen3-canfd";
1095 reg = <0 0xe66c0000 0 1092 reg = <0 0xe66c0000 0 0x8000>;
1096 interrupts = <GIC_SPI 1093 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1097 <GIC_SPI 3 1094 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1098 interrupt-names = "ch 1095 interrupt-names = "ch_int", "g_int";
1099 clocks = <&cpg CPG_MO 1096 clocks = <&cpg CPG_MOD 914>,
1100 <&cpg CPG_CORE 1097 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1101 <&can_clk>; 1098 <&can_clk>;
1102 clock-names = "fck", 1099 clock-names = "fck", "canfd", "can_clk";
1103 assigned-clocks = <&c 1100 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1104 assigned-clock-rates 1101 assigned-clock-rates = <40000000>;
1105 power-domains = <&sys 1102 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1106 resets = <&cpg 914>; 1103 resets = <&cpg 914>;
1107 status = "disabled"; 1104 status = "disabled";
1108 1105
1109 channel0 { 1106 channel0 {
1110 status = "dis 1107 status = "disabled";
1111 }; 1108 };
1112 1109
1113 channel1 { 1110 channel1 {
1114 status = "dis 1111 status = "disabled";
1115 }; 1112 };
1116 }; 1113 };
1117 1114
1118 pwm0: pwm@e6e30000 { 1115 pwm0: pwm@e6e30000 {
1119 compatible = "renesas 1116 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1120 reg = <0 0xe6e30000 0 1117 reg = <0 0xe6e30000 0 8>;
1121 #pwm-cells = <2>; 1118 #pwm-cells = <2>;
1122 clocks = <&cpg CPG_MO 1119 clocks = <&cpg CPG_MOD 523>;
1123 resets = <&cpg 523>; 1120 resets = <&cpg 523>;
1124 power-domains = <&sys 1121 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1125 status = "disabled"; 1122 status = "disabled";
1126 }; 1123 };
1127 1124
1128 pwm1: pwm@e6e31000 { 1125 pwm1: pwm@e6e31000 {
1129 compatible = "renesas 1126 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1130 reg = <0 0xe6e31000 0 1127 reg = <0 0xe6e31000 0 8>;
1131 #pwm-cells = <2>; 1128 #pwm-cells = <2>;
1132 clocks = <&cpg CPG_MO 1129 clocks = <&cpg CPG_MOD 523>;
1133 resets = <&cpg 523>; 1130 resets = <&cpg 523>;
1134 power-domains = <&sys 1131 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1135 status = "disabled"; 1132 status = "disabled";
1136 }; 1133 };
1137 1134
1138 pwm2: pwm@e6e32000 { 1135 pwm2: pwm@e6e32000 {
1139 compatible = "renesas 1136 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1140 reg = <0 0xe6e32000 0 1137 reg = <0 0xe6e32000 0 8>;
1141 #pwm-cells = <2>; 1138 #pwm-cells = <2>;
1142 clocks = <&cpg CPG_MO 1139 clocks = <&cpg CPG_MOD 523>;
1143 resets = <&cpg 523>; 1140 resets = <&cpg 523>;
1144 power-domains = <&sys 1141 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1145 status = "disabled"; 1142 status = "disabled";
1146 }; 1143 };
1147 1144
1148 pwm3: pwm@e6e33000 { 1145 pwm3: pwm@e6e33000 {
1149 compatible = "renesas 1146 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1150 reg = <0 0xe6e33000 0 1147 reg = <0 0xe6e33000 0 8>;
1151 #pwm-cells = <2>; 1148 #pwm-cells = <2>;
1152 clocks = <&cpg CPG_MO 1149 clocks = <&cpg CPG_MOD 523>;
1153 resets = <&cpg 523>; 1150 resets = <&cpg 523>;
1154 power-domains = <&sys 1151 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1155 status = "disabled"; 1152 status = "disabled";
1156 }; 1153 };
1157 1154
1158 pwm4: pwm@e6e34000 { 1155 pwm4: pwm@e6e34000 {
1159 compatible = "renesas 1156 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1160 reg = <0 0xe6e34000 0 1157 reg = <0 0xe6e34000 0 8>;
1161 #pwm-cells = <2>; 1158 #pwm-cells = <2>;
1162 clocks = <&cpg CPG_MO 1159 clocks = <&cpg CPG_MOD 523>;
1163 resets = <&cpg 523>; 1160 resets = <&cpg 523>;
1164 power-domains = <&sys 1161 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1165 status = "disabled"; 1162 status = "disabled";
1166 }; 1163 };
1167 1164
1168 pwm5: pwm@e6e35000 { 1165 pwm5: pwm@e6e35000 {
1169 compatible = "renesas 1166 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1170 reg = <0 0xe6e35000 0 1167 reg = <0 0xe6e35000 0 8>;
1171 #pwm-cells = <2>; 1168 #pwm-cells = <2>;
1172 clocks = <&cpg CPG_MO 1169 clocks = <&cpg CPG_MOD 523>;
1173 resets = <&cpg 523>; 1170 resets = <&cpg 523>;
1174 power-domains = <&sys 1171 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1175 status = "disabled"; 1172 status = "disabled";
1176 }; 1173 };
1177 1174
1178 pwm6: pwm@e6e36000 { 1175 pwm6: pwm@e6e36000 {
1179 compatible = "renesas 1176 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1180 reg = <0 0xe6e36000 0 1177 reg = <0 0xe6e36000 0 8>;
1181 #pwm-cells = <2>; 1178 #pwm-cells = <2>;
1182 clocks = <&cpg CPG_MO 1179 clocks = <&cpg CPG_MOD 523>;
1183 resets = <&cpg 523>; 1180 resets = <&cpg 523>;
1184 power-domains = <&sys 1181 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1185 status = "disabled"; 1182 status = "disabled";
1186 }; 1183 };
1187 1184
1188 scif0: serial@e6e60000 { 1185 scif0: serial@e6e60000 {
1189 compatible = "renesas 1186 compatible = "renesas,scif-r8a77965",
1190 "renesas 1187 "renesas,rcar-gen3-scif", "renesas,scif";
1191 reg = <0 0xe6e60000 0 1188 reg = <0 0xe6e60000 0 64>;
1192 interrupts = <GIC_SPI 1189 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MO 1190 clocks = <&cpg CPG_MOD 207>,
1194 <&cpg CPG_CO 1191 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1195 <&scif_clk>; 1192 <&scif_clk>;
1196 clock-names = "fck", 1193 clock-names = "fck", "brg_int", "scif_clk";
1197 dmas = <&dmac1 0x51>, 1194 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1198 <&dmac2 0x51>, 1195 <&dmac2 0x51>, <&dmac2 0x50>;
1199 dma-names = "tx", "rx 1196 dma-names = "tx", "rx", "tx", "rx";
1200 power-domains = <&sys 1197 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1201 resets = <&cpg 207>; 1198 resets = <&cpg 207>;
1202 status = "disabled"; 1199 status = "disabled";
1203 }; 1200 };
1204 1201
1205 scif1: serial@e6e68000 { 1202 scif1: serial@e6e68000 {
1206 compatible = "renesas 1203 compatible = "renesas,scif-r8a77965",
1207 "renesas 1204 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6e68000 0 1205 reg = <0 0xe6e68000 0 64>;
1209 interrupts = <GIC_SPI 1206 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1207 clocks = <&cpg CPG_MOD 206>,
1211 <&cpg CPG_CO 1208 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1212 <&scif_clk>; 1209 <&scif_clk>;
1213 clock-names = "fck", 1210 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac1 0x53>, 1211 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1215 <&dmac2 0x53>, 1212 <&dmac2 0x53>, <&dmac2 0x52>;
1216 dma-names = "tx", "rx 1213 dma-names = "tx", "rx", "tx", "rx";
1217 power-domains = <&sys 1214 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1218 resets = <&cpg 206>; 1215 resets = <&cpg 206>;
1219 status = "disabled"; 1216 status = "disabled";
1220 }; 1217 };
1221 1218
1222 scif2: serial@e6e88000 { 1219 scif2: serial@e6e88000 {
1223 compatible = "renesas 1220 compatible = "renesas,scif-r8a77965",
1224 "renesas 1221 "renesas,rcar-gen3-scif", "renesas,scif";
1225 reg = <0 0xe6e88000 0 1222 reg = <0 0xe6e88000 0 64>;
1226 interrupts = <GIC_SPI 1223 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MO 1224 clocks = <&cpg CPG_MOD 310>,
1228 <&cpg CPG_CO 1225 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1229 <&scif_clk>; 1226 <&scif_clk>;
1230 clock-names = "fck", 1227 clock-names = "fck", "brg_int", "scif_clk";
1231 dmas = <&dmac1 0x13>, 1228 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1232 <&dmac2 0x13>, 1229 <&dmac2 0x13>, <&dmac2 0x12>;
1233 dma-names = "tx", "rx 1230 dma-names = "tx", "rx", "tx", "rx";
1234 power-domains = <&sys 1231 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1235 resets = <&cpg 310>; 1232 resets = <&cpg 310>;
1236 status = "disabled"; 1233 status = "disabled";
1237 }; 1234 };
1238 1235
1239 scif3: serial@e6c50000 { 1236 scif3: serial@e6c50000 {
1240 compatible = "renesas 1237 compatible = "renesas,scif-r8a77965",
1241 "renesas 1238 "renesas,rcar-gen3-scif", "renesas,scif";
1242 reg = <0 0xe6c50000 0 1239 reg = <0 0xe6c50000 0 64>;
1243 interrupts = <GIC_SPI 1240 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1244 clocks = <&cpg CPG_MO 1241 clocks = <&cpg CPG_MOD 204>,
1245 <&cpg CPG_CO 1242 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1246 <&scif_clk>; 1243 <&scif_clk>;
1247 clock-names = "fck", 1244 clock-names = "fck", "brg_int", "scif_clk";
1248 dmas = <&dmac0 0x57>, 1245 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1249 dma-names = "tx", "rx 1246 dma-names = "tx", "rx";
1250 power-domains = <&sys 1247 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1251 resets = <&cpg 204>; 1248 resets = <&cpg 204>;
1252 status = "disabled"; 1249 status = "disabled";
1253 }; 1250 };
1254 1251
1255 scif4: serial@e6c40000 { 1252 scif4: serial@e6c40000 {
1256 compatible = "renesas 1253 compatible = "renesas,scif-r8a77965",
1257 "renesas 1254 "renesas,rcar-gen3-scif", "renesas,scif";
1258 reg = <0 0xe6c40000 0 1255 reg = <0 0xe6c40000 0 64>;
1259 interrupts = <GIC_SPI 1256 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1260 clocks = <&cpg CPG_MO 1257 clocks = <&cpg CPG_MOD 203>,
1261 <&cpg CPG_CO 1258 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1262 <&scif_clk>; 1259 <&scif_clk>;
1263 clock-names = "fck", 1260 clock-names = "fck", "brg_int", "scif_clk";
1264 dmas = <&dmac0 0x59>, 1261 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1265 dma-names = "tx", "rx 1262 dma-names = "tx", "rx";
1266 power-domains = <&sys 1263 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1267 resets = <&cpg 203>; 1264 resets = <&cpg 203>;
1268 status = "disabled"; 1265 status = "disabled";
1269 }; 1266 };
1270 1267
1271 scif5: serial@e6f30000 { 1268 scif5: serial@e6f30000 {
1272 compatible = "renesas 1269 compatible = "renesas,scif-r8a77965",
1273 "renesas 1270 "renesas,rcar-gen3-scif", "renesas,scif";
1274 reg = <0 0xe6f30000 0 1271 reg = <0 0xe6f30000 0 64>;
1275 interrupts = <GIC_SPI 1272 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1276 clocks = <&cpg CPG_MO 1273 clocks = <&cpg CPG_MOD 202>,
1277 <&cpg CPG_CO 1274 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1278 <&scif_clk>; 1275 <&scif_clk>;
1279 clock-names = "fck", 1276 clock-names = "fck", "brg_int", "scif_clk";
1280 dmas = <&dmac1 0x5b>, 1277 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1281 <&dmac2 0x5b>, 1278 <&dmac2 0x5b>, <&dmac2 0x5a>;
1282 dma-names = "tx", "rx 1279 dma-names = "tx", "rx", "tx", "rx";
1283 power-domains = <&sys 1280 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1284 resets = <&cpg 202>; 1281 resets = <&cpg 202>;
1285 status = "disabled"; 1282 status = "disabled";
1286 }; 1283 };
1287 1284
1288 tpu: pwm@e6e80000 { 1285 tpu: pwm@e6e80000 {
1289 compatible = "renesas 1286 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1290 reg = <0 0xe6e80000 0 1287 reg = <0 0xe6e80000 0 0x148>;
1291 interrupts = <GIC_SPI 1288 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1292 clocks = <&cpg CPG_MO 1289 clocks = <&cpg CPG_MOD 304>;
1293 power-domains = <&sys 1290 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1294 resets = <&cpg 304>; 1291 resets = <&cpg 304>;
1295 #pwm-cells = <3>; 1292 #pwm-cells = <3>;
1296 status = "disabled"; 1293 status = "disabled";
1297 }; 1294 };
1298 1295
1299 msiof0: spi@e6e90000 { 1296 msiof0: spi@e6e90000 {
1300 compatible = "renesas 1297 compatible = "renesas,msiof-r8a77965",
1301 "renesas 1298 "renesas,rcar-gen3-msiof";
1302 reg = <0 0xe6e90000 0 1299 reg = <0 0xe6e90000 0 0x0064>;
1303 interrupts = <GIC_SPI 1300 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1304 clocks = <&cpg CPG_MO 1301 clocks = <&cpg CPG_MOD 211>;
1305 dmas = <&dmac1 0x41>, 1302 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1306 <&dmac2 0x41>, 1303 <&dmac2 0x41>, <&dmac2 0x40>;
1307 dma-names = "tx", "rx 1304 dma-names = "tx", "rx", "tx", "rx";
1308 power-domains = <&sys 1305 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1309 resets = <&cpg 211>; 1306 resets = <&cpg 211>;
1310 #address-cells = <1>; 1307 #address-cells = <1>;
1311 #size-cells = <0>; 1308 #size-cells = <0>;
1312 status = "disabled"; 1309 status = "disabled";
1313 }; 1310 };
1314 1311
1315 msiof1: spi@e6ea0000 { 1312 msiof1: spi@e6ea0000 {
1316 compatible = "renesas 1313 compatible = "renesas,msiof-r8a77965",
1317 "renesas 1314 "renesas,rcar-gen3-msiof";
1318 reg = <0 0xe6ea0000 0 1315 reg = <0 0xe6ea0000 0 0x0064>;
1319 interrupts = <GIC_SPI 1316 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MO 1317 clocks = <&cpg CPG_MOD 210>;
1321 dmas = <&dmac1 0x43>, 1318 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1322 <&dmac2 0x43>, 1319 <&dmac2 0x43>, <&dmac2 0x42>;
1323 dma-names = "tx", "rx 1320 dma-names = "tx", "rx", "tx", "rx";
1324 power-domains = <&sys 1321 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1325 resets = <&cpg 210>; 1322 resets = <&cpg 210>;
1326 #address-cells = <1>; 1323 #address-cells = <1>;
1327 #size-cells = <0>; 1324 #size-cells = <0>;
1328 status = "disabled"; 1325 status = "disabled";
1329 }; 1326 };
1330 1327
1331 msiof2: spi@e6c00000 { 1328 msiof2: spi@e6c00000 {
1332 compatible = "renesas 1329 compatible = "renesas,msiof-r8a77965",
1333 "renesas 1330 "renesas,rcar-gen3-msiof";
1334 reg = <0 0xe6c00000 0 1331 reg = <0 0xe6c00000 0 0x0064>;
1335 interrupts = <GIC_SPI 1332 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MO 1333 clocks = <&cpg CPG_MOD 209>;
1337 dmas = <&dmac0 0x45>, 1334 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1338 dma-names = "tx", "rx 1335 dma-names = "tx", "rx";
1339 power-domains = <&sys 1336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1340 resets = <&cpg 209>; 1337 resets = <&cpg 209>;
1341 #address-cells = <1>; 1338 #address-cells = <1>;
1342 #size-cells = <0>; 1339 #size-cells = <0>;
1343 status = "disabled"; 1340 status = "disabled";
1344 }; 1341 };
1345 1342
1346 msiof3: spi@e6c10000 { 1343 msiof3: spi@e6c10000 {
1347 compatible = "renesas 1344 compatible = "renesas,msiof-r8a77965",
1348 "renesas 1345 "renesas,rcar-gen3-msiof";
1349 reg = <0 0xe6c10000 0 1346 reg = <0 0xe6c10000 0 0x0064>;
1350 interrupts = <GIC_SPI 1347 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1351 clocks = <&cpg CPG_MO 1348 clocks = <&cpg CPG_MOD 208>;
1352 dmas = <&dmac0 0x47>, 1349 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1353 dma-names = "tx", "rx 1350 dma-names = "tx", "rx";
1354 power-domains = <&sys 1351 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1355 resets = <&cpg 208>; 1352 resets = <&cpg 208>;
1356 #address-cells = <1>; 1353 #address-cells = <1>;
1357 #size-cells = <0>; 1354 #size-cells = <0>;
1358 status = "disabled"; 1355 status = "disabled";
1359 }; 1356 };
1360 1357
1361 vin0: video@e6ef0000 { 1358 vin0: video@e6ef0000 {
1362 compatible = "renesas 1359 compatible = "renesas,vin-r8a77965";
1363 reg = <0 0xe6ef0000 0 1360 reg = <0 0xe6ef0000 0 0x1000>;
1364 interrupts = <GIC_SPI 1361 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MO 1362 clocks = <&cpg CPG_MOD 811>;
1366 power-domains = <&sys 1363 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1367 resets = <&cpg 811>; 1364 resets = <&cpg 811>;
1368 renesas,id = <0>; 1365 renesas,id = <0>;
1369 status = "disabled"; 1366 status = "disabled";
1370 1367
1371 ports { 1368 ports {
1372 #address-cell 1369 #address-cells = <1>;
1373 #size-cells = 1370 #size-cells = <0>;
1374 1371
1375 port@1 { 1372 port@1 {
1376 #addr 1373 #address-cells = <1>;
1377 #size 1374 #size-cells = <0>;
1378 1375
1379 reg = 1376 reg = <1>;
1380 1377
1381 vin0c 1378 vin0csi20: endpoint@0 {
1382 1379 reg = <0>;
1383 1380 remote-endpoint = <&csi20vin0>;
1384 }; 1381 };
1385 vin0c 1382 vin0csi40: endpoint@2 {
1386 1383 reg = <2>;
1387 1384 remote-endpoint = <&csi40vin0>;
1388 }; 1385 };
1389 }; 1386 };
1390 }; 1387 };
1391 }; 1388 };
1392 1389
1393 vin1: video@e6ef1000 { 1390 vin1: video@e6ef1000 {
1394 compatible = "renesas 1391 compatible = "renesas,vin-r8a77965";
1395 reg = <0 0xe6ef1000 0 1392 reg = <0 0xe6ef1000 0 0x1000>;
1396 interrupts = <GIC_SPI 1393 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MO 1394 clocks = <&cpg CPG_MOD 810>;
1398 power-domains = <&sys 1395 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1399 resets = <&cpg 810>; 1396 resets = <&cpg 810>;
1400 renesas,id = <1>; 1397 renesas,id = <1>;
1401 status = "disabled"; 1398 status = "disabled";
1402 1399
1403 ports { 1400 ports {
1404 #address-cell 1401 #address-cells = <1>;
1405 #size-cells = 1402 #size-cells = <0>;
1406 1403
1407 port@1 { 1404 port@1 {
1408 #addr 1405 #address-cells = <1>;
1409 #size 1406 #size-cells = <0>;
1410 1407
1411 reg = 1408 reg = <1>;
1412 1409
1413 vin1c 1410 vin1csi20: endpoint@0 {
1414 1411 reg = <0>;
1415 1412 remote-endpoint = <&csi20vin1>;
1416 }; 1413 };
1417 vin1c 1414 vin1csi40: endpoint@2 {
1418 1415 reg = <2>;
1419 1416 remote-endpoint = <&csi40vin1>;
1420 }; 1417 };
1421 }; 1418 };
1422 }; 1419 };
1423 }; 1420 };
1424 1421
1425 vin2: video@e6ef2000 { 1422 vin2: video@e6ef2000 {
1426 compatible = "renesas 1423 compatible = "renesas,vin-r8a77965";
1427 reg = <0 0xe6ef2000 0 1424 reg = <0 0xe6ef2000 0 0x1000>;
1428 interrupts = <GIC_SPI 1425 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MO 1426 clocks = <&cpg CPG_MOD 809>;
1430 power-domains = <&sys 1427 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1431 resets = <&cpg 809>; 1428 resets = <&cpg 809>;
1432 renesas,id = <2>; 1429 renesas,id = <2>;
1433 status = "disabled"; 1430 status = "disabled";
1434 1431
1435 ports { 1432 ports {
1436 #address-cell 1433 #address-cells = <1>;
1437 #size-cells = 1434 #size-cells = <0>;
1438 1435
1439 port@1 { 1436 port@1 {
1440 #addr 1437 #address-cells = <1>;
1441 #size 1438 #size-cells = <0>;
1442 1439
1443 reg = 1440 reg = <1>;
1444 1441
1445 vin2c 1442 vin2csi20: endpoint@0 {
1446 1443 reg = <0>;
1447 1444 remote-endpoint = <&csi20vin2>;
1448 }; 1445 };
1449 vin2c 1446 vin2csi40: endpoint@2 {
1450 1447 reg = <2>;
1451 1448 remote-endpoint = <&csi40vin2>;
1452 }; 1449 };
1453 }; 1450 };
1454 }; 1451 };
1455 }; 1452 };
1456 1453
1457 vin3: video@e6ef3000 { 1454 vin3: video@e6ef3000 {
1458 compatible = "renesas 1455 compatible = "renesas,vin-r8a77965";
1459 reg = <0 0xe6ef3000 0 1456 reg = <0 0xe6ef3000 0 0x1000>;
1460 interrupts = <GIC_SPI 1457 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MO 1458 clocks = <&cpg CPG_MOD 808>;
1462 power-domains = <&sys 1459 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1463 resets = <&cpg 808>; 1460 resets = <&cpg 808>;
1464 renesas,id = <3>; 1461 renesas,id = <3>;
1465 status = "disabled"; 1462 status = "disabled";
1466 1463
1467 ports { 1464 ports {
1468 #address-cell 1465 #address-cells = <1>;
1469 #size-cells = 1466 #size-cells = <0>;
1470 1467
1471 port@1 { 1468 port@1 {
1472 #addr 1469 #address-cells = <1>;
1473 #size 1470 #size-cells = <0>;
1474 1471
1475 reg = 1472 reg = <1>;
1476 1473
1477 vin3c 1474 vin3csi20: endpoint@0 {
1478 1475 reg = <0>;
1479 1476 remote-endpoint = <&csi20vin3>;
1480 }; 1477 };
1481 vin3c 1478 vin3csi40: endpoint@2 {
1482 1479 reg = <2>;
1483 1480 remote-endpoint = <&csi40vin3>;
1484 }; 1481 };
1485 }; 1482 };
1486 }; 1483 };
1487 }; 1484 };
1488 1485
1489 vin4: video@e6ef4000 { 1486 vin4: video@e6ef4000 {
1490 compatible = "renesas 1487 compatible = "renesas,vin-r8a77965";
1491 reg = <0 0xe6ef4000 0 1488 reg = <0 0xe6ef4000 0 0x1000>;
1492 interrupts = <GIC_SPI 1489 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MO 1490 clocks = <&cpg CPG_MOD 807>;
1494 power-domains = <&sys 1491 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1495 resets = <&cpg 807>; 1492 resets = <&cpg 807>;
1496 renesas,id = <4>; 1493 renesas,id = <4>;
1497 status = "disabled"; 1494 status = "disabled";
1498 1495
1499 ports { 1496 ports {
1500 #address-cell 1497 #address-cells = <1>;
1501 #size-cells = 1498 #size-cells = <0>;
1502 1499
1503 port@1 { 1500 port@1 {
1504 #addr 1501 #address-cells = <1>;
1505 #size 1502 #size-cells = <0>;
1506 1503
1507 reg = 1504 reg = <1>;
1508 1505
1509 vin4c 1506 vin4csi20: endpoint@0 {
1510 1507 reg = <0>;
1511 1508 remote-endpoint = <&csi20vin4>;
1512 }; 1509 };
1513 vin4c 1510 vin4csi40: endpoint@2 {
1514 1511 reg = <2>;
1515 1512 remote-endpoint = <&csi40vin4>;
1516 }; 1513 };
1517 }; 1514 };
1518 }; 1515 };
1519 }; 1516 };
1520 1517
1521 vin5: video@e6ef5000 { 1518 vin5: video@e6ef5000 {
1522 compatible = "renesas 1519 compatible = "renesas,vin-r8a77965";
1523 reg = <0 0xe6ef5000 0 1520 reg = <0 0xe6ef5000 0 0x1000>;
1524 interrupts = <GIC_SPI 1521 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MO 1522 clocks = <&cpg CPG_MOD 806>;
1526 power-domains = <&sys 1523 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1527 resets = <&cpg 806>; 1524 resets = <&cpg 806>;
1528 renesas,id = <5>; 1525 renesas,id = <5>;
1529 status = "disabled"; 1526 status = "disabled";
1530 1527
1531 ports { 1528 ports {
1532 #address-cell 1529 #address-cells = <1>;
1533 #size-cells = 1530 #size-cells = <0>;
1534 1531
1535 port@1 { 1532 port@1 {
1536 #addr 1533 #address-cells = <1>;
1537 #size 1534 #size-cells = <0>;
1538 1535
1539 reg = 1536 reg = <1>;
1540 1537
1541 vin5c 1538 vin5csi20: endpoint@0 {
1542 1539 reg = <0>;
1543 1540 remote-endpoint = <&csi20vin5>;
1544 }; 1541 };
1545 vin5c 1542 vin5csi40: endpoint@2 {
1546 1543 reg = <2>;
1547 1544 remote-endpoint = <&csi40vin5>;
1548 }; 1545 };
1549 }; 1546 };
1550 }; 1547 };
1551 }; 1548 };
1552 1549
1553 vin6: video@e6ef6000 { 1550 vin6: video@e6ef6000 {
1554 compatible = "renesas 1551 compatible = "renesas,vin-r8a77965";
1555 reg = <0 0xe6ef6000 0 1552 reg = <0 0xe6ef6000 0 0x1000>;
1556 interrupts = <GIC_SPI 1553 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1557 clocks = <&cpg CPG_MO 1554 clocks = <&cpg CPG_MOD 805>;
1558 power-domains = <&sys 1555 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1559 resets = <&cpg 805>; 1556 resets = <&cpg 805>;
1560 renesas,id = <6>; 1557 renesas,id = <6>;
1561 status = "disabled"; 1558 status = "disabled";
1562 1559
1563 ports { 1560 ports {
1564 #address-cell 1561 #address-cells = <1>;
1565 #size-cells = 1562 #size-cells = <0>;
1566 1563
1567 port@1 { 1564 port@1 {
1568 #addr 1565 #address-cells = <1>;
1569 #size 1566 #size-cells = <0>;
1570 1567
1571 reg = 1568 reg = <1>;
1572 1569
1573 vin6c 1570 vin6csi20: endpoint@0 {
1574 1571 reg = <0>;
1575 1572 remote-endpoint = <&csi20vin6>;
1576 }; 1573 };
1577 vin6c 1574 vin6csi40: endpoint@2 {
1578 1575 reg = <2>;
1579 1576 remote-endpoint = <&csi40vin6>;
1580 }; 1577 };
1581 }; 1578 };
1582 }; 1579 };
1583 }; 1580 };
1584 1581
1585 vin7: video@e6ef7000 { 1582 vin7: video@e6ef7000 {
1586 compatible = "renesas 1583 compatible = "renesas,vin-r8a77965";
1587 reg = <0 0xe6ef7000 0 1584 reg = <0 0xe6ef7000 0 0x1000>;
1588 interrupts = <GIC_SPI 1585 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1589 clocks = <&cpg CPG_MO 1586 clocks = <&cpg CPG_MOD 804>;
1590 power-domains = <&sys 1587 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1591 resets = <&cpg 804>; 1588 resets = <&cpg 804>;
1592 renesas,id = <7>; 1589 renesas,id = <7>;
1593 status = "disabled"; 1590 status = "disabled";
1594 1591
1595 ports { 1592 ports {
1596 #address-cell 1593 #address-cells = <1>;
1597 #size-cells = 1594 #size-cells = <0>;
1598 1595
1599 port@1 { 1596 port@1 {
1600 #addr 1597 #address-cells = <1>;
1601 #size 1598 #size-cells = <0>;
1602 1599
1603 reg = 1600 reg = <1>;
1604 1601
1605 vin7c 1602 vin7csi20: endpoint@0 {
1606 1603 reg = <0>;
1607 1604 remote-endpoint = <&csi20vin7>;
1608 }; 1605 };
1609 vin7c 1606 vin7csi40: endpoint@2 {
1610 1607 reg = <2>;
1611 1608 remote-endpoint = <&csi40vin7>;
1612 }; 1609 };
1613 }; 1610 };
1614 }; 1611 };
1615 }; 1612 };
1616 1613
1617 drif00: rif@e6f40000 { 1614 drif00: rif@e6f40000 {
1618 compatible = "renesas 1615 compatible = "renesas,r8a77965-drif",
1619 "renesas 1616 "renesas,rcar-gen3-drif";
1620 reg = <0 0xe6f40000 0 1617 reg = <0 0xe6f40000 0 0x84>;
1621 interrupts = <GIC_SPI 1618 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1622 clocks = <&cpg CPG_MO 1619 clocks = <&cpg CPG_MOD 515>;
1623 clock-names = "fck"; 1620 clock-names = "fck";
1624 dmas = <&dmac1 0x20>, 1621 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1625 dma-names = "rx", "rx 1622 dma-names = "rx", "rx";
1626 power-domains = <&sys 1623 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1627 resets = <&cpg 515>; 1624 resets = <&cpg 515>;
1628 renesas,bonding = <&d 1625 renesas,bonding = <&drif01>;
1629 status = "disabled"; 1626 status = "disabled";
1630 }; 1627 };
1631 1628
1632 drif01: rif@e6f50000 { 1629 drif01: rif@e6f50000 {
1633 compatible = "renesas 1630 compatible = "renesas,r8a77965-drif",
1634 "renesas 1631 "renesas,rcar-gen3-drif";
1635 reg = <0 0xe6f50000 0 1632 reg = <0 0xe6f50000 0 0x84>;
1636 interrupts = <GIC_SPI 1633 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1637 clocks = <&cpg CPG_MO 1634 clocks = <&cpg CPG_MOD 514>;
1638 clock-names = "fck"; 1635 clock-names = "fck";
1639 dmas = <&dmac1 0x22>, 1636 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1640 dma-names = "rx", "rx 1637 dma-names = "rx", "rx";
1641 power-domains = <&sys 1638 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1642 resets = <&cpg 514>; 1639 resets = <&cpg 514>;
1643 renesas,bonding = <&d 1640 renesas,bonding = <&drif00>;
1644 status = "disabled"; 1641 status = "disabled";
1645 }; 1642 };
1646 1643
1647 drif10: rif@e6f60000 { 1644 drif10: rif@e6f60000 {
1648 compatible = "renesas 1645 compatible = "renesas,r8a77965-drif",
1649 "renesas 1646 "renesas,rcar-gen3-drif";
1650 reg = <0 0xe6f60000 0 1647 reg = <0 0xe6f60000 0 0x84>;
1651 interrupts = <GIC_SPI 1648 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1652 clocks = <&cpg CPG_MO 1649 clocks = <&cpg CPG_MOD 513>;
1653 clock-names = "fck"; 1650 clock-names = "fck";
1654 dmas = <&dmac1 0x24>, 1651 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1655 dma-names = "rx", "rx 1652 dma-names = "rx", "rx";
1656 power-domains = <&sys 1653 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1657 resets = <&cpg 513>; 1654 resets = <&cpg 513>;
1658 renesas,bonding = <&d 1655 renesas,bonding = <&drif11>;
1659 status = "disabled"; 1656 status = "disabled";
1660 }; 1657 };
1661 1658
1662 drif11: rif@e6f70000 { 1659 drif11: rif@e6f70000 {
1663 compatible = "renesas 1660 compatible = "renesas,r8a77965-drif",
1664 "renesas 1661 "renesas,rcar-gen3-drif";
1665 reg = <0 0xe6f70000 0 1662 reg = <0 0xe6f70000 0 0x84>;
1666 interrupts = <GIC_SPI 1663 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1667 clocks = <&cpg CPG_MO 1664 clocks = <&cpg CPG_MOD 512>;
1668 clock-names = "fck"; 1665 clock-names = "fck";
1669 dmas = <&dmac1 0x26>, 1666 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1670 dma-names = "rx", "rx 1667 dma-names = "rx", "rx";
1671 power-domains = <&sys 1668 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1672 resets = <&cpg 512>; 1669 resets = <&cpg 512>;
1673 renesas,bonding = <&d 1670 renesas,bonding = <&drif10>;
1674 status = "disabled"; 1671 status = "disabled";
1675 }; 1672 };
1676 1673
1677 drif20: rif@e6f80000 { 1674 drif20: rif@e6f80000 {
1678 compatible = "renesas 1675 compatible = "renesas,r8a77965-drif",
1679 "renesas 1676 "renesas,rcar-gen3-drif";
1680 reg = <0 0xe6f80000 0 1677 reg = <0 0xe6f80000 0 0x84>;
1681 interrupts = <GIC_SPI 1678 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1682 clocks = <&cpg CPG_MO 1679 clocks = <&cpg CPG_MOD 511>;
1683 clock-names = "fck"; 1680 clock-names = "fck";
1684 dmas = <&dmac1 0x28>, 1681 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1685 dma-names = "rx", "rx 1682 dma-names = "rx", "rx";
1686 power-domains = <&sys 1683 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1687 resets = <&cpg 511>; 1684 resets = <&cpg 511>;
1688 renesas,bonding = <&d 1685 renesas,bonding = <&drif21>;
1689 status = "disabled"; 1686 status = "disabled";
1690 }; 1687 };
1691 1688
1692 drif21: rif@e6f90000 { 1689 drif21: rif@e6f90000 {
1693 compatible = "renesas 1690 compatible = "renesas,r8a77965-drif",
1694 "renesas 1691 "renesas,rcar-gen3-drif";
1695 reg = <0 0xe6f90000 0 1692 reg = <0 0xe6f90000 0 0x84>;
1696 interrupts = <GIC_SPI 1693 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1697 clocks = <&cpg CPG_MO 1694 clocks = <&cpg CPG_MOD 510>;
1698 clock-names = "fck"; 1695 clock-names = "fck";
1699 dmas = <&dmac1 0x2a>, 1696 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1700 dma-names = "rx", "rx 1697 dma-names = "rx", "rx";
1701 power-domains = <&sys 1698 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1702 resets = <&cpg 510>; 1699 resets = <&cpg 510>;
1703 renesas,bonding = <&d 1700 renesas,bonding = <&drif20>;
1704 status = "disabled"; 1701 status = "disabled";
1705 }; 1702 };
1706 1703
1707 drif30: rif@e6fa0000 { 1704 drif30: rif@e6fa0000 {
1708 compatible = "renesas 1705 compatible = "renesas,r8a77965-drif",
1709 "renesas 1706 "renesas,rcar-gen3-drif";
1710 reg = <0 0xe6fa0000 0 1707 reg = <0 0xe6fa0000 0 0x84>;
1711 interrupts = <GIC_SPI 1708 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1712 clocks = <&cpg CPG_MO 1709 clocks = <&cpg CPG_MOD 509>;
1713 clock-names = "fck"; 1710 clock-names = "fck";
1714 dmas = <&dmac1 0x2c>, 1711 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1715 dma-names = "rx", "rx 1712 dma-names = "rx", "rx";
1716 power-domains = <&sys 1713 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1717 resets = <&cpg 509>; 1714 resets = <&cpg 509>;
1718 renesas,bonding = <&d 1715 renesas,bonding = <&drif31>;
1719 status = "disabled"; 1716 status = "disabled";
1720 }; 1717 };
1721 1718
1722 drif31: rif@e6fb0000 { 1719 drif31: rif@e6fb0000 {
1723 compatible = "renesas 1720 compatible = "renesas,r8a77965-drif",
1724 "renesas 1721 "renesas,rcar-gen3-drif";
1725 reg = <0 0xe6fb0000 0 1722 reg = <0 0xe6fb0000 0 0x84>;
1726 interrupts = <GIC_SPI 1723 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1727 clocks = <&cpg CPG_MO 1724 clocks = <&cpg CPG_MOD 508>;
1728 clock-names = "fck"; 1725 clock-names = "fck";
1729 dmas = <&dmac1 0x2e>, 1726 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1730 dma-names = "rx", "rx 1727 dma-names = "rx", "rx";
1731 power-domains = <&sys 1728 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1732 resets = <&cpg 508>; 1729 resets = <&cpg 508>;
1733 renesas,bonding = <&d 1730 renesas,bonding = <&drif30>;
1734 status = "disabled"; 1731 status = "disabled";
1735 }; 1732 };
1736 1733
1737 rcar_sound: sound@ec500000 { 1734 rcar_sound: sound@ec500000 {
1738 /* 1735 /*
1739 * #sound-dai-cells i 1736 * #sound-dai-cells is required if simple-card
1740 * 1737 *
1741 * Single DAI : #soun 1738 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1742 * Multi DAI : #soun 1739 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1743 */ 1740 */
1744 /* 1741 /*
1745 * #clock-cells is re 1742 * #clock-cells is required for audio_clkout0/1/2/3
1746 * 1743 *
1747 * clkout : #cl 1744 * clkout : #clock-cells = <0>; <&rcar_sound>;
1748 * clkout0/1/2/3: #cl 1745 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1749 */ 1746 */
1750 compatible = "renesas 1747 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1751 reg = <0 0xec500000 0 1748 reg = <0 0xec500000 0 0x1000>, /* SCU */
1752 <0 0xec5a0000 0 1749 <0 0xec5a0000 0 0x100>, /* ADG */
1753 <0 0xec540000 0 1750 <0 0xec540000 0 0x1000>, /* SSIU */
1754 <0 0xec541000 0 1751 <0 0xec541000 0 0x280>, /* SSI */
1755 <0 0xec760000 0 1752 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1756 reg-names = "scu", "a 1753 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1757 1754
1758 clocks = <&cpg CPG_MO 1755 clocks = <&cpg CPG_MOD 1005>,
1759 <&cpg CPG_MO 1756 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1760 <&cpg CPG_MO 1757 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1761 <&cpg CPG_MO 1758 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1762 <&cpg CPG_MO 1759 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1763 <&cpg CPG_MO 1760 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1764 <&cpg CPG_MO 1761 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1765 <&cpg CPG_MO 1762 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1766 <&cpg CPG_MO 1763 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1767 <&cpg CPG_MO 1764 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1768 <&cpg CPG_MO 1765 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1769 <&cpg CPG_MO 1766 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1770 <&cpg CPG_MO 1767 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1771 <&cpg CPG_MO 1768 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1772 <&audio_clk_ 1769 <&audio_clk_a>, <&audio_clk_b>,
1773 <&audio_clk_ 1770 <&audio_clk_c>,
1774 <&cpg CPG_MO !! 1771 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1775 clock-names = "ssi-al 1772 clock-names = "ssi-all",
1776 "ssi.9" 1773 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1777 "ssi.5" 1774 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1778 "ssi.1" 1775 "ssi.1", "ssi.0",
1779 "src.9" 1776 "src.9", "src.8", "src.7", "src.6",
1780 "src.5" 1777 "src.5", "src.4", "src.3", "src.2",
1781 "src.1" 1778 "src.1", "src.0",
1782 "mix.1" 1779 "mix.1", "mix.0",
1783 "ctu.1" 1780 "ctu.1", "ctu.0",
1784 "dvc.0" 1781 "dvc.0", "dvc.1",
1785 "clk_a" 1782 "clk_a", "clk_b", "clk_c", "clk_i";
1786 power-domains = <&sys 1783 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1787 resets = <&cpg 1005>, 1784 resets = <&cpg 1005>,
1788 <&cpg 1006>, 1785 <&cpg 1006>, <&cpg 1007>,
1789 <&cpg 1008>, 1786 <&cpg 1008>, <&cpg 1009>,
1790 <&cpg 1010>, 1787 <&cpg 1010>, <&cpg 1011>,
1791 <&cpg 1012>, 1788 <&cpg 1012>, <&cpg 1013>,
1792 <&cpg 1014>, 1789 <&cpg 1014>, <&cpg 1015>;
1793 reset-names = "ssi-al 1790 reset-names = "ssi-all",
1794 "ssi.9" 1791 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1795 "ssi.5" 1792 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1796 "ssi.1" 1793 "ssi.1", "ssi.0";
1797 status = "disabled"; 1794 status = "disabled";
1798 1795
1799 rcar_sound,dvc { 1796 rcar_sound,dvc {
1800 dvc0: dvc-0 { 1797 dvc0: dvc-0 {
1801 dmas 1798 dmas = <&audma1 0xbc>;
1802 dma-n 1799 dma-names = "tx";
1803 }; 1800 };
1804 dvc1: dvc-1 { 1801 dvc1: dvc-1 {
1805 dmas 1802 dmas = <&audma1 0xbe>;
1806 dma-n 1803 dma-names = "tx";
1807 }; 1804 };
1808 }; 1805 };
1809 1806
1810 rcar_sound,mix { 1807 rcar_sound,mix {
1811 mix0: mix-0 { 1808 mix0: mix-0 { };
1812 mix1: mix-1 { 1809 mix1: mix-1 { };
1813 }; 1810 };
1814 1811
1815 rcar_sound,ctu { 1812 rcar_sound,ctu {
1816 ctu00: ctu-0 1813 ctu00: ctu-0 { };
1817 ctu01: ctu-1 1814 ctu01: ctu-1 { };
1818 ctu02: ctu-2 1815 ctu02: ctu-2 { };
1819 ctu03: ctu-3 1816 ctu03: ctu-3 { };
1820 ctu10: ctu-4 1817 ctu10: ctu-4 { };
1821 ctu11: ctu-5 1818 ctu11: ctu-5 { };
1822 ctu12: ctu-6 1819 ctu12: ctu-6 { };
1823 ctu13: ctu-7 1820 ctu13: ctu-7 { };
1824 }; 1821 };
1825 1822
1826 rcar_sound,src { 1823 rcar_sound,src {
1827 src0: src-0 { 1824 src0: src-0 {
1828 inter 1825 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas 1826 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1830 dma-n 1827 dma-names = "rx", "tx";
1831 }; 1828 };
1832 src1: src-1 { 1829 src1: src-1 {
1833 inter 1830 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas 1831 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1835 dma-n 1832 dma-names = "rx", "tx";
1836 }; 1833 };
1837 src2: src-2 { 1834 src2: src-2 {
1838 inter 1835 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas 1836 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1840 dma-n 1837 dma-names = "rx", "tx";
1841 }; 1838 };
1842 src3: src-3 { 1839 src3: src-3 {
1843 inter 1840 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas 1841 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1845 dma-n 1842 dma-names = "rx", "tx";
1846 }; 1843 };
1847 src4: src-4 { 1844 src4: src-4 {
1848 inter 1845 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas 1846 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1850 dma-n 1847 dma-names = "rx", "tx";
1851 }; 1848 };
1852 src5: src-5 { 1849 src5: src-5 {
1853 inter 1850 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas 1851 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1855 dma-n 1852 dma-names = "rx", "tx";
1856 }; 1853 };
1857 src6: src-6 { 1854 src6: src-6 {
1858 inter 1855 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas 1856 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1860 dma-n 1857 dma-names = "rx", "tx";
1861 }; 1858 };
1862 src7: src-7 { 1859 src7: src-7 {
1863 inter 1860 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1864 dmas 1861 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1865 dma-n 1862 dma-names = "rx", "tx";
1866 }; 1863 };
1867 src8: src-8 { 1864 src8: src-8 {
1868 inter 1865 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1869 dmas 1866 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1870 dma-n 1867 dma-names = "rx", "tx";
1871 }; 1868 };
1872 src9: src-9 { 1869 src9: src-9 {
1873 inter 1870 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1874 dmas 1871 dmas = <&audma0 0x97>, <&audma1 0xba>;
1875 dma-n 1872 dma-names = "rx", "tx";
1876 }; 1873 };
1877 }; 1874 };
1878 1875
1879 rcar_sound,ssiu { 1876 rcar_sound,ssiu {
1880 ssiu00: ssiu- 1877 ssiu00: ssiu-0 {
1881 dmas 1878 dmas = <&audma0 0x15>, <&audma1 0x16>;
1882 dma-n 1879 dma-names = "rx", "tx";
1883 }; 1880 };
1884 ssiu01: ssiu- 1881 ssiu01: ssiu-1 {
1885 dmas 1882 dmas = <&audma0 0x35>, <&audma1 0x36>;
1886 dma-n 1883 dma-names = "rx", "tx";
1887 }; 1884 };
1888 ssiu02: ssiu- 1885 ssiu02: ssiu-2 {
1889 dmas 1886 dmas = <&audma0 0x37>, <&audma1 0x38>;
1890 dma-n 1887 dma-names = "rx", "tx";
1891 }; 1888 };
1892 ssiu03: ssiu- 1889 ssiu03: ssiu-3 {
1893 dmas 1890 dmas = <&audma0 0x47>, <&audma1 0x48>;
1894 dma-n 1891 dma-names = "rx", "tx";
1895 }; 1892 };
1896 ssiu04: ssiu- 1893 ssiu04: ssiu-4 {
1897 dmas 1894 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1898 dma-n 1895 dma-names = "rx", "tx";
1899 }; 1896 };
1900 ssiu05: ssiu- 1897 ssiu05: ssiu-5 {
1901 dmas 1898 dmas = <&audma0 0x43>, <&audma1 0x44>;
1902 dma-n 1899 dma-names = "rx", "tx";
1903 }; 1900 };
1904 ssiu06: ssiu- 1901 ssiu06: ssiu-6 {
1905 dmas 1902 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1906 dma-n 1903 dma-names = "rx", "tx";
1907 }; 1904 };
1908 ssiu07: ssiu- 1905 ssiu07: ssiu-7 {
1909 dmas 1906 dmas = <&audma0 0x53>, <&audma1 0x54>;
1910 dma-n 1907 dma-names = "rx", "tx";
1911 }; 1908 };
1912 ssiu10: ssiu- 1909 ssiu10: ssiu-8 {
1913 dmas 1910 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1914 dma-n 1911 dma-names = "rx", "tx";
1915 }; 1912 };
1916 ssiu11: ssiu- 1913 ssiu11: ssiu-9 {
1917 dmas 1914 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1918 dma-n 1915 dma-names = "rx", "tx";
1919 }; 1916 };
1920 ssiu12: ssiu- 1917 ssiu12: ssiu-10 {
1921 dmas 1918 dmas = <&audma0 0x57>, <&audma1 0x58>;
1922 dma-n 1919 dma-names = "rx", "tx";
1923 }; 1920 };
1924 ssiu13: ssiu- 1921 ssiu13: ssiu-11 {
1925 dmas 1922 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1926 dma-n 1923 dma-names = "rx", "tx";
1927 }; 1924 };
1928 ssiu14: ssiu- 1925 ssiu14: ssiu-12 {
1929 dmas 1926 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1930 dma-n 1927 dma-names = "rx", "tx";
1931 }; 1928 };
1932 ssiu15: ssiu- 1929 ssiu15: ssiu-13 {
1933 dmas 1930 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1934 dma-n 1931 dma-names = "rx", "tx";
1935 }; 1932 };
1936 ssiu16: ssiu- 1933 ssiu16: ssiu-14 {
1937 dmas 1934 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1938 dma-n 1935 dma-names = "rx", "tx";
1939 }; 1936 };
1940 ssiu17: ssiu- 1937 ssiu17: ssiu-15 {
1941 dmas 1938 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1942 dma-n 1939 dma-names = "rx", "tx";
1943 }; 1940 };
1944 ssiu20: ssiu- 1941 ssiu20: ssiu-16 {
1945 dmas 1942 dmas = <&audma0 0x63>, <&audma1 0x64>;
1946 dma-n 1943 dma-names = "rx", "tx";
1947 }; 1944 };
1948 ssiu21: ssiu- 1945 ssiu21: ssiu-17 {
1949 dmas 1946 dmas = <&audma0 0x67>, <&audma1 0x68>;
1950 dma-n 1947 dma-names = "rx", "tx";
1951 }; 1948 };
1952 ssiu22: ssiu- 1949 ssiu22: ssiu-18 {
1953 dmas 1950 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1954 dma-n 1951 dma-names = "rx", "tx";
1955 }; 1952 };
1956 ssiu23: ssiu- 1953 ssiu23: ssiu-19 {
1957 dmas 1954 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1958 dma-n 1955 dma-names = "rx", "tx";
1959 }; 1956 };
1960 ssiu24: ssiu- 1957 ssiu24: ssiu-20 {
1961 dmas 1958 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1962 dma-n 1959 dma-names = "rx", "tx";
1963 }; 1960 };
1964 ssiu25: ssiu- 1961 ssiu25: ssiu-21 {
1965 dmas 1962 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1966 dma-n 1963 dma-names = "rx", "tx";
1967 }; 1964 };
1968 ssiu26: ssiu- 1965 ssiu26: ssiu-22 {
1969 dmas 1966 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1970 dma-n 1967 dma-names = "rx", "tx";
1971 }; 1968 };
1972 ssiu27: ssiu- 1969 ssiu27: ssiu-23 {
1973 dmas 1970 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1974 dma-n 1971 dma-names = "rx", "tx";
1975 }; 1972 };
1976 ssiu30: ssiu- 1973 ssiu30: ssiu-24 {
1977 dmas 1974 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1978 dma-n 1975 dma-names = "rx", "tx";
1979 }; 1976 };
1980 ssiu31: ssiu- 1977 ssiu31: ssiu-25 {
1981 dmas 1978 dmas = <&audma0 0x21>, <&audma1 0x22>;
1982 dma-n 1979 dma-names = "rx", "tx";
1983 }; 1980 };
1984 ssiu32: ssiu- 1981 ssiu32: ssiu-26 {
1985 dmas 1982 dmas = <&audma0 0x23>, <&audma1 0x24>;
1986 dma-n 1983 dma-names = "rx", "tx";
1987 }; 1984 };
1988 ssiu33: ssiu- 1985 ssiu33: ssiu-27 {
1989 dmas 1986 dmas = <&audma0 0x25>, <&audma1 0x26>;
1990 dma-n 1987 dma-names = "rx", "tx";
1991 }; 1988 };
1992 ssiu34: ssiu- 1989 ssiu34: ssiu-28 {
1993 dmas 1990 dmas = <&audma0 0x27>, <&audma1 0x28>;
1994 dma-n 1991 dma-names = "rx", "tx";
1995 }; 1992 };
1996 ssiu35: ssiu- 1993 ssiu35: ssiu-29 {
1997 dmas 1994 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1998 dma-n 1995 dma-names = "rx", "tx";
1999 }; 1996 };
2000 ssiu36: ssiu- 1997 ssiu36: ssiu-30 {
2001 dmas 1998 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2002 dma-n 1999 dma-names = "rx", "tx";
2003 }; 2000 };
2004 ssiu37: ssiu- 2001 ssiu37: ssiu-31 {
2005 dmas 2002 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2006 dma-n 2003 dma-names = "rx", "tx";
2007 }; 2004 };
2008 ssiu40: ssiu- 2005 ssiu40: ssiu-32 {
2009 dmas 2006 dmas = <&audma0 0x71>, <&audma1 0x72>;
2010 dma-n 2007 dma-names = "rx", "tx";
2011 }; 2008 };
2012 ssiu41: ssiu- 2009 ssiu41: ssiu-33 {
2013 dmas 2010 dmas = <&audma0 0x17>, <&audma1 0x18>;
2014 dma-n 2011 dma-names = "rx", "tx";
2015 }; 2012 };
2016 ssiu42: ssiu- 2013 ssiu42: ssiu-34 {
2017 dmas 2014 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2018 dma-n 2015 dma-names = "rx", "tx";
2019 }; 2016 };
2020 ssiu43: ssiu- 2017 ssiu43: ssiu-35 {
2021 dmas 2018 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2022 dma-n 2019 dma-names = "rx", "tx";
2023 }; 2020 };
2024 ssiu44: ssiu- 2021 ssiu44: ssiu-36 {
2025 dmas 2022 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2026 dma-n 2023 dma-names = "rx", "tx";
2027 }; 2024 };
2028 ssiu45: ssiu- 2025 ssiu45: ssiu-37 {
2029 dmas 2026 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2030 dma-n 2027 dma-names = "rx", "tx";
2031 }; 2028 };
2032 ssiu46: ssiu- 2029 ssiu46: ssiu-38 {
2033 dmas 2030 dmas = <&audma0 0x31>, <&audma1 0x32>;
2034 dma-n 2031 dma-names = "rx", "tx";
2035 }; 2032 };
2036 ssiu47: ssiu- 2033 ssiu47: ssiu-39 {
2037 dmas 2034 dmas = <&audma0 0x33>, <&audma1 0x34>;
2038 dma-n 2035 dma-names = "rx", "tx";
2039 }; 2036 };
2040 ssiu50: ssiu- 2037 ssiu50: ssiu-40 {
2041 dmas 2038 dmas = <&audma0 0x73>, <&audma1 0x74>;
2042 dma-n 2039 dma-names = "rx", "tx";
2043 }; 2040 };
2044 ssiu60: ssiu- 2041 ssiu60: ssiu-41 {
2045 dmas 2042 dmas = <&audma0 0x75>, <&audma1 0x76>;
2046 dma-n 2043 dma-names = "rx", "tx";
2047 }; 2044 };
2048 ssiu70: ssiu- 2045 ssiu70: ssiu-42 {
2049 dmas 2046 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2050 dma-n 2047 dma-names = "rx", "tx";
2051 }; 2048 };
2052 ssiu80: ssiu- 2049 ssiu80: ssiu-43 {
2053 dmas 2050 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2054 dma-n 2051 dma-names = "rx", "tx";
2055 }; 2052 };
2056 ssiu90: ssiu- 2053 ssiu90: ssiu-44 {
2057 dmas 2054 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2058 dma-n 2055 dma-names = "rx", "tx";
2059 }; 2056 };
2060 ssiu91: ssiu- 2057 ssiu91: ssiu-45 {
2061 dmas 2058 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2062 dma-n 2059 dma-names = "rx", "tx";
2063 }; 2060 };
2064 ssiu92: ssiu- 2061 ssiu92: ssiu-46 {
2065 dmas 2062 dmas = <&audma0 0x81>, <&audma1 0x82>;
2066 dma-n 2063 dma-names = "rx", "tx";
2067 }; 2064 };
2068 ssiu93: ssiu- 2065 ssiu93: ssiu-47 {
2069 dmas 2066 dmas = <&audma0 0x83>, <&audma1 0x84>;
2070 dma-n 2067 dma-names = "rx", "tx";
2071 }; 2068 };
2072 ssiu94: ssiu- 2069 ssiu94: ssiu-48 {
2073 dmas 2070 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2074 dma-n 2071 dma-names = "rx", "tx";
2075 }; 2072 };
2076 ssiu95: ssiu- 2073 ssiu95: ssiu-49 {
2077 dmas 2074 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2078 dma-n 2075 dma-names = "rx", "tx";
2079 }; 2076 };
2080 ssiu96: ssiu- 2077 ssiu96: ssiu-50 {
2081 dmas 2078 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2082 dma-n 2079 dma-names = "rx", "tx";
2083 }; 2080 };
2084 ssiu97: ssiu- 2081 ssiu97: ssiu-51 {
2085 dmas 2082 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2086 dma-n 2083 dma-names = "rx", "tx";
2087 }; 2084 };
2088 }; 2085 };
2089 2086
2090 rcar_sound,ssi { 2087 rcar_sound,ssi {
2091 ssi0: ssi-0 { 2088 ssi0: ssi-0 {
2092 inter 2089 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2093 dmas 2090 dmas = <&audma0 0x01>, <&audma1 0x02>;
2094 dma-n 2091 dma-names = "rx", "tx";
2095 }; 2092 };
2096 ssi1: ssi-1 { 2093 ssi1: ssi-1 {
2097 inter 2094 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2098 dmas 2095 dmas = <&audma0 0x03>, <&audma1 0x04>;
2099 dma-n 2096 dma-names = "rx", "tx";
2100 }; 2097 };
2101 ssi2: ssi-2 { 2098 ssi2: ssi-2 {
2102 inter 2099 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2103 dmas 2100 dmas = <&audma0 0x05>, <&audma1 0x06>;
2104 dma-n 2101 dma-names = "rx", "tx";
2105 }; 2102 };
2106 ssi3: ssi-3 { 2103 ssi3: ssi-3 {
2107 inter 2104 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2108 dmas 2105 dmas = <&audma0 0x07>, <&audma1 0x08>;
2109 dma-n 2106 dma-names = "rx", "tx";
2110 }; 2107 };
2111 ssi4: ssi-4 { 2108 ssi4: ssi-4 {
2112 inter 2109 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2113 dmas 2110 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2114 dma-n 2111 dma-names = "rx", "tx";
2115 }; 2112 };
2116 ssi5: ssi-5 { 2113 ssi5: ssi-5 {
2117 inter 2114 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2118 dmas 2115 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2119 dma-n 2116 dma-names = "rx", "tx";
2120 }; 2117 };
2121 ssi6: ssi-6 { 2118 ssi6: ssi-6 {
2122 inter 2119 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2123 dmas 2120 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2124 dma-n 2121 dma-names = "rx", "tx";
2125 }; 2122 };
2126 ssi7: ssi-7 { 2123 ssi7: ssi-7 {
2127 inter 2124 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2128 dmas 2125 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2129 dma-n 2126 dma-names = "rx", "tx";
2130 }; 2127 };
2131 ssi8: ssi-8 { 2128 ssi8: ssi-8 {
2132 inter 2129 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2133 dmas 2130 dmas = <&audma0 0x11>, <&audma1 0x12>;
2134 dma-n 2131 dma-names = "rx", "tx";
2135 }; 2132 };
2136 ssi9: ssi-9 { 2133 ssi9: ssi-9 {
2137 inter 2134 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2138 dmas 2135 dmas = <&audma0 0x13>, <&audma1 0x14>;
2139 dma-n 2136 dma-names = "rx", "tx";
2140 }; 2137 };
2141 }; 2138 };
2142 }; 2139 };
2143 2140
2144 mlp: mlp@ec520000 { 2141 mlp: mlp@ec520000 {
2145 compatible = "renesas 2142 compatible = "renesas,r8a77965-mlp",
2146 "renesas 2143 "renesas,rcar-gen3-mlp";
2147 reg = <0 0xec520000 0 2144 reg = <0 0xec520000 0 0x800>;
2148 interrupts = <GIC_SPI 2145 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2149 <GIC_SPI 385 2146 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2150 clocks = <&cpg CPG_MO 2147 clocks = <&cpg CPG_MOD 802>;
2151 power-domains = <&sys 2148 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2152 resets = <&cpg 802>; 2149 resets = <&cpg 802>;
2153 status = "disabled"; 2150 status = "disabled";
2154 }; 2151 };
2155 2152
2156 audma0: dma-controller@ec7000 2153 audma0: dma-controller@ec700000 {
2157 compatible = "renesas 2154 compatible = "renesas,dmac-r8a77965",
2158 "renesas 2155 "renesas,rcar-dmac";
2159 reg = <0 0xec700000 0 2156 reg = <0 0xec700000 0 0x10000>;
2160 interrupts = <GIC_SPI 2157 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2161 <GIC_SPI 2158 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2162 <GIC_SPI 2159 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2163 <GIC_SPI 2160 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2164 <GIC_SPI 2161 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2165 <GIC_SPI 2162 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2166 <GIC_SPI 2163 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2167 <GIC_SPI 2164 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2168 <GIC_SPI 2165 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2169 <GIC_SPI 2166 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2170 <GIC_SPI 2167 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2171 <GIC_SPI 2168 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2172 <GIC_SPI 2169 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2173 <GIC_SPI 2170 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2174 <GIC_SPI 2171 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2175 <GIC_SPI 2172 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2176 <GIC_SPI 2173 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2177 interrupt-names = "er 2174 interrupt-names = "error",
2178 "ch0" 2175 "ch0", "ch1", "ch2", "ch3",
2179 "ch4" 2176 "ch4", "ch5", "ch6", "ch7",
2180 "ch8" 2177 "ch8", "ch9", "ch10", "ch11",
2181 "ch12 2178 "ch12", "ch13", "ch14", "ch15";
2182 clocks = <&cpg CPG_MO 2179 clocks = <&cpg CPG_MOD 502>;
2183 clock-names = "fck"; 2180 clock-names = "fck";
2184 power-domains = <&sys 2181 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2185 resets = <&cpg 502>; 2182 resets = <&cpg 502>;
2186 #dma-cells = <1>; 2183 #dma-cells = <1>;
2187 dma-channels = <16>; 2184 dma-channels = <16>;
2188 iommus = <&ipmmu_mp 0 <<
2189 <&ipmmu_mp 2 <<
2190 <&ipmmu_mp 4 <<
2191 <&ipmmu_mp 6 <<
2192 <&ipmmu_mp 8 <<
2193 <&ipmmu_mp 1 <<
2194 <&ipmmu_mp 1 <<
2195 <&ipmmu_mp 1 <<
2196 }; 2185 };
2197 2186
2198 audma1: dma-controller@ec7200 2187 audma1: dma-controller@ec720000 {
2199 compatible = "renesas 2188 compatible = "renesas,dmac-r8a77965",
2200 "renesas 2189 "renesas,rcar-dmac";
2201 reg = <0 0xec720000 0 2190 reg = <0 0xec720000 0 0x10000>;
2202 interrupts = <GIC_SPI 2191 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 2192 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2204 <GIC_SPI 2193 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2205 <GIC_SPI 2194 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2206 <GIC_SPI 2195 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2207 <GIC_SPI 2196 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2208 <GIC_SPI 2197 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2209 <GIC_SPI 2198 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2210 <GIC_SPI 2199 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2211 <GIC_SPI 2200 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2212 <GIC_SPI 2201 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2213 <GIC_SPI 2202 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2214 <GIC_SPI 2203 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2215 <GIC_SPI 2204 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2216 <GIC_SPI 2205 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2217 <GIC_SPI 2206 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2218 <GIC_SPI 2207 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2219 interrupt-names = "er 2208 interrupt-names = "error",
2220 "ch0" 2209 "ch0", "ch1", "ch2", "ch3",
2221 "ch4" 2210 "ch4", "ch5", "ch6", "ch7",
2222 "ch8" 2211 "ch8", "ch9", "ch10", "ch11",
2223 "ch12 2212 "ch12", "ch13", "ch14", "ch15";
2224 clocks = <&cpg CPG_MO 2213 clocks = <&cpg CPG_MOD 501>;
2225 clock-names = "fck"; 2214 clock-names = "fck";
2226 power-domains = <&sys 2215 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2227 resets = <&cpg 501>; 2216 resets = <&cpg 501>;
2228 #dma-cells = <1>; 2217 #dma-cells = <1>;
2229 dma-channels = <16>; 2218 dma-channels = <16>;
2230 iommus = <&ipmmu_mp 1 <<
2231 <&ipmmu_mp 1 <<
2232 <&ipmmu_mp 2 <<
2233 <&ipmmu_mp 2 <<
2234 <&ipmmu_mp 2 <<
2235 <&ipmmu_mp 2 <<
2236 <&ipmmu_mp 2 <<
2237 <&ipmmu_mp 3 <<
2238 }; 2219 };
2239 2220
2240 xhci0: usb@ee000000 { 2221 xhci0: usb@ee000000 {
2241 compatible = "renesas 2222 compatible = "renesas,xhci-r8a77965",
2242 "renesas 2223 "renesas,rcar-gen3-xhci";
2243 reg = <0 0xee000000 0 2224 reg = <0 0xee000000 0 0xc00>;
2244 interrupts = <GIC_SPI 2225 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2245 clocks = <&cpg CPG_MO 2226 clocks = <&cpg CPG_MOD 328>;
2246 power-domains = <&sys 2227 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2247 resets = <&cpg 328>; 2228 resets = <&cpg 328>;
2248 status = "disabled"; 2229 status = "disabled";
2249 }; 2230 };
2250 2231
2251 usb3_peri0: usb@ee020000 { 2232 usb3_peri0: usb@ee020000 {
2252 compatible = "renesas 2233 compatible = "renesas,r8a77965-usb3-peri",
2253 "renesas 2234 "renesas,rcar-gen3-usb3-peri";
2254 reg = <0 0xee020000 0 2235 reg = <0 0xee020000 0 0x400>;
2255 interrupts = <GIC_SPI 2236 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2256 clocks = <&cpg CPG_MO 2237 clocks = <&cpg CPG_MOD 328>;
2257 power-domains = <&sys 2238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2258 resets = <&cpg 328>; 2239 resets = <&cpg 328>;
2259 status = "disabled"; 2240 status = "disabled";
2260 }; 2241 };
2261 2242
2262 ohci0: usb@ee080000 { 2243 ohci0: usb@ee080000 {
2263 compatible = "generic 2244 compatible = "generic-ohci";
2264 reg = <0 0xee080000 0 2245 reg = <0 0xee080000 0 0x100>;
2265 interrupts = <GIC_SPI 2246 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2266 clocks = <&cpg CPG_MO 2247 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2267 phys = <&usb2_phy0 1> 2248 phys = <&usb2_phy0 1>;
2268 phy-names = "usb"; 2249 phy-names = "usb";
2269 power-domains = <&sys 2250 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2270 resets = <&cpg 703>, 2251 resets = <&cpg 703>, <&cpg 704>;
2271 status = "disabled"; 2252 status = "disabled";
2272 }; 2253 };
2273 2254
2274 ohci1: usb@ee0a0000 { 2255 ohci1: usb@ee0a0000 {
2275 compatible = "generic 2256 compatible = "generic-ohci";
2276 reg = <0 0xee0a0000 0 2257 reg = <0 0xee0a0000 0 0x100>;
2277 interrupts = <GIC_SPI 2258 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2278 clocks = <&cpg CPG_MO 2259 clocks = <&cpg CPG_MOD 702>;
2279 phys = <&usb2_phy1 1> 2260 phys = <&usb2_phy1 1>;
2280 phy-names = "usb"; 2261 phy-names = "usb";
2281 power-domains = <&sys 2262 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2282 resets = <&cpg 702>; 2263 resets = <&cpg 702>;
2283 status = "disabled"; 2264 status = "disabled";
2284 }; 2265 };
2285 2266
2286 ehci0: usb@ee080100 { 2267 ehci0: usb@ee080100 {
2287 compatible = "generic 2268 compatible = "generic-ehci";
2288 reg = <0 0xee080100 0 2269 reg = <0 0xee080100 0 0x100>;
2289 interrupts = <GIC_SPI 2270 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2290 clocks = <&cpg CPG_MO 2271 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2291 phys = <&usb2_phy0 2> 2272 phys = <&usb2_phy0 2>;
2292 phy-names = "usb"; 2273 phy-names = "usb";
2293 companion = <&ohci0>; 2274 companion = <&ohci0>;
2294 power-domains = <&sys 2275 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2295 resets = <&cpg 703>, 2276 resets = <&cpg 703>, <&cpg 704>;
2296 status = "disabled"; 2277 status = "disabled";
2297 }; 2278 };
2298 2279
2299 ehci1: usb@ee0a0100 { 2280 ehci1: usb@ee0a0100 {
2300 compatible = "generic 2281 compatible = "generic-ehci";
2301 reg = <0 0xee0a0100 0 2282 reg = <0 0xee0a0100 0 0x100>;
2302 interrupts = <GIC_SPI 2283 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2303 clocks = <&cpg CPG_MO 2284 clocks = <&cpg CPG_MOD 702>;
2304 phys = <&usb2_phy1 2> 2285 phys = <&usb2_phy1 2>;
2305 phy-names = "usb"; 2286 phy-names = "usb";
2306 companion = <&ohci1>; 2287 companion = <&ohci1>;
2307 power-domains = <&sys 2288 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2308 resets = <&cpg 702>; 2289 resets = <&cpg 702>;
2309 status = "disabled"; 2290 status = "disabled";
2310 }; 2291 };
2311 2292
2312 usb2_phy0: usb-phy@ee080200 { 2293 usb2_phy0: usb-phy@ee080200 {
2313 compatible = "renesas 2294 compatible = "renesas,usb2-phy-r8a77965",
2314 "renesas 2295 "renesas,rcar-gen3-usb2-phy";
2315 reg = <0 0xee080200 0 2296 reg = <0 0xee080200 0 0x700>;
2316 interrupts = <GIC_SPI 2297 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MO 2298 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2318 power-domains = <&sys 2299 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2319 resets = <&cpg 703>, 2300 resets = <&cpg 703>, <&cpg 704>;
2320 #phy-cells = <1>; 2301 #phy-cells = <1>;
2321 status = "disabled"; 2302 status = "disabled";
2322 }; 2303 };
2323 2304
2324 usb2_phy1: usb-phy@ee0a0200 { 2305 usb2_phy1: usb-phy@ee0a0200 {
2325 compatible = "renesas 2306 compatible = "renesas,usb2-phy-r8a77965",
2326 "renesas 2307 "renesas,rcar-gen3-usb2-phy";
2327 reg = <0 0xee0a0200 0 2308 reg = <0 0xee0a0200 0 0x700>;
2328 clocks = <&cpg CPG_MO 2309 clocks = <&cpg CPG_MOD 702>;
2329 power-domains = <&sys 2310 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2330 resets = <&cpg 702>; 2311 resets = <&cpg 702>;
2331 #phy-cells = <1>; 2312 #phy-cells = <1>;
2332 status = "disabled"; 2313 status = "disabled";
2333 }; 2314 };
2334 2315
2335 sdhi0: mmc@ee100000 { 2316 sdhi0: mmc@ee100000 {
2336 compatible = "renesas 2317 compatible = "renesas,sdhi-r8a77965",
2337 "renesas 2318 "renesas,rcar-gen3-sdhi";
2338 reg = <0 0xee100000 0 2319 reg = <0 0xee100000 0 0x2000>;
2339 interrupts = <GIC_SPI 2320 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2340 clocks = <&cpg CPG_MO 2321 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>;
2341 clock-names = "core", 2322 clock-names = "core", "clkh";
2342 max-frequency = <2000 2323 max-frequency = <200000000>;
2343 power-domains = <&sys 2324 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2344 resets = <&cpg 314>; 2325 resets = <&cpg 314>;
2345 iommus = <&ipmmu_ds1 2326 iommus = <&ipmmu_ds1 32>;
2346 status = "disabled"; 2327 status = "disabled";
2347 }; 2328 };
2348 2329
2349 sdhi1: mmc@ee120000 { 2330 sdhi1: mmc@ee120000 {
2350 compatible = "renesas 2331 compatible = "renesas,sdhi-r8a77965",
2351 "renesas 2332 "renesas,rcar-gen3-sdhi";
2352 reg = <0 0xee120000 0 2333 reg = <0 0xee120000 0 0x2000>;
2353 interrupts = <GIC_SPI 2334 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MO 2335 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>;
2355 clock-names = "core", 2336 clock-names = "core", "clkh";
2356 max-frequency = <2000 2337 max-frequency = <200000000>;
2357 power-domains = <&sys 2338 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2358 resets = <&cpg 313>; 2339 resets = <&cpg 313>;
2359 iommus = <&ipmmu_ds1 2340 iommus = <&ipmmu_ds1 33>;
2360 status = "disabled"; 2341 status = "disabled";
2361 }; 2342 };
2362 2343
2363 sdhi2: mmc@ee140000 { 2344 sdhi2: mmc@ee140000 {
2364 compatible = "renesas 2345 compatible = "renesas,sdhi-r8a77965",
2365 "renesas 2346 "renesas,rcar-gen3-sdhi";
2366 reg = <0 0xee140000 0 2347 reg = <0 0xee140000 0 0x2000>;
2367 interrupts = <GIC_SPI 2348 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2368 clocks = <&cpg CPG_MO 2349 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>;
2369 clock-names = "core", 2350 clock-names = "core", "clkh";
2370 max-frequency = <2000 2351 max-frequency = <200000000>;
2371 power-domains = <&sys 2352 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2372 resets = <&cpg 312>; 2353 resets = <&cpg 312>;
2373 iommus = <&ipmmu_ds1 2354 iommus = <&ipmmu_ds1 34>;
2374 status = "disabled"; 2355 status = "disabled";
2375 }; 2356 };
2376 2357
2377 sdhi3: mmc@ee160000 { 2358 sdhi3: mmc@ee160000 {
2378 compatible = "renesas 2359 compatible = "renesas,sdhi-r8a77965",
2379 "renesas 2360 "renesas,rcar-gen3-sdhi";
2380 reg = <0 0xee160000 0 2361 reg = <0 0xee160000 0 0x2000>;
2381 interrupts = <GIC_SPI 2362 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2382 clocks = <&cpg CPG_MO 2363 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>;
2383 clock-names = "core", 2364 clock-names = "core", "clkh";
2384 max-frequency = <2000 2365 max-frequency = <200000000>;
2385 power-domains = <&sys 2366 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2386 resets = <&cpg 311>; 2367 resets = <&cpg 311>;
2387 iommus = <&ipmmu_ds1 2368 iommus = <&ipmmu_ds1 35>;
2388 status = "disabled"; 2369 status = "disabled";
2389 }; 2370 };
2390 2371
2391 rpc: spi@ee200000 { 2372 rpc: spi@ee200000 {
2392 compatible = "renesas 2373 compatible = "renesas,r8a77965-rpc-if",
2393 "renesas 2374 "renesas,rcar-gen3-rpc-if";
2394 reg = <0 0xee200000 0 2375 reg = <0 0xee200000 0 0x200>,
2395 <0 0x08000000 0 2376 <0 0x08000000 0 0x04000000>,
2396 <0 0xee208000 0 2377 <0 0xee208000 0 0x100>;
2397 reg-names = "regs", " 2378 reg-names = "regs", "dirmap", "wbuf";
2398 interrupts = <GIC_SPI 2379 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2399 clocks = <&cpg CPG_MO 2380 clocks = <&cpg CPG_MOD 917>;
2400 power-domains = <&sys 2381 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2401 resets = <&cpg 917>; 2382 resets = <&cpg 917>;
2402 #address-cells = <1>; 2383 #address-cells = <1>;
2403 #size-cells = <0>; 2384 #size-cells = <0>;
2404 status = "disabled"; 2385 status = "disabled";
2405 }; 2386 };
2406 2387
2407 sata: sata@ee300000 { 2388 sata: sata@ee300000 {
2408 compatible = "renesas 2389 compatible = "renesas,sata-r8a77965",
2409 "renesas 2390 "renesas,rcar-gen3-sata";
2410 reg = <0 0xee300000 0 2391 reg = <0 0xee300000 0 0x200000>;
2411 interrupts = <GIC_SPI 2392 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2412 clocks = <&cpg CPG_MO 2393 clocks = <&cpg CPG_MOD 815>;
2413 power-domains = <&sys 2394 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2414 resets = <&cpg 815>; 2395 resets = <&cpg 815>;
2415 iommus = <&ipmmu_hc 2 <<
2416 status = "disabled"; 2396 status = "disabled";
2417 }; 2397 };
2418 2398
2419 gic: interrupt-controller@f10 2399 gic: interrupt-controller@f1010000 {
2420 compatible = "arm,gic 2400 compatible = "arm,gic-400";
2421 #interrupt-cells = <3 2401 #interrupt-cells = <3>;
2422 #address-cells = <0>; 2402 #address-cells = <0>;
2423 interrupt-controller; 2403 interrupt-controller;
2424 reg = <0x0 0xf1010000 2404 reg = <0x0 0xf1010000 0 0x1000>,
2425 <0x0 0xf1020000 2405 <0x0 0xf1020000 0 0x20000>,
2426 <0x0 0xf1040000 2406 <0x0 0xf1040000 0 0x20000>,
2427 <0x0 0xf1060000 2407 <0x0 0xf1060000 0 0x20000>;
2428 interrupts = <GIC_PPI 2408 interrupts = <GIC_PPI 9
2429 (GIC_ 2409 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2430 clocks = <&cpg CPG_MO 2410 clocks = <&cpg CPG_MOD 408>;
2431 clock-names = "clk"; 2411 clock-names = "clk";
2432 power-domains = <&sys 2412 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2433 resets = <&cpg 408>; 2413 resets = <&cpg 408>;
2434 }; 2414 };
2435 2415
2436 pciec0: pcie@fe000000 { 2416 pciec0: pcie@fe000000 {
2437 compatible = "renesas 2417 compatible = "renesas,pcie-r8a77965",
2438 "renesas 2418 "renesas,pcie-rcar-gen3";
2439 reg = <0 0xfe000000 0 2419 reg = <0 0xfe000000 0 0x80000>;
2440 #address-cells = <3>; 2420 #address-cells = <3>;
2441 #size-cells = <2>; 2421 #size-cells = <2>;
2442 bus-range = <0x00 0xf 2422 bus-range = <0x00 0xff>;
2443 device_type = "pci"; 2423 device_type = "pci";
2444 ranges = <0x01000000 2424 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2445 <0x02000000 2425 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2446 <0x02000000 2426 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2447 <0x42000000 2427 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2448 /* Map all possible D !! 2428 /* Map all possible DDR as inbound ranges */
2449 dma-ranges = <0x42000 !! 2429 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2450 interrupts = <GIC_SPI 2430 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 117 2431 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2452 <GIC_SPI 118 2432 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2453 #interrupt-cells = <1 2433 #interrupt-cells = <1>;
2454 interrupt-map-mask = 2434 interrupt-map-mask = <0 0 0 0>;
2455 interrupt-map = <0 0 2435 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2456 clocks = <&cpg CPG_MO 2436 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2457 clock-names = "pcie", 2437 clock-names = "pcie", "pcie_bus";
2458 power-domains = <&sys 2438 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2459 resets = <&cpg 319>; 2439 resets = <&cpg 319>;
2460 iommu-map = <0 &ipmmu <<
2461 iommu-map-mask = <0>; <<
2462 status = "disabled"; 2440 status = "disabled";
2463 }; 2441 };
2464 2442
2465 pciec1: pcie@ee800000 { 2443 pciec1: pcie@ee800000 {
2466 compatible = "renesas 2444 compatible = "renesas,pcie-r8a77965",
2467 "renesas 2445 "renesas,pcie-rcar-gen3";
2468 reg = <0 0xee800000 0 2446 reg = <0 0xee800000 0 0x80000>;
2469 #address-cells = <3>; 2447 #address-cells = <3>;
2470 #size-cells = <2>; 2448 #size-cells = <2>;
2471 bus-range = <0x00 0xf 2449 bus-range = <0x00 0xff>;
2472 device_type = "pci"; 2450 device_type = "pci";
2473 ranges = <0x01000000 2451 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2474 <0x02000000 2452 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2475 <0x02000000 2453 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2476 <0x42000000 2454 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2477 /* Map all possible D !! 2455 /* Map all possible DDR as inbound ranges */
2478 dma-ranges = <0x42000 !! 2456 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2479 interrupts = <GIC_SPI 2457 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2480 <GIC_SPI 149 2458 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 150 2459 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2482 #interrupt-cells = <1 2460 #interrupt-cells = <1>;
2483 interrupt-map-mask = 2461 interrupt-map-mask = <0 0 0 0>;
2484 interrupt-map = <0 0 2462 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MO 2463 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2486 clock-names = "pcie", 2464 clock-names = "pcie", "pcie_bus";
2487 power-domains = <&sys 2465 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2488 resets = <&cpg 318>; 2466 resets = <&cpg 318>;
2489 iommu-map = <0 &ipmmu <<
2490 iommu-map-mask = <0>; <<
2491 status = "disabled"; 2467 status = "disabled";
2492 }; 2468 };
2493 2469
2494 fdp1@fe940000 { 2470 fdp1@fe940000 {
2495 compatible = "renesas 2471 compatible = "renesas,fdp1";
2496 reg = <0 0xfe940000 0 2472 reg = <0 0xfe940000 0 0x2400>;
2497 interrupts = <GIC_SPI 2473 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2498 clocks = <&cpg CPG_MO 2474 clocks = <&cpg CPG_MOD 119>;
2499 power-domains = <&sys 2475 power-domains = <&sysc R8A77965_PD_A3VP>;
2500 resets = <&cpg 119>; 2476 resets = <&cpg 119>;
2501 renesas,fcp = <&fcpf0 2477 renesas,fcp = <&fcpf0>;
2502 }; 2478 };
2503 2479
2504 fcpf0: fcp@fe950000 { 2480 fcpf0: fcp@fe950000 {
2505 compatible = "renesas 2481 compatible = "renesas,fcpf";
2506 reg = <0 0xfe950000 0 2482 reg = <0 0xfe950000 0 0x200>;
2507 clocks = <&cpg CPG_MO 2483 clocks = <&cpg CPG_MOD 615>;
2508 power-domains = <&sys 2484 power-domains = <&sysc R8A77965_PD_A3VP>;
2509 resets = <&cpg 615>; 2485 resets = <&cpg 615>;
2510 iommus = <&ipmmu_vp0 <<
2511 }; 2486 };
2512 2487
2513 vspb: vsp@fe960000 { 2488 vspb: vsp@fe960000 {
2514 compatible = "renesas 2489 compatible = "renesas,vsp2";
2515 reg = <0 0xfe960000 0 2490 reg = <0 0xfe960000 0 0x8000>;
2516 interrupts = <GIC_SPI 2491 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2517 clocks = <&cpg CPG_MO 2492 clocks = <&cpg CPG_MOD 626>;
2518 power-domains = <&sys 2493 power-domains = <&sysc R8A77965_PD_A3VP>;
2519 resets = <&cpg 626>; 2494 resets = <&cpg 626>;
2520 2495
2521 renesas,fcp = <&fcpvb 2496 renesas,fcp = <&fcpvb0>;
2522 }; 2497 };
2523 2498
2524 vspi0: vsp@fe9a0000 { 2499 vspi0: vsp@fe9a0000 {
2525 compatible = "renesas 2500 compatible = "renesas,vsp2";
2526 reg = <0 0xfe9a0000 0 2501 reg = <0 0xfe9a0000 0 0x8000>;
2527 interrupts = <GIC_SPI 2502 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2528 clocks = <&cpg CPG_MO 2503 clocks = <&cpg CPG_MOD 631>;
2529 power-domains = <&sys 2504 power-domains = <&sysc R8A77965_PD_A3VP>;
2530 resets = <&cpg 631>; 2505 resets = <&cpg 631>;
2531 2506
2532 renesas,fcp = <&fcpvi 2507 renesas,fcp = <&fcpvi0>;
2533 }; 2508 };
2534 2509
2535 vspd0: vsp@fea20000 { 2510 vspd0: vsp@fea20000 {
2536 compatible = "renesas 2511 compatible = "renesas,vsp2";
2537 reg = <0 0xfea20000 0 2512 reg = <0 0xfea20000 0 0x5000>;
2538 interrupts = <GIC_SPI 2513 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2539 clocks = <&cpg CPG_MO 2514 clocks = <&cpg CPG_MOD 623>;
2540 power-domains = <&sys 2515 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2541 resets = <&cpg 623>; 2516 resets = <&cpg 623>;
2542 2517
2543 renesas,fcp = <&fcpvd 2518 renesas,fcp = <&fcpvd0>;
2544 }; 2519 };
2545 2520
2546 vspd1: vsp@fea28000 { 2521 vspd1: vsp@fea28000 {
2547 compatible = "renesas 2522 compatible = "renesas,vsp2";
2548 reg = <0 0xfea28000 0 2523 reg = <0 0xfea28000 0 0x5000>;
2549 interrupts = <GIC_SPI 2524 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2550 clocks = <&cpg CPG_MO 2525 clocks = <&cpg CPG_MOD 622>;
2551 power-domains = <&sys 2526 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2552 resets = <&cpg 622>; 2527 resets = <&cpg 622>;
2553 2528
2554 renesas,fcp = <&fcpvd 2529 renesas,fcp = <&fcpvd1>;
2555 }; 2530 };
2556 2531
2557 fcpvb0: fcp@fe96f000 { 2532 fcpvb0: fcp@fe96f000 {
2558 compatible = "renesas 2533 compatible = "renesas,fcpv";
2559 reg = <0 0xfe96f000 0 2534 reg = <0 0xfe96f000 0 0x200>;
2560 clocks = <&cpg CPG_MO 2535 clocks = <&cpg CPG_MOD 607>;
2561 power-domains = <&sys 2536 power-domains = <&sysc R8A77965_PD_A3VP>;
2562 resets = <&cpg 607>; 2537 resets = <&cpg 607>;
2563 iommus = <&ipmmu_vp0 <<
2564 }; 2538 };
2565 2539
2566 fcpvd0: fcp@fea27000 { 2540 fcpvd0: fcp@fea27000 {
2567 compatible = "renesas 2541 compatible = "renesas,fcpv";
2568 reg = <0 0xfea27000 0 2542 reg = <0 0xfea27000 0 0x200>;
2569 clocks = <&cpg CPG_MO 2543 clocks = <&cpg CPG_MOD 603>;
2570 power-domains = <&sys 2544 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2571 resets = <&cpg 603>; 2545 resets = <&cpg 603>;
2572 iommus = <&ipmmu_vi0 <<
2573 }; 2546 };
2574 2547
2575 fcpvd1: fcp@fea2f000 { 2548 fcpvd1: fcp@fea2f000 {
2576 compatible = "renesas 2549 compatible = "renesas,fcpv";
2577 reg = <0 0xfea2f000 0 2550 reg = <0 0xfea2f000 0 0x200>;
2578 clocks = <&cpg CPG_MO 2551 clocks = <&cpg CPG_MOD 602>;
2579 power-domains = <&sys 2552 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2580 resets = <&cpg 602>; 2553 resets = <&cpg 602>;
2581 iommus = <&ipmmu_vi0 <<
2582 }; 2554 };
2583 2555
2584 fcpvi0: fcp@fe9af000 { 2556 fcpvi0: fcp@fe9af000 {
2585 compatible = "renesas 2557 compatible = "renesas,fcpv";
2586 reg = <0 0xfe9af000 0 2558 reg = <0 0xfe9af000 0 0x200>;
2587 clocks = <&cpg CPG_MO 2559 clocks = <&cpg CPG_MOD 611>;
2588 power-domains = <&sys 2560 power-domains = <&sysc R8A77965_PD_A3VP>;
2589 resets = <&cpg 611>; 2561 resets = <&cpg 611>;
2590 iommus = <&ipmmu_vp0 <<
2591 }; 2562 };
2592 2563
2593 cmm0: cmm@fea40000 { 2564 cmm0: cmm@fea40000 {
2594 compatible = "renesas 2565 compatible = "renesas,r8a77965-cmm",
2595 "renesas 2566 "renesas,rcar-gen3-cmm";
2596 reg = <0 0xfea40000 0 2567 reg = <0 0xfea40000 0 0x1000>;
2597 power-domains = <&sys 2568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2598 clocks = <&cpg CPG_MO 2569 clocks = <&cpg CPG_MOD 711>;
2599 resets = <&cpg 711>; 2570 resets = <&cpg 711>;
2600 }; 2571 };
2601 2572
2602 cmm1: cmm@fea50000 { 2573 cmm1: cmm@fea50000 {
2603 compatible = "renesas 2574 compatible = "renesas,r8a77965-cmm",
2604 "renesas 2575 "renesas,rcar-gen3-cmm";
2605 reg = <0 0xfea50000 0 2576 reg = <0 0xfea50000 0 0x1000>;
2606 power-domains = <&sys 2577 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2607 clocks = <&cpg CPG_MO 2578 clocks = <&cpg CPG_MOD 710>;
2608 resets = <&cpg 710>; 2579 resets = <&cpg 710>;
2609 }; 2580 };
2610 2581
2611 cmm3: cmm@fea70000 { 2582 cmm3: cmm@fea70000 {
2612 compatible = "renesas 2583 compatible = "renesas,r8a77965-cmm",
2613 "renesas 2584 "renesas,rcar-gen3-cmm";
2614 reg = <0 0xfea70000 0 2585 reg = <0 0xfea70000 0 0x1000>;
2615 power-domains = <&sys 2586 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2616 clocks = <&cpg CPG_MO 2587 clocks = <&cpg CPG_MOD 708>;
2617 resets = <&cpg 708>; 2588 resets = <&cpg 708>;
2618 }; 2589 };
2619 2590
2620 csi20: csi2@fea80000 { 2591 csi20: csi2@fea80000 {
2621 compatible = "renesas 2592 compatible = "renesas,r8a77965-csi2";
2622 reg = <0 0xfea80000 0 2593 reg = <0 0xfea80000 0 0x10000>;
2623 interrupts = <GIC_SPI 2594 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2624 clocks = <&cpg CPG_MO 2595 clocks = <&cpg CPG_MOD 714>;
2625 power-domains = <&sys 2596 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2626 resets = <&cpg 714>; 2597 resets = <&cpg 714>;
2627 status = "disabled"; 2598 status = "disabled";
2628 2599
2629 ports { 2600 ports {
2630 #address-cell 2601 #address-cells = <1>;
2631 #size-cells = 2602 #size-cells = <0>;
2632 2603
2633 port@0 { 2604 port@0 {
2634 reg = 2605 reg = <0>;
2635 }; 2606 };
2636 2607
2637 port@1 { 2608 port@1 {
2638 #addr 2609 #address-cells = <1>;
2639 #size 2610 #size-cells = <0>;
2640 2611
2641 reg = 2612 reg = <1>;
2642 2613
2643 csi20 2614 csi20vin0: endpoint@0 {
2644 2615 reg = <0>;
2645 2616 remote-endpoint = <&vin0csi20>;
2646 }; 2617 };
2647 csi20 2618 csi20vin1: endpoint@1 {
2648 2619 reg = <1>;
2649 2620 remote-endpoint = <&vin1csi20>;
2650 }; 2621 };
2651 csi20 2622 csi20vin2: endpoint@2 {
2652 2623 reg = <2>;
2653 2624 remote-endpoint = <&vin2csi20>;
2654 }; 2625 };
2655 csi20 2626 csi20vin3: endpoint@3 {
2656 2627 reg = <3>;
2657 2628 remote-endpoint = <&vin3csi20>;
2658 }; 2629 };
2659 csi20 2630 csi20vin4: endpoint@4 {
2660 2631 reg = <4>;
2661 2632 remote-endpoint = <&vin4csi20>;
2662 }; 2633 };
2663 csi20 2634 csi20vin5: endpoint@5 {
2664 2635 reg = <5>;
2665 2636 remote-endpoint = <&vin5csi20>;
2666 }; 2637 };
2667 csi20 2638 csi20vin6: endpoint@6 {
2668 2639 reg = <6>;
2669 2640 remote-endpoint = <&vin6csi20>;
2670 }; 2641 };
2671 csi20 2642 csi20vin7: endpoint@7 {
2672 2643 reg = <7>;
2673 2644 remote-endpoint = <&vin7csi20>;
2674 }; 2645 };
2675 }; 2646 };
2676 }; 2647 };
2677 }; 2648 };
2678 2649
2679 csi40: csi2@feaa0000 { 2650 csi40: csi2@feaa0000 {
2680 compatible = "renesas 2651 compatible = "renesas,r8a77965-csi2";
2681 reg = <0 0xfeaa0000 0 2652 reg = <0 0xfeaa0000 0 0x10000>;
2682 interrupts = <GIC_SPI 2653 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2683 clocks = <&cpg CPG_MO 2654 clocks = <&cpg CPG_MOD 716>;
2684 power-domains = <&sys 2655 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2685 resets = <&cpg 716>; 2656 resets = <&cpg 716>;
2686 status = "disabled"; 2657 status = "disabled";
2687 2658
2688 ports { 2659 ports {
2689 #address-cell 2660 #address-cells = <1>;
2690 #size-cells = 2661 #size-cells = <0>;
2691 2662
2692 port@0 { 2663 port@0 {
2693 reg = 2664 reg = <0>;
2694 }; 2665 };
2695 2666
2696 port@1 { 2667 port@1 {
2697 #addr 2668 #address-cells = <1>;
2698 #size 2669 #size-cells = <0>;
2699 2670
2700 reg = 2671 reg = <1>;
2701 2672
2702 csi40 2673 csi40vin0: endpoint@0 {
2703 2674 reg = <0>;
2704 2675 remote-endpoint = <&vin0csi40>;
2705 }; 2676 };
2706 csi40 2677 csi40vin1: endpoint@1 {
2707 2678 reg = <1>;
2708 2679 remote-endpoint = <&vin1csi40>;
2709 }; 2680 };
2710 csi40 2681 csi40vin2: endpoint@2 {
2711 2682 reg = <2>;
2712 2683 remote-endpoint = <&vin2csi40>;
2713 }; 2684 };
2714 csi40 2685 csi40vin3: endpoint@3 {
2715 2686 reg = <3>;
2716 2687 remote-endpoint = <&vin3csi40>;
2717 }; 2688 };
2718 csi40 2689 csi40vin4: endpoint@4 {
2719 2690 reg = <4>;
2720 2691 remote-endpoint = <&vin4csi40>;
2721 }; 2692 };
2722 csi40 2693 csi40vin5: endpoint@5 {
2723 2694 reg = <5>;
2724 2695 remote-endpoint = <&vin5csi40>;
2725 }; 2696 };
2726 csi40 2697 csi40vin6: endpoint@6 {
2727 2698 reg = <6>;
2728 2699 remote-endpoint = <&vin6csi40>;
2729 }; 2700 };
2730 csi40 2701 csi40vin7: endpoint@7 {
2731 2702 reg = <7>;
2732 2703 remote-endpoint = <&vin7csi40>;
2733 }; 2704 };
2734 }; 2705 };
2735 }; 2706 };
2736 }; 2707 };
2737 2708
2738 hdmi0: hdmi@fead0000 { 2709 hdmi0: hdmi@fead0000 {
2739 compatible = "renesas 2710 compatible = "renesas,r8a77965-hdmi",
2740 "renesas 2711 "renesas,rcar-gen3-hdmi";
2741 reg = <0 0xfead0000 0 2712 reg = <0 0xfead0000 0 0x10000>;
2742 interrupts = <GIC_SPI 2713 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2743 clocks = <&cpg CPG_MO 2714 clocks = <&cpg CPG_MOD 729>,
2744 <&cpg CPG_CO 2715 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2745 clock-names = "iahb", 2716 clock-names = "iahb", "isfr";
2746 power-domains = <&sys 2717 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2747 resets = <&cpg 729>; 2718 resets = <&cpg 729>;
2748 status = "disabled"; 2719 status = "disabled";
2749 2720
2750 ports { 2721 ports {
2751 #address-cell 2722 #address-cells = <1>;
2752 #size-cells = 2723 #size-cells = <0>;
2753 port@0 { 2724 port@0 {
2754 reg = 2725 reg = <0>;
2755 dw_hd 2726 dw_hdmi0_in: endpoint {
2756 2727 remote-endpoint = <&du_out_hdmi0>;
2757 }; 2728 };
2758 }; 2729 };
2759 port@1 { 2730 port@1 {
2760 reg = 2731 reg = <1>;
2761 }; 2732 };
2762 }; 2733 };
2763 }; 2734 };
2764 2735
2765 du: display@feb00000 { 2736 du: display@feb00000 {
2766 compatible = "renesas 2737 compatible = "renesas,du-r8a77965";
2767 reg = <0 0xfeb00000 0 2738 reg = <0 0xfeb00000 0 0x80000>;
2768 interrupts = <GIC_SPI 2739 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2769 <GIC_SPI 2740 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2770 <GIC_SPI 2741 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2771 clocks = <&cpg CPG_MO 2742 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2772 <&cpg CPG_MO 2743 <&cpg CPG_MOD 721>;
2773 clock-names = "du.0", 2744 clock-names = "du.0", "du.1", "du.3";
2774 resets = <&cpg 724>, 2745 resets = <&cpg 724>, <&cpg 722>;
2775 reset-names = "du.0", 2746 reset-names = "du.0", "du.3";
2776 2747
2777 renesas,cmms = <&cmm0 2748 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
2778 renesas,vsps = <&vspd 2749 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2779 2750
2780 status = "disabled"; 2751 status = "disabled";
2781 2752
2782 ports { 2753 ports {
2783 #address-cell 2754 #address-cells = <1>;
2784 #size-cells = 2755 #size-cells = <0>;
2785 2756
2786 port@0 { 2757 port@0 {
2787 reg = 2758 reg = <0>;
2788 }; 2759 };
2789 port@1 { 2760 port@1 {
2790 reg = 2761 reg = <1>;
2791 du_ou 2762 du_out_hdmi0: endpoint {
2792 2763 remote-endpoint = <&dw_hdmi0_in>;
2793 }; 2764 };
2794 }; 2765 };
2795 port@2 { 2766 port@2 {
2796 reg = 2767 reg = <2>;
2797 du_ou 2768 du_out_lvds0: endpoint {
2798 2769 remote-endpoint = <&lvds0_in>;
2799 }; 2770 };
2800 }; 2771 };
2801 }; 2772 };
2802 }; 2773 };
2803 2774
2804 lvds0: lvds@feb90000 { 2775 lvds0: lvds@feb90000 {
2805 compatible = "renesas 2776 compatible = "renesas,r8a77965-lvds";
2806 reg = <0 0xfeb90000 0 2777 reg = <0 0xfeb90000 0 0x14>;
2807 clocks = <&cpg CPG_MO 2778 clocks = <&cpg CPG_MOD 727>;
2808 power-domains = <&sys 2779 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2809 resets = <&cpg 727>; 2780 resets = <&cpg 727>;
2810 status = "disabled"; 2781 status = "disabled";
2811 2782
2812 ports { 2783 ports {
2813 #address-cell 2784 #address-cells = <1>;
2814 #size-cells = 2785 #size-cells = <0>;
2815 2786
2816 port@0 { 2787 port@0 {
2817 reg = 2788 reg = <0>;
2818 lvds0 2789 lvds0_in: endpoint {
2819 2790 remote-endpoint = <&du_out_lvds0>;
2820 }; 2791 };
2821 }; 2792 };
2822 port@1 { 2793 port@1 {
2823 reg = 2794 reg = <1>;
2824 }; 2795 };
2825 }; 2796 };
2826 }; 2797 };
2827 2798
2828 prr: chipid@fff00044 { 2799 prr: chipid@fff00044 {
2829 compatible = "renesas 2800 compatible = "renesas,prr";
2830 reg = <0 0xfff00044 0 2801 reg = <0 0xfff00044 0 4>;
2831 }; 2802 };
2832 }; 2803 };
2833 2804
2834 thermal-zones { 2805 thermal-zones {
2835 sensor1_thermal: sensor1-ther 2806 sensor1_thermal: sensor1-thermal {
2836 polling-delay-passive 2807 polling-delay-passive = <250>;
2837 polling-delay = <1000 2808 polling-delay = <1000>;
2838 thermal-sensors = <&t 2809 thermal-sensors = <&tsc 0>;
2839 sustainable-power = < 2810 sustainable-power = <2439>;
2840 2811
2841 trips { 2812 trips {
2842 sensor1_crit: 2813 sensor1_crit: sensor1-crit {
2843 tempe 2814 temperature = <120000>;
2844 hyste 2815 hysteresis = <1000>;
2845 type 2816 type = "critical";
2846 }; 2817 };
2847 }; 2818 };
2848 }; 2819 };
2849 2820
2850 sensor2_thermal: sensor2-ther 2821 sensor2_thermal: sensor2-thermal {
2851 polling-delay-passive 2822 polling-delay-passive = <250>;
2852 polling-delay = <1000 2823 polling-delay = <1000>;
2853 thermal-sensors = <&t 2824 thermal-sensors = <&tsc 1>;
2854 sustainable-power = < 2825 sustainable-power = <2439>;
2855 2826
2856 trips { 2827 trips {
2857 sensor2_crit: 2828 sensor2_crit: sensor2-crit {
2858 tempe 2829 temperature = <120000>;
2859 hyste 2830 hysteresis = <1000>;
2860 type 2831 type = "critical";
2861 }; 2832 };
2862 }; 2833 };
2863 }; 2834 };
2864 2835
2865 sensor3_thermal: sensor3-ther 2836 sensor3_thermal: sensor3-thermal {
2866 polling-delay-passive 2837 polling-delay-passive = <250>;
2867 polling-delay = <1000 2838 polling-delay = <1000>;
2868 thermal-sensors = <&t 2839 thermal-sensors = <&tsc 2>;
2869 sustainable-power = < 2840 sustainable-power = <2439>;
2870 2841
2871 trips { 2842 trips {
2872 target: trip- 2843 target: trip-point1 {
2873 /* mi 2844 /* miliCelsius */
2874 tempe 2845 temperature = <100000>;
2875 hyste 2846 hysteresis = <1000>;
2876 type 2847 type = "passive";
2877 }; 2848 };
2878 2849
2879 sensor3_crit: 2850 sensor3_crit: sensor3-crit {
2880 tempe 2851 temperature = <120000>;
2881 hyste 2852 hysteresis = <1000>;
2882 type 2853 type = "critical";
2883 }; 2854 };
2884 }; 2855 };
2885 2856
2886 cooling-maps { 2857 cooling-maps {
2887 map0 { 2858 map0 {
2888 trip 2859 trip = <&target>;
2889 cooli 2860 cooling-device = <&a57_0 2 4>;
2890 contr 2861 contribution = <1024>;
2891 }; 2862 };
2892 }; 2863 };
2893 }; 2864 };
2894 }; 2865 };
2895 2866
2896 timer { 2867 timer {
2897 compatible = "arm,armv8-timer 2868 compatible = "arm,armv8-timer";
2898 interrupts-extended = <&gic G 2869 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2899 <&gic G 2870 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2900 <&gic G 2871 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2901 <&gic G 2872 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2902 interrupt-names = "sec-phys", <<
2903 }; 2873 };
2904 2874
2905 /* External USB clocks - can be overr 2875 /* External USB clocks - can be overridden by the board */
2906 usb3s0_clk: usb3s0 { 2876 usb3s0_clk: usb3s0 {
2907 compatible = "fixed-clock"; 2877 compatible = "fixed-clock";
2908 #clock-cells = <0>; 2878 #clock-cells = <0>;
2909 clock-frequency = <0>; 2879 clock-frequency = <0>;
2910 }; 2880 };
2911 2881
2912 usb_extal_clk: usb_extal { 2882 usb_extal_clk: usb_extal {
2913 compatible = "fixed-clock"; 2883 compatible = "fixed-clock";
2914 #clock-cells = <0>; 2884 #clock-cells = <0>;
2915 clock-frequency = <0>; 2885 clock-frequency = <0>;
2916 }; 2886 };
2917 }; 2887 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.