1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car M3-N (R8A7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 * 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+rene 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 * 6 *
7 * Based on r8a7796.dtsi 7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp 8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */ 9 */
10 10
11 #include <dt-bindings/clock/r8a77965-cpg-mssr. 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h> 13 #include <dt-bindings/power/r8a77965-sysc.h>
14 14
>> 15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
>> 16
15 #define SOC_HAS_SATA 17 #define SOC_HAS_SATA
16 18
17 / { 19 / {
18 compatible = "renesas,r8a77965"; 20 compatible = "renesas,r8a77965";
19 #address-cells = <2>; 21 #address-cells = <2>;
20 #size-cells = <2>; 22 #size-cells = <2>;
21 23
22 /* 24 /*
23 * The external audio clocks are confi 25 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default. 26 * clocks by default.
25 * Boards that provide audio clocks sh 27 * Boards that provide audio clocks should override them.
26 */ 28 */
27 audio_clk_a: audio_clk_a { 29 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock"; 30 compatible = "fixed-clock";
29 #clock-cells = <0>; 31 #clock-cells = <0>;
30 clock-frequency = <0>; 32 clock-frequency = <0>;
31 }; 33 };
32 34
33 audio_clk_b: audio_clk_b { 35 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock"; 36 compatible = "fixed-clock";
35 #clock-cells = <0>; 37 #clock-cells = <0>;
36 clock-frequency = <0>; 38 clock-frequency = <0>;
37 }; 39 };
38 40
39 audio_clk_c: audio_clk_c { 41 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock"; 42 compatible = "fixed-clock";
41 #clock-cells = <0>; 43 #clock-cells = <0>;
42 clock-frequency = <0>; 44 clock-frequency = <0>;
43 }; 45 };
44 46
45 /* External CAN clock - to be overridd 47 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can { 48 can_clk: can {
47 compatible = "fixed-clock"; 49 compatible = "fixed-clock";
48 #clock-cells = <0>; 50 #clock-cells = <0>;
49 clock-frequency = <0>; 51 clock-frequency = <0>;
50 }; 52 };
51 53
52 cluster0_opp: opp-table-0 { 54 cluster0_opp: opp-table-0 {
53 compatible = "operating-points 55 compatible = "operating-points-v2";
54 opp-shared; 56 opp-shared;
55 57
56 opp-500000000 { 58 opp-500000000 {
57 opp-hz = /bits/ 64 <50 59 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <83000 60 opp-microvolt = <830000>;
59 clock-latency-ns = <30 61 clock-latency-ns = <300000>;
60 }; 62 };
61 opp-1000000000 { 63 opp-1000000000 {
62 opp-hz = /bits/ 64 <10 64 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <83000 65 opp-microvolt = <830000>;
64 clock-latency-ns = <30 66 clock-latency-ns = <300000>;
65 }; 67 };
66 opp-1500000000 { 68 opp-1500000000 {
67 opp-hz = /bits/ 64 <15 69 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <83000 70 opp-microvolt = <830000>;
69 clock-latency-ns = <30 71 clock-latency-ns = <300000>;
70 opp-suspend; 72 opp-suspend;
71 }; 73 };
72 opp-1600000000 { 74 opp-1600000000 {
73 opp-hz = /bits/ 64 <16 75 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <90000 76 opp-microvolt = <900000>;
75 clock-latency-ns = <30 77 clock-latency-ns = <300000>;
76 }; 78 };
77 opp-1700000000 { 79 opp-1700000000 {
78 opp-hz = /bits/ 64 <17 80 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <90000 81 opp-microvolt = <900000>;
80 clock-latency-ns = <30 82 clock-latency-ns = <300000>;
81 }; 83 };
82 opp-1800000000 { 84 opp-1800000000 {
83 opp-hz = /bits/ 64 <18 85 opp-hz = /bits/ 64 <1800000000>;
84 opp-microvolt = <96000 86 opp-microvolt = <960000>;
85 clock-latency-ns = <30 87 clock-latency-ns = <300000>;
86 turbo-mode; 88 turbo-mode;
87 }; 89 };
88 }; 90 };
89 91
90 cpus { 92 cpus {
91 #address-cells = <1>; 93 #address-cells = <1>;
92 #size-cells = <0>; 94 #size-cells = <0>;
93 95
94 a57_0: cpu@0 { 96 a57_0: cpu@0 {
95 compatible = "arm,cort 97 compatible = "arm,cortex-a57";
96 reg = <0x0>; 98 reg = <0x0>;
97 device_type = "cpu"; 99 device_type = "cpu";
98 power-domains = <&sysc 100 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
99 next-level-cache = <&L 101 next-level-cache = <&L2_CA57>;
100 enable-method = "psci" 102 enable-method = "psci";
101 cpu-idle-states = <&CP 103 cpu-idle-states = <&CPU_SLEEP_0>;
102 #cooling-cells = <2>; 104 #cooling-cells = <2>;
103 dynamic-power-coeffici 105 dynamic-power-coefficient = <854>;
104 clocks = <&cpg CPG_COR 106 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
105 operating-points-v2 = 107 operating-points-v2 = <&cluster0_opp>;
106 }; 108 };
107 109
108 a57_1: cpu@1 { 110 a57_1: cpu@1 {
109 compatible = "arm,cort 111 compatible = "arm,cortex-a57";
110 reg = <0x1>; 112 reg = <0x1>;
111 device_type = "cpu"; 113 device_type = "cpu";
112 power-domains = <&sysc 114 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
113 next-level-cache = <&L 115 next-level-cache = <&L2_CA57>;
114 enable-method = "psci" 116 enable-method = "psci";
115 cpu-idle-states = <&CP 117 cpu-idle-states = <&CPU_SLEEP_0>;
116 clocks = <&cpg CPG_COR 118 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
117 operating-points-v2 = 119 operating-points-v2 = <&cluster0_opp>;
118 }; 120 };
119 121
120 L2_CA57: cache-controller-0 { 122 L2_CA57: cache-controller-0 {
121 compatible = "cache"; 123 compatible = "cache";
122 power-domains = <&sysc 124 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
123 cache-unified; 125 cache-unified;
124 cache-level = <2>; 126 cache-level = <2>;
125 }; 127 };
126 128
127 idle-states { 129 idle-states {
128 entry-method = "psci"; 130 entry-method = "psci";
129 131
130 CPU_SLEEP_0: cpu-sleep 132 CPU_SLEEP_0: cpu-sleep-0 {
131 compatible = " 133 compatible = "arm,idle-state";
132 arm,psci-suspe 134 arm,psci-suspend-param = <0x0010000>;
133 local-timer-st 135 local-timer-stop;
134 entry-latency- 136 entry-latency-us = <400>;
135 exit-latency-u 137 exit-latency-us = <500>;
136 min-residency- 138 min-residency-us = <4000>;
137 }; 139 };
138 }; 140 };
139 }; 141 };
140 142
141 extal_clk: extal { 143 extal_clk: extal {
142 compatible = "fixed-clock"; 144 compatible = "fixed-clock";
143 #clock-cells = <0>; 145 #clock-cells = <0>;
144 /* This value must be overridd 146 /* This value must be overridden by the board */
145 clock-frequency = <0>; 147 clock-frequency = <0>;
146 }; 148 };
147 149
148 extalr_clk: extalr { 150 extalr_clk: extalr {
149 compatible = "fixed-clock"; 151 compatible = "fixed-clock";
150 #clock-cells = <0>; 152 #clock-cells = <0>;
151 /* This value must be overridd 153 /* This value must be overridden by the board */
152 clock-frequency = <0>; 154 clock-frequency = <0>;
153 }; 155 };
154 156
155 /* External PCIe clock - can be overri 157 /* External PCIe clock - can be overridden by the board */
156 pcie_bus_clk: pcie_bus { 158 pcie_bus_clk: pcie_bus {
157 compatible = "fixed-clock"; 159 compatible = "fixed-clock";
158 #clock-cells = <0>; 160 #clock-cells = <0>;
159 clock-frequency = <0>; 161 clock-frequency = <0>;
160 }; 162 };
161 163
162 pmu_a57 { 164 pmu_a57 {
163 compatible = "arm,cortex-a57-p 165 compatible = "arm,cortex-a57-pmu";
164 interrupts-extended = <&gic GI 166 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
165 <&gic GI 167 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166 interrupt-affinity = <&a57_0>, 168 interrupt-affinity = <&a57_0>,
167 <&a57_1>; 169 <&a57_1>;
168 }; 170 };
169 171
170 psci { 172 psci {
171 compatible = "arm,psci-1.0", " 173 compatible = "arm,psci-1.0", "arm,psci-0.2";
172 method = "smc"; 174 method = "smc";
173 }; 175 };
174 176
175 /* External SCIF clock - to be overrid 177 /* External SCIF clock - to be overridden by boards that provide it */
176 scif_clk: scif { 178 scif_clk: scif {
177 compatible = "fixed-clock"; 179 compatible = "fixed-clock";
178 #clock-cells = <0>; 180 #clock-cells = <0>;
179 clock-frequency = <0>; 181 clock-frequency = <0>;
180 }; 182 };
181 183
182 soc { 184 soc {
183 compatible = "simple-bus"; 185 compatible = "simple-bus";
184 interrupt-parent = <&gic>; 186 interrupt-parent = <&gic>;
185 #address-cells = <2>; 187 #address-cells = <2>;
186 #size-cells = <2>; 188 #size-cells = <2>;
187 ranges; 189 ranges;
188 190
189 rwdt: watchdog@e6020000 { 191 rwdt: watchdog@e6020000 {
190 compatible = "renesas, 192 compatible = "renesas,r8a77965-wdt",
191 "renesas, 193 "renesas,rcar-gen3-wdt";
192 reg = <0 0xe6020000 0 194 reg = <0 0xe6020000 0 0x0c>;
193 interrupts = <GIC_SPI 195 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
194 clocks = <&cpg CPG_MOD 196 clocks = <&cpg CPG_MOD 402>;
195 power-domains = <&sysc 197 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
196 resets = <&cpg 402>; 198 resets = <&cpg 402>;
197 status = "disabled"; 199 status = "disabled";
198 }; 200 };
199 201
200 gpio0: gpio@e6050000 { 202 gpio0: gpio@e6050000 {
201 compatible = "renesas, 203 compatible = "renesas,gpio-r8a77965",
202 "renesas, 204 "renesas,rcar-gen3-gpio";
203 reg = <0 0xe6050000 0 205 reg = <0 0xe6050000 0 0x50>;
204 interrupts = <GIC_SPI 206 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>; 207 #gpio-cells = <2>;
206 gpio-controller; 208 gpio-controller;
207 gpio-ranges = <&pfc 0 209 gpio-ranges = <&pfc 0 0 16>;
208 #interrupt-cells = <2> 210 #interrupt-cells = <2>;
209 interrupt-controller; 211 interrupt-controller;
210 clocks = <&cpg CPG_MOD 212 clocks = <&cpg CPG_MOD 912>;
211 power-domains = <&sysc 213 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
212 resets = <&cpg 912>; 214 resets = <&cpg 912>;
213 }; 215 };
214 216
215 gpio1: gpio@e6051000 { 217 gpio1: gpio@e6051000 {
216 compatible = "renesas, 218 compatible = "renesas,gpio-r8a77965",
217 "renesas, 219 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6051000 0 220 reg = <0 0xe6051000 0 0x50>;
219 interrupts = <GIC_SPI 221 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>; 222 #gpio-cells = <2>;
221 gpio-controller; 223 gpio-controller;
222 gpio-ranges = <&pfc 0 224 gpio-ranges = <&pfc 0 32 29>;
223 #interrupt-cells = <2> 225 #interrupt-cells = <2>;
224 interrupt-controller; 226 interrupt-controller;
225 clocks = <&cpg CPG_MOD 227 clocks = <&cpg CPG_MOD 911>;
226 power-domains = <&sysc 228 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
227 resets = <&cpg 911>; 229 resets = <&cpg 911>;
228 }; 230 };
229 231
230 gpio2: gpio@e6052000 { 232 gpio2: gpio@e6052000 {
231 compatible = "renesas, 233 compatible = "renesas,gpio-r8a77965",
232 "renesas, 234 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6052000 0 235 reg = <0 0xe6052000 0 0x50>;
234 interrupts = <GIC_SPI 236 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>; 237 #gpio-cells = <2>;
236 gpio-controller; 238 gpio-controller;
237 gpio-ranges = <&pfc 0 239 gpio-ranges = <&pfc 0 64 15>;
238 #interrupt-cells = <2> 240 #interrupt-cells = <2>;
239 interrupt-controller; 241 interrupt-controller;
240 clocks = <&cpg CPG_MOD 242 clocks = <&cpg CPG_MOD 910>;
241 power-domains = <&sysc 243 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
242 resets = <&cpg 910>; 244 resets = <&cpg 910>;
243 }; 245 };
244 246
245 gpio3: gpio@e6053000 { 247 gpio3: gpio@e6053000 {
246 compatible = "renesas, 248 compatible = "renesas,gpio-r8a77965",
247 "renesas, 249 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6053000 0 250 reg = <0 0xe6053000 0 0x50>;
249 interrupts = <GIC_SPI 251 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>; 252 #gpio-cells = <2>;
251 gpio-controller; 253 gpio-controller;
252 gpio-ranges = <&pfc 0 254 gpio-ranges = <&pfc 0 96 16>;
253 #interrupt-cells = <2> 255 #interrupt-cells = <2>;
254 interrupt-controller; 256 interrupt-controller;
255 clocks = <&cpg CPG_MOD 257 clocks = <&cpg CPG_MOD 909>;
256 power-domains = <&sysc 258 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
257 resets = <&cpg 909>; 259 resets = <&cpg 909>;
258 }; 260 };
259 261
260 gpio4: gpio@e6054000 { 262 gpio4: gpio@e6054000 {
261 compatible = "renesas, 263 compatible = "renesas,gpio-r8a77965",
262 "renesas, 264 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6054000 0 265 reg = <0 0xe6054000 0 0x50>;
264 interrupts = <GIC_SPI 266 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>; 267 #gpio-cells = <2>;
266 gpio-controller; 268 gpio-controller;
267 gpio-ranges = <&pfc 0 269 gpio-ranges = <&pfc 0 128 18>;
268 #interrupt-cells = <2> 270 #interrupt-cells = <2>;
269 interrupt-controller; 271 interrupt-controller;
270 clocks = <&cpg CPG_MOD 272 clocks = <&cpg CPG_MOD 908>;
271 power-domains = <&sysc 273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
272 resets = <&cpg 908>; 274 resets = <&cpg 908>;
273 }; 275 };
274 276
275 gpio5: gpio@e6055000 { 277 gpio5: gpio@e6055000 {
276 compatible = "renesas, 278 compatible = "renesas,gpio-r8a77965",
277 "renesas, 279 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6055000 0 280 reg = <0 0xe6055000 0 0x50>;
279 interrupts = <GIC_SPI 281 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>; 282 #gpio-cells = <2>;
281 gpio-controller; 283 gpio-controller;
282 gpio-ranges = <&pfc 0 284 gpio-ranges = <&pfc 0 160 26>;
283 #interrupt-cells = <2> 285 #interrupt-cells = <2>;
284 interrupt-controller; 286 interrupt-controller;
285 clocks = <&cpg CPG_MOD 287 clocks = <&cpg CPG_MOD 907>;
286 power-domains = <&sysc 288 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
287 resets = <&cpg 907>; 289 resets = <&cpg 907>;
288 }; 290 };
289 291
290 gpio6: gpio@e6055400 { 292 gpio6: gpio@e6055400 {
291 compatible = "renesas, 293 compatible = "renesas,gpio-r8a77965",
292 "renesas, 294 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055400 0 295 reg = <0 0xe6055400 0 0x50>;
294 interrupts = <GIC_SPI 296 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>; 297 #gpio-cells = <2>;
296 gpio-controller; 298 gpio-controller;
297 gpio-ranges = <&pfc 0 299 gpio-ranges = <&pfc 0 192 32>;
298 #interrupt-cells = <2> 300 #interrupt-cells = <2>;
299 interrupt-controller; 301 interrupt-controller;
300 clocks = <&cpg CPG_MOD 302 clocks = <&cpg CPG_MOD 906>;
301 power-domains = <&sysc 303 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
302 resets = <&cpg 906>; 304 resets = <&cpg 906>;
303 }; 305 };
304 306
305 gpio7: gpio@e6055800 { 307 gpio7: gpio@e6055800 {
306 compatible = "renesas, 308 compatible = "renesas,gpio-r8a77965",
307 "renesas, 309 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055800 0 310 reg = <0 0xe6055800 0 0x50>;
309 interrupts = <GIC_SPI 311 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>; 312 #gpio-cells = <2>;
311 gpio-controller; 313 gpio-controller;
312 gpio-ranges = <&pfc 0 314 gpio-ranges = <&pfc 0 224 4>;
313 #interrupt-cells = <2> 315 #interrupt-cells = <2>;
314 interrupt-controller; 316 interrupt-controller;
315 clocks = <&cpg CPG_MOD 317 clocks = <&cpg CPG_MOD 905>;
316 power-domains = <&sysc 318 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
317 resets = <&cpg 905>; 319 resets = <&cpg 905>;
318 }; 320 };
319 321
320 pfc: pinctrl@e6060000 { 322 pfc: pinctrl@e6060000 {
321 compatible = "renesas, 323 compatible = "renesas,pfc-r8a77965";
322 reg = <0 0xe6060000 0 324 reg = <0 0xe6060000 0 0x50c>;
323 }; 325 };
324 326
325 cmt0: timer@e60f0000 { 327 cmt0: timer@e60f0000 {
326 compatible = "renesas, 328 compatible = "renesas,r8a77965-cmt0",
327 "renesas, 329 "renesas,rcar-gen3-cmt0";
328 reg = <0 0xe60f0000 0 330 reg = <0 0xe60f0000 0 0x1004>;
329 interrupts = <GIC_SPI 331 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 332 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&cpg CPG_MOD 333 clocks = <&cpg CPG_MOD 303>;
332 clock-names = "fck"; 334 clock-names = "fck";
333 power-domains = <&sysc 335 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
334 resets = <&cpg 303>; 336 resets = <&cpg 303>;
335 status = "disabled"; 337 status = "disabled";
336 }; 338 };
337 339
338 cmt1: timer@e6130000 { 340 cmt1: timer@e6130000 {
339 compatible = "renesas, 341 compatible = "renesas,r8a77965-cmt1",
340 "renesas, 342 "renesas,rcar-gen3-cmt1";
341 reg = <0 0xe6130000 0 343 reg = <0 0xe6130000 0 0x1004>;
342 interrupts = <GIC_SPI 344 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 345 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 346 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 347 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 348 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 349 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 350 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 351 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&cpg CPG_MOD 352 clocks = <&cpg CPG_MOD 302>;
351 clock-names = "fck"; 353 clock-names = "fck";
352 power-domains = <&sysc 354 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
353 resets = <&cpg 302>; 355 resets = <&cpg 302>;
354 status = "disabled"; 356 status = "disabled";
355 }; 357 };
356 358
357 cmt2: timer@e6140000 { 359 cmt2: timer@e6140000 {
358 compatible = "renesas, 360 compatible = "renesas,r8a77965-cmt1",
359 "renesas, 361 "renesas,rcar-gen3-cmt1";
360 reg = <0 0xe6140000 0 362 reg = <0 0xe6140000 0 0x1004>;
361 interrupts = <GIC_SPI 363 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 364 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 365 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 366 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 367 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 368 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 369 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 370 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 371 clocks = <&cpg CPG_MOD 301>;
370 clock-names = "fck"; 372 clock-names = "fck";
371 power-domains = <&sysc 373 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
372 resets = <&cpg 301>; 374 resets = <&cpg 301>;
373 status = "disabled"; 375 status = "disabled";
374 }; 376 };
375 377
376 cmt3: timer@e6148000 { 378 cmt3: timer@e6148000 {
377 compatible = "renesas, 379 compatible = "renesas,r8a77965-cmt1",
378 "renesas, 380 "renesas,rcar-gen3-cmt1";
379 reg = <0 0xe6148000 0 381 reg = <0 0xe6148000 0 0x1004>;
380 interrupts = <GIC_SPI 382 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 383 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 384 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 385 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 386 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 387 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 388 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 389 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 390 clocks = <&cpg CPG_MOD 300>;
389 clock-names = "fck"; 391 clock-names = "fck";
390 power-domains = <&sysc 392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
391 resets = <&cpg 300>; 393 resets = <&cpg 300>;
392 status = "disabled"; 394 status = "disabled";
393 }; 395 };
394 396
395 cpg: clock-controller@e6150000 397 cpg: clock-controller@e6150000 {
396 compatible = "renesas, 398 compatible = "renesas,r8a77965-cpg-mssr";
397 reg = <0 0xe6150000 0 399 reg = <0 0xe6150000 0 0x1000>;
398 clocks = <&extal_clk>, 400 clocks = <&extal_clk>, <&extalr_clk>;
399 clock-names = "extal", 401 clock-names = "extal", "extalr";
400 #clock-cells = <2>; 402 #clock-cells = <2>;
401 #power-domain-cells = 403 #power-domain-cells = <0>;
402 #reset-cells = <1>; 404 #reset-cells = <1>;
403 }; 405 };
404 406
405 rst: reset-controller@e6160000 407 rst: reset-controller@e6160000 {
406 compatible = "renesas, 408 compatible = "renesas,r8a77965-rst";
407 reg = <0 0xe6160000 0 409 reg = <0 0xe6160000 0 0x0200>;
408 }; 410 };
409 411
410 sysc: system-controller@e61800 412 sysc: system-controller@e6180000 {
411 compatible = "renesas, 413 compatible = "renesas,r8a77965-sysc";
412 reg = <0 0xe6180000 0 414 reg = <0 0xe6180000 0 0x0400>;
413 #power-domain-cells = 415 #power-domain-cells = <1>;
414 }; 416 };
415 417
416 tsc: thermal@e6198000 { 418 tsc: thermal@e6198000 {
417 compatible = "renesas, 419 compatible = "renesas,r8a77965-thermal";
418 reg = <0 0xe6198000 0 420 reg = <0 0xe6198000 0 0x100>,
419 <0 0xe61a0000 0 421 <0 0xe61a0000 0 0x100>,
420 <0 0xe61a8000 0 422 <0 0xe61a8000 0 0x100>;
421 interrupts = <GIC_SPI 423 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 424 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 425 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 426 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc 427 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
426 resets = <&cpg 522>; 428 resets = <&cpg 522>;
427 #thermal-sensor-cells 429 #thermal-sensor-cells = <1>;
428 }; 430 };
429 431
430 intc_ex: interrupt-controller@ 432 intc_ex: interrupt-controller@e61c0000 {
431 compatible = "renesas, 433 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
432 #interrupt-cells = <2> 434 #interrupt-cells = <2>;
433 interrupt-controller; 435 interrupt-controller;
434 reg = <0 0xe61c0000 0 436 reg = <0 0xe61c0000 0 0x200>;
435 interrupts = <GIC_SPI 437 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
436 <GIC_SPI 438 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
437 <GIC_SPI 439 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
438 <GIC_SPI 440 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
439 <GIC_SPI 441 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 442 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 443 clocks = <&cpg CPG_MOD 407>;
442 power-domains = <&sysc 444 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
443 resets = <&cpg 407>; 445 resets = <&cpg 407>;
444 }; 446 };
445 447
446 tmu0: timer@e61e0000 { 448 tmu0: timer@e61e0000 {
447 compatible = "renesas, 449 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
448 reg = <0 0xe61e0000 0 450 reg = <0 0xe61e0000 0 0x30>;
449 interrupts = <GIC_SPI 451 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
450 <GIC_SPI 452 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 453 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
452 interrupt-names = "tun <<
453 clocks = <&cpg CPG_MOD 454 clocks = <&cpg CPG_MOD 125>;
454 clock-names = "fck"; 455 clock-names = "fck";
455 power-domains = <&sysc 456 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
456 resets = <&cpg 125>; 457 resets = <&cpg 125>;
457 status = "disabled"; 458 status = "disabled";
458 }; 459 };
459 460
460 tmu1: timer@e6fc0000 { 461 tmu1: timer@e6fc0000 {
461 compatible = "renesas, 462 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
462 reg = <0 0xe6fc0000 0 463 reg = <0 0xe6fc0000 0 0x30>;
463 interrupts = <GIC_SPI 464 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
464 <GIC_SPI 465 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
465 <GIC_SPI !! 466 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
466 <GIC_SPI <<
467 interrupt-names = "tun <<
468 clocks = <&cpg CPG_MOD 467 clocks = <&cpg CPG_MOD 124>;
469 clock-names = "fck"; 468 clock-names = "fck";
470 power-domains = <&sysc 469 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
471 resets = <&cpg 124>; 470 resets = <&cpg 124>;
472 status = "disabled"; 471 status = "disabled";
473 }; 472 };
474 473
475 tmu2: timer@e6fd0000 { 474 tmu2: timer@e6fd0000 {
476 compatible = "renesas, 475 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
477 reg = <0 0xe6fd0000 0 476 reg = <0 0xe6fd0000 0 0x30>;
478 interrupts = <GIC_SPI 477 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 478 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI !! 479 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
481 <GIC_SPI <<
482 interrupt-names = "tun <<
483 clocks = <&cpg CPG_MOD 480 clocks = <&cpg CPG_MOD 123>;
484 clock-names = "fck"; 481 clock-names = "fck";
485 power-domains = <&sysc 482 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
486 resets = <&cpg 123>; 483 resets = <&cpg 123>;
487 status = "disabled"; 484 status = "disabled";
488 }; 485 };
489 486
490 tmu3: timer@e6fe0000 { 487 tmu3: timer@e6fe0000 {
491 compatible = "renesas, 488 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
492 reg = <0 0xe6fe0000 0 489 reg = <0 0xe6fe0000 0 0x30>;
493 interrupts = <GIC_SPI 490 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
494 <GIC_SPI 491 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
495 <GIC_SPI 492 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
496 interrupt-names = "tun <<
497 clocks = <&cpg CPG_MOD 493 clocks = <&cpg CPG_MOD 122>;
498 clock-names = "fck"; 494 clock-names = "fck";
499 power-domains = <&sysc 495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
500 resets = <&cpg 122>; 496 resets = <&cpg 122>;
501 status = "disabled"; 497 status = "disabled";
502 }; 498 };
503 499
504 tmu4: timer@ffc00000 { 500 tmu4: timer@ffc00000 {
505 compatible = "renesas, 501 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
506 reg = <0 0xffc00000 0 502 reg = <0 0xffc00000 0 0x30>;
507 interrupts = <GIC_SPI 503 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 504 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 505 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
510 interrupt-names = "tun <<
511 clocks = <&cpg CPG_MOD 506 clocks = <&cpg CPG_MOD 121>;
512 clock-names = "fck"; 507 clock-names = "fck";
513 power-domains = <&sysc 508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
514 resets = <&cpg 121>; 509 resets = <&cpg 121>;
515 status = "disabled"; 510 status = "disabled";
516 }; 511 };
517 512
518 i2c0: i2c@e6500000 { 513 i2c0: i2c@e6500000 {
519 #address-cells = <1>; 514 #address-cells = <1>;
520 #size-cells = <0>; 515 #size-cells = <0>;
521 compatible = "renesas, 516 compatible = "renesas,i2c-r8a77965",
522 "renesas, 517 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6500000 0 518 reg = <0 0xe6500000 0 0x40>;
524 interrupts = <GIC_SPI 519 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 520 clocks = <&cpg CPG_MOD 931>;
526 power-domains = <&sysc 521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
527 resets = <&cpg 931>; 522 resets = <&cpg 931>;
528 dmas = <&dmac1 0x91>, 523 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
529 <&dmac2 0x91>, 524 <&dmac2 0x91>, <&dmac2 0x90>;
530 dma-names = "tx", "rx" 525 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 526 i2c-scl-internal-delay-ns = <110>;
532 status = "disabled"; 527 status = "disabled";
533 }; 528 };
534 529
535 i2c1: i2c@e6508000 { 530 i2c1: i2c@e6508000 {
536 #address-cells = <1>; 531 #address-cells = <1>;
537 #size-cells = <0>; 532 #size-cells = <0>;
538 compatible = "renesas, 533 compatible = "renesas,i2c-r8a77965",
539 "renesas, 534 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe6508000 0 535 reg = <0 0xe6508000 0 0x40>;
541 interrupts = <GIC_SPI 536 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 537 clocks = <&cpg CPG_MOD 930>;
543 power-domains = <&sysc 538 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
544 resets = <&cpg 930>; 539 resets = <&cpg 930>;
545 dmas = <&dmac1 0x93>, 540 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
546 <&dmac2 0x93>, 541 <&dmac2 0x93>, <&dmac2 0x92>;
547 dma-names = "tx", "rx" 542 dma-names = "tx", "rx", "tx", "rx";
548 i2c-scl-internal-delay 543 i2c-scl-internal-delay-ns = <6>;
549 status = "disabled"; 544 status = "disabled";
550 }; 545 };
551 546
552 i2c2: i2c@e6510000 { 547 i2c2: i2c@e6510000 {
553 #address-cells = <1>; 548 #address-cells = <1>;
554 #size-cells = <0>; 549 #size-cells = <0>;
555 compatible = "renesas, 550 compatible = "renesas,i2c-r8a77965",
556 "renesas, 551 "renesas,rcar-gen3-i2c";
557 reg = <0 0xe6510000 0 552 reg = <0 0xe6510000 0 0x40>;
558 interrupts = <GIC_SPI 553 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 554 clocks = <&cpg CPG_MOD 929>;
560 power-domains = <&sysc 555 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
561 resets = <&cpg 929>; 556 resets = <&cpg 929>;
562 dmas = <&dmac1 0x95>, 557 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
563 <&dmac2 0x95>, 558 <&dmac2 0x95>, <&dmac2 0x94>;
564 dma-names = "tx", "rx" 559 dma-names = "tx", "rx", "tx", "rx";
565 i2c-scl-internal-delay 560 i2c-scl-internal-delay-ns = <6>;
566 status = "disabled"; 561 status = "disabled";
567 }; 562 };
568 563
569 i2c3: i2c@e66d0000 { 564 i2c3: i2c@e66d0000 {
570 #address-cells = <1>; 565 #address-cells = <1>;
571 #size-cells = <0>; 566 #size-cells = <0>;
572 compatible = "renesas, 567 compatible = "renesas,i2c-r8a77965",
573 "renesas, 568 "renesas,rcar-gen3-i2c";
574 reg = <0 0xe66d0000 0 569 reg = <0 0xe66d0000 0 0x40>;
575 interrupts = <GIC_SPI 570 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 571 clocks = <&cpg CPG_MOD 928>;
577 power-domains = <&sysc 572 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
578 resets = <&cpg 928>; 573 resets = <&cpg 928>;
579 dmas = <&dmac0 0x97>, 574 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
580 dma-names = "tx", "rx" 575 dma-names = "tx", "rx";
581 i2c-scl-internal-delay 576 i2c-scl-internal-delay-ns = <110>;
582 status = "disabled"; 577 status = "disabled";
583 }; 578 };
584 579
585 i2c4: i2c@e66d8000 { 580 i2c4: i2c@e66d8000 {
586 #address-cells = <1>; 581 #address-cells = <1>;
587 #size-cells = <0>; 582 #size-cells = <0>;
588 compatible = "renesas, 583 compatible = "renesas,i2c-r8a77965",
589 "renesas, 584 "renesas,rcar-gen3-i2c";
590 reg = <0 0xe66d8000 0 585 reg = <0 0xe66d8000 0 0x40>;
591 interrupts = <GIC_SPI 586 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&cpg CPG_MOD 587 clocks = <&cpg CPG_MOD 927>;
593 power-domains = <&sysc 588 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
594 resets = <&cpg 927>; 589 resets = <&cpg 927>;
595 dmas = <&dmac0 0x99>, 590 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
596 dma-names = "tx", "rx" 591 dma-names = "tx", "rx";
597 i2c-scl-internal-delay 592 i2c-scl-internal-delay-ns = <110>;
598 status = "disabled"; 593 status = "disabled";
599 }; 594 };
600 595
601 i2c5: i2c@e66e0000 { 596 i2c5: i2c@e66e0000 {
602 #address-cells = <1>; 597 #address-cells = <1>;
603 #size-cells = <0>; 598 #size-cells = <0>;
604 compatible = "renesas, 599 compatible = "renesas,i2c-r8a77965",
605 "renesas, 600 "renesas,rcar-gen3-i2c";
606 reg = <0 0xe66e0000 0 601 reg = <0 0xe66e0000 0 0x40>;
607 interrupts = <GIC_SPI 602 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&cpg CPG_MOD 603 clocks = <&cpg CPG_MOD 919>;
609 power-domains = <&sysc 604 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
610 resets = <&cpg 919>; 605 resets = <&cpg 919>;
611 dmas = <&dmac0 0x9b>, 606 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
612 dma-names = "tx", "rx" 607 dma-names = "tx", "rx";
613 i2c-scl-internal-delay 608 i2c-scl-internal-delay-ns = <110>;
614 status = "disabled"; 609 status = "disabled";
615 }; 610 };
616 611
617 i2c6: i2c@e66e8000 { 612 i2c6: i2c@e66e8000 {
618 #address-cells = <1>; 613 #address-cells = <1>;
619 #size-cells = <0>; 614 #size-cells = <0>;
620 compatible = "renesas, 615 compatible = "renesas,i2c-r8a77965",
621 "renesas, 616 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66e8000 0 617 reg = <0 0xe66e8000 0 0x40>;
623 interrupts = <GIC_SPI 618 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&cpg CPG_MOD 619 clocks = <&cpg CPG_MOD 918>;
625 power-domains = <&sysc 620 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
626 resets = <&cpg 918>; 621 resets = <&cpg 918>;
627 dmas = <&dmac0 0x9d>, 622 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
628 dma-names = "tx", "rx" 623 dma-names = "tx", "rx";
629 i2c-scl-internal-delay 624 i2c-scl-internal-delay-ns = <6>;
630 status = "disabled"; 625 status = "disabled";
631 }; 626 };
632 627
633 i2c_dvfs: i2c@e60b0000 { 628 i2c_dvfs: i2c@e60b0000 {
634 #address-cells = <1>; 629 #address-cells = <1>;
635 #size-cells = <0>; 630 #size-cells = <0>;
636 compatible = "renesas, 631 compatible = "renesas,iic-r8a77965",
637 "renesas, 632 "renesas,rcar-gen3-iic",
638 "renesas, 633 "renesas,rmobile-iic";
639 reg = <0 0xe60b0000 0 634 reg = <0 0xe60b0000 0 0x425>;
640 interrupts = <GIC_SPI 635 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&cpg CPG_MOD 636 clocks = <&cpg CPG_MOD 926>;
642 power-domains = <&sysc 637 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
643 resets = <&cpg 926>; 638 resets = <&cpg 926>;
644 dmas = <&dmac0 0x11>, 639 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
645 dma-names = "tx", "rx" 640 dma-names = "tx", "rx";
646 status = "disabled"; 641 status = "disabled";
647 }; 642 };
648 643
649 hscif0: serial@e6540000 { 644 hscif0: serial@e6540000 {
650 compatible = "renesas, 645 compatible = "renesas,hscif-r8a77965",
651 "renesas, 646 "renesas,rcar-gen3-hscif",
652 "renesas, 647 "renesas,hscif";
653 reg = <0 0xe6540000 0 648 reg = <0 0xe6540000 0 0x60>;
654 interrupts = <GIC_SPI 649 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 650 clocks = <&cpg CPG_MOD 520>,
656 <&cpg CPG_COR 651 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
657 <&scif_clk>; 652 <&scif_clk>;
658 clock-names = "fck", " 653 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x31>, 654 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
660 <&dmac2 0x31>, 655 <&dmac2 0x31>, <&dmac2 0x30>;
661 dma-names = "tx", "rx" 656 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 657 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
663 resets = <&cpg 520>; 658 resets = <&cpg 520>;
664 status = "disabled"; 659 status = "disabled";
665 }; 660 };
666 661
667 hscif1: serial@e6550000 { 662 hscif1: serial@e6550000 {
668 compatible = "renesas, 663 compatible = "renesas,hscif-r8a77965",
669 "renesas, 664 "renesas,rcar-gen3-hscif",
670 "renesas, 665 "renesas,hscif";
671 reg = <0 0xe6550000 0 666 reg = <0 0xe6550000 0 0x60>;
672 interrupts = <GIC_SPI 667 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 668 clocks = <&cpg CPG_MOD 519>,
674 <&cpg CPG_COR 669 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
675 <&scif_clk>; 670 <&scif_clk>;
676 clock-names = "fck", " 671 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac1 0x33>, 672 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
678 <&dmac2 0x33>, 673 <&dmac2 0x33>, <&dmac2 0x32>;
679 dma-names = "tx", "rx" 674 dma-names = "tx", "rx", "tx", "rx";
680 power-domains = <&sysc 675 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
681 resets = <&cpg 519>; 676 resets = <&cpg 519>;
682 status = "disabled"; 677 status = "disabled";
683 }; 678 };
684 679
685 hscif2: serial@e6560000 { 680 hscif2: serial@e6560000 {
686 compatible = "renesas, 681 compatible = "renesas,hscif-r8a77965",
687 "renesas, 682 "renesas,rcar-gen3-hscif",
688 "renesas, 683 "renesas,hscif";
689 reg = <0 0xe6560000 0 684 reg = <0 0xe6560000 0 0x60>;
690 interrupts = <GIC_SPI 685 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&cpg CPG_MOD 686 clocks = <&cpg CPG_MOD 518>,
692 <&cpg CPG_COR 687 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
693 <&scif_clk>; 688 <&scif_clk>;
694 clock-names = "fck", " 689 clock-names = "fck", "brg_int", "scif_clk";
695 dmas = <&dmac1 0x35>, 690 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
696 <&dmac2 0x35>, 691 <&dmac2 0x35>, <&dmac2 0x34>;
697 dma-names = "tx", "rx" 692 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc 693 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
699 resets = <&cpg 518>; 694 resets = <&cpg 518>;
700 status = "disabled"; 695 status = "disabled";
701 }; 696 };
702 697
703 hscif3: serial@e66a0000 { 698 hscif3: serial@e66a0000 {
704 compatible = "renesas, 699 compatible = "renesas,hscif-r8a77965",
705 "renesas, 700 "renesas,rcar-gen3-hscif",
706 "renesas, 701 "renesas,hscif";
707 reg = <0 0xe66a0000 0 702 reg = <0 0xe66a0000 0 0x60>;
708 interrupts = <GIC_SPI 703 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 704 clocks = <&cpg CPG_MOD 517>,
710 <&cpg CPG_COR 705 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
711 <&scif_clk>; 706 <&scif_clk>;
712 clock-names = "fck", " 707 clock-names = "fck", "brg_int", "scif_clk";
713 dmas = <&dmac0 0x37>, 708 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
714 dma-names = "tx", "rx" 709 dma-names = "tx", "rx";
715 power-domains = <&sysc 710 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
716 resets = <&cpg 517>; 711 resets = <&cpg 517>;
717 status = "disabled"; 712 status = "disabled";
718 }; 713 };
719 714
720 hscif4: serial@e66b0000 { 715 hscif4: serial@e66b0000 {
721 compatible = "renesas, 716 compatible = "renesas,hscif-r8a77965",
722 "renesas, 717 "renesas,rcar-gen3-hscif",
723 "renesas, 718 "renesas,hscif";
724 reg = <0 0xe66b0000 0 719 reg = <0 0xe66b0000 0 0x60>;
725 interrupts = <GIC_SPI 720 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 721 clocks = <&cpg CPG_MOD 516>,
727 <&cpg CPG_COR 722 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
728 <&scif_clk>; 723 <&scif_clk>;
729 clock-names = "fck", " 724 clock-names = "fck", "brg_int", "scif_clk";
730 dmas = <&dmac0 0x39>, 725 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
731 dma-names = "tx", "rx" 726 dma-names = "tx", "rx";
732 power-domains = <&sysc 727 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
733 resets = <&cpg 516>; 728 resets = <&cpg 516>;
734 status = "disabled"; 729 status = "disabled";
735 }; 730 };
736 731
737 hsusb: usb@e6590000 { 732 hsusb: usb@e6590000 {
738 compatible = "renesas, 733 compatible = "renesas,usbhs-r8a77965",
739 "renesas, 734 "renesas,rcar-gen3-usbhs";
740 reg = <0 0xe6590000 0 735 reg = <0 0xe6590000 0 0x200>;
741 interrupts = <GIC_SPI 736 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 737 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
743 dmas = <&usb_dmac0 0>, 738 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
744 <&usb_dmac1 0>, 739 <&usb_dmac1 0>, <&usb_dmac1 1>;
745 dma-names = "ch0", "ch 740 dma-names = "ch0", "ch1", "ch2", "ch3";
746 renesas,buswait = <11> 741 renesas,buswait = <11>;
747 phys = <&usb2_phy0 3>; 742 phys = <&usb2_phy0 3>;
748 phy-names = "usb"; 743 phy-names = "usb";
749 power-domains = <&sysc 744 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
750 resets = <&cpg 704>, < 745 resets = <&cpg 704>, <&cpg 703>;
751 status = "disabled"; 746 status = "disabled";
752 }; 747 };
753 748
754 usb_dmac0: dma-controller@e65a 749 usb_dmac0: dma-controller@e65a0000 {
755 compatible = "renesas, 750 compatible = "renesas,r8a77965-usb-dmac",
756 "renesas, 751 "renesas,usb-dmac";
757 reg = <0 0xe65a0000 0 752 reg = <0 0xe65a0000 0 0x100>;
758 interrupts = <GIC_SPI 753 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 754 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
760 interrupt-names = "ch0 755 interrupt-names = "ch0", "ch1";
761 clocks = <&cpg CPG_MOD 756 clocks = <&cpg CPG_MOD 330>;
762 power-domains = <&sysc 757 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
763 resets = <&cpg 330>; 758 resets = <&cpg 330>;
764 #dma-cells = <1>; 759 #dma-cells = <1>;
765 dma-channels = <2>; 760 dma-channels = <2>;
766 }; 761 };
767 762
768 usb_dmac1: dma-controller@e65b 763 usb_dmac1: dma-controller@e65b0000 {
769 compatible = "renesas, 764 compatible = "renesas,r8a77965-usb-dmac",
770 "renesas, 765 "renesas,usb-dmac";
771 reg = <0 0xe65b0000 0 766 reg = <0 0xe65b0000 0 0x100>;
772 interrupts = <GIC_SPI 767 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 768 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
774 interrupt-names = "ch0 769 interrupt-names = "ch0", "ch1";
775 clocks = <&cpg CPG_MOD 770 clocks = <&cpg CPG_MOD 331>;
776 power-domains = <&sysc 771 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
777 resets = <&cpg 331>; 772 resets = <&cpg 331>;
778 #dma-cells = <1>; 773 #dma-cells = <1>;
779 dma-channels = <2>; 774 dma-channels = <2>;
780 }; 775 };
781 776
782 usb3_phy0: usb-phy@e65ee000 { 777 usb3_phy0: usb-phy@e65ee000 {
783 compatible = "renesas, 778 compatible = "renesas,r8a77965-usb3-phy",
784 "renesas, 779 "renesas,rcar-gen3-usb3-phy";
785 reg = <0 0xe65ee000 0 780 reg = <0 0xe65ee000 0 0x90>;
786 clocks = <&cpg CPG_MOD 781 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
787 <&usb_extal_c 782 <&usb_extal_clk>;
788 clock-names = "usb3-if 783 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
789 power-domains = <&sysc 784 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
790 resets = <&cpg 328>; 785 resets = <&cpg 328>;
791 #phy-cells = <0>; 786 #phy-cells = <0>;
792 status = "disabled"; 787 status = "disabled";
793 }; 788 };
794 789
795 arm_cc630p: crypto@e6601000 { 790 arm_cc630p: crypto@e6601000 {
796 compatible = "arm,cryp 791 compatible = "arm,cryptocell-630p-ree";
797 interrupts = <GIC_SPI 792 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
798 reg = <0x0 0xe6601000 793 reg = <0x0 0xe6601000 0 0x1000>;
799 clocks = <&cpg CPG_MOD 794 clocks = <&cpg CPG_MOD 229>;
800 resets = <&cpg 229>; 795 resets = <&cpg 229>;
801 power-domains = <&sysc 796 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
802 }; 797 };
803 798
804 dmac0: dma-controller@e6700000 799 dmac0: dma-controller@e6700000 {
805 compatible = "renesas, 800 compatible = "renesas,dmac-r8a77965",
806 "renesas, 801 "renesas,rcar-dmac";
807 reg = <0 0xe6700000 0 802 reg = <0 0xe6700000 0 0x10000>;
808 interrupts = <GIC_SPI 803 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 804 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 805 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 806 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 807 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 808 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 809 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 810 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 811 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 812 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
818 <GIC_SPI 813 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_SPI 814 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_SPI 815 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_SPI 816 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 817 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 818 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 819 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "err 820 interrupt-names = "error",
826 "ch0", 821 "ch0", "ch1", "ch2", "ch3",
827 "ch4", 822 "ch4", "ch5", "ch6", "ch7",
828 "ch8", 823 "ch8", "ch9", "ch10", "ch11",
829 "ch12" 824 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 825 clocks = <&cpg CPG_MOD 219>;
831 clock-names = "fck"; 826 clock-names = "fck";
832 power-domains = <&sysc 827 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
833 resets = <&cpg 219>; 828 resets = <&cpg 219>;
834 #dma-cells = <1>; 829 #dma-cells = <1>;
835 dma-channels = <16>; 830 dma-channels = <16>;
836 iommus = <&ipmmu_ds0 0 831 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
837 <&ipmmu_ds0 2>, 832 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
838 <&ipmmu_ds0 4>, 833 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
839 <&ipmmu_ds0 6>, 834 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
840 <&ipmmu_ds0 8>, 835 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
841 <&ipmmu_ds0 10> 836 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
842 <&ipmmu_ds0 12> 837 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
843 <&ipmmu_ds0 14> 838 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
844 }; 839 };
845 840
846 dmac1: dma-controller@e7300000 841 dmac1: dma-controller@e7300000 {
847 compatible = "renesas, 842 compatible = "renesas,dmac-r8a77965",
848 "renesas, 843 "renesas,rcar-dmac";
849 reg = <0 0xe7300000 0 844 reg = <0 0xe7300000 0 0x10000>;
850 interrupts = <GIC_SPI 845 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 846 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 847 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 848 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 849 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 850 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 851 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 852 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 853 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 854 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 855 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 856 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
862 <GIC_SPI 857 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 858 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 859 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 860 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 861 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
867 interrupt-names = "err 862 interrupt-names = "error",
868 "ch0", 863 "ch0", "ch1", "ch2", "ch3",
869 "ch4", 864 "ch4", "ch5", "ch6", "ch7",
870 "ch8", 865 "ch8", "ch9", "ch10", "ch11",
871 "ch12" 866 "ch12", "ch13", "ch14", "ch15";
872 clocks = <&cpg CPG_MOD 867 clocks = <&cpg CPG_MOD 218>;
873 clock-names = "fck"; 868 clock-names = "fck";
874 power-domains = <&sysc 869 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 resets = <&cpg 218>; 870 resets = <&cpg 218>;
876 #dma-cells = <1>; 871 #dma-cells = <1>;
877 dma-channels = <16>; 872 dma-channels = <16>;
878 iommus = <&ipmmu_ds1 0 873 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
879 <&ipmmu_ds1 2>, 874 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
880 <&ipmmu_ds1 4>, 875 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
881 <&ipmmu_ds1 6>, 876 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
882 <&ipmmu_ds1 8>, 877 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
883 <&ipmmu_ds1 10> 878 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
884 <&ipmmu_ds1 12> 879 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
885 <&ipmmu_ds1 14> 880 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
886 }; 881 };
887 882
888 dmac2: dma-controller@e7310000 883 dmac2: dma-controller@e7310000 {
889 compatible = "renesas, 884 compatible = "renesas,dmac-r8a77965",
890 "renesas, 885 "renesas,rcar-dmac";
891 reg = <0 0xe7310000 0 886 reg = <0 0xe7310000 0 0x10000>;
892 interrupts = <GIC_SPI 887 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
893 <GIC_SPI 888 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
894 <GIC_SPI 889 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
895 <GIC_SPI 890 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
896 <GIC_SPI 891 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
897 <GIC_SPI 892 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
898 <GIC_SPI 893 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
899 <GIC_SPI 894 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
900 <GIC_SPI 895 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
901 <GIC_SPI 896 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
902 <GIC_SPI 897 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
903 <GIC_SPI 898 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
904 <GIC_SPI 899 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
905 <GIC_SPI 900 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
906 <GIC_SPI 901 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
907 <GIC_SPI 902 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
908 <GIC_SPI 903 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
909 interrupt-names = "err 904 interrupt-names = "error",
910 "ch0", 905 "ch0", "ch1", "ch2", "ch3",
911 "ch4", 906 "ch4", "ch5", "ch6", "ch7",
912 "ch8", 907 "ch8", "ch9", "ch10", "ch11",
913 "ch12" 908 "ch12", "ch13", "ch14", "ch15";
914 clocks = <&cpg CPG_MOD 909 clocks = <&cpg CPG_MOD 217>;
915 clock-names = "fck"; 910 clock-names = "fck";
916 power-domains = <&sysc 911 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
917 resets = <&cpg 217>; 912 resets = <&cpg 217>;
918 #dma-cells = <1>; 913 #dma-cells = <1>;
919 dma-channels = <16>; 914 dma-channels = <16>;
920 iommus = <&ipmmu_ds1 1 915 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
921 <&ipmmu_ds1 18> 916 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
922 <&ipmmu_ds1 20> 917 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
923 <&ipmmu_ds1 22> 918 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
924 <&ipmmu_ds1 24> 919 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
925 <&ipmmu_ds1 26> 920 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
926 <&ipmmu_ds1 28> 921 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
927 <&ipmmu_ds1 30> 922 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
928 }; 923 };
929 924
930 ipmmu_ds0: iommu@e6740000 { 925 ipmmu_ds0: iommu@e6740000 {
931 compatible = "renesas, 926 compatible = "renesas,ipmmu-r8a77965";
932 reg = <0 0xe6740000 0 927 reg = <0 0xe6740000 0 0x1000>;
933 renesas,ipmmu-main = < 928 renesas,ipmmu-main = <&ipmmu_mm 0>;
934 power-domains = <&sysc 929 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 930 #iommu-cells = <1>;
936 }; 931 };
937 932
938 ipmmu_ds1: iommu@e7740000 { 933 ipmmu_ds1: iommu@e7740000 {
939 compatible = "renesas, 934 compatible = "renesas,ipmmu-r8a77965";
940 reg = <0 0xe7740000 0 935 reg = <0 0xe7740000 0 0x1000>;
941 renesas,ipmmu-main = < 936 renesas,ipmmu-main = <&ipmmu_mm 1>;
942 power-domains = <&sysc 937 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
943 #iommu-cells = <1>; 938 #iommu-cells = <1>;
944 }; 939 };
945 940
946 ipmmu_hc: iommu@e6570000 { 941 ipmmu_hc: iommu@e6570000 {
947 compatible = "renesas, 942 compatible = "renesas,ipmmu-r8a77965";
948 reg = <0 0xe6570000 0 943 reg = <0 0xe6570000 0 0x1000>;
949 renesas,ipmmu-main = < 944 renesas,ipmmu-main = <&ipmmu_mm 2>;
950 power-domains = <&sysc 945 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 946 #iommu-cells = <1>;
952 }; 947 };
953 948
954 ipmmu_mm: iommu@e67b0000 { 949 ipmmu_mm: iommu@e67b0000 {
955 compatible = "renesas, 950 compatible = "renesas,ipmmu-r8a77965";
956 reg = <0 0xe67b0000 0 951 reg = <0 0xe67b0000 0 0x1000>;
957 interrupts = <GIC_SPI 952 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 953 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
959 power-domains = <&sysc 954 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
960 #iommu-cells = <1>; 955 #iommu-cells = <1>;
961 }; 956 };
962 957
963 ipmmu_mp: iommu@ec670000 { 958 ipmmu_mp: iommu@ec670000 {
964 compatible = "renesas, 959 compatible = "renesas,ipmmu-r8a77965";
965 reg = <0 0xec670000 0 960 reg = <0 0xec670000 0 0x1000>;
966 renesas,ipmmu-main = < 961 renesas,ipmmu-main = <&ipmmu_mm 4>;
967 power-domains = <&sysc 962 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
968 #iommu-cells = <1>; 963 #iommu-cells = <1>;
969 }; 964 };
970 965
971 ipmmu_pv0: iommu@fd800000 { 966 ipmmu_pv0: iommu@fd800000 {
972 compatible = "renesas, 967 compatible = "renesas,ipmmu-r8a77965";
973 reg = <0 0xfd800000 0 968 reg = <0 0xfd800000 0 0x1000>;
974 renesas,ipmmu-main = < 969 renesas,ipmmu-main = <&ipmmu_mm 6>;
975 power-domains = <&sysc 970 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
976 #iommu-cells = <1>; 971 #iommu-cells = <1>;
977 }; 972 };
978 973
979 ipmmu_rt: iommu@ffc80000 { 974 ipmmu_rt: iommu@ffc80000 {
980 compatible = "renesas, 975 compatible = "renesas,ipmmu-r8a77965";
981 reg = <0 0xffc80000 0 976 reg = <0 0xffc80000 0 0x1000>;
982 renesas,ipmmu-main = < 977 renesas,ipmmu-main = <&ipmmu_mm 10>;
983 power-domains = <&sysc 978 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
984 #iommu-cells = <1>; 979 #iommu-cells = <1>;
985 }; 980 };
986 981
987 ipmmu_vc0: iommu@fe6b0000 { 982 ipmmu_vc0: iommu@fe6b0000 {
988 compatible = "renesas, 983 compatible = "renesas,ipmmu-r8a77965";
989 reg = <0 0xfe6b0000 0 984 reg = <0 0xfe6b0000 0 0x1000>;
990 renesas,ipmmu-main = < 985 renesas,ipmmu-main = <&ipmmu_mm 12>;
991 power-domains = <&sysc 986 power-domains = <&sysc R8A77965_PD_A3VC>;
992 #iommu-cells = <1>; 987 #iommu-cells = <1>;
993 }; 988 };
994 989
995 ipmmu_vi0: iommu@febd0000 { 990 ipmmu_vi0: iommu@febd0000 {
996 compatible = "renesas, 991 compatible = "renesas,ipmmu-r8a77965";
997 reg = <0 0xfebd0000 0 992 reg = <0 0xfebd0000 0 0x1000>;
998 renesas,ipmmu-main = < 993 renesas,ipmmu-main = <&ipmmu_mm 14>;
999 power-domains = <&sysc 994 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1000 #iommu-cells = <1>; 995 #iommu-cells = <1>;
1001 }; 996 };
1002 997
1003 ipmmu_vp0: iommu@fe990000 { 998 ipmmu_vp0: iommu@fe990000 {
1004 compatible = "renesas 999 compatible = "renesas,ipmmu-r8a77965";
1005 reg = <0 0xfe990000 0 1000 reg = <0 0xfe990000 0 0x1000>;
1006 renesas,ipmmu-main = 1001 renesas,ipmmu-main = <&ipmmu_mm 16>;
1007 power-domains = <&sys 1002 power-domains = <&sysc R8A77965_PD_A3VP>;
1008 #iommu-cells = <1>; 1003 #iommu-cells = <1>;
1009 }; 1004 };
1010 1005
1011 avb: ethernet@e6800000 { 1006 avb: ethernet@e6800000 {
1012 compatible = "renesas 1007 compatible = "renesas,etheravb-r8a77965",
1013 "renesas 1008 "renesas,etheravb-rcar-gen3";
1014 reg = <0 0xe6800000 0 1009 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1015 interrupts = <GIC_SPI 1010 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1016 <GIC_SPI 1011 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 1012 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 1013 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 1014 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 1015 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 1016 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 1017 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 1018 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 1019 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 1020 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 1021 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 1022 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 1023 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 1024 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 1025 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 1026 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 1027 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 1028 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 1029 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 1030 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 1031 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 1032 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 1033 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 1034 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1040 interrupt-names = "ch 1035 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1041 "ch 1036 "ch4", "ch5", "ch6", "ch7",
1042 "ch 1037 "ch8", "ch9", "ch10", "ch11",
1043 "ch 1038 "ch12", "ch13", "ch14", "ch15",
1044 "ch 1039 "ch16", "ch17", "ch18", "ch19",
1045 "ch 1040 "ch20", "ch21", "ch22", "ch23",
1046 "ch 1041 "ch24";
1047 clocks = <&cpg CPG_MO 1042 clocks = <&cpg CPG_MOD 812>;
1048 clock-names = "fck"; 1043 clock-names = "fck";
1049 power-domains = <&sys 1044 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1050 resets = <&cpg 812>; 1045 resets = <&cpg 812>;
1051 phy-mode = "rgmii"; 1046 phy-mode = "rgmii";
1052 rx-internal-delay-ps 1047 rx-internal-delay-ps = <0>;
1053 tx-internal-delay-ps 1048 tx-internal-delay-ps = <0>;
1054 iommus = <&ipmmu_ds0 1049 iommus = <&ipmmu_ds0 16>;
1055 #address-cells = <1>; 1050 #address-cells = <1>;
1056 #size-cells = <0>; 1051 #size-cells = <0>;
1057 status = "disabled"; 1052 status = "disabled";
1058 }; 1053 };
1059 1054
1060 can0: can@e6c30000 { 1055 can0: can@e6c30000 {
1061 compatible = "renesas 1056 compatible = "renesas,can-r8a77965",
1062 "renesas 1057 "renesas,rcar-gen3-can";
1063 reg = <0 0xe6c30000 0 1058 reg = <0 0xe6c30000 0 0x1000>;
1064 interrupts = <GIC_SPI 1059 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&cpg CPG_MO 1060 clocks = <&cpg CPG_MOD 916>,
1066 <&cpg CPG_CORE 1061 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1067 <&can_clk>; 1062 <&can_clk>;
1068 clock-names = "clkp1" 1063 clock-names = "clkp1", "clkp2", "can_clk";
1069 assigned-clocks = <&c 1064 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1070 assigned-clock-rates 1065 assigned-clock-rates = <40000000>;
1071 power-domains = <&sys 1066 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1072 resets = <&cpg 916>; 1067 resets = <&cpg 916>;
1073 status = "disabled"; 1068 status = "disabled";
1074 }; 1069 };
1075 1070
1076 can1: can@e6c38000 { 1071 can1: can@e6c38000 {
1077 compatible = "renesas 1072 compatible = "renesas,can-r8a77965",
1078 "renesas 1073 "renesas,rcar-gen3-can";
1079 reg = <0 0xe6c38000 0 1074 reg = <0 0xe6c38000 0 0x1000>;
1080 interrupts = <GIC_SPI 1075 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1081 clocks = <&cpg CPG_MO 1076 clocks = <&cpg CPG_MOD 915>,
1082 <&cpg CPG_CORE 1077 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1083 <&can_clk>; 1078 <&can_clk>;
1084 clock-names = "clkp1" 1079 clock-names = "clkp1", "clkp2", "can_clk";
1085 assigned-clocks = <&c 1080 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1086 assigned-clock-rates 1081 assigned-clock-rates = <40000000>;
1087 power-domains = <&sys 1082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1088 resets = <&cpg 915>; 1083 resets = <&cpg 915>;
1089 status = "disabled"; 1084 status = "disabled";
1090 }; 1085 };
1091 1086
1092 canfd: can@e66c0000 { 1087 canfd: can@e66c0000 {
1093 compatible = "renesas 1088 compatible = "renesas,r8a77965-canfd",
1094 "renesas 1089 "renesas,rcar-gen3-canfd";
1095 reg = <0 0xe66c0000 0 1090 reg = <0 0xe66c0000 0 0x8000>;
1096 interrupts = <GIC_SPI 1091 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1097 <GIC_SPI 3 1092 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1098 interrupt-names = "ch 1093 interrupt-names = "ch_int", "g_int";
1099 clocks = <&cpg CPG_MO 1094 clocks = <&cpg CPG_MOD 914>,
1100 <&cpg CPG_CORE 1095 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1101 <&can_clk>; 1096 <&can_clk>;
1102 clock-names = "fck", 1097 clock-names = "fck", "canfd", "can_clk";
1103 assigned-clocks = <&c 1098 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1104 assigned-clock-rates 1099 assigned-clock-rates = <40000000>;
1105 power-domains = <&sys 1100 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1106 resets = <&cpg 914>; 1101 resets = <&cpg 914>;
1107 status = "disabled"; 1102 status = "disabled";
1108 1103
1109 channel0 { 1104 channel0 {
1110 status = "dis 1105 status = "disabled";
1111 }; 1106 };
1112 1107
1113 channel1 { 1108 channel1 {
1114 status = "dis 1109 status = "disabled";
1115 }; 1110 };
1116 }; 1111 };
1117 1112
1118 pwm0: pwm@e6e30000 { 1113 pwm0: pwm@e6e30000 {
1119 compatible = "renesas 1114 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1120 reg = <0 0xe6e30000 0 1115 reg = <0 0xe6e30000 0 8>;
1121 #pwm-cells = <2>; 1116 #pwm-cells = <2>;
1122 clocks = <&cpg CPG_MO 1117 clocks = <&cpg CPG_MOD 523>;
1123 resets = <&cpg 523>; 1118 resets = <&cpg 523>;
1124 power-domains = <&sys 1119 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1125 status = "disabled"; 1120 status = "disabled";
1126 }; 1121 };
1127 1122
1128 pwm1: pwm@e6e31000 { 1123 pwm1: pwm@e6e31000 {
1129 compatible = "renesas 1124 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1130 reg = <0 0xe6e31000 0 1125 reg = <0 0xe6e31000 0 8>;
1131 #pwm-cells = <2>; 1126 #pwm-cells = <2>;
1132 clocks = <&cpg CPG_MO 1127 clocks = <&cpg CPG_MOD 523>;
1133 resets = <&cpg 523>; 1128 resets = <&cpg 523>;
1134 power-domains = <&sys 1129 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1135 status = "disabled"; 1130 status = "disabled";
1136 }; 1131 };
1137 1132
1138 pwm2: pwm@e6e32000 { 1133 pwm2: pwm@e6e32000 {
1139 compatible = "renesas 1134 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1140 reg = <0 0xe6e32000 0 1135 reg = <0 0xe6e32000 0 8>;
1141 #pwm-cells = <2>; 1136 #pwm-cells = <2>;
1142 clocks = <&cpg CPG_MO 1137 clocks = <&cpg CPG_MOD 523>;
1143 resets = <&cpg 523>; 1138 resets = <&cpg 523>;
1144 power-domains = <&sys 1139 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1145 status = "disabled"; 1140 status = "disabled";
1146 }; 1141 };
1147 1142
1148 pwm3: pwm@e6e33000 { 1143 pwm3: pwm@e6e33000 {
1149 compatible = "renesas 1144 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1150 reg = <0 0xe6e33000 0 1145 reg = <0 0xe6e33000 0 8>;
1151 #pwm-cells = <2>; 1146 #pwm-cells = <2>;
1152 clocks = <&cpg CPG_MO 1147 clocks = <&cpg CPG_MOD 523>;
1153 resets = <&cpg 523>; 1148 resets = <&cpg 523>;
1154 power-domains = <&sys 1149 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1155 status = "disabled"; 1150 status = "disabled";
1156 }; 1151 };
1157 1152
1158 pwm4: pwm@e6e34000 { 1153 pwm4: pwm@e6e34000 {
1159 compatible = "renesas 1154 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1160 reg = <0 0xe6e34000 0 1155 reg = <0 0xe6e34000 0 8>;
1161 #pwm-cells = <2>; 1156 #pwm-cells = <2>;
1162 clocks = <&cpg CPG_MO 1157 clocks = <&cpg CPG_MOD 523>;
1163 resets = <&cpg 523>; 1158 resets = <&cpg 523>;
1164 power-domains = <&sys 1159 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1165 status = "disabled"; 1160 status = "disabled";
1166 }; 1161 };
1167 1162
1168 pwm5: pwm@e6e35000 { 1163 pwm5: pwm@e6e35000 {
1169 compatible = "renesas 1164 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1170 reg = <0 0xe6e35000 0 1165 reg = <0 0xe6e35000 0 8>;
1171 #pwm-cells = <2>; 1166 #pwm-cells = <2>;
1172 clocks = <&cpg CPG_MO 1167 clocks = <&cpg CPG_MOD 523>;
1173 resets = <&cpg 523>; 1168 resets = <&cpg 523>;
1174 power-domains = <&sys 1169 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1175 status = "disabled"; 1170 status = "disabled";
1176 }; 1171 };
1177 1172
1178 pwm6: pwm@e6e36000 { 1173 pwm6: pwm@e6e36000 {
1179 compatible = "renesas 1174 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1180 reg = <0 0xe6e36000 0 1175 reg = <0 0xe6e36000 0 8>;
1181 #pwm-cells = <2>; 1176 #pwm-cells = <2>;
1182 clocks = <&cpg CPG_MO 1177 clocks = <&cpg CPG_MOD 523>;
1183 resets = <&cpg 523>; 1178 resets = <&cpg 523>;
1184 power-domains = <&sys 1179 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1185 status = "disabled"; 1180 status = "disabled";
1186 }; 1181 };
1187 1182
1188 scif0: serial@e6e60000 { 1183 scif0: serial@e6e60000 {
1189 compatible = "renesas 1184 compatible = "renesas,scif-r8a77965",
1190 "renesas 1185 "renesas,rcar-gen3-scif", "renesas,scif";
1191 reg = <0 0xe6e60000 0 1186 reg = <0 0xe6e60000 0 64>;
1192 interrupts = <GIC_SPI 1187 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MO 1188 clocks = <&cpg CPG_MOD 207>,
1194 <&cpg CPG_CO 1189 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1195 <&scif_clk>; 1190 <&scif_clk>;
1196 clock-names = "fck", 1191 clock-names = "fck", "brg_int", "scif_clk";
1197 dmas = <&dmac1 0x51>, 1192 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1198 <&dmac2 0x51>, 1193 <&dmac2 0x51>, <&dmac2 0x50>;
1199 dma-names = "tx", "rx 1194 dma-names = "tx", "rx", "tx", "rx";
1200 power-domains = <&sys 1195 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1201 resets = <&cpg 207>; 1196 resets = <&cpg 207>;
1202 status = "disabled"; 1197 status = "disabled";
1203 }; 1198 };
1204 1199
1205 scif1: serial@e6e68000 { 1200 scif1: serial@e6e68000 {
1206 compatible = "renesas 1201 compatible = "renesas,scif-r8a77965",
1207 "renesas 1202 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6e68000 0 1203 reg = <0 0xe6e68000 0 64>;
1209 interrupts = <GIC_SPI 1204 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1205 clocks = <&cpg CPG_MOD 206>,
1211 <&cpg CPG_CO 1206 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1212 <&scif_clk>; 1207 <&scif_clk>;
1213 clock-names = "fck", 1208 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac1 0x53>, 1209 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1215 <&dmac2 0x53>, 1210 <&dmac2 0x53>, <&dmac2 0x52>;
1216 dma-names = "tx", "rx 1211 dma-names = "tx", "rx", "tx", "rx";
1217 power-domains = <&sys 1212 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1218 resets = <&cpg 206>; 1213 resets = <&cpg 206>;
1219 status = "disabled"; 1214 status = "disabled";
1220 }; 1215 };
1221 1216
1222 scif2: serial@e6e88000 { 1217 scif2: serial@e6e88000 {
1223 compatible = "renesas 1218 compatible = "renesas,scif-r8a77965",
1224 "renesas 1219 "renesas,rcar-gen3-scif", "renesas,scif";
1225 reg = <0 0xe6e88000 0 1220 reg = <0 0xe6e88000 0 64>;
1226 interrupts = <GIC_SPI 1221 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MO 1222 clocks = <&cpg CPG_MOD 310>,
1228 <&cpg CPG_CO 1223 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1229 <&scif_clk>; 1224 <&scif_clk>;
1230 clock-names = "fck", 1225 clock-names = "fck", "brg_int", "scif_clk";
1231 dmas = <&dmac1 0x13>, 1226 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1232 <&dmac2 0x13>, 1227 <&dmac2 0x13>, <&dmac2 0x12>;
1233 dma-names = "tx", "rx 1228 dma-names = "tx", "rx", "tx", "rx";
1234 power-domains = <&sys 1229 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1235 resets = <&cpg 310>; 1230 resets = <&cpg 310>;
1236 status = "disabled"; 1231 status = "disabled";
1237 }; 1232 };
1238 1233
1239 scif3: serial@e6c50000 { 1234 scif3: serial@e6c50000 {
1240 compatible = "renesas 1235 compatible = "renesas,scif-r8a77965",
1241 "renesas 1236 "renesas,rcar-gen3-scif", "renesas,scif";
1242 reg = <0 0xe6c50000 0 1237 reg = <0 0xe6c50000 0 64>;
1243 interrupts = <GIC_SPI 1238 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1244 clocks = <&cpg CPG_MO 1239 clocks = <&cpg CPG_MOD 204>,
1245 <&cpg CPG_CO 1240 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1246 <&scif_clk>; 1241 <&scif_clk>;
1247 clock-names = "fck", 1242 clock-names = "fck", "brg_int", "scif_clk";
1248 dmas = <&dmac0 0x57>, 1243 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1249 dma-names = "tx", "rx 1244 dma-names = "tx", "rx";
1250 power-domains = <&sys 1245 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1251 resets = <&cpg 204>; 1246 resets = <&cpg 204>;
1252 status = "disabled"; 1247 status = "disabled";
1253 }; 1248 };
1254 1249
1255 scif4: serial@e6c40000 { 1250 scif4: serial@e6c40000 {
1256 compatible = "renesas 1251 compatible = "renesas,scif-r8a77965",
1257 "renesas 1252 "renesas,rcar-gen3-scif", "renesas,scif";
1258 reg = <0 0xe6c40000 0 1253 reg = <0 0xe6c40000 0 64>;
1259 interrupts = <GIC_SPI 1254 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1260 clocks = <&cpg CPG_MO 1255 clocks = <&cpg CPG_MOD 203>,
1261 <&cpg CPG_CO 1256 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1262 <&scif_clk>; 1257 <&scif_clk>;
1263 clock-names = "fck", 1258 clock-names = "fck", "brg_int", "scif_clk";
1264 dmas = <&dmac0 0x59>, 1259 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1265 dma-names = "tx", "rx 1260 dma-names = "tx", "rx";
1266 power-domains = <&sys 1261 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1267 resets = <&cpg 203>; 1262 resets = <&cpg 203>;
1268 status = "disabled"; 1263 status = "disabled";
1269 }; 1264 };
1270 1265
1271 scif5: serial@e6f30000 { 1266 scif5: serial@e6f30000 {
1272 compatible = "renesas 1267 compatible = "renesas,scif-r8a77965",
1273 "renesas 1268 "renesas,rcar-gen3-scif", "renesas,scif";
1274 reg = <0 0xe6f30000 0 1269 reg = <0 0xe6f30000 0 64>;
1275 interrupts = <GIC_SPI 1270 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1276 clocks = <&cpg CPG_MO 1271 clocks = <&cpg CPG_MOD 202>,
1277 <&cpg CPG_CO 1272 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1278 <&scif_clk>; 1273 <&scif_clk>;
1279 clock-names = "fck", 1274 clock-names = "fck", "brg_int", "scif_clk";
1280 dmas = <&dmac1 0x5b>, 1275 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1281 <&dmac2 0x5b>, 1276 <&dmac2 0x5b>, <&dmac2 0x5a>;
1282 dma-names = "tx", "rx 1277 dma-names = "tx", "rx", "tx", "rx";
1283 power-domains = <&sys 1278 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1284 resets = <&cpg 202>; 1279 resets = <&cpg 202>;
1285 status = "disabled"; 1280 status = "disabled";
1286 }; 1281 };
1287 1282
1288 tpu: pwm@e6e80000 { 1283 tpu: pwm@e6e80000 {
1289 compatible = "renesas 1284 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1290 reg = <0 0xe6e80000 0 1285 reg = <0 0xe6e80000 0 0x148>;
1291 interrupts = <GIC_SPI 1286 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1292 clocks = <&cpg CPG_MO 1287 clocks = <&cpg CPG_MOD 304>;
1293 power-domains = <&sys 1288 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1294 resets = <&cpg 304>; 1289 resets = <&cpg 304>;
1295 #pwm-cells = <3>; 1290 #pwm-cells = <3>;
1296 status = "disabled"; 1291 status = "disabled";
1297 }; 1292 };
1298 1293
1299 msiof0: spi@e6e90000 { 1294 msiof0: spi@e6e90000 {
1300 compatible = "renesas 1295 compatible = "renesas,msiof-r8a77965",
1301 "renesas 1296 "renesas,rcar-gen3-msiof";
1302 reg = <0 0xe6e90000 0 1297 reg = <0 0xe6e90000 0 0x0064>;
1303 interrupts = <GIC_SPI 1298 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1304 clocks = <&cpg CPG_MO 1299 clocks = <&cpg CPG_MOD 211>;
1305 dmas = <&dmac1 0x41>, 1300 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1306 <&dmac2 0x41>, 1301 <&dmac2 0x41>, <&dmac2 0x40>;
1307 dma-names = "tx", "rx 1302 dma-names = "tx", "rx", "tx", "rx";
1308 power-domains = <&sys 1303 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1309 resets = <&cpg 211>; 1304 resets = <&cpg 211>;
1310 #address-cells = <1>; 1305 #address-cells = <1>;
1311 #size-cells = <0>; 1306 #size-cells = <0>;
1312 status = "disabled"; 1307 status = "disabled";
1313 }; 1308 };
1314 1309
1315 msiof1: spi@e6ea0000 { 1310 msiof1: spi@e6ea0000 {
1316 compatible = "renesas 1311 compatible = "renesas,msiof-r8a77965",
1317 "renesas 1312 "renesas,rcar-gen3-msiof";
1318 reg = <0 0xe6ea0000 0 1313 reg = <0 0xe6ea0000 0 0x0064>;
1319 interrupts = <GIC_SPI 1314 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MO 1315 clocks = <&cpg CPG_MOD 210>;
1321 dmas = <&dmac1 0x43>, 1316 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1322 <&dmac2 0x43>, 1317 <&dmac2 0x43>, <&dmac2 0x42>;
1323 dma-names = "tx", "rx 1318 dma-names = "tx", "rx", "tx", "rx";
1324 power-domains = <&sys 1319 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1325 resets = <&cpg 210>; 1320 resets = <&cpg 210>;
1326 #address-cells = <1>; 1321 #address-cells = <1>;
1327 #size-cells = <0>; 1322 #size-cells = <0>;
1328 status = "disabled"; 1323 status = "disabled";
1329 }; 1324 };
1330 1325
1331 msiof2: spi@e6c00000 { 1326 msiof2: spi@e6c00000 {
1332 compatible = "renesas 1327 compatible = "renesas,msiof-r8a77965",
1333 "renesas 1328 "renesas,rcar-gen3-msiof";
1334 reg = <0 0xe6c00000 0 1329 reg = <0 0xe6c00000 0 0x0064>;
1335 interrupts = <GIC_SPI 1330 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MO 1331 clocks = <&cpg CPG_MOD 209>;
1337 dmas = <&dmac0 0x45>, 1332 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1338 dma-names = "tx", "rx 1333 dma-names = "tx", "rx";
1339 power-domains = <&sys 1334 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1340 resets = <&cpg 209>; 1335 resets = <&cpg 209>;
1341 #address-cells = <1>; 1336 #address-cells = <1>;
1342 #size-cells = <0>; 1337 #size-cells = <0>;
1343 status = "disabled"; 1338 status = "disabled";
1344 }; 1339 };
1345 1340
1346 msiof3: spi@e6c10000 { 1341 msiof3: spi@e6c10000 {
1347 compatible = "renesas 1342 compatible = "renesas,msiof-r8a77965",
1348 "renesas 1343 "renesas,rcar-gen3-msiof";
1349 reg = <0 0xe6c10000 0 1344 reg = <0 0xe6c10000 0 0x0064>;
1350 interrupts = <GIC_SPI 1345 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1351 clocks = <&cpg CPG_MO 1346 clocks = <&cpg CPG_MOD 208>;
1352 dmas = <&dmac0 0x47>, 1347 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1353 dma-names = "tx", "rx 1348 dma-names = "tx", "rx";
1354 power-domains = <&sys 1349 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1355 resets = <&cpg 208>; 1350 resets = <&cpg 208>;
1356 #address-cells = <1>; 1351 #address-cells = <1>;
1357 #size-cells = <0>; 1352 #size-cells = <0>;
1358 status = "disabled"; 1353 status = "disabled";
1359 }; 1354 };
1360 1355
1361 vin0: video@e6ef0000 { 1356 vin0: video@e6ef0000 {
1362 compatible = "renesas 1357 compatible = "renesas,vin-r8a77965";
1363 reg = <0 0xe6ef0000 0 1358 reg = <0 0xe6ef0000 0 0x1000>;
1364 interrupts = <GIC_SPI 1359 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MO 1360 clocks = <&cpg CPG_MOD 811>;
1366 power-domains = <&sys 1361 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1367 resets = <&cpg 811>; 1362 resets = <&cpg 811>;
1368 renesas,id = <0>; 1363 renesas,id = <0>;
1369 status = "disabled"; 1364 status = "disabled";
1370 1365
1371 ports { 1366 ports {
1372 #address-cell 1367 #address-cells = <1>;
1373 #size-cells = 1368 #size-cells = <0>;
1374 1369
1375 port@1 { 1370 port@1 {
1376 #addr 1371 #address-cells = <1>;
1377 #size 1372 #size-cells = <0>;
1378 1373
1379 reg = 1374 reg = <1>;
1380 1375
1381 vin0c 1376 vin0csi20: endpoint@0 {
1382 1377 reg = <0>;
1383 1378 remote-endpoint = <&csi20vin0>;
1384 }; 1379 };
1385 vin0c 1380 vin0csi40: endpoint@2 {
1386 1381 reg = <2>;
1387 1382 remote-endpoint = <&csi40vin0>;
1388 }; 1383 };
1389 }; 1384 };
1390 }; 1385 };
1391 }; 1386 };
1392 1387
1393 vin1: video@e6ef1000 { 1388 vin1: video@e6ef1000 {
1394 compatible = "renesas 1389 compatible = "renesas,vin-r8a77965";
1395 reg = <0 0xe6ef1000 0 1390 reg = <0 0xe6ef1000 0 0x1000>;
1396 interrupts = <GIC_SPI 1391 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MO 1392 clocks = <&cpg CPG_MOD 810>;
1398 power-domains = <&sys 1393 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1399 resets = <&cpg 810>; 1394 resets = <&cpg 810>;
1400 renesas,id = <1>; 1395 renesas,id = <1>;
1401 status = "disabled"; 1396 status = "disabled";
1402 1397
1403 ports { 1398 ports {
1404 #address-cell 1399 #address-cells = <1>;
1405 #size-cells = 1400 #size-cells = <0>;
1406 1401
1407 port@1 { 1402 port@1 {
1408 #addr 1403 #address-cells = <1>;
1409 #size 1404 #size-cells = <0>;
1410 1405
1411 reg = 1406 reg = <1>;
1412 1407
1413 vin1c 1408 vin1csi20: endpoint@0 {
1414 1409 reg = <0>;
1415 1410 remote-endpoint = <&csi20vin1>;
1416 }; 1411 };
1417 vin1c 1412 vin1csi40: endpoint@2 {
1418 1413 reg = <2>;
1419 1414 remote-endpoint = <&csi40vin1>;
1420 }; 1415 };
1421 }; 1416 };
1422 }; 1417 };
1423 }; 1418 };
1424 1419
1425 vin2: video@e6ef2000 { 1420 vin2: video@e6ef2000 {
1426 compatible = "renesas 1421 compatible = "renesas,vin-r8a77965";
1427 reg = <0 0xe6ef2000 0 1422 reg = <0 0xe6ef2000 0 0x1000>;
1428 interrupts = <GIC_SPI 1423 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MO 1424 clocks = <&cpg CPG_MOD 809>;
1430 power-domains = <&sys 1425 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1431 resets = <&cpg 809>; 1426 resets = <&cpg 809>;
1432 renesas,id = <2>; 1427 renesas,id = <2>;
1433 status = "disabled"; 1428 status = "disabled";
1434 1429
1435 ports { 1430 ports {
1436 #address-cell 1431 #address-cells = <1>;
1437 #size-cells = 1432 #size-cells = <0>;
1438 1433
1439 port@1 { 1434 port@1 {
1440 #addr 1435 #address-cells = <1>;
1441 #size 1436 #size-cells = <0>;
1442 1437
1443 reg = 1438 reg = <1>;
1444 1439
1445 vin2c 1440 vin2csi20: endpoint@0 {
1446 1441 reg = <0>;
1447 1442 remote-endpoint = <&csi20vin2>;
1448 }; 1443 };
1449 vin2c 1444 vin2csi40: endpoint@2 {
1450 1445 reg = <2>;
1451 1446 remote-endpoint = <&csi40vin2>;
1452 }; 1447 };
1453 }; 1448 };
1454 }; 1449 };
1455 }; 1450 };
1456 1451
1457 vin3: video@e6ef3000 { 1452 vin3: video@e6ef3000 {
1458 compatible = "renesas 1453 compatible = "renesas,vin-r8a77965";
1459 reg = <0 0xe6ef3000 0 1454 reg = <0 0xe6ef3000 0 0x1000>;
1460 interrupts = <GIC_SPI 1455 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MO 1456 clocks = <&cpg CPG_MOD 808>;
1462 power-domains = <&sys 1457 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1463 resets = <&cpg 808>; 1458 resets = <&cpg 808>;
1464 renesas,id = <3>; 1459 renesas,id = <3>;
1465 status = "disabled"; 1460 status = "disabled";
1466 1461
1467 ports { 1462 ports {
1468 #address-cell 1463 #address-cells = <1>;
1469 #size-cells = 1464 #size-cells = <0>;
1470 1465
1471 port@1 { 1466 port@1 {
1472 #addr 1467 #address-cells = <1>;
1473 #size 1468 #size-cells = <0>;
1474 1469
1475 reg = 1470 reg = <1>;
1476 1471
1477 vin3c 1472 vin3csi20: endpoint@0 {
1478 1473 reg = <0>;
1479 1474 remote-endpoint = <&csi20vin3>;
1480 }; 1475 };
1481 vin3c 1476 vin3csi40: endpoint@2 {
1482 1477 reg = <2>;
1483 1478 remote-endpoint = <&csi40vin3>;
1484 }; 1479 };
1485 }; 1480 };
1486 }; 1481 };
1487 }; 1482 };
1488 1483
1489 vin4: video@e6ef4000 { 1484 vin4: video@e6ef4000 {
1490 compatible = "renesas 1485 compatible = "renesas,vin-r8a77965";
1491 reg = <0 0xe6ef4000 0 1486 reg = <0 0xe6ef4000 0 0x1000>;
1492 interrupts = <GIC_SPI 1487 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MO 1488 clocks = <&cpg CPG_MOD 807>;
1494 power-domains = <&sys 1489 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1495 resets = <&cpg 807>; 1490 resets = <&cpg 807>;
1496 renesas,id = <4>; 1491 renesas,id = <4>;
1497 status = "disabled"; 1492 status = "disabled";
1498 1493
1499 ports { 1494 ports {
1500 #address-cell 1495 #address-cells = <1>;
1501 #size-cells = 1496 #size-cells = <0>;
1502 1497
1503 port@1 { 1498 port@1 {
1504 #addr 1499 #address-cells = <1>;
1505 #size 1500 #size-cells = <0>;
1506 1501
1507 reg = 1502 reg = <1>;
1508 1503
1509 vin4c 1504 vin4csi20: endpoint@0 {
1510 1505 reg = <0>;
1511 1506 remote-endpoint = <&csi20vin4>;
1512 }; 1507 };
1513 vin4c 1508 vin4csi40: endpoint@2 {
1514 1509 reg = <2>;
1515 1510 remote-endpoint = <&csi40vin4>;
1516 }; 1511 };
1517 }; 1512 };
1518 }; 1513 };
1519 }; 1514 };
1520 1515
1521 vin5: video@e6ef5000 { 1516 vin5: video@e6ef5000 {
1522 compatible = "renesas 1517 compatible = "renesas,vin-r8a77965";
1523 reg = <0 0xe6ef5000 0 1518 reg = <0 0xe6ef5000 0 0x1000>;
1524 interrupts = <GIC_SPI 1519 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MO 1520 clocks = <&cpg CPG_MOD 806>;
1526 power-domains = <&sys 1521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1527 resets = <&cpg 806>; 1522 resets = <&cpg 806>;
1528 renesas,id = <5>; 1523 renesas,id = <5>;
1529 status = "disabled"; 1524 status = "disabled";
1530 1525
1531 ports { 1526 ports {
1532 #address-cell 1527 #address-cells = <1>;
1533 #size-cells = 1528 #size-cells = <0>;
1534 1529
1535 port@1 { 1530 port@1 {
1536 #addr 1531 #address-cells = <1>;
1537 #size 1532 #size-cells = <0>;
1538 1533
1539 reg = 1534 reg = <1>;
1540 1535
1541 vin5c 1536 vin5csi20: endpoint@0 {
1542 1537 reg = <0>;
1543 1538 remote-endpoint = <&csi20vin5>;
1544 }; 1539 };
1545 vin5c 1540 vin5csi40: endpoint@2 {
1546 1541 reg = <2>;
1547 1542 remote-endpoint = <&csi40vin5>;
1548 }; 1543 };
1549 }; 1544 };
1550 }; 1545 };
1551 }; 1546 };
1552 1547
1553 vin6: video@e6ef6000 { 1548 vin6: video@e6ef6000 {
1554 compatible = "renesas 1549 compatible = "renesas,vin-r8a77965";
1555 reg = <0 0xe6ef6000 0 1550 reg = <0 0xe6ef6000 0 0x1000>;
1556 interrupts = <GIC_SPI 1551 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1557 clocks = <&cpg CPG_MO 1552 clocks = <&cpg CPG_MOD 805>;
1558 power-domains = <&sys 1553 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1559 resets = <&cpg 805>; 1554 resets = <&cpg 805>;
1560 renesas,id = <6>; 1555 renesas,id = <6>;
1561 status = "disabled"; 1556 status = "disabled";
1562 1557
1563 ports { 1558 ports {
1564 #address-cell 1559 #address-cells = <1>;
1565 #size-cells = 1560 #size-cells = <0>;
1566 1561
1567 port@1 { 1562 port@1 {
1568 #addr 1563 #address-cells = <1>;
1569 #size 1564 #size-cells = <0>;
1570 1565
1571 reg = 1566 reg = <1>;
1572 1567
1573 vin6c 1568 vin6csi20: endpoint@0 {
1574 1569 reg = <0>;
1575 1570 remote-endpoint = <&csi20vin6>;
1576 }; 1571 };
1577 vin6c 1572 vin6csi40: endpoint@2 {
1578 1573 reg = <2>;
1579 1574 remote-endpoint = <&csi40vin6>;
1580 }; 1575 };
1581 }; 1576 };
1582 }; 1577 };
1583 }; 1578 };
1584 1579
1585 vin7: video@e6ef7000 { 1580 vin7: video@e6ef7000 {
1586 compatible = "renesas 1581 compatible = "renesas,vin-r8a77965";
1587 reg = <0 0xe6ef7000 0 1582 reg = <0 0xe6ef7000 0 0x1000>;
1588 interrupts = <GIC_SPI 1583 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1589 clocks = <&cpg CPG_MO 1584 clocks = <&cpg CPG_MOD 804>;
1590 power-domains = <&sys 1585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1591 resets = <&cpg 804>; 1586 resets = <&cpg 804>;
1592 renesas,id = <7>; 1587 renesas,id = <7>;
1593 status = "disabled"; 1588 status = "disabled";
1594 1589
1595 ports { 1590 ports {
1596 #address-cell 1591 #address-cells = <1>;
1597 #size-cells = 1592 #size-cells = <0>;
1598 1593
1599 port@1 { 1594 port@1 {
1600 #addr 1595 #address-cells = <1>;
1601 #size 1596 #size-cells = <0>;
1602 1597
1603 reg = 1598 reg = <1>;
1604 1599
1605 vin7c 1600 vin7csi20: endpoint@0 {
1606 1601 reg = <0>;
1607 1602 remote-endpoint = <&csi20vin7>;
1608 }; 1603 };
1609 vin7c 1604 vin7csi40: endpoint@2 {
1610 1605 reg = <2>;
1611 1606 remote-endpoint = <&csi40vin7>;
1612 }; 1607 };
1613 }; 1608 };
1614 }; 1609 };
1615 }; 1610 };
1616 1611
1617 drif00: rif@e6f40000 { 1612 drif00: rif@e6f40000 {
1618 compatible = "renesas 1613 compatible = "renesas,r8a77965-drif",
1619 "renesas 1614 "renesas,rcar-gen3-drif";
1620 reg = <0 0xe6f40000 0 1615 reg = <0 0xe6f40000 0 0x84>;
1621 interrupts = <GIC_SPI 1616 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1622 clocks = <&cpg CPG_MO 1617 clocks = <&cpg CPG_MOD 515>;
1623 clock-names = "fck"; 1618 clock-names = "fck";
1624 dmas = <&dmac1 0x20>, 1619 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1625 dma-names = "rx", "rx 1620 dma-names = "rx", "rx";
1626 power-domains = <&sys 1621 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1627 resets = <&cpg 515>; 1622 resets = <&cpg 515>;
1628 renesas,bonding = <&d 1623 renesas,bonding = <&drif01>;
1629 status = "disabled"; 1624 status = "disabled";
1630 }; 1625 };
1631 1626
1632 drif01: rif@e6f50000 { 1627 drif01: rif@e6f50000 {
1633 compatible = "renesas 1628 compatible = "renesas,r8a77965-drif",
1634 "renesas 1629 "renesas,rcar-gen3-drif";
1635 reg = <0 0xe6f50000 0 1630 reg = <0 0xe6f50000 0 0x84>;
1636 interrupts = <GIC_SPI 1631 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1637 clocks = <&cpg CPG_MO 1632 clocks = <&cpg CPG_MOD 514>;
1638 clock-names = "fck"; 1633 clock-names = "fck";
1639 dmas = <&dmac1 0x22>, 1634 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1640 dma-names = "rx", "rx 1635 dma-names = "rx", "rx";
1641 power-domains = <&sys 1636 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1642 resets = <&cpg 514>; 1637 resets = <&cpg 514>;
1643 renesas,bonding = <&d 1638 renesas,bonding = <&drif00>;
1644 status = "disabled"; 1639 status = "disabled";
1645 }; 1640 };
1646 1641
1647 drif10: rif@e6f60000 { 1642 drif10: rif@e6f60000 {
1648 compatible = "renesas 1643 compatible = "renesas,r8a77965-drif",
1649 "renesas 1644 "renesas,rcar-gen3-drif";
1650 reg = <0 0xe6f60000 0 1645 reg = <0 0xe6f60000 0 0x84>;
1651 interrupts = <GIC_SPI 1646 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1652 clocks = <&cpg CPG_MO 1647 clocks = <&cpg CPG_MOD 513>;
1653 clock-names = "fck"; 1648 clock-names = "fck";
1654 dmas = <&dmac1 0x24>, 1649 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1655 dma-names = "rx", "rx 1650 dma-names = "rx", "rx";
1656 power-domains = <&sys 1651 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1657 resets = <&cpg 513>; 1652 resets = <&cpg 513>;
1658 renesas,bonding = <&d 1653 renesas,bonding = <&drif11>;
1659 status = "disabled"; 1654 status = "disabled";
1660 }; 1655 };
1661 1656
1662 drif11: rif@e6f70000 { 1657 drif11: rif@e6f70000 {
1663 compatible = "renesas 1658 compatible = "renesas,r8a77965-drif",
1664 "renesas 1659 "renesas,rcar-gen3-drif";
1665 reg = <0 0xe6f70000 0 1660 reg = <0 0xe6f70000 0 0x84>;
1666 interrupts = <GIC_SPI 1661 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1667 clocks = <&cpg CPG_MO 1662 clocks = <&cpg CPG_MOD 512>;
1668 clock-names = "fck"; 1663 clock-names = "fck";
1669 dmas = <&dmac1 0x26>, 1664 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1670 dma-names = "rx", "rx 1665 dma-names = "rx", "rx";
1671 power-domains = <&sys 1666 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1672 resets = <&cpg 512>; 1667 resets = <&cpg 512>;
1673 renesas,bonding = <&d 1668 renesas,bonding = <&drif10>;
1674 status = "disabled"; 1669 status = "disabled";
1675 }; 1670 };
1676 1671
1677 drif20: rif@e6f80000 { 1672 drif20: rif@e6f80000 {
1678 compatible = "renesas 1673 compatible = "renesas,r8a77965-drif",
1679 "renesas 1674 "renesas,rcar-gen3-drif";
1680 reg = <0 0xe6f80000 0 1675 reg = <0 0xe6f80000 0 0x84>;
1681 interrupts = <GIC_SPI 1676 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1682 clocks = <&cpg CPG_MO 1677 clocks = <&cpg CPG_MOD 511>;
1683 clock-names = "fck"; 1678 clock-names = "fck";
1684 dmas = <&dmac1 0x28>, 1679 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1685 dma-names = "rx", "rx 1680 dma-names = "rx", "rx";
1686 power-domains = <&sys 1681 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1687 resets = <&cpg 511>; 1682 resets = <&cpg 511>;
1688 renesas,bonding = <&d 1683 renesas,bonding = <&drif21>;
1689 status = "disabled"; 1684 status = "disabled";
1690 }; 1685 };
1691 1686
1692 drif21: rif@e6f90000 { 1687 drif21: rif@e6f90000 {
1693 compatible = "renesas 1688 compatible = "renesas,r8a77965-drif",
1694 "renesas 1689 "renesas,rcar-gen3-drif";
1695 reg = <0 0xe6f90000 0 1690 reg = <0 0xe6f90000 0 0x84>;
1696 interrupts = <GIC_SPI 1691 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1697 clocks = <&cpg CPG_MO 1692 clocks = <&cpg CPG_MOD 510>;
1698 clock-names = "fck"; 1693 clock-names = "fck";
1699 dmas = <&dmac1 0x2a>, 1694 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1700 dma-names = "rx", "rx 1695 dma-names = "rx", "rx";
1701 power-domains = <&sys 1696 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1702 resets = <&cpg 510>; 1697 resets = <&cpg 510>;
1703 renesas,bonding = <&d 1698 renesas,bonding = <&drif20>;
1704 status = "disabled"; 1699 status = "disabled";
1705 }; 1700 };
1706 1701
1707 drif30: rif@e6fa0000 { 1702 drif30: rif@e6fa0000 {
1708 compatible = "renesas 1703 compatible = "renesas,r8a77965-drif",
1709 "renesas 1704 "renesas,rcar-gen3-drif";
1710 reg = <0 0xe6fa0000 0 1705 reg = <0 0xe6fa0000 0 0x84>;
1711 interrupts = <GIC_SPI 1706 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1712 clocks = <&cpg CPG_MO 1707 clocks = <&cpg CPG_MOD 509>;
1713 clock-names = "fck"; 1708 clock-names = "fck";
1714 dmas = <&dmac1 0x2c>, 1709 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1715 dma-names = "rx", "rx 1710 dma-names = "rx", "rx";
1716 power-domains = <&sys 1711 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1717 resets = <&cpg 509>; 1712 resets = <&cpg 509>;
1718 renesas,bonding = <&d 1713 renesas,bonding = <&drif31>;
1719 status = "disabled"; 1714 status = "disabled";
1720 }; 1715 };
1721 1716
1722 drif31: rif@e6fb0000 { 1717 drif31: rif@e6fb0000 {
1723 compatible = "renesas 1718 compatible = "renesas,r8a77965-drif",
1724 "renesas 1719 "renesas,rcar-gen3-drif";
1725 reg = <0 0xe6fb0000 0 1720 reg = <0 0xe6fb0000 0 0x84>;
1726 interrupts = <GIC_SPI 1721 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1727 clocks = <&cpg CPG_MO 1722 clocks = <&cpg CPG_MOD 508>;
1728 clock-names = "fck"; 1723 clock-names = "fck";
1729 dmas = <&dmac1 0x2e>, 1724 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1730 dma-names = "rx", "rx 1725 dma-names = "rx", "rx";
1731 power-domains = <&sys 1726 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1732 resets = <&cpg 508>; 1727 resets = <&cpg 508>;
1733 renesas,bonding = <&d 1728 renesas,bonding = <&drif30>;
1734 status = "disabled"; 1729 status = "disabled";
1735 }; 1730 };
1736 1731
1737 rcar_sound: sound@ec500000 { 1732 rcar_sound: sound@ec500000 {
1738 /* 1733 /*
1739 * #sound-dai-cells i 1734 * #sound-dai-cells is required if simple-card
1740 * 1735 *
1741 * Single DAI : #soun 1736 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1742 * Multi DAI : #soun 1737 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1743 */ 1738 */
1744 /* 1739 /*
1745 * #clock-cells is re 1740 * #clock-cells is required for audio_clkout0/1/2/3
1746 * 1741 *
1747 * clkout : #cl 1742 * clkout : #clock-cells = <0>; <&rcar_sound>;
1748 * clkout0/1/2/3: #cl 1743 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1749 */ 1744 */
1750 compatible = "renesas 1745 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1751 reg = <0 0xec500000 0 1746 reg = <0 0xec500000 0 0x1000>, /* SCU */
1752 <0 0xec5a0000 0 1747 <0 0xec5a0000 0 0x100>, /* ADG */
1753 <0 0xec540000 0 1748 <0 0xec540000 0 0x1000>, /* SSIU */
1754 <0 0xec541000 0 1749 <0 0xec541000 0 0x280>, /* SSI */
1755 <0 0xec760000 0 1750 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1756 reg-names = "scu", "a 1751 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1757 1752
1758 clocks = <&cpg CPG_MO 1753 clocks = <&cpg CPG_MOD 1005>,
1759 <&cpg CPG_MO 1754 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1760 <&cpg CPG_MO 1755 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1761 <&cpg CPG_MO 1756 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1762 <&cpg CPG_MO 1757 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1763 <&cpg CPG_MO 1758 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1764 <&cpg CPG_MO 1759 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1765 <&cpg CPG_MO 1760 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1766 <&cpg CPG_MO 1761 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1767 <&cpg CPG_MO 1762 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1768 <&cpg CPG_MO 1763 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1769 <&cpg CPG_MO 1764 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1770 <&cpg CPG_MO 1765 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1771 <&cpg CPG_MO 1766 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1772 <&audio_clk_ 1767 <&audio_clk_a>, <&audio_clk_b>,
1773 <&audio_clk_ 1768 <&audio_clk_c>,
1774 <&cpg CPG_MO !! 1769 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1775 clock-names = "ssi-al 1770 clock-names = "ssi-all",
1776 "ssi.9" 1771 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1777 "ssi.5" 1772 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1778 "ssi.1" 1773 "ssi.1", "ssi.0",
1779 "src.9" 1774 "src.9", "src.8", "src.7", "src.6",
1780 "src.5" 1775 "src.5", "src.4", "src.3", "src.2",
1781 "src.1" 1776 "src.1", "src.0",
1782 "mix.1" 1777 "mix.1", "mix.0",
1783 "ctu.1" 1778 "ctu.1", "ctu.0",
1784 "dvc.0" 1779 "dvc.0", "dvc.1",
1785 "clk_a" 1780 "clk_a", "clk_b", "clk_c", "clk_i";
1786 power-domains = <&sys 1781 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1787 resets = <&cpg 1005>, 1782 resets = <&cpg 1005>,
1788 <&cpg 1006>, 1783 <&cpg 1006>, <&cpg 1007>,
1789 <&cpg 1008>, 1784 <&cpg 1008>, <&cpg 1009>,
1790 <&cpg 1010>, 1785 <&cpg 1010>, <&cpg 1011>,
1791 <&cpg 1012>, 1786 <&cpg 1012>, <&cpg 1013>,
1792 <&cpg 1014>, 1787 <&cpg 1014>, <&cpg 1015>;
1793 reset-names = "ssi-al 1788 reset-names = "ssi-all",
1794 "ssi.9" 1789 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1795 "ssi.5" 1790 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1796 "ssi.1" 1791 "ssi.1", "ssi.0";
1797 status = "disabled"; 1792 status = "disabled";
1798 1793
1799 rcar_sound,dvc { 1794 rcar_sound,dvc {
1800 dvc0: dvc-0 { 1795 dvc0: dvc-0 {
1801 dmas 1796 dmas = <&audma1 0xbc>;
1802 dma-n 1797 dma-names = "tx";
1803 }; 1798 };
1804 dvc1: dvc-1 { 1799 dvc1: dvc-1 {
1805 dmas 1800 dmas = <&audma1 0xbe>;
1806 dma-n 1801 dma-names = "tx";
1807 }; 1802 };
1808 }; 1803 };
1809 1804
1810 rcar_sound,mix { 1805 rcar_sound,mix {
1811 mix0: mix-0 { 1806 mix0: mix-0 { };
1812 mix1: mix-1 { 1807 mix1: mix-1 { };
1813 }; 1808 };
1814 1809
1815 rcar_sound,ctu { 1810 rcar_sound,ctu {
1816 ctu00: ctu-0 1811 ctu00: ctu-0 { };
1817 ctu01: ctu-1 1812 ctu01: ctu-1 { };
1818 ctu02: ctu-2 1813 ctu02: ctu-2 { };
1819 ctu03: ctu-3 1814 ctu03: ctu-3 { };
1820 ctu10: ctu-4 1815 ctu10: ctu-4 { };
1821 ctu11: ctu-5 1816 ctu11: ctu-5 { };
1822 ctu12: ctu-6 1817 ctu12: ctu-6 { };
1823 ctu13: ctu-7 1818 ctu13: ctu-7 { };
1824 }; 1819 };
1825 1820
1826 rcar_sound,src { 1821 rcar_sound,src {
1827 src0: src-0 { 1822 src0: src-0 {
1828 inter 1823 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas 1824 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1830 dma-n 1825 dma-names = "rx", "tx";
1831 }; 1826 };
1832 src1: src-1 { 1827 src1: src-1 {
1833 inter 1828 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas 1829 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1835 dma-n 1830 dma-names = "rx", "tx";
1836 }; 1831 };
1837 src2: src-2 { 1832 src2: src-2 {
1838 inter 1833 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas 1834 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1840 dma-n 1835 dma-names = "rx", "tx";
1841 }; 1836 };
1842 src3: src-3 { 1837 src3: src-3 {
1843 inter 1838 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas 1839 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1845 dma-n 1840 dma-names = "rx", "tx";
1846 }; 1841 };
1847 src4: src-4 { 1842 src4: src-4 {
1848 inter 1843 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas 1844 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1850 dma-n 1845 dma-names = "rx", "tx";
1851 }; 1846 };
1852 src5: src-5 { 1847 src5: src-5 {
1853 inter 1848 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas 1849 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1855 dma-n 1850 dma-names = "rx", "tx";
1856 }; 1851 };
1857 src6: src-6 { 1852 src6: src-6 {
1858 inter 1853 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas 1854 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1860 dma-n 1855 dma-names = "rx", "tx";
1861 }; 1856 };
1862 src7: src-7 { 1857 src7: src-7 {
1863 inter 1858 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1864 dmas 1859 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1865 dma-n 1860 dma-names = "rx", "tx";
1866 }; 1861 };
1867 src8: src-8 { 1862 src8: src-8 {
1868 inter 1863 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1869 dmas 1864 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1870 dma-n 1865 dma-names = "rx", "tx";
1871 }; 1866 };
1872 src9: src-9 { 1867 src9: src-9 {
1873 inter 1868 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1874 dmas 1869 dmas = <&audma0 0x97>, <&audma1 0xba>;
1875 dma-n 1870 dma-names = "rx", "tx";
1876 }; 1871 };
1877 }; 1872 };
1878 1873
1879 rcar_sound,ssiu { 1874 rcar_sound,ssiu {
1880 ssiu00: ssiu- 1875 ssiu00: ssiu-0 {
1881 dmas 1876 dmas = <&audma0 0x15>, <&audma1 0x16>;
1882 dma-n 1877 dma-names = "rx", "tx";
1883 }; 1878 };
1884 ssiu01: ssiu- 1879 ssiu01: ssiu-1 {
1885 dmas 1880 dmas = <&audma0 0x35>, <&audma1 0x36>;
1886 dma-n 1881 dma-names = "rx", "tx";
1887 }; 1882 };
1888 ssiu02: ssiu- 1883 ssiu02: ssiu-2 {
1889 dmas 1884 dmas = <&audma0 0x37>, <&audma1 0x38>;
1890 dma-n 1885 dma-names = "rx", "tx";
1891 }; 1886 };
1892 ssiu03: ssiu- 1887 ssiu03: ssiu-3 {
1893 dmas 1888 dmas = <&audma0 0x47>, <&audma1 0x48>;
1894 dma-n 1889 dma-names = "rx", "tx";
1895 }; 1890 };
1896 ssiu04: ssiu- 1891 ssiu04: ssiu-4 {
1897 dmas 1892 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1898 dma-n 1893 dma-names = "rx", "tx";
1899 }; 1894 };
1900 ssiu05: ssiu- 1895 ssiu05: ssiu-5 {
1901 dmas 1896 dmas = <&audma0 0x43>, <&audma1 0x44>;
1902 dma-n 1897 dma-names = "rx", "tx";
1903 }; 1898 };
1904 ssiu06: ssiu- 1899 ssiu06: ssiu-6 {
1905 dmas 1900 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1906 dma-n 1901 dma-names = "rx", "tx";
1907 }; 1902 };
1908 ssiu07: ssiu- 1903 ssiu07: ssiu-7 {
1909 dmas 1904 dmas = <&audma0 0x53>, <&audma1 0x54>;
1910 dma-n 1905 dma-names = "rx", "tx";
1911 }; 1906 };
1912 ssiu10: ssiu- 1907 ssiu10: ssiu-8 {
1913 dmas 1908 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1914 dma-n 1909 dma-names = "rx", "tx";
1915 }; 1910 };
1916 ssiu11: ssiu- 1911 ssiu11: ssiu-9 {
1917 dmas 1912 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1918 dma-n 1913 dma-names = "rx", "tx";
1919 }; 1914 };
1920 ssiu12: ssiu- 1915 ssiu12: ssiu-10 {
1921 dmas 1916 dmas = <&audma0 0x57>, <&audma1 0x58>;
1922 dma-n 1917 dma-names = "rx", "tx";
1923 }; 1918 };
1924 ssiu13: ssiu- 1919 ssiu13: ssiu-11 {
1925 dmas 1920 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1926 dma-n 1921 dma-names = "rx", "tx";
1927 }; 1922 };
1928 ssiu14: ssiu- 1923 ssiu14: ssiu-12 {
1929 dmas 1924 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1930 dma-n 1925 dma-names = "rx", "tx";
1931 }; 1926 };
1932 ssiu15: ssiu- 1927 ssiu15: ssiu-13 {
1933 dmas 1928 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1934 dma-n 1929 dma-names = "rx", "tx";
1935 }; 1930 };
1936 ssiu16: ssiu- 1931 ssiu16: ssiu-14 {
1937 dmas 1932 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1938 dma-n 1933 dma-names = "rx", "tx";
1939 }; 1934 };
1940 ssiu17: ssiu- 1935 ssiu17: ssiu-15 {
1941 dmas 1936 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1942 dma-n 1937 dma-names = "rx", "tx";
1943 }; 1938 };
1944 ssiu20: ssiu- 1939 ssiu20: ssiu-16 {
1945 dmas 1940 dmas = <&audma0 0x63>, <&audma1 0x64>;
1946 dma-n 1941 dma-names = "rx", "tx";
1947 }; 1942 };
1948 ssiu21: ssiu- 1943 ssiu21: ssiu-17 {
1949 dmas 1944 dmas = <&audma0 0x67>, <&audma1 0x68>;
1950 dma-n 1945 dma-names = "rx", "tx";
1951 }; 1946 };
1952 ssiu22: ssiu- 1947 ssiu22: ssiu-18 {
1953 dmas 1948 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1954 dma-n 1949 dma-names = "rx", "tx";
1955 }; 1950 };
1956 ssiu23: ssiu- 1951 ssiu23: ssiu-19 {
1957 dmas 1952 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1958 dma-n 1953 dma-names = "rx", "tx";
1959 }; 1954 };
1960 ssiu24: ssiu- 1955 ssiu24: ssiu-20 {
1961 dmas 1956 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1962 dma-n 1957 dma-names = "rx", "tx";
1963 }; 1958 };
1964 ssiu25: ssiu- 1959 ssiu25: ssiu-21 {
1965 dmas 1960 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1966 dma-n 1961 dma-names = "rx", "tx";
1967 }; 1962 };
1968 ssiu26: ssiu- 1963 ssiu26: ssiu-22 {
1969 dmas 1964 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1970 dma-n 1965 dma-names = "rx", "tx";
1971 }; 1966 };
1972 ssiu27: ssiu- 1967 ssiu27: ssiu-23 {
1973 dmas 1968 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1974 dma-n 1969 dma-names = "rx", "tx";
1975 }; 1970 };
1976 ssiu30: ssiu- 1971 ssiu30: ssiu-24 {
1977 dmas 1972 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1978 dma-n 1973 dma-names = "rx", "tx";
1979 }; 1974 };
1980 ssiu31: ssiu- 1975 ssiu31: ssiu-25 {
1981 dmas 1976 dmas = <&audma0 0x21>, <&audma1 0x22>;
1982 dma-n 1977 dma-names = "rx", "tx";
1983 }; 1978 };
1984 ssiu32: ssiu- 1979 ssiu32: ssiu-26 {
1985 dmas 1980 dmas = <&audma0 0x23>, <&audma1 0x24>;
1986 dma-n 1981 dma-names = "rx", "tx";
1987 }; 1982 };
1988 ssiu33: ssiu- 1983 ssiu33: ssiu-27 {
1989 dmas 1984 dmas = <&audma0 0x25>, <&audma1 0x26>;
1990 dma-n 1985 dma-names = "rx", "tx";
1991 }; 1986 };
1992 ssiu34: ssiu- 1987 ssiu34: ssiu-28 {
1993 dmas 1988 dmas = <&audma0 0x27>, <&audma1 0x28>;
1994 dma-n 1989 dma-names = "rx", "tx";
1995 }; 1990 };
1996 ssiu35: ssiu- 1991 ssiu35: ssiu-29 {
1997 dmas 1992 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1998 dma-n 1993 dma-names = "rx", "tx";
1999 }; 1994 };
2000 ssiu36: ssiu- 1995 ssiu36: ssiu-30 {
2001 dmas 1996 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2002 dma-n 1997 dma-names = "rx", "tx";
2003 }; 1998 };
2004 ssiu37: ssiu- 1999 ssiu37: ssiu-31 {
2005 dmas 2000 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2006 dma-n 2001 dma-names = "rx", "tx";
2007 }; 2002 };
2008 ssiu40: ssiu- 2003 ssiu40: ssiu-32 {
2009 dmas 2004 dmas = <&audma0 0x71>, <&audma1 0x72>;
2010 dma-n 2005 dma-names = "rx", "tx";
2011 }; 2006 };
2012 ssiu41: ssiu- 2007 ssiu41: ssiu-33 {
2013 dmas 2008 dmas = <&audma0 0x17>, <&audma1 0x18>;
2014 dma-n 2009 dma-names = "rx", "tx";
2015 }; 2010 };
2016 ssiu42: ssiu- 2011 ssiu42: ssiu-34 {
2017 dmas 2012 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2018 dma-n 2013 dma-names = "rx", "tx";
2019 }; 2014 };
2020 ssiu43: ssiu- 2015 ssiu43: ssiu-35 {
2021 dmas 2016 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2022 dma-n 2017 dma-names = "rx", "tx";
2023 }; 2018 };
2024 ssiu44: ssiu- 2019 ssiu44: ssiu-36 {
2025 dmas 2020 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2026 dma-n 2021 dma-names = "rx", "tx";
2027 }; 2022 };
2028 ssiu45: ssiu- 2023 ssiu45: ssiu-37 {
2029 dmas 2024 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2030 dma-n 2025 dma-names = "rx", "tx";
2031 }; 2026 };
2032 ssiu46: ssiu- 2027 ssiu46: ssiu-38 {
2033 dmas 2028 dmas = <&audma0 0x31>, <&audma1 0x32>;
2034 dma-n 2029 dma-names = "rx", "tx";
2035 }; 2030 };
2036 ssiu47: ssiu- 2031 ssiu47: ssiu-39 {
2037 dmas 2032 dmas = <&audma0 0x33>, <&audma1 0x34>;
2038 dma-n 2033 dma-names = "rx", "tx";
2039 }; 2034 };
2040 ssiu50: ssiu- 2035 ssiu50: ssiu-40 {
2041 dmas 2036 dmas = <&audma0 0x73>, <&audma1 0x74>;
2042 dma-n 2037 dma-names = "rx", "tx";
2043 }; 2038 };
2044 ssiu60: ssiu- 2039 ssiu60: ssiu-41 {
2045 dmas 2040 dmas = <&audma0 0x75>, <&audma1 0x76>;
2046 dma-n 2041 dma-names = "rx", "tx";
2047 }; 2042 };
2048 ssiu70: ssiu- 2043 ssiu70: ssiu-42 {
2049 dmas 2044 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2050 dma-n 2045 dma-names = "rx", "tx";
2051 }; 2046 };
2052 ssiu80: ssiu- 2047 ssiu80: ssiu-43 {
2053 dmas 2048 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2054 dma-n 2049 dma-names = "rx", "tx";
2055 }; 2050 };
2056 ssiu90: ssiu- 2051 ssiu90: ssiu-44 {
2057 dmas 2052 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2058 dma-n 2053 dma-names = "rx", "tx";
2059 }; 2054 };
2060 ssiu91: ssiu- 2055 ssiu91: ssiu-45 {
2061 dmas 2056 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2062 dma-n 2057 dma-names = "rx", "tx";
2063 }; 2058 };
2064 ssiu92: ssiu- 2059 ssiu92: ssiu-46 {
2065 dmas 2060 dmas = <&audma0 0x81>, <&audma1 0x82>;
2066 dma-n 2061 dma-names = "rx", "tx";
2067 }; 2062 };
2068 ssiu93: ssiu- 2063 ssiu93: ssiu-47 {
2069 dmas 2064 dmas = <&audma0 0x83>, <&audma1 0x84>;
2070 dma-n 2065 dma-names = "rx", "tx";
2071 }; 2066 };
2072 ssiu94: ssiu- 2067 ssiu94: ssiu-48 {
2073 dmas 2068 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2074 dma-n 2069 dma-names = "rx", "tx";
2075 }; 2070 };
2076 ssiu95: ssiu- 2071 ssiu95: ssiu-49 {
2077 dmas 2072 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2078 dma-n 2073 dma-names = "rx", "tx";
2079 }; 2074 };
2080 ssiu96: ssiu- 2075 ssiu96: ssiu-50 {
2081 dmas 2076 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2082 dma-n 2077 dma-names = "rx", "tx";
2083 }; 2078 };
2084 ssiu97: ssiu- 2079 ssiu97: ssiu-51 {
2085 dmas 2080 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2086 dma-n 2081 dma-names = "rx", "tx";
2087 }; 2082 };
2088 }; 2083 };
2089 2084
2090 rcar_sound,ssi { 2085 rcar_sound,ssi {
2091 ssi0: ssi-0 { 2086 ssi0: ssi-0 {
2092 inter 2087 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2093 dmas 2088 dmas = <&audma0 0x01>, <&audma1 0x02>;
2094 dma-n 2089 dma-names = "rx", "tx";
2095 }; 2090 };
2096 ssi1: ssi-1 { 2091 ssi1: ssi-1 {
2097 inter 2092 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2098 dmas 2093 dmas = <&audma0 0x03>, <&audma1 0x04>;
2099 dma-n 2094 dma-names = "rx", "tx";
2100 }; 2095 };
2101 ssi2: ssi-2 { 2096 ssi2: ssi-2 {
2102 inter 2097 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2103 dmas 2098 dmas = <&audma0 0x05>, <&audma1 0x06>;
2104 dma-n 2099 dma-names = "rx", "tx";
2105 }; 2100 };
2106 ssi3: ssi-3 { 2101 ssi3: ssi-3 {
2107 inter 2102 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2108 dmas 2103 dmas = <&audma0 0x07>, <&audma1 0x08>;
2109 dma-n 2104 dma-names = "rx", "tx";
2110 }; 2105 };
2111 ssi4: ssi-4 { 2106 ssi4: ssi-4 {
2112 inter 2107 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2113 dmas 2108 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2114 dma-n 2109 dma-names = "rx", "tx";
2115 }; 2110 };
2116 ssi5: ssi-5 { 2111 ssi5: ssi-5 {
2117 inter 2112 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2118 dmas 2113 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2119 dma-n 2114 dma-names = "rx", "tx";
2120 }; 2115 };
2121 ssi6: ssi-6 { 2116 ssi6: ssi-6 {
2122 inter 2117 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2123 dmas 2118 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2124 dma-n 2119 dma-names = "rx", "tx";
2125 }; 2120 };
2126 ssi7: ssi-7 { 2121 ssi7: ssi-7 {
2127 inter 2122 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2128 dmas 2123 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2129 dma-n 2124 dma-names = "rx", "tx";
2130 }; 2125 };
2131 ssi8: ssi-8 { 2126 ssi8: ssi-8 {
2132 inter 2127 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2133 dmas 2128 dmas = <&audma0 0x11>, <&audma1 0x12>;
2134 dma-n 2129 dma-names = "rx", "tx";
2135 }; 2130 };
2136 ssi9: ssi-9 { 2131 ssi9: ssi-9 {
2137 inter 2132 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2138 dmas 2133 dmas = <&audma0 0x13>, <&audma1 0x14>;
2139 dma-n 2134 dma-names = "rx", "tx";
2140 }; 2135 };
2141 }; 2136 };
2142 }; 2137 };
2143 2138
2144 mlp: mlp@ec520000 { 2139 mlp: mlp@ec520000 {
2145 compatible = "renesas 2140 compatible = "renesas,r8a77965-mlp",
2146 "renesas 2141 "renesas,rcar-gen3-mlp";
2147 reg = <0 0xec520000 0 2142 reg = <0 0xec520000 0 0x800>;
2148 interrupts = <GIC_SPI 2143 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2149 <GIC_SPI 385 2144 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2150 clocks = <&cpg CPG_MO 2145 clocks = <&cpg CPG_MOD 802>;
2151 power-domains = <&sys 2146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2152 resets = <&cpg 802>; 2147 resets = <&cpg 802>;
2153 status = "disabled"; 2148 status = "disabled";
2154 }; 2149 };
2155 2150
2156 audma0: dma-controller@ec7000 2151 audma0: dma-controller@ec700000 {
2157 compatible = "renesas 2152 compatible = "renesas,dmac-r8a77965",
2158 "renesas 2153 "renesas,rcar-dmac";
2159 reg = <0 0xec700000 0 2154 reg = <0 0xec700000 0 0x10000>;
2160 interrupts = <GIC_SPI 2155 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2161 <GIC_SPI 2156 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2162 <GIC_SPI 2157 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2163 <GIC_SPI 2158 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2164 <GIC_SPI 2159 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2165 <GIC_SPI 2160 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2166 <GIC_SPI 2161 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2167 <GIC_SPI 2162 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2168 <GIC_SPI 2163 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2169 <GIC_SPI 2164 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2170 <GIC_SPI 2165 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2171 <GIC_SPI 2166 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2172 <GIC_SPI 2167 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2173 <GIC_SPI 2168 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2174 <GIC_SPI 2169 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2175 <GIC_SPI 2170 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2176 <GIC_SPI 2171 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2177 interrupt-names = "er 2172 interrupt-names = "error",
2178 "ch0" 2173 "ch0", "ch1", "ch2", "ch3",
2179 "ch4" 2174 "ch4", "ch5", "ch6", "ch7",
2180 "ch8" 2175 "ch8", "ch9", "ch10", "ch11",
2181 "ch12 2176 "ch12", "ch13", "ch14", "ch15";
2182 clocks = <&cpg CPG_MO 2177 clocks = <&cpg CPG_MOD 502>;
2183 clock-names = "fck"; 2178 clock-names = "fck";
2184 power-domains = <&sys 2179 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2185 resets = <&cpg 502>; 2180 resets = <&cpg 502>;
2186 #dma-cells = <1>; 2181 #dma-cells = <1>;
2187 dma-channels = <16>; 2182 dma-channels = <16>;
2188 iommus = <&ipmmu_mp 0 <<
2189 <&ipmmu_mp 2 <<
2190 <&ipmmu_mp 4 <<
2191 <&ipmmu_mp 6 <<
2192 <&ipmmu_mp 8 <<
2193 <&ipmmu_mp 1 <<
2194 <&ipmmu_mp 1 <<
2195 <&ipmmu_mp 1 <<
2196 }; 2183 };
2197 2184
2198 audma1: dma-controller@ec7200 2185 audma1: dma-controller@ec720000 {
2199 compatible = "renesas 2186 compatible = "renesas,dmac-r8a77965",
2200 "renesas 2187 "renesas,rcar-dmac";
2201 reg = <0 0xec720000 0 2188 reg = <0 0xec720000 0 0x10000>;
2202 interrupts = <GIC_SPI 2189 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 2190 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2204 <GIC_SPI 2191 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2205 <GIC_SPI 2192 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2206 <GIC_SPI 2193 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2207 <GIC_SPI 2194 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2208 <GIC_SPI 2195 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2209 <GIC_SPI 2196 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2210 <GIC_SPI 2197 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2211 <GIC_SPI 2198 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2212 <GIC_SPI 2199 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2213 <GIC_SPI 2200 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2214 <GIC_SPI 2201 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2215 <GIC_SPI 2202 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2216 <GIC_SPI 2203 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2217 <GIC_SPI 2204 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2218 <GIC_SPI 2205 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2219 interrupt-names = "er 2206 interrupt-names = "error",
2220 "ch0" 2207 "ch0", "ch1", "ch2", "ch3",
2221 "ch4" 2208 "ch4", "ch5", "ch6", "ch7",
2222 "ch8" 2209 "ch8", "ch9", "ch10", "ch11",
2223 "ch12 2210 "ch12", "ch13", "ch14", "ch15";
2224 clocks = <&cpg CPG_MO 2211 clocks = <&cpg CPG_MOD 501>;
2225 clock-names = "fck"; 2212 clock-names = "fck";
2226 power-domains = <&sys 2213 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2227 resets = <&cpg 501>; 2214 resets = <&cpg 501>;
2228 #dma-cells = <1>; 2215 #dma-cells = <1>;
2229 dma-channels = <16>; 2216 dma-channels = <16>;
2230 iommus = <&ipmmu_mp 1 <<
2231 <&ipmmu_mp 1 <<
2232 <&ipmmu_mp 2 <<
2233 <&ipmmu_mp 2 <<
2234 <&ipmmu_mp 2 <<
2235 <&ipmmu_mp 2 <<
2236 <&ipmmu_mp 2 <<
2237 <&ipmmu_mp 3 <<
2238 }; 2217 };
2239 2218
2240 xhci0: usb@ee000000 { 2219 xhci0: usb@ee000000 {
2241 compatible = "renesas 2220 compatible = "renesas,xhci-r8a77965",
2242 "renesas 2221 "renesas,rcar-gen3-xhci";
2243 reg = <0 0xee000000 0 2222 reg = <0 0xee000000 0 0xc00>;
2244 interrupts = <GIC_SPI 2223 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2245 clocks = <&cpg CPG_MO 2224 clocks = <&cpg CPG_MOD 328>;
2246 power-domains = <&sys 2225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2247 resets = <&cpg 328>; 2226 resets = <&cpg 328>;
2248 status = "disabled"; 2227 status = "disabled";
2249 }; 2228 };
2250 2229
2251 usb3_peri0: usb@ee020000 { 2230 usb3_peri0: usb@ee020000 {
2252 compatible = "renesas 2231 compatible = "renesas,r8a77965-usb3-peri",
2253 "renesas 2232 "renesas,rcar-gen3-usb3-peri";
2254 reg = <0 0xee020000 0 2233 reg = <0 0xee020000 0 0x400>;
2255 interrupts = <GIC_SPI 2234 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2256 clocks = <&cpg CPG_MO 2235 clocks = <&cpg CPG_MOD 328>;
2257 power-domains = <&sys 2236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2258 resets = <&cpg 328>; 2237 resets = <&cpg 328>;
2259 status = "disabled"; 2238 status = "disabled";
2260 }; 2239 };
2261 2240
2262 ohci0: usb@ee080000 { 2241 ohci0: usb@ee080000 {
2263 compatible = "generic 2242 compatible = "generic-ohci";
2264 reg = <0 0xee080000 0 2243 reg = <0 0xee080000 0 0x100>;
2265 interrupts = <GIC_SPI 2244 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2266 clocks = <&cpg CPG_MO 2245 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2267 phys = <&usb2_phy0 1> 2246 phys = <&usb2_phy0 1>;
2268 phy-names = "usb"; 2247 phy-names = "usb";
2269 power-domains = <&sys 2248 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2270 resets = <&cpg 703>, 2249 resets = <&cpg 703>, <&cpg 704>;
2271 status = "disabled"; 2250 status = "disabled";
2272 }; 2251 };
2273 2252
2274 ohci1: usb@ee0a0000 { 2253 ohci1: usb@ee0a0000 {
2275 compatible = "generic 2254 compatible = "generic-ohci";
2276 reg = <0 0xee0a0000 0 2255 reg = <0 0xee0a0000 0 0x100>;
2277 interrupts = <GIC_SPI 2256 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2278 clocks = <&cpg CPG_MO 2257 clocks = <&cpg CPG_MOD 702>;
2279 phys = <&usb2_phy1 1> 2258 phys = <&usb2_phy1 1>;
2280 phy-names = "usb"; 2259 phy-names = "usb";
2281 power-domains = <&sys 2260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2282 resets = <&cpg 702>; 2261 resets = <&cpg 702>;
2283 status = "disabled"; 2262 status = "disabled";
2284 }; 2263 };
2285 2264
2286 ehci0: usb@ee080100 { 2265 ehci0: usb@ee080100 {
2287 compatible = "generic 2266 compatible = "generic-ehci";
2288 reg = <0 0xee080100 0 2267 reg = <0 0xee080100 0 0x100>;
2289 interrupts = <GIC_SPI 2268 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2290 clocks = <&cpg CPG_MO 2269 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2291 phys = <&usb2_phy0 2> 2270 phys = <&usb2_phy0 2>;
2292 phy-names = "usb"; 2271 phy-names = "usb";
2293 companion = <&ohci0>; 2272 companion = <&ohci0>;
2294 power-domains = <&sys 2273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2295 resets = <&cpg 703>, 2274 resets = <&cpg 703>, <&cpg 704>;
2296 status = "disabled"; 2275 status = "disabled";
2297 }; 2276 };
2298 2277
2299 ehci1: usb@ee0a0100 { 2278 ehci1: usb@ee0a0100 {
2300 compatible = "generic 2279 compatible = "generic-ehci";
2301 reg = <0 0xee0a0100 0 2280 reg = <0 0xee0a0100 0 0x100>;
2302 interrupts = <GIC_SPI 2281 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2303 clocks = <&cpg CPG_MO 2282 clocks = <&cpg CPG_MOD 702>;
2304 phys = <&usb2_phy1 2> 2283 phys = <&usb2_phy1 2>;
2305 phy-names = "usb"; 2284 phy-names = "usb";
2306 companion = <&ohci1>; 2285 companion = <&ohci1>;
2307 power-domains = <&sys 2286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2308 resets = <&cpg 702>; 2287 resets = <&cpg 702>;
2309 status = "disabled"; 2288 status = "disabled";
2310 }; 2289 };
2311 2290
2312 usb2_phy0: usb-phy@ee080200 { 2291 usb2_phy0: usb-phy@ee080200 {
2313 compatible = "renesas 2292 compatible = "renesas,usb2-phy-r8a77965",
2314 "renesas 2293 "renesas,rcar-gen3-usb2-phy";
2315 reg = <0 0xee080200 0 2294 reg = <0 0xee080200 0 0x700>;
2316 interrupts = <GIC_SPI 2295 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MO 2296 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2318 power-domains = <&sys 2297 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2319 resets = <&cpg 703>, 2298 resets = <&cpg 703>, <&cpg 704>;
2320 #phy-cells = <1>; 2299 #phy-cells = <1>;
2321 status = "disabled"; 2300 status = "disabled";
2322 }; 2301 };
2323 2302
2324 usb2_phy1: usb-phy@ee0a0200 { 2303 usb2_phy1: usb-phy@ee0a0200 {
2325 compatible = "renesas 2304 compatible = "renesas,usb2-phy-r8a77965",
2326 "renesas 2305 "renesas,rcar-gen3-usb2-phy";
2327 reg = <0 0xee0a0200 0 2306 reg = <0 0xee0a0200 0 0x700>;
2328 clocks = <&cpg CPG_MO 2307 clocks = <&cpg CPG_MOD 702>;
2329 power-domains = <&sys 2308 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2330 resets = <&cpg 702>; 2309 resets = <&cpg 702>;
2331 #phy-cells = <1>; 2310 #phy-cells = <1>;
2332 status = "disabled"; 2311 status = "disabled";
2333 }; 2312 };
2334 2313
2335 sdhi0: mmc@ee100000 { 2314 sdhi0: mmc@ee100000 {
2336 compatible = "renesas 2315 compatible = "renesas,sdhi-r8a77965",
2337 "renesas 2316 "renesas,rcar-gen3-sdhi";
2338 reg = <0 0xee100000 0 2317 reg = <0 0xee100000 0 0x2000>;
2339 interrupts = <GIC_SPI 2318 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2340 clocks = <&cpg CPG_MO 2319 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>;
2341 clock-names = "core", 2320 clock-names = "core", "clkh";
2342 max-frequency = <2000 2321 max-frequency = <200000000>;
2343 power-domains = <&sys 2322 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2344 resets = <&cpg 314>; 2323 resets = <&cpg 314>;
2345 iommus = <&ipmmu_ds1 2324 iommus = <&ipmmu_ds1 32>;
2346 status = "disabled"; 2325 status = "disabled";
2347 }; 2326 };
2348 2327
2349 sdhi1: mmc@ee120000 { 2328 sdhi1: mmc@ee120000 {
2350 compatible = "renesas 2329 compatible = "renesas,sdhi-r8a77965",
2351 "renesas 2330 "renesas,rcar-gen3-sdhi";
2352 reg = <0 0xee120000 0 2331 reg = <0 0xee120000 0 0x2000>;
2353 interrupts = <GIC_SPI 2332 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MO 2333 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>;
2355 clock-names = "core", 2334 clock-names = "core", "clkh";
2356 max-frequency = <2000 2335 max-frequency = <200000000>;
2357 power-domains = <&sys 2336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2358 resets = <&cpg 313>; 2337 resets = <&cpg 313>;
2359 iommus = <&ipmmu_ds1 2338 iommus = <&ipmmu_ds1 33>;
2360 status = "disabled"; 2339 status = "disabled";
2361 }; 2340 };
2362 2341
2363 sdhi2: mmc@ee140000 { 2342 sdhi2: mmc@ee140000 {
2364 compatible = "renesas 2343 compatible = "renesas,sdhi-r8a77965",
2365 "renesas 2344 "renesas,rcar-gen3-sdhi";
2366 reg = <0 0xee140000 0 2345 reg = <0 0xee140000 0 0x2000>;
2367 interrupts = <GIC_SPI 2346 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2368 clocks = <&cpg CPG_MO 2347 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>;
2369 clock-names = "core", 2348 clock-names = "core", "clkh";
2370 max-frequency = <2000 2349 max-frequency = <200000000>;
2371 power-domains = <&sys 2350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2372 resets = <&cpg 312>; 2351 resets = <&cpg 312>;
2373 iommus = <&ipmmu_ds1 2352 iommus = <&ipmmu_ds1 34>;
2374 status = "disabled"; 2353 status = "disabled";
2375 }; 2354 };
2376 2355
2377 sdhi3: mmc@ee160000 { 2356 sdhi3: mmc@ee160000 {
2378 compatible = "renesas 2357 compatible = "renesas,sdhi-r8a77965",
2379 "renesas 2358 "renesas,rcar-gen3-sdhi";
2380 reg = <0 0xee160000 0 2359 reg = <0 0xee160000 0 0x2000>;
2381 interrupts = <GIC_SPI 2360 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2382 clocks = <&cpg CPG_MO 2361 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>;
2383 clock-names = "core", 2362 clock-names = "core", "clkh";
2384 max-frequency = <2000 2363 max-frequency = <200000000>;
2385 power-domains = <&sys 2364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2386 resets = <&cpg 311>; 2365 resets = <&cpg 311>;
2387 iommus = <&ipmmu_ds1 2366 iommus = <&ipmmu_ds1 35>;
2388 status = "disabled"; 2367 status = "disabled";
2389 }; 2368 };
2390 2369
2391 rpc: spi@ee200000 { 2370 rpc: spi@ee200000 {
2392 compatible = "renesas 2371 compatible = "renesas,r8a77965-rpc-if",
2393 "renesas 2372 "renesas,rcar-gen3-rpc-if";
2394 reg = <0 0xee200000 0 2373 reg = <0 0xee200000 0 0x200>,
2395 <0 0x08000000 0 2374 <0 0x08000000 0 0x04000000>,
2396 <0 0xee208000 0 2375 <0 0xee208000 0 0x100>;
2397 reg-names = "regs", " 2376 reg-names = "regs", "dirmap", "wbuf";
2398 interrupts = <GIC_SPI 2377 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2399 clocks = <&cpg CPG_MO 2378 clocks = <&cpg CPG_MOD 917>;
2400 power-domains = <&sys 2379 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2401 resets = <&cpg 917>; 2380 resets = <&cpg 917>;
2402 #address-cells = <1>; 2381 #address-cells = <1>;
2403 #size-cells = <0>; 2382 #size-cells = <0>;
2404 status = "disabled"; 2383 status = "disabled";
2405 }; 2384 };
2406 2385
2407 sata: sata@ee300000 { 2386 sata: sata@ee300000 {
2408 compatible = "renesas 2387 compatible = "renesas,sata-r8a77965",
2409 "renesas 2388 "renesas,rcar-gen3-sata";
2410 reg = <0 0xee300000 0 2389 reg = <0 0xee300000 0 0x200000>;
2411 interrupts = <GIC_SPI 2390 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2412 clocks = <&cpg CPG_MO 2391 clocks = <&cpg CPG_MOD 815>;
2413 power-domains = <&sys 2392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2414 resets = <&cpg 815>; 2393 resets = <&cpg 815>;
2415 iommus = <&ipmmu_hc 2 <<
2416 status = "disabled"; 2394 status = "disabled";
2417 }; 2395 };
2418 2396
2419 gic: interrupt-controller@f10 2397 gic: interrupt-controller@f1010000 {
2420 compatible = "arm,gic 2398 compatible = "arm,gic-400";
2421 #interrupt-cells = <3 2399 #interrupt-cells = <3>;
2422 #address-cells = <0>; 2400 #address-cells = <0>;
2423 interrupt-controller; 2401 interrupt-controller;
2424 reg = <0x0 0xf1010000 2402 reg = <0x0 0xf1010000 0 0x1000>,
2425 <0x0 0xf1020000 2403 <0x0 0xf1020000 0 0x20000>,
2426 <0x0 0xf1040000 2404 <0x0 0xf1040000 0 0x20000>,
2427 <0x0 0xf1060000 2405 <0x0 0xf1060000 0 0x20000>;
2428 interrupts = <GIC_PPI 2406 interrupts = <GIC_PPI 9
2429 (GIC_ 2407 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2430 clocks = <&cpg CPG_MO 2408 clocks = <&cpg CPG_MOD 408>;
2431 clock-names = "clk"; 2409 clock-names = "clk";
2432 power-domains = <&sys 2410 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2433 resets = <&cpg 408>; 2411 resets = <&cpg 408>;
2434 }; 2412 };
2435 2413
2436 pciec0: pcie@fe000000 { 2414 pciec0: pcie@fe000000 {
2437 compatible = "renesas 2415 compatible = "renesas,pcie-r8a77965",
2438 "renesas 2416 "renesas,pcie-rcar-gen3";
2439 reg = <0 0xfe000000 0 2417 reg = <0 0xfe000000 0 0x80000>;
2440 #address-cells = <3>; 2418 #address-cells = <3>;
2441 #size-cells = <2>; 2419 #size-cells = <2>;
2442 bus-range = <0x00 0xf 2420 bus-range = <0x00 0xff>;
2443 device_type = "pci"; 2421 device_type = "pci";
2444 ranges = <0x01000000 2422 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2445 <0x02000000 2423 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2446 <0x02000000 2424 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2447 <0x42000000 2425 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2448 /* Map all possible D !! 2426 /* Map all possible DDR as inbound ranges */
2449 dma-ranges = <0x42000 !! 2427 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2450 interrupts = <GIC_SPI 2428 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 117 2429 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2452 <GIC_SPI 118 2430 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2453 #interrupt-cells = <1 2431 #interrupt-cells = <1>;
2454 interrupt-map-mask = 2432 interrupt-map-mask = <0 0 0 0>;
2455 interrupt-map = <0 0 2433 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2456 clocks = <&cpg CPG_MO 2434 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2457 clock-names = "pcie", 2435 clock-names = "pcie", "pcie_bus";
2458 power-domains = <&sys 2436 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2459 resets = <&cpg 319>; 2437 resets = <&cpg 319>;
2460 iommu-map = <0 &ipmmu <<
2461 iommu-map-mask = <0>; <<
2462 status = "disabled"; 2438 status = "disabled";
2463 }; 2439 };
2464 2440
2465 pciec1: pcie@ee800000 { 2441 pciec1: pcie@ee800000 {
2466 compatible = "renesas 2442 compatible = "renesas,pcie-r8a77965",
2467 "renesas 2443 "renesas,pcie-rcar-gen3";
2468 reg = <0 0xee800000 0 2444 reg = <0 0xee800000 0 0x80000>;
2469 #address-cells = <3>; 2445 #address-cells = <3>;
2470 #size-cells = <2>; 2446 #size-cells = <2>;
2471 bus-range = <0x00 0xf 2447 bus-range = <0x00 0xff>;
2472 device_type = "pci"; 2448 device_type = "pci";
2473 ranges = <0x01000000 2449 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2474 <0x02000000 2450 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2475 <0x02000000 2451 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2476 <0x42000000 2452 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2477 /* Map all possible D !! 2453 /* Map all possible DDR as inbound ranges */
2478 dma-ranges = <0x42000 !! 2454 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2479 interrupts = <GIC_SPI 2455 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2480 <GIC_SPI 149 2456 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 150 2457 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2482 #interrupt-cells = <1 2458 #interrupt-cells = <1>;
2483 interrupt-map-mask = 2459 interrupt-map-mask = <0 0 0 0>;
2484 interrupt-map = <0 0 2460 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MO 2461 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2486 clock-names = "pcie", 2462 clock-names = "pcie", "pcie_bus";
2487 power-domains = <&sys 2463 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2488 resets = <&cpg 318>; 2464 resets = <&cpg 318>;
2489 iommu-map = <0 &ipmmu <<
2490 iommu-map-mask = <0>; <<
2491 status = "disabled"; 2465 status = "disabled";
2492 }; 2466 };
2493 2467
2494 fdp1@fe940000 { 2468 fdp1@fe940000 {
2495 compatible = "renesas 2469 compatible = "renesas,fdp1";
2496 reg = <0 0xfe940000 0 2470 reg = <0 0xfe940000 0 0x2400>;
2497 interrupts = <GIC_SPI 2471 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2498 clocks = <&cpg CPG_MO 2472 clocks = <&cpg CPG_MOD 119>;
2499 power-domains = <&sys 2473 power-domains = <&sysc R8A77965_PD_A3VP>;
2500 resets = <&cpg 119>; 2474 resets = <&cpg 119>;
2501 renesas,fcp = <&fcpf0 2475 renesas,fcp = <&fcpf0>;
2502 }; 2476 };
2503 2477
2504 fcpf0: fcp@fe950000 { 2478 fcpf0: fcp@fe950000 {
2505 compatible = "renesas 2479 compatible = "renesas,fcpf";
2506 reg = <0 0xfe950000 0 2480 reg = <0 0xfe950000 0 0x200>;
2507 clocks = <&cpg CPG_MO 2481 clocks = <&cpg CPG_MOD 615>;
2508 power-domains = <&sys 2482 power-domains = <&sysc R8A77965_PD_A3VP>;
2509 resets = <&cpg 615>; 2483 resets = <&cpg 615>;
2510 iommus = <&ipmmu_vp0 <<
2511 }; 2484 };
2512 2485
2513 vspb: vsp@fe960000 { 2486 vspb: vsp@fe960000 {
2514 compatible = "renesas 2487 compatible = "renesas,vsp2";
2515 reg = <0 0xfe960000 0 2488 reg = <0 0xfe960000 0 0x8000>;
2516 interrupts = <GIC_SPI 2489 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2517 clocks = <&cpg CPG_MO 2490 clocks = <&cpg CPG_MOD 626>;
2518 power-domains = <&sys 2491 power-domains = <&sysc R8A77965_PD_A3VP>;
2519 resets = <&cpg 626>; 2492 resets = <&cpg 626>;
2520 2493
2521 renesas,fcp = <&fcpvb 2494 renesas,fcp = <&fcpvb0>;
2522 }; 2495 };
2523 2496
2524 vspi0: vsp@fe9a0000 { 2497 vspi0: vsp@fe9a0000 {
2525 compatible = "renesas 2498 compatible = "renesas,vsp2";
2526 reg = <0 0xfe9a0000 0 2499 reg = <0 0xfe9a0000 0 0x8000>;
2527 interrupts = <GIC_SPI 2500 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2528 clocks = <&cpg CPG_MO 2501 clocks = <&cpg CPG_MOD 631>;
2529 power-domains = <&sys 2502 power-domains = <&sysc R8A77965_PD_A3VP>;
2530 resets = <&cpg 631>; 2503 resets = <&cpg 631>;
2531 2504
2532 renesas,fcp = <&fcpvi 2505 renesas,fcp = <&fcpvi0>;
2533 }; 2506 };
2534 2507
2535 vspd0: vsp@fea20000 { 2508 vspd0: vsp@fea20000 {
2536 compatible = "renesas 2509 compatible = "renesas,vsp2";
2537 reg = <0 0xfea20000 0 2510 reg = <0 0xfea20000 0 0x5000>;
2538 interrupts = <GIC_SPI 2511 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2539 clocks = <&cpg CPG_MO 2512 clocks = <&cpg CPG_MOD 623>;
2540 power-domains = <&sys 2513 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2541 resets = <&cpg 623>; 2514 resets = <&cpg 623>;
2542 2515
2543 renesas,fcp = <&fcpvd 2516 renesas,fcp = <&fcpvd0>;
2544 }; 2517 };
2545 2518
2546 vspd1: vsp@fea28000 { 2519 vspd1: vsp@fea28000 {
2547 compatible = "renesas 2520 compatible = "renesas,vsp2";
2548 reg = <0 0xfea28000 0 2521 reg = <0 0xfea28000 0 0x5000>;
2549 interrupts = <GIC_SPI 2522 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2550 clocks = <&cpg CPG_MO 2523 clocks = <&cpg CPG_MOD 622>;
2551 power-domains = <&sys 2524 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2552 resets = <&cpg 622>; 2525 resets = <&cpg 622>;
2553 2526
2554 renesas,fcp = <&fcpvd 2527 renesas,fcp = <&fcpvd1>;
2555 }; 2528 };
2556 2529
2557 fcpvb0: fcp@fe96f000 { 2530 fcpvb0: fcp@fe96f000 {
2558 compatible = "renesas 2531 compatible = "renesas,fcpv";
2559 reg = <0 0xfe96f000 0 2532 reg = <0 0xfe96f000 0 0x200>;
2560 clocks = <&cpg CPG_MO 2533 clocks = <&cpg CPG_MOD 607>;
2561 power-domains = <&sys 2534 power-domains = <&sysc R8A77965_PD_A3VP>;
2562 resets = <&cpg 607>; 2535 resets = <&cpg 607>;
2563 iommus = <&ipmmu_vp0 <<
2564 }; 2536 };
2565 2537
2566 fcpvd0: fcp@fea27000 { 2538 fcpvd0: fcp@fea27000 {
2567 compatible = "renesas 2539 compatible = "renesas,fcpv";
2568 reg = <0 0xfea27000 0 2540 reg = <0 0xfea27000 0 0x200>;
2569 clocks = <&cpg CPG_MO 2541 clocks = <&cpg CPG_MOD 603>;
2570 power-domains = <&sys 2542 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2571 resets = <&cpg 603>; 2543 resets = <&cpg 603>;
2572 iommus = <&ipmmu_vi0 <<
2573 }; 2544 };
2574 2545
2575 fcpvd1: fcp@fea2f000 { 2546 fcpvd1: fcp@fea2f000 {
2576 compatible = "renesas 2547 compatible = "renesas,fcpv";
2577 reg = <0 0xfea2f000 0 2548 reg = <0 0xfea2f000 0 0x200>;
2578 clocks = <&cpg CPG_MO 2549 clocks = <&cpg CPG_MOD 602>;
2579 power-domains = <&sys 2550 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2580 resets = <&cpg 602>; 2551 resets = <&cpg 602>;
2581 iommus = <&ipmmu_vi0 <<
2582 }; 2552 };
2583 2553
2584 fcpvi0: fcp@fe9af000 { 2554 fcpvi0: fcp@fe9af000 {
2585 compatible = "renesas 2555 compatible = "renesas,fcpv";
2586 reg = <0 0xfe9af000 0 2556 reg = <0 0xfe9af000 0 0x200>;
2587 clocks = <&cpg CPG_MO 2557 clocks = <&cpg CPG_MOD 611>;
2588 power-domains = <&sys 2558 power-domains = <&sysc R8A77965_PD_A3VP>;
2589 resets = <&cpg 611>; 2559 resets = <&cpg 611>;
2590 iommus = <&ipmmu_vp0 <<
2591 }; 2560 };
2592 2561
2593 cmm0: cmm@fea40000 { 2562 cmm0: cmm@fea40000 {
2594 compatible = "renesas 2563 compatible = "renesas,r8a77965-cmm",
2595 "renesas 2564 "renesas,rcar-gen3-cmm";
2596 reg = <0 0xfea40000 0 2565 reg = <0 0xfea40000 0 0x1000>;
2597 power-domains = <&sys 2566 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2598 clocks = <&cpg CPG_MO 2567 clocks = <&cpg CPG_MOD 711>;
2599 resets = <&cpg 711>; 2568 resets = <&cpg 711>;
2600 }; 2569 };
2601 2570
2602 cmm1: cmm@fea50000 { 2571 cmm1: cmm@fea50000 {
2603 compatible = "renesas 2572 compatible = "renesas,r8a77965-cmm",
2604 "renesas 2573 "renesas,rcar-gen3-cmm";
2605 reg = <0 0xfea50000 0 2574 reg = <0 0xfea50000 0 0x1000>;
2606 power-domains = <&sys 2575 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2607 clocks = <&cpg CPG_MO 2576 clocks = <&cpg CPG_MOD 710>;
2608 resets = <&cpg 710>; 2577 resets = <&cpg 710>;
2609 }; 2578 };
2610 2579
2611 cmm3: cmm@fea70000 { 2580 cmm3: cmm@fea70000 {
2612 compatible = "renesas 2581 compatible = "renesas,r8a77965-cmm",
2613 "renesas 2582 "renesas,rcar-gen3-cmm";
2614 reg = <0 0xfea70000 0 2583 reg = <0 0xfea70000 0 0x1000>;
2615 power-domains = <&sys 2584 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2616 clocks = <&cpg CPG_MO 2585 clocks = <&cpg CPG_MOD 708>;
2617 resets = <&cpg 708>; 2586 resets = <&cpg 708>;
2618 }; 2587 };
2619 2588
2620 csi20: csi2@fea80000 { 2589 csi20: csi2@fea80000 {
2621 compatible = "renesas 2590 compatible = "renesas,r8a77965-csi2";
2622 reg = <0 0xfea80000 0 2591 reg = <0 0xfea80000 0 0x10000>;
2623 interrupts = <GIC_SPI 2592 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2624 clocks = <&cpg CPG_MO 2593 clocks = <&cpg CPG_MOD 714>;
2625 power-domains = <&sys 2594 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2626 resets = <&cpg 714>; 2595 resets = <&cpg 714>;
2627 status = "disabled"; 2596 status = "disabled";
2628 2597
2629 ports { 2598 ports {
2630 #address-cell 2599 #address-cells = <1>;
2631 #size-cells = 2600 #size-cells = <0>;
2632 2601
2633 port@0 { 2602 port@0 {
2634 reg = 2603 reg = <0>;
2635 }; 2604 };
2636 2605
2637 port@1 { 2606 port@1 {
2638 #addr 2607 #address-cells = <1>;
2639 #size 2608 #size-cells = <0>;
2640 2609
2641 reg = 2610 reg = <1>;
2642 2611
2643 csi20 2612 csi20vin0: endpoint@0 {
2644 2613 reg = <0>;
2645 2614 remote-endpoint = <&vin0csi20>;
2646 }; 2615 };
2647 csi20 2616 csi20vin1: endpoint@1 {
2648 2617 reg = <1>;
2649 2618 remote-endpoint = <&vin1csi20>;
2650 }; 2619 };
2651 csi20 2620 csi20vin2: endpoint@2 {
2652 2621 reg = <2>;
2653 2622 remote-endpoint = <&vin2csi20>;
2654 }; 2623 };
2655 csi20 2624 csi20vin3: endpoint@3 {
2656 2625 reg = <3>;
2657 2626 remote-endpoint = <&vin3csi20>;
2658 }; 2627 };
2659 csi20 2628 csi20vin4: endpoint@4 {
2660 2629 reg = <4>;
2661 2630 remote-endpoint = <&vin4csi20>;
2662 }; 2631 };
2663 csi20 2632 csi20vin5: endpoint@5 {
2664 2633 reg = <5>;
2665 2634 remote-endpoint = <&vin5csi20>;
2666 }; 2635 };
2667 csi20 2636 csi20vin6: endpoint@6 {
2668 2637 reg = <6>;
2669 2638 remote-endpoint = <&vin6csi20>;
2670 }; 2639 };
2671 csi20 2640 csi20vin7: endpoint@7 {
2672 2641 reg = <7>;
2673 2642 remote-endpoint = <&vin7csi20>;
2674 }; 2643 };
2675 }; 2644 };
2676 }; 2645 };
2677 }; 2646 };
2678 2647
2679 csi40: csi2@feaa0000 { 2648 csi40: csi2@feaa0000 {
2680 compatible = "renesas 2649 compatible = "renesas,r8a77965-csi2";
2681 reg = <0 0xfeaa0000 0 2650 reg = <0 0xfeaa0000 0 0x10000>;
2682 interrupts = <GIC_SPI 2651 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2683 clocks = <&cpg CPG_MO 2652 clocks = <&cpg CPG_MOD 716>;
2684 power-domains = <&sys 2653 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2685 resets = <&cpg 716>; 2654 resets = <&cpg 716>;
2686 status = "disabled"; 2655 status = "disabled";
2687 2656
2688 ports { 2657 ports {
2689 #address-cell 2658 #address-cells = <1>;
2690 #size-cells = 2659 #size-cells = <0>;
2691 2660
2692 port@0 { 2661 port@0 {
2693 reg = 2662 reg = <0>;
2694 }; 2663 };
2695 2664
2696 port@1 { 2665 port@1 {
2697 #addr 2666 #address-cells = <1>;
2698 #size 2667 #size-cells = <0>;
2699 2668
2700 reg = 2669 reg = <1>;
2701 2670
2702 csi40 2671 csi40vin0: endpoint@0 {
2703 2672 reg = <0>;
2704 2673 remote-endpoint = <&vin0csi40>;
2705 }; 2674 };
2706 csi40 2675 csi40vin1: endpoint@1 {
2707 2676 reg = <1>;
2708 2677 remote-endpoint = <&vin1csi40>;
2709 }; 2678 };
2710 csi40 2679 csi40vin2: endpoint@2 {
2711 2680 reg = <2>;
2712 2681 remote-endpoint = <&vin2csi40>;
2713 }; 2682 };
2714 csi40 2683 csi40vin3: endpoint@3 {
2715 2684 reg = <3>;
2716 2685 remote-endpoint = <&vin3csi40>;
2717 }; 2686 };
2718 csi40 2687 csi40vin4: endpoint@4 {
2719 2688 reg = <4>;
2720 2689 remote-endpoint = <&vin4csi40>;
2721 }; 2690 };
2722 csi40 2691 csi40vin5: endpoint@5 {
2723 2692 reg = <5>;
2724 2693 remote-endpoint = <&vin5csi40>;
2725 }; 2694 };
2726 csi40 2695 csi40vin6: endpoint@6 {
2727 2696 reg = <6>;
2728 2697 remote-endpoint = <&vin6csi40>;
2729 }; 2698 };
2730 csi40 2699 csi40vin7: endpoint@7 {
2731 2700 reg = <7>;
2732 2701 remote-endpoint = <&vin7csi40>;
2733 }; 2702 };
2734 }; 2703 };
2735 }; 2704 };
2736 }; 2705 };
2737 2706
2738 hdmi0: hdmi@fead0000 { 2707 hdmi0: hdmi@fead0000 {
2739 compatible = "renesas 2708 compatible = "renesas,r8a77965-hdmi",
2740 "renesas 2709 "renesas,rcar-gen3-hdmi";
2741 reg = <0 0xfead0000 0 2710 reg = <0 0xfead0000 0 0x10000>;
2742 interrupts = <GIC_SPI 2711 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2743 clocks = <&cpg CPG_MO 2712 clocks = <&cpg CPG_MOD 729>,
2744 <&cpg CPG_CO 2713 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2745 clock-names = "iahb", 2714 clock-names = "iahb", "isfr";
2746 power-domains = <&sys 2715 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2747 resets = <&cpg 729>; 2716 resets = <&cpg 729>;
2748 status = "disabled"; 2717 status = "disabled";
2749 2718
2750 ports { 2719 ports {
2751 #address-cell 2720 #address-cells = <1>;
2752 #size-cells = 2721 #size-cells = <0>;
2753 port@0 { 2722 port@0 {
2754 reg = 2723 reg = <0>;
2755 dw_hd 2724 dw_hdmi0_in: endpoint {
2756 2725 remote-endpoint = <&du_out_hdmi0>;
2757 }; 2726 };
2758 }; 2727 };
2759 port@1 { 2728 port@1 {
2760 reg = 2729 reg = <1>;
2761 }; 2730 };
2762 }; 2731 };
2763 }; 2732 };
2764 2733
2765 du: display@feb00000 { 2734 du: display@feb00000 {
2766 compatible = "renesas 2735 compatible = "renesas,du-r8a77965";
2767 reg = <0 0xfeb00000 0 2736 reg = <0 0xfeb00000 0 0x80000>;
2768 interrupts = <GIC_SPI 2737 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2769 <GIC_SPI 2738 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2770 <GIC_SPI 2739 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2771 clocks = <&cpg CPG_MO 2740 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2772 <&cpg CPG_MO 2741 <&cpg CPG_MOD 721>;
2773 clock-names = "du.0", 2742 clock-names = "du.0", "du.1", "du.3";
2774 resets = <&cpg 724>, 2743 resets = <&cpg 724>, <&cpg 722>;
2775 reset-names = "du.0", 2744 reset-names = "du.0", "du.3";
2776 2745
2777 renesas,cmms = <&cmm0 2746 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
2778 renesas,vsps = <&vspd 2747 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2779 2748
2780 status = "disabled"; 2749 status = "disabled";
2781 2750
2782 ports { 2751 ports {
2783 #address-cell 2752 #address-cells = <1>;
2784 #size-cells = 2753 #size-cells = <0>;
2785 2754
2786 port@0 { 2755 port@0 {
2787 reg = 2756 reg = <0>;
2788 }; 2757 };
2789 port@1 { 2758 port@1 {
2790 reg = 2759 reg = <1>;
2791 du_ou 2760 du_out_hdmi0: endpoint {
2792 2761 remote-endpoint = <&dw_hdmi0_in>;
2793 }; 2762 };
2794 }; 2763 };
2795 port@2 { 2764 port@2 {
2796 reg = 2765 reg = <2>;
2797 du_ou 2766 du_out_lvds0: endpoint {
2798 2767 remote-endpoint = <&lvds0_in>;
2799 }; 2768 };
2800 }; 2769 };
2801 }; 2770 };
2802 }; 2771 };
2803 2772
2804 lvds0: lvds@feb90000 { 2773 lvds0: lvds@feb90000 {
2805 compatible = "renesas 2774 compatible = "renesas,r8a77965-lvds";
2806 reg = <0 0xfeb90000 0 2775 reg = <0 0xfeb90000 0 0x14>;
2807 clocks = <&cpg CPG_MO 2776 clocks = <&cpg CPG_MOD 727>;
2808 power-domains = <&sys 2777 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2809 resets = <&cpg 727>; 2778 resets = <&cpg 727>;
2810 status = "disabled"; 2779 status = "disabled";
2811 2780
2812 ports { 2781 ports {
2813 #address-cell 2782 #address-cells = <1>;
2814 #size-cells = 2783 #size-cells = <0>;
2815 2784
2816 port@0 { 2785 port@0 {
2817 reg = 2786 reg = <0>;
2818 lvds0 2787 lvds0_in: endpoint {
2819 2788 remote-endpoint = <&du_out_lvds0>;
2820 }; 2789 };
2821 }; 2790 };
2822 port@1 { 2791 port@1 {
2823 reg = 2792 reg = <1>;
2824 }; 2793 };
2825 }; 2794 };
2826 }; 2795 };
2827 2796
2828 prr: chipid@fff00044 { 2797 prr: chipid@fff00044 {
2829 compatible = "renesas 2798 compatible = "renesas,prr";
2830 reg = <0 0xfff00044 0 2799 reg = <0 0xfff00044 0 4>;
2831 }; 2800 };
2832 }; 2801 };
2833 2802
2834 thermal-zones { 2803 thermal-zones {
2835 sensor1_thermal: sensor1-ther 2804 sensor1_thermal: sensor1-thermal {
2836 polling-delay-passive 2805 polling-delay-passive = <250>;
2837 polling-delay = <1000 2806 polling-delay = <1000>;
2838 thermal-sensors = <&t 2807 thermal-sensors = <&tsc 0>;
2839 sustainable-power = < 2808 sustainable-power = <2439>;
2840 2809
2841 trips { 2810 trips {
2842 sensor1_crit: 2811 sensor1_crit: sensor1-crit {
2843 tempe 2812 temperature = <120000>;
2844 hyste 2813 hysteresis = <1000>;
2845 type 2814 type = "critical";
2846 }; 2815 };
2847 }; 2816 };
2848 }; 2817 };
2849 2818
2850 sensor2_thermal: sensor2-ther 2819 sensor2_thermal: sensor2-thermal {
2851 polling-delay-passive 2820 polling-delay-passive = <250>;
2852 polling-delay = <1000 2821 polling-delay = <1000>;
2853 thermal-sensors = <&t 2822 thermal-sensors = <&tsc 1>;
2854 sustainable-power = < 2823 sustainable-power = <2439>;
2855 2824
2856 trips { 2825 trips {
2857 sensor2_crit: 2826 sensor2_crit: sensor2-crit {
2858 tempe 2827 temperature = <120000>;
2859 hyste 2828 hysteresis = <1000>;
2860 type 2829 type = "critical";
2861 }; 2830 };
2862 }; 2831 };
2863 }; 2832 };
2864 2833
2865 sensor3_thermal: sensor3-ther 2834 sensor3_thermal: sensor3-thermal {
2866 polling-delay-passive 2835 polling-delay-passive = <250>;
2867 polling-delay = <1000 2836 polling-delay = <1000>;
2868 thermal-sensors = <&t 2837 thermal-sensors = <&tsc 2>;
2869 sustainable-power = < 2838 sustainable-power = <2439>;
2870 2839
2871 trips { 2840 trips {
2872 target: trip- 2841 target: trip-point1 {
2873 /* mi 2842 /* miliCelsius */
2874 tempe 2843 temperature = <100000>;
2875 hyste 2844 hysteresis = <1000>;
2876 type 2845 type = "passive";
2877 }; 2846 };
2878 2847
2879 sensor3_crit: 2848 sensor3_crit: sensor3-crit {
2880 tempe 2849 temperature = <120000>;
2881 hyste 2850 hysteresis = <1000>;
2882 type 2851 type = "critical";
2883 }; 2852 };
2884 }; 2853 };
2885 2854
2886 cooling-maps { 2855 cooling-maps {
2887 map0 { 2856 map0 {
2888 trip 2857 trip = <&target>;
2889 cooli 2858 cooling-device = <&a57_0 2 4>;
2890 contr 2859 contribution = <1024>;
2891 }; 2860 };
2892 }; 2861 };
2893 }; 2862 };
2894 }; 2863 };
2895 2864
2896 timer { 2865 timer {
2897 compatible = "arm,armv8-timer 2866 compatible = "arm,armv8-timer";
2898 interrupts-extended = <&gic G 2867 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2899 <&gic G 2868 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2900 <&gic G 2869 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2901 <&gic G 2870 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2902 interrupt-names = "sec-phys", <<
2903 }; 2871 };
2904 2872
2905 /* External USB clocks - can be overr 2873 /* External USB clocks - can be overridden by the board */
2906 usb3s0_clk: usb3s0 { 2874 usb3s0_clk: usb3s0 {
2907 compatible = "fixed-clock"; 2875 compatible = "fixed-clock";
2908 #clock-cells = <0>; 2876 #clock-cells = <0>;
2909 clock-frequency = <0>; 2877 clock-frequency = <0>;
2910 }; 2878 };
2911 2879
2912 usb_extal_clk: usb_extal { 2880 usb_extal_clk: usb_extal {
2913 compatible = "fixed-clock"; 2881 compatible = "fixed-clock";
2914 #clock-cells = <0>; 2882 #clock-cells = <0>;
2915 clock-frequency = <0>; 2883 clock-frequency = <0>;
2916 }; 2884 };
2917 }; 2885 };
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