1 // SPDX-License-Identifier: GPL-2.0 !! 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* 2 /*
3 * Device Tree Source for the R-Car E3 (R8A779 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 * 4 *
5 * Copyright (C) 2018-2019 Renesas Electronics 5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */ 6 */
7 7
8 #include <dt-bindings/clock/r8a77990-cpg-mssr. 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h> 10 #include <dt-bindings/power/r8a77990-sysc.h>
11 11
12 / { 12 / {
13 compatible = "renesas,r8a77990"; 13 compatible = "renesas,r8a77990";
14 #address-cells = <2>; 14 #address-cells = <2>;
15 #size-cells = <2>; 15 #size-cells = <2>;
16 16
>> 17 aliases {
>> 18 i2c0 = &i2c0;
>> 19 i2c1 = &i2c1;
>> 20 i2c2 = &i2c2;
>> 21 i2c3 = &i2c3;
>> 22 i2c4 = &i2c4;
>> 23 i2c5 = &i2c5;
>> 24 i2c6 = &i2c6;
>> 25 i2c7 = &i2c7;
>> 26 };
>> 27
17 /* 28 /*
18 * The external audio clocks are confi 29 * The external audio clocks are configured as 0 Hz fixed frequency
19 * clocks by default. 30 * clocks by default.
20 * Boards that provide audio clocks sh 31 * Boards that provide audio clocks should override them.
21 */ 32 */
22 audio_clk_a: audio_clk_a { 33 audio_clk_a: audio_clk_a {
23 compatible = "fixed-clock"; 34 compatible = "fixed-clock";
24 #clock-cells = <0>; 35 #clock-cells = <0>;
25 clock-frequency = <0>; 36 clock-frequency = <0>;
26 }; 37 };
27 38
28 audio_clk_b: audio_clk_b { 39 audio_clk_b: audio_clk_b {
29 compatible = "fixed-clock"; 40 compatible = "fixed-clock";
30 #clock-cells = <0>; 41 #clock-cells = <0>;
31 clock-frequency = <0>; 42 clock-frequency = <0>;
32 }; 43 };
33 44
34 audio_clk_c: audio_clk_c { 45 audio_clk_c: audio_clk_c {
35 compatible = "fixed-clock"; 46 compatible = "fixed-clock";
36 #clock-cells = <0>; 47 #clock-cells = <0>;
37 clock-frequency = <0>; 48 clock-frequency = <0>;
38 }; 49 };
39 50
40 /* External CAN clock - to be overridd 51 /* External CAN clock - to be overridden by boards that provide it */
41 can_clk: can { 52 can_clk: can {
42 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
43 #clock-cells = <0>; 54 #clock-cells = <0>;
44 clock-frequency = <0>; 55 clock-frequency = <0>;
45 }; 56 };
46 57
47 cluster1_opp: opp-table-1 { !! 58 cluster1_opp: opp_table10 {
48 compatible = "operating-points 59 compatible = "operating-points-v2";
49 opp-shared; 60 opp-shared;
50 opp-800000000 { 61 opp-800000000 {
51 opp-hz = /bits/ 64 <80 62 opp-hz = /bits/ 64 <800000000>;
>> 63 opp-microvolt = <820000>;
52 clock-latency-ns = <30 64 clock-latency-ns = <300000>;
53 }; 65 };
54 opp-1000000000 { 66 opp-1000000000 {
55 opp-hz = /bits/ 64 <10 67 opp-hz = /bits/ 64 <1000000000>;
>> 68 opp-microvolt = <820000>;
56 clock-latency-ns = <30 69 clock-latency-ns = <300000>;
57 }; 70 };
58 opp-1200000000 { 71 opp-1200000000 {
59 opp-hz = /bits/ 64 <12 72 opp-hz = /bits/ 64 <1200000000>;
>> 73 opp-microvolt = <820000>;
60 clock-latency-ns = <30 74 clock-latency-ns = <300000>;
61 opp-suspend; 75 opp-suspend;
62 }; 76 };
63 }; 77 };
64 78
65 cpus { 79 cpus {
66 #address-cells = <1>; 80 #address-cells = <1>;
67 #size-cells = <0>; 81 #size-cells = <0>;
68 82
69 a53_0: cpu@0 { 83 a53_0: cpu@0 {
70 compatible = "arm,cort 84 compatible = "arm,cortex-a53";
71 reg = <0>; 85 reg = <0>;
72 device_type = "cpu"; 86 device_type = "cpu";
73 #cooling-cells = <2>; <<
74 power-domains = <&sysc 87 power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
75 next-level-cache = <&L 88 next-level-cache = <&L2_CA53>;
76 enable-method = "psci" 89 enable-method = "psci";
77 cpu-idle-states = <&CP !! 90 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
78 dynamic-power-coeffici <<
79 clocks = <&cpg CPG_COR <<
80 operating-points-v2 = 91 operating-points-v2 = <&cluster1_opp>;
81 }; 92 };
82 93
83 a53_1: cpu@1 { 94 a53_1: cpu@1 {
84 compatible = "arm,cort 95 compatible = "arm,cortex-a53";
85 reg = <1>; 96 reg = <1>;
86 device_type = "cpu"; 97 device_type = "cpu";
87 power-domains = <&sysc 98 power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
88 next-level-cache = <&L 99 next-level-cache = <&L2_CA53>;
89 enable-method = "psci" 100 enable-method = "psci";
90 cpu-idle-states = <&CP !! 101 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
91 clocks = <&cpg CPG_COR <<
92 operating-points-v2 = 102 operating-points-v2 = <&cluster1_opp>;
93 }; 103 };
94 104
95 L2_CA53: cache-controller-0 { 105 L2_CA53: cache-controller-0 {
96 compatible = "cache"; 106 compatible = "cache";
97 power-domains = <&sysc 107 power-domains = <&sysc R8A77990_PD_CA53_SCU>;
98 cache-unified; 108 cache-unified;
99 cache-level = <2>; 109 cache-level = <2>;
100 }; 110 };
101 <<
102 idle-states { <<
103 entry-method = "psci"; <<
104 <<
105 CPU_SLEEP_0: cpu-sleep <<
106 compatible = " <<
107 arm,psci-suspe <<
108 local-timer-st <<
109 entry-latency- <<
110 exit-latency-u <<
111 min-residency- <<
112 }; <<
113 }; <<
114 }; 111 };
115 112
116 extal_clk: extal { 113 extal_clk: extal {
117 compatible = "fixed-clock"; 114 compatible = "fixed-clock";
118 #clock-cells = <0>; 115 #clock-cells = <0>;
119 /* This value must be overridd 116 /* This value must be overridden by the board */
120 clock-frequency = <0>; 117 clock-frequency = <0>;
121 }; 118 };
122 119
123 /* External PCIe clock - can be overri 120 /* External PCIe clock - can be overridden by the board */
124 pcie_bus_clk: pcie_bus { 121 pcie_bus_clk: pcie_bus {
125 compatible = "fixed-clock"; 122 compatible = "fixed-clock";
126 #clock-cells = <0>; 123 #clock-cells = <0>;
127 clock-frequency = <0>; 124 clock-frequency = <0>;
128 }; 125 };
129 126
130 pmu_a53 { 127 pmu_a53 {
131 compatible = "arm,cortex-a53-p 128 compatible = "arm,cortex-a53-pmu";
132 interrupts-extended = <&gic GI 129 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
133 <&gic GI 130 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-affinity = <&a53_0>, 131 interrupt-affinity = <&a53_0>, <&a53_1>;
135 }; 132 };
136 133
137 psci { 134 psci {
138 compatible = "arm,psci-1.0", " 135 compatible = "arm,psci-1.0", "arm,psci-0.2";
139 method = "smc"; 136 method = "smc";
140 }; 137 };
141 138
142 /* External SCIF clock - to be overrid 139 /* External SCIF clock - to be overridden by boards that provide it */
143 scif_clk: scif { 140 scif_clk: scif {
144 compatible = "fixed-clock"; 141 compatible = "fixed-clock";
145 #clock-cells = <0>; 142 #clock-cells = <0>;
146 clock-frequency = <0>; 143 clock-frequency = <0>;
147 }; 144 };
148 145
149 soc: soc { 146 soc: soc {
150 compatible = "simple-bus"; 147 compatible = "simple-bus";
151 interrupt-parent = <&gic>; 148 interrupt-parent = <&gic>;
152 #address-cells = <2>; 149 #address-cells = <2>;
153 #size-cells = <2>; 150 #size-cells = <2>;
154 ranges; 151 ranges;
155 152
156 rwdt: watchdog@e6020000 { 153 rwdt: watchdog@e6020000 {
157 compatible = "renesas, 154 compatible = "renesas,r8a77990-wdt",
158 "renesas, 155 "renesas,rcar-gen3-wdt";
159 reg = <0 0xe6020000 0 156 reg = <0 0xe6020000 0 0x0c>;
160 interrupts = <GIC_SPI <<
161 clocks = <&cpg CPG_MOD 157 clocks = <&cpg CPG_MOD 402>;
162 power-domains = <&sysc 158 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
163 resets = <&cpg 402>; 159 resets = <&cpg 402>;
164 status = "disabled"; 160 status = "disabled";
165 }; 161 };
166 162
167 gpio0: gpio@e6050000 { 163 gpio0: gpio@e6050000 {
168 compatible = "renesas, 164 compatible = "renesas,gpio-r8a77990",
169 "renesas, 165 "renesas,rcar-gen3-gpio";
170 reg = <0 0xe6050000 0 166 reg = <0 0xe6050000 0 0x50>;
171 interrupts = <GIC_SPI 167 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
172 #gpio-cells = <2>; 168 #gpio-cells = <2>;
173 gpio-controller; 169 gpio-controller;
174 gpio-ranges = <&pfc 0 170 gpio-ranges = <&pfc 0 0 18>;
175 #interrupt-cells = <2> 171 #interrupt-cells = <2>;
176 interrupt-controller; 172 interrupt-controller;
177 clocks = <&cpg CPG_MOD 173 clocks = <&cpg CPG_MOD 912>;
178 power-domains = <&sysc 174 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
179 resets = <&cpg 912>; 175 resets = <&cpg 912>;
180 }; 176 };
181 177
182 gpio1: gpio@e6051000 { 178 gpio1: gpio@e6051000 {
183 compatible = "renesas, 179 compatible = "renesas,gpio-r8a77990",
184 "renesas, 180 "renesas,rcar-gen3-gpio";
185 reg = <0 0xe6051000 0 181 reg = <0 0xe6051000 0 0x50>;
186 interrupts = <GIC_SPI 182 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
187 #gpio-cells = <2>; 183 #gpio-cells = <2>;
188 gpio-controller; 184 gpio-controller;
189 gpio-ranges = <&pfc 0 185 gpio-ranges = <&pfc 0 32 23>;
190 #interrupt-cells = <2> 186 #interrupt-cells = <2>;
191 interrupt-controller; 187 interrupt-controller;
192 clocks = <&cpg CPG_MOD 188 clocks = <&cpg CPG_MOD 911>;
193 power-domains = <&sysc 189 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
194 resets = <&cpg 911>; 190 resets = <&cpg 911>;
195 }; 191 };
196 192
197 gpio2: gpio@e6052000 { 193 gpio2: gpio@e6052000 {
198 compatible = "renesas, 194 compatible = "renesas,gpio-r8a77990",
199 "renesas, 195 "renesas,rcar-gen3-gpio";
200 reg = <0 0xe6052000 0 196 reg = <0 0xe6052000 0 0x50>;
201 interrupts = <GIC_SPI 197 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
202 #gpio-cells = <2>; 198 #gpio-cells = <2>;
203 gpio-controller; 199 gpio-controller;
204 gpio-ranges = <&pfc 0 200 gpio-ranges = <&pfc 0 64 26>;
205 #interrupt-cells = <2> 201 #interrupt-cells = <2>;
206 interrupt-controller; 202 interrupt-controller;
207 clocks = <&cpg CPG_MOD 203 clocks = <&cpg CPG_MOD 910>;
208 power-domains = <&sysc 204 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
209 resets = <&cpg 910>; 205 resets = <&cpg 910>;
210 }; 206 };
211 207
212 gpio3: gpio@e6053000 { 208 gpio3: gpio@e6053000 {
213 compatible = "renesas, 209 compatible = "renesas,gpio-r8a77990",
214 "renesas, 210 "renesas,rcar-gen3-gpio";
215 reg = <0 0xe6053000 0 211 reg = <0 0xe6053000 0 0x50>;
216 interrupts = <GIC_SPI 212 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
217 #gpio-cells = <2>; 213 #gpio-cells = <2>;
218 gpio-controller; 214 gpio-controller;
219 gpio-ranges = <&pfc 0 215 gpio-ranges = <&pfc 0 96 16>;
220 #interrupt-cells = <2> 216 #interrupt-cells = <2>;
221 interrupt-controller; 217 interrupt-controller;
222 clocks = <&cpg CPG_MOD 218 clocks = <&cpg CPG_MOD 909>;
223 power-domains = <&sysc 219 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
224 resets = <&cpg 909>; 220 resets = <&cpg 909>;
225 }; 221 };
226 222
227 gpio4: gpio@e6054000 { 223 gpio4: gpio@e6054000 {
228 compatible = "renesas, 224 compatible = "renesas,gpio-r8a77990",
229 "renesas, 225 "renesas,rcar-gen3-gpio";
230 reg = <0 0xe6054000 0 226 reg = <0 0xe6054000 0 0x50>;
231 interrupts = <GIC_SPI 227 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
232 #gpio-cells = <2>; 228 #gpio-cells = <2>;
233 gpio-controller; 229 gpio-controller;
234 gpio-ranges = <&pfc 0 230 gpio-ranges = <&pfc 0 128 11>;
235 #interrupt-cells = <2> 231 #interrupt-cells = <2>;
236 interrupt-controller; 232 interrupt-controller;
237 clocks = <&cpg CPG_MOD 233 clocks = <&cpg CPG_MOD 908>;
238 power-domains = <&sysc 234 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
239 resets = <&cpg 908>; 235 resets = <&cpg 908>;
240 }; 236 };
241 237
242 gpio5: gpio@e6055000 { 238 gpio5: gpio@e6055000 {
243 compatible = "renesas, 239 compatible = "renesas,gpio-r8a77990",
244 "renesas, 240 "renesas,rcar-gen3-gpio";
245 reg = <0 0xe6055000 0 241 reg = <0 0xe6055000 0 0x50>;
246 interrupts = <GIC_SPI 242 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
247 #gpio-cells = <2>; 243 #gpio-cells = <2>;
248 gpio-controller; 244 gpio-controller;
249 gpio-ranges = <&pfc 0 245 gpio-ranges = <&pfc 0 160 20>;
250 #interrupt-cells = <2> 246 #interrupt-cells = <2>;
251 interrupt-controller; 247 interrupt-controller;
252 clocks = <&cpg CPG_MOD 248 clocks = <&cpg CPG_MOD 907>;
253 power-domains = <&sysc 249 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
254 resets = <&cpg 907>; 250 resets = <&cpg 907>;
255 }; 251 };
256 252
257 gpio6: gpio@e6055400 { 253 gpio6: gpio@e6055400 {
258 compatible = "renesas, 254 compatible = "renesas,gpio-r8a77990",
259 "renesas, 255 "renesas,rcar-gen3-gpio";
260 reg = <0 0xe6055400 0 256 reg = <0 0xe6055400 0 0x50>;
261 interrupts = <GIC_SPI 257 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
262 #gpio-cells = <2>; 258 #gpio-cells = <2>;
263 gpio-controller; 259 gpio-controller;
264 gpio-ranges = <&pfc 0 260 gpio-ranges = <&pfc 0 192 18>;
265 #interrupt-cells = <2> 261 #interrupt-cells = <2>;
266 interrupt-controller; 262 interrupt-controller;
267 clocks = <&cpg CPG_MOD 263 clocks = <&cpg CPG_MOD 906>;
268 power-domains = <&sysc 264 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
269 resets = <&cpg 906>; 265 resets = <&cpg 906>;
270 }; 266 };
271 267
272 pfc: pinctrl@e6060000 { !! 268 pfc: pin-controller@e6060000 {
273 compatible = "renesas, 269 compatible = "renesas,pfc-r8a77990";
274 reg = <0 0xe6060000 0 270 reg = <0 0xe6060000 0 0x508>;
275 }; 271 };
276 272
277 i2c_dvfs: i2c@e60b0000 { 273 i2c_dvfs: i2c@e60b0000 {
278 #address-cells = <1>; 274 #address-cells = <1>;
279 #size-cells = <0>; 275 #size-cells = <0>;
280 compatible = "renesas, !! 276 compatible = "renesas,iic-r8a77990";
281 "renesas, !! 277 reg = <0 0xe60b0000 0 0x15>;
282 "renesas, <<
283 reg = <0 0xe60b0000 0 <<
284 interrupts = <GIC_SPI 278 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&cpg CPG_MOD 279 clocks = <&cpg CPG_MOD 926>;
286 power-domains = <&sysc 280 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
287 resets = <&cpg 926>; 281 resets = <&cpg 926>;
288 dmas = <&dmac0 0x11>, 282 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
289 dma-names = "tx", "rx" 283 dma-names = "tx", "rx";
290 status = "disabled"; 284 status = "disabled";
291 }; 285 };
292 286
293 cmt0: timer@e60f0000 { <<
294 compatible = "renesas, <<
295 "renesas, <<
296 reg = <0 0xe60f0000 0 <<
297 interrupts = <GIC_SPI <<
298 <GIC_SPI <<
299 clocks = <&cpg CPG_MOD <<
300 clock-names = "fck"; <<
301 power-domains = <&sysc <<
302 resets = <&cpg 303>; <<
303 status = "disabled"; <<
304 }; <<
305 <<
306 cmt1: timer@e6130000 { <<
307 compatible = "renesas, <<
308 "renesas, <<
309 reg = <0 0xe6130000 0 <<
310 interrupts = <GIC_SPI <<
311 <GIC_SPI <<
312 <GIC_SPI <<
313 <GIC_SPI <<
314 <GIC_SPI <<
315 <GIC_SPI <<
316 <GIC_SPI <<
317 <GIC_SPI <<
318 clocks = <&cpg CPG_MOD <<
319 clock-names = "fck"; <<
320 power-domains = <&sysc <<
321 resets = <&cpg 302>; <<
322 status = "disabled"; <<
323 }; <<
324 <<
325 cmt2: timer@e6140000 { <<
326 compatible = "renesas, <<
327 "renesas, <<
328 reg = <0 0xe6140000 0 <<
329 interrupts = <GIC_SPI <<
330 <GIC_SPI <<
331 <GIC_SPI <<
332 <GIC_SPI <<
333 <GIC_SPI <<
334 <GIC_SPI <<
335 <GIC_SPI <<
336 <GIC_SPI <<
337 clocks = <&cpg CPG_MOD <<
338 clock-names = "fck"; <<
339 power-domains = <&sysc <<
340 resets = <&cpg 301>; <<
341 status = "disabled"; <<
342 }; <<
343 <<
344 cmt3: timer@e6148000 { <<
345 compatible = "renesas, <<
346 "renesas, <<
347 reg = <0 0xe6148000 0 <<
348 interrupts = <GIC_SPI <<
349 <GIC_SPI <<
350 <GIC_SPI <<
351 <GIC_SPI <<
352 <GIC_SPI <<
353 <GIC_SPI <<
354 <GIC_SPI <<
355 <GIC_SPI <<
356 clocks = <&cpg CPG_MOD <<
357 clock-names = "fck"; <<
358 power-domains = <&sysc <<
359 resets = <&cpg 300>; <<
360 status = "disabled"; <<
361 }; <<
362 <<
363 cpg: clock-controller@e6150000 287 cpg: clock-controller@e6150000 {
364 compatible = "renesas, 288 compatible = "renesas,r8a77990-cpg-mssr";
365 reg = <0 0xe6150000 0 289 reg = <0 0xe6150000 0 0x1000>;
366 clocks = <&extal_clk>; 290 clocks = <&extal_clk>;
367 clock-names = "extal"; 291 clock-names = "extal";
368 #clock-cells = <2>; 292 #clock-cells = <2>;
369 #power-domain-cells = 293 #power-domain-cells = <0>;
370 #reset-cells = <1>; 294 #reset-cells = <1>;
371 }; 295 };
372 296
373 rst: reset-controller@e6160000 297 rst: reset-controller@e6160000 {
374 compatible = "renesas, 298 compatible = "renesas,r8a77990-rst";
375 reg = <0 0xe6160000 0 299 reg = <0 0xe6160000 0 0x0200>;
376 }; 300 };
377 301
378 sysc: system-controller@e61800 302 sysc: system-controller@e6180000 {
379 compatible = "renesas, 303 compatible = "renesas,r8a77990-sysc";
380 reg = <0 0xe6180000 0 304 reg = <0 0xe6180000 0 0x0400>;
381 #power-domain-cells = 305 #power-domain-cells = <1>;
382 }; 306 };
383 307
384 thermal: thermal@e6190000 { 308 thermal: thermal@e6190000 {
385 compatible = "renesas, 309 compatible = "renesas,thermal-r8a77990";
386 reg = <0 0xe6190000 0 310 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
387 interrupts = <GIC_SPI 311 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
388 <GIC_SPI 312 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
389 <GIC_SPI 313 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
390 clocks = <&cpg CPG_MOD 314 clocks = <&cpg CPG_MOD 522>;
391 power-domains = <&sysc 315 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
392 resets = <&cpg 522>; 316 resets = <&cpg 522>;
393 #thermal-sensor-cells 317 #thermal-sensor-cells = <0>;
394 }; 318 };
395 319
396 intc_ex: interrupt-controller@ 320 intc_ex: interrupt-controller@e61c0000 {
397 compatible = "renesas, 321 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
398 #interrupt-cells = <2> 322 #interrupt-cells = <2>;
399 interrupt-controller; 323 interrupt-controller;
400 reg = <0 0xe61c0000 0 324 reg = <0 0xe61c0000 0 0x200>;
401 interrupts = <GIC_SPI !! 325 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
402 <GIC_SPI !! 326 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
403 <GIC_SPI !! 327 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
404 <GIC_SPI !! 328 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
405 <GIC_SPI !! 329 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
406 <GIC_SPI !! 330 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 331 clocks = <&cpg CPG_MOD 407>;
408 power-domains = <&sysc 332 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
409 resets = <&cpg 407>; 333 resets = <&cpg 407>;
410 }; 334 };
411 335
412 tmu0: timer@e61e0000 { <<
413 compatible = "renesas, <<
414 reg = <0 0xe61e0000 0 <<
415 interrupts = <GIC_SPI <<
416 <GIC_SPI <<
417 <GIC_SPI <<
418 interrupt-names = "tun <<
419 clocks = <&cpg CPG_MOD <<
420 clock-names = "fck"; <<
421 power-domains = <&sysc <<
422 resets = <&cpg 125>; <<
423 status = "disabled"; <<
424 }; <<
425 <<
426 tmu1: timer@e6fc0000 { <<
427 compatible = "renesas, <<
428 reg = <0 0xe6fc0000 0 <<
429 interrupts = <GIC_SPI <<
430 <GIC_SPI <<
431 <GIC_SPI <<
432 <GIC_SPI <<
433 interrupt-names = "tun <<
434 clocks = <&cpg CPG_MOD <<
435 clock-names = "fck"; <<
436 power-domains = <&sysc <<
437 resets = <&cpg 124>; <<
438 status = "disabled"; <<
439 }; <<
440 <<
441 tmu2: timer@e6fd0000 { <<
442 compatible = "renesas, <<
443 reg = <0 0xe6fd0000 0 <<
444 interrupts = <GIC_SPI <<
445 <GIC_SPI <<
446 <GIC_SPI <<
447 <GIC_SPI <<
448 interrupt-names = "tun <<
449 clocks = <&cpg CPG_MOD <<
450 clock-names = "fck"; <<
451 power-domains = <&sysc <<
452 resets = <&cpg 123>; <<
453 status = "disabled"; <<
454 }; <<
455 <<
456 tmu3: timer@e6fe0000 { <<
457 compatible = "renesas, <<
458 reg = <0 0xe6fe0000 0 <<
459 interrupts = <GIC_SPI <<
460 <GIC_SPI <<
461 <GIC_SPI <<
462 interrupt-names = "tun <<
463 clocks = <&cpg CPG_MOD <<
464 clock-names = "fck"; <<
465 power-domains = <&sysc <<
466 resets = <&cpg 122>; <<
467 status = "disabled"; <<
468 }; <<
469 <<
470 tmu4: timer@ffc00000 { <<
471 compatible = "renesas, <<
472 reg = <0 0xffc00000 0 <<
473 interrupts = <GIC_SPI <<
474 <GIC_SPI <<
475 <GIC_SPI <<
476 interrupt-names = "tun <<
477 clocks = <&cpg CPG_MOD <<
478 clock-names = "fck"; <<
479 power-domains = <&sysc <<
480 resets = <&cpg 121>; <<
481 status = "disabled"; <<
482 }; <<
483 <<
484 i2c0: i2c@e6500000 { 336 i2c0: i2c@e6500000 {
485 #address-cells = <1>; 337 #address-cells = <1>;
486 #size-cells = <0>; 338 #size-cells = <0>;
487 compatible = "renesas, 339 compatible = "renesas,i2c-r8a77990",
488 "renesas, 340 "renesas,rcar-gen3-i2c";
489 reg = <0 0xe6500000 0 341 reg = <0 0xe6500000 0 0x40>;
490 interrupts = <GIC_SPI 342 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&cpg CPG_MOD 343 clocks = <&cpg CPG_MOD 931>;
492 power-domains = <&sysc 344 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
493 resets = <&cpg 931>; 345 resets = <&cpg 931>;
494 dmas = <&dmac1 0x91>, 346 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
495 <&dmac2 0x91>, 347 <&dmac2 0x91>, <&dmac2 0x90>;
496 dma-names = "tx", "rx" 348 dma-names = "tx", "rx", "tx", "rx";
497 i2c-scl-internal-delay 349 i2c-scl-internal-delay-ns = <110>;
498 status = "disabled"; 350 status = "disabled";
499 }; 351 };
500 352
501 i2c1: i2c@e6508000 { 353 i2c1: i2c@e6508000 {
502 #address-cells = <1>; 354 #address-cells = <1>;
503 #size-cells = <0>; 355 #size-cells = <0>;
504 compatible = "renesas, 356 compatible = "renesas,i2c-r8a77990",
505 "renesas, 357 "renesas,rcar-gen3-i2c";
506 reg = <0 0xe6508000 0 358 reg = <0 0xe6508000 0 0x40>;
507 interrupts = <GIC_SPI 359 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 360 clocks = <&cpg CPG_MOD 930>;
509 power-domains = <&sysc 361 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
510 resets = <&cpg 930>; 362 resets = <&cpg 930>;
511 dmas = <&dmac1 0x93>, 363 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
512 <&dmac2 0x93>, 364 <&dmac2 0x93>, <&dmac2 0x92>;
513 dma-names = "tx", "rx" 365 dma-names = "tx", "rx", "tx", "rx";
514 i2c-scl-internal-delay 366 i2c-scl-internal-delay-ns = <6>;
515 status = "disabled"; 367 status = "disabled";
516 }; 368 };
517 369
518 i2c2: i2c@e6510000 { 370 i2c2: i2c@e6510000 {
519 #address-cells = <1>; 371 #address-cells = <1>;
520 #size-cells = <0>; 372 #size-cells = <0>;
521 compatible = "renesas, 373 compatible = "renesas,i2c-r8a77990",
522 "renesas, 374 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6510000 0 375 reg = <0 0xe6510000 0 0x40>;
524 interrupts = <GIC_SPI 376 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 377 clocks = <&cpg CPG_MOD 929>;
526 power-domains = <&sysc 378 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
527 resets = <&cpg 929>; 379 resets = <&cpg 929>;
528 dmas = <&dmac1 0x95>, 380 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
529 <&dmac2 0x95>, 381 <&dmac2 0x95>, <&dmac2 0x94>;
530 dma-names = "tx", "rx" 382 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 383 i2c-scl-internal-delay-ns = <6>;
532 status = "disabled"; 384 status = "disabled";
533 }; 385 };
534 386
535 i2c3: i2c@e66d0000 { 387 i2c3: i2c@e66d0000 {
536 #address-cells = <1>; 388 #address-cells = <1>;
537 #size-cells = <0>; 389 #size-cells = <0>;
538 compatible = "renesas, 390 compatible = "renesas,i2c-r8a77990",
539 "renesas, 391 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe66d0000 0 392 reg = <0 0xe66d0000 0 0x40>;
541 interrupts = <GIC_SPI 393 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 394 clocks = <&cpg CPG_MOD 928>;
543 power-domains = <&sysc 395 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
544 resets = <&cpg 928>; 396 resets = <&cpg 928>;
545 dmas = <&dmac0 0x97>, 397 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
546 dma-names = "tx", "rx" 398 dma-names = "tx", "rx";
547 i2c-scl-internal-delay 399 i2c-scl-internal-delay-ns = <110>;
548 status = "disabled"; 400 status = "disabled";
549 }; 401 };
550 402
551 i2c4: i2c@e66d8000 { 403 i2c4: i2c@e66d8000 {
552 #address-cells = <1>; 404 #address-cells = <1>;
553 #size-cells = <0>; 405 #size-cells = <0>;
554 compatible = "renesas, 406 compatible = "renesas,i2c-r8a77990",
555 "renesas, 407 "renesas,rcar-gen3-i2c";
556 reg = <0 0xe66d8000 0 408 reg = <0 0xe66d8000 0 0x40>;
557 interrupts = <GIC_SPI 409 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 410 clocks = <&cpg CPG_MOD 927>;
559 power-domains = <&sysc 411 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
560 resets = <&cpg 927>; 412 resets = <&cpg 927>;
561 dmas = <&dmac0 0x99>, 413 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
562 dma-names = "tx", "rx" 414 dma-names = "tx", "rx";
563 i2c-scl-internal-delay 415 i2c-scl-internal-delay-ns = <6>;
564 status = "disabled"; 416 status = "disabled";
565 }; 417 };
566 418
567 i2c5: i2c@e66e0000 { 419 i2c5: i2c@e66e0000 {
568 #address-cells = <1>; 420 #address-cells = <1>;
569 #size-cells = <0>; 421 #size-cells = <0>;
570 compatible = "renesas, 422 compatible = "renesas,i2c-r8a77990",
571 "renesas, 423 "renesas,rcar-gen3-i2c";
572 reg = <0 0xe66e0000 0 424 reg = <0 0xe66e0000 0 0x40>;
573 interrupts = <GIC_SPI 425 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&cpg CPG_MOD 426 clocks = <&cpg CPG_MOD 919>;
575 power-domains = <&sysc 427 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
576 resets = <&cpg 919>; 428 resets = <&cpg 919>;
577 dmas = <&dmac0 0x9b>, 429 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
578 dma-names = "tx", "rx" 430 dma-names = "tx", "rx";
579 i2c-scl-internal-delay 431 i2c-scl-internal-delay-ns = <6>;
580 status = "disabled"; 432 status = "disabled";
581 }; 433 };
582 434
583 i2c6: i2c@e66e8000 { 435 i2c6: i2c@e66e8000 {
584 #address-cells = <1>; 436 #address-cells = <1>;
585 #size-cells = <0>; 437 #size-cells = <0>;
586 compatible = "renesas, 438 compatible = "renesas,i2c-r8a77990",
587 "renesas, 439 "renesas,rcar-gen3-i2c";
588 reg = <0 0xe66e8000 0 440 reg = <0 0xe66e8000 0 0x40>;
589 interrupts = <GIC_SPI 441 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&cpg CPG_MOD 442 clocks = <&cpg CPG_MOD 918>;
591 power-domains = <&sysc 443 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
592 resets = <&cpg 918>; 444 resets = <&cpg 918>;
593 dmas = <&dmac0 0x9d>, 445 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
594 dma-names = "tx", "rx" 446 dma-names = "tx", "rx";
595 i2c-scl-internal-delay 447 i2c-scl-internal-delay-ns = <6>;
596 status = "disabled"; 448 status = "disabled";
597 }; 449 };
598 450
599 i2c7: i2c@e6690000 { 451 i2c7: i2c@e6690000 {
600 #address-cells = <1>; 452 #address-cells = <1>;
601 #size-cells = <0>; 453 #size-cells = <0>;
602 compatible = "renesas, 454 compatible = "renesas,i2c-r8a77990",
603 "renesas, 455 "renesas,rcar-gen3-i2c";
604 reg = <0 0xe6690000 0 456 reg = <0 0xe6690000 0 0x40>;
605 interrupts = <GIC_SPI 457 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&cpg CPG_MOD 458 clocks = <&cpg CPG_MOD 1003>;
607 power-domains = <&sysc 459 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
608 resets = <&cpg 1003>; 460 resets = <&cpg 1003>;
609 i2c-scl-internal-delay 461 i2c-scl-internal-delay-ns = <6>;
610 status = "disabled"; 462 status = "disabled";
611 }; 463 };
612 464
613 hscif0: serial@e6540000 { 465 hscif0: serial@e6540000 {
614 compatible = "renesas, 466 compatible = "renesas,hscif-r8a77990",
615 "renesas, 467 "renesas,rcar-gen3-hscif",
616 "renesas, 468 "renesas,hscif";
617 reg = <0 0xe6540000 0 469 reg = <0 0xe6540000 0 0x60>;
618 interrupts = <GIC_SPI 470 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&cpg CPG_MOD 471 clocks = <&cpg CPG_MOD 520>,
620 <&cpg CPG_COR 472 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
621 <&scif_clk>; 473 <&scif_clk>;
622 clock-names = "fck", " 474 clock-names = "fck", "brg_int", "scif_clk";
623 dmas = <&dmac1 0x31>, 475 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
624 <&dmac2 0x31>, 476 <&dmac2 0x31>, <&dmac2 0x30>;
625 dma-names = "tx", "rx" 477 dma-names = "tx", "rx", "tx", "rx";
626 power-domains = <&sysc 478 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
627 resets = <&cpg 520>; 479 resets = <&cpg 520>;
628 status = "disabled"; 480 status = "disabled";
629 }; 481 };
630 482
631 hscif1: serial@e6550000 { 483 hscif1: serial@e6550000 {
632 compatible = "renesas, 484 compatible = "renesas,hscif-r8a77990",
633 "renesas, 485 "renesas,rcar-gen3-hscif",
634 "renesas, 486 "renesas,hscif";
635 reg = <0 0xe6550000 0 487 reg = <0 0xe6550000 0 0x60>;
636 interrupts = <GIC_SPI 488 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&cpg CPG_MOD 489 clocks = <&cpg CPG_MOD 519>,
638 <&cpg CPG_COR 490 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
639 <&scif_clk>; 491 <&scif_clk>;
640 clock-names = "fck", " 492 clock-names = "fck", "brg_int", "scif_clk";
641 dmas = <&dmac1 0x33>, 493 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
642 <&dmac2 0x33>, 494 <&dmac2 0x33>, <&dmac2 0x32>;
643 dma-names = "tx", "rx" 495 dma-names = "tx", "rx", "tx", "rx";
644 power-domains = <&sysc 496 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
645 resets = <&cpg 519>; 497 resets = <&cpg 519>;
646 status = "disabled"; 498 status = "disabled";
647 }; 499 };
648 500
649 hscif2: serial@e6560000 { 501 hscif2: serial@e6560000 {
650 compatible = "renesas, 502 compatible = "renesas,hscif-r8a77990",
651 "renesas, 503 "renesas,rcar-gen3-hscif",
652 "renesas, 504 "renesas,hscif";
653 reg = <0 0xe6560000 0 505 reg = <0 0xe6560000 0 0x60>;
654 interrupts = <GIC_SPI 506 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 507 clocks = <&cpg CPG_MOD 518>,
656 <&cpg CPG_COR 508 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
657 <&scif_clk>; 509 <&scif_clk>;
658 clock-names = "fck", " 510 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x35>, 511 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
660 <&dmac2 0x35>, 512 <&dmac2 0x35>, <&dmac2 0x34>;
661 dma-names = "tx", "rx" 513 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 514 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
663 resets = <&cpg 518>; 515 resets = <&cpg 518>;
664 status = "disabled"; 516 status = "disabled";
665 }; 517 };
666 518
667 hscif3: serial@e66a0000 { 519 hscif3: serial@e66a0000 {
668 compatible = "renesas, 520 compatible = "renesas,hscif-r8a77990",
669 "renesas, 521 "renesas,rcar-gen3-hscif",
670 "renesas, 522 "renesas,hscif";
671 reg = <0 0xe66a0000 0 523 reg = <0 0xe66a0000 0 0x60>;
672 interrupts = <GIC_SPI 524 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 525 clocks = <&cpg CPG_MOD 517>,
674 <&cpg CPG_COR 526 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
675 <&scif_clk>; 527 <&scif_clk>;
676 clock-names = "fck", " 528 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac0 0x37>, 529 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
678 dma-names = "tx", "rx" 530 dma-names = "tx", "rx";
679 power-domains = <&sysc 531 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
680 resets = <&cpg 517>; 532 resets = <&cpg 517>;
681 status = "disabled"; 533 status = "disabled";
682 }; 534 };
683 535
684 hscif4: serial@e66b0000 { 536 hscif4: serial@e66b0000 {
685 compatible = "renesas, 537 compatible = "renesas,hscif-r8a77990",
686 "renesas, 538 "renesas,rcar-gen3-hscif",
687 "renesas, 539 "renesas,hscif";
688 reg = <0 0xe66b0000 0 540 reg = <0 0xe66b0000 0 0x60>;
689 interrupts = <GIC_SPI 541 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&cpg CPG_MOD 542 clocks = <&cpg CPG_MOD 516>,
691 <&cpg CPG_COR 543 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
692 <&scif_clk>; 544 <&scif_clk>;
693 clock-names = "fck", " 545 clock-names = "fck", "brg_int", "scif_clk";
694 dmas = <&dmac0 0x39>, 546 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
695 dma-names = "tx", "rx" 547 dma-names = "tx", "rx";
696 power-domains = <&sysc 548 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
697 resets = <&cpg 516>; 549 resets = <&cpg 516>;
698 status = "disabled"; 550 status = "disabled";
699 }; 551 };
700 552
701 hsusb: usb@e6590000 { 553 hsusb: usb@e6590000 {
702 compatible = "renesas, 554 compatible = "renesas,usbhs-r8a77990",
703 "renesas, 555 "renesas,rcar-gen3-usbhs";
704 reg = <0 0xe6590000 0 556 reg = <0 0xe6590000 0 0x200>;
705 interrupts = <GIC_SPI 557 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
706 clocks = <&cpg CPG_MOD 558 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
707 dmas = <&usb_dmac0 0>, 559 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
708 <&usb_dmac1 0>, 560 <&usb_dmac1 0>, <&usb_dmac1 1>;
709 dma-names = "ch0", "ch 561 dma-names = "ch0", "ch1", "ch2", "ch3";
710 renesas,buswait = <11> 562 renesas,buswait = <11>;
711 phys = <&usb2_phy0 3>; !! 563 phys = <&usb2_phy0>;
712 phy-names = "usb"; 564 phy-names = "usb";
713 power-domains = <&sysc 565 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
714 resets = <&cpg 704>, < 566 resets = <&cpg 704>, <&cpg 703>;
715 status = "disabled"; 567 status = "disabled";
716 }; 568 };
717 569
718 usb_dmac0: dma-controller@e65a 570 usb_dmac0: dma-controller@e65a0000 {
719 compatible = "renesas, 571 compatible = "renesas,r8a77990-usb-dmac",
720 "renesas, 572 "renesas,usb-dmac";
721 reg = <0 0xe65a0000 0 573 reg = <0 0xe65a0000 0 0x100>;
722 interrupts = <GIC_SPI !! 574 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
723 <GIC_SPI !! 575 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
724 interrupt-names = "ch0 576 interrupt-names = "ch0", "ch1";
725 clocks = <&cpg CPG_MOD 577 clocks = <&cpg CPG_MOD 330>;
726 power-domains = <&sysc 578 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
727 resets = <&cpg 330>; 579 resets = <&cpg 330>;
728 #dma-cells = <1>; 580 #dma-cells = <1>;
729 dma-channels = <2>; 581 dma-channels = <2>;
730 }; 582 };
731 583
732 usb_dmac1: dma-controller@e65b 584 usb_dmac1: dma-controller@e65b0000 {
733 compatible = "renesas, 585 compatible = "renesas,r8a77990-usb-dmac",
734 "renesas, 586 "renesas,usb-dmac";
735 reg = <0 0xe65b0000 0 587 reg = <0 0xe65b0000 0 0x100>;
736 interrupts = <GIC_SPI !! 588 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
737 <GIC_SPI !! 589 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
738 interrupt-names = "ch0 590 interrupt-names = "ch0", "ch1";
739 clocks = <&cpg CPG_MOD 591 clocks = <&cpg CPG_MOD 331>;
740 power-domains = <&sysc 592 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
741 resets = <&cpg 331>; 593 resets = <&cpg 331>;
742 #dma-cells = <1>; 594 #dma-cells = <1>;
743 dma-channels = <2>; 595 dma-channels = <2>;
744 }; 596 };
745 597
746 arm_cc630p: crypto@e6601000 { <<
747 compatible = "arm,cryp <<
748 interrupts = <GIC_SPI <<
749 reg = <0x0 0xe6601000 <<
750 clocks = <&cpg CPG_MOD <<
751 resets = <&cpg 229>; <<
752 power-domains = <&sysc <<
753 }; <<
754 <<
755 dmac0: dma-controller@e6700000 598 dmac0: dma-controller@e6700000 {
756 compatible = "renesas, 599 compatible = "renesas,dmac-r8a77990",
757 "renesas, 600 "renesas,rcar-dmac";
758 reg = <0 0xe6700000 0 601 reg = <0 0xe6700000 0 0x10000>;
759 interrupts = <GIC_SPI !! 602 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
760 <GIC_SPI !! 603 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
761 <GIC_SPI !! 604 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
762 <GIC_SPI !! 605 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
763 <GIC_SPI !! 606 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
764 <GIC_SPI !! 607 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
765 <GIC_SPI !! 608 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
766 <GIC_SPI !! 609 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
767 <GIC_SPI !! 610 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
768 <GIC_SPI !! 611 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
769 <GIC_SPI !! 612 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
770 <GIC_SPI !! 613 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
771 <GIC_SPI !! 614 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
772 <GIC_SPI !! 615 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
773 <GIC_SPI !! 616 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
774 <GIC_SPI !! 617 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
775 <GIC_SPI !! 618 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
776 interrupt-names = "err 619 interrupt-names = "error",
777 "ch0", 620 "ch0", "ch1", "ch2", "ch3",
778 "ch4", 621 "ch4", "ch5", "ch6", "ch7",
779 "ch8", 622 "ch8", "ch9", "ch10", "ch11",
780 "ch12" 623 "ch12", "ch13", "ch14", "ch15";
781 clocks = <&cpg CPG_MOD 624 clocks = <&cpg CPG_MOD 219>;
782 clock-names = "fck"; 625 clock-names = "fck";
783 power-domains = <&sysc 626 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
784 resets = <&cpg 219>; 627 resets = <&cpg 219>;
785 #dma-cells = <1>; 628 #dma-cells = <1>;
786 dma-channels = <16>; 629 dma-channels = <16>;
787 iommus = <&ipmmu_ds0 0 630 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
788 <&ipmmu_ds0 2>, 631 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
789 <&ipmmu_ds0 4>, 632 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
790 <&ipmmu_ds0 6>, 633 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
791 <&ipmmu_ds0 8>, 634 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
792 <&ipmmu_ds0 10> 635 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
793 <&ipmmu_ds0 12> 636 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
794 <&ipmmu_ds0 14> 637 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
795 }; 638 };
796 639
797 dmac1: dma-controller@e7300000 640 dmac1: dma-controller@e7300000 {
798 compatible = "renesas, 641 compatible = "renesas,dmac-r8a77990",
799 "renesas, 642 "renesas,rcar-dmac";
800 reg = <0 0xe7300000 0 643 reg = <0 0xe7300000 0 0x10000>;
801 interrupts = <GIC_SPI !! 644 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
802 <GIC_SPI !! 645 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
803 <GIC_SPI !! 646 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
804 <GIC_SPI !! 647 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
805 <GIC_SPI !! 648 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
806 <GIC_SPI !! 649 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
807 <GIC_SPI !! 650 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
808 <GIC_SPI !! 651 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
809 <GIC_SPI !! 652 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
810 <GIC_SPI !! 653 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
811 <GIC_SPI !! 654 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
812 <GIC_SPI !! 655 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
813 <GIC_SPI !! 656 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
814 <GIC_SPI !! 657 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
815 <GIC_SPI !! 658 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
816 <GIC_SPI !! 659 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
817 <GIC_SPI !! 660 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
818 interrupt-names = "err 661 interrupt-names = "error",
819 "ch0", 662 "ch0", "ch1", "ch2", "ch3",
820 "ch4", 663 "ch4", "ch5", "ch6", "ch7",
821 "ch8", 664 "ch8", "ch9", "ch10", "ch11",
822 "ch12" 665 "ch12", "ch13", "ch14", "ch15";
823 clocks = <&cpg CPG_MOD 666 clocks = <&cpg CPG_MOD 218>;
824 clock-names = "fck"; 667 clock-names = "fck";
825 power-domains = <&sysc 668 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
826 resets = <&cpg 218>; 669 resets = <&cpg 218>;
827 #dma-cells = <1>; 670 #dma-cells = <1>;
828 dma-channels = <16>; 671 dma-channels = <16>;
829 iommus = <&ipmmu_ds1 0 672 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
830 <&ipmmu_ds1 2>, 673 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
831 <&ipmmu_ds1 4>, 674 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
832 <&ipmmu_ds1 6>, 675 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
833 <&ipmmu_ds1 8>, 676 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
834 <&ipmmu_ds1 10> 677 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
835 <&ipmmu_ds1 12> 678 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
836 <&ipmmu_ds1 14> 679 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
837 }; 680 };
838 681
839 dmac2: dma-controller@e7310000 682 dmac2: dma-controller@e7310000 {
840 compatible = "renesas, 683 compatible = "renesas,dmac-r8a77990",
841 "renesas, 684 "renesas,rcar-dmac";
842 reg = <0 0xe7310000 0 685 reg = <0 0xe7310000 0 0x10000>;
843 interrupts = <GIC_SPI !! 686 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
844 <GIC_SPI !! 687 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
845 <GIC_SPI !! 688 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
846 <GIC_SPI !! 689 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
847 <GIC_SPI !! 690 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
848 <GIC_SPI !! 691 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
849 <GIC_SPI !! 692 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
850 <GIC_SPI !! 693 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
851 <GIC_SPI !! 694 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
852 <GIC_SPI !! 695 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
853 <GIC_SPI !! 696 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
854 <GIC_SPI !! 697 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
855 <GIC_SPI !! 698 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
856 <GIC_SPI !! 699 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
857 <GIC_SPI !! 700 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
858 <GIC_SPI !! 701 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
859 <GIC_SPI !! 702 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
860 interrupt-names = "err 703 interrupt-names = "error",
861 "ch0", 704 "ch0", "ch1", "ch2", "ch3",
862 "ch4", 705 "ch4", "ch5", "ch6", "ch7",
863 "ch8", 706 "ch8", "ch9", "ch10", "ch11",
864 "ch12" 707 "ch12", "ch13", "ch14", "ch15";
865 clocks = <&cpg CPG_MOD 708 clocks = <&cpg CPG_MOD 217>;
866 clock-names = "fck"; 709 clock-names = "fck";
867 power-domains = <&sysc 710 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
868 resets = <&cpg 217>; 711 resets = <&cpg 217>;
869 #dma-cells = <1>; 712 #dma-cells = <1>;
870 dma-channels = <16>; 713 dma-channels = <16>;
871 iommus = <&ipmmu_ds1 1 714 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
872 <&ipmmu_ds1 18> 715 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
873 <&ipmmu_ds1 20> 716 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
874 <&ipmmu_ds1 22> 717 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
875 <&ipmmu_ds1 24> 718 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
876 <&ipmmu_ds1 26> 719 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
877 <&ipmmu_ds1 28> 720 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
878 <&ipmmu_ds1 30> 721 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
879 }; 722 };
880 723
881 ipmmu_ds0: iommu@e6740000 { !! 724 ipmmu_ds0: mmu@e6740000 {
882 compatible = "renesas, 725 compatible = "renesas,ipmmu-r8a77990";
883 reg = <0 0xe6740000 0 726 reg = <0 0xe6740000 0 0x1000>;
884 renesas,ipmmu-main = < 727 renesas,ipmmu-main = <&ipmmu_mm 0>;
885 power-domains = <&sysc 728 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
886 #iommu-cells = <1>; 729 #iommu-cells = <1>;
887 }; 730 };
888 731
889 ipmmu_ds1: iommu@e7740000 { !! 732 ipmmu_ds1: mmu@e7740000 {
890 compatible = "renesas, 733 compatible = "renesas,ipmmu-r8a77990";
891 reg = <0 0xe7740000 0 734 reg = <0 0xe7740000 0 0x1000>;
892 renesas,ipmmu-main = < 735 renesas,ipmmu-main = <&ipmmu_mm 1>;
893 power-domains = <&sysc 736 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
894 #iommu-cells = <1>; 737 #iommu-cells = <1>;
895 }; 738 };
896 739
897 ipmmu_hc: iommu@e6570000 { !! 740 ipmmu_hc: mmu@e6570000 {
898 compatible = "renesas, 741 compatible = "renesas,ipmmu-r8a77990";
899 reg = <0 0xe6570000 0 742 reg = <0 0xe6570000 0 0x1000>;
900 renesas,ipmmu-main = < 743 renesas,ipmmu-main = <&ipmmu_mm 2>;
901 power-domains = <&sysc 744 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
902 #iommu-cells = <1>; 745 #iommu-cells = <1>;
903 }; 746 };
904 747
905 ipmmu_mm: iommu@e67b0000 { !! 748 ipmmu_mm: mmu@e67b0000 {
906 compatible = "renesas, 749 compatible = "renesas,ipmmu-r8a77990";
907 reg = <0 0xe67b0000 0 750 reg = <0 0xe67b0000 0 0x1000>;
908 interrupts = <GIC_SPI 751 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
909 <GIC_SPI 752 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
910 power-domains = <&sysc 753 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
911 #iommu-cells = <1>; 754 #iommu-cells = <1>;
912 }; 755 };
913 756
914 ipmmu_mp: iommu@ec670000 { !! 757 ipmmu_mp: mmu@ec670000 {
915 compatible = "renesas, 758 compatible = "renesas,ipmmu-r8a77990";
916 reg = <0 0xec670000 0 759 reg = <0 0xec670000 0 0x1000>;
917 renesas,ipmmu-main = < 760 renesas,ipmmu-main = <&ipmmu_mm 4>;
918 power-domains = <&sysc 761 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
919 #iommu-cells = <1>; 762 #iommu-cells = <1>;
920 }; 763 };
921 764
922 ipmmu_pv0: iommu@fd800000 { !! 765 ipmmu_pv0: mmu@fd800000 {
923 compatible = "renesas, 766 compatible = "renesas,ipmmu-r8a77990";
924 reg = <0 0xfd800000 0 767 reg = <0 0xfd800000 0 0x1000>;
925 renesas,ipmmu-main = < 768 renesas,ipmmu-main = <&ipmmu_mm 6>;
926 power-domains = <&sysc 769 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
927 #iommu-cells = <1>; 770 #iommu-cells = <1>;
928 }; 771 };
929 772
930 ipmmu_rt: iommu@ffc80000 { !! 773 ipmmu_rt: mmu@ffc80000 {
931 compatible = "renesas, 774 compatible = "renesas,ipmmu-r8a77990";
932 reg = <0 0xffc80000 0 775 reg = <0 0xffc80000 0 0x1000>;
933 renesas,ipmmu-main = < 776 renesas,ipmmu-main = <&ipmmu_mm 10>;
934 power-domains = <&sysc 777 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 778 #iommu-cells = <1>;
936 }; 779 };
937 780
938 ipmmu_vc0: iommu@fe6b0000 { !! 781 ipmmu_vc0: mmu@fe6b0000 {
939 compatible = "renesas, 782 compatible = "renesas,ipmmu-r8a77990";
940 reg = <0 0xfe6b0000 0 783 reg = <0 0xfe6b0000 0 0x1000>;
941 renesas,ipmmu-main = < 784 renesas,ipmmu-main = <&ipmmu_mm 12>;
942 power-domains = <&sysc 785 power-domains = <&sysc R8A77990_PD_A3VC>;
943 #iommu-cells = <1>; 786 #iommu-cells = <1>;
944 }; 787 };
945 788
946 ipmmu_vi0: iommu@febd0000 { !! 789 ipmmu_vi0: mmu@febd0000 {
947 compatible = "renesas, 790 compatible = "renesas,ipmmu-r8a77990";
948 reg = <0 0xfebd0000 0 791 reg = <0 0xfebd0000 0 0x1000>;
949 renesas,ipmmu-main = < 792 renesas,ipmmu-main = <&ipmmu_mm 14>;
950 power-domains = <&sysc 793 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 794 #iommu-cells = <1>;
952 }; 795 };
953 796
954 ipmmu_vp0: iommu@fe990000 { !! 797 ipmmu_vp0: mmu@fe990000 {
955 compatible = "renesas, 798 compatible = "renesas,ipmmu-r8a77990";
956 reg = <0 0xfe990000 0 799 reg = <0 0xfe990000 0 0x1000>;
957 renesas,ipmmu-main = < 800 renesas,ipmmu-main = <&ipmmu_mm 16>;
958 power-domains = <&sysc 801 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
959 #iommu-cells = <1>; 802 #iommu-cells = <1>;
960 }; 803 };
961 804
962 avb: ethernet@e6800000 { 805 avb: ethernet@e6800000 {
963 compatible = "renesas, 806 compatible = "renesas,etheravb-r8a77990",
964 "renesas, 807 "renesas,etheravb-rcar-gen3";
965 reg = <0 0xe6800000 0 808 reg = <0 0xe6800000 0 0x800>;
966 interrupts = <GIC_SPI 809 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 810 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 811 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 812 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 813 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 814 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 815 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
973 <GIC_SPI 816 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
974 <GIC_SPI 817 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 818 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 819 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
977 <GIC_SPI 820 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
978 <GIC_SPI 821 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
979 <GIC_SPI 822 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
980 <GIC_SPI 823 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
981 <GIC_SPI 824 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
982 <GIC_SPI 825 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
983 <GIC_SPI 826 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
984 <GIC_SPI 827 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
985 <GIC_SPI 828 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
986 <GIC_SPI 829 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
987 <GIC_SPI 830 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
988 <GIC_SPI 831 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
989 <GIC_SPI 832 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
990 <GIC_SPI 833 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
991 interrupt-names = "ch0 834 interrupt-names = "ch0", "ch1", "ch2", "ch3",
992 "ch4 835 "ch4", "ch5", "ch6", "ch7",
993 "ch8 836 "ch8", "ch9", "ch10", "ch11",
994 "ch1 837 "ch12", "ch13", "ch14", "ch15",
995 "ch1 838 "ch16", "ch17", "ch18", "ch19",
996 "ch2 839 "ch20", "ch21", "ch22", "ch23",
997 "ch2 840 "ch24";
998 clocks = <&cpg CPG_MOD 841 clocks = <&cpg CPG_MOD 812>;
999 clock-names = "fck"; <<
1000 power-domains = <&sys 842 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1001 resets = <&cpg 812>; 843 resets = <&cpg 812>;
1002 phy-mode = "rgmii"; 844 phy-mode = "rgmii";
1003 rx-internal-delay-ps <<
1004 iommus = <&ipmmu_ds0 845 iommus = <&ipmmu_ds0 16>;
1005 #address-cells = <1>; 846 #address-cells = <1>;
1006 #size-cells = <0>; 847 #size-cells = <0>;
1007 status = "disabled"; 848 status = "disabled";
1008 }; 849 };
1009 850
1010 can0: can@e6c30000 { 851 can0: can@e6c30000 {
1011 compatible = "renesas 852 compatible = "renesas,can-r8a77990",
1012 "renesas 853 "renesas,rcar-gen3-can";
1013 reg = <0 0xe6c30000 0 854 reg = <0 0xe6c30000 0 0x1000>;
1014 interrupts = <GIC_SPI 855 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1015 clocks = <&cpg CPG_MO 856 clocks = <&cpg CPG_MOD 916>,
1016 <&cpg CPG_CORE 857 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1017 <&can_clk>; 858 <&can_clk>;
1018 clock-names = "clkp1" 859 clock-names = "clkp1", "clkp2", "can_clk";
1019 assigned-clocks = <&c 860 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1020 assigned-clock-rates 861 assigned-clock-rates = <40000000>;
1021 power-domains = <&sys 862 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1022 resets = <&cpg 916>; 863 resets = <&cpg 916>;
1023 status = "disabled"; 864 status = "disabled";
1024 }; 865 };
1025 866
1026 can1: can@e6c38000 { 867 can1: can@e6c38000 {
1027 compatible = "renesas 868 compatible = "renesas,can-r8a77990",
1028 "renesas 869 "renesas,rcar-gen3-can";
1029 reg = <0 0xe6c38000 0 870 reg = <0 0xe6c38000 0 0x1000>;
1030 interrupts = <GIC_SPI 871 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&cpg CPG_MO 872 clocks = <&cpg CPG_MOD 915>,
1032 <&cpg CPG_CORE 873 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1033 <&can_clk>; 874 <&can_clk>;
1034 clock-names = "clkp1" 875 clock-names = "clkp1", "clkp2", "can_clk";
1035 assigned-clocks = <&c 876 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1036 assigned-clock-rates 877 assigned-clock-rates = <40000000>;
1037 power-domains = <&sys 878 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1038 resets = <&cpg 915>; 879 resets = <&cpg 915>;
1039 status = "disabled"; 880 status = "disabled";
1040 }; 881 };
1041 882
1042 canfd: can@e66c0000 { 883 canfd: can@e66c0000 {
1043 compatible = "renesas 884 compatible = "renesas,r8a77990-canfd",
1044 "renesas 885 "renesas,rcar-gen3-canfd";
1045 reg = <0 0xe66c0000 0 886 reg = <0 0xe66c0000 0 0x8000>;
1046 interrupts = <GIC_SPI 887 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1047 <GIC_SPI 3 888 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1048 interrupt-names = "ch <<
1049 clocks = <&cpg CPG_MO 889 clocks = <&cpg CPG_MOD 914>,
1050 <&cpg CPG_CORE 890 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1051 <&can_clk>; 891 <&can_clk>;
1052 clock-names = "fck", 892 clock-names = "fck", "canfd", "can_clk";
1053 assigned-clocks = <&c 893 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1054 assigned-clock-rates 894 assigned-clock-rates = <40000000>;
1055 power-domains = <&sys 895 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1056 resets = <&cpg 914>; 896 resets = <&cpg 914>;
1057 status = "disabled"; 897 status = "disabled";
1058 898
1059 channel0 { 899 channel0 {
1060 status = "dis 900 status = "disabled";
1061 }; 901 };
1062 902
1063 channel1 { 903 channel1 {
1064 status = "dis 904 status = "disabled";
1065 }; 905 };
1066 }; 906 };
1067 907
1068 pwm0: pwm@e6e30000 { 908 pwm0: pwm@e6e30000 {
1069 compatible = "renesas 909 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1070 reg = <0 0xe6e30000 0 910 reg = <0 0xe6e30000 0 0x8>;
1071 clocks = <&cpg CPG_MO 911 clocks = <&cpg CPG_MOD 523>;
1072 power-domains = <&sys 912 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1073 resets = <&cpg 523>; 913 resets = <&cpg 523>;
1074 #pwm-cells = <2>; 914 #pwm-cells = <2>;
1075 status = "disabled"; 915 status = "disabled";
1076 }; 916 };
1077 917
1078 pwm1: pwm@e6e31000 { 918 pwm1: pwm@e6e31000 {
1079 compatible = "renesas 919 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1080 reg = <0 0xe6e31000 0 920 reg = <0 0xe6e31000 0 0x8>;
1081 clocks = <&cpg CPG_MO 921 clocks = <&cpg CPG_MOD 523>;
1082 power-domains = <&sys 922 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1083 resets = <&cpg 523>; 923 resets = <&cpg 523>;
1084 #pwm-cells = <2>; 924 #pwm-cells = <2>;
1085 status = "disabled"; 925 status = "disabled";
1086 }; 926 };
1087 927
1088 pwm2: pwm@e6e32000 { 928 pwm2: pwm@e6e32000 {
1089 compatible = "renesas 929 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1090 reg = <0 0xe6e32000 0 930 reg = <0 0xe6e32000 0 0x8>;
1091 clocks = <&cpg CPG_MO 931 clocks = <&cpg CPG_MOD 523>;
1092 power-domains = <&sys 932 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1093 resets = <&cpg 523>; 933 resets = <&cpg 523>;
1094 #pwm-cells = <2>; 934 #pwm-cells = <2>;
1095 status = "disabled"; 935 status = "disabled";
1096 }; 936 };
1097 937
1098 pwm3: pwm@e6e33000 { 938 pwm3: pwm@e6e33000 {
1099 compatible = "renesas 939 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1100 reg = <0 0xe6e33000 0 940 reg = <0 0xe6e33000 0 0x8>;
1101 clocks = <&cpg CPG_MO 941 clocks = <&cpg CPG_MOD 523>;
1102 power-domains = <&sys 942 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1103 resets = <&cpg 523>; 943 resets = <&cpg 523>;
1104 #pwm-cells = <2>; 944 #pwm-cells = <2>;
1105 status = "disabled"; 945 status = "disabled";
1106 }; 946 };
1107 947
1108 pwm4: pwm@e6e34000 { 948 pwm4: pwm@e6e34000 {
1109 compatible = "renesas 949 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1110 reg = <0 0xe6e34000 0 950 reg = <0 0xe6e34000 0 0x8>;
1111 clocks = <&cpg CPG_MO 951 clocks = <&cpg CPG_MOD 523>;
1112 power-domains = <&sys 952 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1113 resets = <&cpg 523>; 953 resets = <&cpg 523>;
1114 #pwm-cells = <2>; 954 #pwm-cells = <2>;
1115 status = "disabled"; 955 status = "disabled";
1116 }; 956 };
1117 957
1118 pwm5: pwm@e6e35000 { 958 pwm5: pwm@e6e35000 {
1119 compatible = "renesas 959 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1120 reg = <0 0xe6e35000 0 960 reg = <0 0xe6e35000 0 0x8>;
1121 clocks = <&cpg CPG_MO 961 clocks = <&cpg CPG_MOD 523>;
1122 power-domains = <&sys 962 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1123 resets = <&cpg 523>; 963 resets = <&cpg 523>;
1124 #pwm-cells = <2>; 964 #pwm-cells = <2>;
1125 status = "disabled"; 965 status = "disabled";
1126 }; 966 };
1127 967
1128 pwm6: pwm@e6e36000 { 968 pwm6: pwm@e6e36000 {
1129 compatible = "renesas 969 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1130 reg = <0 0xe6e36000 0 970 reg = <0 0xe6e36000 0 0x8>;
1131 clocks = <&cpg CPG_MO 971 clocks = <&cpg CPG_MOD 523>;
1132 power-domains = <&sys 972 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1133 resets = <&cpg 523>; 973 resets = <&cpg 523>;
1134 #pwm-cells = <2>; 974 #pwm-cells = <2>;
1135 status = "disabled"; 975 status = "disabled";
1136 }; 976 };
1137 977
1138 scif0: serial@e6e60000 { 978 scif0: serial@e6e60000 {
1139 compatible = "renesas 979 compatible = "renesas,scif-r8a77990",
1140 "renesas 980 "renesas,rcar-gen3-scif", "renesas,scif";
1141 reg = <0 0xe6e60000 0 981 reg = <0 0xe6e60000 0 64>;
1142 interrupts = <GIC_SPI 982 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1143 clocks = <&cpg CPG_MO 983 clocks = <&cpg CPG_MOD 207>,
1144 <&cpg CPG_CO 984 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1145 <&scif_clk>; 985 <&scif_clk>;
1146 clock-names = "fck", 986 clock-names = "fck", "brg_int", "scif_clk";
1147 dmas = <&dmac1 0x51>, 987 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1148 <&dmac2 0x51>, 988 <&dmac2 0x51>, <&dmac2 0x50>;
1149 dma-names = "tx", "rx 989 dma-names = "tx", "rx", "tx", "rx";
1150 power-domains = <&sys 990 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1151 resets = <&cpg 207>; 991 resets = <&cpg 207>;
1152 status = "disabled"; 992 status = "disabled";
1153 }; 993 };
1154 994
1155 scif1: serial@e6e68000 { 995 scif1: serial@e6e68000 {
1156 compatible = "renesas 996 compatible = "renesas,scif-r8a77990",
1157 "renesas 997 "renesas,rcar-gen3-scif", "renesas,scif";
1158 reg = <0 0xe6e68000 0 998 reg = <0 0xe6e68000 0 64>;
1159 interrupts = <GIC_SPI 999 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1160 clocks = <&cpg CPG_MO 1000 clocks = <&cpg CPG_MOD 206>,
1161 <&cpg CPG_CO 1001 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1162 <&scif_clk>; 1002 <&scif_clk>;
1163 clock-names = "fck", 1003 clock-names = "fck", "brg_int", "scif_clk";
1164 dmas = <&dmac1 0x53>, 1004 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1165 <&dmac2 0x53>, 1005 <&dmac2 0x53>, <&dmac2 0x52>;
1166 dma-names = "tx", "rx 1006 dma-names = "tx", "rx", "tx", "rx";
1167 power-domains = <&sys 1007 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1168 resets = <&cpg 206>; 1008 resets = <&cpg 206>;
1169 status = "disabled"; 1009 status = "disabled";
1170 }; 1010 };
1171 1011
1172 scif2: serial@e6e88000 { 1012 scif2: serial@e6e88000 {
1173 compatible = "renesas 1013 compatible = "renesas,scif-r8a77990",
1174 "renesas 1014 "renesas,rcar-gen3-scif", "renesas,scif";
1175 reg = <0 0xe6e88000 0 1015 reg = <0 0xe6e88000 0 64>;
1176 interrupts = <GIC_SPI 1016 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1177 clocks = <&cpg CPG_MO 1017 clocks = <&cpg CPG_MOD 310>,
1178 <&cpg CPG_CO 1018 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1179 <&scif_clk>; 1019 <&scif_clk>;
1180 clock-names = "fck", 1020 clock-names = "fck", "brg_int", "scif_clk";
1181 dmas = <&dmac1 0x13>, 1021 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1182 <&dmac2 0x13>, 1022 <&dmac2 0x13>, <&dmac2 0x12>;
1183 dma-names = "tx", "rx 1023 dma-names = "tx", "rx", "tx", "rx";
1184 power-domains = <&sys 1024 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1185 resets = <&cpg 310>; 1025 resets = <&cpg 310>;
1186 status = "disabled"; 1026 status = "disabled";
1187 }; 1027 };
1188 1028
1189 scif3: serial@e6c50000 { 1029 scif3: serial@e6c50000 {
1190 compatible = "renesas 1030 compatible = "renesas,scif-r8a77990",
1191 "renesas 1031 "renesas,rcar-gen3-scif", "renesas,scif";
1192 reg = <0 0xe6c50000 0 1032 reg = <0 0xe6c50000 0 64>;
1193 interrupts = <GIC_SPI 1033 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1194 clocks = <&cpg CPG_MO 1034 clocks = <&cpg CPG_MOD 204>,
1195 <&cpg CPG_CO 1035 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1196 <&scif_clk>; 1036 <&scif_clk>;
1197 clock-names = "fck", 1037 clock-names = "fck", "brg_int", "scif_clk";
1198 dmas = <&dmac0 0x57>, 1038 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1199 dma-names = "tx", "rx 1039 dma-names = "tx", "rx";
1200 power-domains = <&sys 1040 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1201 resets = <&cpg 204>; 1041 resets = <&cpg 204>;
1202 status = "disabled"; 1042 status = "disabled";
1203 }; 1043 };
1204 1044
1205 scif4: serial@e6c40000 { 1045 scif4: serial@e6c40000 {
1206 compatible = "renesas 1046 compatible = "renesas,scif-r8a77990",
1207 "renesas 1047 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6c40000 0 1048 reg = <0 0xe6c40000 0 64>;
1209 interrupts = <GIC_SPI 1049 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1050 clocks = <&cpg CPG_MOD 203>,
1211 <&cpg CPG_CO 1051 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1212 <&scif_clk>; 1052 <&scif_clk>;
1213 clock-names = "fck", 1053 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac0 0x59>, 1054 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1215 dma-names = "tx", "rx 1055 dma-names = "tx", "rx";
1216 power-domains = <&sys 1056 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1217 resets = <&cpg 203>; 1057 resets = <&cpg 203>;
1218 status = "disabled"; 1058 status = "disabled";
1219 }; 1059 };
1220 1060
1221 scif5: serial@e6f30000 { 1061 scif5: serial@e6f30000 {
1222 compatible = "renesas 1062 compatible = "renesas,scif-r8a77990",
1223 "renesas 1063 "renesas,rcar-gen3-scif", "renesas,scif";
1224 reg = <0 0xe6f30000 0 1064 reg = <0 0xe6f30000 0 64>;
1225 interrupts = <GIC_SPI 1065 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1226 clocks = <&cpg CPG_MO 1066 clocks = <&cpg CPG_MOD 202>,
1227 <&cpg CPG_CO 1067 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1228 <&scif_clk>; 1068 <&scif_clk>;
1229 clock-names = "fck", 1069 clock-names = "fck", "brg_int", "scif_clk";
1230 dmas = <&dmac0 0x5b>, 1070 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1231 dma-names = "tx", "rx 1071 dma-names = "tx", "rx";
1232 power-domains = <&sys 1072 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1233 resets = <&cpg 202>; 1073 resets = <&cpg 202>;
1234 status = "disabled"; 1074 status = "disabled";
1235 }; 1075 };
1236 1076
1237 msiof0: spi@e6e90000 { 1077 msiof0: spi@e6e90000 {
1238 compatible = "renesas 1078 compatible = "renesas,msiof-r8a77990",
1239 "renesas 1079 "renesas,rcar-gen3-msiof";
1240 reg = <0 0xe6e90000 0 1080 reg = <0 0xe6e90000 0 0x0064>;
1241 interrupts = <GIC_SPI 1081 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1242 clocks = <&cpg CPG_MO 1082 clocks = <&cpg CPG_MOD 211>;
1243 dmas = <&dmac1 0x41>, 1083 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1244 <&dmac2 0x41>, 1084 <&dmac2 0x41>, <&dmac2 0x40>;
1245 dma-names = "tx", "rx 1085 dma-names = "tx", "rx", "tx", "rx";
1246 power-domains = <&sys 1086 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1247 resets = <&cpg 211>; 1087 resets = <&cpg 211>;
1248 #address-cells = <1>; 1088 #address-cells = <1>;
1249 #size-cells = <0>; 1089 #size-cells = <0>;
1250 status = "disabled"; 1090 status = "disabled";
1251 }; 1091 };
1252 1092
1253 msiof1: spi@e6ea0000 { 1093 msiof1: spi@e6ea0000 {
1254 compatible = "renesas 1094 compatible = "renesas,msiof-r8a77990",
1255 "renesas 1095 "renesas,rcar-gen3-msiof";
1256 reg = <0 0xe6ea0000 0 1096 reg = <0 0xe6ea0000 0 0x0064>;
1257 interrupts = <GIC_SPI 1097 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1258 clocks = <&cpg CPG_MO 1098 clocks = <&cpg CPG_MOD 210>;
1259 dmas = <&dmac0 0x43>, !! 1099 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1260 dma-names = "tx", "rx !! 1100 <&dmac2 0x43>, <&dmac2 0x42>;
>> 1101 dma-names = "tx", "rx", "tx", "rx";
1261 power-domains = <&sys 1102 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1262 resets = <&cpg 210>; 1103 resets = <&cpg 210>;
1263 #address-cells = <1>; 1104 #address-cells = <1>;
1264 #size-cells = <0>; 1105 #size-cells = <0>;
1265 status = "disabled"; 1106 status = "disabled";
1266 }; 1107 };
1267 1108
1268 msiof2: spi@e6c00000 { 1109 msiof2: spi@e6c00000 {
1269 compatible = "renesas 1110 compatible = "renesas,msiof-r8a77990",
1270 "renesas 1111 "renesas,rcar-gen3-msiof";
1271 reg = <0 0xe6c00000 0 1112 reg = <0 0xe6c00000 0 0x0064>;
1272 interrupts = <GIC_SPI 1113 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1273 clocks = <&cpg CPG_MO 1114 clocks = <&cpg CPG_MOD 209>;
1274 dmas = <&dmac0 0x45>, 1115 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1275 dma-names = "tx", "rx 1116 dma-names = "tx", "rx";
1276 power-domains = <&sys 1117 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1277 resets = <&cpg 209>; 1118 resets = <&cpg 209>;
1278 #address-cells = <1>; 1119 #address-cells = <1>;
1279 #size-cells = <0>; 1120 #size-cells = <0>;
1280 status = "disabled"; 1121 status = "disabled";
1281 }; 1122 };
1282 1123
1283 msiof3: spi@e6c10000 { 1124 msiof3: spi@e6c10000 {
1284 compatible = "renesas 1125 compatible = "renesas,msiof-r8a77990",
1285 "renesas 1126 "renesas,rcar-gen3-msiof";
1286 reg = <0 0xe6c10000 0 1127 reg = <0 0xe6c10000 0 0x0064>;
1287 interrupts = <GIC_SPI 1128 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1288 clocks = <&cpg CPG_MO 1129 clocks = <&cpg CPG_MOD 208>;
1289 dmas = <&dmac0 0x47>, 1130 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1290 dma-names = "tx", "rx 1131 dma-names = "tx", "rx";
1291 power-domains = <&sys 1132 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1292 resets = <&cpg 208>; 1133 resets = <&cpg 208>;
1293 #address-cells = <1>; 1134 #address-cells = <1>;
1294 #size-cells = <0>; 1135 #size-cells = <0>;
1295 status = "disabled"; 1136 status = "disabled";
1296 }; 1137 };
1297 1138
1298 vin4: video@e6ef4000 { 1139 vin4: video@e6ef4000 {
1299 compatible = "renesas 1140 compatible = "renesas,vin-r8a77990";
1300 reg = <0 0xe6ef4000 0 1141 reg = <0 0xe6ef4000 0 0x1000>;
1301 interrupts = <GIC_SPI 1142 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1302 clocks = <&cpg CPG_MO 1143 clocks = <&cpg CPG_MOD 807>;
1303 power-domains = <&sys 1144 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1304 resets = <&cpg 807>; 1145 resets = <&cpg 807>;
1305 renesas,id = <4>; 1146 renesas,id = <4>;
1306 status = "disabled"; 1147 status = "disabled";
1307 1148
1308 ports { 1149 ports {
1309 #address-cell 1150 #address-cells = <1>;
1310 #size-cells = 1151 #size-cells = <0>;
1311 1152
1312 port@1 { 1153 port@1 {
1313 #addr 1154 #address-cells = <1>;
1314 #size 1155 #size-cells = <0>;
1315 1156
1316 reg = 1157 reg = <1>;
1317 1158
1318 vin4c 1159 vin4csi40: endpoint@2 {
1319 1160 reg = <2>;
1320 !! 1161 remote-endpoint= <&csi40vin4>;
1321 }; 1162 };
1322 }; 1163 };
1323 }; 1164 };
1324 }; 1165 };
1325 1166
1326 vin5: video@e6ef5000 { 1167 vin5: video@e6ef5000 {
1327 compatible = "renesas 1168 compatible = "renesas,vin-r8a77990";
1328 reg = <0 0xe6ef5000 0 1169 reg = <0 0xe6ef5000 0 0x1000>;
1329 interrupts = <GIC_SPI 1170 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1330 clocks = <&cpg CPG_MO 1171 clocks = <&cpg CPG_MOD 806>;
1331 power-domains = <&sys 1172 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1332 resets = <&cpg 806>; 1173 resets = <&cpg 806>;
1333 renesas,id = <5>; 1174 renesas,id = <5>;
1334 status = "disabled"; 1175 status = "disabled";
1335 1176
1336 ports { 1177 ports {
1337 #address-cell 1178 #address-cells = <1>;
1338 #size-cells = 1179 #size-cells = <0>;
1339 1180
1340 port@1 { 1181 port@1 {
1341 #addr 1182 #address-cells = <1>;
1342 #size 1183 #size-cells = <0>;
1343 1184
1344 reg = 1185 reg = <1>;
1345 1186
1346 vin5c 1187 vin5csi40: endpoint@2 {
1347 1188 reg = <2>;
1348 !! 1189 remote-endpoint= <&csi40vin5>;
1349 }; 1190 };
1350 }; 1191 };
1351 }; 1192 };
1352 }; 1193 };
1353 1194
1354 drif00: rif@e6f40000 { <<
1355 compatible = "renesas <<
1356 "renesas <<
1357 reg = <0 0xe6f40000 0 <<
1358 interrupts = <GIC_SPI <<
1359 clocks = <&cpg CPG_MO <<
1360 clock-names = "fck"; <<
1361 dmas = <&dmac1 0x20>, <<
1362 dma-names = "rx", "rx <<
1363 power-domains = <&sys <<
1364 resets = <&cpg 515>; <<
1365 renesas,bonding = <&d <<
1366 status = "disabled"; <<
1367 }; <<
1368 <<
1369 drif01: rif@e6f50000 { <<
1370 compatible = "renesas <<
1371 "renesas <<
1372 reg = <0 0xe6f50000 0 <<
1373 interrupts = <GIC_SPI <<
1374 clocks = <&cpg CPG_MO <<
1375 clock-names = "fck"; <<
1376 dmas = <&dmac1 0x22>, <<
1377 dma-names = "rx", "rx <<
1378 power-domains = <&sys <<
1379 resets = <&cpg 514>; <<
1380 renesas,bonding = <&d <<
1381 status = "disabled"; <<
1382 }; <<
1383 <<
1384 drif10: rif@e6f60000 { <<
1385 compatible = "renesas <<
1386 "renesas <<
1387 reg = <0 0xe6f60000 0 <<
1388 interrupts = <GIC_SPI <<
1389 clocks = <&cpg CPG_MO <<
1390 clock-names = "fck"; <<
1391 dmas = <&dmac1 0x24>, <<
1392 dma-names = "rx", "rx <<
1393 power-domains = <&sys <<
1394 resets = <&cpg 513>; <<
1395 renesas,bonding = <&d <<
1396 status = "disabled"; <<
1397 }; <<
1398 <<
1399 drif11: rif@e6f70000 { <<
1400 compatible = "renesas <<
1401 "renesas <<
1402 reg = <0 0xe6f70000 0 <<
1403 interrupts = <GIC_SPI <<
1404 clocks = <&cpg CPG_MO <<
1405 clock-names = "fck"; <<
1406 dmas = <&dmac1 0x26>, <<
1407 dma-names = "rx", "rx <<
1408 power-domains = <&sys <<
1409 resets = <&cpg 512>; <<
1410 renesas,bonding = <&d <<
1411 status = "disabled"; <<
1412 }; <<
1413 <<
1414 drif20: rif@e6f80000 { <<
1415 compatible = "renesas <<
1416 "renesas <<
1417 reg = <0 0xe6f80000 0 <<
1418 interrupts = <GIC_SPI <<
1419 clocks = <&cpg CPG_MO <<
1420 clock-names = "fck"; <<
1421 dmas = <&dmac0 0x28>; <<
1422 dma-names = "rx"; <<
1423 power-domains = <&sys <<
1424 resets = <&cpg 511>; <<
1425 renesas,bonding = <&d <<
1426 status = "disabled"; <<
1427 }; <<
1428 <<
1429 drif21: rif@e6f90000 { <<
1430 compatible = "renesas <<
1431 "renesas <<
1432 reg = <0 0xe6f90000 0 <<
1433 interrupts = <GIC_SPI <<
1434 clocks = <&cpg CPG_MO <<
1435 clock-names = "fck"; <<
1436 dmas = <&dmac0 0x2a>; <<
1437 dma-names = "rx"; <<
1438 power-domains = <&sys <<
1439 resets = <&cpg 510>; <<
1440 renesas,bonding = <&d <<
1441 status = "disabled"; <<
1442 }; <<
1443 <<
1444 drif30: rif@e6fa0000 { <<
1445 compatible = "renesas <<
1446 "renesas <<
1447 reg = <0 0xe6fa0000 0 <<
1448 interrupts = <GIC_SPI <<
1449 clocks = <&cpg CPG_MO <<
1450 clock-names = "fck"; <<
1451 dmas = <&dmac0 0x2c>; <<
1452 dma-names = "rx"; <<
1453 power-domains = <&sys <<
1454 resets = <&cpg 509>; <<
1455 renesas,bonding = <&d <<
1456 status = "disabled"; <<
1457 }; <<
1458 <<
1459 drif31: rif@e6fb0000 { <<
1460 compatible = "renesas <<
1461 "renesas <<
1462 reg = <0 0xe6fb0000 0 <<
1463 interrupts = <GIC_SPI <<
1464 clocks = <&cpg CPG_MO <<
1465 clock-names = "fck"; <<
1466 dmas = <&dmac0 0x2e>; <<
1467 dma-names = "rx"; <<
1468 power-domains = <&sys <<
1469 resets = <&cpg 508>; <<
1470 renesas,bonding = <&d <<
1471 status = "disabled"; <<
1472 }; <<
1473 <<
1474 rcar_sound: sound@ec500000 { 1195 rcar_sound: sound@ec500000 {
1475 /* 1196 /*
1476 * #sound-dai-cells i !! 1197 * #sound-dai-cells is required
1477 * 1198 *
1478 * Single DAI : #soun 1199 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1479 * Multi DAI : #soun 1200 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1480 */ 1201 */
1481 /* 1202 /*
1482 * #clock-cells is re 1203 * #clock-cells is required for audio_clkout0/1/2/3
1483 * 1204 *
1484 * clkout : #cl 1205 * clkout : #clock-cells = <0>; <&rcar_sound>;
1485 * clkout0/1/2/3: #cl 1206 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1486 */ 1207 */
1487 compatible = "renesas !! 1208 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1488 reg = <0 0xec500000 0 !! 1209 reg = <0 0xec500000 0 0x1000>, /* SCU */
1489 <0 0xec5a0000 0 !! 1210 <0 0xec5a0000 0 0x100>, /* ADG */
1490 <0 0xec540000 0 !! 1211 <0 0xec540000 0 0x1000>, /* SSIU */
1491 <0 0xec541000 0 !! 1212 <0 0xec541000 0 0x280>, /* SSI */
1492 <0 0xec760000 0 !! 1213 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1493 reg-names = "scu", "a 1214 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1494 1215
1495 clocks = <&cpg CPG_MO 1216 clocks = <&cpg CPG_MOD 1005>,
1496 <&cpg CPG_MO 1217 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1497 <&cpg CPG_MO 1218 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1498 <&cpg CPG_MO 1219 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1499 <&cpg CPG_MO 1220 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1500 <&cpg CPG_MO 1221 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1501 <&cpg CPG_MO 1222 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1502 <&cpg CPG_MO 1223 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1503 <&cpg CPG_MO 1224 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1504 <&cpg CPG_MO 1225 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1505 <&cpg CPG_MO 1226 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1506 <&cpg CPG_MO 1227 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1507 <&cpg CPG_MO 1228 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1508 <&cpg CPG_MO 1229 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1509 <&audio_clk_ 1230 <&audio_clk_a>, <&audio_clk_b>,
1510 <&audio_clk_ 1231 <&audio_clk_c>,
1511 <&cpg CPG_MO !! 1232 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1512 clock-names = "ssi-al 1233 clock-names = "ssi-all",
1513 "ssi.9" 1234 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1514 "ssi.5" 1235 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1515 "ssi.1" 1236 "ssi.1", "ssi.0",
1516 "src.9" 1237 "src.9", "src.8", "src.7", "src.6",
1517 "src.5" 1238 "src.5", "src.4", "src.3", "src.2",
1518 "src.1" 1239 "src.1", "src.0",
1519 "mix.1" 1240 "mix.1", "mix.0",
1520 "ctu.1" 1241 "ctu.1", "ctu.0",
1521 "dvc.0" 1242 "dvc.0", "dvc.1",
1522 "clk_a" 1243 "clk_a", "clk_b", "clk_c", "clk_i";
1523 power-domains = <&sys 1244 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1524 resets = <&cpg 1005>, 1245 resets = <&cpg 1005>,
1525 <&cpg 1006>, 1246 <&cpg 1006>, <&cpg 1007>,
1526 <&cpg 1008>, 1247 <&cpg 1008>, <&cpg 1009>,
1527 <&cpg 1010>, 1248 <&cpg 1010>, <&cpg 1011>,
1528 <&cpg 1012>, 1249 <&cpg 1012>, <&cpg 1013>,
1529 <&cpg 1014>, 1250 <&cpg 1014>, <&cpg 1015>;
1530 reset-names = "ssi-al 1251 reset-names = "ssi-all",
1531 "ssi.9" 1252 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1532 "ssi.5" 1253 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1533 "ssi.1" 1254 "ssi.1", "ssi.0";
1534 status = "disabled"; 1255 status = "disabled";
1535 1256
1536 rcar_sound,ctu { <<
1537 ctu00: ctu-0 <<
1538 ctu01: ctu-1 <<
1539 ctu02: ctu-2 <<
1540 ctu03: ctu-3 <<
1541 ctu10: ctu-4 <<
1542 ctu11: ctu-5 <<
1543 ctu12: ctu-6 <<
1544 ctu13: ctu-7 <<
1545 }; <<
1546 <<
1547 rcar_sound,dvc { 1257 rcar_sound,dvc {
1548 dvc0: dvc-0 { 1258 dvc0: dvc-0 {
1549 dmas 1259 dmas = <&audma0 0xbc>;
1550 dma-n 1260 dma-names = "tx";
1551 }; 1261 };
1552 dvc1: dvc-1 { 1262 dvc1: dvc-1 {
1553 dmas 1263 dmas = <&audma0 0xbe>;
1554 dma-n 1264 dma-names = "tx";
1555 }; 1265 };
1556 }; 1266 };
1557 1267
1558 rcar_sound,mix { 1268 rcar_sound,mix {
1559 mix0: mix-0 { 1269 mix0: mix-0 { };
1560 mix1: mix-1 { 1270 mix1: mix-1 { };
1561 }; 1271 };
1562 1272
>> 1273 rcar_sound,ctu {
>> 1274 ctu00: ctu-0 { };
>> 1275 ctu01: ctu-1 { };
>> 1276 ctu02: ctu-2 { };
>> 1277 ctu03: ctu-3 { };
>> 1278 ctu10: ctu-4 { };
>> 1279 ctu11: ctu-5 { };
>> 1280 ctu12: ctu-6 { };
>> 1281 ctu13: ctu-7 { };
>> 1282 };
>> 1283
1563 rcar_sound,src { 1284 rcar_sound,src {
1564 src0: src-0 { 1285 src0: src-0 {
1565 inter 1286 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1566 dmas 1287 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1567 dma-n 1288 dma-names = "rx", "tx";
1568 }; 1289 };
1569 src1: src-1 { 1290 src1: src-1 {
1570 inter 1291 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1571 dmas 1292 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1572 dma-n 1293 dma-names = "rx", "tx";
1573 }; 1294 };
1574 src2: src-2 { 1295 src2: src-2 {
1575 inter 1296 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1576 dmas 1297 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1577 dma-n 1298 dma-names = "rx", "tx";
1578 }; 1299 };
1579 src3: src-3 { 1300 src3: src-3 {
1580 inter 1301 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1581 dmas 1302 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1582 dma-n 1303 dma-names = "rx", "tx";
1583 }; 1304 };
1584 src4: src-4 { 1305 src4: src-4 {
1585 inter 1306 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas 1307 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1587 dma-n 1308 dma-names = "rx", "tx";
1588 }; 1309 };
1589 src5: src-5 { 1310 src5: src-5 {
1590 inter 1311 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1591 dmas 1312 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1592 dma-n 1313 dma-names = "rx", "tx";
1593 }; 1314 };
1594 src6: src-6 { 1315 src6: src-6 {
1595 inter 1316 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1596 dmas 1317 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1597 dma-n 1318 dma-names = "rx", "tx";
1598 }; 1319 };
1599 src7: src-7 { 1320 src7: src-7 {
1600 inter 1321 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1601 dmas 1322 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1602 dma-n 1323 dma-names = "rx", "tx";
1603 }; 1324 };
1604 src8: src-8 { 1325 src8: src-8 {
1605 inter 1326 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1606 dmas 1327 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1607 dma-n 1328 dma-names = "rx", "tx";
1608 }; 1329 };
1609 src9: src-9 { 1330 src9: src-9 {
1610 inter 1331 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1611 dmas 1332 dmas = <&audma0 0x97>, <&audma0 0xba>;
1612 dma-n 1333 dma-names = "rx", "tx";
1613 }; 1334 };
1614 }; 1335 };
1615 1336
1616 rcar_sound,ssi { 1337 rcar_sound,ssi {
1617 ssi0: ssi-0 { 1338 ssi0: ssi-0 {
1618 inter 1339 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1619 dmas 1340 dmas = <&audma0 0x01>, <&audma0 0x02>,
1620 1341 <&audma0 0x15>, <&audma0 0x16>;
1621 dma-n 1342 dma-names = "rx", "tx", "rxu", "txu";
1622 }; 1343 };
1623 ssi1: ssi-1 { 1344 ssi1: ssi-1 {
1624 inter 1345 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1625 dmas 1346 dmas = <&audma0 0x03>, <&audma0 0x04>,
1626 1347 <&audma0 0x49>, <&audma0 0x4a>;
1627 dma-n 1348 dma-names = "rx", "tx", "rxu", "txu";
1628 }; 1349 };
1629 ssi2: ssi-2 { 1350 ssi2: ssi-2 {
1630 inter 1351 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1631 dmas 1352 dmas = <&audma0 0x05>, <&audma0 0x06>,
1632 1353 <&audma0 0x63>, <&audma0 0x64>;
1633 dma-n 1354 dma-names = "rx", "tx", "rxu", "txu";
1634 }; 1355 };
1635 ssi3: ssi-3 { 1356 ssi3: ssi-3 {
1636 inter 1357 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1637 dmas 1358 dmas = <&audma0 0x07>, <&audma0 0x08>,
1638 1359 <&audma0 0x6f>, <&audma0 0x70>;
1639 dma-n 1360 dma-names = "rx", "tx", "rxu", "txu";
1640 }; 1361 };
1641 ssi4: ssi-4 { 1362 ssi4: ssi-4 {
1642 inter 1363 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1643 dmas 1364 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1644 1365 <&audma0 0x71>, <&audma0 0x72>;
1645 dma-n 1366 dma-names = "rx", "tx", "rxu", "txu";
1646 }; 1367 };
1647 ssi5: ssi-5 { 1368 ssi5: ssi-5 {
1648 inter 1369 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1649 dmas 1370 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1650 1371 <&audma0 0x73>, <&audma0 0x74>;
1651 dma-n 1372 dma-names = "rx", "tx", "rxu", "txu";
1652 }; 1373 };
1653 ssi6: ssi-6 { 1374 ssi6: ssi-6 {
1654 inter 1375 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1655 dmas 1376 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1656 1377 <&audma0 0x75>, <&audma0 0x76>;
1657 dma-n 1378 dma-names = "rx", "tx", "rxu", "txu";
1658 }; 1379 };
1659 ssi7: ssi-7 { 1380 ssi7: ssi-7 {
1660 inter 1381 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1661 dmas 1382 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1662 1383 <&audma0 0x79>, <&audma0 0x7a>;
1663 dma-n 1384 dma-names = "rx", "tx", "rxu", "txu";
1664 }; 1385 };
1665 ssi8: ssi-8 { 1386 ssi8: ssi-8 {
1666 inter 1387 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1667 dmas 1388 dmas = <&audma0 0x11>, <&audma0 0x12>,
1668 1389 <&audma0 0x7b>, <&audma0 0x7c>;
1669 dma-n 1390 dma-names = "rx", "tx", "rxu", "txu";
1670 }; 1391 };
1671 ssi9: ssi-9 { 1392 ssi9: ssi-9 {
1672 inter 1393 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1673 dmas 1394 dmas = <&audma0 0x13>, <&audma0 0x14>,
1674 1395 <&audma0 0x7d>, <&audma0 0x7e>;
1675 dma-n 1396 dma-names = "rx", "tx", "rxu", "txu";
1676 }; 1397 };
1677 }; 1398 };
1678 }; 1399 };
1679 1400
1680 mlp: mlp@ec520000 { <<
1681 compatible = "renesas <<
1682 "renesas <<
1683 reg = <0 0xec520000 0 <<
1684 interrupts = <GIC_SPI <<
1685 <GIC_SPI 385 <<
1686 clocks = <&cpg CPG_MO <<
1687 power-domains = <&sys <<
1688 resets = <&cpg 802>; <<
1689 status = "disabled"; <<
1690 }; <<
1691 <<
1692 audma0: dma-controller@ec7000 1401 audma0: dma-controller@ec700000 {
1693 compatible = "renesas 1402 compatible = "renesas,dmac-r8a77990",
1694 "renesas 1403 "renesas,rcar-dmac";
1695 reg = <0 0xec700000 0 1404 reg = <0 0xec700000 0 0x10000>;
1696 interrupts = <GIC_SPI !! 1405 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1697 <GIC_SPI !! 1406 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1698 <GIC_SPI !! 1407 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1699 <GIC_SPI !! 1408 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1700 <GIC_SPI !! 1409 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1701 <GIC_SPI !! 1410 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1702 <GIC_SPI !! 1411 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1703 <GIC_SPI !! 1412 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1704 <GIC_SPI !! 1413 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1705 <GIC_SPI !! 1414 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1706 <GIC_SPI !! 1415 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1707 <GIC_SPI !! 1416 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1708 <GIC_SPI !! 1417 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1709 <GIC_SPI !! 1418 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1710 <GIC_SPI !! 1419 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1711 <GIC_SPI !! 1420 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1712 <GIC_SPI !! 1421 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1713 interrupt-names = "er 1422 interrupt-names = "error",
1714 "ch0" 1423 "ch0", "ch1", "ch2", "ch3",
1715 "ch4" 1424 "ch4", "ch5", "ch6", "ch7",
1716 "ch8" 1425 "ch8", "ch9", "ch10", "ch11",
1717 "ch12 1426 "ch12", "ch13", "ch14", "ch15";
1718 clocks = <&cpg CPG_MO 1427 clocks = <&cpg CPG_MOD 502>;
1719 clock-names = "fck"; 1428 clock-names = "fck";
1720 power-domains = <&sys 1429 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1721 resets = <&cpg 502>; 1430 resets = <&cpg 502>;
1722 #dma-cells = <1>; 1431 #dma-cells = <1>;
1723 dma-channels = <16>; 1432 dma-channels = <16>;
1724 iommus = <&ipmmu_mp 0 1433 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1725 <&ipmmu_mp 2 1434 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1726 <&ipmmu_mp 4 1435 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1727 <&ipmmu_mp 6 1436 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1728 <&ipmmu_mp 8 1437 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1729 <&ipmmu_mp 1 1438 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1730 <&ipmmu_mp 1 1439 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1731 <&ipmmu_mp 1 1440 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1732 }; 1441 };
1733 1442
1734 xhci0: usb@ee000000 { 1443 xhci0: usb@ee000000 {
1735 compatible = "renesas 1444 compatible = "renesas,xhci-r8a77990",
1736 "renesas 1445 "renesas,rcar-gen3-xhci";
1737 reg = <0 0xee000000 0 1446 reg = <0 0xee000000 0 0xc00>;
1738 interrupts = <GIC_SPI 1447 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1739 clocks = <&cpg CPG_MO 1448 clocks = <&cpg CPG_MOD 328>;
1740 power-domains = <&sys 1449 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1741 resets = <&cpg 328>; 1450 resets = <&cpg 328>;
1742 status = "disabled"; 1451 status = "disabled";
1743 }; 1452 };
1744 1453
1745 usb3_peri0: usb@ee020000 { 1454 usb3_peri0: usb@ee020000 {
1746 compatible = "renesas 1455 compatible = "renesas,r8a77990-usb3-peri",
1747 "renesas 1456 "renesas,rcar-gen3-usb3-peri";
1748 reg = <0 0xee020000 0 1457 reg = <0 0xee020000 0 0x400>;
1749 interrupts = <GIC_SPI 1458 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1750 clocks = <&cpg CPG_MO 1459 clocks = <&cpg CPG_MOD 328>;
1751 power-domains = <&sys 1460 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1752 resets = <&cpg 328>; 1461 resets = <&cpg 328>;
1753 status = "disabled"; 1462 status = "disabled";
1754 }; 1463 };
1755 1464
1756 ohci0: usb@ee080000 { 1465 ohci0: usb@ee080000 {
1757 compatible = "generic 1466 compatible = "generic-ohci";
1758 reg = <0 0xee080000 0 1467 reg = <0 0xee080000 0 0x100>;
1759 interrupts = <GIC_SPI 1468 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1760 clocks = <&cpg CPG_MO 1469 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1761 phys = <&usb2_phy0 1> !! 1470 phys = <&usb2_phy0>;
1762 phy-names = "usb"; 1471 phy-names = "usb";
1763 power-domains = <&sys 1472 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1764 resets = <&cpg 703>, 1473 resets = <&cpg 703>, <&cpg 704>;
1765 status = "disabled"; 1474 status = "disabled";
1766 }; 1475 };
1767 1476
1768 ehci0: usb@ee080100 { 1477 ehci0: usb@ee080100 {
1769 compatible = "generic 1478 compatible = "generic-ehci";
1770 reg = <0 0xee080100 0 1479 reg = <0 0xee080100 0 0x100>;
1771 interrupts = <GIC_SPI 1480 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1772 clocks = <&cpg CPG_MO 1481 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1773 phys = <&usb2_phy0 2> !! 1482 phys = <&usb2_phy0>;
1774 phy-names = "usb"; 1483 phy-names = "usb";
1775 companion = <&ohci0>; 1484 companion = <&ohci0>;
1776 power-domains = <&sys 1485 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1777 resets = <&cpg 703>, 1486 resets = <&cpg 703>, <&cpg 704>;
1778 status = "disabled"; 1487 status = "disabled";
1779 }; 1488 };
1780 1489
1781 usb2_phy0: usb-phy@ee080200 { 1490 usb2_phy0: usb-phy@ee080200 {
1782 compatible = "renesas 1491 compatible = "renesas,usb2-phy-r8a77990",
1783 "renesas 1492 "renesas,rcar-gen3-usb2-phy";
1784 reg = <0 0xee080200 0 1493 reg = <0 0xee080200 0 0x700>;
1785 interrupts = <GIC_SPI 1494 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1786 clocks = <&cpg CPG_MO 1495 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1787 power-domains = <&sys 1496 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1788 resets = <&cpg 703>, 1497 resets = <&cpg 703>, <&cpg 704>;
1789 #phy-cells = <1>; !! 1498 #phy-cells = <0>;
1790 status = "disabled"; 1499 status = "disabled";
1791 }; 1500 };
1792 1501
1793 sdhi0: mmc@ee100000 { !! 1502 sdhi0: sd@ee100000 {
1794 compatible = "renesas 1503 compatible = "renesas,sdhi-r8a77990",
1795 "renesas 1504 "renesas,rcar-gen3-sdhi";
1796 reg = <0 0xee100000 0 1505 reg = <0 0xee100000 0 0x2000>;
1797 interrupts = <GIC_SPI 1506 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1798 clocks = <&cpg CPG_MO !! 1507 clocks = <&cpg CPG_MOD 314>;
1799 clock-names = "core", <<
1800 max-frequency = <2000 1508 max-frequency = <200000000>;
1801 power-domains = <&sys 1509 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1802 resets = <&cpg 314>; 1510 resets = <&cpg 314>;
1803 iommus = <&ipmmu_ds1 <<
1804 status = "disabled"; 1511 status = "disabled";
1805 }; 1512 };
1806 1513
1807 sdhi1: mmc@ee120000 { !! 1514 sdhi1: sd@ee120000 {
1808 compatible = "renesas 1515 compatible = "renesas,sdhi-r8a77990",
1809 "renesas 1516 "renesas,rcar-gen3-sdhi";
1810 reg = <0 0xee120000 0 1517 reg = <0 0xee120000 0 0x2000>;
1811 interrupts = <GIC_SPI 1518 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1812 clocks = <&cpg CPG_MO !! 1519 clocks = <&cpg CPG_MOD 313>;
1813 clock-names = "core", <<
1814 max-frequency = <2000 1520 max-frequency = <200000000>;
1815 power-domains = <&sys 1521 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1816 resets = <&cpg 313>; 1522 resets = <&cpg 313>;
1817 iommus = <&ipmmu_ds1 <<
1818 status = "disabled"; 1523 status = "disabled";
1819 }; 1524 };
1820 1525
1821 sdhi3: mmc@ee160000 { !! 1526 sdhi3: sd@ee160000 {
1822 compatible = "renesas 1527 compatible = "renesas,sdhi-r8a77990",
1823 "renesas 1528 "renesas,rcar-gen3-sdhi";
1824 reg = <0 0xee160000 0 1529 reg = <0 0xee160000 0 0x2000>;
1825 interrupts = <GIC_SPI 1530 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1826 clocks = <&cpg CPG_MO !! 1531 clocks = <&cpg CPG_MOD 311>;
1827 clock-names = "core", <<
1828 max-frequency = <2000 1532 max-frequency = <200000000>;
1829 power-domains = <&sys 1533 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1830 resets = <&cpg 311>; 1534 resets = <&cpg 311>;
1831 iommus = <&ipmmu_ds1 <<
1832 status = "disabled"; <<
1833 }; <<
1834 <<
1835 rpc: spi@ee200000 { <<
1836 compatible = "renesas <<
1837 "renesas <<
1838 reg = <0 0xee200000 0 <<
1839 <0 0x08000000 0 <<
1840 <0 0xee208000 0 <<
1841 reg-names = "regs", " <<
1842 interrupts = <GIC_SPI <<
1843 clocks = <&cpg CPG_MO <<
1844 power-domains = <&sys <<
1845 resets = <&cpg 917>; <<
1846 #address-cells = <1>; <<
1847 #size-cells = <0>; <<
1848 status = "disabled"; 1535 status = "disabled";
1849 }; 1536 };
1850 1537
1851 gic: interrupt-controller@f10 1538 gic: interrupt-controller@f1010000 {
1852 compatible = "arm,gic 1539 compatible = "arm,gic-400";
1853 #interrupt-cells = <3 1540 #interrupt-cells = <3>;
1854 #address-cells = <0>; 1541 #address-cells = <0>;
1855 interrupt-controller; 1542 interrupt-controller;
1856 reg = <0x0 0xf1010000 1543 reg = <0x0 0xf1010000 0 0x1000>,
1857 <0x0 0xf1020000 1544 <0x0 0xf1020000 0 0x20000>,
1858 <0x0 0xf1040000 1545 <0x0 0xf1040000 0 0x20000>,
1859 <0x0 0xf1060000 1546 <0x0 0xf1060000 0 0x20000>;
1860 interrupts = <GIC_PPI 1547 interrupts = <GIC_PPI 9
1861 (GIC_ 1548 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1862 clocks = <&cpg CPG_MO 1549 clocks = <&cpg CPG_MOD 408>;
1863 clock-names = "clk"; 1550 clock-names = "clk";
1864 power-domains = <&sys 1551 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1865 resets = <&cpg 408>; 1552 resets = <&cpg 408>;
1866 }; 1553 };
1867 1554
1868 pciec0: pcie@fe000000 { 1555 pciec0: pcie@fe000000 {
1869 compatible = "renesas 1556 compatible = "renesas,pcie-r8a77990",
1870 "renesas 1557 "renesas,pcie-rcar-gen3";
1871 reg = <0 0xfe000000 0 1558 reg = <0 0xfe000000 0 0x80000>;
1872 #address-cells = <3>; 1559 #address-cells = <3>;
1873 #size-cells = <2>; 1560 #size-cells = <2>;
1874 bus-range = <0x00 0xf 1561 bus-range = <0x00 0xff>;
1875 device_type = "pci"; 1562 device_type = "pci";
1876 ranges = <0x01000000 !! 1563 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1877 <0x02000000 !! 1564 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1878 <0x02000000 !! 1565 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1879 <0x42000000 !! 1566 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1880 /* Map all possible D !! 1567 /* Map all possible DDR as inbound ranges */
1881 dma-ranges = <0x42000 !! 1568 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1882 interrupts = <GIC_SPI 1569 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1883 <GIC_SPI 1570 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1884 <GIC_SPI 1571 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1885 #interrupt-cells = <1 1572 #interrupt-cells = <1>;
1886 interrupt-map-mask = 1573 interrupt-map-mask = <0 0 0 0>;
1887 interrupt-map = <0 0 1574 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1888 clocks = <&cpg CPG_MO 1575 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1889 clock-names = "pcie", 1576 clock-names = "pcie", "pcie_bus";
1890 power-domains = <&sys 1577 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1891 resets = <&cpg 319>; 1578 resets = <&cpg 319>;
1892 iommu-map = <0 &ipmmu <<
1893 iommu-map-mask = <0>; <<
1894 status = "disabled"; 1579 status = "disabled";
1895 }; 1580 };
1896 1581
1897 vspb0: vsp@fe960000 { 1582 vspb0: vsp@fe960000 {
1898 compatible = "renesas 1583 compatible = "renesas,vsp2";
1899 reg = <0 0xfe960000 0 1584 reg = <0 0xfe960000 0 0x8000>;
1900 interrupts = <GIC_SPI 1585 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1901 clocks = <&cpg CPG_MO 1586 clocks = <&cpg CPG_MOD 626>;
1902 power-domains = <&sys 1587 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1903 resets = <&cpg 626>; 1588 resets = <&cpg 626>;
1904 renesas,fcp = <&fcpvb 1589 renesas,fcp = <&fcpvb0>;
1905 }; 1590 };
1906 1591
1907 fcpvb0: fcp@fe96f000 { 1592 fcpvb0: fcp@fe96f000 {
1908 compatible = "renesas 1593 compatible = "renesas,fcpv";
1909 reg = <0 0xfe96f000 0 1594 reg = <0 0xfe96f000 0 0x200>;
1910 clocks = <&cpg CPG_MO 1595 clocks = <&cpg CPG_MOD 607>;
1911 power-domains = <&sys 1596 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1912 resets = <&cpg 607>; 1597 resets = <&cpg 607>;
1913 iommus = <&ipmmu_vp0 1598 iommus = <&ipmmu_vp0 5>;
1914 }; 1599 };
1915 1600
1916 vspi0: vsp@fe9a0000 { 1601 vspi0: vsp@fe9a0000 {
1917 compatible = "renesas 1602 compatible = "renesas,vsp2";
1918 reg = <0 0xfe9a0000 0 1603 reg = <0 0xfe9a0000 0 0x8000>;
1919 interrupts = <GIC_SPI 1604 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1920 clocks = <&cpg CPG_MO 1605 clocks = <&cpg CPG_MOD 631>;
1921 power-domains = <&sys 1606 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1922 resets = <&cpg 631>; 1607 resets = <&cpg 631>;
1923 renesas,fcp = <&fcpvi 1608 renesas,fcp = <&fcpvi0>;
1924 }; 1609 };
1925 1610
1926 fcpvi0: fcp@fe9af000 { 1611 fcpvi0: fcp@fe9af000 {
1927 compatible = "renesas 1612 compatible = "renesas,fcpv";
1928 reg = <0 0xfe9af000 0 1613 reg = <0 0xfe9af000 0 0x200>;
1929 clocks = <&cpg CPG_MO 1614 clocks = <&cpg CPG_MOD 611>;
1930 power-domains = <&sys 1615 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1931 resets = <&cpg 611>; 1616 resets = <&cpg 611>;
1932 iommus = <&ipmmu_vp0 1617 iommus = <&ipmmu_vp0 8>;
1933 }; 1618 };
1934 1619
1935 vspd0: vsp@fea20000 { 1620 vspd0: vsp@fea20000 {
1936 compatible = "renesas 1621 compatible = "renesas,vsp2";
1937 reg = <0 0xfea20000 0 1622 reg = <0 0xfea20000 0 0x7000>;
1938 interrupts = <GIC_SPI 1623 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1939 clocks = <&cpg CPG_MO 1624 clocks = <&cpg CPG_MOD 623>;
1940 power-domains = <&sys 1625 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1941 resets = <&cpg 623>; 1626 resets = <&cpg 623>;
1942 renesas,fcp = <&fcpvd 1627 renesas,fcp = <&fcpvd0>;
1943 }; 1628 };
1944 1629
1945 fcpvd0: fcp@fea27000 { 1630 fcpvd0: fcp@fea27000 {
1946 compatible = "renesas 1631 compatible = "renesas,fcpv";
1947 reg = <0 0xfea27000 0 1632 reg = <0 0xfea27000 0 0x200>;
1948 clocks = <&cpg CPG_MO 1633 clocks = <&cpg CPG_MOD 603>;
1949 power-domains = <&sys 1634 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1950 resets = <&cpg 603>; 1635 resets = <&cpg 603>;
1951 iommus = <&ipmmu_vi0 1636 iommus = <&ipmmu_vi0 8>;
1952 }; 1637 };
1953 1638
1954 vspd1: vsp@fea28000 { 1639 vspd1: vsp@fea28000 {
1955 compatible = "renesas 1640 compatible = "renesas,vsp2";
1956 reg = <0 0xfea28000 0 1641 reg = <0 0xfea28000 0 0x7000>;
1957 interrupts = <GIC_SPI 1642 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1958 clocks = <&cpg CPG_MO 1643 clocks = <&cpg CPG_MOD 622>;
1959 power-domains = <&sys 1644 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1960 resets = <&cpg 622>; 1645 resets = <&cpg 622>;
1961 renesas,fcp = <&fcpvd 1646 renesas,fcp = <&fcpvd1>;
1962 }; 1647 };
1963 1648
1964 fcpvd1: fcp@fea2f000 { 1649 fcpvd1: fcp@fea2f000 {
1965 compatible = "renesas 1650 compatible = "renesas,fcpv";
1966 reg = <0 0xfea2f000 0 1651 reg = <0 0xfea2f000 0 0x200>;
1967 clocks = <&cpg CPG_MO 1652 clocks = <&cpg CPG_MOD 602>;
1968 power-domains = <&sys 1653 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1969 resets = <&cpg 602>; 1654 resets = <&cpg 602>;
1970 iommus = <&ipmmu_vi0 1655 iommus = <&ipmmu_vi0 9>;
1971 }; 1656 };
1972 1657
1973 cmm0: cmm@fea40000 { <<
1974 compatible = "renesas <<
1975 "renesas <<
1976 reg = <0 0xfea40000 0 <<
1977 power-domains = <&sys <<
1978 clocks = <&cpg CPG_MO <<
1979 resets = <&cpg 711>; <<
1980 }; <<
1981 <<
1982 cmm1: cmm@fea50000 { <<
1983 compatible = "renesas <<
1984 "renesas <<
1985 reg = <0 0xfea50000 0 <<
1986 power-domains = <&sys <<
1987 clocks = <&cpg CPG_MO <<
1988 resets = <&cpg 710>; <<
1989 }; <<
1990 <<
1991 csi40: csi2@feaa0000 { 1658 csi40: csi2@feaa0000 {
1992 compatible = "renesas !! 1659 compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2";
1993 reg = <0 0xfeaa0000 0 1660 reg = <0 0xfeaa0000 0 0x10000>;
1994 interrupts = <GIC_SPI 1661 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1995 clocks = <&cpg CPG_MO 1662 clocks = <&cpg CPG_MOD 716>;
1996 power-domains = <&sys 1663 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1997 resets = <&cpg 716>; 1664 resets = <&cpg 716>;
1998 status = "disabled"; 1665 status = "disabled";
1999 1666
2000 ports { 1667 ports {
2001 #address-cell 1668 #address-cells = <1>;
2002 #size-cells = 1669 #size-cells = <0>;
2003 1670
2004 port@0 { <<
2005 reg = <<
2006 }; <<
2007 <<
2008 port@1 { 1671 port@1 {
2009 #addr 1672 #address-cells = <1>;
2010 #size 1673 #size-cells = <0>;
2011 1674
2012 reg = 1675 reg = <1>;
2013 1676
2014 csi40 1677 csi40vin4: endpoint@0 {
2015 1678 reg = <0>;
2016 1679 remote-endpoint = <&vin4csi40>;
2017 }; 1680 };
2018 csi40 1681 csi40vin5: endpoint@1 {
2019 1682 reg = <1>;
2020 1683 remote-endpoint = <&vin5csi40>;
2021 }; 1684 };
2022 }; 1685 };
2023 }; 1686 };
2024 }; 1687 };
2025 1688
2026 du: display@feb00000 { 1689 du: display@feb00000 {
2027 compatible = "renesas 1690 compatible = "renesas,du-r8a77990";
2028 reg = <0 0xfeb00000 0 !! 1691 reg = <0 0xfeb00000 0 0x80000>;
2029 interrupts = <GIC_SPI 1692 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2030 <GIC_SPI 1693 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
2031 clocks = <&cpg CPG_MO !! 1694 clocks = <&cpg CPG_MOD 724>,
>> 1695 <&cpg CPG_MOD 723>;
2032 clock-names = "du.0", 1696 clock-names = "du.0", "du.1";
2033 resets = <&cpg 724>; !! 1697 vsps = <&vspd0 0 &vspd1 0>;
2034 reset-names = "du.0"; <<
2035 <<
2036 renesas,cmms = <&cmm0 <<
2037 renesas,vsps = <&vspd <<
2038 <<
2039 status = "disabled"; 1698 status = "disabled";
2040 1699
2041 ports { 1700 ports {
2042 #address-cell 1701 #address-cells = <1>;
2043 #size-cells = 1702 #size-cells = <0>;
2044 1703
2045 port@0 { 1704 port@0 {
2046 reg = 1705 reg = <0>;
>> 1706 du_out_rgb: endpoint {
>> 1707 };
2047 }; 1708 };
2048 1709
2049 port@1 { 1710 port@1 {
2050 reg = 1711 reg = <1>;
2051 du_ou 1712 du_out_lvds0: endpoint {
2052 1713 remote-endpoint = <&lvds0_in>;
2053 }; 1714 };
2054 }; 1715 };
2055 1716
2056 port@2 { 1717 port@2 {
2057 reg = 1718 reg = <2>;
2058 du_ou 1719 du_out_lvds1: endpoint {
2059 1720 remote-endpoint = <&lvds1_in>;
2060 }; 1721 };
2061 }; 1722 };
2062 }; 1723 };
2063 }; 1724 };
2064 1725
2065 lvds0: lvds-encoder@feb90000 1726 lvds0: lvds-encoder@feb90000 {
2066 compatible = "renesas 1727 compatible = "renesas,r8a77990-lvds";
2067 reg = <0 0xfeb90000 0 1728 reg = <0 0xfeb90000 0 0x20>;
2068 clocks = <&cpg CPG_MO 1729 clocks = <&cpg CPG_MOD 727>;
2069 power-domains = <&sys 1730 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2070 resets = <&cpg 727>; 1731 resets = <&cpg 727>;
2071 status = "disabled"; 1732 status = "disabled";
2072 1733
2073 renesas,companion = < <<
2074 <<
2075 ports { 1734 ports {
2076 #address-cell 1735 #address-cells = <1>;
2077 #size-cells = 1736 #size-cells = <0>;
2078 1737
2079 port@0 { 1738 port@0 {
2080 reg = 1739 reg = <0>;
2081 lvds0 1740 lvds0_in: endpoint {
2082 1741 remote-endpoint = <&du_out_lvds0>;
2083 }; 1742 };
2084 }; 1743 };
2085 1744
2086 port@1 { 1745 port@1 {
2087 reg = 1746 reg = <1>;
>> 1747 lvds0_out: endpoint {
>> 1748 };
2088 }; 1749 };
2089 }; 1750 };
2090 }; 1751 };
2091 1752
2092 lvds1: lvds-encoder@feb90100 1753 lvds1: lvds-encoder@feb90100 {
2093 compatible = "renesas 1754 compatible = "renesas,r8a77990-lvds";
2094 reg = <0 0xfeb90100 0 1755 reg = <0 0xfeb90100 0 0x20>;
2095 clocks = <&cpg CPG_MO 1756 clocks = <&cpg CPG_MOD 727>;
2096 power-domains = <&sys 1757 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2097 resets = <&cpg 726>; 1758 resets = <&cpg 726>;
2098 status = "disabled"; 1759 status = "disabled";
2099 1760
2100 ports { 1761 ports {
2101 #address-cell 1762 #address-cells = <1>;
2102 #size-cells = 1763 #size-cells = <0>;
2103 1764
2104 port@0 { 1765 port@0 {
2105 reg = 1766 reg = <0>;
2106 lvds1 1767 lvds1_in: endpoint {
2107 1768 remote-endpoint = <&du_out_lvds1>;
2108 }; 1769 };
2109 }; 1770 };
2110 1771
2111 port@1 { 1772 port@1 {
2112 reg = 1773 reg = <1>;
>> 1774 lvds1_out: endpoint {
>> 1775 };
2113 }; 1776 };
2114 }; 1777 };
2115 }; 1778 };
2116 1779
2117 prr: chipid@fff00044 { 1780 prr: chipid@fff00044 {
2118 compatible = "renesas 1781 compatible = "renesas,prr";
2119 reg = <0 0xfff00044 0 1782 reg = <0 0xfff00044 0 4>;
2120 }; 1783 };
2121 }; 1784 };
2122 1785
2123 thermal-zones { 1786 thermal-zones {
2124 cpu-thermal { 1787 cpu-thermal {
2125 polling-delay-passive 1788 polling-delay-passive = <250>;
2126 polling-delay = <0>; !! 1789 polling-delay = <1000>;
2127 thermal-sensors = <&t 1790 thermal-sensors = <&thermal>;
2128 sustainable-power = < <<
2129 <<
2130 cooling-maps { <<
2131 map0 { <<
2132 trip <<
2133 cooli <<
2134 contr <<
2135 }; <<
2136 }; <<
2137 1791
2138 trips { 1792 trips {
2139 sensor1_crit: !! 1793 cpu-crit {
2140 tempe 1794 temperature = <120000>;
2141 hyste 1795 hysteresis = <2000>;
2142 type 1796 type = "critical";
2143 }; 1797 };
>> 1798 };
2144 1799
2145 target: trip- !! 1800 cooling-maps {
2146 tempe <<
2147 hyste <<
2148 type <<
2149 }; <<
2150 }; 1801 };
2151 }; 1802 };
2152 }; 1803 };
2153 1804
2154 timer { 1805 timer {
2155 compatible = "arm,armv8-timer 1806 compatible = "arm,armv8-timer";
2156 interrupts-extended = <&gic G 1807 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2157 <&gic G 1808 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2158 <&gic G 1809 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2159 <&gic G 1810 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2160 interrupt-names = "sec-phys", <<
2161 }; 1811 };
2162 }; 1812 };
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