1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car E3 (R8A779 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 * 4 *
5 * Copyright (C) 2018-2019 Renesas Electronics 5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */ 6 */
7 7
8 #include <dt-bindings/clock/r8a77990-cpg-mssr. 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h> 10 #include <dt-bindings/power/r8a77990-sysc.h>
11 11
12 / { 12 / {
13 compatible = "renesas,r8a77990"; 13 compatible = "renesas,r8a77990";
14 #address-cells = <2>; 14 #address-cells = <2>;
15 #size-cells = <2>; 15 #size-cells = <2>;
16 16
>> 17 aliases {
>> 18 i2c0 = &i2c0;
>> 19 i2c1 = &i2c1;
>> 20 i2c2 = &i2c2;
>> 21 i2c3 = &i2c3;
>> 22 i2c4 = &i2c4;
>> 23 i2c5 = &i2c5;
>> 24 i2c6 = &i2c6;
>> 25 i2c7 = &i2c7;
>> 26 };
>> 27
17 /* 28 /*
18 * The external audio clocks are confi 29 * The external audio clocks are configured as 0 Hz fixed frequency
19 * clocks by default. 30 * clocks by default.
20 * Boards that provide audio clocks sh 31 * Boards that provide audio clocks should override them.
21 */ 32 */
22 audio_clk_a: audio_clk_a { 33 audio_clk_a: audio_clk_a {
23 compatible = "fixed-clock"; 34 compatible = "fixed-clock";
24 #clock-cells = <0>; 35 #clock-cells = <0>;
25 clock-frequency = <0>; 36 clock-frequency = <0>;
26 }; 37 };
27 38
28 audio_clk_b: audio_clk_b { 39 audio_clk_b: audio_clk_b {
29 compatible = "fixed-clock"; 40 compatible = "fixed-clock";
30 #clock-cells = <0>; 41 #clock-cells = <0>;
31 clock-frequency = <0>; 42 clock-frequency = <0>;
32 }; 43 };
33 44
34 audio_clk_c: audio_clk_c { 45 audio_clk_c: audio_clk_c {
35 compatible = "fixed-clock"; 46 compatible = "fixed-clock";
36 #clock-cells = <0>; 47 #clock-cells = <0>;
37 clock-frequency = <0>; 48 clock-frequency = <0>;
38 }; 49 };
39 50
40 /* External CAN clock - to be overridd 51 /* External CAN clock - to be overridden by boards that provide it */
41 can_clk: can { 52 can_clk: can {
42 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
43 #clock-cells = <0>; 54 #clock-cells = <0>;
44 clock-frequency = <0>; 55 clock-frequency = <0>;
45 }; 56 };
46 57
47 cluster1_opp: opp-table-1 { 58 cluster1_opp: opp-table-1 {
48 compatible = "operating-points 59 compatible = "operating-points-v2";
49 opp-shared; 60 opp-shared;
50 opp-800000000 { 61 opp-800000000 {
51 opp-hz = /bits/ 64 <80 62 opp-hz = /bits/ 64 <800000000>;
>> 63 opp-microvolt = <820000>;
52 clock-latency-ns = <30 64 clock-latency-ns = <300000>;
53 }; 65 };
54 opp-1000000000 { 66 opp-1000000000 {
55 opp-hz = /bits/ 64 <10 67 opp-hz = /bits/ 64 <1000000000>;
>> 68 opp-microvolt = <820000>;
56 clock-latency-ns = <30 69 clock-latency-ns = <300000>;
57 }; 70 };
58 opp-1200000000 { 71 opp-1200000000 {
59 opp-hz = /bits/ 64 <12 72 opp-hz = /bits/ 64 <1200000000>;
>> 73 opp-microvolt = <820000>;
60 clock-latency-ns = <30 74 clock-latency-ns = <300000>;
61 opp-suspend; 75 opp-suspend;
62 }; 76 };
63 }; 77 };
64 78
65 cpus { 79 cpus {
66 #address-cells = <1>; 80 #address-cells = <1>;
67 #size-cells = <0>; 81 #size-cells = <0>;
68 82
69 a53_0: cpu@0 { 83 a53_0: cpu@0 {
70 compatible = "arm,cort 84 compatible = "arm,cortex-a53";
71 reg = <0>; 85 reg = <0>;
72 device_type = "cpu"; 86 device_type = "cpu";
73 #cooling-cells = <2>; 87 #cooling-cells = <2>;
74 power-domains = <&sysc 88 power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
75 next-level-cache = <&L 89 next-level-cache = <&L2_CA53>;
76 enable-method = "psci" 90 enable-method = "psci";
77 cpu-idle-states = <&CP 91 cpu-idle-states = <&CPU_SLEEP_0>;
78 dynamic-power-coeffici 92 dynamic-power-coefficient = <277>;
79 clocks = <&cpg CPG_COR !! 93 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
80 operating-points-v2 = 94 operating-points-v2 = <&cluster1_opp>;
81 }; 95 };
82 96
83 a53_1: cpu@1 { 97 a53_1: cpu@1 {
84 compatible = "arm,cort 98 compatible = "arm,cortex-a53";
85 reg = <1>; 99 reg = <1>;
86 device_type = "cpu"; 100 device_type = "cpu";
87 power-domains = <&sysc 101 power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
88 next-level-cache = <&L 102 next-level-cache = <&L2_CA53>;
89 enable-method = "psci" 103 enable-method = "psci";
90 cpu-idle-states = <&CP 104 cpu-idle-states = <&CPU_SLEEP_0>;
91 clocks = <&cpg CPG_COR !! 105 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
92 operating-points-v2 = 106 operating-points-v2 = <&cluster1_opp>;
93 }; 107 };
94 108
95 L2_CA53: cache-controller-0 { 109 L2_CA53: cache-controller-0 {
96 compatible = "cache"; 110 compatible = "cache";
97 power-domains = <&sysc 111 power-domains = <&sysc R8A77990_PD_CA53_SCU>;
98 cache-unified; 112 cache-unified;
99 cache-level = <2>; 113 cache-level = <2>;
100 }; 114 };
101 115
102 idle-states { 116 idle-states {
103 entry-method = "psci"; 117 entry-method = "psci";
104 118
105 CPU_SLEEP_0: cpu-sleep 119 CPU_SLEEP_0: cpu-sleep-0 {
106 compatible = " 120 compatible = "arm,idle-state";
107 arm,psci-suspe 121 arm,psci-suspend-param = <0x0010000>;
108 local-timer-st 122 local-timer-stop;
109 entry-latency- 123 entry-latency-us = <700>;
110 exit-latency-u 124 exit-latency-us = <700>;
111 min-residency- 125 min-residency-us = <5000>;
112 }; 126 };
113 }; 127 };
114 }; 128 };
115 129
116 extal_clk: extal { 130 extal_clk: extal {
117 compatible = "fixed-clock"; 131 compatible = "fixed-clock";
118 #clock-cells = <0>; 132 #clock-cells = <0>;
119 /* This value must be overridd 133 /* This value must be overridden by the board */
120 clock-frequency = <0>; 134 clock-frequency = <0>;
121 }; 135 };
122 136
123 /* External PCIe clock - can be overri 137 /* External PCIe clock - can be overridden by the board */
124 pcie_bus_clk: pcie_bus { 138 pcie_bus_clk: pcie_bus {
125 compatible = "fixed-clock"; 139 compatible = "fixed-clock";
126 #clock-cells = <0>; 140 #clock-cells = <0>;
127 clock-frequency = <0>; 141 clock-frequency = <0>;
128 }; 142 };
129 143
130 pmu_a53 { 144 pmu_a53 {
131 compatible = "arm,cortex-a53-p 145 compatible = "arm,cortex-a53-pmu";
132 interrupts-extended = <&gic GI 146 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
133 <&gic GI 147 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-affinity = <&a53_0>, 148 interrupt-affinity = <&a53_0>, <&a53_1>;
135 }; 149 };
136 150
137 psci { 151 psci {
138 compatible = "arm,psci-1.0", " 152 compatible = "arm,psci-1.0", "arm,psci-0.2";
139 method = "smc"; 153 method = "smc";
140 }; 154 };
141 155
142 /* External SCIF clock - to be overrid 156 /* External SCIF clock - to be overridden by boards that provide it */
143 scif_clk: scif { 157 scif_clk: scif {
144 compatible = "fixed-clock"; 158 compatible = "fixed-clock";
145 #clock-cells = <0>; 159 #clock-cells = <0>;
146 clock-frequency = <0>; 160 clock-frequency = <0>;
147 }; 161 };
148 162
149 soc: soc { 163 soc: soc {
150 compatible = "simple-bus"; 164 compatible = "simple-bus";
151 interrupt-parent = <&gic>; 165 interrupt-parent = <&gic>;
152 #address-cells = <2>; 166 #address-cells = <2>;
153 #size-cells = <2>; 167 #size-cells = <2>;
154 ranges; 168 ranges;
155 169
156 rwdt: watchdog@e6020000 { 170 rwdt: watchdog@e6020000 {
157 compatible = "renesas, 171 compatible = "renesas,r8a77990-wdt",
158 "renesas, 172 "renesas,rcar-gen3-wdt";
159 reg = <0 0xe6020000 0 173 reg = <0 0xe6020000 0 0x0c>;
160 interrupts = <GIC_SPI <<
161 clocks = <&cpg CPG_MOD 174 clocks = <&cpg CPG_MOD 402>;
162 power-domains = <&sysc 175 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
163 resets = <&cpg 402>; 176 resets = <&cpg 402>;
164 status = "disabled"; 177 status = "disabled";
165 }; 178 };
166 179
167 gpio0: gpio@e6050000 { 180 gpio0: gpio@e6050000 {
168 compatible = "renesas, 181 compatible = "renesas,gpio-r8a77990",
169 "renesas, 182 "renesas,rcar-gen3-gpio";
170 reg = <0 0xe6050000 0 183 reg = <0 0xe6050000 0 0x50>;
171 interrupts = <GIC_SPI 184 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
172 #gpio-cells = <2>; 185 #gpio-cells = <2>;
173 gpio-controller; 186 gpio-controller;
174 gpio-ranges = <&pfc 0 187 gpio-ranges = <&pfc 0 0 18>;
175 #interrupt-cells = <2> 188 #interrupt-cells = <2>;
176 interrupt-controller; 189 interrupt-controller;
177 clocks = <&cpg CPG_MOD 190 clocks = <&cpg CPG_MOD 912>;
178 power-domains = <&sysc 191 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
179 resets = <&cpg 912>; 192 resets = <&cpg 912>;
180 }; 193 };
181 194
182 gpio1: gpio@e6051000 { 195 gpio1: gpio@e6051000 {
183 compatible = "renesas, 196 compatible = "renesas,gpio-r8a77990",
184 "renesas, 197 "renesas,rcar-gen3-gpio";
185 reg = <0 0xe6051000 0 198 reg = <0 0xe6051000 0 0x50>;
186 interrupts = <GIC_SPI 199 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
187 #gpio-cells = <2>; 200 #gpio-cells = <2>;
188 gpio-controller; 201 gpio-controller;
189 gpio-ranges = <&pfc 0 202 gpio-ranges = <&pfc 0 32 23>;
190 #interrupt-cells = <2> 203 #interrupt-cells = <2>;
191 interrupt-controller; 204 interrupt-controller;
192 clocks = <&cpg CPG_MOD 205 clocks = <&cpg CPG_MOD 911>;
193 power-domains = <&sysc 206 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
194 resets = <&cpg 911>; 207 resets = <&cpg 911>;
195 }; 208 };
196 209
197 gpio2: gpio@e6052000 { 210 gpio2: gpio@e6052000 {
198 compatible = "renesas, 211 compatible = "renesas,gpio-r8a77990",
199 "renesas, 212 "renesas,rcar-gen3-gpio";
200 reg = <0 0xe6052000 0 213 reg = <0 0xe6052000 0 0x50>;
201 interrupts = <GIC_SPI 214 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
202 #gpio-cells = <2>; 215 #gpio-cells = <2>;
203 gpio-controller; 216 gpio-controller;
204 gpio-ranges = <&pfc 0 217 gpio-ranges = <&pfc 0 64 26>;
205 #interrupt-cells = <2> 218 #interrupt-cells = <2>;
206 interrupt-controller; 219 interrupt-controller;
207 clocks = <&cpg CPG_MOD 220 clocks = <&cpg CPG_MOD 910>;
208 power-domains = <&sysc 221 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
209 resets = <&cpg 910>; 222 resets = <&cpg 910>;
210 }; 223 };
211 224
212 gpio3: gpio@e6053000 { 225 gpio3: gpio@e6053000 {
213 compatible = "renesas, 226 compatible = "renesas,gpio-r8a77990",
214 "renesas, 227 "renesas,rcar-gen3-gpio";
215 reg = <0 0xe6053000 0 228 reg = <0 0xe6053000 0 0x50>;
216 interrupts = <GIC_SPI 229 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
217 #gpio-cells = <2>; 230 #gpio-cells = <2>;
218 gpio-controller; 231 gpio-controller;
219 gpio-ranges = <&pfc 0 232 gpio-ranges = <&pfc 0 96 16>;
220 #interrupt-cells = <2> 233 #interrupt-cells = <2>;
221 interrupt-controller; 234 interrupt-controller;
222 clocks = <&cpg CPG_MOD 235 clocks = <&cpg CPG_MOD 909>;
223 power-domains = <&sysc 236 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
224 resets = <&cpg 909>; 237 resets = <&cpg 909>;
225 }; 238 };
226 239
227 gpio4: gpio@e6054000 { 240 gpio4: gpio@e6054000 {
228 compatible = "renesas, 241 compatible = "renesas,gpio-r8a77990",
229 "renesas, 242 "renesas,rcar-gen3-gpio";
230 reg = <0 0xe6054000 0 243 reg = <0 0xe6054000 0 0x50>;
231 interrupts = <GIC_SPI 244 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
232 #gpio-cells = <2>; 245 #gpio-cells = <2>;
233 gpio-controller; 246 gpio-controller;
234 gpio-ranges = <&pfc 0 247 gpio-ranges = <&pfc 0 128 11>;
235 #interrupt-cells = <2> 248 #interrupt-cells = <2>;
236 interrupt-controller; 249 interrupt-controller;
237 clocks = <&cpg CPG_MOD 250 clocks = <&cpg CPG_MOD 908>;
238 power-domains = <&sysc 251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
239 resets = <&cpg 908>; 252 resets = <&cpg 908>;
240 }; 253 };
241 254
242 gpio5: gpio@e6055000 { 255 gpio5: gpio@e6055000 {
243 compatible = "renesas, 256 compatible = "renesas,gpio-r8a77990",
244 "renesas, 257 "renesas,rcar-gen3-gpio";
245 reg = <0 0xe6055000 0 258 reg = <0 0xe6055000 0 0x50>;
246 interrupts = <GIC_SPI 259 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
247 #gpio-cells = <2>; 260 #gpio-cells = <2>;
248 gpio-controller; 261 gpio-controller;
249 gpio-ranges = <&pfc 0 262 gpio-ranges = <&pfc 0 160 20>;
250 #interrupt-cells = <2> 263 #interrupt-cells = <2>;
251 interrupt-controller; 264 interrupt-controller;
252 clocks = <&cpg CPG_MOD 265 clocks = <&cpg CPG_MOD 907>;
253 power-domains = <&sysc 266 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
254 resets = <&cpg 907>; 267 resets = <&cpg 907>;
255 }; 268 };
256 269
257 gpio6: gpio@e6055400 { 270 gpio6: gpio@e6055400 {
258 compatible = "renesas, 271 compatible = "renesas,gpio-r8a77990",
259 "renesas, 272 "renesas,rcar-gen3-gpio";
260 reg = <0 0xe6055400 0 273 reg = <0 0xe6055400 0 0x50>;
261 interrupts = <GIC_SPI 274 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
262 #gpio-cells = <2>; 275 #gpio-cells = <2>;
263 gpio-controller; 276 gpio-controller;
264 gpio-ranges = <&pfc 0 277 gpio-ranges = <&pfc 0 192 18>;
265 #interrupt-cells = <2> 278 #interrupt-cells = <2>;
266 interrupt-controller; 279 interrupt-controller;
267 clocks = <&cpg CPG_MOD 280 clocks = <&cpg CPG_MOD 906>;
268 power-domains = <&sysc 281 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
269 resets = <&cpg 906>; 282 resets = <&cpg 906>;
270 }; 283 };
271 284
272 pfc: pinctrl@e6060000 { 285 pfc: pinctrl@e6060000 {
273 compatible = "renesas, 286 compatible = "renesas,pfc-r8a77990";
274 reg = <0 0xe6060000 0 287 reg = <0 0xe6060000 0 0x508>;
275 }; 288 };
276 289
277 i2c_dvfs: i2c@e60b0000 { 290 i2c_dvfs: i2c@e60b0000 {
278 #address-cells = <1>; 291 #address-cells = <1>;
279 #size-cells = <0>; 292 #size-cells = <0>;
280 compatible = "renesas, 293 compatible = "renesas,iic-r8a77990",
281 "renesas, 294 "renesas,rcar-gen3-iic",
282 "renesas, 295 "renesas,rmobile-iic";
283 reg = <0 0xe60b0000 0 296 reg = <0 0xe60b0000 0 0x425>;
284 interrupts = <GIC_SPI 297 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&cpg CPG_MOD 298 clocks = <&cpg CPG_MOD 926>;
286 power-domains = <&sysc 299 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
287 resets = <&cpg 926>; 300 resets = <&cpg 926>;
288 dmas = <&dmac0 0x11>, 301 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
289 dma-names = "tx", "rx" 302 dma-names = "tx", "rx";
290 status = "disabled"; 303 status = "disabled";
291 }; 304 };
292 305
293 cmt0: timer@e60f0000 { 306 cmt0: timer@e60f0000 {
294 compatible = "renesas, 307 compatible = "renesas,r8a77990-cmt0",
295 "renesas, 308 "renesas,rcar-gen3-cmt0";
296 reg = <0 0xe60f0000 0 309 reg = <0 0xe60f0000 0 0x1004>;
297 interrupts = <GIC_SPI 310 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 311 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
299 clocks = <&cpg CPG_MOD 312 clocks = <&cpg CPG_MOD 303>;
300 clock-names = "fck"; 313 clock-names = "fck";
301 power-domains = <&sysc 314 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
302 resets = <&cpg 303>; 315 resets = <&cpg 303>;
303 status = "disabled"; 316 status = "disabled";
304 }; 317 };
305 318
306 cmt1: timer@e6130000 { 319 cmt1: timer@e6130000 {
307 compatible = "renesas, 320 compatible = "renesas,r8a77990-cmt1",
308 "renesas, 321 "renesas,rcar-gen3-cmt1";
309 reg = <0 0xe6130000 0 322 reg = <0 0xe6130000 0 0x1004>;
310 interrupts = <GIC_SPI 323 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
311 <GIC_SPI 324 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
312 <GIC_SPI 325 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
313 <GIC_SPI 326 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
314 <GIC_SPI 327 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
315 <GIC_SPI 328 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
316 <GIC_SPI 329 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 330 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
318 clocks = <&cpg CPG_MOD 331 clocks = <&cpg CPG_MOD 302>;
319 clock-names = "fck"; 332 clock-names = "fck";
320 power-domains = <&sysc 333 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
321 resets = <&cpg 302>; 334 resets = <&cpg 302>;
322 status = "disabled"; 335 status = "disabled";
323 }; 336 };
324 337
325 cmt2: timer@e6140000 { 338 cmt2: timer@e6140000 {
326 compatible = "renesas, 339 compatible = "renesas,r8a77990-cmt1",
327 "renesas, 340 "renesas,rcar-gen3-cmt1";
328 reg = <0 0xe6140000 0 341 reg = <0 0xe6140000 0 0x1004>;
329 interrupts = <GIC_SPI 342 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 343 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 344 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 345 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
333 <GIC_SPI 346 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 347 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
335 <GIC_SPI 348 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 349 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
337 clocks = <&cpg CPG_MOD 350 clocks = <&cpg CPG_MOD 301>;
338 clock-names = "fck"; 351 clock-names = "fck";
339 power-domains = <&sysc 352 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
340 resets = <&cpg 301>; 353 resets = <&cpg 301>;
341 status = "disabled"; 354 status = "disabled";
342 }; 355 };
343 356
344 cmt3: timer@e6148000 { 357 cmt3: timer@e6148000 {
345 compatible = "renesas, 358 compatible = "renesas,r8a77990-cmt1",
346 "renesas, 359 "renesas,rcar-gen3-cmt1";
347 reg = <0 0xe6148000 0 360 reg = <0 0xe6148000 0 0x1004>;
348 interrupts = <GIC_SPI 361 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 362 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
350 <GIC_SPI 363 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
351 <GIC_SPI 364 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 365 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 366 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 367 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 368 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
356 clocks = <&cpg CPG_MOD 369 clocks = <&cpg CPG_MOD 300>;
357 clock-names = "fck"; 370 clock-names = "fck";
358 power-domains = <&sysc 371 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
359 resets = <&cpg 300>; 372 resets = <&cpg 300>;
360 status = "disabled"; 373 status = "disabled";
361 }; 374 };
362 375
363 cpg: clock-controller@e6150000 376 cpg: clock-controller@e6150000 {
364 compatible = "renesas, 377 compatible = "renesas,r8a77990-cpg-mssr";
365 reg = <0 0xe6150000 0 378 reg = <0 0xe6150000 0 0x1000>;
366 clocks = <&extal_clk>; 379 clocks = <&extal_clk>;
367 clock-names = "extal"; 380 clock-names = "extal";
368 #clock-cells = <2>; 381 #clock-cells = <2>;
369 #power-domain-cells = 382 #power-domain-cells = <0>;
370 #reset-cells = <1>; 383 #reset-cells = <1>;
371 }; 384 };
372 385
373 rst: reset-controller@e6160000 386 rst: reset-controller@e6160000 {
374 compatible = "renesas, 387 compatible = "renesas,r8a77990-rst";
375 reg = <0 0xe6160000 0 388 reg = <0 0xe6160000 0 0x0200>;
376 }; 389 };
377 390
378 sysc: system-controller@e61800 391 sysc: system-controller@e6180000 {
379 compatible = "renesas, 392 compatible = "renesas,r8a77990-sysc";
380 reg = <0 0xe6180000 0 393 reg = <0 0xe6180000 0 0x0400>;
381 #power-domain-cells = 394 #power-domain-cells = <1>;
382 }; 395 };
383 396
384 thermal: thermal@e6190000 { 397 thermal: thermal@e6190000 {
385 compatible = "renesas, 398 compatible = "renesas,thermal-r8a77990";
386 reg = <0 0xe6190000 0 399 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
387 interrupts = <GIC_SPI 400 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
388 <GIC_SPI 401 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
389 <GIC_SPI 402 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
390 clocks = <&cpg CPG_MOD 403 clocks = <&cpg CPG_MOD 522>;
391 power-domains = <&sysc 404 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
392 resets = <&cpg 522>; 405 resets = <&cpg 522>;
393 #thermal-sensor-cells 406 #thermal-sensor-cells = <0>;
394 }; 407 };
395 408
396 intc_ex: interrupt-controller@ 409 intc_ex: interrupt-controller@e61c0000 {
397 compatible = "renesas, 410 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
398 #interrupt-cells = <2> 411 #interrupt-cells = <2>;
399 interrupt-controller; 412 interrupt-controller;
400 reg = <0 0xe61c0000 0 413 reg = <0 0xe61c0000 0 0x200>;
401 interrupts = <GIC_SPI 414 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
402 <GIC_SPI 415 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
403 <GIC_SPI 416 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
404 <GIC_SPI 417 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
405 <GIC_SPI 418 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
406 <GIC_SPI 419 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 420 clocks = <&cpg CPG_MOD 407>;
408 power-domains = <&sysc 421 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
409 resets = <&cpg 407>; 422 resets = <&cpg 407>;
410 }; 423 };
411 424
412 tmu0: timer@e61e0000 { 425 tmu0: timer@e61e0000 {
413 compatible = "renesas, 426 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
414 reg = <0 0xe61e0000 0 427 reg = <0 0xe61e0000 0 0x30>;
415 interrupts = <GIC_SPI 428 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
416 <GIC_SPI 429 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
417 <GIC_SPI 430 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
418 interrupt-names = "tun <<
419 clocks = <&cpg CPG_MOD 431 clocks = <&cpg CPG_MOD 125>;
420 clock-names = "fck"; 432 clock-names = "fck";
421 power-domains = <&sysc 433 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
422 resets = <&cpg 125>; 434 resets = <&cpg 125>;
423 status = "disabled"; 435 status = "disabled";
424 }; 436 };
425 437
426 tmu1: timer@e6fc0000 { 438 tmu1: timer@e6fc0000 {
427 compatible = "renesas, 439 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
428 reg = <0 0xe6fc0000 0 440 reg = <0 0xe6fc0000 0 0x30>;
429 interrupts = <GIC_SPI 441 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
430 <GIC_SPI 442 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
431 <GIC_SPI !! 443 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
432 <GIC_SPI <<
433 interrupt-names = "tun <<
434 clocks = <&cpg CPG_MOD 444 clocks = <&cpg CPG_MOD 124>;
435 clock-names = "fck"; 445 clock-names = "fck";
436 power-domains = <&sysc 446 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
437 resets = <&cpg 124>; 447 resets = <&cpg 124>;
438 status = "disabled"; 448 status = "disabled";
439 }; 449 };
440 450
441 tmu2: timer@e6fd0000 { 451 tmu2: timer@e6fd0000 {
442 compatible = "renesas, 452 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
443 reg = <0 0xe6fd0000 0 453 reg = <0 0xe6fd0000 0 0x30>;
444 interrupts = <GIC_SPI 454 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
445 <GIC_SPI 455 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
446 <GIC_SPI !! 456 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
447 <GIC_SPI <<
448 interrupt-names = "tun <<
449 clocks = <&cpg CPG_MOD 457 clocks = <&cpg CPG_MOD 123>;
450 clock-names = "fck"; 458 clock-names = "fck";
451 power-domains = <&sysc 459 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
452 resets = <&cpg 123>; 460 resets = <&cpg 123>;
453 status = "disabled"; 461 status = "disabled";
454 }; 462 };
455 463
456 tmu3: timer@e6fe0000 { 464 tmu3: timer@e6fe0000 {
457 compatible = "renesas, 465 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
458 reg = <0 0xe6fe0000 0 466 reg = <0 0xe6fe0000 0 0x30>;
459 interrupts = <GIC_SPI 467 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
460 <GIC_SPI 468 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
461 <GIC_SPI 469 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
462 interrupt-names = "tun <<
463 clocks = <&cpg CPG_MOD 470 clocks = <&cpg CPG_MOD 122>;
464 clock-names = "fck"; 471 clock-names = "fck";
465 power-domains = <&sysc 472 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
466 resets = <&cpg 122>; 473 resets = <&cpg 122>;
467 status = "disabled"; 474 status = "disabled";
468 }; 475 };
469 476
470 tmu4: timer@ffc00000 { 477 tmu4: timer@ffc00000 {
471 compatible = "renesas, 478 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
472 reg = <0 0xffc00000 0 479 reg = <0 0xffc00000 0 0x30>;
473 interrupts = <GIC_SPI 480 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
474 <GIC_SPI 481 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
475 <GIC_SPI 482 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
476 interrupt-names = "tun <<
477 clocks = <&cpg CPG_MOD 483 clocks = <&cpg CPG_MOD 121>;
478 clock-names = "fck"; 484 clock-names = "fck";
479 power-domains = <&sysc 485 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
480 resets = <&cpg 121>; 486 resets = <&cpg 121>;
481 status = "disabled"; 487 status = "disabled";
482 }; 488 };
483 489
484 i2c0: i2c@e6500000 { 490 i2c0: i2c@e6500000 {
485 #address-cells = <1>; 491 #address-cells = <1>;
486 #size-cells = <0>; 492 #size-cells = <0>;
487 compatible = "renesas, 493 compatible = "renesas,i2c-r8a77990",
488 "renesas, 494 "renesas,rcar-gen3-i2c";
489 reg = <0 0xe6500000 0 495 reg = <0 0xe6500000 0 0x40>;
490 interrupts = <GIC_SPI 496 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&cpg CPG_MOD 497 clocks = <&cpg CPG_MOD 931>;
492 power-domains = <&sysc 498 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
493 resets = <&cpg 931>; 499 resets = <&cpg 931>;
494 dmas = <&dmac1 0x91>, 500 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
495 <&dmac2 0x91>, 501 <&dmac2 0x91>, <&dmac2 0x90>;
496 dma-names = "tx", "rx" 502 dma-names = "tx", "rx", "tx", "rx";
497 i2c-scl-internal-delay 503 i2c-scl-internal-delay-ns = <110>;
498 status = "disabled"; 504 status = "disabled";
499 }; 505 };
500 506
501 i2c1: i2c@e6508000 { 507 i2c1: i2c@e6508000 {
502 #address-cells = <1>; 508 #address-cells = <1>;
503 #size-cells = <0>; 509 #size-cells = <0>;
504 compatible = "renesas, 510 compatible = "renesas,i2c-r8a77990",
505 "renesas, 511 "renesas,rcar-gen3-i2c";
506 reg = <0 0xe6508000 0 512 reg = <0 0xe6508000 0 0x40>;
507 interrupts = <GIC_SPI 513 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 514 clocks = <&cpg CPG_MOD 930>;
509 power-domains = <&sysc 515 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
510 resets = <&cpg 930>; 516 resets = <&cpg 930>;
511 dmas = <&dmac1 0x93>, 517 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
512 <&dmac2 0x93>, 518 <&dmac2 0x93>, <&dmac2 0x92>;
513 dma-names = "tx", "rx" 519 dma-names = "tx", "rx", "tx", "rx";
514 i2c-scl-internal-delay 520 i2c-scl-internal-delay-ns = <6>;
515 status = "disabled"; 521 status = "disabled";
516 }; 522 };
517 523
518 i2c2: i2c@e6510000 { 524 i2c2: i2c@e6510000 {
519 #address-cells = <1>; 525 #address-cells = <1>;
520 #size-cells = <0>; 526 #size-cells = <0>;
521 compatible = "renesas, 527 compatible = "renesas,i2c-r8a77990",
522 "renesas, 528 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6510000 0 529 reg = <0 0xe6510000 0 0x40>;
524 interrupts = <GIC_SPI 530 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 531 clocks = <&cpg CPG_MOD 929>;
526 power-domains = <&sysc 532 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
527 resets = <&cpg 929>; 533 resets = <&cpg 929>;
528 dmas = <&dmac1 0x95>, 534 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
529 <&dmac2 0x95>, 535 <&dmac2 0x95>, <&dmac2 0x94>;
530 dma-names = "tx", "rx" 536 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 537 i2c-scl-internal-delay-ns = <6>;
532 status = "disabled"; 538 status = "disabled";
533 }; 539 };
534 540
535 i2c3: i2c@e66d0000 { 541 i2c3: i2c@e66d0000 {
536 #address-cells = <1>; 542 #address-cells = <1>;
537 #size-cells = <0>; 543 #size-cells = <0>;
538 compatible = "renesas, 544 compatible = "renesas,i2c-r8a77990",
539 "renesas, 545 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe66d0000 0 546 reg = <0 0xe66d0000 0 0x40>;
541 interrupts = <GIC_SPI 547 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 548 clocks = <&cpg CPG_MOD 928>;
543 power-domains = <&sysc 549 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
544 resets = <&cpg 928>; 550 resets = <&cpg 928>;
545 dmas = <&dmac0 0x97>, 551 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
546 dma-names = "tx", "rx" 552 dma-names = "tx", "rx";
547 i2c-scl-internal-delay 553 i2c-scl-internal-delay-ns = <110>;
548 status = "disabled"; 554 status = "disabled";
549 }; 555 };
550 556
551 i2c4: i2c@e66d8000 { 557 i2c4: i2c@e66d8000 {
552 #address-cells = <1>; 558 #address-cells = <1>;
553 #size-cells = <0>; 559 #size-cells = <0>;
554 compatible = "renesas, 560 compatible = "renesas,i2c-r8a77990",
555 "renesas, 561 "renesas,rcar-gen3-i2c";
556 reg = <0 0xe66d8000 0 562 reg = <0 0xe66d8000 0 0x40>;
557 interrupts = <GIC_SPI 563 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 564 clocks = <&cpg CPG_MOD 927>;
559 power-domains = <&sysc 565 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
560 resets = <&cpg 927>; 566 resets = <&cpg 927>;
561 dmas = <&dmac0 0x99>, 567 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
562 dma-names = "tx", "rx" 568 dma-names = "tx", "rx";
563 i2c-scl-internal-delay 569 i2c-scl-internal-delay-ns = <6>;
564 status = "disabled"; 570 status = "disabled";
565 }; 571 };
566 572
567 i2c5: i2c@e66e0000 { 573 i2c5: i2c@e66e0000 {
568 #address-cells = <1>; 574 #address-cells = <1>;
569 #size-cells = <0>; 575 #size-cells = <0>;
570 compatible = "renesas, 576 compatible = "renesas,i2c-r8a77990",
571 "renesas, 577 "renesas,rcar-gen3-i2c";
572 reg = <0 0xe66e0000 0 578 reg = <0 0xe66e0000 0 0x40>;
573 interrupts = <GIC_SPI 579 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&cpg CPG_MOD 580 clocks = <&cpg CPG_MOD 919>;
575 power-domains = <&sysc 581 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
576 resets = <&cpg 919>; 582 resets = <&cpg 919>;
577 dmas = <&dmac0 0x9b>, 583 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
578 dma-names = "tx", "rx" 584 dma-names = "tx", "rx";
579 i2c-scl-internal-delay 585 i2c-scl-internal-delay-ns = <6>;
580 status = "disabled"; 586 status = "disabled";
581 }; 587 };
582 588
583 i2c6: i2c@e66e8000 { 589 i2c6: i2c@e66e8000 {
584 #address-cells = <1>; 590 #address-cells = <1>;
585 #size-cells = <0>; 591 #size-cells = <0>;
586 compatible = "renesas, 592 compatible = "renesas,i2c-r8a77990",
587 "renesas, 593 "renesas,rcar-gen3-i2c";
588 reg = <0 0xe66e8000 0 594 reg = <0 0xe66e8000 0 0x40>;
589 interrupts = <GIC_SPI 595 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&cpg CPG_MOD 596 clocks = <&cpg CPG_MOD 918>;
591 power-domains = <&sysc 597 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
592 resets = <&cpg 918>; 598 resets = <&cpg 918>;
593 dmas = <&dmac0 0x9d>, 599 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
594 dma-names = "tx", "rx" 600 dma-names = "tx", "rx";
595 i2c-scl-internal-delay 601 i2c-scl-internal-delay-ns = <6>;
596 status = "disabled"; 602 status = "disabled";
597 }; 603 };
598 604
599 i2c7: i2c@e6690000 { 605 i2c7: i2c@e6690000 {
600 #address-cells = <1>; 606 #address-cells = <1>;
601 #size-cells = <0>; 607 #size-cells = <0>;
602 compatible = "renesas, 608 compatible = "renesas,i2c-r8a77990",
603 "renesas, 609 "renesas,rcar-gen3-i2c";
604 reg = <0 0xe6690000 0 610 reg = <0 0xe6690000 0 0x40>;
605 interrupts = <GIC_SPI 611 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&cpg CPG_MOD 612 clocks = <&cpg CPG_MOD 1003>;
607 power-domains = <&sysc 613 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
608 resets = <&cpg 1003>; 614 resets = <&cpg 1003>;
609 i2c-scl-internal-delay 615 i2c-scl-internal-delay-ns = <6>;
610 status = "disabled"; 616 status = "disabled";
611 }; 617 };
612 618
613 hscif0: serial@e6540000 { 619 hscif0: serial@e6540000 {
614 compatible = "renesas, 620 compatible = "renesas,hscif-r8a77990",
615 "renesas, 621 "renesas,rcar-gen3-hscif",
616 "renesas, 622 "renesas,hscif";
617 reg = <0 0xe6540000 0 623 reg = <0 0xe6540000 0 0x60>;
618 interrupts = <GIC_SPI 624 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&cpg CPG_MOD 625 clocks = <&cpg CPG_MOD 520>,
620 <&cpg CPG_COR 626 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
621 <&scif_clk>; 627 <&scif_clk>;
622 clock-names = "fck", " 628 clock-names = "fck", "brg_int", "scif_clk";
623 dmas = <&dmac1 0x31>, 629 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
624 <&dmac2 0x31>, 630 <&dmac2 0x31>, <&dmac2 0x30>;
625 dma-names = "tx", "rx" 631 dma-names = "tx", "rx", "tx", "rx";
626 power-domains = <&sysc 632 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
627 resets = <&cpg 520>; 633 resets = <&cpg 520>;
628 status = "disabled"; 634 status = "disabled";
629 }; 635 };
630 636
631 hscif1: serial@e6550000 { 637 hscif1: serial@e6550000 {
632 compatible = "renesas, 638 compatible = "renesas,hscif-r8a77990",
633 "renesas, 639 "renesas,rcar-gen3-hscif",
634 "renesas, 640 "renesas,hscif";
635 reg = <0 0xe6550000 0 641 reg = <0 0xe6550000 0 0x60>;
636 interrupts = <GIC_SPI 642 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&cpg CPG_MOD 643 clocks = <&cpg CPG_MOD 519>,
638 <&cpg CPG_COR 644 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
639 <&scif_clk>; 645 <&scif_clk>;
640 clock-names = "fck", " 646 clock-names = "fck", "brg_int", "scif_clk";
641 dmas = <&dmac1 0x33>, 647 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
642 <&dmac2 0x33>, 648 <&dmac2 0x33>, <&dmac2 0x32>;
643 dma-names = "tx", "rx" 649 dma-names = "tx", "rx", "tx", "rx";
644 power-domains = <&sysc 650 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
645 resets = <&cpg 519>; 651 resets = <&cpg 519>;
646 status = "disabled"; 652 status = "disabled";
647 }; 653 };
648 654
649 hscif2: serial@e6560000 { 655 hscif2: serial@e6560000 {
650 compatible = "renesas, 656 compatible = "renesas,hscif-r8a77990",
651 "renesas, 657 "renesas,rcar-gen3-hscif",
652 "renesas, 658 "renesas,hscif";
653 reg = <0 0xe6560000 0 659 reg = <0 0xe6560000 0 0x60>;
654 interrupts = <GIC_SPI 660 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 661 clocks = <&cpg CPG_MOD 518>,
656 <&cpg CPG_COR 662 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
657 <&scif_clk>; 663 <&scif_clk>;
658 clock-names = "fck", " 664 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x35>, 665 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
660 <&dmac2 0x35>, 666 <&dmac2 0x35>, <&dmac2 0x34>;
661 dma-names = "tx", "rx" 667 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 668 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
663 resets = <&cpg 518>; 669 resets = <&cpg 518>;
664 status = "disabled"; 670 status = "disabled";
665 }; 671 };
666 672
667 hscif3: serial@e66a0000 { 673 hscif3: serial@e66a0000 {
668 compatible = "renesas, 674 compatible = "renesas,hscif-r8a77990",
669 "renesas, 675 "renesas,rcar-gen3-hscif",
670 "renesas, 676 "renesas,hscif";
671 reg = <0 0xe66a0000 0 677 reg = <0 0xe66a0000 0 0x60>;
672 interrupts = <GIC_SPI 678 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 679 clocks = <&cpg CPG_MOD 517>,
674 <&cpg CPG_COR 680 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
675 <&scif_clk>; 681 <&scif_clk>;
676 clock-names = "fck", " 682 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac0 0x37>, 683 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
678 dma-names = "tx", "rx" 684 dma-names = "tx", "rx";
679 power-domains = <&sysc 685 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
680 resets = <&cpg 517>; 686 resets = <&cpg 517>;
681 status = "disabled"; 687 status = "disabled";
682 }; 688 };
683 689
684 hscif4: serial@e66b0000 { 690 hscif4: serial@e66b0000 {
685 compatible = "renesas, 691 compatible = "renesas,hscif-r8a77990",
686 "renesas, 692 "renesas,rcar-gen3-hscif",
687 "renesas, 693 "renesas,hscif";
688 reg = <0 0xe66b0000 0 694 reg = <0 0xe66b0000 0 0x60>;
689 interrupts = <GIC_SPI 695 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&cpg CPG_MOD 696 clocks = <&cpg CPG_MOD 516>,
691 <&cpg CPG_COR 697 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
692 <&scif_clk>; 698 <&scif_clk>;
693 clock-names = "fck", " 699 clock-names = "fck", "brg_int", "scif_clk";
694 dmas = <&dmac0 0x39>, 700 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
695 dma-names = "tx", "rx" 701 dma-names = "tx", "rx";
696 power-domains = <&sysc 702 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
697 resets = <&cpg 516>; 703 resets = <&cpg 516>;
698 status = "disabled"; 704 status = "disabled";
699 }; 705 };
700 706
701 hsusb: usb@e6590000 { 707 hsusb: usb@e6590000 {
702 compatible = "renesas, 708 compatible = "renesas,usbhs-r8a77990",
703 "renesas, 709 "renesas,rcar-gen3-usbhs";
704 reg = <0 0xe6590000 0 710 reg = <0 0xe6590000 0 0x200>;
705 interrupts = <GIC_SPI 711 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
706 clocks = <&cpg CPG_MOD 712 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
707 dmas = <&usb_dmac0 0>, 713 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
708 <&usb_dmac1 0>, 714 <&usb_dmac1 0>, <&usb_dmac1 1>;
709 dma-names = "ch0", "ch 715 dma-names = "ch0", "ch1", "ch2", "ch3";
710 renesas,buswait = <11> 716 renesas,buswait = <11>;
711 phys = <&usb2_phy0 3>; 717 phys = <&usb2_phy0 3>;
712 phy-names = "usb"; 718 phy-names = "usb";
713 power-domains = <&sysc 719 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
714 resets = <&cpg 704>, < 720 resets = <&cpg 704>, <&cpg 703>;
715 status = "disabled"; 721 status = "disabled";
716 }; 722 };
717 723
718 usb_dmac0: dma-controller@e65a 724 usb_dmac0: dma-controller@e65a0000 {
719 compatible = "renesas, 725 compatible = "renesas,r8a77990-usb-dmac",
720 "renesas, 726 "renesas,usb-dmac";
721 reg = <0 0xe65a0000 0 727 reg = <0 0xe65a0000 0 0x100>;
722 interrupts = <GIC_SPI 728 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
723 <GIC_SPI 729 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
724 interrupt-names = "ch0 730 interrupt-names = "ch0", "ch1";
725 clocks = <&cpg CPG_MOD 731 clocks = <&cpg CPG_MOD 330>;
726 power-domains = <&sysc 732 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
727 resets = <&cpg 330>; 733 resets = <&cpg 330>;
728 #dma-cells = <1>; 734 #dma-cells = <1>;
729 dma-channels = <2>; 735 dma-channels = <2>;
730 }; 736 };
731 737
732 usb_dmac1: dma-controller@e65b 738 usb_dmac1: dma-controller@e65b0000 {
733 compatible = "renesas, 739 compatible = "renesas,r8a77990-usb-dmac",
734 "renesas, 740 "renesas,usb-dmac";
735 reg = <0 0xe65b0000 0 741 reg = <0 0xe65b0000 0 0x100>;
736 interrupts = <GIC_SPI 742 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
737 <GIC_SPI 743 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
738 interrupt-names = "ch0 744 interrupt-names = "ch0", "ch1";
739 clocks = <&cpg CPG_MOD 745 clocks = <&cpg CPG_MOD 331>;
740 power-domains = <&sysc 746 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
741 resets = <&cpg 331>; 747 resets = <&cpg 331>;
742 #dma-cells = <1>; 748 #dma-cells = <1>;
743 dma-channels = <2>; 749 dma-channels = <2>;
744 }; 750 };
745 751
746 arm_cc630p: crypto@e6601000 { 752 arm_cc630p: crypto@e6601000 {
747 compatible = "arm,cryp 753 compatible = "arm,cryptocell-630p-ree";
748 interrupts = <GIC_SPI 754 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
749 reg = <0x0 0xe6601000 755 reg = <0x0 0xe6601000 0 0x1000>;
750 clocks = <&cpg CPG_MOD 756 clocks = <&cpg CPG_MOD 229>;
751 resets = <&cpg 229>; 757 resets = <&cpg 229>;
752 power-domains = <&sysc 758 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
753 }; 759 };
754 760
755 dmac0: dma-controller@e6700000 761 dmac0: dma-controller@e6700000 {
756 compatible = "renesas, 762 compatible = "renesas,dmac-r8a77990",
757 "renesas, 763 "renesas,rcar-dmac";
758 reg = <0 0xe6700000 0 764 reg = <0 0xe6700000 0 0x10000>;
759 interrupts = <GIC_SPI 765 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 766 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 767 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 768 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
763 <GIC_SPI 769 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
764 <GIC_SPI 770 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
765 <GIC_SPI 771 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
766 <GIC_SPI 772 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
767 <GIC_SPI 773 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
768 <GIC_SPI 774 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
769 <GIC_SPI 775 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 776 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_SPI 777 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
772 <GIC_SPI 778 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 779 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
774 <GIC_SPI 780 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
775 <GIC_SPI 781 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
776 interrupt-names = "err 782 interrupt-names = "error",
777 "ch0", 783 "ch0", "ch1", "ch2", "ch3",
778 "ch4", 784 "ch4", "ch5", "ch6", "ch7",
779 "ch8", 785 "ch8", "ch9", "ch10", "ch11",
780 "ch12" 786 "ch12", "ch13", "ch14", "ch15";
781 clocks = <&cpg CPG_MOD 787 clocks = <&cpg CPG_MOD 219>;
782 clock-names = "fck"; 788 clock-names = "fck";
783 power-domains = <&sysc 789 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
784 resets = <&cpg 219>; 790 resets = <&cpg 219>;
785 #dma-cells = <1>; 791 #dma-cells = <1>;
786 dma-channels = <16>; 792 dma-channels = <16>;
787 iommus = <&ipmmu_ds0 0 793 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
788 <&ipmmu_ds0 2>, 794 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
789 <&ipmmu_ds0 4>, 795 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
790 <&ipmmu_ds0 6>, 796 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
791 <&ipmmu_ds0 8>, 797 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
792 <&ipmmu_ds0 10> 798 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
793 <&ipmmu_ds0 12> 799 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
794 <&ipmmu_ds0 14> 800 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
795 }; 801 };
796 802
797 dmac1: dma-controller@e7300000 803 dmac1: dma-controller@e7300000 {
798 compatible = "renesas, 804 compatible = "renesas,dmac-r8a77990",
799 "renesas, 805 "renesas,rcar-dmac";
800 reg = <0 0xe7300000 0 806 reg = <0 0xe7300000 0 0x10000>;
801 interrupts = <GIC_SPI 807 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 808 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 809 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 810 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 811 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 812 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
807 <GIC_SPI 813 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
808 <GIC_SPI 814 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 815 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 816 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 817 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 818 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 819 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 820 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 821 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 822 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 823 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
818 interrupt-names = "err 824 interrupt-names = "error",
819 "ch0", 825 "ch0", "ch1", "ch2", "ch3",
820 "ch4", 826 "ch4", "ch5", "ch6", "ch7",
821 "ch8", 827 "ch8", "ch9", "ch10", "ch11",
822 "ch12" 828 "ch12", "ch13", "ch14", "ch15";
823 clocks = <&cpg CPG_MOD 829 clocks = <&cpg CPG_MOD 218>;
824 clock-names = "fck"; 830 clock-names = "fck";
825 power-domains = <&sysc 831 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
826 resets = <&cpg 218>; 832 resets = <&cpg 218>;
827 #dma-cells = <1>; 833 #dma-cells = <1>;
828 dma-channels = <16>; 834 dma-channels = <16>;
829 iommus = <&ipmmu_ds1 0 835 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
830 <&ipmmu_ds1 2>, 836 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
831 <&ipmmu_ds1 4>, 837 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
832 <&ipmmu_ds1 6>, 838 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
833 <&ipmmu_ds1 8>, 839 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
834 <&ipmmu_ds1 10> 840 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
835 <&ipmmu_ds1 12> 841 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
836 <&ipmmu_ds1 14> 842 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
837 }; 843 };
838 844
839 dmac2: dma-controller@e7310000 845 dmac2: dma-controller@e7310000 {
840 compatible = "renesas, 846 compatible = "renesas,dmac-r8a77990",
841 "renesas, 847 "renesas,rcar-dmac";
842 reg = <0 0xe7310000 0 848 reg = <0 0xe7310000 0 0x10000>;
843 interrupts = <GIC_SPI 849 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
844 <GIC_SPI 850 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 851 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
846 <GIC_SPI 852 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
847 <GIC_SPI 853 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 854 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
849 <GIC_SPI 855 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
850 <GIC_SPI 856 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 857 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 858 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 859 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 860 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 861 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 862 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 863 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 864 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 865 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
860 interrupt-names = "err 866 interrupt-names = "error",
861 "ch0", 867 "ch0", "ch1", "ch2", "ch3",
862 "ch4", 868 "ch4", "ch5", "ch6", "ch7",
863 "ch8", 869 "ch8", "ch9", "ch10", "ch11",
864 "ch12" 870 "ch12", "ch13", "ch14", "ch15";
865 clocks = <&cpg CPG_MOD 871 clocks = <&cpg CPG_MOD 217>;
866 clock-names = "fck"; 872 clock-names = "fck";
867 power-domains = <&sysc 873 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
868 resets = <&cpg 217>; 874 resets = <&cpg 217>;
869 #dma-cells = <1>; 875 #dma-cells = <1>;
870 dma-channels = <16>; 876 dma-channels = <16>;
871 iommus = <&ipmmu_ds1 1 877 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
872 <&ipmmu_ds1 18> 878 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
873 <&ipmmu_ds1 20> 879 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
874 <&ipmmu_ds1 22> 880 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
875 <&ipmmu_ds1 24> 881 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
876 <&ipmmu_ds1 26> 882 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
877 <&ipmmu_ds1 28> 883 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
878 <&ipmmu_ds1 30> 884 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
879 }; 885 };
880 886
881 ipmmu_ds0: iommu@e6740000 { 887 ipmmu_ds0: iommu@e6740000 {
882 compatible = "renesas, 888 compatible = "renesas,ipmmu-r8a77990";
883 reg = <0 0xe6740000 0 889 reg = <0 0xe6740000 0 0x1000>;
884 renesas,ipmmu-main = < 890 renesas,ipmmu-main = <&ipmmu_mm 0>;
885 power-domains = <&sysc 891 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
886 #iommu-cells = <1>; 892 #iommu-cells = <1>;
887 }; 893 };
888 894
889 ipmmu_ds1: iommu@e7740000 { 895 ipmmu_ds1: iommu@e7740000 {
890 compatible = "renesas, 896 compatible = "renesas,ipmmu-r8a77990";
891 reg = <0 0xe7740000 0 897 reg = <0 0xe7740000 0 0x1000>;
892 renesas,ipmmu-main = < 898 renesas,ipmmu-main = <&ipmmu_mm 1>;
893 power-domains = <&sysc 899 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
894 #iommu-cells = <1>; 900 #iommu-cells = <1>;
895 }; 901 };
896 902
897 ipmmu_hc: iommu@e6570000 { 903 ipmmu_hc: iommu@e6570000 {
898 compatible = "renesas, 904 compatible = "renesas,ipmmu-r8a77990";
899 reg = <0 0xe6570000 0 905 reg = <0 0xe6570000 0 0x1000>;
900 renesas,ipmmu-main = < 906 renesas,ipmmu-main = <&ipmmu_mm 2>;
901 power-domains = <&sysc 907 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
902 #iommu-cells = <1>; 908 #iommu-cells = <1>;
903 }; 909 };
904 910
905 ipmmu_mm: iommu@e67b0000 { 911 ipmmu_mm: iommu@e67b0000 {
906 compatible = "renesas, 912 compatible = "renesas,ipmmu-r8a77990";
907 reg = <0 0xe67b0000 0 913 reg = <0 0xe67b0000 0 0x1000>;
908 interrupts = <GIC_SPI 914 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
909 <GIC_SPI 915 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
910 power-domains = <&sysc 916 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
911 #iommu-cells = <1>; 917 #iommu-cells = <1>;
912 }; 918 };
913 919
914 ipmmu_mp: iommu@ec670000 { 920 ipmmu_mp: iommu@ec670000 {
915 compatible = "renesas, 921 compatible = "renesas,ipmmu-r8a77990";
916 reg = <0 0xec670000 0 922 reg = <0 0xec670000 0 0x1000>;
917 renesas,ipmmu-main = < 923 renesas,ipmmu-main = <&ipmmu_mm 4>;
918 power-domains = <&sysc 924 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
919 #iommu-cells = <1>; 925 #iommu-cells = <1>;
920 }; 926 };
921 927
922 ipmmu_pv0: iommu@fd800000 { 928 ipmmu_pv0: iommu@fd800000 {
923 compatible = "renesas, 929 compatible = "renesas,ipmmu-r8a77990";
924 reg = <0 0xfd800000 0 930 reg = <0 0xfd800000 0 0x1000>;
925 renesas,ipmmu-main = < 931 renesas,ipmmu-main = <&ipmmu_mm 6>;
926 power-domains = <&sysc 932 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
927 #iommu-cells = <1>; 933 #iommu-cells = <1>;
928 }; 934 };
929 935
930 ipmmu_rt: iommu@ffc80000 { 936 ipmmu_rt: iommu@ffc80000 {
931 compatible = "renesas, 937 compatible = "renesas,ipmmu-r8a77990";
932 reg = <0 0xffc80000 0 938 reg = <0 0xffc80000 0 0x1000>;
933 renesas,ipmmu-main = < 939 renesas,ipmmu-main = <&ipmmu_mm 10>;
934 power-domains = <&sysc 940 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 941 #iommu-cells = <1>;
936 }; 942 };
937 943
938 ipmmu_vc0: iommu@fe6b0000 { 944 ipmmu_vc0: iommu@fe6b0000 {
939 compatible = "renesas, 945 compatible = "renesas,ipmmu-r8a77990";
940 reg = <0 0xfe6b0000 0 946 reg = <0 0xfe6b0000 0 0x1000>;
941 renesas,ipmmu-main = < 947 renesas,ipmmu-main = <&ipmmu_mm 12>;
942 power-domains = <&sysc 948 power-domains = <&sysc R8A77990_PD_A3VC>;
943 #iommu-cells = <1>; 949 #iommu-cells = <1>;
944 }; 950 };
945 951
946 ipmmu_vi0: iommu@febd0000 { 952 ipmmu_vi0: iommu@febd0000 {
947 compatible = "renesas, 953 compatible = "renesas,ipmmu-r8a77990";
948 reg = <0 0xfebd0000 0 954 reg = <0 0xfebd0000 0 0x1000>;
949 renesas,ipmmu-main = < 955 renesas,ipmmu-main = <&ipmmu_mm 14>;
950 power-domains = <&sysc 956 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 957 #iommu-cells = <1>;
952 }; 958 };
953 959
954 ipmmu_vp0: iommu@fe990000 { 960 ipmmu_vp0: iommu@fe990000 {
955 compatible = "renesas, 961 compatible = "renesas,ipmmu-r8a77990";
956 reg = <0 0xfe990000 0 962 reg = <0 0xfe990000 0 0x1000>;
957 renesas,ipmmu-main = < 963 renesas,ipmmu-main = <&ipmmu_mm 16>;
958 power-domains = <&sysc 964 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
959 #iommu-cells = <1>; 965 #iommu-cells = <1>;
960 }; 966 };
961 967
962 avb: ethernet@e6800000 { 968 avb: ethernet@e6800000 {
963 compatible = "renesas, 969 compatible = "renesas,etheravb-r8a77990",
964 "renesas, 970 "renesas,etheravb-rcar-gen3";
965 reg = <0 0xe6800000 0 971 reg = <0 0xe6800000 0 0x800>;
966 interrupts = <GIC_SPI 972 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 973 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 974 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 975 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 976 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 977 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 978 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
973 <GIC_SPI 979 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
974 <GIC_SPI 980 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 981 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 982 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
977 <GIC_SPI 983 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
978 <GIC_SPI 984 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
979 <GIC_SPI 985 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
980 <GIC_SPI 986 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
981 <GIC_SPI 987 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
982 <GIC_SPI 988 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
983 <GIC_SPI 989 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
984 <GIC_SPI 990 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
985 <GIC_SPI 991 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
986 <GIC_SPI 992 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
987 <GIC_SPI 993 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
988 <GIC_SPI 994 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
989 <GIC_SPI 995 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
990 <GIC_SPI 996 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
991 interrupt-names = "ch0 997 interrupt-names = "ch0", "ch1", "ch2", "ch3",
992 "ch4 998 "ch4", "ch5", "ch6", "ch7",
993 "ch8 999 "ch8", "ch9", "ch10", "ch11",
994 "ch1 1000 "ch12", "ch13", "ch14", "ch15",
995 "ch1 1001 "ch16", "ch17", "ch18", "ch19",
996 "ch2 1002 "ch20", "ch21", "ch22", "ch23",
997 "ch2 1003 "ch24";
998 clocks = <&cpg CPG_MOD 1004 clocks = <&cpg CPG_MOD 812>;
999 clock-names = "fck"; 1005 clock-names = "fck";
1000 power-domains = <&sys 1006 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1001 resets = <&cpg 812>; 1007 resets = <&cpg 812>;
1002 phy-mode = "rgmii"; 1008 phy-mode = "rgmii";
1003 rx-internal-delay-ps 1009 rx-internal-delay-ps = <0>;
1004 iommus = <&ipmmu_ds0 1010 iommus = <&ipmmu_ds0 16>;
1005 #address-cells = <1>; 1011 #address-cells = <1>;
1006 #size-cells = <0>; 1012 #size-cells = <0>;
1007 status = "disabled"; 1013 status = "disabled";
1008 }; 1014 };
1009 1015
1010 can0: can@e6c30000 { 1016 can0: can@e6c30000 {
1011 compatible = "renesas 1017 compatible = "renesas,can-r8a77990",
1012 "renesas 1018 "renesas,rcar-gen3-can";
1013 reg = <0 0xe6c30000 0 1019 reg = <0 0xe6c30000 0 0x1000>;
1014 interrupts = <GIC_SPI 1020 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1015 clocks = <&cpg CPG_MO 1021 clocks = <&cpg CPG_MOD 916>,
1016 <&cpg CPG_CORE 1022 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1017 <&can_clk>; 1023 <&can_clk>;
1018 clock-names = "clkp1" 1024 clock-names = "clkp1", "clkp2", "can_clk";
1019 assigned-clocks = <&c 1025 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1020 assigned-clock-rates 1026 assigned-clock-rates = <40000000>;
1021 power-domains = <&sys 1027 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1022 resets = <&cpg 916>; 1028 resets = <&cpg 916>;
1023 status = "disabled"; 1029 status = "disabled";
1024 }; 1030 };
1025 1031
1026 can1: can@e6c38000 { 1032 can1: can@e6c38000 {
1027 compatible = "renesas 1033 compatible = "renesas,can-r8a77990",
1028 "renesas 1034 "renesas,rcar-gen3-can";
1029 reg = <0 0xe6c38000 0 1035 reg = <0 0xe6c38000 0 0x1000>;
1030 interrupts = <GIC_SPI 1036 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&cpg CPG_MO 1037 clocks = <&cpg CPG_MOD 915>,
1032 <&cpg CPG_CORE 1038 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1033 <&can_clk>; 1039 <&can_clk>;
1034 clock-names = "clkp1" 1040 clock-names = "clkp1", "clkp2", "can_clk";
1035 assigned-clocks = <&c 1041 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1036 assigned-clock-rates 1042 assigned-clock-rates = <40000000>;
1037 power-domains = <&sys 1043 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1038 resets = <&cpg 915>; 1044 resets = <&cpg 915>;
1039 status = "disabled"; 1045 status = "disabled";
1040 }; 1046 };
1041 1047
1042 canfd: can@e66c0000 { 1048 canfd: can@e66c0000 {
1043 compatible = "renesas 1049 compatible = "renesas,r8a77990-canfd",
1044 "renesas 1050 "renesas,rcar-gen3-canfd";
1045 reg = <0 0xe66c0000 0 1051 reg = <0 0xe66c0000 0 0x8000>;
1046 interrupts = <GIC_SPI 1052 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1047 <GIC_SPI 3 1053 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1048 interrupt-names = "ch <<
1049 clocks = <&cpg CPG_MO 1054 clocks = <&cpg CPG_MOD 914>,
1050 <&cpg CPG_CORE 1055 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1051 <&can_clk>; 1056 <&can_clk>;
1052 clock-names = "fck", 1057 clock-names = "fck", "canfd", "can_clk";
1053 assigned-clocks = <&c 1058 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1054 assigned-clock-rates 1059 assigned-clock-rates = <40000000>;
1055 power-domains = <&sys 1060 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1056 resets = <&cpg 914>; 1061 resets = <&cpg 914>;
1057 status = "disabled"; 1062 status = "disabled";
1058 1063
1059 channel0 { 1064 channel0 {
1060 status = "dis 1065 status = "disabled";
1061 }; 1066 };
1062 1067
1063 channel1 { 1068 channel1 {
1064 status = "dis 1069 status = "disabled";
1065 }; 1070 };
1066 }; 1071 };
1067 1072
1068 pwm0: pwm@e6e30000 { 1073 pwm0: pwm@e6e30000 {
1069 compatible = "renesas 1074 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1070 reg = <0 0xe6e30000 0 1075 reg = <0 0xe6e30000 0 0x8>;
1071 clocks = <&cpg CPG_MO 1076 clocks = <&cpg CPG_MOD 523>;
1072 power-domains = <&sys 1077 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1073 resets = <&cpg 523>; 1078 resets = <&cpg 523>;
1074 #pwm-cells = <2>; 1079 #pwm-cells = <2>;
1075 status = "disabled"; 1080 status = "disabled";
1076 }; 1081 };
1077 1082
1078 pwm1: pwm@e6e31000 { 1083 pwm1: pwm@e6e31000 {
1079 compatible = "renesas 1084 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1080 reg = <0 0xe6e31000 0 1085 reg = <0 0xe6e31000 0 0x8>;
1081 clocks = <&cpg CPG_MO 1086 clocks = <&cpg CPG_MOD 523>;
1082 power-domains = <&sys 1087 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1083 resets = <&cpg 523>; 1088 resets = <&cpg 523>;
1084 #pwm-cells = <2>; 1089 #pwm-cells = <2>;
1085 status = "disabled"; 1090 status = "disabled";
1086 }; 1091 };
1087 1092
1088 pwm2: pwm@e6e32000 { 1093 pwm2: pwm@e6e32000 {
1089 compatible = "renesas 1094 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1090 reg = <0 0xe6e32000 0 1095 reg = <0 0xe6e32000 0 0x8>;
1091 clocks = <&cpg CPG_MO 1096 clocks = <&cpg CPG_MOD 523>;
1092 power-domains = <&sys 1097 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1093 resets = <&cpg 523>; 1098 resets = <&cpg 523>;
1094 #pwm-cells = <2>; 1099 #pwm-cells = <2>;
1095 status = "disabled"; 1100 status = "disabled";
1096 }; 1101 };
1097 1102
1098 pwm3: pwm@e6e33000 { 1103 pwm3: pwm@e6e33000 {
1099 compatible = "renesas 1104 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1100 reg = <0 0xe6e33000 0 1105 reg = <0 0xe6e33000 0 0x8>;
1101 clocks = <&cpg CPG_MO 1106 clocks = <&cpg CPG_MOD 523>;
1102 power-domains = <&sys 1107 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1103 resets = <&cpg 523>; 1108 resets = <&cpg 523>;
1104 #pwm-cells = <2>; 1109 #pwm-cells = <2>;
1105 status = "disabled"; 1110 status = "disabled";
1106 }; 1111 };
1107 1112
1108 pwm4: pwm@e6e34000 { 1113 pwm4: pwm@e6e34000 {
1109 compatible = "renesas 1114 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1110 reg = <0 0xe6e34000 0 1115 reg = <0 0xe6e34000 0 0x8>;
1111 clocks = <&cpg CPG_MO 1116 clocks = <&cpg CPG_MOD 523>;
1112 power-domains = <&sys 1117 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1113 resets = <&cpg 523>; 1118 resets = <&cpg 523>;
1114 #pwm-cells = <2>; 1119 #pwm-cells = <2>;
1115 status = "disabled"; 1120 status = "disabled";
1116 }; 1121 };
1117 1122
1118 pwm5: pwm@e6e35000 { 1123 pwm5: pwm@e6e35000 {
1119 compatible = "renesas 1124 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1120 reg = <0 0xe6e35000 0 1125 reg = <0 0xe6e35000 0 0x8>;
1121 clocks = <&cpg CPG_MO 1126 clocks = <&cpg CPG_MOD 523>;
1122 power-domains = <&sys 1127 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1123 resets = <&cpg 523>; 1128 resets = <&cpg 523>;
1124 #pwm-cells = <2>; 1129 #pwm-cells = <2>;
1125 status = "disabled"; 1130 status = "disabled";
1126 }; 1131 };
1127 1132
1128 pwm6: pwm@e6e36000 { 1133 pwm6: pwm@e6e36000 {
1129 compatible = "renesas 1134 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1130 reg = <0 0xe6e36000 0 1135 reg = <0 0xe6e36000 0 0x8>;
1131 clocks = <&cpg CPG_MO 1136 clocks = <&cpg CPG_MOD 523>;
1132 power-domains = <&sys 1137 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1133 resets = <&cpg 523>; 1138 resets = <&cpg 523>;
1134 #pwm-cells = <2>; 1139 #pwm-cells = <2>;
1135 status = "disabled"; 1140 status = "disabled";
1136 }; 1141 };
1137 1142
1138 scif0: serial@e6e60000 { 1143 scif0: serial@e6e60000 {
1139 compatible = "renesas 1144 compatible = "renesas,scif-r8a77990",
1140 "renesas 1145 "renesas,rcar-gen3-scif", "renesas,scif";
1141 reg = <0 0xe6e60000 0 1146 reg = <0 0xe6e60000 0 64>;
1142 interrupts = <GIC_SPI 1147 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1143 clocks = <&cpg CPG_MO 1148 clocks = <&cpg CPG_MOD 207>,
1144 <&cpg CPG_CO 1149 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1145 <&scif_clk>; 1150 <&scif_clk>;
1146 clock-names = "fck", 1151 clock-names = "fck", "brg_int", "scif_clk";
1147 dmas = <&dmac1 0x51>, 1152 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1148 <&dmac2 0x51>, 1153 <&dmac2 0x51>, <&dmac2 0x50>;
1149 dma-names = "tx", "rx 1154 dma-names = "tx", "rx", "tx", "rx";
1150 power-domains = <&sys 1155 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1151 resets = <&cpg 207>; 1156 resets = <&cpg 207>;
1152 status = "disabled"; 1157 status = "disabled";
1153 }; 1158 };
1154 1159
1155 scif1: serial@e6e68000 { 1160 scif1: serial@e6e68000 {
1156 compatible = "renesas 1161 compatible = "renesas,scif-r8a77990",
1157 "renesas 1162 "renesas,rcar-gen3-scif", "renesas,scif";
1158 reg = <0 0xe6e68000 0 1163 reg = <0 0xe6e68000 0 64>;
1159 interrupts = <GIC_SPI 1164 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1160 clocks = <&cpg CPG_MO 1165 clocks = <&cpg CPG_MOD 206>,
1161 <&cpg CPG_CO 1166 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1162 <&scif_clk>; 1167 <&scif_clk>;
1163 clock-names = "fck", 1168 clock-names = "fck", "brg_int", "scif_clk";
1164 dmas = <&dmac1 0x53>, 1169 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1165 <&dmac2 0x53>, 1170 <&dmac2 0x53>, <&dmac2 0x52>;
1166 dma-names = "tx", "rx 1171 dma-names = "tx", "rx", "tx", "rx";
1167 power-domains = <&sys 1172 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1168 resets = <&cpg 206>; 1173 resets = <&cpg 206>;
1169 status = "disabled"; 1174 status = "disabled";
1170 }; 1175 };
1171 1176
1172 scif2: serial@e6e88000 { 1177 scif2: serial@e6e88000 {
1173 compatible = "renesas 1178 compatible = "renesas,scif-r8a77990",
1174 "renesas 1179 "renesas,rcar-gen3-scif", "renesas,scif";
1175 reg = <0 0xe6e88000 0 1180 reg = <0 0xe6e88000 0 64>;
1176 interrupts = <GIC_SPI 1181 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1177 clocks = <&cpg CPG_MO 1182 clocks = <&cpg CPG_MOD 310>,
1178 <&cpg CPG_CO 1183 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1179 <&scif_clk>; 1184 <&scif_clk>;
1180 clock-names = "fck", 1185 clock-names = "fck", "brg_int", "scif_clk";
1181 dmas = <&dmac1 0x13>, 1186 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1182 <&dmac2 0x13>, 1187 <&dmac2 0x13>, <&dmac2 0x12>;
1183 dma-names = "tx", "rx 1188 dma-names = "tx", "rx", "tx", "rx";
1184 power-domains = <&sys 1189 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1185 resets = <&cpg 310>; 1190 resets = <&cpg 310>;
1186 status = "disabled"; 1191 status = "disabled";
1187 }; 1192 };
1188 1193
1189 scif3: serial@e6c50000 { 1194 scif3: serial@e6c50000 {
1190 compatible = "renesas 1195 compatible = "renesas,scif-r8a77990",
1191 "renesas 1196 "renesas,rcar-gen3-scif", "renesas,scif";
1192 reg = <0 0xe6c50000 0 1197 reg = <0 0xe6c50000 0 64>;
1193 interrupts = <GIC_SPI 1198 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1194 clocks = <&cpg CPG_MO 1199 clocks = <&cpg CPG_MOD 204>,
1195 <&cpg CPG_CO 1200 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1196 <&scif_clk>; 1201 <&scif_clk>;
1197 clock-names = "fck", 1202 clock-names = "fck", "brg_int", "scif_clk";
1198 dmas = <&dmac0 0x57>, 1203 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1199 dma-names = "tx", "rx 1204 dma-names = "tx", "rx";
1200 power-domains = <&sys 1205 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1201 resets = <&cpg 204>; 1206 resets = <&cpg 204>;
1202 status = "disabled"; 1207 status = "disabled";
1203 }; 1208 };
1204 1209
1205 scif4: serial@e6c40000 { 1210 scif4: serial@e6c40000 {
1206 compatible = "renesas 1211 compatible = "renesas,scif-r8a77990",
1207 "renesas 1212 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6c40000 0 1213 reg = <0 0xe6c40000 0 64>;
1209 interrupts = <GIC_SPI 1214 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1215 clocks = <&cpg CPG_MOD 203>,
1211 <&cpg CPG_CO 1216 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1212 <&scif_clk>; 1217 <&scif_clk>;
1213 clock-names = "fck", 1218 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac0 0x59>, 1219 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1215 dma-names = "tx", "rx 1220 dma-names = "tx", "rx";
1216 power-domains = <&sys 1221 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1217 resets = <&cpg 203>; 1222 resets = <&cpg 203>;
1218 status = "disabled"; 1223 status = "disabled";
1219 }; 1224 };
1220 1225
1221 scif5: serial@e6f30000 { 1226 scif5: serial@e6f30000 {
1222 compatible = "renesas 1227 compatible = "renesas,scif-r8a77990",
1223 "renesas 1228 "renesas,rcar-gen3-scif", "renesas,scif";
1224 reg = <0 0xe6f30000 0 1229 reg = <0 0xe6f30000 0 64>;
1225 interrupts = <GIC_SPI 1230 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1226 clocks = <&cpg CPG_MO 1231 clocks = <&cpg CPG_MOD 202>,
1227 <&cpg CPG_CO 1232 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1228 <&scif_clk>; 1233 <&scif_clk>;
1229 clock-names = "fck", 1234 clock-names = "fck", "brg_int", "scif_clk";
1230 dmas = <&dmac0 0x5b>, 1235 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1231 dma-names = "tx", "rx 1236 dma-names = "tx", "rx";
1232 power-domains = <&sys 1237 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1233 resets = <&cpg 202>; 1238 resets = <&cpg 202>;
1234 status = "disabled"; 1239 status = "disabled";
1235 }; 1240 };
1236 1241
1237 msiof0: spi@e6e90000 { 1242 msiof0: spi@e6e90000 {
1238 compatible = "renesas 1243 compatible = "renesas,msiof-r8a77990",
1239 "renesas 1244 "renesas,rcar-gen3-msiof";
1240 reg = <0 0xe6e90000 0 1245 reg = <0 0xe6e90000 0 0x0064>;
1241 interrupts = <GIC_SPI 1246 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1242 clocks = <&cpg CPG_MO 1247 clocks = <&cpg CPG_MOD 211>;
1243 dmas = <&dmac1 0x41>, 1248 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1244 <&dmac2 0x41>, 1249 <&dmac2 0x41>, <&dmac2 0x40>;
1245 dma-names = "tx", "rx 1250 dma-names = "tx", "rx", "tx", "rx";
1246 power-domains = <&sys 1251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1247 resets = <&cpg 211>; 1252 resets = <&cpg 211>;
1248 #address-cells = <1>; 1253 #address-cells = <1>;
1249 #size-cells = <0>; 1254 #size-cells = <0>;
1250 status = "disabled"; 1255 status = "disabled";
1251 }; 1256 };
1252 1257
1253 msiof1: spi@e6ea0000 { 1258 msiof1: spi@e6ea0000 {
1254 compatible = "renesas 1259 compatible = "renesas,msiof-r8a77990",
1255 "renesas 1260 "renesas,rcar-gen3-msiof";
1256 reg = <0 0xe6ea0000 0 1261 reg = <0 0xe6ea0000 0 0x0064>;
1257 interrupts = <GIC_SPI 1262 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1258 clocks = <&cpg CPG_MO 1263 clocks = <&cpg CPG_MOD 210>;
1259 dmas = <&dmac0 0x43>, 1264 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1260 dma-names = "tx", "rx 1265 dma-names = "tx", "rx";
1261 power-domains = <&sys 1266 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1262 resets = <&cpg 210>; 1267 resets = <&cpg 210>;
1263 #address-cells = <1>; 1268 #address-cells = <1>;
1264 #size-cells = <0>; 1269 #size-cells = <0>;
1265 status = "disabled"; 1270 status = "disabled";
1266 }; 1271 };
1267 1272
1268 msiof2: spi@e6c00000 { 1273 msiof2: spi@e6c00000 {
1269 compatible = "renesas 1274 compatible = "renesas,msiof-r8a77990",
1270 "renesas 1275 "renesas,rcar-gen3-msiof";
1271 reg = <0 0xe6c00000 0 1276 reg = <0 0xe6c00000 0 0x0064>;
1272 interrupts = <GIC_SPI 1277 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1273 clocks = <&cpg CPG_MO 1278 clocks = <&cpg CPG_MOD 209>;
1274 dmas = <&dmac0 0x45>, 1279 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1275 dma-names = "tx", "rx 1280 dma-names = "tx", "rx";
1276 power-domains = <&sys 1281 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1277 resets = <&cpg 209>; 1282 resets = <&cpg 209>;
1278 #address-cells = <1>; 1283 #address-cells = <1>;
1279 #size-cells = <0>; 1284 #size-cells = <0>;
1280 status = "disabled"; 1285 status = "disabled";
1281 }; 1286 };
1282 1287
1283 msiof3: spi@e6c10000 { 1288 msiof3: spi@e6c10000 {
1284 compatible = "renesas 1289 compatible = "renesas,msiof-r8a77990",
1285 "renesas 1290 "renesas,rcar-gen3-msiof";
1286 reg = <0 0xe6c10000 0 1291 reg = <0 0xe6c10000 0 0x0064>;
1287 interrupts = <GIC_SPI 1292 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1288 clocks = <&cpg CPG_MO 1293 clocks = <&cpg CPG_MOD 208>;
1289 dmas = <&dmac0 0x47>, 1294 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1290 dma-names = "tx", "rx 1295 dma-names = "tx", "rx";
1291 power-domains = <&sys 1296 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1292 resets = <&cpg 208>; 1297 resets = <&cpg 208>;
1293 #address-cells = <1>; 1298 #address-cells = <1>;
1294 #size-cells = <0>; 1299 #size-cells = <0>;
1295 status = "disabled"; 1300 status = "disabled";
1296 }; 1301 };
1297 1302
1298 vin4: video@e6ef4000 { 1303 vin4: video@e6ef4000 {
1299 compatible = "renesas 1304 compatible = "renesas,vin-r8a77990";
1300 reg = <0 0xe6ef4000 0 1305 reg = <0 0xe6ef4000 0 0x1000>;
1301 interrupts = <GIC_SPI 1306 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1302 clocks = <&cpg CPG_MO 1307 clocks = <&cpg CPG_MOD 807>;
1303 power-domains = <&sys 1308 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1304 resets = <&cpg 807>; 1309 resets = <&cpg 807>;
1305 renesas,id = <4>; 1310 renesas,id = <4>;
1306 status = "disabled"; 1311 status = "disabled";
1307 1312
1308 ports { 1313 ports {
1309 #address-cell 1314 #address-cells = <1>;
1310 #size-cells = 1315 #size-cells = <0>;
1311 1316
1312 port@1 { 1317 port@1 {
1313 #addr 1318 #address-cells = <1>;
1314 #size 1319 #size-cells = <0>;
1315 1320
1316 reg = 1321 reg = <1>;
1317 1322
1318 vin4c 1323 vin4csi40: endpoint@2 {
1319 1324 reg = <2>;
1320 !! 1325 remote-endpoint= <&csi40vin4>;
1321 }; 1326 };
1322 }; 1327 };
1323 }; 1328 };
1324 }; 1329 };
1325 1330
1326 vin5: video@e6ef5000 { 1331 vin5: video@e6ef5000 {
1327 compatible = "renesas 1332 compatible = "renesas,vin-r8a77990";
1328 reg = <0 0xe6ef5000 0 1333 reg = <0 0xe6ef5000 0 0x1000>;
1329 interrupts = <GIC_SPI 1334 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1330 clocks = <&cpg CPG_MO 1335 clocks = <&cpg CPG_MOD 806>;
1331 power-domains = <&sys 1336 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1332 resets = <&cpg 806>; 1337 resets = <&cpg 806>;
1333 renesas,id = <5>; 1338 renesas,id = <5>;
1334 status = "disabled"; 1339 status = "disabled";
1335 1340
1336 ports { 1341 ports {
1337 #address-cell 1342 #address-cells = <1>;
1338 #size-cells = 1343 #size-cells = <0>;
1339 1344
1340 port@1 { 1345 port@1 {
1341 #addr 1346 #address-cells = <1>;
1342 #size 1347 #size-cells = <0>;
1343 1348
1344 reg = 1349 reg = <1>;
1345 1350
1346 vin5c 1351 vin5csi40: endpoint@2 {
1347 1352 reg = <2>;
1348 !! 1353 remote-endpoint= <&csi40vin5>;
1349 }; 1354 };
1350 }; 1355 };
1351 }; 1356 };
1352 }; 1357 };
1353 1358
1354 drif00: rif@e6f40000 { 1359 drif00: rif@e6f40000 {
1355 compatible = "renesas 1360 compatible = "renesas,r8a77990-drif",
1356 "renesas 1361 "renesas,rcar-gen3-drif";
1357 reg = <0 0xe6f40000 0 1362 reg = <0 0xe6f40000 0 0x84>;
1358 interrupts = <GIC_SPI 1363 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1359 clocks = <&cpg CPG_MO 1364 clocks = <&cpg CPG_MOD 515>;
1360 clock-names = "fck"; 1365 clock-names = "fck";
1361 dmas = <&dmac1 0x20>, 1366 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1362 dma-names = "rx", "rx 1367 dma-names = "rx", "rx";
1363 power-domains = <&sys 1368 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1364 resets = <&cpg 515>; 1369 resets = <&cpg 515>;
1365 renesas,bonding = <&d 1370 renesas,bonding = <&drif01>;
1366 status = "disabled"; 1371 status = "disabled";
1367 }; 1372 };
1368 1373
1369 drif01: rif@e6f50000 { 1374 drif01: rif@e6f50000 {
1370 compatible = "renesas 1375 compatible = "renesas,r8a77990-drif",
1371 "renesas 1376 "renesas,rcar-gen3-drif";
1372 reg = <0 0xe6f50000 0 1377 reg = <0 0xe6f50000 0 0x84>;
1373 interrupts = <GIC_SPI 1378 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1374 clocks = <&cpg CPG_MO 1379 clocks = <&cpg CPG_MOD 514>;
1375 clock-names = "fck"; 1380 clock-names = "fck";
1376 dmas = <&dmac1 0x22>, 1381 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1377 dma-names = "rx", "rx 1382 dma-names = "rx", "rx";
1378 power-domains = <&sys 1383 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1379 resets = <&cpg 514>; 1384 resets = <&cpg 514>;
1380 renesas,bonding = <&d 1385 renesas,bonding = <&drif00>;
1381 status = "disabled"; 1386 status = "disabled";
1382 }; 1387 };
1383 1388
1384 drif10: rif@e6f60000 { 1389 drif10: rif@e6f60000 {
1385 compatible = "renesas 1390 compatible = "renesas,r8a77990-drif",
1386 "renesas 1391 "renesas,rcar-gen3-drif";
1387 reg = <0 0xe6f60000 0 1392 reg = <0 0xe6f60000 0 0x84>;
1388 interrupts = <GIC_SPI 1393 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1389 clocks = <&cpg CPG_MO 1394 clocks = <&cpg CPG_MOD 513>;
1390 clock-names = "fck"; 1395 clock-names = "fck";
1391 dmas = <&dmac1 0x24>, 1396 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1392 dma-names = "rx", "rx 1397 dma-names = "rx", "rx";
1393 power-domains = <&sys 1398 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1394 resets = <&cpg 513>; 1399 resets = <&cpg 513>;
1395 renesas,bonding = <&d 1400 renesas,bonding = <&drif11>;
1396 status = "disabled"; 1401 status = "disabled";
1397 }; 1402 };
1398 1403
1399 drif11: rif@e6f70000 { 1404 drif11: rif@e6f70000 {
1400 compatible = "renesas 1405 compatible = "renesas,r8a77990-drif",
1401 "renesas 1406 "renesas,rcar-gen3-drif";
1402 reg = <0 0xe6f70000 0 1407 reg = <0 0xe6f70000 0 0x84>;
1403 interrupts = <GIC_SPI 1408 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1404 clocks = <&cpg CPG_MO 1409 clocks = <&cpg CPG_MOD 512>;
1405 clock-names = "fck"; 1410 clock-names = "fck";
1406 dmas = <&dmac1 0x26>, 1411 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1407 dma-names = "rx", "rx 1412 dma-names = "rx", "rx";
1408 power-domains = <&sys 1413 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1409 resets = <&cpg 512>; 1414 resets = <&cpg 512>;
1410 renesas,bonding = <&d 1415 renesas,bonding = <&drif10>;
1411 status = "disabled"; 1416 status = "disabled";
1412 }; 1417 };
1413 1418
1414 drif20: rif@e6f80000 { 1419 drif20: rif@e6f80000 {
1415 compatible = "renesas 1420 compatible = "renesas,r8a77990-drif",
1416 "renesas 1421 "renesas,rcar-gen3-drif";
1417 reg = <0 0xe6f80000 0 1422 reg = <0 0xe6f80000 0 0x84>;
1418 interrupts = <GIC_SPI 1423 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1419 clocks = <&cpg CPG_MO 1424 clocks = <&cpg CPG_MOD 511>;
1420 clock-names = "fck"; 1425 clock-names = "fck";
1421 dmas = <&dmac0 0x28>; 1426 dmas = <&dmac0 0x28>;
1422 dma-names = "rx"; 1427 dma-names = "rx";
1423 power-domains = <&sys 1428 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1424 resets = <&cpg 511>; 1429 resets = <&cpg 511>;
1425 renesas,bonding = <&d 1430 renesas,bonding = <&drif21>;
1426 status = "disabled"; 1431 status = "disabled";
1427 }; 1432 };
1428 1433
1429 drif21: rif@e6f90000 { 1434 drif21: rif@e6f90000 {
1430 compatible = "renesas 1435 compatible = "renesas,r8a77990-drif",
1431 "renesas 1436 "renesas,rcar-gen3-drif";
1432 reg = <0 0xe6f90000 0 1437 reg = <0 0xe6f90000 0 0x84>;
1433 interrupts = <GIC_SPI 1438 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1434 clocks = <&cpg CPG_MO 1439 clocks = <&cpg CPG_MOD 510>;
1435 clock-names = "fck"; 1440 clock-names = "fck";
1436 dmas = <&dmac0 0x2a>; 1441 dmas = <&dmac0 0x2a>;
1437 dma-names = "rx"; 1442 dma-names = "rx";
1438 power-domains = <&sys 1443 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1439 resets = <&cpg 510>; 1444 resets = <&cpg 510>;
1440 renesas,bonding = <&d 1445 renesas,bonding = <&drif20>;
1441 status = "disabled"; 1446 status = "disabled";
1442 }; 1447 };
1443 1448
1444 drif30: rif@e6fa0000 { 1449 drif30: rif@e6fa0000 {
1445 compatible = "renesas 1450 compatible = "renesas,r8a77990-drif",
1446 "renesas 1451 "renesas,rcar-gen3-drif";
1447 reg = <0 0xe6fa0000 0 1452 reg = <0 0xe6fa0000 0 0x84>;
1448 interrupts = <GIC_SPI 1453 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1449 clocks = <&cpg CPG_MO 1454 clocks = <&cpg CPG_MOD 509>;
1450 clock-names = "fck"; 1455 clock-names = "fck";
1451 dmas = <&dmac0 0x2c>; 1456 dmas = <&dmac0 0x2c>;
1452 dma-names = "rx"; 1457 dma-names = "rx";
1453 power-domains = <&sys 1458 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1454 resets = <&cpg 509>; 1459 resets = <&cpg 509>;
1455 renesas,bonding = <&d 1460 renesas,bonding = <&drif31>;
1456 status = "disabled"; 1461 status = "disabled";
1457 }; 1462 };
1458 1463
1459 drif31: rif@e6fb0000 { 1464 drif31: rif@e6fb0000 {
1460 compatible = "renesas 1465 compatible = "renesas,r8a77990-drif",
1461 "renesas 1466 "renesas,rcar-gen3-drif";
1462 reg = <0 0xe6fb0000 0 1467 reg = <0 0xe6fb0000 0 0x84>;
1463 interrupts = <GIC_SPI 1468 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1464 clocks = <&cpg CPG_MO 1469 clocks = <&cpg CPG_MOD 508>;
1465 clock-names = "fck"; 1470 clock-names = "fck";
1466 dmas = <&dmac0 0x2e>; 1471 dmas = <&dmac0 0x2e>;
1467 dma-names = "rx"; 1472 dma-names = "rx";
1468 power-domains = <&sys 1473 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1469 resets = <&cpg 508>; 1474 resets = <&cpg 508>;
1470 renesas,bonding = <&d 1475 renesas,bonding = <&drif30>;
1471 status = "disabled"; 1476 status = "disabled";
1472 }; 1477 };
1473 1478
1474 rcar_sound: sound@ec500000 { 1479 rcar_sound: sound@ec500000 {
1475 /* 1480 /*
1476 * #sound-dai-cells i !! 1481 * #sound-dai-cells is required
1477 * 1482 *
1478 * Single DAI : #soun 1483 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1479 * Multi DAI : #soun 1484 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1480 */ 1485 */
1481 /* 1486 /*
1482 * #clock-cells is re 1487 * #clock-cells is required for audio_clkout0/1/2/3
1483 * 1488 *
1484 * clkout : #cl 1489 * clkout : #clock-cells = <0>; <&rcar_sound>;
1485 * clkout0/1/2/3: #cl 1490 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1486 */ 1491 */
1487 compatible = "renesas !! 1492 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1488 reg = <0 0xec500000 0 !! 1493 reg = <0 0xec500000 0 0x1000>, /* SCU */
1489 <0 0xec5a0000 0 !! 1494 <0 0xec5a0000 0 0x100>, /* ADG */
1490 <0 0xec540000 0 !! 1495 <0 0xec540000 0 0x1000>, /* SSIU */
1491 <0 0xec541000 0 !! 1496 <0 0xec541000 0 0x280>, /* SSI */
1492 <0 0xec760000 0 !! 1497 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1493 reg-names = "scu", "a 1498 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1494 1499
1495 clocks = <&cpg CPG_MO 1500 clocks = <&cpg CPG_MOD 1005>,
1496 <&cpg CPG_MO 1501 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1497 <&cpg CPG_MO 1502 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1498 <&cpg CPG_MO 1503 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1499 <&cpg CPG_MO 1504 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1500 <&cpg CPG_MO 1505 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1501 <&cpg CPG_MO 1506 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1502 <&cpg CPG_MO 1507 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1503 <&cpg CPG_MO 1508 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1504 <&cpg CPG_MO 1509 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1505 <&cpg CPG_MO 1510 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1506 <&cpg CPG_MO 1511 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1507 <&cpg CPG_MO 1512 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1508 <&cpg CPG_MO 1513 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1509 <&audio_clk_ 1514 <&audio_clk_a>, <&audio_clk_b>,
1510 <&audio_clk_ 1515 <&audio_clk_c>,
1511 <&cpg CPG_MO !! 1516 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1512 clock-names = "ssi-al 1517 clock-names = "ssi-all",
1513 "ssi.9" 1518 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1514 "ssi.5" 1519 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1515 "ssi.1" 1520 "ssi.1", "ssi.0",
1516 "src.9" 1521 "src.9", "src.8", "src.7", "src.6",
1517 "src.5" 1522 "src.5", "src.4", "src.3", "src.2",
1518 "src.1" 1523 "src.1", "src.0",
1519 "mix.1" 1524 "mix.1", "mix.0",
1520 "ctu.1" 1525 "ctu.1", "ctu.0",
1521 "dvc.0" 1526 "dvc.0", "dvc.1",
1522 "clk_a" 1527 "clk_a", "clk_b", "clk_c", "clk_i";
1523 power-domains = <&sys 1528 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1524 resets = <&cpg 1005>, 1529 resets = <&cpg 1005>,
1525 <&cpg 1006>, 1530 <&cpg 1006>, <&cpg 1007>,
1526 <&cpg 1008>, 1531 <&cpg 1008>, <&cpg 1009>,
1527 <&cpg 1010>, 1532 <&cpg 1010>, <&cpg 1011>,
1528 <&cpg 1012>, 1533 <&cpg 1012>, <&cpg 1013>,
1529 <&cpg 1014>, 1534 <&cpg 1014>, <&cpg 1015>;
1530 reset-names = "ssi-al 1535 reset-names = "ssi-all",
1531 "ssi.9" 1536 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1532 "ssi.5" 1537 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1533 "ssi.1" 1538 "ssi.1", "ssi.0";
1534 status = "disabled"; 1539 status = "disabled";
1535 1540
1536 rcar_sound,ctu { 1541 rcar_sound,ctu {
1537 ctu00: ctu-0 1542 ctu00: ctu-0 { };
1538 ctu01: ctu-1 1543 ctu01: ctu-1 { };
1539 ctu02: ctu-2 1544 ctu02: ctu-2 { };
1540 ctu03: ctu-3 1545 ctu03: ctu-3 { };
1541 ctu10: ctu-4 1546 ctu10: ctu-4 { };
1542 ctu11: ctu-5 1547 ctu11: ctu-5 { };
1543 ctu12: ctu-6 1548 ctu12: ctu-6 { };
1544 ctu13: ctu-7 1549 ctu13: ctu-7 { };
1545 }; 1550 };
1546 1551
1547 rcar_sound,dvc { 1552 rcar_sound,dvc {
1548 dvc0: dvc-0 { 1553 dvc0: dvc-0 {
1549 dmas 1554 dmas = <&audma0 0xbc>;
1550 dma-n 1555 dma-names = "tx";
1551 }; 1556 };
1552 dvc1: dvc-1 { 1557 dvc1: dvc-1 {
1553 dmas 1558 dmas = <&audma0 0xbe>;
1554 dma-n 1559 dma-names = "tx";
1555 }; 1560 };
1556 }; 1561 };
1557 1562
1558 rcar_sound,mix { 1563 rcar_sound,mix {
1559 mix0: mix-0 { 1564 mix0: mix-0 { };
1560 mix1: mix-1 { 1565 mix1: mix-1 { };
1561 }; 1566 };
1562 1567
1563 rcar_sound,src { 1568 rcar_sound,src {
1564 src0: src-0 { 1569 src0: src-0 {
1565 inter 1570 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1566 dmas 1571 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1567 dma-n 1572 dma-names = "rx", "tx";
1568 }; 1573 };
1569 src1: src-1 { 1574 src1: src-1 {
1570 inter 1575 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1571 dmas 1576 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1572 dma-n 1577 dma-names = "rx", "tx";
1573 }; 1578 };
1574 src2: src-2 { 1579 src2: src-2 {
1575 inter 1580 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1576 dmas 1581 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1577 dma-n 1582 dma-names = "rx", "tx";
1578 }; 1583 };
1579 src3: src-3 { 1584 src3: src-3 {
1580 inter 1585 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1581 dmas 1586 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1582 dma-n 1587 dma-names = "rx", "tx";
1583 }; 1588 };
1584 src4: src-4 { 1589 src4: src-4 {
1585 inter 1590 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas 1591 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1587 dma-n 1592 dma-names = "rx", "tx";
1588 }; 1593 };
1589 src5: src-5 { 1594 src5: src-5 {
1590 inter 1595 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1591 dmas 1596 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1592 dma-n 1597 dma-names = "rx", "tx";
1593 }; 1598 };
1594 src6: src-6 { 1599 src6: src-6 {
1595 inter 1600 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1596 dmas 1601 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1597 dma-n 1602 dma-names = "rx", "tx";
1598 }; 1603 };
1599 src7: src-7 { 1604 src7: src-7 {
1600 inter 1605 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1601 dmas 1606 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1602 dma-n 1607 dma-names = "rx", "tx";
1603 }; 1608 };
1604 src8: src-8 { 1609 src8: src-8 {
1605 inter 1610 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1606 dmas 1611 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1607 dma-n 1612 dma-names = "rx", "tx";
1608 }; 1613 };
1609 src9: src-9 { 1614 src9: src-9 {
1610 inter 1615 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1611 dmas 1616 dmas = <&audma0 0x97>, <&audma0 0xba>;
1612 dma-n 1617 dma-names = "rx", "tx";
1613 }; 1618 };
1614 }; 1619 };
1615 1620
1616 rcar_sound,ssi { 1621 rcar_sound,ssi {
1617 ssi0: ssi-0 { 1622 ssi0: ssi-0 {
1618 inter 1623 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1619 dmas 1624 dmas = <&audma0 0x01>, <&audma0 0x02>,
1620 1625 <&audma0 0x15>, <&audma0 0x16>;
1621 dma-n 1626 dma-names = "rx", "tx", "rxu", "txu";
1622 }; 1627 };
1623 ssi1: ssi-1 { 1628 ssi1: ssi-1 {
1624 inter 1629 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1625 dmas 1630 dmas = <&audma0 0x03>, <&audma0 0x04>,
1626 1631 <&audma0 0x49>, <&audma0 0x4a>;
1627 dma-n 1632 dma-names = "rx", "tx", "rxu", "txu";
1628 }; 1633 };
1629 ssi2: ssi-2 { 1634 ssi2: ssi-2 {
1630 inter 1635 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1631 dmas 1636 dmas = <&audma0 0x05>, <&audma0 0x06>,
1632 1637 <&audma0 0x63>, <&audma0 0x64>;
1633 dma-n 1638 dma-names = "rx", "tx", "rxu", "txu";
1634 }; 1639 };
1635 ssi3: ssi-3 { 1640 ssi3: ssi-3 {
1636 inter 1641 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1637 dmas 1642 dmas = <&audma0 0x07>, <&audma0 0x08>,
1638 1643 <&audma0 0x6f>, <&audma0 0x70>;
1639 dma-n 1644 dma-names = "rx", "tx", "rxu", "txu";
1640 }; 1645 };
1641 ssi4: ssi-4 { 1646 ssi4: ssi-4 {
1642 inter 1647 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1643 dmas 1648 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1644 1649 <&audma0 0x71>, <&audma0 0x72>;
1645 dma-n 1650 dma-names = "rx", "tx", "rxu", "txu";
1646 }; 1651 };
1647 ssi5: ssi-5 { 1652 ssi5: ssi-5 {
1648 inter 1653 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1649 dmas 1654 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1650 1655 <&audma0 0x73>, <&audma0 0x74>;
1651 dma-n 1656 dma-names = "rx", "tx", "rxu", "txu";
1652 }; 1657 };
1653 ssi6: ssi-6 { 1658 ssi6: ssi-6 {
1654 inter 1659 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1655 dmas 1660 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1656 1661 <&audma0 0x75>, <&audma0 0x76>;
1657 dma-n 1662 dma-names = "rx", "tx", "rxu", "txu";
1658 }; 1663 };
1659 ssi7: ssi-7 { 1664 ssi7: ssi-7 {
1660 inter 1665 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1661 dmas 1666 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1662 1667 <&audma0 0x79>, <&audma0 0x7a>;
1663 dma-n 1668 dma-names = "rx", "tx", "rxu", "txu";
1664 }; 1669 };
1665 ssi8: ssi-8 { 1670 ssi8: ssi-8 {
1666 inter 1671 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1667 dmas 1672 dmas = <&audma0 0x11>, <&audma0 0x12>,
1668 1673 <&audma0 0x7b>, <&audma0 0x7c>;
1669 dma-n 1674 dma-names = "rx", "tx", "rxu", "txu";
1670 }; 1675 };
1671 ssi9: ssi-9 { 1676 ssi9: ssi-9 {
1672 inter 1677 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1673 dmas 1678 dmas = <&audma0 0x13>, <&audma0 0x14>,
1674 1679 <&audma0 0x7d>, <&audma0 0x7e>;
1675 dma-n 1680 dma-names = "rx", "tx", "rxu", "txu";
1676 }; 1681 };
1677 }; 1682 };
1678 }; 1683 };
1679 1684
1680 mlp: mlp@ec520000 { <<
1681 compatible = "renesas <<
1682 "renesas <<
1683 reg = <0 0xec520000 0 <<
1684 interrupts = <GIC_SPI <<
1685 <GIC_SPI 385 <<
1686 clocks = <&cpg CPG_MO <<
1687 power-domains = <&sys <<
1688 resets = <&cpg 802>; <<
1689 status = "disabled"; <<
1690 }; <<
1691 <<
1692 audma0: dma-controller@ec7000 1685 audma0: dma-controller@ec700000 {
1693 compatible = "renesas 1686 compatible = "renesas,dmac-r8a77990",
1694 "renesas 1687 "renesas,rcar-dmac";
1695 reg = <0 0xec700000 0 1688 reg = <0 0xec700000 0 0x10000>;
1696 interrupts = <GIC_SPI 1689 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1697 <GIC_SPI 1690 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1698 <GIC_SPI 1691 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1699 <GIC_SPI 1692 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1700 <GIC_SPI 1693 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1701 <GIC_SPI 1694 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1702 <GIC_SPI 1695 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1703 <GIC_SPI 1696 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1704 <GIC_SPI 1697 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1705 <GIC_SPI 1698 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1706 <GIC_SPI 1699 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1707 <GIC_SPI 1700 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1708 <GIC_SPI 1701 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1709 <GIC_SPI 1702 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1710 <GIC_SPI 1703 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1711 <GIC_SPI 1704 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1712 <GIC_SPI 1705 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1713 interrupt-names = "er 1706 interrupt-names = "error",
1714 "ch0" 1707 "ch0", "ch1", "ch2", "ch3",
1715 "ch4" 1708 "ch4", "ch5", "ch6", "ch7",
1716 "ch8" 1709 "ch8", "ch9", "ch10", "ch11",
1717 "ch12 1710 "ch12", "ch13", "ch14", "ch15";
1718 clocks = <&cpg CPG_MO 1711 clocks = <&cpg CPG_MOD 502>;
1719 clock-names = "fck"; 1712 clock-names = "fck";
1720 power-domains = <&sys 1713 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1721 resets = <&cpg 502>; 1714 resets = <&cpg 502>;
1722 #dma-cells = <1>; 1715 #dma-cells = <1>;
1723 dma-channels = <16>; 1716 dma-channels = <16>;
1724 iommus = <&ipmmu_mp 0 1717 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1725 <&ipmmu_mp 2 1718 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1726 <&ipmmu_mp 4 1719 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1727 <&ipmmu_mp 6 1720 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1728 <&ipmmu_mp 8 1721 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1729 <&ipmmu_mp 1 1722 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1730 <&ipmmu_mp 1 1723 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1731 <&ipmmu_mp 1 1724 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1732 }; 1725 };
1733 1726
1734 xhci0: usb@ee000000 { 1727 xhci0: usb@ee000000 {
1735 compatible = "renesas 1728 compatible = "renesas,xhci-r8a77990",
1736 "renesas 1729 "renesas,rcar-gen3-xhci";
1737 reg = <0 0xee000000 0 1730 reg = <0 0xee000000 0 0xc00>;
1738 interrupts = <GIC_SPI 1731 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1739 clocks = <&cpg CPG_MO 1732 clocks = <&cpg CPG_MOD 328>;
1740 power-domains = <&sys 1733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1741 resets = <&cpg 328>; 1734 resets = <&cpg 328>;
1742 status = "disabled"; 1735 status = "disabled";
1743 }; 1736 };
1744 1737
1745 usb3_peri0: usb@ee020000 { 1738 usb3_peri0: usb@ee020000 {
1746 compatible = "renesas 1739 compatible = "renesas,r8a77990-usb3-peri",
1747 "renesas 1740 "renesas,rcar-gen3-usb3-peri";
1748 reg = <0 0xee020000 0 1741 reg = <0 0xee020000 0 0x400>;
1749 interrupts = <GIC_SPI 1742 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1750 clocks = <&cpg CPG_MO 1743 clocks = <&cpg CPG_MOD 328>;
1751 power-domains = <&sys 1744 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1752 resets = <&cpg 328>; 1745 resets = <&cpg 328>;
1753 status = "disabled"; 1746 status = "disabled";
1754 }; 1747 };
1755 1748
1756 ohci0: usb@ee080000 { 1749 ohci0: usb@ee080000 {
1757 compatible = "generic 1750 compatible = "generic-ohci";
1758 reg = <0 0xee080000 0 1751 reg = <0 0xee080000 0 0x100>;
1759 interrupts = <GIC_SPI 1752 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1760 clocks = <&cpg CPG_MO 1753 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1761 phys = <&usb2_phy0 1> 1754 phys = <&usb2_phy0 1>;
1762 phy-names = "usb"; 1755 phy-names = "usb";
1763 power-domains = <&sys 1756 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1764 resets = <&cpg 703>, 1757 resets = <&cpg 703>, <&cpg 704>;
1765 status = "disabled"; 1758 status = "disabled";
1766 }; 1759 };
1767 1760
1768 ehci0: usb@ee080100 { 1761 ehci0: usb@ee080100 {
1769 compatible = "generic 1762 compatible = "generic-ehci";
1770 reg = <0 0xee080100 0 1763 reg = <0 0xee080100 0 0x100>;
1771 interrupts = <GIC_SPI 1764 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1772 clocks = <&cpg CPG_MO 1765 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1773 phys = <&usb2_phy0 2> 1766 phys = <&usb2_phy0 2>;
1774 phy-names = "usb"; 1767 phy-names = "usb";
1775 companion = <&ohci0>; 1768 companion = <&ohci0>;
1776 power-domains = <&sys 1769 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1777 resets = <&cpg 703>, 1770 resets = <&cpg 703>, <&cpg 704>;
1778 status = "disabled"; 1771 status = "disabled";
1779 }; 1772 };
1780 1773
1781 usb2_phy0: usb-phy@ee080200 { 1774 usb2_phy0: usb-phy@ee080200 {
1782 compatible = "renesas 1775 compatible = "renesas,usb2-phy-r8a77990",
1783 "renesas 1776 "renesas,rcar-gen3-usb2-phy";
1784 reg = <0 0xee080200 0 1777 reg = <0 0xee080200 0 0x700>;
1785 interrupts = <GIC_SPI 1778 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1786 clocks = <&cpg CPG_MO 1779 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1787 power-domains = <&sys 1780 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1788 resets = <&cpg 703>, 1781 resets = <&cpg 703>, <&cpg 704>;
1789 #phy-cells = <1>; 1782 #phy-cells = <1>;
1790 status = "disabled"; 1783 status = "disabled";
1791 }; 1784 };
1792 1785
1793 sdhi0: mmc@ee100000 { 1786 sdhi0: mmc@ee100000 {
1794 compatible = "renesas 1787 compatible = "renesas,sdhi-r8a77990",
1795 "renesas 1788 "renesas,rcar-gen3-sdhi";
1796 reg = <0 0xee100000 0 1789 reg = <0 0xee100000 0 0x2000>;
1797 interrupts = <GIC_SPI 1790 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1798 clocks = <&cpg CPG_MO 1791 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>;
1799 clock-names = "core", 1792 clock-names = "core", "clkh";
1800 max-frequency = <2000 1793 max-frequency = <200000000>;
1801 power-domains = <&sys 1794 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1802 resets = <&cpg 314>; 1795 resets = <&cpg 314>;
1803 iommus = <&ipmmu_ds1 1796 iommus = <&ipmmu_ds1 32>;
1804 status = "disabled"; 1797 status = "disabled";
1805 }; 1798 };
1806 1799
1807 sdhi1: mmc@ee120000 { 1800 sdhi1: mmc@ee120000 {
1808 compatible = "renesas 1801 compatible = "renesas,sdhi-r8a77990",
1809 "renesas 1802 "renesas,rcar-gen3-sdhi";
1810 reg = <0 0xee120000 0 1803 reg = <0 0xee120000 0 0x2000>;
1811 interrupts = <GIC_SPI 1804 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1812 clocks = <&cpg CPG_MO 1805 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>;
1813 clock-names = "core", 1806 clock-names = "core", "clkh";
1814 max-frequency = <2000 1807 max-frequency = <200000000>;
1815 power-domains = <&sys 1808 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1816 resets = <&cpg 313>; 1809 resets = <&cpg 313>;
1817 iommus = <&ipmmu_ds1 1810 iommus = <&ipmmu_ds1 33>;
1818 status = "disabled"; 1811 status = "disabled";
1819 }; 1812 };
1820 1813
1821 sdhi3: mmc@ee160000 { 1814 sdhi3: mmc@ee160000 {
1822 compatible = "renesas 1815 compatible = "renesas,sdhi-r8a77990",
1823 "renesas 1816 "renesas,rcar-gen3-sdhi";
1824 reg = <0 0xee160000 0 1817 reg = <0 0xee160000 0 0x2000>;
1825 interrupts = <GIC_SPI 1818 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1826 clocks = <&cpg CPG_MO 1819 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>;
1827 clock-names = "core", 1820 clock-names = "core", "clkh";
1828 max-frequency = <2000 1821 max-frequency = <200000000>;
1829 power-domains = <&sys 1822 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1830 resets = <&cpg 311>; 1823 resets = <&cpg 311>;
1831 iommus = <&ipmmu_ds1 1824 iommus = <&ipmmu_ds1 35>;
1832 status = "disabled"; 1825 status = "disabled";
1833 }; 1826 };
1834 1827
1835 rpc: spi@ee200000 { <<
1836 compatible = "renesas <<
1837 "renesas <<
1838 reg = <0 0xee200000 0 <<
1839 <0 0x08000000 0 <<
1840 <0 0xee208000 0 <<
1841 reg-names = "regs", " <<
1842 interrupts = <GIC_SPI <<
1843 clocks = <&cpg CPG_MO <<
1844 power-domains = <&sys <<
1845 resets = <&cpg 917>; <<
1846 #address-cells = <1>; <<
1847 #size-cells = <0>; <<
1848 status = "disabled"; <<
1849 }; <<
1850 <<
1851 gic: interrupt-controller@f10 1828 gic: interrupt-controller@f1010000 {
1852 compatible = "arm,gic 1829 compatible = "arm,gic-400";
1853 #interrupt-cells = <3 1830 #interrupt-cells = <3>;
1854 #address-cells = <0>; 1831 #address-cells = <0>;
1855 interrupt-controller; 1832 interrupt-controller;
1856 reg = <0x0 0xf1010000 1833 reg = <0x0 0xf1010000 0 0x1000>,
1857 <0x0 0xf1020000 1834 <0x0 0xf1020000 0 0x20000>,
1858 <0x0 0xf1040000 1835 <0x0 0xf1040000 0 0x20000>,
1859 <0x0 0xf1060000 1836 <0x0 0xf1060000 0 0x20000>;
1860 interrupts = <GIC_PPI 1837 interrupts = <GIC_PPI 9
1861 (GIC_ 1838 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1862 clocks = <&cpg CPG_MO 1839 clocks = <&cpg CPG_MOD 408>;
1863 clock-names = "clk"; 1840 clock-names = "clk";
1864 power-domains = <&sys 1841 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1865 resets = <&cpg 408>; 1842 resets = <&cpg 408>;
1866 }; 1843 };
1867 1844
1868 pciec0: pcie@fe000000 { 1845 pciec0: pcie@fe000000 {
1869 compatible = "renesas 1846 compatible = "renesas,pcie-r8a77990",
1870 "renesas 1847 "renesas,pcie-rcar-gen3";
1871 reg = <0 0xfe000000 0 1848 reg = <0 0xfe000000 0 0x80000>;
1872 #address-cells = <3>; 1849 #address-cells = <3>;
1873 #size-cells = <2>; 1850 #size-cells = <2>;
1874 bus-range = <0x00 0xf 1851 bus-range = <0x00 0xff>;
1875 device_type = "pci"; 1852 device_type = "pci";
1876 ranges = <0x01000000 1853 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1877 <0x02000000 1854 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1878 <0x02000000 1855 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1879 <0x42000000 1856 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1880 /* Map all possible D !! 1857 /* Map all possible DDR as inbound ranges */
1881 dma-ranges = <0x42000 !! 1858 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1882 interrupts = <GIC_SPI 1859 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1883 <GIC_SPI 1860 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1884 <GIC_SPI 1861 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1885 #interrupt-cells = <1 1862 #interrupt-cells = <1>;
1886 interrupt-map-mask = 1863 interrupt-map-mask = <0 0 0 0>;
1887 interrupt-map = <0 0 1864 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1888 clocks = <&cpg CPG_MO 1865 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1889 clock-names = "pcie", 1866 clock-names = "pcie", "pcie_bus";
1890 power-domains = <&sys 1867 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1891 resets = <&cpg 319>; 1868 resets = <&cpg 319>;
1892 iommu-map = <0 &ipmmu <<
1893 iommu-map-mask = <0>; <<
1894 status = "disabled"; 1869 status = "disabled";
1895 }; 1870 };
1896 1871
1897 vspb0: vsp@fe960000 { 1872 vspb0: vsp@fe960000 {
1898 compatible = "renesas 1873 compatible = "renesas,vsp2";
1899 reg = <0 0xfe960000 0 1874 reg = <0 0xfe960000 0 0x8000>;
1900 interrupts = <GIC_SPI 1875 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1901 clocks = <&cpg CPG_MO 1876 clocks = <&cpg CPG_MOD 626>;
1902 power-domains = <&sys 1877 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1903 resets = <&cpg 626>; 1878 resets = <&cpg 626>;
1904 renesas,fcp = <&fcpvb 1879 renesas,fcp = <&fcpvb0>;
1905 }; 1880 };
1906 1881
1907 fcpvb0: fcp@fe96f000 { 1882 fcpvb0: fcp@fe96f000 {
1908 compatible = "renesas 1883 compatible = "renesas,fcpv";
1909 reg = <0 0xfe96f000 0 1884 reg = <0 0xfe96f000 0 0x200>;
1910 clocks = <&cpg CPG_MO 1885 clocks = <&cpg CPG_MOD 607>;
1911 power-domains = <&sys 1886 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1912 resets = <&cpg 607>; 1887 resets = <&cpg 607>;
1913 iommus = <&ipmmu_vp0 1888 iommus = <&ipmmu_vp0 5>;
1914 }; 1889 };
1915 1890
1916 vspi0: vsp@fe9a0000 { 1891 vspi0: vsp@fe9a0000 {
1917 compatible = "renesas 1892 compatible = "renesas,vsp2";
1918 reg = <0 0xfe9a0000 0 1893 reg = <0 0xfe9a0000 0 0x8000>;
1919 interrupts = <GIC_SPI 1894 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1920 clocks = <&cpg CPG_MO 1895 clocks = <&cpg CPG_MOD 631>;
1921 power-domains = <&sys 1896 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1922 resets = <&cpg 631>; 1897 resets = <&cpg 631>;
1923 renesas,fcp = <&fcpvi 1898 renesas,fcp = <&fcpvi0>;
1924 }; 1899 };
1925 1900
1926 fcpvi0: fcp@fe9af000 { 1901 fcpvi0: fcp@fe9af000 {
1927 compatible = "renesas 1902 compatible = "renesas,fcpv";
1928 reg = <0 0xfe9af000 0 1903 reg = <0 0xfe9af000 0 0x200>;
1929 clocks = <&cpg CPG_MO 1904 clocks = <&cpg CPG_MOD 611>;
1930 power-domains = <&sys 1905 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1931 resets = <&cpg 611>; 1906 resets = <&cpg 611>;
1932 iommus = <&ipmmu_vp0 1907 iommus = <&ipmmu_vp0 8>;
1933 }; 1908 };
1934 1909
1935 vspd0: vsp@fea20000 { 1910 vspd0: vsp@fea20000 {
1936 compatible = "renesas 1911 compatible = "renesas,vsp2";
1937 reg = <0 0xfea20000 0 1912 reg = <0 0xfea20000 0 0x7000>;
1938 interrupts = <GIC_SPI 1913 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1939 clocks = <&cpg CPG_MO 1914 clocks = <&cpg CPG_MOD 623>;
1940 power-domains = <&sys 1915 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1941 resets = <&cpg 623>; 1916 resets = <&cpg 623>;
1942 renesas,fcp = <&fcpvd 1917 renesas,fcp = <&fcpvd0>;
1943 }; 1918 };
1944 1919
1945 fcpvd0: fcp@fea27000 { 1920 fcpvd0: fcp@fea27000 {
1946 compatible = "renesas 1921 compatible = "renesas,fcpv";
1947 reg = <0 0xfea27000 0 1922 reg = <0 0xfea27000 0 0x200>;
1948 clocks = <&cpg CPG_MO 1923 clocks = <&cpg CPG_MOD 603>;
1949 power-domains = <&sys 1924 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1950 resets = <&cpg 603>; 1925 resets = <&cpg 603>;
1951 iommus = <&ipmmu_vi0 1926 iommus = <&ipmmu_vi0 8>;
1952 }; 1927 };
1953 1928
1954 vspd1: vsp@fea28000 { 1929 vspd1: vsp@fea28000 {
1955 compatible = "renesas 1930 compatible = "renesas,vsp2";
1956 reg = <0 0xfea28000 0 1931 reg = <0 0xfea28000 0 0x7000>;
1957 interrupts = <GIC_SPI 1932 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1958 clocks = <&cpg CPG_MO 1933 clocks = <&cpg CPG_MOD 622>;
1959 power-domains = <&sys 1934 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1960 resets = <&cpg 622>; 1935 resets = <&cpg 622>;
1961 renesas,fcp = <&fcpvd 1936 renesas,fcp = <&fcpvd1>;
1962 }; 1937 };
1963 1938
1964 fcpvd1: fcp@fea2f000 { 1939 fcpvd1: fcp@fea2f000 {
1965 compatible = "renesas 1940 compatible = "renesas,fcpv";
1966 reg = <0 0xfea2f000 0 1941 reg = <0 0xfea2f000 0 0x200>;
1967 clocks = <&cpg CPG_MO 1942 clocks = <&cpg CPG_MOD 602>;
1968 power-domains = <&sys 1943 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1969 resets = <&cpg 602>; 1944 resets = <&cpg 602>;
1970 iommus = <&ipmmu_vi0 1945 iommus = <&ipmmu_vi0 9>;
1971 }; 1946 };
1972 1947
1973 cmm0: cmm@fea40000 { 1948 cmm0: cmm@fea40000 {
1974 compatible = "renesas 1949 compatible = "renesas,r8a77990-cmm",
1975 "renesas 1950 "renesas,rcar-gen3-cmm";
1976 reg = <0 0xfea40000 0 1951 reg = <0 0xfea40000 0 0x1000>;
1977 power-domains = <&sys 1952 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1978 clocks = <&cpg CPG_MO 1953 clocks = <&cpg CPG_MOD 711>;
1979 resets = <&cpg 711>; 1954 resets = <&cpg 711>;
1980 }; 1955 };
1981 1956
1982 cmm1: cmm@fea50000 { 1957 cmm1: cmm@fea50000 {
1983 compatible = "renesas 1958 compatible = "renesas,r8a77990-cmm",
1984 "renesas 1959 "renesas,rcar-gen3-cmm";
1985 reg = <0 0xfea50000 0 1960 reg = <0 0xfea50000 0 0x1000>;
1986 power-domains = <&sys 1961 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1987 clocks = <&cpg CPG_MO 1962 clocks = <&cpg CPG_MOD 710>;
1988 resets = <&cpg 710>; 1963 resets = <&cpg 710>;
1989 }; 1964 };
1990 1965
1991 csi40: csi2@feaa0000 { 1966 csi40: csi2@feaa0000 {
1992 compatible = "renesas 1967 compatible = "renesas,r8a77990-csi2";
1993 reg = <0 0xfeaa0000 0 1968 reg = <0 0xfeaa0000 0 0x10000>;
1994 interrupts = <GIC_SPI 1969 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1995 clocks = <&cpg CPG_MO 1970 clocks = <&cpg CPG_MOD 716>;
1996 power-domains = <&sys 1971 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1997 resets = <&cpg 716>; 1972 resets = <&cpg 716>;
1998 status = "disabled"; 1973 status = "disabled";
1999 1974
2000 ports { 1975 ports {
2001 #address-cell 1976 #address-cells = <1>;
2002 #size-cells = 1977 #size-cells = <0>;
2003 1978
2004 port@0 { 1979 port@0 {
2005 reg = 1980 reg = <0>;
2006 }; 1981 };
2007 1982
2008 port@1 { 1983 port@1 {
2009 #addr 1984 #address-cells = <1>;
2010 #size 1985 #size-cells = <0>;
2011 1986
2012 reg = 1987 reg = <1>;
2013 1988
2014 csi40 1989 csi40vin4: endpoint@0 {
2015 1990 reg = <0>;
2016 1991 remote-endpoint = <&vin4csi40>;
2017 }; 1992 };
2018 csi40 1993 csi40vin5: endpoint@1 {
2019 1994 reg = <1>;
2020 1995 remote-endpoint = <&vin5csi40>;
2021 }; 1996 };
2022 }; 1997 };
2023 }; 1998 };
2024 }; 1999 };
2025 2000
2026 du: display@feb00000 { 2001 du: display@feb00000 {
2027 compatible = "renesas 2002 compatible = "renesas,du-r8a77990";
2028 reg = <0 0xfeb00000 0 2003 reg = <0 0xfeb00000 0 0x40000>;
2029 interrupts = <GIC_SPI 2004 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2030 <GIC_SPI 2005 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
2031 clocks = <&cpg CPG_MO 2006 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2032 clock-names = "du.0", 2007 clock-names = "du.0", "du.1";
2033 resets = <&cpg 724>; 2008 resets = <&cpg 724>;
2034 reset-names = "du.0"; 2009 reset-names = "du.0";
2035 2010
2036 renesas,cmms = <&cmm0 2011 renesas,cmms = <&cmm0>, <&cmm1>;
2037 renesas,vsps = <&vspd 2012 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2038 2013
2039 status = "disabled"; 2014 status = "disabled";
2040 2015
2041 ports { 2016 ports {
2042 #address-cell 2017 #address-cells = <1>;
2043 #size-cells = 2018 #size-cells = <0>;
2044 2019
2045 port@0 { 2020 port@0 {
2046 reg = 2021 reg = <0>;
>> 2022 du_out_rgb: endpoint {
>> 2023 };
2047 }; 2024 };
2048 2025
2049 port@1 { 2026 port@1 {
2050 reg = 2027 reg = <1>;
2051 du_ou 2028 du_out_lvds0: endpoint {
2052 2029 remote-endpoint = <&lvds0_in>;
2053 }; 2030 };
2054 }; 2031 };
2055 2032
2056 port@2 { 2033 port@2 {
2057 reg = 2034 reg = <2>;
2058 du_ou 2035 du_out_lvds1: endpoint {
2059 2036 remote-endpoint = <&lvds1_in>;
2060 }; 2037 };
2061 }; 2038 };
2062 }; 2039 };
2063 }; 2040 };
2064 2041
2065 lvds0: lvds-encoder@feb90000 2042 lvds0: lvds-encoder@feb90000 {
2066 compatible = "renesas 2043 compatible = "renesas,r8a77990-lvds";
2067 reg = <0 0xfeb90000 0 2044 reg = <0 0xfeb90000 0 0x20>;
2068 clocks = <&cpg CPG_MO 2045 clocks = <&cpg CPG_MOD 727>;
2069 power-domains = <&sys 2046 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2070 resets = <&cpg 727>; 2047 resets = <&cpg 727>;
2071 status = "disabled"; 2048 status = "disabled";
2072 2049
2073 renesas,companion = < 2050 renesas,companion = <&lvds1>;
2074 2051
2075 ports { 2052 ports {
2076 #address-cell 2053 #address-cells = <1>;
2077 #size-cells = 2054 #size-cells = <0>;
2078 2055
2079 port@0 { 2056 port@0 {
2080 reg = 2057 reg = <0>;
2081 lvds0 2058 lvds0_in: endpoint {
2082 2059 remote-endpoint = <&du_out_lvds0>;
2083 }; 2060 };
2084 }; 2061 };
2085 2062
2086 port@1 { 2063 port@1 {
2087 reg = 2064 reg = <1>;
>> 2065 lvds0_out: endpoint {
>> 2066 };
2088 }; 2067 };
2089 }; 2068 };
2090 }; 2069 };
2091 2070
2092 lvds1: lvds-encoder@feb90100 2071 lvds1: lvds-encoder@feb90100 {
2093 compatible = "renesas 2072 compatible = "renesas,r8a77990-lvds";
2094 reg = <0 0xfeb90100 0 2073 reg = <0 0xfeb90100 0 0x20>;
2095 clocks = <&cpg CPG_MO 2074 clocks = <&cpg CPG_MOD 727>;
2096 power-domains = <&sys 2075 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2097 resets = <&cpg 726>; 2076 resets = <&cpg 726>;
2098 status = "disabled"; 2077 status = "disabled";
2099 2078
2100 ports { 2079 ports {
2101 #address-cell 2080 #address-cells = <1>;
2102 #size-cells = 2081 #size-cells = <0>;
2103 2082
2104 port@0 { 2083 port@0 {
2105 reg = 2084 reg = <0>;
2106 lvds1 2085 lvds1_in: endpoint {
2107 2086 remote-endpoint = <&du_out_lvds1>;
2108 }; 2087 };
2109 }; 2088 };
2110 2089
2111 port@1 { 2090 port@1 {
2112 reg = 2091 reg = <1>;
>> 2092 lvds1_out: endpoint {
>> 2093 };
2113 }; 2094 };
2114 }; 2095 };
2115 }; 2096 };
2116 2097
2117 prr: chipid@fff00044 { 2098 prr: chipid@fff00044 {
2118 compatible = "renesas 2099 compatible = "renesas,prr";
2119 reg = <0 0xfff00044 0 2100 reg = <0 0xfff00044 0 4>;
2120 }; 2101 };
2121 }; 2102 };
2122 2103
2123 thermal-zones { 2104 thermal-zones {
2124 cpu-thermal { 2105 cpu-thermal {
2125 polling-delay-passive 2106 polling-delay-passive = <250>;
2126 polling-delay = <0>; 2107 polling-delay = <0>;
2127 thermal-sensors = <&t !! 2108 thermal-sensors = <&thermal 0>;
2128 sustainable-power = < 2109 sustainable-power = <717>;
2129 2110
2130 cooling-maps { 2111 cooling-maps {
2131 map0 { 2112 map0 {
2132 trip 2113 trip = <&target>;
2133 cooli 2114 cooling-device = <&a53_0 0 2>;
2134 contr 2115 contribution = <1024>;
2135 }; 2116 };
2136 }; 2117 };
2137 2118
2138 trips { 2119 trips {
2139 sensor1_crit: 2120 sensor1_crit: sensor1-crit {
2140 tempe 2121 temperature = <120000>;
2141 hyste 2122 hysteresis = <2000>;
2142 type 2123 type = "critical";
2143 }; 2124 };
2144 2125
2145 target: trip- 2126 target: trip-point1 {
2146 tempe 2127 temperature = <100000>;
2147 hyste 2128 hysteresis = <2000>;
2148 type 2129 type = "passive";
2149 }; 2130 };
2150 }; 2131 };
2151 }; 2132 };
2152 }; 2133 };
2153 2134
2154 timer { 2135 timer {
2155 compatible = "arm,armv8-timer 2136 compatible = "arm,armv8-timer";
2156 interrupts-extended = <&gic G 2137 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2157 <&gic G 2138 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2158 <&gic G 2139 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2159 <&gic G 2140 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2160 interrupt-names = "sec-phys", <<
2161 }; 2141 };
2162 }; 2142 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.