1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car E3 (R8A779 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 * 4 *
5 * Copyright (C) 2018-2019 Renesas Electronics 5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */ 6 */
7 7
8 #include <dt-bindings/clock/r8a77990-cpg-mssr. 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h> 10 #include <dt-bindings/power/r8a77990-sysc.h>
11 11
12 / { 12 / {
13 compatible = "renesas,r8a77990"; 13 compatible = "renesas,r8a77990";
14 #address-cells = <2>; 14 #address-cells = <2>;
15 #size-cells = <2>; 15 #size-cells = <2>;
16 16
>> 17 aliases {
>> 18 i2c0 = &i2c0;
>> 19 i2c1 = &i2c1;
>> 20 i2c2 = &i2c2;
>> 21 i2c3 = &i2c3;
>> 22 i2c4 = &i2c4;
>> 23 i2c5 = &i2c5;
>> 24 i2c6 = &i2c6;
>> 25 i2c7 = &i2c7;
>> 26 };
>> 27
17 /* 28 /*
18 * The external audio clocks are confi 29 * The external audio clocks are configured as 0 Hz fixed frequency
19 * clocks by default. 30 * clocks by default.
20 * Boards that provide audio clocks sh 31 * Boards that provide audio clocks should override them.
21 */ 32 */
22 audio_clk_a: audio_clk_a { 33 audio_clk_a: audio_clk_a {
23 compatible = "fixed-clock"; 34 compatible = "fixed-clock";
24 #clock-cells = <0>; 35 #clock-cells = <0>;
25 clock-frequency = <0>; 36 clock-frequency = <0>;
26 }; 37 };
27 38
28 audio_clk_b: audio_clk_b { 39 audio_clk_b: audio_clk_b {
29 compatible = "fixed-clock"; 40 compatible = "fixed-clock";
30 #clock-cells = <0>; 41 #clock-cells = <0>;
31 clock-frequency = <0>; 42 clock-frequency = <0>;
32 }; 43 };
33 44
34 audio_clk_c: audio_clk_c { 45 audio_clk_c: audio_clk_c {
35 compatible = "fixed-clock"; 46 compatible = "fixed-clock";
36 #clock-cells = <0>; 47 #clock-cells = <0>;
37 clock-frequency = <0>; 48 clock-frequency = <0>;
38 }; 49 };
39 50
40 /* External CAN clock - to be overridd 51 /* External CAN clock - to be overridden by boards that provide it */
41 can_clk: can { 52 can_clk: can {
42 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
43 #clock-cells = <0>; 54 #clock-cells = <0>;
44 clock-frequency = <0>; 55 clock-frequency = <0>;
45 }; 56 };
46 57
47 cluster1_opp: opp-table-1 { !! 58 cluster1_opp: opp_table10 {
48 compatible = "operating-points 59 compatible = "operating-points-v2";
49 opp-shared; 60 opp-shared;
50 opp-800000000 { 61 opp-800000000 {
51 opp-hz = /bits/ 64 <80 62 opp-hz = /bits/ 64 <800000000>;
52 clock-latency-ns = <30 63 clock-latency-ns = <300000>;
53 }; 64 };
54 opp-1000000000 { 65 opp-1000000000 {
55 opp-hz = /bits/ 64 <10 66 opp-hz = /bits/ 64 <1000000000>;
56 clock-latency-ns = <30 67 clock-latency-ns = <300000>;
57 }; 68 };
58 opp-1200000000 { 69 opp-1200000000 {
59 opp-hz = /bits/ 64 <12 70 opp-hz = /bits/ 64 <1200000000>;
60 clock-latency-ns = <30 71 clock-latency-ns = <300000>;
61 opp-suspend; 72 opp-suspend;
62 }; 73 };
63 }; 74 };
64 75
65 cpus { 76 cpus {
66 #address-cells = <1>; 77 #address-cells = <1>;
67 #size-cells = <0>; 78 #size-cells = <0>;
68 79
69 a53_0: cpu@0 { 80 a53_0: cpu@0 {
70 compatible = "arm,cort 81 compatible = "arm,cortex-a53";
71 reg = <0>; 82 reg = <0>;
72 device_type = "cpu"; 83 device_type = "cpu";
73 #cooling-cells = <2>; 84 #cooling-cells = <2>;
74 power-domains = <&sysc 85 power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
75 next-level-cache = <&L 86 next-level-cache = <&L2_CA53>;
76 enable-method = "psci" 87 enable-method = "psci";
77 cpu-idle-states = <&CP <<
78 dynamic-power-coeffici 88 dynamic-power-coefficient = <277>;
79 clocks = <&cpg CPG_COR !! 89 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
80 operating-points-v2 = 90 operating-points-v2 = <&cluster1_opp>;
81 }; 91 };
82 92
83 a53_1: cpu@1 { 93 a53_1: cpu@1 {
84 compatible = "arm,cort 94 compatible = "arm,cortex-a53";
85 reg = <1>; 95 reg = <1>;
86 device_type = "cpu"; 96 device_type = "cpu";
87 power-domains = <&sysc 97 power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
88 next-level-cache = <&L 98 next-level-cache = <&L2_CA53>;
89 enable-method = "psci" 99 enable-method = "psci";
90 cpu-idle-states = <&CP !! 100 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
91 clocks = <&cpg CPG_COR <<
92 operating-points-v2 = 101 operating-points-v2 = <&cluster1_opp>;
93 }; 102 };
94 103
95 L2_CA53: cache-controller-0 { 104 L2_CA53: cache-controller-0 {
96 compatible = "cache"; 105 compatible = "cache";
97 power-domains = <&sysc 106 power-domains = <&sysc R8A77990_PD_CA53_SCU>;
98 cache-unified; 107 cache-unified;
99 cache-level = <2>; 108 cache-level = <2>;
100 }; 109 };
101 <<
102 idle-states { <<
103 entry-method = "psci"; <<
104 <<
105 CPU_SLEEP_0: cpu-sleep <<
106 compatible = " <<
107 arm,psci-suspe <<
108 local-timer-st <<
109 entry-latency- <<
110 exit-latency-u <<
111 min-residency- <<
112 }; <<
113 }; <<
114 }; 110 };
115 111
116 extal_clk: extal { 112 extal_clk: extal {
117 compatible = "fixed-clock"; 113 compatible = "fixed-clock";
118 #clock-cells = <0>; 114 #clock-cells = <0>;
119 /* This value must be overridd 115 /* This value must be overridden by the board */
120 clock-frequency = <0>; 116 clock-frequency = <0>;
121 }; 117 };
122 118
123 /* External PCIe clock - can be overri 119 /* External PCIe clock - can be overridden by the board */
124 pcie_bus_clk: pcie_bus { 120 pcie_bus_clk: pcie_bus {
125 compatible = "fixed-clock"; 121 compatible = "fixed-clock";
126 #clock-cells = <0>; 122 #clock-cells = <0>;
127 clock-frequency = <0>; 123 clock-frequency = <0>;
128 }; 124 };
129 125
130 pmu_a53 { 126 pmu_a53 {
131 compatible = "arm,cortex-a53-p 127 compatible = "arm,cortex-a53-pmu";
132 interrupts-extended = <&gic GI 128 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
133 <&gic GI 129 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-affinity = <&a53_0>, 130 interrupt-affinity = <&a53_0>, <&a53_1>;
135 }; 131 };
136 132
137 psci { 133 psci {
138 compatible = "arm,psci-1.0", " 134 compatible = "arm,psci-1.0", "arm,psci-0.2";
139 method = "smc"; 135 method = "smc";
140 }; 136 };
141 137
142 /* External SCIF clock - to be overrid 138 /* External SCIF clock - to be overridden by boards that provide it */
143 scif_clk: scif { 139 scif_clk: scif {
144 compatible = "fixed-clock"; 140 compatible = "fixed-clock";
145 #clock-cells = <0>; 141 #clock-cells = <0>;
146 clock-frequency = <0>; 142 clock-frequency = <0>;
147 }; 143 };
148 144
149 soc: soc { 145 soc: soc {
150 compatible = "simple-bus"; 146 compatible = "simple-bus";
151 interrupt-parent = <&gic>; 147 interrupt-parent = <&gic>;
152 #address-cells = <2>; 148 #address-cells = <2>;
153 #size-cells = <2>; 149 #size-cells = <2>;
154 ranges; 150 ranges;
155 151
156 rwdt: watchdog@e6020000 { 152 rwdt: watchdog@e6020000 {
157 compatible = "renesas, 153 compatible = "renesas,r8a77990-wdt",
158 "renesas, 154 "renesas,rcar-gen3-wdt";
159 reg = <0 0xe6020000 0 155 reg = <0 0xe6020000 0 0x0c>;
160 interrupts = <GIC_SPI <<
161 clocks = <&cpg CPG_MOD 156 clocks = <&cpg CPG_MOD 402>;
162 power-domains = <&sysc 157 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
163 resets = <&cpg 402>; 158 resets = <&cpg 402>;
164 status = "disabled"; 159 status = "disabled";
165 }; 160 };
166 161
167 gpio0: gpio@e6050000 { 162 gpio0: gpio@e6050000 {
168 compatible = "renesas, 163 compatible = "renesas,gpio-r8a77990",
169 "renesas, 164 "renesas,rcar-gen3-gpio";
170 reg = <0 0xe6050000 0 165 reg = <0 0xe6050000 0 0x50>;
171 interrupts = <GIC_SPI 166 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
172 #gpio-cells = <2>; 167 #gpio-cells = <2>;
173 gpio-controller; 168 gpio-controller;
174 gpio-ranges = <&pfc 0 169 gpio-ranges = <&pfc 0 0 18>;
175 #interrupt-cells = <2> 170 #interrupt-cells = <2>;
176 interrupt-controller; 171 interrupt-controller;
177 clocks = <&cpg CPG_MOD 172 clocks = <&cpg CPG_MOD 912>;
178 power-domains = <&sysc 173 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
179 resets = <&cpg 912>; 174 resets = <&cpg 912>;
180 }; 175 };
181 176
182 gpio1: gpio@e6051000 { 177 gpio1: gpio@e6051000 {
183 compatible = "renesas, 178 compatible = "renesas,gpio-r8a77990",
184 "renesas, 179 "renesas,rcar-gen3-gpio";
185 reg = <0 0xe6051000 0 180 reg = <0 0xe6051000 0 0x50>;
186 interrupts = <GIC_SPI 181 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
187 #gpio-cells = <2>; 182 #gpio-cells = <2>;
188 gpio-controller; 183 gpio-controller;
189 gpio-ranges = <&pfc 0 184 gpio-ranges = <&pfc 0 32 23>;
190 #interrupt-cells = <2> 185 #interrupt-cells = <2>;
191 interrupt-controller; 186 interrupt-controller;
192 clocks = <&cpg CPG_MOD 187 clocks = <&cpg CPG_MOD 911>;
193 power-domains = <&sysc 188 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
194 resets = <&cpg 911>; 189 resets = <&cpg 911>;
195 }; 190 };
196 191
197 gpio2: gpio@e6052000 { 192 gpio2: gpio@e6052000 {
198 compatible = "renesas, 193 compatible = "renesas,gpio-r8a77990",
199 "renesas, 194 "renesas,rcar-gen3-gpio";
200 reg = <0 0xe6052000 0 195 reg = <0 0xe6052000 0 0x50>;
201 interrupts = <GIC_SPI 196 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
202 #gpio-cells = <2>; 197 #gpio-cells = <2>;
203 gpio-controller; 198 gpio-controller;
204 gpio-ranges = <&pfc 0 199 gpio-ranges = <&pfc 0 64 26>;
205 #interrupt-cells = <2> 200 #interrupt-cells = <2>;
206 interrupt-controller; 201 interrupt-controller;
207 clocks = <&cpg CPG_MOD 202 clocks = <&cpg CPG_MOD 910>;
208 power-domains = <&sysc 203 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
209 resets = <&cpg 910>; 204 resets = <&cpg 910>;
210 }; 205 };
211 206
212 gpio3: gpio@e6053000 { 207 gpio3: gpio@e6053000 {
213 compatible = "renesas, 208 compatible = "renesas,gpio-r8a77990",
214 "renesas, 209 "renesas,rcar-gen3-gpio";
215 reg = <0 0xe6053000 0 210 reg = <0 0xe6053000 0 0x50>;
216 interrupts = <GIC_SPI 211 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
217 #gpio-cells = <2>; 212 #gpio-cells = <2>;
218 gpio-controller; 213 gpio-controller;
219 gpio-ranges = <&pfc 0 214 gpio-ranges = <&pfc 0 96 16>;
220 #interrupt-cells = <2> 215 #interrupt-cells = <2>;
221 interrupt-controller; 216 interrupt-controller;
222 clocks = <&cpg CPG_MOD 217 clocks = <&cpg CPG_MOD 909>;
223 power-domains = <&sysc 218 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
224 resets = <&cpg 909>; 219 resets = <&cpg 909>;
225 }; 220 };
226 221
227 gpio4: gpio@e6054000 { 222 gpio4: gpio@e6054000 {
228 compatible = "renesas, 223 compatible = "renesas,gpio-r8a77990",
229 "renesas, 224 "renesas,rcar-gen3-gpio";
230 reg = <0 0xe6054000 0 225 reg = <0 0xe6054000 0 0x50>;
231 interrupts = <GIC_SPI 226 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
232 #gpio-cells = <2>; 227 #gpio-cells = <2>;
233 gpio-controller; 228 gpio-controller;
234 gpio-ranges = <&pfc 0 229 gpio-ranges = <&pfc 0 128 11>;
235 #interrupt-cells = <2> 230 #interrupt-cells = <2>;
236 interrupt-controller; 231 interrupt-controller;
237 clocks = <&cpg CPG_MOD 232 clocks = <&cpg CPG_MOD 908>;
238 power-domains = <&sysc 233 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
239 resets = <&cpg 908>; 234 resets = <&cpg 908>;
240 }; 235 };
241 236
242 gpio5: gpio@e6055000 { 237 gpio5: gpio@e6055000 {
243 compatible = "renesas, 238 compatible = "renesas,gpio-r8a77990",
244 "renesas, 239 "renesas,rcar-gen3-gpio";
245 reg = <0 0xe6055000 0 240 reg = <0 0xe6055000 0 0x50>;
246 interrupts = <GIC_SPI 241 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
247 #gpio-cells = <2>; 242 #gpio-cells = <2>;
248 gpio-controller; 243 gpio-controller;
249 gpio-ranges = <&pfc 0 244 gpio-ranges = <&pfc 0 160 20>;
250 #interrupt-cells = <2> 245 #interrupt-cells = <2>;
251 interrupt-controller; 246 interrupt-controller;
252 clocks = <&cpg CPG_MOD 247 clocks = <&cpg CPG_MOD 907>;
253 power-domains = <&sysc 248 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
254 resets = <&cpg 907>; 249 resets = <&cpg 907>;
255 }; 250 };
256 251
257 gpio6: gpio@e6055400 { 252 gpio6: gpio@e6055400 {
258 compatible = "renesas, 253 compatible = "renesas,gpio-r8a77990",
259 "renesas, 254 "renesas,rcar-gen3-gpio";
260 reg = <0 0xe6055400 0 255 reg = <0 0xe6055400 0 0x50>;
261 interrupts = <GIC_SPI 256 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
262 #gpio-cells = <2>; 257 #gpio-cells = <2>;
263 gpio-controller; 258 gpio-controller;
264 gpio-ranges = <&pfc 0 259 gpio-ranges = <&pfc 0 192 18>;
265 #interrupt-cells = <2> 260 #interrupt-cells = <2>;
266 interrupt-controller; 261 interrupt-controller;
267 clocks = <&cpg CPG_MOD 262 clocks = <&cpg CPG_MOD 906>;
268 power-domains = <&sysc 263 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
269 resets = <&cpg 906>; 264 resets = <&cpg 906>;
270 }; 265 };
271 266
272 pfc: pinctrl@e6060000 { !! 267 pfc: pin-controller@e6060000 {
273 compatible = "renesas, 268 compatible = "renesas,pfc-r8a77990";
274 reg = <0 0xe6060000 0 269 reg = <0 0xe6060000 0 0x508>;
275 }; 270 };
276 271
277 i2c_dvfs: i2c@e60b0000 { 272 i2c_dvfs: i2c@e60b0000 {
278 #address-cells = <1>; 273 #address-cells = <1>;
279 #size-cells = <0>; 274 #size-cells = <0>;
280 compatible = "renesas, !! 275 compatible = "renesas,iic-r8a77990";
281 "renesas, !! 276 reg = <0 0xe60b0000 0 0x15>;
282 "renesas, <<
283 reg = <0 0xe60b0000 0 <<
284 interrupts = <GIC_SPI 277 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&cpg CPG_MOD 278 clocks = <&cpg CPG_MOD 926>;
286 power-domains = <&sysc 279 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
287 resets = <&cpg 926>; 280 resets = <&cpg 926>;
288 dmas = <&dmac0 0x11>, 281 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
289 dma-names = "tx", "rx" 282 dma-names = "tx", "rx";
290 status = "disabled"; 283 status = "disabled";
291 }; 284 };
292 285
293 cmt0: timer@e60f0000 { 286 cmt0: timer@e60f0000 {
294 compatible = "renesas, 287 compatible = "renesas,r8a77990-cmt0",
295 "renesas, 288 "renesas,rcar-gen3-cmt0";
296 reg = <0 0xe60f0000 0 289 reg = <0 0xe60f0000 0 0x1004>;
297 interrupts = <GIC_SPI 290 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 291 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
299 clocks = <&cpg CPG_MOD 292 clocks = <&cpg CPG_MOD 303>;
300 clock-names = "fck"; 293 clock-names = "fck";
301 power-domains = <&sysc 294 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
302 resets = <&cpg 303>; 295 resets = <&cpg 303>;
303 status = "disabled"; 296 status = "disabled";
304 }; 297 };
305 298
306 cmt1: timer@e6130000 { 299 cmt1: timer@e6130000 {
307 compatible = "renesas, 300 compatible = "renesas,r8a77990-cmt1",
308 "renesas, 301 "renesas,rcar-gen3-cmt1";
309 reg = <0 0xe6130000 0 302 reg = <0 0xe6130000 0 0x1004>;
310 interrupts = <GIC_SPI 303 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
311 <GIC_SPI 304 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
312 <GIC_SPI 305 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
313 <GIC_SPI 306 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
314 <GIC_SPI 307 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
315 <GIC_SPI 308 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
316 <GIC_SPI 309 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 310 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
318 clocks = <&cpg CPG_MOD 311 clocks = <&cpg CPG_MOD 302>;
319 clock-names = "fck"; 312 clock-names = "fck";
320 power-domains = <&sysc 313 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
321 resets = <&cpg 302>; 314 resets = <&cpg 302>;
322 status = "disabled"; 315 status = "disabled";
323 }; 316 };
324 317
325 cmt2: timer@e6140000 { 318 cmt2: timer@e6140000 {
326 compatible = "renesas, 319 compatible = "renesas,r8a77990-cmt1",
327 "renesas, 320 "renesas,rcar-gen3-cmt1";
328 reg = <0 0xe6140000 0 321 reg = <0 0xe6140000 0 0x1004>;
329 interrupts = <GIC_SPI 322 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 323 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 324 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 325 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
333 <GIC_SPI 326 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 327 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
335 <GIC_SPI 328 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 329 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
337 clocks = <&cpg CPG_MOD 330 clocks = <&cpg CPG_MOD 301>;
338 clock-names = "fck"; 331 clock-names = "fck";
339 power-domains = <&sysc 332 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
340 resets = <&cpg 301>; 333 resets = <&cpg 301>;
341 status = "disabled"; 334 status = "disabled";
342 }; 335 };
343 336
344 cmt3: timer@e6148000 { 337 cmt3: timer@e6148000 {
345 compatible = "renesas, 338 compatible = "renesas,r8a77990-cmt1",
346 "renesas, 339 "renesas,rcar-gen3-cmt1";
347 reg = <0 0xe6148000 0 340 reg = <0 0xe6148000 0 0x1004>;
348 interrupts = <GIC_SPI 341 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 342 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
350 <GIC_SPI 343 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
351 <GIC_SPI 344 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 345 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 346 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 347 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 348 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
356 clocks = <&cpg CPG_MOD 349 clocks = <&cpg CPG_MOD 300>;
357 clock-names = "fck"; 350 clock-names = "fck";
358 power-domains = <&sysc 351 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
359 resets = <&cpg 300>; 352 resets = <&cpg 300>;
360 status = "disabled"; 353 status = "disabled";
361 }; 354 };
362 355
363 cpg: clock-controller@e6150000 356 cpg: clock-controller@e6150000 {
364 compatible = "renesas, 357 compatible = "renesas,r8a77990-cpg-mssr";
365 reg = <0 0xe6150000 0 358 reg = <0 0xe6150000 0 0x1000>;
366 clocks = <&extal_clk>; 359 clocks = <&extal_clk>;
367 clock-names = "extal"; 360 clock-names = "extal";
368 #clock-cells = <2>; 361 #clock-cells = <2>;
369 #power-domain-cells = 362 #power-domain-cells = <0>;
370 #reset-cells = <1>; 363 #reset-cells = <1>;
371 }; 364 };
372 365
373 rst: reset-controller@e6160000 366 rst: reset-controller@e6160000 {
374 compatible = "renesas, 367 compatible = "renesas,r8a77990-rst";
375 reg = <0 0xe6160000 0 368 reg = <0 0xe6160000 0 0x0200>;
376 }; 369 };
377 370
378 sysc: system-controller@e61800 371 sysc: system-controller@e6180000 {
379 compatible = "renesas, 372 compatible = "renesas,r8a77990-sysc";
380 reg = <0 0xe6180000 0 373 reg = <0 0xe6180000 0 0x0400>;
381 #power-domain-cells = 374 #power-domain-cells = <1>;
382 }; 375 };
383 376
384 thermal: thermal@e6190000 { 377 thermal: thermal@e6190000 {
385 compatible = "renesas, 378 compatible = "renesas,thermal-r8a77990";
386 reg = <0 0xe6190000 0 379 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
387 interrupts = <GIC_SPI 380 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
388 <GIC_SPI 381 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
389 <GIC_SPI 382 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
390 clocks = <&cpg CPG_MOD 383 clocks = <&cpg CPG_MOD 522>;
391 power-domains = <&sysc 384 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
392 resets = <&cpg 522>; 385 resets = <&cpg 522>;
393 #thermal-sensor-cells 386 #thermal-sensor-cells = <0>;
394 }; 387 };
395 388
396 intc_ex: interrupt-controller@ 389 intc_ex: interrupt-controller@e61c0000 {
397 compatible = "renesas, 390 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
398 #interrupt-cells = <2> 391 #interrupt-cells = <2>;
399 interrupt-controller; 392 interrupt-controller;
400 reg = <0 0xe61c0000 0 393 reg = <0 0xe61c0000 0 0x200>;
401 interrupts = <GIC_SPI !! 394 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
402 <GIC_SPI !! 395 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
403 <GIC_SPI !! 396 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
404 <GIC_SPI !! 397 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
405 <GIC_SPI !! 398 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
406 <GIC_SPI !! 399 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 400 clocks = <&cpg CPG_MOD 407>;
408 power-domains = <&sysc 401 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
409 resets = <&cpg 407>; 402 resets = <&cpg 407>;
410 }; 403 };
411 404
412 tmu0: timer@e61e0000 { <<
413 compatible = "renesas, <<
414 reg = <0 0xe61e0000 0 <<
415 interrupts = <GIC_SPI <<
416 <GIC_SPI <<
417 <GIC_SPI <<
418 interrupt-names = "tun <<
419 clocks = <&cpg CPG_MOD <<
420 clock-names = "fck"; <<
421 power-domains = <&sysc <<
422 resets = <&cpg 125>; <<
423 status = "disabled"; <<
424 }; <<
425 <<
426 tmu1: timer@e6fc0000 { <<
427 compatible = "renesas, <<
428 reg = <0 0xe6fc0000 0 <<
429 interrupts = <GIC_SPI <<
430 <GIC_SPI <<
431 <GIC_SPI <<
432 <GIC_SPI <<
433 interrupt-names = "tun <<
434 clocks = <&cpg CPG_MOD <<
435 clock-names = "fck"; <<
436 power-domains = <&sysc <<
437 resets = <&cpg 124>; <<
438 status = "disabled"; <<
439 }; <<
440 <<
441 tmu2: timer@e6fd0000 { <<
442 compatible = "renesas, <<
443 reg = <0 0xe6fd0000 0 <<
444 interrupts = <GIC_SPI <<
445 <GIC_SPI <<
446 <GIC_SPI <<
447 <GIC_SPI <<
448 interrupt-names = "tun <<
449 clocks = <&cpg CPG_MOD <<
450 clock-names = "fck"; <<
451 power-domains = <&sysc <<
452 resets = <&cpg 123>; <<
453 status = "disabled"; <<
454 }; <<
455 <<
456 tmu3: timer@e6fe0000 { <<
457 compatible = "renesas, <<
458 reg = <0 0xe6fe0000 0 <<
459 interrupts = <GIC_SPI <<
460 <GIC_SPI <<
461 <GIC_SPI <<
462 interrupt-names = "tun <<
463 clocks = <&cpg CPG_MOD <<
464 clock-names = "fck"; <<
465 power-domains = <&sysc <<
466 resets = <&cpg 122>; <<
467 status = "disabled"; <<
468 }; <<
469 <<
470 tmu4: timer@ffc00000 { <<
471 compatible = "renesas, <<
472 reg = <0 0xffc00000 0 <<
473 interrupts = <GIC_SPI <<
474 <GIC_SPI <<
475 <GIC_SPI <<
476 interrupt-names = "tun <<
477 clocks = <&cpg CPG_MOD <<
478 clock-names = "fck"; <<
479 power-domains = <&sysc <<
480 resets = <&cpg 121>; <<
481 status = "disabled"; <<
482 }; <<
483 <<
484 i2c0: i2c@e6500000 { 405 i2c0: i2c@e6500000 {
485 #address-cells = <1>; 406 #address-cells = <1>;
486 #size-cells = <0>; 407 #size-cells = <0>;
487 compatible = "renesas, 408 compatible = "renesas,i2c-r8a77990",
488 "renesas, 409 "renesas,rcar-gen3-i2c";
489 reg = <0 0xe6500000 0 410 reg = <0 0xe6500000 0 0x40>;
490 interrupts = <GIC_SPI 411 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&cpg CPG_MOD 412 clocks = <&cpg CPG_MOD 931>;
492 power-domains = <&sysc 413 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
493 resets = <&cpg 931>; 414 resets = <&cpg 931>;
494 dmas = <&dmac1 0x91>, 415 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
495 <&dmac2 0x91>, 416 <&dmac2 0x91>, <&dmac2 0x90>;
496 dma-names = "tx", "rx" 417 dma-names = "tx", "rx", "tx", "rx";
497 i2c-scl-internal-delay 418 i2c-scl-internal-delay-ns = <110>;
498 status = "disabled"; 419 status = "disabled";
499 }; 420 };
500 421
501 i2c1: i2c@e6508000 { 422 i2c1: i2c@e6508000 {
502 #address-cells = <1>; 423 #address-cells = <1>;
503 #size-cells = <0>; 424 #size-cells = <0>;
504 compatible = "renesas, 425 compatible = "renesas,i2c-r8a77990",
505 "renesas, 426 "renesas,rcar-gen3-i2c";
506 reg = <0 0xe6508000 0 427 reg = <0 0xe6508000 0 0x40>;
507 interrupts = <GIC_SPI 428 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 429 clocks = <&cpg CPG_MOD 930>;
509 power-domains = <&sysc 430 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
510 resets = <&cpg 930>; 431 resets = <&cpg 930>;
511 dmas = <&dmac1 0x93>, 432 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
512 <&dmac2 0x93>, 433 <&dmac2 0x93>, <&dmac2 0x92>;
513 dma-names = "tx", "rx" 434 dma-names = "tx", "rx", "tx", "rx";
514 i2c-scl-internal-delay 435 i2c-scl-internal-delay-ns = <6>;
515 status = "disabled"; 436 status = "disabled";
516 }; 437 };
517 438
518 i2c2: i2c@e6510000 { 439 i2c2: i2c@e6510000 {
519 #address-cells = <1>; 440 #address-cells = <1>;
520 #size-cells = <0>; 441 #size-cells = <0>;
521 compatible = "renesas, 442 compatible = "renesas,i2c-r8a77990",
522 "renesas, 443 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6510000 0 444 reg = <0 0xe6510000 0 0x40>;
524 interrupts = <GIC_SPI 445 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 446 clocks = <&cpg CPG_MOD 929>;
526 power-domains = <&sysc 447 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
527 resets = <&cpg 929>; 448 resets = <&cpg 929>;
528 dmas = <&dmac1 0x95>, 449 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
529 <&dmac2 0x95>, 450 <&dmac2 0x95>, <&dmac2 0x94>;
530 dma-names = "tx", "rx" 451 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 452 i2c-scl-internal-delay-ns = <6>;
532 status = "disabled"; 453 status = "disabled";
533 }; 454 };
534 455
535 i2c3: i2c@e66d0000 { 456 i2c3: i2c@e66d0000 {
536 #address-cells = <1>; 457 #address-cells = <1>;
537 #size-cells = <0>; 458 #size-cells = <0>;
538 compatible = "renesas, 459 compatible = "renesas,i2c-r8a77990",
539 "renesas, 460 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe66d0000 0 461 reg = <0 0xe66d0000 0 0x40>;
541 interrupts = <GIC_SPI 462 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 463 clocks = <&cpg CPG_MOD 928>;
543 power-domains = <&sysc 464 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
544 resets = <&cpg 928>; 465 resets = <&cpg 928>;
545 dmas = <&dmac0 0x97>, 466 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
546 dma-names = "tx", "rx" 467 dma-names = "tx", "rx";
547 i2c-scl-internal-delay 468 i2c-scl-internal-delay-ns = <110>;
548 status = "disabled"; 469 status = "disabled";
549 }; 470 };
550 471
551 i2c4: i2c@e66d8000 { 472 i2c4: i2c@e66d8000 {
552 #address-cells = <1>; 473 #address-cells = <1>;
553 #size-cells = <0>; 474 #size-cells = <0>;
554 compatible = "renesas, 475 compatible = "renesas,i2c-r8a77990",
555 "renesas, 476 "renesas,rcar-gen3-i2c";
556 reg = <0 0xe66d8000 0 477 reg = <0 0xe66d8000 0 0x40>;
557 interrupts = <GIC_SPI 478 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 479 clocks = <&cpg CPG_MOD 927>;
559 power-domains = <&sysc 480 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
560 resets = <&cpg 927>; 481 resets = <&cpg 927>;
561 dmas = <&dmac0 0x99>, 482 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
562 dma-names = "tx", "rx" 483 dma-names = "tx", "rx";
563 i2c-scl-internal-delay 484 i2c-scl-internal-delay-ns = <6>;
564 status = "disabled"; 485 status = "disabled";
565 }; 486 };
566 487
567 i2c5: i2c@e66e0000 { 488 i2c5: i2c@e66e0000 {
568 #address-cells = <1>; 489 #address-cells = <1>;
569 #size-cells = <0>; 490 #size-cells = <0>;
570 compatible = "renesas, 491 compatible = "renesas,i2c-r8a77990",
571 "renesas, 492 "renesas,rcar-gen3-i2c";
572 reg = <0 0xe66e0000 0 493 reg = <0 0xe66e0000 0 0x40>;
573 interrupts = <GIC_SPI 494 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&cpg CPG_MOD 495 clocks = <&cpg CPG_MOD 919>;
575 power-domains = <&sysc 496 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
576 resets = <&cpg 919>; 497 resets = <&cpg 919>;
577 dmas = <&dmac0 0x9b>, 498 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
578 dma-names = "tx", "rx" 499 dma-names = "tx", "rx";
579 i2c-scl-internal-delay 500 i2c-scl-internal-delay-ns = <6>;
580 status = "disabled"; 501 status = "disabled";
581 }; 502 };
582 503
583 i2c6: i2c@e66e8000 { 504 i2c6: i2c@e66e8000 {
584 #address-cells = <1>; 505 #address-cells = <1>;
585 #size-cells = <0>; 506 #size-cells = <0>;
586 compatible = "renesas, 507 compatible = "renesas,i2c-r8a77990",
587 "renesas, 508 "renesas,rcar-gen3-i2c";
588 reg = <0 0xe66e8000 0 509 reg = <0 0xe66e8000 0 0x40>;
589 interrupts = <GIC_SPI 510 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&cpg CPG_MOD 511 clocks = <&cpg CPG_MOD 918>;
591 power-domains = <&sysc 512 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
592 resets = <&cpg 918>; 513 resets = <&cpg 918>;
593 dmas = <&dmac0 0x9d>, 514 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
594 dma-names = "tx", "rx" 515 dma-names = "tx", "rx";
595 i2c-scl-internal-delay 516 i2c-scl-internal-delay-ns = <6>;
596 status = "disabled"; 517 status = "disabled";
597 }; 518 };
598 519
599 i2c7: i2c@e6690000 { 520 i2c7: i2c@e6690000 {
600 #address-cells = <1>; 521 #address-cells = <1>;
601 #size-cells = <0>; 522 #size-cells = <0>;
602 compatible = "renesas, 523 compatible = "renesas,i2c-r8a77990",
603 "renesas, 524 "renesas,rcar-gen3-i2c";
604 reg = <0 0xe6690000 0 525 reg = <0 0xe6690000 0 0x40>;
605 interrupts = <GIC_SPI 526 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&cpg CPG_MOD 527 clocks = <&cpg CPG_MOD 1003>;
607 power-domains = <&sysc 528 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
608 resets = <&cpg 1003>; 529 resets = <&cpg 1003>;
609 i2c-scl-internal-delay 530 i2c-scl-internal-delay-ns = <6>;
610 status = "disabled"; 531 status = "disabled";
611 }; 532 };
612 533
613 hscif0: serial@e6540000 { 534 hscif0: serial@e6540000 {
614 compatible = "renesas, 535 compatible = "renesas,hscif-r8a77990",
615 "renesas, 536 "renesas,rcar-gen3-hscif",
616 "renesas, 537 "renesas,hscif";
617 reg = <0 0xe6540000 0 538 reg = <0 0xe6540000 0 0x60>;
618 interrupts = <GIC_SPI 539 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&cpg CPG_MOD 540 clocks = <&cpg CPG_MOD 520>,
620 <&cpg CPG_COR 541 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
621 <&scif_clk>; 542 <&scif_clk>;
622 clock-names = "fck", " 543 clock-names = "fck", "brg_int", "scif_clk";
623 dmas = <&dmac1 0x31>, 544 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
624 <&dmac2 0x31>, 545 <&dmac2 0x31>, <&dmac2 0x30>;
625 dma-names = "tx", "rx" 546 dma-names = "tx", "rx", "tx", "rx";
626 power-domains = <&sysc 547 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
627 resets = <&cpg 520>; 548 resets = <&cpg 520>;
628 status = "disabled"; 549 status = "disabled";
629 }; 550 };
630 551
631 hscif1: serial@e6550000 { 552 hscif1: serial@e6550000 {
632 compatible = "renesas, 553 compatible = "renesas,hscif-r8a77990",
633 "renesas, 554 "renesas,rcar-gen3-hscif",
634 "renesas, 555 "renesas,hscif";
635 reg = <0 0xe6550000 0 556 reg = <0 0xe6550000 0 0x60>;
636 interrupts = <GIC_SPI 557 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&cpg CPG_MOD 558 clocks = <&cpg CPG_MOD 519>,
638 <&cpg CPG_COR 559 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
639 <&scif_clk>; 560 <&scif_clk>;
640 clock-names = "fck", " 561 clock-names = "fck", "brg_int", "scif_clk";
641 dmas = <&dmac1 0x33>, 562 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
642 <&dmac2 0x33>, 563 <&dmac2 0x33>, <&dmac2 0x32>;
643 dma-names = "tx", "rx" 564 dma-names = "tx", "rx", "tx", "rx";
644 power-domains = <&sysc 565 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
645 resets = <&cpg 519>; 566 resets = <&cpg 519>;
646 status = "disabled"; 567 status = "disabled";
647 }; 568 };
648 569
649 hscif2: serial@e6560000 { 570 hscif2: serial@e6560000 {
650 compatible = "renesas, 571 compatible = "renesas,hscif-r8a77990",
651 "renesas, 572 "renesas,rcar-gen3-hscif",
652 "renesas, 573 "renesas,hscif";
653 reg = <0 0xe6560000 0 574 reg = <0 0xe6560000 0 0x60>;
654 interrupts = <GIC_SPI 575 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 576 clocks = <&cpg CPG_MOD 518>,
656 <&cpg CPG_COR 577 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
657 <&scif_clk>; 578 <&scif_clk>;
658 clock-names = "fck", " 579 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x35>, 580 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
660 <&dmac2 0x35>, 581 <&dmac2 0x35>, <&dmac2 0x34>;
661 dma-names = "tx", "rx" 582 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 583 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
663 resets = <&cpg 518>; 584 resets = <&cpg 518>;
664 status = "disabled"; 585 status = "disabled";
665 }; 586 };
666 587
667 hscif3: serial@e66a0000 { 588 hscif3: serial@e66a0000 {
668 compatible = "renesas, 589 compatible = "renesas,hscif-r8a77990",
669 "renesas, 590 "renesas,rcar-gen3-hscif",
670 "renesas, 591 "renesas,hscif";
671 reg = <0 0xe66a0000 0 592 reg = <0 0xe66a0000 0 0x60>;
672 interrupts = <GIC_SPI 593 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 594 clocks = <&cpg CPG_MOD 517>,
674 <&cpg CPG_COR 595 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
675 <&scif_clk>; 596 <&scif_clk>;
676 clock-names = "fck", " 597 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac0 0x37>, 598 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
678 dma-names = "tx", "rx" 599 dma-names = "tx", "rx";
679 power-domains = <&sysc 600 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
680 resets = <&cpg 517>; 601 resets = <&cpg 517>;
681 status = "disabled"; 602 status = "disabled";
682 }; 603 };
683 604
684 hscif4: serial@e66b0000 { 605 hscif4: serial@e66b0000 {
685 compatible = "renesas, 606 compatible = "renesas,hscif-r8a77990",
686 "renesas, 607 "renesas,rcar-gen3-hscif",
687 "renesas, 608 "renesas,hscif";
688 reg = <0 0xe66b0000 0 609 reg = <0 0xe66b0000 0 0x60>;
689 interrupts = <GIC_SPI 610 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&cpg CPG_MOD 611 clocks = <&cpg CPG_MOD 516>,
691 <&cpg CPG_COR 612 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
692 <&scif_clk>; 613 <&scif_clk>;
693 clock-names = "fck", " 614 clock-names = "fck", "brg_int", "scif_clk";
694 dmas = <&dmac0 0x39>, 615 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
695 dma-names = "tx", "rx" 616 dma-names = "tx", "rx";
696 power-domains = <&sysc 617 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
697 resets = <&cpg 516>; 618 resets = <&cpg 516>;
698 status = "disabled"; 619 status = "disabled";
699 }; 620 };
700 621
701 hsusb: usb@e6590000 { 622 hsusb: usb@e6590000 {
702 compatible = "renesas, 623 compatible = "renesas,usbhs-r8a77990",
703 "renesas, 624 "renesas,rcar-gen3-usbhs";
704 reg = <0 0xe6590000 0 625 reg = <0 0xe6590000 0 0x200>;
705 interrupts = <GIC_SPI 626 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
706 clocks = <&cpg CPG_MOD 627 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
707 dmas = <&usb_dmac0 0>, 628 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
708 <&usb_dmac1 0>, 629 <&usb_dmac1 0>, <&usb_dmac1 1>;
709 dma-names = "ch0", "ch 630 dma-names = "ch0", "ch1", "ch2", "ch3";
710 renesas,buswait = <11> 631 renesas,buswait = <11>;
711 phys = <&usb2_phy0 3>; 632 phys = <&usb2_phy0 3>;
712 phy-names = "usb"; 633 phy-names = "usb";
713 power-domains = <&sysc 634 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
714 resets = <&cpg 704>, < 635 resets = <&cpg 704>, <&cpg 703>;
715 status = "disabled"; 636 status = "disabled";
716 }; 637 };
717 638
718 usb_dmac0: dma-controller@e65a 639 usb_dmac0: dma-controller@e65a0000 {
719 compatible = "renesas, 640 compatible = "renesas,r8a77990-usb-dmac",
720 "renesas, 641 "renesas,usb-dmac";
721 reg = <0 0xe65a0000 0 642 reg = <0 0xe65a0000 0 0x100>;
722 interrupts = <GIC_SPI !! 643 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
723 <GIC_SPI !! 644 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
724 interrupt-names = "ch0 645 interrupt-names = "ch0", "ch1";
725 clocks = <&cpg CPG_MOD 646 clocks = <&cpg CPG_MOD 330>;
726 power-domains = <&sysc 647 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
727 resets = <&cpg 330>; 648 resets = <&cpg 330>;
728 #dma-cells = <1>; 649 #dma-cells = <1>;
729 dma-channels = <2>; 650 dma-channels = <2>;
730 }; 651 };
731 652
732 usb_dmac1: dma-controller@e65b 653 usb_dmac1: dma-controller@e65b0000 {
733 compatible = "renesas, 654 compatible = "renesas,r8a77990-usb-dmac",
734 "renesas, 655 "renesas,usb-dmac";
735 reg = <0 0xe65b0000 0 656 reg = <0 0xe65b0000 0 0x100>;
736 interrupts = <GIC_SPI !! 657 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
737 <GIC_SPI !! 658 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
738 interrupt-names = "ch0 659 interrupt-names = "ch0", "ch1";
739 clocks = <&cpg CPG_MOD 660 clocks = <&cpg CPG_MOD 331>;
740 power-domains = <&sysc 661 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
741 resets = <&cpg 331>; 662 resets = <&cpg 331>;
742 #dma-cells = <1>; 663 #dma-cells = <1>;
743 dma-channels = <2>; 664 dma-channels = <2>;
744 }; 665 };
745 666
746 arm_cc630p: crypto@e6601000 { <<
747 compatible = "arm,cryp <<
748 interrupts = <GIC_SPI <<
749 reg = <0x0 0xe6601000 <<
750 clocks = <&cpg CPG_MOD <<
751 resets = <&cpg 229>; <<
752 power-domains = <&sysc <<
753 }; <<
754 <<
755 dmac0: dma-controller@e6700000 667 dmac0: dma-controller@e6700000 {
756 compatible = "renesas, 668 compatible = "renesas,dmac-r8a77990",
757 "renesas, 669 "renesas,rcar-dmac";
758 reg = <0 0xe6700000 0 670 reg = <0 0xe6700000 0 0x10000>;
759 interrupts = <GIC_SPI !! 671 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
760 <GIC_SPI !! 672 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
761 <GIC_SPI !! 673 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
762 <GIC_SPI !! 674 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
763 <GIC_SPI !! 675 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
764 <GIC_SPI !! 676 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
765 <GIC_SPI !! 677 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
766 <GIC_SPI !! 678 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
767 <GIC_SPI !! 679 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
768 <GIC_SPI !! 680 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
769 <GIC_SPI !! 681 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
770 <GIC_SPI !! 682 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
771 <GIC_SPI !! 683 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
772 <GIC_SPI !! 684 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
773 <GIC_SPI !! 685 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
774 <GIC_SPI !! 686 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
775 <GIC_SPI !! 687 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
776 interrupt-names = "err 688 interrupt-names = "error",
777 "ch0", 689 "ch0", "ch1", "ch2", "ch3",
778 "ch4", 690 "ch4", "ch5", "ch6", "ch7",
779 "ch8", 691 "ch8", "ch9", "ch10", "ch11",
780 "ch12" 692 "ch12", "ch13", "ch14", "ch15";
781 clocks = <&cpg CPG_MOD 693 clocks = <&cpg CPG_MOD 219>;
782 clock-names = "fck"; 694 clock-names = "fck";
783 power-domains = <&sysc 695 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
784 resets = <&cpg 219>; 696 resets = <&cpg 219>;
785 #dma-cells = <1>; 697 #dma-cells = <1>;
786 dma-channels = <16>; 698 dma-channels = <16>;
787 iommus = <&ipmmu_ds0 0 699 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
788 <&ipmmu_ds0 2>, 700 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
789 <&ipmmu_ds0 4>, 701 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
790 <&ipmmu_ds0 6>, 702 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
791 <&ipmmu_ds0 8>, 703 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
792 <&ipmmu_ds0 10> 704 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
793 <&ipmmu_ds0 12> 705 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
794 <&ipmmu_ds0 14> 706 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
795 }; 707 };
796 708
797 dmac1: dma-controller@e7300000 709 dmac1: dma-controller@e7300000 {
798 compatible = "renesas, 710 compatible = "renesas,dmac-r8a77990",
799 "renesas, 711 "renesas,rcar-dmac";
800 reg = <0 0xe7300000 0 712 reg = <0 0xe7300000 0 0x10000>;
801 interrupts = <GIC_SPI !! 713 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
802 <GIC_SPI !! 714 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
803 <GIC_SPI !! 715 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
804 <GIC_SPI !! 716 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
805 <GIC_SPI !! 717 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
806 <GIC_SPI !! 718 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
807 <GIC_SPI !! 719 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
808 <GIC_SPI !! 720 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
809 <GIC_SPI !! 721 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
810 <GIC_SPI !! 722 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
811 <GIC_SPI !! 723 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
812 <GIC_SPI !! 724 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
813 <GIC_SPI !! 725 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
814 <GIC_SPI !! 726 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
815 <GIC_SPI !! 727 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
816 <GIC_SPI !! 728 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
817 <GIC_SPI !! 729 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
818 interrupt-names = "err 730 interrupt-names = "error",
819 "ch0", 731 "ch0", "ch1", "ch2", "ch3",
820 "ch4", 732 "ch4", "ch5", "ch6", "ch7",
821 "ch8", 733 "ch8", "ch9", "ch10", "ch11",
822 "ch12" 734 "ch12", "ch13", "ch14", "ch15";
823 clocks = <&cpg CPG_MOD 735 clocks = <&cpg CPG_MOD 218>;
824 clock-names = "fck"; 736 clock-names = "fck";
825 power-domains = <&sysc 737 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
826 resets = <&cpg 218>; 738 resets = <&cpg 218>;
827 #dma-cells = <1>; 739 #dma-cells = <1>;
828 dma-channels = <16>; 740 dma-channels = <16>;
829 iommus = <&ipmmu_ds1 0 741 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
830 <&ipmmu_ds1 2>, 742 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
831 <&ipmmu_ds1 4>, 743 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
832 <&ipmmu_ds1 6>, 744 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
833 <&ipmmu_ds1 8>, 745 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
834 <&ipmmu_ds1 10> 746 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
835 <&ipmmu_ds1 12> 747 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
836 <&ipmmu_ds1 14> 748 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
837 }; 749 };
838 750
839 dmac2: dma-controller@e7310000 751 dmac2: dma-controller@e7310000 {
840 compatible = "renesas, 752 compatible = "renesas,dmac-r8a77990",
841 "renesas, 753 "renesas,rcar-dmac";
842 reg = <0 0xe7310000 0 754 reg = <0 0xe7310000 0 0x10000>;
843 interrupts = <GIC_SPI !! 755 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
844 <GIC_SPI !! 756 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
845 <GIC_SPI !! 757 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
846 <GIC_SPI !! 758 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
847 <GIC_SPI !! 759 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
848 <GIC_SPI !! 760 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
849 <GIC_SPI !! 761 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
850 <GIC_SPI !! 762 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
851 <GIC_SPI !! 763 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
852 <GIC_SPI !! 764 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
853 <GIC_SPI !! 765 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
854 <GIC_SPI !! 766 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
855 <GIC_SPI !! 767 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
856 <GIC_SPI !! 768 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
857 <GIC_SPI !! 769 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
858 <GIC_SPI !! 770 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
859 <GIC_SPI !! 771 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
860 interrupt-names = "err 772 interrupt-names = "error",
861 "ch0", 773 "ch0", "ch1", "ch2", "ch3",
862 "ch4", 774 "ch4", "ch5", "ch6", "ch7",
863 "ch8", 775 "ch8", "ch9", "ch10", "ch11",
864 "ch12" 776 "ch12", "ch13", "ch14", "ch15";
865 clocks = <&cpg CPG_MOD 777 clocks = <&cpg CPG_MOD 217>;
866 clock-names = "fck"; 778 clock-names = "fck";
867 power-domains = <&sysc 779 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
868 resets = <&cpg 217>; 780 resets = <&cpg 217>;
869 #dma-cells = <1>; 781 #dma-cells = <1>;
870 dma-channels = <16>; 782 dma-channels = <16>;
871 iommus = <&ipmmu_ds1 1 783 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
872 <&ipmmu_ds1 18> 784 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
873 <&ipmmu_ds1 20> 785 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
874 <&ipmmu_ds1 22> 786 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
875 <&ipmmu_ds1 24> 787 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
876 <&ipmmu_ds1 26> 788 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
877 <&ipmmu_ds1 28> 789 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
878 <&ipmmu_ds1 30> 790 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
879 }; 791 };
880 792
881 ipmmu_ds0: iommu@e6740000 { !! 793 ipmmu_ds0: mmu@e6740000 {
882 compatible = "renesas, 794 compatible = "renesas,ipmmu-r8a77990";
883 reg = <0 0xe6740000 0 795 reg = <0 0xe6740000 0 0x1000>;
884 renesas,ipmmu-main = < 796 renesas,ipmmu-main = <&ipmmu_mm 0>;
885 power-domains = <&sysc 797 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
886 #iommu-cells = <1>; 798 #iommu-cells = <1>;
887 }; 799 };
888 800
889 ipmmu_ds1: iommu@e7740000 { !! 801 ipmmu_ds1: mmu@e7740000 {
890 compatible = "renesas, 802 compatible = "renesas,ipmmu-r8a77990";
891 reg = <0 0xe7740000 0 803 reg = <0 0xe7740000 0 0x1000>;
892 renesas,ipmmu-main = < 804 renesas,ipmmu-main = <&ipmmu_mm 1>;
893 power-domains = <&sysc 805 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
894 #iommu-cells = <1>; 806 #iommu-cells = <1>;
895 }; 807 };
896 808
897 ipmmu_hc: iommu@e6570000 { !! 809 ipmmu_hc: mmu@e6570000 {
898 compatible = "renesas, 810 compatible = "renesas,ipmmu-r8a77990";
899 reg = <0 0xe6570000 0 811 reg = <0 0xe6570000 0 0x1000>;
900 renesas,ipmmu-main = < 812 renesas,ipmmu-main = <&ipmmu_mm 2>;
901 power-domains = <&sysc 813 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
902 #iommu-cells = <1>; 814 #iommu-cells = <1>;
903 }; 815 };
904 816
905 ipmmu_mm: iommu@e67b0000 { !! 817 ipmmu_mm: mmu@e67b0000 {
906 compatible = "renesas, 818 compatible = "renesas,ipmmu-r8a77990";
907 reg = <0 0xe67b0000 0 819 reg = <0 0xe67b0000 0 0x1000>;
908 interrupts = <GIC_SPI 820 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
909 <GIC_SPI 821 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
910 power-domains = <&sysc 822 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
911 #iommu-cells = <1>; 823 #iommu-cells = <1>;
912 }; 824 };
913 825
914 ipmmu_mp: iommu@ec670000 { !! 826 ipmmu_mp: mmu@ec670000 {
915 compatible = "renesas, 827 compatible = "renesas,ipmmu-r8a77990";
916 reg = <0 0xec670000 0 828 reg = <0 0xec670000 0 0x1000>;
917 renesas,ipmmu-main = < 829 renesas,ipmmu-main = <&ipmmu_mm 4>;
918 power-domains = <&sysc 830 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
919 #iommu-cells = <1>; 831 #iommu-cells = <1>;
920 }; 832 };
921 833
922 ipmmu_pv0: iommu@fd800000 { !! 834 ipmmu_pv0: mmu@fd800000 {
923 compatible = "renesas, 835 compatible = "renesas,ipmmu-r8a77990";
924 reg = <0 0xfd800000 0 836 reg = <0 0xfd800000 0 0x1000>;
925 renesas,ipmmu-main = < 837 renesas,ipmmu-main = <&ipmmu_mm 6>;
926 power-domains = <&sysc 838 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
927 #iommu-cells = <1>; 839 #iommu-cells = <1>;
928 }; 840 };
929 841
930 ipmmu_rt: iommu@ffc80000 { !! 842 ipmmu_rt: mmu@ffc80000 {
931 compatible = "renesas, 843 compatible = "renesas,ipmmu-r8a77990";
932 reg = <0 0xffc80000 0 844 reg = <0 0xffc80000 0 0x1000>;
933 renesas,ipmmu-main = < 845 renesas,ipmmu-main = <&ipmmu_mm 10>;
934 power-domains = <&sysc 846 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 847 #iommu-cells = <1>;
936 }; 848 };
937 849
938 ipmmu_vc0: iommu@fe6b0000 { !! 850 ipmmu_vc0: mmu@fe6b0000 {
939 compatible = "renesas, 851 compatible = "renesas,ipmmu-r8a77990";
940 reg = <0 0xfe6b0000 0 852 reg = <0 0xfe6b0000 0 0x1000>;
941 renesas,ipmmu-main = < 853 renesas,ipmmu-main = <&ipmmu_mm 12>;
942 power-domains = <&sysc 854 power-domains = <&sysc R8A77990_PD_A3VC>;
943 #iommu-cells = <1>; 855 #iommu-cells = <1>;
944 }; 856 };
945 857
946 ipmmu_vi0: iommu@febd0000 { !! 858 ipmmu_vi0: mmu@febd0000 {
947 compatible = "renesas, 859 compatible = "renesas,ipmmu-r8a77990";
948 reg = <0 0xfebd0000 0 860 reg = <0 0xfebd0000 0 0x1000>;
949 renesas,ipmmu-main = < 861 renesas,ipmmu-main = <&ipmmu_mm 14>;
950 power-domains = <&sysc 862 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 863 #iommu-cells = <1>;
952 }; 864 };
953 865
954 ipmmu_vp0: iommu@fe990000 { !! 866 ipmmu_vp0: mmu@fe990000 {
955 compatible = "renesas, 867 compatible = "renesas,ipmmu-r8a77990";
956 reg = <0 0xfe990000 0 868 reg = <0 0xfe990000 0 0x1000>;
957 renesas,ipmmu-main = < 869 renesas,ipmmu-main = <&ipmmu_mm 16>;
958 power-domains = <&sysc 870 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
959 #iommu-cells = <1>; 871 #iommu-cells = <1>;
960 }; 872 };
961 873
962 avb: ethernet@e6800000 { 874 avb: ethernet@e6800000 {
963 compatible = "renesas, 875 compatible = "renesas,etheravb-r8a77990",
964 "renesas, 876 "renesas,etheravb-rcar-gen3";
965 reg = <0 0xe6800000 0 877 reg = <0 0xe6800000 0 0x800>;
966 interrupts = <GIC_SPI 878 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 879 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 880 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 881 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 882 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 883 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 884 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
973 <GIC_SPI 885 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
974 <GIC_SPI 886 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 887 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 888 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
977 <GIC_SPI 889 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
978 <GIC_SPI 890 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
979 <GIC_SPI 891 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
980 <GIC_SPI 892 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
981 <GIC_SPI 893 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
982 <GIC_SPI 894 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
983 <GIC_SPI 895 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
984 <GIC_SPI 896 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
985 <GIC_SPI 897 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
986 <GIC_SPI 898 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
987 <GIC_SPI 899 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
988 <GIC_SPI 900 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
989 <GIC_SPI 901 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
990 <GIC_SPI 902 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
991 interrupt-names = "ch0 903 interrupt-names = "ch0", "ch1", "ch2", "ch3",
992 "ch4 904 "ch4", "ch5", "ch6", "ch7",
993 "ch8 905 "ch8", "ch9", "ch10", "ch11",
994 "ch1 906 "ch12", "ch13", "ch14", "ch15",
995 "ch1 907 "ch16", "ch17", "ch18", "ch19",
996 "ch2 908 "ch20", "ch21", "ch22", "ch23",
997 "ch2 909 "ch24";
998 clocks = <&cpg CPG_MOD 910 clocks = <&cpg CPG_MOD 812>;
999 clock-names = "fck"; <<
1000 power-domains = <&sys 911 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1001 resets = <&cpg 812>; 912 resets = <&cpg 812>;
1002 phy-mode = "rgmii"; 913 phy-mode = "rgmii";
1003 rx-internal-delay-ps <<
1004 iommus = <&ipmmu_ds0 914 iommus = <&ipmmu_ds0 16>;
1005 #address-cells = <1>; 915 #address-cells = <1>;
1006 #size-cells = <0>; 916 #size-cells = <0>;
1007 status = "disabled"; 917 status = "disabled";
1008 }; 918 };
1009 919
1010 can0: can@e6c30000 { 920 can0: can@e6c30000 {
1011 compatible = "renesas 921 compatible = "renesas,can-r8a77990",
1012 "renesas 922 "renesas,rcar-gen3-can";
1013 reg = <0 0xe6c30000 0 923 reg = <0 0xe6c30000 0 0x1000>;
1014 interrupts = <GIC_SPI 924 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1015 clocks = <&cpg CPG_MO 925 clocks = <&cpg CPG_MOD 916>,
1016 <&cpg CPG_CORE 926 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1017 <&can_clk>; 927 <&can_clk>;
1018 clock-names = "clkp1" 928 clock-names = "clkp1", "clkp2", "can_clk";
1019 assigned-clocks = <&c 929 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1020 assigned-clock-rates 930 assigned-clock-rates = <40000000>;
1021 power-domains = <&sys 931 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1022 resets = <&cpg 916>; 932 resets = <&cpg 916>;
1023 status = "disabled"; 933 status = "disabled";
1024 }; 934 };
1025 935
1026 can1: can@e6c38000 { 936 can1: can@e6c38000 {
1027 compatible = "renesas 937 compatible = "renesas,can-r8a77990",
1028 "renesas 938 "renesas,rcar-gen3-can";
1029 reg = <0 0xe6c38000 0 939 reg = <0 0xe6c38000 0 0x1000>;
1030 interrupts = <GIC_SPI 940 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&cpg CPG_MO 941 clocks = <&cpg CPG_MOD 915>,
1032 <&cpg CPG_CORE 942 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1033 <&can_clk>; 943 <&can_clk>;
1034 clock-names = "clkp1" 944 clock-names = "clkp1", "clkp2", "can_clk";
1035 assigned-clocks = <&c 945 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1036 assigned-clock-rates 946 assigned-clock-rates = <40000000>;
1037 power-domains = <&sys 947 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1038 resets = <&cpg 915>; 948 resets = <&cpg 915>;
1039 status = "disabled"; 949 status = "disabled";
1040 }; 950 };
1041 951
1042 canfd: can@e66c0000 { 952 canfd: can@e66c0000 {
1043 compatible = "renesas 953 compatible = "renesas,r8a77990-canfd",
1044 "renesas 954 "renesas,rcar-gen3-canfd";
1045 reg = <0 0xe66c0000 0 955 reg = <0 0xe66c0000 0 0x8000>;
1046 interrupts = <GIC_SPI 956 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1047 <GIC_SPI 3 957 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1048 interrupt-names = "ch <<
1049 clocks = <&cpg CPG_MO 958 clocks = <&cpg CPG_MOD 914>,
1050 <&cpg CPG_CORE 959 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1051 <&can_clk>; 960 <&can_clk>;
1052 clock-names = "fck", 961 clock-names = "fck", "canfd", "can_clk";
1053 assigned-clocks = <&c 962 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1054 assigned-clock-rates 963 assigned-clock-rates = <40000000>;
1055 power-domains = <&sys 964 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1056 resets = <&cpg 914>; 965 resets = <&cpg 914>;
1057 status = "disabled"; 966 status = "disabled";
1058 967
1059 channel0 { 968 channel0 {
1060 status = "dis 969 status = "disabled";
1061 }; 970 };
1062 971
1063 channel1 { 972 channel1 {
1064 status = "dis 973 status = "disabled";
1065 }; 974 };
1066 }; 975 };
1067 976
1068 pwm0: pwm@e6e30000 { 977 pwm0: pwm@e6e30000 {
1069 compatible = "renesas 978 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1070 reg = <0 0xe6e30000 0 979 reg = <0 0xe6e30000 0 0x8>;
1071 clocks = <&cpg CPG_MO 980 clocks = <&cpg CPG_MOD 523>;
1072 power-domains = <&sys 981 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1073 resets = <&cpg 523>; 982 resets = <&cpg 523>;
1074 #pwm-cells = <2>; 983 #pwm-cells = <2>;
1075 status = "disabled"; 984 status = "disabled";
1076 }; 985 };
1077 986
1078 pwm1: pwm@e6e31000 { 987 pwm1: pwm@e6e31000 {
1079 compatible = "renesas 988 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1080 reg = <0 0xe6e31000 0 989 reg = <0 0xe6e31000 0 0x8>;
1081 clocks = <&cpg CPG_MO 990 clocks = <&cpg CPG_MOD 523>;
1082 power-domains = <&sys 991 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1083 resets = <&cpg 523>; 992 resets = <&cpg 523>;
1084 #pwm-cells = <2>; 993 #pwm-cells = <2>;
1085 status = "disabled"; 994 status = "disabled";
1086 }; 995 };
1087 996
1088 pwm2: pwm@e6e32000 { 997 pwm2: pwm@e6e32000 {
1089 compatible = "renesas 998 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1090 reg = <0 0xe6e32000 0 999 reg = <0 0xe6e32000 0 0x8>;
1091 clocks = <&cpg CPG_MO 1000 clocks = <&cpg CPG_MOD 523>;
1092 power-domains = <&sys 1001 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1093 resets = <&cpg 523>; 1002 resets = <&cpg 523>;
1094 #pwm-cells = <2>; 1003 #pwm-cells = <2>;
1095 status = "disabled"; 1004 status = "disabled";
1096 }; 1005 };
1097 1006
1098 pwm3: pwm@e6e33000 { 1007 pwm3: pwm@e6e33000 {
1099 compatible = "renesas 1008 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1100 reg = <0 0xe6e33000 0 1009 reg = <0 0xe6e33000 0 0x8>;
1101 clocks = <&cpg CPG_MO 1010 clocks = <&cpg CPG_MOD 523>;
1102 power-domains = <&sys 1011 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1103 resets = <&cpg 523>; 1012 resets = <&cpg 523>;
1104 #pwm-cells = <2>; 1013 #pwm-cells = <2>;
1105 status = "disabled"; 1014 status = "disabled";
1106 }; 1015 };
1107 1016
1108 pwm4: pwm@e6e34000 { 1017 pwm4: pwm@e6e34000 {
1109 compatible = "renesas 1018 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1110 reg = <0 0xe6e34000 0 1019 reg = <0 0xe6e34000 0 0x8>;
1111 clocks = <&cpg CPG_MO 1020 clocks = <&cpg CPG_MOD 523>;
1112 power-domains = <&sys 1021 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1113 resets = <&cpg 523>; 1022 resets = <&cpg 523>;
1114 #pwm-cells = <2>; 1023 #pwm-cells = <2>;
1115 status = "disabled"; 1024 status = "disabled";
1116 }; 1025 };
1117 1026
1118 pwm5: pwm@e6e35000 { 1027 pwm5: pwm@e6e35000 {
1119 compatible = "renesas 1028 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1120 reg = <0 0xe6e35000 0 1029 reg = <0 0xe6e35000 0 0x8>;
1121 clocks = <&cpg CPG_MO 1030 clocks = <&cpg CPG_MOD 523>;
1122 power-domains = <&sys 1031 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1123 resets = <&cpg 523>; 1032 resets = <&cpg 523>;
1124 #pwm-cells = <2>; 1033 #pwm-cells = <2>;
1125 status = "disabled"; 1034 status = "disabled";
1126 }; 1035 };
1127 1036
1128 pwm6: pwm@e6e36000 { 1037 pwm6: pwm@e6e36000 {
1129 compatible = "renesas 1038 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1130 reg = <0 0xe6e36000 0 1039 reg = <0 0xe6e36000 0 0x8>;
1131 clocks = <&cpg CPG_MO 1040 clocks = <&cpg CPG_MOD 523>;
1132 power-domains = <&sys 1041 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1133 resets = <&cpg 523>; 1042 resets = <&cpg 523>;
1134 #pwm-cells = <2>; 1043 #pwm-cells = <2>;
1135 status = "disabled"; 1044 status = "disabled";
1136 }; 1045 };
1137 1046
1138 scif0: serial@e6e60000 { 1047 scif0: serial@e6e60000 {
1139 compatible = "renesas 1048 compatible = "renesas,scif-r8a77990",
1140 "renesas 1049 "renesas,rcar-gen3-scif", "renesas,scif";
1141 reg = <0 0xe6e60000 0 1050 reg = <0 0xe6e60000 0 64>;
1142 interrupts = <GIC_SPI 1051 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1143 clocks = <&cpg CPG_MO 1052 clocks = <&cpg CPG_MOD 207>,
1144 <&cpg CPG_CO 1053 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1145 <&scif_clk>; 1054 <&scif_clk>;
1146 clock-names = "fck", 1055 clock-names = "fck", "brg_int", "scif_clk";
1147 dmas = <&dmac1 0x51>, 1056 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1148 <&dmac2 0x51>, 1057 <&dmac2 0x51>, <&dmac2 0x50>;
1149 dma-names = "tx", "rx 1058 dma-names = "tx", "rx", "tx", "rx";
1150 power-domains = <&sys 1059 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1151 resets = <&cpg 207>; 1060 resets = <&cpg 207>;
1152 status = "disabled"; 1061 status = "disabled";
1153 }; 1062 };
1154 1063
1155 scif1: serial@e6e68000 { 1064 scif1: serial@e6e68000 {
1156 compatible = "renesas 1065 compatible = "renesas,scif-r8a77990",
1157 "renesas 1066 "renesas,rcar-gen3-scif", "renesas,scif";
1158 reg = <0 0xe6e68000 0 1067 reg = <0 0xe6e68000 0 64>;
1159 interrupts = <GIC_SPI 1068 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1160 clocks = <&cpg CPG_MO 1069 clocks = <&cpg CPG_MOD 206>,
1161 <&cpg CPG_CO 1070 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1162 <&scif_clk>; 1071 <&scif_clk>;
1163 clock-names = "fck", 1072 clock-names = "fck", "brg_int", "scif_clk";
1164 dmas = <&dmac1 0x53>, 1073 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1165 <&dmac2 0x53>, 1074 <&dmac2 0x53>, <&dmac2 0x52>;
1166 dma-names = "tx", "rx 1075 dma-names = "tx", "rx", "tx", "rx";
1167 power-domains = <&sys 1076 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1168 resets = <&cpg 206>; 1077 resets = <&cpg 206>;
1169 status = "disabled"; 1078 status = "disabled";
1170 }; 1079 };
1171 1080
1172 scif2: serial@e6e88000 { 1081 scif2: serial@e6e88000 {
1173 compatible = "renesas 1082 compatible = "renesas,scif-r8a77990",
1174 "renesas 1083 "renesas,rcar-gen3-scif", "renesas,scif";
1175 reg = <0 0xe6e88000 0 1084 reg = <0 0xe6e88000 0 64>;
1176 interrupts = <GIC_SPI 1085 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1177 clocks = <&cpg CPG_MO 1086 clocks = <&cpg CPG_MOD 310>,
1178 <&cpg CPG_CO 1087 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1179 <&scif_clk>; 1088 <&scif_clk>;
1180 clock-names = "fck", 1089 clock-names = "fck", "brg_int", "scif_clk";
1181 dmas = <&dmac1 0x13>, 1090 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1182 <&dmac2 0x13>, 1091 <&dmac2 0x13>, <&dmac2 0x12>;
1183 dma-names = "tx", "rx 1092 dma-names = "tx", "rx", "tx", "rx";
1184 power-domains = <&sys 1093 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1185 resets = <&cpg 310>; 1094 resets = <&cpg 310>;
1186 status = "disabled"; 1095 status = "disabled";
1187 }; 1096 };
1188 1097
1189 scif3: serial@e6c50000 { 1098 scif3: serial@e6c50000 {
1190 compatible = "renesas 1099 compatible = "renesas,scif-r8a77990",
1191 "renesas 1100 "renesas,rcar-gen3-scif", "renesas,scif";
1192 reg = <0 0xe6c50000 0 1101 reg = <0 0xe6c50000 0 64>;
1193 interrupts = <GIC_SPI 1102 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1194 clocks = <&cpg CPG_MO 1103 clocks = <&cpg CPG_MOD 204>,
1195 <&cpg CPG_CO 1104 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1196 <&scif_clk>; 1105 <&scif_clk>;
1197 clock-names = "fck", 1106 clock-names = "fck", "brg_int", "scif_clk";
1198 dmas = <&dmac0 0x57>, 1107 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1199 dma-names = "tx", "rx 1108 dma-names = "tx", "rx";
1200 power-domains = <&sys 1109 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1201 resets = <&cpg 204>; 1110 resets = <&cpg 204>;
1202 status = "disabled"; 1111 status = "disabled";
1203 }; 1112 };
1204 1113
1205 scif4: serial@e6c40000 { 1114 scif4: serial@e6c40000 {
1206 compatible = "renesas 1115 compatible = "renesas,scif-r8a77990",
1207 "renesas 1116 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6c40000 0 1117 reg = <0 0xe6c40000 0 64>;
1209 interrupts = <GIC_SPI 1118 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1119 clocks = <&cpg CPG_MOD 203>,
1211 <&cpg CPG_CO 1120 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1212 <&scif_clk>; 1121 <&scif_clk>;
1213 clock-names = "fck", 1122 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac0 0x59>, 1123 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1215 dma-names = "tx", "rx 1124 dma-names = "tx", "rx";
1216 power-domains = <&sys 1125 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1217 resets = <&cpg 203>; 1126 resets = <&cpg 203>;
1218 status = "disabled"; 1127 status = "disabled";
1219 }; 1128 };
1220 1129
1221 scif5: serial@e6f30000 { 1130 scif5: serial@e6f30000 {
1222 compatible = "renesas 1131 compatible = "renesas,scif-r8a77990",
1223 "renesas 1132 "renesas,rcar-gen3-scif", "renesas,scif";
1224 reg = <0 0xe6f30000 0 1133 reg = <0 0xe6f30000 0 64>;
1225 interrupts = <GIC_SPI 1134 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1226 clocks = <&cpg CPG_MO 1135 clocks = <&cpg CPG_MOD 202>,
1227 <&cpg CPG_CO 1136 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1228 <&scif_clk>; 1137 <&scif_clk>;
1229 clock-names = "fck", 1138 clock-names = "fck", "brg_int", "scif_clk";
1230 dmas = <&dmac0 0x5b>, 1139 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1231 dma-names = "tx", "rx 1140 dma-names = "tx", "rx";
1232 power-domains = <&sys 1141 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1233 resets = <&cpg 202>; 1142 resets = <&cpg 202>;
1234 status = "disabled"; 1143 status = "disabled";
1235 }; 1144 };
1236 1145
1237 msiof0: spi@e6e90000 { 1146 msiof0: spi@e6e90000 {
1238 compatible = "renesas 1147 compatible = "renesas,msiof-r8a77990",
1239 "renesas 1148 "renesas,rcar-gen3-msiof";
1240 reg = <0 0xe6e90000 0 1149 reg = <0 0xe6e90000 0 0x0064>;
1241 interrupts = <GIC_SPI 1150 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1242 clocks = <&cpg CPG_MO 1151 clocks = <&cpg CPG_MOD 211>;
1243 dmas = <&dmac1 0x41>, 1152 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1244 <&dmac2 0x41>, 1153 <&dmac2 0x41>, <&dmac2 0x40>;
1245 dma-names = "tx", "rx 1154 dma-names = "tx", "rx", "tx", "rx";
1246 power-domains = <&sys 1155 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1247 resets = <&cpg 211>; 1156 resets = <&cpg 211>;
1248 #address-cells = <1>; 1157 #address-cells = <1>;
1249 #size-cells = <0>; 1158 #size-cells = <0>;
1250 status = "disabled"; 1159 status = "disabled";
1251 }; 1160 };
1252 1161
1253 msiof1: spi@e6ea0000 { 1162 msiof1: spi@e6ea0000 {
1254 compatible = "renesas 1163 compatible = "renesas,msiof-r8a77990",
1255 "renesas 1164 "renesas,rcar-gen3-msiof";
1256 reg = <0 0xe6ea0000 0 1165 reg = <0 0xe6ea0000 0 0x0064>;
1257 interrupts = <GIC_SPI 1166 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1258 clocks = <&cpg CPG_MO 1167 clocks = <&cpg CPG_MOD 210>;
1259 dmas = <&dmac0 0x43>, 1168 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1260 dma-names = "tx", "rx 1169 dma-names = "tx", "rx";
1261 power-domains = <&sys 1170 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1262 resets = <&cpg 210>; 1171 resets = <&cpg 210>;
1263 #address-cells = <1>; 1172 #address-cells = <1>;
1264 #size-cells = <0>; 1173 #size-cells = <0>;
1265 status = "disabled"; 1174 status = "disabled";
1266 }; 1175 };
1267 1176
1268 msiof2: spi@e6c00000 { 1177 msiof2: spi@e6c00000 {
1269 compatible = "renesas 1178 compatible = "renesas,msiof-r8a77990",
1270 "renesas 1179 "renesas,rcar-gen3-msiof";
1271 reg = <0 0xe6c00000 0 1180 reg = <0 0xe6c00000 0 0x0064>;
1272 interrupts = <GIC_SPI 1181 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1273 clocks = <&cpg CPG_MO 1182 clocks = <&cpg CPG_MOD 209>;
1274 dmas = <&dmac0 0x45>, 1183 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1275 dma-names = "tx", "rx 1184 dma-names = "tx", "rx";
1276 power-domains = <&sys 1185 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1277 resets = <&cpg 209>; 1186 resets = <&cpg 209>;
1278 #address-cells = <1>; 1187 #address-cells = <1>;
1279 #size-cells = <0>; 1188 #size-cells = <0>;
1280 status = "disabled"; 1189 status = "disabled";
1281 }; 1190 };
1282 1191
1283 msiof3: spi@e6c10000 { 1192 msiof3: spi@e6c10000 {
1284 compatible = "renesas 1193 compatible = "renesas,msiof-r8a77990",
1285 "renesas 1194 "renesas,rcar-gen3-msiof";
1286 reg = <0 0xe6c10000 0 1195 reg = <0 0xe6c10000 0 0x0064>;
1287 interrupts = <GIC_SPI 1196 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1288 clocks = <&cpg CPG_MO 1197 clocks = <&cpg CPG_MOD 208>;
1289 dmas = <&dmac0 0x47>, 1198 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1290 dma-names = "tx", "rx 1199 dma-names = "tx", "rx";
1291 power-domains = <&sys 1200 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1292 resets = <&cpg 208>; 1201 resets = <&cpg 208>;
1293 #address-cells = <1>; 1202 #address-cells = <1>;
1294 #size-cells = <0>; 1203 #size-cells = <0>;
1295 status = "disabled"; 1204 status = "disabled";
1296 }; 1205 };
1297 1206
1298 vin4: video@e6ef4000 { 1207 vin4: video@e6ef4000 {
1299 compatible = "renesas 1208 compatible = "renesas,vin-r8a77990";
1300 reg = <0 0xe6ef4000 0 1209 reg = <0 0xe6ef4000 0 0x1000>;
1301 interrupts = <GIC_SPI 1210 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1302 clocks = <&cpg CPG_MO 1211 clocks = <&cpg CPG_MOD 807>;
1303 power-domains = <&sys 1212 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1304 resets = <&cpg 807>; 1213 resets = <&cpg 807>;
1305 renesas,id = <4>; 1214 renesas,id = <4>;
1306 status = "disabled"; 1215 status = "disabled";
1307 1216
1308 ports { 1217 ports {
1309 #address-cell 1218 #address-cells = <1>;
1310 #size-cells = 1219 #size-cells = <0>;
1311 1220
1312 port@1 { 1221 port@1 {
1313 #addr 1222 #address-cells = <1>;
1314 #size 1223 #size-cells = <0>;
1315 1224
1316 reg = 1225 reg = <1>;
1317 1226
1318 vin4c 1227 vin4csi40: endpoint@2 {
1319 1228 reg = <2>;
1320 !! 1229 remote-endpoint= <&csi40vin4>;
1321 }; 1230 };
1322 }; 1231 };
1323 }; 1232 };
1324 }; 1233 };
1325 1234
1326 vin5: video@e6ef5000 { 1235 vin5: video@e6ef5000 {
1327 compatible = "renesas 1236 compatible = "renesas,vin-r8a77990";
1328 reg = <0 0xe6ef5000 0 1237 reg = <0 0xe6ef5000 0 0x1000>;
1329 interrupts = <GIC_SPI 1238 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1330 clocks = <&cpg CPG_MO 1239 clocks = <&cpg CPG_MOD 806>;
1331 power-domains = <&sys 1240 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1332 resets = <&cpg 806>; 1241 resets = <&cpg 806>;
1333 renesas,id = <5>; 1242 renesas,id = <5>;
1334 status = "disabled"; 1243 status = "disabled";
1335 1244
1336 ports { 1245 ports {
1337 #address-cell 1246 #address-cells = <1>;
1338 #size-cells = 1247 #size-cells = <0>;
1339 1248
1340 port@1 { 1249 port@1 {
1341 #addr 1250 #address-cells = <1>;
1342 #size 1251 #size-cells = <0>;
1343 1252
1344 reg = 1253 reg = <1>;
1345 1254
1346 vin5c 1255 vin5csi40: endpoint@2 {
1347 1256 reg = <2>;
1348 !! 1257 remote-endpoint= <&csi40vin5>;
1349 }; 1258 };
1350 }; 1259 };
1351 }; 1260 };
1352 }; 1261 };
1353 1262
1354 drif00: rif@e6f40000 { <<
1355 compatible = "renesas <<
1356 "renesas <<
1357 reg = <0 0xe6f40000 0 <<
1358 interrupts = <GIC_SPI <<
1359 clocks = <&cpg CPG_MO <<
1360 clock-names = "fck"; <<
1361 dmas = <&dmac1 0x20>, <<
1362 dma-names = "rx", "rx <<
1363 power-domains = <&sys <<
1364 resets = <&cpg 515>; <<
1365 renesas,bonding = <&d <<
1366 status = "disabled"; <<
1367 }; <<
1368 <<
1369 drif01: rif@e6f50000 { <<
1370 compatible = "renesas <<
1371 "renesas <<
1372 reg = <0 0xe6f50000 0 <<
1373 interrupts = <GIC_SPI <<
1374 clocks = <&cpg CPG_MO <<
1375 clock-names = "fck"; <<
1376 dmas = <&dmac1 0x22>, <<
1377 dma-names = "rx", "rx <<
1378 power-domains = <&sys <<
1379 resets = <&cpg 514>; <<
1380 renesas,bonding = <&d <<
1381 status = "disabled"; <<
1382 }; <<
1383 <<
1384 drif10: rif@e6f60000 { <<
1385 compatible = "renesas <<
1386 "renesas <<
1387 reg = <0 0xe6f60000 0 <<
1388 interrupts = <GIC_SPI <<
1389 clocks = <&cpg CPG_MO <<
1390 clock-names = "fck"; <<
1391 dmas = <&dmac1 0x24>, <<
1392 dma-names = "rx", "rx <<
1393 power-domains = <&sys <<
1394 resets = <&cpg 513>; <<
1395 renesas,bonding = <&d <<
1396 status = "disabled"; <<
1397 }; <<
1398 <<
1399 drif11: rif@e6f70000 { <<
1400 compatible = "renesas <<
1401 "renesas <<
1402 reg = <0 0xe6f70000 0 <<
1403 interrupts = <GIC_SPI <<
1404 clocks = <&cpg CPG_MO <<
1405 clock-names = "fck"; <<
1406 dmas = <&dmac1 0x26>, <<
1407 dma-names = "rx", "rx <<
1408 power-domains = <&sys <<
1409 resets = <&cpg 512>; <<
1410 renesas,bonding = <&d <<
1411 status = "disabled"; <<
1412 }; <<
1413 <<
1414 drif20: rif@e6f80000 { <<
1415 compatible = "renesas <<
1416 "renesas <<
1417 reg = <0 0xe6f80000 0 <<
1418 interrupts = <GIC_SPI <<
1419 clocks = <&cpg CPG_MO <<
1420 clock-names = "fck"; <<
1421 dmas = <&dmac0 0x28>; <<
1422 dma-names = "rx"; <<
1423 power-domains = <&sys <<
1424 resets = <&cpg 511>; <<
1425 renesas,bonding = <&d <<
1426 status = "disabled"; <<
1427 }; <<
1428 <<
1429 drif21: rif@e6f90000 { <<
1430 compatible = "renesas <<
1431 "renesas <<
1432 reg = <0 0xe6f90000 0 <<
1433 interrupts = <GIC_SPI <<
1434 clocks = <&cpg CPG_MO <<
1435 clock-names = "fck"; <<
1436 dmas = <&dmac0 0x2a>; <<
1437 dma-names = "rx"; <<
1438 power-domains = <&sys <<
1439 resets = <&cpg 510>; <<
1440 renesas,bonding = <&d <<
1441 status = "disabled"; <<
1442 }; <<
1443 <<
1444 drif30: rif@e6fa0000 { <<
1445 compatible = "renesas <<
1446 "renesas <<
1447 reg = <0 0xe6fa0000 0 <<
1448 interrupts = <GIC_SPI <<
1449 clocks = <&cpg CPG_MO <<
1450 clock-names = "fck"; <<
1451 dmas = <&dmac0 0x2c>; <<
1452 dma-names = "rx"; <<
1453 power-domains = <&sys <<
1454 resets = <&cpg 509>; <<
1455 renesas,bonding = <&d <<
1456 status = "disabled"; <<
1457 }; <<
1458 <<
1459 drif31: rif@e6fb0000 { <<
1460 compatible = "renesas <<
1461 "renesas <<
1462 reg = <0 0xe6fb0000 0 <<
1463 interrupts = <GIC_SPI <<
1464 clocks = <&cpg CPG_MO <<
1465 clock-names = "fck"; <<
1466 dmas = <&dmac0 0x2e>; <<
1467 dma-names = "rx"; <<
1468 power-domains = <&sys <<
1469 resets = <&cpg 508>; <<
1470 renesas,bonding = <&d <<
1471 status = "disabled"; <<
1472 }; <<
1473 <<
1474 rcar_sound: sound@ec500000 { 1263 rcar_sound: sound@ec500000 {
1475 /* 1264 /*
1476 * #sound-dai-cells i !! 1265 * #sound-dai-cells is required
1477 * 1266 *
1478 * Single DAI : #soun 1267 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1479 * Multi DAI : #soun 1268 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1480 */ 1269 */
1481 /* 1270 /*
1482 * #clock-cells is re 1271 * #clock-cells is required for audio_clkout0/1/2/3
1483 * 1272 *
1484 * clkout : #cl 1273 * clkout : #clock-cells = <0>; <&rcar_sound>;
1485 * clkout0/1/2/3: #cl 1274 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1486 */ 1275 */
1487 compatible = "renesas !! 1276 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1488 reg = <0 0xec500000 0 !! 1277 reg = <0 0xec500000 0 0x1000>, /* SCU */
1489 <0 0xec5a0000 0 !! 1278 <0 0xec5a0000 0 0x100>, /* ADG */
1490 <0 0xec540000 0 !! 1279 <0 0xec540000 0 0x1000>, /* SSIU */
1491 <0 0xec541000 0 !! 1280 <0 0xec541000 0 0x280>, /* SSI */
1492 <0 0xec760000 0 !! 1281 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1493 reg-names = "scu", "a 1282 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1494 1283
1495 clocks = <&cpg CPG_MO 1284 clocks = <&cpg CPG_MOD 1005>,
1496 <&cpg CPG_MO 1285 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1497 <&cpg CPG_MO 1286 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1498 <&cpg CPG_MO 1287 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1499 <&cpg CPG_MO 1288 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1500 <&cpg CPG_MO 1289 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1501 <&cpg CPG_MO 1290 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1502 <&cpg CPG_MO 1291 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1503 <&cpg CPG_MO 1292 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1504 <&cpg CPG_MO 1293 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1505 <&cpg CPG_MO 1294 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1506 <&cpg CPG_MO 1295 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1507 <&cpg CPG_MO 1296 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1508 <&cpg CPG_MO 1297 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1509 <&audio_clk_ 1298 <&audio_clk_a>, <&audio_clk_b>,
1510 <&audio_clk_ 1299 <&audio_clk_c>,
1511 <&cpg CPG_MO !! 1300 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1512 clock-names = "ssi-al 1301 clock-names = "ssi-all",
1513 "ssi.9" 1302 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1514 "ssi.5" 1303 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1515 "ssi.1" 1304 "ssi.1", "ssi.0",
1516 "src.9" 1305 "src.9", "src.8", "src.7", "src.6",
1517 "src.5" 1306 "src.5", "src.4", "src.3", "src.2",
1518 "src.1" 1307 "src.1", "src.0",
1519 "mix.1" 1308 "mix.1", "mix.0",
1520 "ctu.1" 1309 "ctu.1", "ctu.0",
1521 "dvc.0" 1310 "dvc.0", "dvc.1",
1522 "clk_a" 1311 "clk_a", "clk_b", "clk_c", "clk_i";
1523 power-domains = <&sys 1312 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1524 resets = <&cpg 1005>, 1313 resets = <&cpg 1005>,
1525 <&cpg 1006>, 1314 <&cpg 1006>, <&cpg 1007>,
1526 <&cpg 1008>, 1315 <&cpg 1008>, <&cpg 1009>,
1527 <&cpg 1010>, 1316 <&cpg 1010>, <&cpg 1011>,
1528 <&cpg 1012>, 1317 <&cpg 1012>, <&cpg 1013>,
1529 <&cpg 1014>, 1318 <&cpg 1014>, <&cpg 1015>;
1530 reset-names = "ssi-al 1319 reset-names = "ssi-all",
1531 "ssi.9" 1320 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1532 "ssi.5" 1321 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1533 "ssi.1" 1322 "ssi.1", "ssi.0";
1534 status = "disabled"; 1323 status = "disabled";
1535 1324
1536 rcar_sound,ctu { 1325 rcar_sound,ctu {
1537 ctu00: ctu-0 1326 ctu00: ctu-0 { };
1538 ctu01: ctu-1 1327 ctu01: ctu-1 { };
1539 ctu02: ctu-2 1328 ctu02: ctu-2 { };
1540 ctu03: ctu-3 1329 ctu03: ctu-3 { };
1541 ctu10: ctu-4 1330 ctu10: ctu-4 { };
1542 ctu11: ctu-5 1331 ctu11: ctu-5 { };
1543 ctu12: ctu-6 1332 ctu12: ctu-6 { };
1544 ctu13: ctu-7 1333 ctu13: ctu-7 { };
1545 }; 1334 };
1546 1335
1547 rcar_sound,dvc { 1336 rcar_sound,dvc {
1548 dvc0: dvc-0 { 1337 dvc0: dvc-0 {
1549 dmas 1338 dmas = <&audma0 0xbc>;
1550 dma-n 1339 dma-names = "tx";
1551 }; 1340 };
1552 dvc1: dvc-1 { 1341 dvc1: dvc-1 {
1553 dmas 1342 dmas = <&audma0 0xbe>;
1554 dma-n 1343 dma-names = "tx";
1555 }; 1344 };
1556 }; 1345 };
1557 1346
1558 rcar_sound,mix { 1347 rcar_sound,mix {
1559 mix0: mix-0 { 1348 mix0: mix-0 { };
1560 mix1: mix-1 { 1349 mix1: mix-1 { };
1561 }; 1350 };
1562 1351
1563 rcar_sound,src { 1352 rcar_sound,src {
1564 src0: src-0 { 1353 src0: src-0 {
1565 inter 1354 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1566 dmas 1355 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1567 dma-n 1356 dma-names = "rx", "tx";
1568 }; 1357 };
1569 src1: src-1 { 1358 src1: src-1 {
1570 inter 1359 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1571 dmas 1360 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1572 dma-n 1361 dma-names = "rx", "tx";
1573 }; 1362 };
1574 src2: src-2 { 1363 src2: src-2 {
1575 inter 1364 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1576 dmas 1365 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1577 dma-n 1366 dma-names = "rx", "tx";
1578 }; 1367 };
1579 src3: src-3 { 1368 src3: src-3 {
1580 inter 1369 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1581 dmas 1370 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1582 dma-n 1371 dma-names = "rx", "tx";
1583 }; 1372 };
1584 src4: src-4 { 1373 src4: src-4 {
1585 inter 1374 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas 1375 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1587 dma-n 1376 dma-names = "rx", "tx";
1588 }; 1377 };
1589 src5: src-5 { 1378 src5: src-5 {
1590 inter 1379 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1591 dmas 1380 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1592 dma-n 1381 dma-names = "rx", "tx";
1593 }; 1382 };
1594 src6: src-6 { 1383 src6: src-6 {
1595 inter 1384 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1596 dmas 1385 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1597 dma-n 1386 dma-names = "rx", "tx";
1598 }; 1387 };
1599 src7: src-7 { 1388 src7: src-7 {
1600 inter 1389 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1601 dmas 1390 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1602 dma-n 1391 dma-names = "rx", "tx";
1603 }; 1392 };
1604 src8: src-8 { 1393 src8: src-8 {
1605 inter 1394 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1606 dmas 1395 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1607 dma-n 1396 dma-names = "rx", "tx";
1608 }; 1397 };
1609 src9: src-9 { 1398 src9: src-9 {
1610 inter 1399 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1611 dmas 1400 dmas = <&audma0 0x97>, <&audma0 0xba>;
1612 dma-n 1401 dma-names = "rx", "tx";
1613 }; 1402 };
1614 }; 1403 };
1615 1404
1616 rcar_sound,ssi { 1405 rcar_sound,ssi {
1617 ssi0: ssi-0 { 1406 ssi0: ssi-0 {
1618 inter 1407 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1619 dmas 1408 dmas = <&audma0 0x01>, <&audma0 0x02>,
1620 1409 <&audma0 0x15>, <&audma0 0x16>;
1621 dma-n 1410 dma-names = "rx", "tx", "rxu", "txu";
1622 }; 1411 };
1623 ssi1: ssi-1 { 1412 ssi1: ssi-1 {
1624 inter 1413 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1625 dmas 1414 dmas = <&audma0 0x03>, <&audma0 0x04>,
1626 1415 <&audma0 0x49>, <&audma0 0x4a>;
1627 dma-n 1416 dma-names = "rx", "tx", "rxu", "txu";
1628 }; 1417 };
1629 ssi2: ssi-2 { 1418 ssi2: ssi-2 {
1630 inter 1419 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1631 dmas 1420 dmas = <&audma0 0x05>, <&audma0 0x06>,
1632 1421 <&audma0 0x63>, <&audma0 0x64>;
1633 dma-n 1422 dma-names = "rx", "tx", "rxu", "txu";
1634 }; 1423 };
1635 ssi3: ssi-3 { 1424 ssi3: ssi-3 {
1636 inter 1425 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1637 dmas 1426 dmas = <&audma0 0x07>, <&audma0 0x08>,
1638 1427 <&audma0 0x6f>, <&audma0 0x70>;
1639 dma-n 1428 dma-names = "rx", "tx", "rxu", "txu";
1640 }; 1429 };
1641 ssi4: ssi-4 { 1430 ssi4: ssi-4 {
1642 inter 1431 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1643 dmas 1432 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1644 1433 <&audma0 0x71>, <&audma0 0x72>;
1645 dma-n 1434 dma-names = "rx", "tx", "rxu", "txu";
1646 }; 1435 };
1647 ssi5: ssi-5 { 1436 ssi5: ssi-5 {
1648 inter 1437 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1649 dmas 1438 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1650 1439 <&audma0 0x73>, <&audma0 0x74>;
1651 dma-n 1440 dma-names = "rx", "tx", "rxu", "txu";
1652 }; 1441 };
1653 ssi6: ssi-6 { 1442 ssi6: ssi-6 {
1654 inter 1443 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1655 dmas 1444 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1656 1445 <&audma0 0x75>, <&audma0 0x76>;
1657 dma-n 1446 dma-names = "rx", "tx", "rxu", "txu";
1658 }; 1447 };
1659 ssi7: ssi-7 { 1448 ssi7: ssi-7 {
1660 inter 1449 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1661 dmas 1450 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1662 1451 <&audma0 0x79>, <&audma0 0x7a>;
1663 dma-n 1452 dma-names = "rx", "tx", "rxu", "txu";
1664 }; 1453 };
1665 ssi8: ssi-8 { 1454 ssi8: ssi-8 {
1666 inter 1455 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1667 dmas 1456 dmas = <&audma0 0x11>, <&audma0 0x12>,
1668 1457 <&audma0 0x7b>, <&audma0 0x7c>;
1669 dma-n 1458 dma-names = "rx", "tx", "rxu", "txu";
1670 }; 1459 };
1671 ssi9: ssi-9 { 1460 ssi9: ssi-9 {
1672 inter 1461 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1673 dmas 1462 dmas = <&audma0 0x13>, <&audma0 0x14>,
1674 1463 <&audma0 0x7d>, <&audma0 0x7e>;
1675 dma-n 1464 dma-names = "rx", "tx", "rxu", "txu";
1676 }; 1465 };
1677 }; 1466 };
1678 }; 1467 };
1679 1468
1680 mlp: mlp@ec520000 { <<
1681 compatible = "renesas <<
1682 "renesas <<
1683 reg = <0 0xec520000 0 <<
1684 interrupts = <GIC_SPI <<
1685 <GIC_SPI 385 <<
1686 clocks = <&cpg CPG_MO <<
1687 power-domains = <&sys <<
1688 resets = <&cpg 802>; <<
1689 status = "disabled"; <<
1690 }; <<
1691 <<
1692 audma0: dma-controller@ec7000 1469 audma0: dma-controller@ec700000 {
1693 compatible = "renesas 1470 compatible = "renesas,dmac-r8a77990",
1694 "renesas 1471 "renesas,rcar-dmac";
1695 reg = <0 0xec700000 0 1472 reg = <0 0xec700000 0 0x10000>;
1696 interrupts = <GIC_SPI !! 1473 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1697 <GIC_SPI !! 1474 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1698 <GIC_SPI !! 1475 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1699 <GIC_SPI !! 1476 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1700 <GIC_SPI !! 1477 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1701 <GIC_SPI !! 1478 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1702 <GIC_SPI !! 1479 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1703 <GIC_SPI !! 1480 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1704 <GIC_SPI !! 1481 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1705 <GIC_SPI !! 1482 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1706 <GIC_SPI !! 1483 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1707 <GIC_SPI !! 1484 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1708 <GIC_SPI !! 1485 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1709 <GIC_SPI !! 1486 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1710 <GIC_SPI !! 1487 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1711 <GIC_SPI !! 1488 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1712 <GIC_SPI !! 1489 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1713 interrupt-names = "er 1490 interrupt-names = "error",
1714 "ch0" 1491 "ch0", "ch1", "ch2", "ch3",
1715 "ch4" 1492 "ch4", "ch5", "ch6", "ch7",
1716 "ch8" 1493 "ch8", "ch9", "ch10", "ch11",
1717 "ch12 1494 "ch12", "ch13", "ch14", "ch15";
1718 clocks = <&cpg CPG_MO 1495 clocks = <&cpg CPG_MOD 502>;
1719 clock-names = "fck"; 1496 clock-names = "fck";
1720 power-domains = <&sys 1497 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1721 resets = <&cpg 502>; 1498 resets = <&cpg 502>;
1722 #dma-cells = <1>; 1499 #dma-cells = <1>;
1723 dma-channels = <16>; 1500 dma-channels = <16>;
1724 iommus = <&ipmmu_mp 0 1501 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1725 <&ipmmu_mp 2 1502 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1726 <&ipmmu_mp 4 1503 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1727 <&ipmmu_mp 6 1504 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1728 <&ipmmu_mp 8 1505 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1729 <&ipmmu_mp 1 1506 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1730 <&ipmmu_mp 1 1507 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1731 <&ipmmu_mp 1 1508 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1732 }; 1509 };
1733 1510
1734 xhci0: usb@ee000000 { 1511 xhci0: usb@ee000000 {
1735 compatible = "renesas 1512 compatible = "renesas,xhci-r8a77990",
1736 "renesas 1513 "renesas,rcar-gen3-xhci";
1737 reg = <0 0xee000000 0 1514 reg = <0 0xee000000 0 0xc00>;
1738 interrupts = <GIC_SPI 1515 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1739 clocks = <&cpg CPG_MO 1516 clocks = <&cpg CPG_MOD 328>;
1740 power-domains = <&sys 1517 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1741 resets = <&cpg 328>; 1518 resets = <&cpg 328>;
1742 status = "disabled"; 1519 status = "disabled";
1743 }; 1520 };
1744 1521
1745 usb3_peri0: usb@ee020000 { 1522 usb3_peri0: usb@ee020000 {
1746 compatible = "renesas 1523 compatible = "renesas,r8a77990-usb3-peri",
1747 "renesas 1524 "renesas,rcar-gen3-usb3-peri";
1748 reg = <0 0xee020000 0 1525 reg = <0 0xee020000 0 0x400>;
1749 interrupts = <GIC_SPI 1526 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1750 clocks = <&cpg CPG_MO 1527 clocks = <&cpg CPG_MOD 328>;
1751 power-domains = <&sys 1528 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1752 resets = <&cpg 328>; 1529 resets = <&cpg 328>;
1753 status = "disabled"; 1530 status = "disabled";
1754 }; 1531 };
1755 1532
1756 ohci0: usb@ee080000 { 1533 ohci0: usb@ee080000 {
1757 compatible = "generic 1534 compatible = "generic-ohci";
1758 reg = <0 0xee080000 0 1535 reg = <0 0xee080000 0 0x100>;
1759 interrupts = <GIC_SPI 1536 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1760 clocks = <&cpg CPG_MO 1537 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1761 phys = <&usb2_phy0 1> 1538 phys = <&usb2_phy0 1>;
1762 phy-names = "usb"; 1539 phy-names = "usb";
1763 power-domains = <&sys 1540 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1764 resets = <&cpg 703>, 1541 resets = <&cpg 703>, <&cpg 704>;
1765 status = "disabled"; 1542 status = "disabled";
1766 }; 1543 };
1767 1544
1768 ehci0: usb@ee080100 { 1545 ehci0: usb@ee080100 {
1769 compatible = "generic 1546 compatible = "generic-ehci";
1770 reg = <0 0xee080100 0 1547 reg = <0 0xee080100 0 0x100>;
1771 interrupts = <GIC_SPI 1548 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1772 clocks = <&cpg CPG_MO 1549 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1773 phys = <&usb2_phy0 2> 1550 phys = <&usb2_phy0 2>;
1774 phy-names = "usb"; 1551 phy-names = "usb";
1775 companion = <&ohci0>; 1552 companion = <&ohci0>;
1776 power-domains = <&sys 1553 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1777 resets = <&cpg 703>, 1554 resets = <&cpg 703>, <&cpg 704>;
1778 status = "disabled"; 1555 status = "disabled";
1779 }; 1556 };
1780 1557
1781 usb2_phy0: usb-phy@ee080200 { 1558 usb2_phy0: usb-phy@ee080200 {
1782 compatible = "renesas 1559 compatible = "renesas,usb2-phy-r8a77990",
1783 "renesas 1560 "renesas,rcar-gen3-usb2-phy";
1784 reg = <0 0xee080200 0 1561 reg = <0 0xee080200 0 0x700>;
1785 interrupts = <GIC_SPI 1562 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1786 clocks = <&cpg CPG_MO 1563 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1787 power-domains = <&sys 1564 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1788 resets = <&cpg 703>, 1565 resets = <&cpg 703>, <&cpg 704>;
1789 #phy-cells = <1>; 1566 #phy-cells = <1>;
1790 status = "disabled"; 1567 status = "disabled";
1791 }; 1568 };
1792 1569
1793 sdhi0: mmc@ee100000 { !! 1570 sdhi0: sd@ee100000 {
1794 compatible = "renesas 1571 compatible = "renesas,sdhi-r8a77990",
1795 "renesas 1572 "renesas,rcar-gen3-sdhi";
1796 reg = <0 0xee100000 0 1573 reg = <0 0xee100000 0 0x2000>;
1797 interrupts = <GIC_SPI 1574 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1798 clocks = <&cpg CPG_MO !! 1575 clocks = <&cpg CPG_MOD 314>;
1799 clock-names = "core", <<
1800 max-frequency = <2000 1576 max-frequency = <200000000>;
1801 power-domains = <&sys 1577 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1802 resets = <&cpg 314>; 1578 resets = <&cpg 314>;
1803 iommus = <&ipmmu_ds1 <<
1804 status = "disabled"; 1579 status = "disabled";
1805 }; 1580 };
1806 1581
1807 sdhi1: mmc@ee120000 { !! 1582 sdhi1: sd@ee120000 {
1808 compatible = "renesas 1583 compatible = "renesas,sdhi-r8a77990",
1809 "renesas 1584 "renesas,rcar-gen3-sdhi";
1810 reg = <0 0xee120000 0 1585 reg = <0 0xee120000 0 0x2000>;
1811 interrupts = <GIC_SPI 1586 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1812 clocks = <&cpg CPG_MO !! 1587 clocks = <&cpg CPG_MOD 313>;
1813 clock-names = "core", <<
1814 max-frequency = <2000 1588 max-frequency = <200000000>;
1815 power-domains = <&sys 1589 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1816 resets = <&cpg 313>; 1590 resets = <&cpg 313>;
1817 iommus = <&ipmmu_ds1 <<
1818 status = "disabled"; 1591 status = "disabled";
1819 }; 1592 };
1820 1593
1821 sdhi3: mmc@ee160000 { !! 1594 sdhi3: sd@ee160000 {
1822 compatible = "renesas 1595 compatible = "renesas,sdhi-r8a77990",
1823 "renesas 1596 "renesas,rcar-gen3-sdhi";
1824 reg = <0 0xee160000 0 1597 reg = <0 0xee160000 0 0x2000>;
1825 interrupts = <GIC_SPI 1598 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1826 clocks = <&cpg CPG_MO !! 1599 clocks = <&cpg CPG_MOD 311>;
1827 clock-names = "core", <<
1828 max-frequency = <2000 1600 max-frequency = <200000000>;
1829 power-domains = <&sys 1601 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1830 resets = <&cpg 311>; 1602 resets = <&cpg 311>;
1831 iommus = <&ipmmu_ds1 <<
1832 status = "disabled"; <<
1833 }; <<
1834 <<
1835 rpc: spi@ee200000 { <<
1836 compatible = "renesas <<
1837 "renesas <<
1838 reg = <0 0xee200000 0 <<
1839 <0 0x08000000 0 <<
1840 <0 0xee208000 0 <<
1841 reg-names = "regs", " <<
1842 interrupts = <GIC_SPI <<
1843 clocks = <&cpg CPG_MO <<
1844 power-domains = <&sys <<
1845 resets = <&cpg 917>; <<
1846 #address-cells = <1>; <<
1847 #size-cells = <0>; <<
1848 status = "disabled"; 1603 status = "disabled";
1849 }; 1604 };
1850 1605
1851 gic: interrupt-controller@f10 1606 gic: interrupt-controller@f1010000 {
1852 compatible = "arm,gic 1607 compatible = "arm,gic-400";
1853 #interrupt-cells = <3 1608 #interrupt-cells = <3>;
1854 #address-cells = <0>; 1609 #address-cells = <0>;
1855 interrupt-controller; 1610 interrupt-controller;
1856 reg = <0x0 0xf1010000 1611 reg = <0x0 0xf1010000 0 0x1000>,
1857 <0x0 0xf1020000 1612 <0x0 0xf1020000 0 0x20000>,
1858 <0x0 0xf1040000 1613 <0x0 0xf1040000 0 0x20000>,
1859 <0x0 0xf1060000 1614 <0x0 0xf1060000 0 0x20000>;
1860 interrupts = <GIC_PPI 1615 interrupts = <GIC_PPI 9
1861 (GIC_ 1616 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1862 clocks = <&cpg CPG_MO 1617 clocks = <&cpg CPG_MOD 408>;
1863 clock-names = "clk"; 1618 clock-names = "clk";
1864 power-domains = <&sys 1619 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1865 resets = <&cpg 408>; 1620 resets = <&cpg 408>;
1866 }; 1621 };
1867 1622
1868 pciec0: pcie@fe000000 { 1623 pciec0: pcie@fe000000 {
1869 compatible = "renesas 1624 compatible = "renesas,pcie-r8a77990",
1870 "renesas 1625 "renesas,pcie-rcar-gen3";
1871 reg = <0 0xfe000000 0 1626 reg = <0 0xfe000000 0 0x80000>;
1872 #address-cells = <3>; 1627 #address-cells = <3>;
1873 #size-cells = <2>; 1628 #size-cells = <2>;
1874 bus-range = <0x00 0xf 1629 bus-range = <0x00 0xff>;
1875 device_type = "pci"; 1630 device_type = "pci";
1876 ranges = <0x01000000 !! 1631 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1877 <0x02000000 !! 1632 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1878 <0x02000000 !! 1633 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1879 <0x42000000 !! 1634 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1880 /* Map all possible D !! 1635 /* Map all possible DDR as inbound ranges */
1881 dma-ranges = <0x42000 !! 1636 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1882 interrupts = <GIC_SPI 1637 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1883 <GIC_SPI 1638 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1884 <GIC_SPI 1639 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1885 #interrupt-cells = <1 1640 #interrupt-cells = <1>;
1886 interrupt-map-mask = 1641 interrupt-map-mask = <0 0 0 0>;
1887 interrupt-map = <0 0 1642 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1888 clocks = <&cpg CPG_MO 1643 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1889 clock-names = "pcie", 1644 clock-names = "pcie", "pcie_bus";
1890 power-domains = <&sys 1645 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1891 resets = <&cpg 319>; 1646 resets = <&cpg 319>;
1892 iommu-map = <0 &ipmmu <<
1893 iommu-map-mask = <0>; <<
1894 status = "disabled"; 1647 status = "disabled";
1895 }; 1648 };
1896 1649
1897 vspb0: vsp@fe960000 { 1650 vspb0: vsp@fe960000 {
1898 compatible = "renesas 1651 compatible = "renesas,vsp2";
1899 reg = <0 0xfe960000 0 1652 reg = <0 0xfe960000 0 0x8000>;
1900 interrupts = <GIC_SPI 1653 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1901 clocks = <&cpg CPG_MO 1654 clocks = <&cpg CPG_MOD 626>;
1902 power-domains = <&sys 1655 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1903 resets = <&cpg 626>; 1656 resets = <&cpg 626>;
1904 renesas,fcp = <&fcpvb 1657 renesas,fcp = <&fcpvb0>;
1905 }; 1658 };
1906 1659
1907 fcpvb0: fcp@fe96f000 { 1660 fcpvb0: fcp@fe96f000 {
1908 compatible = "renesas 1661 compatible = "renesas,fcpv";
1909 reg = <0 0xfe96f000 0 1662 reg = <0 0xfe96f000 0 0x200>;
1910 clocks = <&cpg CPG_MO 1663 clocks = <&cpg CPG_MOD 607>;
1911 power-domains = <&sys 1664 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1912 resets = <&cpg 607>; 1665 resets = <&cpg 607>;
1913 iommus = <&ipmmu_vp0 1666 iommus = <&ipmmu_vp0 5>;
1914 }; 1667 };
1915 1668
1916 vspi0: vsp@fe9a0000 { 1669 vspi0: vsp@fe9a0000 {
1917 compatible = "renesas 1670 compatible = "renesas,vsp2";
1918 reg = <0 0xfe9a0000 0 1671 reg = <0 0xfe9a0000 0 0x8000>;
1919 interrupts = <GIC_SPI 1672 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1920 clocks = <&cpg CPG_MO 1673 clocks = <&cpg CPG_MOD 631>;
1921 power-domains = <&sys 1674 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1922 resets = <&cpg 631>; 1675 resets = <&cpg 631>;
1923 renesas,fcp = <&fcpvi 1676 renesas,fcp = <&fcpvi0>;
1924 }; 1677 };
1925 1678
1926 fcpvi0: fcp@fe9af000 { 1679 fcpvi0: fcp@fe9af000 {
1927 compatible = "renesas 1680 compatible = "renesas,fcpv";
1928 reg = <0 0xfe9af000 0 1681 reg = <0 0xfe9af000 0 0x200>;
1929 clocks = <&cpg CPG_MO 1682 clocks = <&cpg CPG_MOD 611>;
1930 power-domains = <&sys 1683 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1931 resets = <&cpg 611>; 1684 resets = <&cpg 611>;
1932 iommus = <&ipmmu_vp0 1685 iommus = <&ipmmu_vp0 8>;
1933 }; 1686 };
1934 1687
1935 vspd0: vsp@fea20000 { 1688 vspd0: vsp@fea20000 {
1936 compatible = "renesas 1689 compatible = "renesas,vsp2";
1937 reg = <0 0xfea20000 0 1690 reg = <0 0xfea20000 0 0x7000>;
1938 interrupts = <GIC_SPI 1691 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1939 clocks = <&cpg CPG_MO 1692 clocks = <&cpg CPG_MOD 623>;
1940 power-domains = <&sys 1693 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1941 resets = <&cpg 623>; 1694 resets = <&cpg 623>;
1942 renesas,fcp = <&fcpvd 1695 renesas,fcp = <&fcpvd0>;
1943 }; 1696 };
1944 1697
1945 fcpvd0: fcp@fea27000 { 1698 fcpvd0: fcp@fea27000 {
1946 compatible = "renesas 1699 compatible = "renesas,fcpv";
1947 reg = <0 0xfea27000 0 1700 reg = <0 0xfea27000 0 0x200>;
1948 clocks = <&cpg CPG_MO 1701 clocks = <&cpg CPG_MOD 603>;
1949 power-domains = <&sys 1702 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1950 resets = <&cpg 603>; 1703 resets = <&cpg 603>;
1951 iommus = <&ipmmu_vi0 1704 iommus = <&ipmmu_vi0 8>;
1952 }; 1705 };
1953 1706
1954 vspd1: vsp@fea28000 { 1707 vspd1: vsp@fea28000 {
1955 compatible = "renesas 1708 compatible = "renesas,vsp2";
1956 reg = <0 0xfea28000 0 1709 reg = <0 0xfea28000 0 0x7000>;
1957 interrupts = <GIC_SPI 1710 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1958 clocks = <&cpg CPG_MO 1711 clocks = <&cpg CPG_MOD 622>;
1959 power-domains = <&sys 1712 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1960 resets = <&cpg 622>; 1713 resets = <&cpg 622>;
1961 renesas,fcp = <&fcpvd 1714 renesas,fcp = <&fcpvd1>;
1962 }; 1715 };
1963 1716
1964 fcpvd1: fcp@fea2f000 { 1717 fcpvd1: fcp@fea2f000 {
1965 compatible = "renesas 1718 compatible = "renesas,fcpv";
1966 reg = <0 0xfea2f000 0 1719 reg = <0 0xfea2f000 0 0x200>;
1967 clocks = <&cpg CPG_MO 1720 clocks = <&cpg CPG_MOD 602>;
1968 power-domains = <&sys 1721 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1969 resets = <&cpg 602>; 1722 resets = <&cpg 602>;
1970 iommus = <&ipmmu_vi0 1723 iommus = <&ipmmu_vi0 9>;
1971 }; 1724 };
1972 1725
1973 cmm0: cmm@fea40000 { <<
1974 compatible = "renesas <<
1975 "renesas <<
1976 reg = <0 0xfea40000 0 <<
1977 power-domains = <&sys <<
1978 clocks = <&cpg CPG_MO <<
1979 resets = <&cpg 711>; <<
1980 }; <<
1981 <<
1982 cmm1: cmm@fea50000 { <<
1983 compatible = "renesas <<
1984 "renesas <<
1985 reg = <0 0xfea50000 0 <<
1986 power-domains = <&sys <<
1987 clocks = <&cpg CPG_MO <<
1988 resets = <&cpg 710>; <<
1989 }; <<
1990 <<
1991 csi40: csi2@feaa0000 { 1726 csi40: csi2@feaa0000 {
1992 compatible = "renesas 1727 compatible = "renesas,r8a77990-csi2";
1993 reg = <0 0xfeaa0000 0 1728 reg = <0 0xfeaa0000 0 0x10000>;
1994 interrupts = <GIC_SPI 1729 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1995 clocks = <&cpg CPG_MO 1730 clocks = <&cpg CPG_MOD 716>;
1996 power-domains = <&sys 1731 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1997 resets = <&cpg 716>; 1732 resets = <&cpg 716>;
1998 status = "disabled"; 1733 status = "disabled";
1999 1734
2000 ports { 1735 ports {
2001 #address-cell 1736 #address-cells = <1>;
2002 #size-cells = 1737 #size-cells = <0>;
2003 1738
2004 port@0 { <<
2005 reg = <<
2006 }; <<
2007 <<
2008 port@1 { 1739 port@1 {
2009 #addr 1740 #address-cells = <1>;
2010 #size 1741 #size-cells = <0>;
2011 1742
2012 reg = 1743 reg = <1>;
2013 1744
2014 csi40 1745 csi40vin4: endpoint@0 {
2015 1746 reg = <0>;
2016 1747 remote-endpoint = <&vin4csi40>;
2017 }; 1748 };
2018 csi40 1749 csi40vin5: endpoint@1 {
2019 1750 reg = <1>;
2020 1751 remote-endpoint = <&vin5csi40>;
2021 }; 1752 };
2022 }; 1753 };
2023 }; 1754 };
2024 }; 1755 };
2025 1756
2026 du: display@feb00000 { 1757 du: display@feb00000 {
2027 compatible = "renesas 1758 compatible = "renesas,du-r8a77990";
2028 reg = <0 0xfeb00000 0 1759 reg = <0 0xfeb00000 0 0x40000>;
2029 interrupts = <GIC_SPI 1760 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2030 <GIC_SPI 1761 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
2031 clocks = <&cpg CPG_MO !! 1762 clocks = <&cpg CPG_MOD 724>,
>> 1763 <&cpg CPG_MOD 723>;
2032 clock-names = "du.0", 1764 clock-names = "du.0", "du.1";
2033 resets = <&cpg 724>; 1765 resets = <&cpg 724>;
2034 reset-names = "du.0"; 1766 reset-names = "du.0";
2035 !! 1767 vsps = <&vspd0 0>, <&vspd1 0>;
2036 renesas,cmms = <&cmm0 <<
2037 renesas,vsps = <&vspd <<
2038 <<
2039 status = "disabled"; 1768 status = "disabled";
2040 1769
2041 ports { 1770 ports {
2042 #address-cell 1771 #address-cells = <1>;
2043 #size-cells = 1772 #size-cells = <0>;
2044 1773
2045 port@0 { 1774 port@0 {
2046 reg = 1775 reg = <0>;
>> 1776 du_out_rgb: endpoint {
>> 1777 };
2047 }; 1778 };
2048 1779
2049 port@1 { 1780 port@1 {
2050 reg = 1781 reg = <1>;
2051 du_ou 1782 du_out_lvds0: endpoint {
2052 1783 remote-endpoint = <&lvds0_in>;
2053 }; 1784 };
2054 }; 1785 };
2055 1786
2056 port@2 { 1787 port@2 {
2057 reg = 1788 reg = <2>;
2058 du_ou 1789 du_out_lvds1: endpoint {
2059 1790 remote-endpoint = <&lvds1_in>;
2060 }; 1791 };
2061 }; 1792 };
2062 }; 1793 };
2063 }; 1794 };
2064 1795
2065 lvds0: lvds-encoder@feb90000 1796 lvds0: lvds-encoder@feb90000 {
2066 compatible = "renesas 1797 compatible = "renesas,r8a77990-lvds";
2067 reg = <0 0xfeb90000 0 1798 reg = <0 0xfeb90000 0 0x20>;
2068 clocks = <&cpg CPG_MO 1799 clocks = <&cpg CPG_MOD 727>;
2069 power-domains = <&sys 1800 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2070 resets = <&cpg 727>; 1801 resets = <&cpg 727>;
2071 status = "disabled"; 1802 status = "disabled";
2072 1803
2073 renesas,companion = < 1804 renesas,companion = <&lvds1>;
2074 1805
2075 ports { 1806 ports {
2076 #address-cell 1807 #address-cells = <1>;
2077 #size-cells = 1808 #size-cells = <0>;
2078 1809
2079 port@0 { 1810 port@0 {
2080 reg = 1811 reg = <0>;
2081 lvds0 1812 lvds0_in: endpoint {
2082 1813 remote-endpoint = <&du_out_lvds0>;
2083 }; 1814 };
2084 }; 1815 };
2085 1816
2086 port@1 { 1817 port@1 {
2087 reg = 1818 reg = <1>;
>> 1819 lvds0_out: endpoint {
>> 1820 };
2088 }; 1821 };
2089 }; 1822 };
2090 }; 1823 };
2091 1824
2092 lvds1: lvds-encoder@feb90100 1825 lvds1: lvds-encoder@feb90100 {
2093 compatible = "renesas 1826 compatible = "renesas,r8a77990-lvds";
2094 reg = <0 0xfeb90100 0 1827 reg = <0 0xfeb90100 0 0x20>;
2095 clocks = <&cpg CPG_MO 1828 clocks = <&cpg CPG_MOD 727>;
2096 power-domains = <&sys 1829 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2097 resets = <&cpg 726>; 1830 resets = <&cpg 726>;
2098 status = "disabled"; 1831 status = "disabled";
2099 1832
2100 ports { 1833 ports {
2101 #address-cell 1834 #address-cells = <1>;
2102 #size-cells = 1835 #size-cells = <0>;
2103 1836
2104 port@0 { 1837 port@0 {
2105 reg = 1838 reg = <0>;
2106 lvds1 1839 lvds1_in: endpoint {
2107 1840 remote-endpoint = <&du_out_lvds1>;
2108 }; 1841 };
2109 }; 1842 };
2110 1843
2111 port@1 { 1844 port@1 {
2112 reg = 1845 reg = <1>;
>> 1846 lvds1_out: endpoint {
>> 1847 };
2113 }; 1848 };
2114 }; 1849 };
2115 }; 1850 };
2116 1851
2117 prr: chipid@fff00044 { 1852 prr: chipid@fff00044 {
2118 compatible = "renesas 1853 compatible = "renesas,prr";
2119 reg = <0 0xfff00044 0 1854 reg = <0 0xfff00044 0 4>;
2120 }; 1855 };
2121 }; 1856 };
2122 1857
2123 thermal-zones { 1858 thermal-zones {
2124 cpu-thermal { 1859 cpu-thermal {
2125 polling-delay-passive 1860 polling-delay-passive = <250>;
2126 polling-delay = <0>; 1861 polling-delay = <0>;
2127 thermal-sensors = <&t !! 1862 thermal-sensors = <&thermal 0>;
2128 sustainable-power = < 1863 sustainable-power = <717>;
2129 1864
2130 cooling-maps { 1865 cooling-maps {
2131 map0 { 1866 map0 {
2132 trip 1867 trip = <&target>;
2133 cooli 1868 cooling-device = <&a53_0 0 2>;
2134 contr 1869 contribution = <1024>;
2135 }; 1870 };
2136 }; 1871 };
2137 1872
2138 trips { 1873 trips {
2139 sensor1_crit: 1874 sensor1_crit: sensor1-crit {
2140 tempe 1875 temperature = <120000>;
2141 hyste 1876 hysteresis = <2000>;
2142 type 1877 type = "critical";
2143 }; 1878 };
2144 1879
2145 target: trip- 1880 target: trip-point1 {
2146 tempe 1881 temperature = <100000>;
2147 hyste 1882 hysteresis = <2000>;
2148 type 1883 type = "passive";
2149 }; 1884 };
2150 }; 1885 };
2151 }; 1886 };
2152 }; 1887 };
2153 1888
2154 timer { 1889 timer {
2155 compatible = "arm,armv8-timer 1890 compatible = "arm,armv8-timer";
2156 interrupts-extended = <&gic G 1891 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2157 <&gic G 1892 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2158 <&gic G 1893 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2159 <&gic G 1894 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2160 interrupt-names = "sec-phys", <<
2161 }; 1895 };
2162 }; 1896 };
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