1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car E3 (R8A779 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 * 4 *
5 * Copyright (C) 2018-2019 Renesas Electronics 5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */ 6 */
7 7
8 #include <dt-bindings/clock/r8a77990-cpg-mssr. 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h> 10 #include <dt-bindings/power/r8a77990-sysc.h>
11 11
12 / { 12 / {
13 compatible = "renesas,r8a77990"; 13 compatible = "renesas,r8a77990";
14 #address-cells = <2>; 14 #address-cells = <2>;
15 #size-cells = <2>; 15 #size-cells = <2>;
16 16
>> 17 aliases {
>> 18 i2c0 = &i2c0;
>> 19 i2c1 = &i2c1;
>> 20 i2c2 = &i2c2;
>> 21 i2c3 = &i2c3;
>> 22 i2c4 = &i2c4;
>> 23 i2c5 = &i2c5;
>> 24 i2c6 = &i2c6;
>> 25 i2c7 = &i2c7;
>> 26 };
>> 27
17 /* 28 /*
18 * The external audio clocks are confi 29 * The external audio clocks are configured as 0 Hz fixed frequency
19 * clocks by default. 30 * clocks by default.
20 * Boards that provide audio clocks sh 31 * Boards that provide audio clocks should override them.
21 */ 32 */
22 audio_clk_a: audio_clk_a { 33 audio_clk_a: audio_clk_a {
23 compatible = "fixed-clock"; 34 compatible = "fixed-clock";
24 #clock-cells = <0>; 35 #clock-cells = <0>;
25 clock-frequency = <0>; 36 clock-frequency = <0>;
26 }; 37 };
27 38
28 audio_clk_b: audio_clk_b { 39 audio_clk_b: audio_clk_b {
29 compatible = "fixed-clock"; 40 compatible = "fixed-clock";
30 #clock-cells = <0>; 41 #clock-cells = <0>;
31 clock-frequency = <0>; 42 clock-frequency = <0>;
32 }; 43 };
33 44
34 audio_clk_c: audio_clk_c { 45 audio_clk_c: audio_clk_c {
35 compatible = "fixed-clock"; 46 compatible = "fixed-clock";
36 #clock-cells = <0>; 47 #clock-cells = <0>;
37 clock-frequency = <0>; 48 clock-frequency = <0>;
38 }; 49 };
39 50
40 /* External CAN clock - to be overridd 51 /* External CAN clock - to be overridden by boards that provide it */
41 can_clk: can { 52 can_clk: can {
42 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
43 #clock-cells = <0>; 54 #clock-cells = <0>;
44 clock-frequency = <0>; 55 clock-frequency = <0>;
45 }; 56 };
46 57
47 cluster1_opp: opp-table-1 { !! 58 cluster1_opp: opp_table10 {
48 compatible = "operating-points 59 compatible = "operating-points-v2";
49 opp-shared; 60 opp-shared;
50 opp-800000000 { 61 opp-800000000 {
51 opp-hz = /bits/ 64 <80 62 opp-hz = /bits/ 64 <800000000>;
>> 63 opp-microvolt = <820000>;
52 clock-latency-ns = <30 64 clock-latency-ns = <300000>;
53 }; 65 };
54 opp-1000000000 { 66 opp-1000000000 {
55 opp-hz = /bits/ 64 <10 67 opp-hz = /bits/ 64 <1000000000>;
>> 68 opp-microvolt = <820000>;
56 clock-latency-ns = <30 69 clock-latency-ns = <300000>;
57 }; 70 };
58 opp-1200000000 { 71 opp-1200000000 {
59 opp-hz = /bits/ 64 <12 72 opp-hz = /bits/ 64 <1200000000>;
>> 73 opp-microvolt = <820000>;
60 clock-latency-ns = <30 74 clock-latency-ns = <300000>;
61 opp-suspend; 75 opp-suspend;
62 }; 76 };
63 }; 77 };
64 78
65 cpus { 79 cpus {
66 #address-cells = <1>; 80 #address-cells = <1>;
67 #size-cells = <0>; 81 #size-cells = <0>;
68 82
69 a53_0: cpu@0 { 83 a53_0: cpu@0 {
70 compatible = "arm,cort 84 compatible = "arm,cortex-a53";
71 reg = <0>; 85 reg = <0>;
72 device_type = "cpu"; 86 device_type = "cpu";
73 #cooling-cells = <2>; 87 #cooling-cells = <2>;
74 power-domains = <&sysc 88 power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
75 next-level-cache = <&L 89 next-level-cache = <&L2_CA53>;
76 enable-method = "psci" 90 enable-method = "psci";
77 cpu-idle-states = <&CP 91 cpu-idle-states = <&CPU_SLEEP_0>;
78 dynamic-power-coeffici 92 dynamic-power-coefficient = <277>;
79 clocks = <&cpg CPG_COR !! 93 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
80 operating-points-v2 = 94 operating-points-v2 = <&cluster1_opp>;
81 }; 95 };
82 96
83 a53_1: cpu@1 { 97 a53_1: cpu@1 {
84 compatible = "arm,cort 98 compatible = "arm,cortex-a53";
85 reg = <1>; 99 reg = <1>;
86 device_type = "cpu"; 100 device_type = "cpu";
87 power-domains = <&sysc 101 power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
88 next-level-cache = <&L 102 next-level-cache = <&L2_CA53>;
89 enable-method = "psci" 103 enable-method = "psci";
90 cpu-idle-states = <&CP 104 cpu-idle-states = <&CPU_SLEEP_0>;
91 clocks = <&cpg CPG_COR !! 105 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
92 operating-points-v2 = 106 operating-points-v2 = <&cluster1_opp>;
93 }; 107 };
94 108
95 L2_CA53: cache-controller-0 { 109 L2_CA53: cache-controller-0 {
96 compatible = "cache"; 110 compatible = "cache";
97 power-domains = <&sysc 111 power-domains = <&sysc R8A77990_PD_CA53_SCU>;
98 cache-unified; 112 cache-unified;
99 cache-level = <2>; 113 cache-level = <2>;
100 }; 114 };
101 115
102 idle-states { 116 idle-states {
103 entry-method = "psci"; 117 entry-method = "psci";
104 118
105 CPU_SLEEP_0: cpu-sleep 119 CPU_SLEEP_0: cpu-sleep-0 {
106 compatible = " 120 compatible = "arm,idle-state";
107 arm,psci-suspe 121 arm,psci-suspend-param = <0x0010000>;
108 local-timer-st 122 local-timer-stop;
109 entry-latency- 123 entry-latency-us = <700>;
110 exit-latency-u 124 exit-latency-us = <700>;
111 min-residency- 125 min-residency-us = <5000>;
112 }; 126 };
113 }; 127 };
114 }; 128 };
115 129
116 extal_clk: extal { 130 extal_clk: extal {
117 compatible = "fixed-clock"; 131 compatible = "fixed-clock";
118 #clock-cells = <0>; 132 #clock-cells = <0>;
119 /* This value must be overridd 133 /* This value must be overridden by the board */
120 clock-frequency = <0>; 134 clock-frequency = <0>;
121 }; 135 };
122 136
123 /* External PCIe clock - can be overri 137 /* External PCIe clock - can be overridden by the board */
124 pcie_bus_clk: pcie_bus { 138 pcie_bus_clk: pcie_bus {
125 compatible = "fixed-clock"; 139 compatible = "fixed-clock";
126 #clock-cells = <0>; 140 #clock-cells = <0>;
127 clock-frequency = <0>; 141 clock-frequency = <0>;
128 }; 142 };
129 143
130 pmu_a53 { 144 pmu_a53 {
131 compatible = "arm,cortex-a53-p 145 compatible = "arm,cortex-a53-pmu";
132 interrupts-extended = <&gic GI 146 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
133 <&gic GI 147 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-affinity = <&a53_0>, 148 interrupt-affinity = <&a53_0>, <&a53_1>;
135 }; 149 };
136 150
137 psci { 151 psci {
138 compatible = "arm,psci-1.0", " 152 compatible = "arm,psci-1.0", "arm,psci-0.2";
139 method = "smc"; 153 method = "smc";
140 }; 154 };
141 155
142 /* External SCIF clock - to be overrid 156 /* External SCIF clock - to be overridden by boards that provide it */
143 scif_clk: scif { 157 scif_clk: scif {
144 compatible = "fixed-clock"; 158 compatible = "fixed-clock";
145 #clock-cells = <0>; 159 #clock-cells = <0>;
146 clock-frequency = <0>; 160 clock-frequency = <0>;
147 }; 161 };
148 162
149 soc: soc { 163 soc: soc {
150 compatible = "simple-bus"; 164 compatible = "simple-bus";
151 interrupt-parent = <&gic>; 165 interrupt-parent = <&gic>;
152 #address-cells = <2>; 166 #address-cells = <2>;
153 #size-cells = <2>; 167 #size-cells = <2>;
154 ranges; 168 ranges;
155 169
156 rwdt: watchdog@e6020000 { 170 rwdt: watchdog@e6020000 {
157 compatible = "renesas, 171 compatible = "renesas,r8a77990-wdt",
158 "renesas, 172 "renesas,rcar-gen3-wdt";
159 reg = <0 0xe6020000 0 173 reg = <0 0xe6020000 0 0x0c>;
160 interrupts = <GIC_SPI <<
161 clocks = <&cpg CPG_MOD 174 clocks = <&cpg CPG_MOD 402>;
162 power-domains = <&sysc 175 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
163 resets = <&cpg 402>; 176 resets = <&cpg 402>;
164 status = "disabled"; 177 status = "disabled";
165 }; 178 };
166 179
167 gpio0: gpio@e6050000 { 180 gpio0: gpio@e6050000 {
168 compatible = "renesas, 181 compatible = "renesas,gpio-r8a77990",
169 "renesas, 182 "renesas,rcar-gen3-gpio";
170 reg = <0 0xe6050000 0 183 reg = <0 0xe6050000 0 0x50>;
171 interrupts = <GIC_SPI 184 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
172 #gpio-cells = <2>; 185 #gpio-cells = <2>;
173 gpio-controller; 186 gpio-controller;
174 gpio-ranges = <&pfc 0 187 gpio-ranges = <&pfc 0 0 18>;
175 #interrupt-cells = <2> 188 #interrupt-cells = <2>;
176 interrupt-controller; 189 interrupt-controller;
177 clocks = <&cpg CPG_MOD 190 clocks = <&cpg CPG_MOD 912>;
178 power-domains = <&sysc 191 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
179 resets = <&cpg 912>; 192 resets = <&cpg 912>;
180 }; 193 };
181 194
182 gpio1: gpio@e6051000 { 195 gpio1: gpio@e6051000 {
183 compatible = "renesas, 196 compatible = "renesas,gpio-r8a77990",
184 "renesas, 197 "renesas,rcar-gen3-gpio";
185 reg = <0 0xe6051000 0 198 reg = <0 0xe6051000 0 0x50>;
186 interrupts = <GIC_SPI 199 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
187 #gpio-cells = <2>; 200 #gpio-cells = <2>;
188 gpio-controller; 201 gpio-controller;
189 gpio-ranges = <&pfc 0 202 gpio-ranges = <&pfc 0 32 23>;
190 #interrupt-cells = <2> 203 #interrupt-cells = <2>;
191 interrupt-controller; 204 interrupt-controller;
192 clocks = <&cpg CPG_MOD 205 clocks = <&cpg CPG_MOD 911>;
193 power-domains = <&sysc 206 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
194 resets = <&cpg 911>; 207 resets = <&cpg 911>;
195 }; 208 };
196 209
197 gpio2: gpio@e6052000 { 210 gpio2: gpio@e6052000 {
198 compatible = "renesas, 211 compatible = "renesas,gpio-r8a77990",
199 "renesas, 212 "renesas,rcar-gen3-gpio";
200 reg = <0 0xe6052000 0 213 reg = <0 0xe6052000 0 0x50>;
201 interrupts = <GIC_SPI 214 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
202 #gpio-cells = <2>; 215 #gpio-cells = <2>;
203 gpio-controller; 216 gpio-controller;
204 gpio-ranges = <&pfc 0 217 gpio-ranges = <&pfc 0 64 26>;
205 #interrupt-cells = <2> 218 #interrupt-cells = <2>;
206 interrupt-controller; 219 interrupt-controller;
207 clocks = <&cpg CPG_MOD 220 clocks = <&cpg CPG_MOD 910>;
208 power-domains = <&sysc 221 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
209 resets = <&cpg 910>; 222 resets = <&cpg 910>;
210 }; 223 };
211 224
212 gpio3: gpio@e6053000 { 225 gpio3: gpio@e6053000 {
213 compatible = "renesas, 226 compatible = "renesas,gpio-r8a77990",
214 "renesas, 227 "renesas,rcar-gen3-gpio";
215 reg = <0 0xe6053000 0 228 reg = <0 0xe6053000 0 0x50>;
216 interrupts = <GIC_SPI 229 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
217 #gpio-cells = <2>; 230 #gpio-cells = <2>;
218 gpio-controller; 231 gpio-controller;
219 gpio-ranges = <&pfc 0 232 gpio-ranges = <&pfc 0 96 16>;
220 #interrupt-cells = <2> 233 #interrupt-cells = <2>;
221 interrupt-controller; 234 interrupt-controller;
222 clocks = <&cpg CPG_MOD 235 clocks = <&cpg CPG_MOD 909>;
223 power-domains = <&sysc 236 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
224 resets = <&cpg 909>; 237 resets = <&cpg 909>;
225 }; 238 };
226 239
227 gpio4: gpio@e6054000 { 240 gpio4: gpio@e6054000 {
228 compatible = "renesas, 241 compatible = "renesas,gpio-r8a77990",
229 "renesas, 242 "renesas,rcar-gen3-gpio";
230 reg = <0 0xe6054000 0 243 reg = <0 0xe6054000 0 0x50>;
231 interrupts = <GIC_SPI 244 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
232 #gpio-cells = <2>; 245 #gpio-cells = <2>;
233 gpio-controller; 246 gpio-controller;
234 gpio-ranges = <&pfc 0 247 gpio-ranges = <&pfc 0 128 11>;
235 #interrupt-cells = <2> 248 #interrupt-cells = <2>;
236 interrupt-controller; 249 interrupt-controller;
237 clocks = <&cpg CPG_MOD 250 clocks = <&cpg CPG_MOD 908>;
238 power-domains = <&sysc 251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
239 resets = <&cpg 908>; 252 resets = <&cpg 908>;
240 }; 253 };
241 254
242 gpio5: gpio@e6055000 { 255 gpio5: gpio@e6055000 {
243 compatible = "renesas, 256 compatible = "renesas,gpio-r8a77990",
244 "renesas, 257 "renesas,rcar-gen3-gpio";
245 reg = <0 0xe6055000 0 258 reg = <0 0xe6055000 0 0x50>;
246 interrupts = <GIC_SPI 259 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
247 #gpio-cells = <2>; 260 #gpio-cells = <2>;
248 gpio-controller; 261 gpio-controller;
249 gpio-ranges = <&pfc 0 262 gpio-ranges = <&pfc 0 160 20>;
250 #interrupt-cells = <2> 263 #interrupt-cells = <2>;
251 interrupt-controller; 264 interrupt-controller;
252 clocks = <&cpg CPG_MOD 265 clocks = <&cpg CPG_MOD 907>;
253 power-domains = <&sysc 266 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
254 resets = <&cpg 907>; 267 resets = <&cpg 907>;
255 }; 268 };
256 269
257 gpio6: gpio@e6055400 { 270 gpio6: gpio@e6055400 {
258 compatible = "renesas, 271 compatible = "renesas,gpio-r8a77990",
259 "renesas, 272 "renesas,rcar-gen3-gpio";
260 reg = <0 0xe6055400 0 273 reg = <0 0xe6055400 0 0x50>;
261 interrupts = <GIC_SPI 274 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
262 #gpio-cells = <2>; 275 #gpio-cells = <2>;
263 gpio-controller; 276 gpio-controller;
264 gpio-ranges = <&pfc 0 277 gpio-ranges = <&pfc 0 192 18>;
265 #interrupt-cells = <2> 278 #interrupt-cells = <2>;
266 interrupt-controller; 279 interrupt-controller;
267 clocks = <&cpg CPG_MOD 280 clocks = <&cpg CPG_MOD 906>;
268 power-domains = <&sysc 281 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
269 resets = <&cpg 906>; 282 resets = <&cpg 906>;
270 }; 283 };
271 284
272 pfc: pinctrl@e6060000 { !! 285 pfc: pin-controller@e6060000 {
273 compatible = "renesas, 286 compatible = "renesas,pfc-r8a77990";
274 reg = <0 0xe6060000 0 287 reg = <0 0xe6060000 0 0x508>;
275 }; 288 };
276 289
277 i2c_dvfs: i2c@e60b0000 { 290 i2c_dvfs: i2c@e60b0000 {
278 #address-cells = <1>; 291 #address-cells = <1>;
279 #size-cells = <0>; 292 #size-cells = <0>;
280 compatible = "renesas, !! 293 compatible = "renesas,iic-r8a77990";
281 "renesas, !! 294 reg = <0 0xe60b0000 0 0x15>;
282 "renesas, <<
283 reg = <0 0xe60b0000 0 <<
284 interrupts = <GIC_SPI 295 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&cpg CPG_MOD 296 clocks = <&cpg CPG_MOD 926>;
286 power-domains = <&sysc 297 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
287 resets = <&cpg 926>; 298 resets = <&cpg 926>;
288 dmas = <&dmac0 0x11>, 299 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
289 dma-names = "tx", "rx" 300 dma-names = "tx", "rx";
290 status = "disabled"; 301 status = "disabled";
291 }; 302 };
292 303
293 cmt0: timer@e60f0000 { 304 cmt0: timer@e60f0000 {
294 compatible = "renesas, 305 compatible = "renesas,r8a77990-cmt0",
295 "renesas, 306 "renesas,rcar-gen3-cmt0";
296 reg = <0 0xe60f0000 0 307 reg = <0 0xe60f0000 0 0x1004>;
297 interrupts = <GIC_SPI 308 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 309 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
299 clocks = <&cpg CPG_MOD 310 clocks = <&cpg CPG_MOD 303>;
300 clock-names = "fck"; 311 clock-names = "fck";
301 power-domains = <&sysc 312 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
302 resets = <&cpg 303>; 313 resets = <&cpg 303>;
303 status = "disabled"; 314 status = "disabled";
304 }; 315 };
305 316
306 cmt1: timer@e6130000 { 317 cmt1: timer@e6130000 {
307 compatible = "renesas, 318 compatible = "renesas,r8a77990-cmt1",
308 "renesas, 319 "renesas,rcar-gen3-cmt1";
309 reg = <0 0xe6130000 0 320 reg = <0 0xe6130000 0 0x1004>;
310 interrupts = <GIC_SPI 321 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
311 <GIC_SPI 322 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
312 <GIC_SPI 323 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
313 <GIC_SPI 324 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
314 <GIC_SPI 325 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
315 <GIC_SPI 326 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
316 <GIC_SPI 327 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 328 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
318 clocks = <&cpg CPG_MOD 329 clocks = <&cpg CPG_MOD 302>;
319 clock-names = "fck"; 330 clock-names = "fck";
320 power-domains = <&sysc 331 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
321 resets = <&cpg 302>; 332 resets = <&cpg 302>;
322 status = "disabled"; 333 status = "disabled";
323 }; 334 };
324 335
325 cmt2: timer@e6140000 { 336 cmt2: timer@e6140000 {
326 compatible = "renesas, 337 compatible = "renesas,r8a77990-cmt1",
327 "renesas, 338 "renesas,rcar-gen3-cmt1";
328 reg = <0 0xe6140000 0 339 reg = <0 0xe6140000 0 0x1004>;
329 interrupts = <GIC_SPI 340 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 341 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 342 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 343 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
333 <GIC_SPI 344 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 345 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
335 <GIC_SPI 346 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 347 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
337 clocks = <&cpg CPG_MOD 348 clocks = <&cpg CPG_MOD 301>;
338 clock-names = "fck"; 349 clock-names = "fck";
339 power-domains = <&sysc 350 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
340 resets = <&cpg 301>; 351 resets = <&cpg 301>;
341 status = "disabled"; 352 status = "disabled";
342 }; 353 };
343 354
344 cmt3: timer@e6148000 { 355 cmt3: timer@e6148000 {
345 compatible = "renesas, 356 compatible = "renesas,r8a77990-cmt1",
346 "renesas, 357 "renesas,rcar-gen3-cmt1";
347 reg = <0 0xe6148000 0 358 reg = <0 0xe6148000 0 0x1004>;
348 interrupts = <GIC_SPI 359 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 360 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
350 <GIC_SPI 361 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
351 <GIC_SPI 362 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 363 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 364 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 365 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 366 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
356 clocks = <&cpg CPG_MOD 367 clocks = <&cpg CPG_MOD 300>;
357 clock-names = "fck"; 368 clock-names = "fck";
358 power-domains = <&sysc 369 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
359 resets = <&cpg 300>; 370 resets = <&cpg 300>;
360 status = "disabled"; 371 status = "disabled";
361 }; 372 };
362 373
363 cpg: clock-controller@e6150000 374 cpg: clock-controller@e6150000 {
364 compatible = "renesas, 375 compatible = "renesas,r8a77990-cpg-mssr";
365 reg = <0 0xe6150000 0 376 reg = <0 0xe6150000 0 0x1000>;
366 clocks = <&extal_clk>; 377 clocks = <&extal_clk>;
367 clock-names = "extal"; 378 clock-names = "extal";
368 #clock-cells = <2>; 379 #clock-cells = <2>;
369 #power-domain-cells = 380 #power-domain-cells = <0>;
370 #reset-cells = <1>; 381 #reset-cells = <1>;
371 }; 382 };
372 383
373 rst: reset-controller@e6160000 384 rst: reset-controller@e6160000 {
374 compatible = "renesas, 385 compatible = "renesas,r8a77990-rst";
375 reg = <0 0xe6160000 0 386 reg = <0 0xe6160000 0 0x0200>;
376 }; 387 };
377 388
378 sysc: system-controller@e61800 389 sysc: system-controller@e6180000 {
379 compatible = "renesas, 390 compatible = "renesas,r8a77990-sysc";
380 reg = <0 0xe6180000 0 391 reg = <0 0xe6180000 0 0x0400>;
381 #power-domain-cells = 392 #power-domain-cells = <1>;
382 }; 393 };
383 394
384 thermal: thermal@e6190000 { 395 thermal: thermal@e6190000 {
385 compatible = "renesas, 396 compatible = "renesas,thermal-r8a77990";
386 reg = <0 0xe6190000 0 397 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
387 interrupts = <GIC_SPI 398 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
388 <GIC_SPI 399 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
389 <GIC_SPI 400 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
390 clocks = <&cpg CPG_MOD 401 clocks = <&cpg CPG_MOD 522>;
391 power-domains = <&sysc 402 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
392 resets = <&cpg 522>; 403 resets = <&cpg 522>;
393 #thermal-sensor-cells 404 #thermal-sensor-cells = <0>;
394 }; 405 };
395 406
396 intc_ex: interrupt-controller@ 407 intc_ex: interrupt-controller@e61c0000 {
397 compatible = "renesas, 408 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
398 #interrupt-cells = <2> 409 #interrupt-cells = <2>;
399 interrupt-controller; 410 interrupt-controller;
400 reg = <0 0xe61c0000 0 411 reg = <0 0xe61c0000 0 0x200>;
401 interrupts = <GIC_SPI 412 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
402 <GIC_SPI 413 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
403 <GIC_SPI 414 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
404 <GIC_SPI 415 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
405 <GIC_SPI 416 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
406 <GIC_SPI 417 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 418 clocks = <&cpg CPG_MOD 407>;
408 power-domains = <&sysc 419 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
409 resets = <&cpg 407>; 420 resets = <&cpg 407>;
410 }; 421 };
411 422
412 tmu0: timer@e61e0000 { <<
413 compatible = "renesas, <<
414 reg = <0 0xe61e0000 0 <<
415 interrupts = <GIC_SPI <<
416 <GIC_SPI <<
417 <GIC_SPI <<
418 interrupt-names = "tun <<
419 clocks = <&cpg CPG_MOD <<
420 clock-names = "fck"; <<
421 power-domains = <&sysc <<
422 resets = <&cpg 125>; <<
423 status = "disabled"; <<
424 }; <<
425 <<
426 tmu1: timer@e6fc0000 { <<
427 compatible = "renesas, <<
428 reg = <0 0xe6fc0000 0 <<
429 interrupts = <GIC_SPI <<
430 <GIC_SPI <<
431 <GIC_SPI <<
432 <GIC_SPI <<
433 interrupt-names = "tun <<
434 clocks = <&cpg CPG_MOD <<
435 clock-names = "fck"; <<
436 power-domains = <&sysc <<
437 resets = <&cpg 124>; <<
438 status = "disabled"; <<
439 }; <<
440 <<
441 tmu2: timer@e6fd0000 { <<
442 compatible = "renesas, <<
443 reg = <0 0xe6fd0000 0 <<
444 interrupts = <GIC_SPI <<
445 <GIC_SPI <<
446 <GIC_SPI <<
447 <GIC_SPI <<
448 interrupt-names = "tun <<
449 clocks = <&cpg CPG_MOD <<
450 clock-names = "fck"; <<
451 power-domains = <&sysc <<
452 resets = <&cpg 123>; <<
453 status = "disabled"; <<
454 }; <<
455 <<
456 tmu3: timer@e6fe0000 { <<
457 compatible = "renesas, <<
458 reg = <0 0xe6fe0000 0 <<
459 interrupts = <GIC_SPI <<
460 <GIC_SPI <<
461 <GIC_SPI <<
462 interrupt-names = "tun <<
463 clocks = <&cpg CPG_MOD <<
464 clock-names = "fck"; <<
465 power-domains = <&sysc <<
466 resets = <&cpg 122>; <<
467 status = "disabled"; <<
468 }; <<
469 <<
470 tmu4: timer@ffc00000 { <<
471 compatible = "renesas, <<
472 reg = <0 0xffc00000 0 <<
473 interrupts = <GIC_SPI <<
474 <GIC_SPI <<
475 <GIC_SPI <<
476 interrupt-names = "tun <<
477 clocks = <&cpg CPG_MOD <<
478 clock-names = "fck"; <<
479 power-domains = <&sysc <<
480 resets = <&cpg 121>; <<
481 status = "disabled"; <<
482 }; <<
483 <<
484 i2c0: i2c@e6500000 { 423 i2c0: i2c@e6500000 {
485 #address-cells = <1>; 424 #address-cells = <1>;
486 #size-cells = <0>; 425 #size-cells = <0>;
487 compatible = "renesas, 426 compatible = "renesas,i2c-r8a77990",
488 "renesas, 427 "renesas,rcar-gen3-i2c";
489 reg = <0 0xe6500000 0 428 reg = <0 0xe6500000 0 0x40>;
490 interrupts = <GIC_SPI 429 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&cpg CPG_MOD 430 clocks = <&cpg CPG_MOD 931>;
492 power-domains = <&sysc 431 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
493 resets = <&cpg 931>; 432 resets = <&cpg 931>;
494 dmas = <&dmac1 0x91>, 433 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
495 <&dmac2 0x91>, 434 <&dmac2 0x91>, <&dmac2 0x90>;
496 dma-names = "tx", "rx" 435 dma-names = "tx", "rx", "tx", "rx";
497 i2c-scl-internal-delay 436 i2c-scl-internal-delay-ns = <110>;
498 status = "disabled"; 437 status = "disabled";
499 }; 438 };
500 439
501 i2c1: i2c@e6508000 { 440 i2c1: i2c@e6508000 {
502 #address-cells = <1>; 441 #address-cells = <1>;
503 #size-cells = <0>; 442 #size-cells = <0>;
504 compatible = "renesas, 443 compatible = "renesas,i2c-r8a77990",
505 "renesas, 444 "renesas,rcar-gen3-i2c";
506 reg = <0 0xe6508000 0 445 reg = <0 0xe6508000 0 0x40>;
507 interrupts = <GIC_SPI 446 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 447 clocks = <&cpg CPG_MOD 930>;
509 power-domains = <&sysc 448 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
510 resets = <&cpg 930>; 449 resets = <&cpg 930>;
511 dmas = <&dmac1 0x93>, 450 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
512 <&dmac2 0x93>, 451 <&dmac2 0x93>, <&dmac2 0x92>;
513 dma-names = "tx", "rx" 452 dma-names = "tx", "rx", "tx", "rx";
514 i2c-scl-internal-delay 453 i2c-scl-internal-delay-ns = <6>;
515 status = "disabled"; 454 status = "disabled";
516 }; 455 };
517 456
518 i2c2: i2c@e6510000 { 457 i2c2: i2c@e6510000 {
519 #address-cells = <1>; 458 #address-cells = <1>;
520 #size-cells = <0>; 459 #size-cells = <0>;
521 compatible = "renesas, 460 compatible = "renesas,i2c-r8a77990",
522 "renesas, 461 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6510000 0 462 reg = <0 0xe6510000 0 0x40>;
524 interrupts = <GIC_SPI 463 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 464 clocks = <&cpg CPG_MOD 929>;
526 power-domains = <&sysc 465 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
527 resets = <&cpg 929>; 466 resets = <&cpg 929>;
528 dmas = <&dmac1 0x95>, 467 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
529 <&dmac2 0x95>, 468 <&dmac2 0x95>, <&dmac2 0x94>;
530 dma-names = "tx", "rx" 469 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 470 i2c-scl-internal-delay-ns = <6>;
532 status = "disabled"; 471 status = "disabled";
533 }; 472 };
534 473
535 i2c3: i2c@e66d0000 { 474 i2c3: i2c@e66d0000 {
536 #address-cells = <1>; 475 #address-cells = <1>;
537 #size-cells = <0>; 476 #size-cells = <0>;
538 compatible = "renesas, 477 compatible = "renesas,i2c-r8a77990",
539 "renesas, 478 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe66d0000 0 479 reg = <0 0xe66d0000 0 0x40>;
541 interrupts = <GIC_SPI 480 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 481 clocks = <&cpg CPG_MOD 928>;
543 power-domains = <&sysc 482 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
544 resets = <&cpg 928>; 483 resets = <&cpg 928>;
545 dmas = <&dmac0 0x97>, 484 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
546 dma-names = "tx", "rx" 485 dma-names = "tx", "rx";
547 i2c-scl-internal-delay 486 i2c-scl-internal-delay-ns = <110>;
548 status = "disabled"; 487 status = "disabled";
549 }; 488 };
550 489
551 i2c4: i2c@e66d8000 { 490 i2c4: i2c@e66d8000 {
552 #address-cells = <1>; 491 #address-cells = <1>;
553 #size-cells = <0>; 492 #size-cells = <0>;
554 compatible = "renesas, 493 compatible = "renesas,i2c-r8a77990",
555 "renesas, 494 "renesas,rcar-gen3-i2c";
556 reg = <0 0xe66d8000 0 495 reg = <0 0xe66d8000 0 0x40>;
557 interrupts = <GIC_SPI 496 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 497 clocks = <&cpg CPG_MOD 927>;
559 power-domains = <&sysc 498 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
560 resets = <&cpg 927>; 499 resets = <&cpg 927>;
561 dmas = <&dmac0 0x99>, 500 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
562 dma-names = "tx", "rx" 501 dma-names = "tx", "rx";
563 i2c-scl-internal-delay 502 i2c-scl-internal-delay-ns = <6>;
564 status = "disabled"; 503 status = "disabled";
565 }; 504 };
566 505
567 i2c5: i2c@e66e0000 { 506 i2c5: i2c@e66e0000 {
568 #address-cells = <1>; 507 #address-cells = <1>;
569 #size-cells = <0>; 508 #size-cells = <0>;
570 compatible = "renesas, 509 compatible = "renesas,i2c-r8a77990",
571 "renesas, 510 "renesas,rcar-gen3-i2c";
572 reg = <0 0xe66e0000 0 511 reg = <0 0xe66e0000 0 0x40>;
573 interrupts = <GIC_SPI 512 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&cpg CPG_MOD 513 clocks = <&cpg CPG_MOD 919>;
575 power-domains = <&sysc 514 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
576 resets = <&cpg 919>; 515 resets = <&cpg 919>;
577 dmas = <&dmac0 0x9b>, 516 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
578 dma-names = "tx", "rx" 517 dma-names = "tx", "rx";
579 i2c-scl-internal-delay 518 i2c-scl-internal-delay-ns = <6>;
580 status = "disabled"; 519 status = "disabled";
581 }; 520 };
582 521
583 i2c6: i2c@e66e8000 { 522 i2c6: i2c@e66e8000 {
584 #address-cells = <1>; 523 #address-cells = <1>;
585 #size-cells = <0>; 524 #size-cells = <0>;
586 compatible = "renesas, 525 compatible = "renesas,i2c-r8a77990",
587 "renesas, 526 "renesas,rcar-gen3-i2c";
588 reg = <0 0xe66e8000 0 527 reg = <0 0xe66e8000 0 0x40>;
589 interrupts = <GIC_SPI 528 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&cpg CPG_MOD 529 clocks = <&cpg CPG_MOD 918>;
591 power-domains = <&sysc 530 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
592 resets = <&cpg 918>; 531 resets = <&cpg 918>;
593 dmas = <&dmac0 0x9d>, 532 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
594 dma-names = "tx", "rx" 533 dma-names = "tx", "rx";
595 i2c-scl-internal-delay 534 i2c-scl-internal-delay-ns = <6>;
596 status = "disabled"; 535 status = "disabled";
597 }; 536 };
598 537
599 i2c7: i2c@e6690000 { 538 i2c7: i2c@e6690000 {
600 #address-cells = <1>; 539 #address-cells = <1>;
601 #size-cells = <0>; 540 #size-cells = <0>;
602 compatible = "renesas, 541 compatible = "renesas,i2c-r8a77990",
603 "renesas, 542 "renesas,rcar-gen3-i2c";
604 reg = <0 0xe6690000 0 543 reg = <0 0xe6690000 0 0x40>;
605 interrupts = <GIC_SPI 544 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&cpg CPG_MOD 545 clocks = <&cpg CPG_MOD 1003>;
607 power-domains = <&sysc 546 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
608 resets = <&cpg 1003>; 547 resets = <&cpg 1003>;
609 i2c-scl-internal-delay 548 i2c-scl-internal-delay-ns = <6>;
610 status = "disabled"; 549 status = "disabled";
611 }; 550 };
612 551
613 hscif0: serial@e6540000 { 552 hscif0: serial@e6540000 {
614 compatible = "renesas, 553 compatible = "renesas,hscif-r8a77990",
615 "renesas, 554 "renesas,rcar-gen3-hscif",
616 "renesas, 555 "renesas,hscif";
617 reg = <0 0xe6540000 0 556 reg = <0 0xe6540000 0 0x60>;
618 interrupts = <GIC_SPI 557 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&cpg CPG_MOD 558 clocks = <&cpg CPG_MOD 520>,
620 <&cpg CPG_COR 559 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
621 <&scif_clk>; 560 <&scif_clk>;
622 clock-names = "fck", " 561 clock-names = "fck", "brg_int", "scif_clk";
623 dmas = <&dmac1 0x31>, 562 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
624 <&dmac2 0x31>, 563 <&dmac2 0x31>, <&dmac2 0x30>;
625 dma-names = "tx", "rx" 564 dma-names = "tx", "rx", "tx", "rx";
626 power-domains = <&sysc 565 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
627 resets = <&cpg 520>; 566 resets = <&cpg 520>;
628 status = "disabled"; 567 status = "disabled";
629 }; 568 };
630 569
631 hscif1: serial@e6550000 { 570 hscif1: serial@e6550000 {
632 compatible = "renesas, 571 compatible = "renesas,hscif-r8a77990",
633 "renesas, 572 "renesas,rcar-gen3-hscif",
634 "renesas, 573 "renesas,hscif";
635 reg = <0 0xe6550000 0 574 reg = <0 0xe6550000 0 0x60>;
636 interrupts = <GIC_SPI 575 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&cpg CPG_MOD 576 clocks = <&cpg CPG_MOD 519>,
638 <&cpg CPG_COR 577 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
639 <&scif_clk>; 578 <&scif_clk>;
640 clock-names = "fck", " 579 clock-names = "fck", "brg_int", "scif_clk";
641 dmas = <&dmac1 0x33>, 580 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
642 <&dmac2 0x33>, 581 <&dmac2 0x33>, <&dmac2 0x32>;
643 dma-names = "tx", "rx" 582 dma-names = "tx", "rx", "tx", "rx";
644 power-domains = <&sysc 583 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
645 resets = <&cpg 519>; 584 resets = <&cpg 519>;
646 status = "disabled"; 585 status = "disabled";
647 }; 586 };
648 587
649 hscif2: serial@e6560000 { 588 hscif2: serial@e6560000 {
650 compatible = "renesas, 589 compatible = "renesas,hscif-r8a77990",
651 "renesas, 590 "renesas,rcar-gen3-hscif",
652 "renesas, 591 "renesas,hscif";
653 reg = <0 0xe6560000 0 592 reg = <0 0xe6560000 0 0x60>;
654 interrupts = <GIC_SPI 593 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 594 clocks = <&cpg CPG_MOD 518>,
656 <&cpg CPG_COR 595 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
657 <&scif_clk>; 596 <&scif_clk>;
658 clock-names = "fck", " 597 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x35>, 598 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
660 <&dmac2 0x35>, 599 <&dmac2 0x35>, <&dmac2 0x34>;
661 dma-names = "tx", "rx" 600 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 601 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
663 resets = <&cpg 518>; 602 resets = <&cpg 518>;
664 status = "disabled"; 603 status = "disabled";
665 }; 604 };
666 605
667 hscif3: serial@e66a0000 { 606 hscif3: serial@e66a0000 {
668 compatible = "renesas, 607 compatible = "renesas,hscif-r8a77990",
669 "renesas, 608 "renesas,rcar-gen3-hscif",
670 "renesas, 609 "renesas,hscif";
671 reg = <0 0xe66a0000 0 610 reg = <0 0xe66a0000 0 0x60>;
672 interrupts = <GIC_SPI 611 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 612 clocks = <&cpg CPG_MOD 517>,
674 <&cpg CPG_COR 613 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
675 <&scif_clk>; 614 <&scif_clk>;
676 clock-names = "fck", " 615 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac0 0x37>, 616 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
678 dma-names = "tx", "rx" 617 dma-names = "tx", "rx";
679 power-domains = <&sysc 618 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
680 resets = <&cpg 517>; 619 resets = <&cpg 517>;
681 status = "disabled"; 620 status = "disabled";
682 }; 621 };
683 622
684 hscif4: serial@e66b0000 { 623 hscif4: serial@e66b0000 {
685 compatible = "renesas, 624 compatible = "renesas,hscif-r8a77990",
686 "renesas, 625 "renesas,rcar-gen3-hscif",
687 "renesas, 626 "renesas,hscif";
688 reg = <0 0xe66b0000 0 627 reg = <0 0xe66b0000 0 0x60>;
689 interrupts = <GIC_SPI 628 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&cpg CPG_MOD 629 clocks = <&cpg CPG_MOD 516>,
691 <&cpg CPG_COR 630 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
692 <&scif_clk>; 631 <&scif_clk>;
693 clock-names = "fck", " 632 clock-names = "fck", "brg_int", "scif_clk";
694 dmas = <&dmac0 0x39>, 633 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
695 dma-names = "tx", "rx" 634 dma-names = "tx", "rx";
696 power-domains = <&sysc 635 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
697 resets = <&cpg 516>; 636 resets = <&cpg 516>;
698 status = "disabled"; 637 status = "disabled";
699 }; 638 };
700 639
701 hsusb: usb@e6590000 { 640 hsusb: usb@e6590000 {
702 compatible = "renesas, 641 compatible = "renesas,usbhs-r8a77990",
703 "renesas, 642 "renesas,rcar-gen3-usbhs";
704 reg = <0 0xe6590000 0 643 reg = <0 0xe6590000 0 0x200>;
705 interrupts = <GIC_SPI 644 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
706 clocks = <&cpg CPG_MOD 645 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
707 dmas = <&usb_dmac0 0>, 646 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
708 <&usb_dmac1 0>, 647 <&usb_dmac1 0>, <&usb_dmac1 1>;
709 dma-names = "ch0", "ch 648 dma-names = "ch0", "ch1", "ch2", "ch3";
710 renesas,buswait = <11> 649 renesas,buswait = <11>;
711 phys = <&usb2_phy0 3>; 650 phys = <&usb2_phy0 3>;
712 phy-names = "usb"; 651 phy-names = "usb";
713 power-domains = <&sysc 652 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
714 resets = <&cpg 704>, < 653 resets = <&cpg 704>, <&cpg 703>;
715 status = "disabled"; 654 status = "disabled";
716 }; 655 };
717 656
718 usb_dmac0: dma-controller@e65a 657 usb_dmac0: dma-controller@e65a0000 {
719 compatible = "renesas, 658 compatible = "renesas,r8a77990-usb-dmac",
720 "renesas, 659 "renesas,usb-dmac";
721 reg = <0 0xe65a0000 0 660 reg = <0 0xe65a0000 0 0x100>;
722 interrupts = <GIC_SPI 661 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
723 <GIC_SPI 662 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
724 interrupt-names = "ch0 663 interrupt-names = "ch0", "ch1";
725 clocks = <&cpg CPG_MOD 664 clocks = <&cpg CPG_MOD 330>;
726 power-domains = <&sysc 665 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
727 resets = <&cpg 330>; 666 resets = <&cpg 330>;
728 #dma-cells = <1>; 667 #dma-cells = <1>;
729 dma-channels = <2>; 668 dma-channels = <2>;
730 }; 669 };
731 670
732 usb_dmac1: dma-controller@e65b 671 usb_dmac1: dma-controller@e65b0000 {
733 compatible = "renesas, 672 compatible = "renesas,r8a77990-usb-dmac",
734 "renesas, 673 "renesas,usb-dmac";
735 reg = <0 0xe65b0000 0 674 reg = <0 0xe65b0000 0 0x100>;
736 interrupts = <GIC_SPI 675 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
737 <GIC_SPI 676 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
738 interrupt-names = "ch0 677 interrupt-names = "ch0", "ch1";
739 clocks = <&cpg CPG_MOD 678 clocks = <&cpg CPG_MOD 331>;
740 power-domains = <&sysc 679 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
741 resets = <&cpg 331>; 680 resets = <&cpg 331>;
742 #dma-cells = <1>; 681 #dma-cells = <1>;
743 dma-channels = <2>; 682 dma-channels = <2>;
744 }; 683 };
745 684
746 arm_cc630p: crypto@e6601000 { 685 arm_cc630p: crypto@e6601000 {
747 compatible = "arm,cryp 686 compatible = "arm,cryptocell-630p-ree";
748 interrupts = <GIC_SPI 687 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
749 reg = <0x0 0xe6601000 688 reg = <0x0 0xe6601000 0 0x1000>;
750 clocks = <&cpg CPG_MOD 689 clocks = <&cpg CPG_MOD 229>;
751 resets = <&cpg 229>; 690 resets = <&cpg 229>;
752 power-domains = <&sysc 691 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
753 }; 692 };
754 693
755 dmac0: dma-controller@e6700000 694 dmac0: dma-controller@e6700000 {
756 compatible = "renesas, 695 compatible = "renesas,dmac-r8a77990",
757 "renesas, 696 "renesas,rcar-dmac";
758 reg = <0 0xe6700000 0 697 reg = <0 0xe6700000 0 0x10000>;
759 interrupts = <GIC_SPI 698 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 699 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 700 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 701 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
763 <GIC_SPI 702 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
764 <GIC_SPI 703 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
765 <GIC_SPI 704 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
766 <GIC_SPI 705 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
767 <GIC_SPI 706 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
768 <GIC_SPI 707 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
769 <GIC_SPI 708 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 709 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_SPI 710 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
772 <GIC_SPI 711 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 712 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
774 <GIC_SPI 713 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
775 <GIC_SPI 714 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
776 interrupt-names = "err 715 interrupt-names = "error",
777 "ch0", 716 "ch0", "ch1", "ch2", "ch3",
778 "ch4", 717 "ch4", "ch5", "ch6", "ch7",
779 "ch8", 718 "ch8", "ch9", "ch10", "ch11",
780 "ch12" 719 "ch12", "ch13", "ch14", "ch15";
781 clocks = <&cpg CPG_MOD 720 clocks = <&cpg CPG_MOD 219>;
782 clock-names = "fck"; 721 clock-names = "fck";
783 power-domains = <&sysc 722 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
784 resets = <&cpg 219>; 723 resets = <&cpg 219>;
785 #dma-cells = <1>; 724 #dma-cells = <1>;
786 dma-channels = <16>; 725 dma-channels = <16>;
787 iommus = <&ipmmu_ds0 0 726 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
788 <&ipmmu_ds0 2>, 727 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
789 <&ipmmu_ds0 4>, 728 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
790 <&ipmmu_ds0 6>, 729 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
791 <&ipmmu_ds0 8>, 730 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
792 <&ipmmu_ds0 10> 731 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
793 <&ipmmu_ds0 12> 732 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
794 <&ipmmu_ds0 14> 733 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
795 }; 734 };
796 735
797 dmac1: dma-controller@e7300000 736 dmac1: dma-controller@e7300000 {
798 compatible = "renesas, 737 compatible = "renesas,dmac-r8a77990",
799 "renesas, 738 "renesas,rcar-dmac";
800 reg = <0 0xe7300000 0 739 reg = <0 0xe7300000 0 0x10000>;
801 interrupts = <GIC_SPI 740 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 741 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 742 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 743 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 744 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 745 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
807 <GIC_SPI 746 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
808 <GIC_SPI 747 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 748 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 749 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 750 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 751 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 752 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 753 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 754 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 755 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 756 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
818 interrupt-names = "err 757 interrupt-names = "error",
819 "ch0", 758 "ch0", "ch1", "ch2", "ch3",
820 "ch4", 759 "ch4", "ch5", "ch6", "ch7",
821 "ch8", 760 "ch8", "ch9", "ch10", "ch11",
822 "ch12" 761 "ch12", "ch13", "ch14", "ch15";
823 clocks = <&cpg CPG_MOD 762 clocks = <&cpg CPG_MOD 218>;
824 clock-names = "fck"; 763 clock-names = "fck";
825 power-domains = <&sysc 764 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
826 resets = <&cpg 218>; 765 resets = <&cpg 218>;
827 #dma-cells = <1>; 766 #dma-cells = <1>;
828 dma-channels = <16>; 767 dma-channels = <16>;
829 iommus = <&ipmmu_ds1 0 768 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
830 <&ipmmu_ds1 2>, 769 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
831 <&ipmmu_ds1 4>, 770 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
832 <&ipmmu_ds1 6>, 771 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
833 <&ipmmu_ds1 8>, 772 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
834 <&ipmmu_ds1 10> 773 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
835 <&ipmmu_ds1 12> 774 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
836 <&ipmmu_ds1 14> 775 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
837 }; 776 };
838 777
839 dmac2: dma-controller@e7310000 778 dmac2: dma-controller@e7310000 {
840 compatible = "renesas, 779 compatible = "renesas,dmac-r8a77990",
841 "renesas, 780 "renesas,rcar-dmac";
842 reg = <0 0xe7310000 0 781 reg = <0 0xe7310000 0 0x10000>;
843 interrupts = <GIC_SPI 782 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
844 <GIC_SPI 783 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 784 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
846 <GIC_SPI 785 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
847 <GIC_SPI 786 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 787 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
849 <GIC_SPI 788 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
850 <GIC_SPI 789 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 790 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 791 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 792 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 793 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 794 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 795 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 796 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 797 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 798 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
860 interrupt-names = "err 799 interrupt-names = "error",
861 "ch0", 800 "ch0", "ch1", "ch2", "ch3",
862 "ch4", 801 "ch4", "ch5", "ch6", "ch7",
863 "ch8", 802 "ch8", "ch9", "ch10", "ch11",
864 "ch12" 803 "ch12", "ch13", "ch14", "ch15";
865 clocks = <&cpg CPG_MOD 804 clocks = <&cpg CPG_MOD 217>;
866 clock-names = "fck"; 805 clock-names = "fck";
867 power-domains = <&sysc 806 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
868 resets = <&cpg 217>; 807 resets = <&cpg 217>;
869 #dma-cells = <1>; 808 #dma-cells = <1>;
870 dma-channels = <16>; 809 dma-channels = <16>;
871 iommus = <&ipmmu_ds1 1 810 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
872 <&ipmmu_ds1 18> 811 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
873 <&ipmmu_ds1 20> 812 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
874 <&ipmmu_ds1 22> 813 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
875 <&ipmmu_ds1 24> 814 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
876 <&ipmmu_ds1 26> 815 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
877 <&ipmmu_ds1 28> 816 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
878 <&ipmmu_ds1 30> 817 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
879 }; 818 };
880 819
881 ipmmu_ds0: iommu@e6740000 { 820 ipmmu_ds0: iommu@e6740000 {
882 compatible = "renesas, 821 compatible = "renesas,ipmmu-r8a77990";
883 reg = <0 0xe6740000 0 822 reg = <0 0xe6740000 0 0x1000>;
884 renesas,ipmmu-main = < 823 renesas,ipmmu-main = <&ipmmu_mm 0>;
885 power-domains = <&sysc 824 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
886 #iommu-cells = <1>; 825 #iommu-cells = <1>;
887 }; 826 };
888 827
889 ipmmu_ds1: iommu@e7740000 { 828 ipmmu_ds1: iommu@e7740000 {
890 compatible = "renesas, 829 compatible = "renesas,ipmmu-r8a77990";
891 reg = <0 0xe7740000 0 830 reg = <0 0xe7740000 0 0x1000>;
892 renesas,ipmmu-main = < 831 renesas,ipmmu-main = <&ipmmu_mm 1>;
893 power-domains = <&sysc 832 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
894 #iommu-cells = <1>; 833 #iommu-cells = <1>;
895 }; 834 };
896 835
897 ipmmu_hc: iommu@e6570000 { 836 ipmmu_hc: iommu@e6570000 {
898 compatible = "renesas, 837 compatible = "renesas,ipmmu-r8a77990";
899 reg = <0 0xe6570000 0 838 reg = <0 0xe6570000 0 0x1000>;
900 renesas,ipmmu-main = < 839 renesas,ipmmu-main = <&ipmmu_mm 2>;
901 power-domains = <&sysc 840 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
902 #iommu-cells = <1>; 841 #iommu-cells = <1>;
903 }; 842 };
904 843
905 ipmmu_mm: iommu@e67b0000 { 844 ipmmu_mm: iommu@e67b0000 {
906 compatible = "renesas, 845 compatible = "renesas,ipmmu-r8a77990";
907 reg = <0 0xe67b0000 0 846 reg = <0 0xe67b0000 0 0x1000>;
908 interrupts = <GIC_SPI 847 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
909 <GIC_SPI 848 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
910 power-domains = <&sysc 849 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
911 #iommu-cells = <1>; 850 #iommu-cells = <1>;
912 }; 851 };
913 852
914 ipmmu_mp: iommu@ec670000 { 853 ipmmu_mp: iommu@ec670000 {
915 compatible = "renesas, 854 compatible = "renesas,ipmmu-r8a77990";
916 reg = <0 0xec670000 0 855 reg = <0 0xec670000 0 0x1000>;
917 renesas,ipmmu-main = < 856 renesas,ipmmu-main = <&ipmmu_mm 4>;
918 power-domains = <&sysc 857 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
919 #iommu-cells = <1>; 858 #iommu-cells = <1>;
920 }; 859 };
921 860
922 ipmmu_pv0: iommu@fd800000 { 861 ipmmu_pv0: iommu@fd800000 {
923 compatible = "renesas, 862 compatible = "renesas,ipmmu-r8a77990";
924 reg = <0 0xfd800000 0 863 reg = <0 0xfd800000 0 0x1000>;
925 renesas,ipmmu-main = < 864 renesas,ipmmu-main = <&ipmmu_mm 6>;
926 power-domains = <&sysc 865 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
927 #iommu-cells = <1>; 866 #iommu-cells = <1>;
928 }; 867 };
929 868
930 ipmmu_rt: iommu@ffc80000 { 869 ipmmu_rt: iommu@ffc80000 {
931 compatible = "renesas, 870 compatible = "renesas,ipmmu-r8a77990";
932 reg = <0 0xffc80000 0 871 reg = <0 0xffc80000 0 0x1000>;
933 renesas,ipmmu-main = < 872 renesas,ipmmu-main = <&ipmmu_mm 10>;
934 power-domains = <&sysc 873 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 874 #iommu-cells = <1>;
936 }; 875 };
937 876
938 ipmmu_vc0: iommu@fe6b0000 { 877 ipmmu_vc0: iommu@fe6b0000 {
939 compatible = "renesas, 878 compatible = "renesas,ipmmu-r8a77990";
940 reg = <0 0xfe6b0000 0 879 reg = <0 0xfe6b0000 0 0x1000>;
941 renesas,ipmmu-main = < 880 renesas,ipmmu-main = <&ipmmu_mm 12>;
942 power-domains = <&sysc 881 power-domains = <&sysc R8A77990_PD_A3VC>;
943 #iommu-cells = <1>; 882 #iommu-cells = <1>;
944 }; 883 };
945 884
946 ipmmu_vi0: iommu@febd0000 { 885 ipmmu_vi0: iommu@febd0000 {
947 compatible = "renesas, 886 compatible = "renesas,ipmmu-r8a77990";
948 reg = <0 0xfebd0000 0 887 reg = <0 0xfebd0000 0 0x1000>;
949 renesas,ipmmu-main = < 888 renesas,ipmmu-main = <&ipmmu_mm 14>;
950 power-domains = <&sysc 889 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 890 #iommu-cells = <1>;
952 }; 891 };
953 892
954 ipmmu_vp0: iommu@fe990000 { 893 ipmmu_vp0: iommu@fe990000 {
955 compatible = "renesas, 894 compatible = "renesas,ipmmu-r8a77990";
956 reg = <0 0xfe990000 0 895 reg = <0 0xfe990000 0 0x1000>;
957 renesas,ipmmu-main = < 896 renesas,ipmmu-main = <&ipmmu_mm 16>;
958 power-domains = <&sysc 897 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
959 #iommu-cells = <1>; 898 #iommu-cells = <1>;
960 }; 899 };
961 900
962 avb: ethernet@e6800000 { 901 avb: ethernet@e6800000 {
963 compatible = "renesas, 902 compatible = "renesas,etheravb-r8a77990",
964 "renesas, 903 "renesas,etheravb-rcar-gen3";
965 reg = <0 0xe6800000 0 904 reg = <0 0xe6800000 0 0x800>;
966 interrupts = <GIC_SPI 905 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 906 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 907 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 908 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 909 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 910 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 911 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
973 <GIC_SPI 912 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
974 <GIC_SPI 913 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 914 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 915 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
977 <GIC_SPI 916 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
978 <GIC_SPI 917 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
979 <GIC_SPI 918 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
980 <GIC_SPI 919 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
981 <GIC_SPI 920 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
982 <GIC_SPI 921 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
983 <GIC_SPI 922 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
984 <GIC_SPI 923 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
985 <GIC_SPI 924 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
986 <GIC_SPI 925 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
987 <GIC_SPI 926 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
988 <GIC_SPI 927 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
989 <GIC_SPI 928 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
990 <GIC_SPI 929 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
991 interrupt-names = "ch0 930 interrupt-names = "ch0", "ch1", "ch2", "ch3",
992 "ch4 931 "ch4", "ch5", "ch6", "ch7",
993 "ch8 932 "ch8", "ch9", "ch10", "ch11",
994 "ch1 933 "ch12", "ch13", "ch14", "ch15",
995 "ch1 934 "ch16", "ch17", "ch18", "ch19",
996 "ch2 935 "ch20", "ch21", "ch22", "ch23",
997 "ch2 936 "ch24";
998 clocks = <&cpg CPG_MOD 937 clocks = <&cpg CPG_MOD 812>;
999 clock-names = "fck"; <<
1000 power-domains = <&sys 938 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1001 resets = <&cpg 812>; 939 resets = <&cpg 812>;
1002 phy-mode = "rgmii"; 940 phy-mode = "rgmii";
1003 rx-internal-delay-ps <<
1004 iommus = <&ipmmu_ds0 941 iommus = <&ipmmu_ds0 16>;
1005 #address-cells = <1>; 942 #address-cells = <1>;
1006 #size-cells = <0>; 943 #size-cells = <0>;
1007 status = "disabled"; 944 status = "disabled";
1008 }; 945 };
1009 946
1010 can0: can@e6c30000 { 947 can0: can@e6c30000 {
1011 compatible = "renesas 948 compatible = "renesas,can-r8a77990",
1012 "renesas 949 "renesas,rcar-gen3-can";
1013 reg = <0 0xe6c30000 0 950 reg = <0 0xe6c30000 0 0x1000>;
1014 interrupts = <GIC_SPI 951 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1015 clocks = <&cpg CPG_MO 952 clocks = <&cpg CPG_MOD 916>,
1016 <&cpg CPG_CORE 953 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1017 <&can_clk>; 954 <&can_clk>;
1018 clock-names = "clkp1" 955 clock-names = "clkp1", "clkp2", "can_clk";
1019 assigned-clocks = <&c 956 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1020 assigned-clock-rates 957 assigned-clock-rates = <40000000>;
1021 power-domains = <&sys 958 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1022 resets = <&cpg 916>; 959 resets = <&cpg 916>;
1023 status = "disabled"; 960 status = "disabled";
1024 }; 961 };
1025 962
1026 can1: can@e6c38000 { 963 can1: can@e6c38000 {
1027 compatible = "renesas 964 compatible = "renesas,can-r8a77990",
1028 "renesas 965 "renesas,rcar-gen3-can";
1029 reg = <0 0xe6c38000 0 966 reg = <0 0xe6c38000 0 0x1000>;
1030 interrupts = <GIC_SPI 967 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&cpg CPG_MO 968 clocks = <&cpg CPG_MOD 915>,
1032 <&cpg CPG_CORE 969 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1033 <&can_clk>; 970 <&can_clk>;
1034 clock-names = "clkp1" 971 clock-names = "clkp1", "clkp2", "can_clk";
1035 assigned-clocks = <&c 972 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1036 assigned-clock-rates 973 assigned-clock-rates = <40000000>;
1037 power-domains = <&sys 974 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1038 resets = <&cpg 915>; 975 resets = <&cpg 915>;
1039 status = "disabled"; 976 status = "disabled";
1040 }; 977 };
1041 978
1042 canfd: can@e66c0000 { 979 canfd: can@e66c0000 {
1043 compatible = "renesas 980 compatible = "renesas,r8a77990-canfd",
1044 "renesas 981 "renesas,rcar-gen3-canfd";
1045 reg = <0 0xe66c0000 0 982 reg = <0 0xe66c0000 0 0x8000>;
1046 interrupts = <GIC_SPI 983 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1047 <GIC_SPI 3 984 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1048 interrupt-names = "ch <<
1049 clocks = <&cpg CPG_MO 985 clocks = <&cpg CPG_MOD 914>,
1050 <&cpg CPG_CORE 986 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1051 <&can_clk>; 987 <&can_clk>;
1052 clock-names = "fck", 988 clock-names = "fck", "canfd", "can_clk";
1053 assigned-clocks = <&c 989 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1054 assigned-clock-rates 990 assigned-clock-rates = <40000000>;
1055 power-domains = <&sys 991 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1056 resets = <&cpg 914>; 992 resets = <&cpg 914>;
1057 status = "disabled"; 993 status = "disabled";
1058 994
1059 channel0 { 995 channel0 {
1060 status = "dis 996 status = "disabled";
1061 }; 997 };
1062 998
1063 channel1 { 999 channel1 {
1064 status = "dis 1000 status = "disabled";
1065 }; 1001 };
1066 }; 1002 };
1067 1003
1068 pwm0: pwm@e6e30000 { 1004 pwm0: pwm@e6e30000 {
1069 compatible = "renesas 1005 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1070 reg = <0 0xe6e30000 0 1006 reg = <0 0xe6e30000 0 0x8>;
1071 clocks = <&cpg CPG_MO 1007 clocks = <&cpg CPG_MOD 523>;
1072 power-domains = <&sys 1008 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1073 resets = <&cpg 523>; 1009 resets = <&cpg 523>;
1074 #pwm-cells = <2>; 1010 #pwm-cells = <2>;
1075 status = "disabled"; 1011 status = "disabled";
1076 }; 1012 };
1077 1013
1078 pwm1: pwm@e6e31000 { 1014 pwm1: pwm@e6e31000 {
1079 compatible = "renesas 1015 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1080 reg = <0 0xe6e31000 0 1016 reg = <0 0xe6e31000 0 0x8>;
1081 clocks = <&cpg CPG_MO 1017 clocks = <&cpg CPG_MOD 523>;
1082 power-domains = <&sys 1018 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1083 resets = <&cpg 523>; 1019 resets = <&cpg 523>;
1084 #pwm-cells = <2>; 1020 #pwm-cells = <2>;
1085 status = "disabled"; 1021 status = "disabled";
1086 }; 1022 };
1087 1023
1088 pwm2: pwm@e6e32000 { 1024 pwm2: pwm@e6e32000 {
1089 compatible = "renesas 1025 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1090 reg = <0 0xe6e32000 0 1026 reg = <0 0xe6e32000 0 0x8>;
1091 clocks = <&cpg CPG_MO 1027 clocks = <&cpg CPG_MOD 523>;
1092 power-domains = <&sys 1028 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1093 resets = <&cpg 523>; 1029 resets = <&cpg 523>;
1094 #pwm-cells = <2>; 1030 #pwm-cells = <2>;
1095 status = "disabled"; 1031 status = "disabled";
1096 }; 1032 };
1097 1033
1098 pwm3: pwm@e6e33000 { 1034 pwm3: pwm@e6e33000 {
1099 compatible = "renesas 1035 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1100 reg = <0 0xe6e33000 0 1036 reg = <0 0xe6e33000 0 0x8>;
1101 clocks = <&cpg CPG_MO 1037 clocks = <&cpg CPG_MOD 523>;
1102 power-domains = <&sys 1038 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1103 resets = <&cpg 523>; 1039 resets = <&cpg 523>;
1104 #pwm-cells = <2>; 1040 #pwm-cells = <2>;
1105 status = "disabled"; 1041 status = "disabled";
1106 }; 1042 };
1107 1043
1108 pwm4: pwm@e6e34000 { 1044 pwm4: pwm@e6e34000 {
1109 compatible = "renesas 1045 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1110 reg = <0 0xe6e34000 0 1046 reg = <0 0xe6e34000 0 0x8>;
1111 clocks = <&cpg CPG_MO 1047 clocks = <&cpg CPG_MOD 523>;
1112 power-domains = <&sys 1048 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1113 resets = <&cpg 523>; 1049 resets = <&cpg 523>;
1114 #pwm-cells = <2>; 1050 #pwm-cells = <2>;
1115 status = "disabled"; 1051 status = "disabled";
1116 }; 1052 };
1117 1053
1118 pwm5: pwm@e6e35000 { 1054 pwm5: pwm@e6e35000 {
1119 compatible = "renesas 1055 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1120 reg = <0 0xe6e35000 0 1056 reg = <0 0xe6e35000 0 0x8>;
1121 clocks = <&cpg CPG_MO 1057 clocks = <&cpg CPG_MOD 523>;
1122 power-domains = <&sys 1058 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1123 resets = <&cpg 523>; 1059 resets = <&cpg 523>;
1124 #pwm-cells = <2>; 1060 #pwm-cells = <2>;
1125 status = "disabled"; 1061 status = "disabled";
1126 }; 1062 };
1127 1063
1128 pwm6: pwm@e6e36000 { 1064 pwm6: pwm@e6e36000 {
1129 compatible = "renesas 1065 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1130 reg = <0 0xe6e36000 0 1066 reg = <0 0xe6e36000 0 0x8>;
1131 clocks = <&cpg CPG_MO 1067 clocks = <&cpg CPG_MOD 523>;
1132 power-domains = <&sys 1068 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1133 resets = <&cpg 523>; 1069 resets = <&cpg 523>;
1134 #pwm-cells = <2>; 1070 #pwm-cells = <2>;
1135 status = "disabled"; 1071 status = "disabled";
1136 }; 1072 };
1137 1073
1138 scif0: serial@e6e60000 { 1074 scif0: serial@e6e60000 {
1139 compatible = "renesas 1075 compatible = "renesas,scif-r8a77990",
1140 "renesas 1076 "renesas,rcar-gen3-scif", "renesas,scif";
1141 reg = <0 0xe6e60000 0 1077 reg = <0 0xe6e60000 0 64>;
1142 interrupts = <GIC_SPI 1078 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1143 clocks = <&cpg CPG_MO 1079 clocks = <&cpg CPG_MOD 207>,
1144 <&cpg CPG_CO 1080 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1145 <&scif_clk>; 1081 <&scif_clk>;
1146 clock-names = "fck", 1082 clock-names = "fck", "brg_int", "scif_clk";
1147 dmas = <&dmac1 0x51>, 1083 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1148 <&dmac2 0x51>, 1084 <&dmac2 0x51>, <&dmac2 0x50>;
1149 dma-names = "tx", "rx 1085 dma-names = "tx", "rx", "tx", "rx";
1150 power-domains = <&sys 1086 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1151 resets = <&cpg 207>; 1087 resets = <&cpg 207>;
1152 status = "disabled"; 1088 status = "disabled";
1153 }; 1089 };
1154 1090
1155 scif1: serial@e6e68000 { 1091 scif1: serial@e6e68000 {
1156 compatible = "renesas 1092 compatible = "renesas,scif-r8a77990",
1157 "renesas 1093 "renesas,rcar-gen3-scif", "renesas,scif";
1158 reg = <0 0xe6e68000 0 1094 reg = <0 0xe6e68000 0 64>;
1159 interrupts = <GIC_SPI 1095 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1160 clocks = <&cpg CPG_MO 1096 clocks = <&cpg CPG_MOD 206>,
1161 <&cpg CPG_CO 1097 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1162 <&scif_clk>; 1098 <&scif_clk>;
1163 clock-names = "fck", 1099 clock-names = "fck", "brg_int", "scif_clk";
1164 dmas = <&dmac1 0x53>, 1100 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1165 <&dmac2 0x53>, 1101 <&dmac2 0x53>, <&dmac2 0x52>;
1166 dma-names = "tx", "rx 1102 dma-names = "tx", "rx", "tx", "rx";
1167 power-domains = <&sys 1103 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1168 resets = <&cpg 206>; 1104 resets = <&cpg 206>;
1169 status = "disabled"; 1105 status = "disabled";
1170 }; 1106 };
1171 1107
1172 scif2: serial@e6e88000 { 1108 scif2: serial@e6e88000 {
1173 compatible = "renesas 1109 compatible = "renesas,scif-r8a77990",
1174 "renesas 1110 "renesas,rcar-gen3-scif", "renesas,scif";
1175 reg = <0 0xe6e88000 0 1111 reg = <0 0xe6e88000 0 64>;
1176 interrupts = <GIC_SPI 1112 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1177 clocks = <&cpg CPG_MO 1113 clocks = <&cpg CPG_MOD 310>,
1178 <&cpg CPG_CO 1114 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1179 <&scif_clk>; 1115 <&scif_clk>;
1180 clock-names = "fck", 1116 clock-names = "fck", "brg_int", "scif_clk";
1181 dmas = <&dmac1 0x13>, 1117 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1182 <&dmac2 0x13>, 1118 <&dmac2 0x13>, <&dmac2 0x12>;
1183 dma-names = "tx", "rx 1119 dma-names = "tx", "rx", "tx", "rx";
1184 power-domains = <&sys 1120 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1185 resets = <&cpg 310>; 1121 resets = <&cpg 310>;
1186 status = "disabled"; 1122 status = "disabled";
1187 }; 1123 };
1188 1124
1189 scif3: serial@e6c50000 { 1125 scif3: serial@e6c50000 {
1190 compatible = "renesas 1126 compatible = "renesas,scif-r8a77990",
1191 "renesas 1127 "renesas,rcar-gen3-scif", "renesas,scif";
1192 reg = <0 0xe6c50000 0 1128 reg = <0 0xe6c50000 0 64>;
1193 interrupts = <GIC_SPI 1129 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1194 clocks = <&cpg CPG_MO 1130 clocks = <&cpg CPG_MOD 204>,
1195 <&cpg CPG_CO 1131 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1196 <&scif_clk>; 1132 <&scif_clk>;
1197 clock-names = "fck", 1133 clock-names = "fck", "brg_int", "scif_clk";
1198 dmas = <&dmac0 0x57>, 1134 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1199 dma-names = "tx", "rx 1135 dma-names = "tx", "rx";
1200 power-domains = <&sys 1136 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1201 resets = <&cpg 204>; 1137 resets = <&cpg 204>;
1202 status = "disabled"; 1138 status = "disabled";
1203 }; 1139 };
1204 1140
1205 scif4: serial@e6c40000 { 1141 scif4: serial@e6c40000 {
1206 compatible = "renesas 1142 compatible = "renesas,scif-r8a77990",
1207 "renesas 1143 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6c40000 0 1144 reg = <0 0xe6c40000 0 64>;
1209 interrupts = <GIC_SPI 1145 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1146 clocks = <&cpg CPG_MOD 203>,
1211 <&cpg CPG_CO 1147 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1212 <&scif_clk>; 1148 <&scif_clk>;
1213 clock-names = "fck", 1149 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac0 0x59>, 1150 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1215 dma-names = "tx", "rx 1151 dma-names = "tx", "rx";
1216 power-domains = <&sys 1152 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1217 resets = <&cpg 203>; 1153 resets = <&cpg 203>;
1218 status = "disabled"; 1154 status = "disabled";
1219 }; 1155 };
1220 1156
1221 scif5: serial@e6f30000 { 1157 scif5: serial@e6f30000 {
1222 compatible = "renesas 1158 compatible = "renesas,scif-r8a77990",
1223 "renesas 1159 "renesas,rcar-gen3-scif", "renesas,scif";
1224 reg = <0 0xe6f30000 0 1160 reg = <0 0xe6f30000 0 64>;
1225 interrupts = <GIC_SPI 1161 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1226 clocks = <&cpg CPG_MO 1162 clocks = <&cpg CPG_MOD 202>,
1227 <&cpg CPG_CO 1163 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1228 <&scif_clk>; 1164 <&scif_clk>;
1229 clock-names = "fck", 1165 clock-names = "fck", "brg_int", "scif_clk";
1230 dmas = <&dmac0 0x5b>, 1166 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1231 dma-names = "tx", "rx 1167 dma-names = "tx", "rx";
1232 power-domains = <&sys 1168 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1233 resets = <&cpg 202>; 1169 resets = <&cpg 202>;
1234 status = "disabled"; 1170 status = "disabled";
1235 }; 1171 };
1236 1172
1237 msiof0: spi@e6e90000 { 1173 msiof0: spi@e6e90000 {
1238 compatible = "renesas 1174 compatible = "renesas,msiof-r8a77990",
1239 "renesas 1175 "renesas,rcar-gen3-msiof";
1240 reg = <0 0xe6e90000 0 1176 reg = <0 0xe6e90000 0 0x0064>;
1241 interrupts = <GIC_SPI 1177 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1242 clocks = <&cpg CPG_MO 1178 clocks = <&cpg CPG_MOD 211>;
1243 dmas = <&dmac1 0x41>, 1179 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1244 <&dmac2 0x41>, 1180 <&dmac2 0x41>, <&dmac2 0x40>;
1245 dma-names = "tx", "rx 1181 dma-names = "tx", "rx", "tx", "rx";
1246 power-domains = <&sys 1182 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1247 resets = <&cpg 211>; 1183 resets = <&cpg 211>;
1248 #address-cells = <1>; 1184 #address-cells = <1>;
1249 #size-cells = <0>; 1185 #size-cells = <0>;
1250 status = "disabled"; 1186 status = "disabled";
1251 }; 1187 };
1252 1188
1253 msiof1: spi@e6ea0000 { 1189 msiof1: spi@e6ea0000 {
1254 compatible = "renesas 1190 compatible = "renesas,msiof-r8a77990",
1255 "renesas 1191 "renesas,rcar-gen3-msiof";
1256 reg = <0 0xe6ea0000 0 1192 reg = <0 0xe6ea0000 0 0x0064>;
1257 interrupts = <GIC_SPI 1193 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1258 clocks = <&cpg CPG_MO 1194 clocks = <&cpg CPG_MOD 210>;
1259 dmas = <&dmac0 0x43>, !! 1195 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1260 dma-names = "tx", "rx !! 1196 <&dmac2 0x43>, <&dmac2 0x42>;
>> 1197 dma-names = "tx", "rx", "tx", "rx";
1261 power-domains = <&sys 1198 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1262 resets = <&cpg 210>; 1199 resets = <&cpg 210>;
1263 #address-cells = <1>; 1200 #address-cells = <1>;
1264 #size-cells = <0>; 1201 #size-cells = <0>;
1265 status = "disabled"; 1202 status = "disabled";
1266 }; 1203 };
1267 1204
1268 msiof2: spi@e6c00000 { 1205 msiof2: spi@e6c00000 {
1269 compatible = "renesas 1206 compatible = "renesas,msiof-r8a77990",
1270 "renesas 1207 "renesas,rcar-gen3-msiof";
1271 reg = <0 0xe6c00000 0 1208 reg = <0 0xe6c00000 0 0x0064>;
1272 interrupts = <GIC_SPI 1209 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1273 clocks = <&cpg CPG_MO 1210 clocks = <&cpg CPG_MOD 209>;
1274 dmas = <&dmac0 0x45>, 1211 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1275 dma-names = "tx", "rx 1212 dma-names = "tx", "rx";
1276 power-domains = <&sys 1213 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1277 resets = <&cpg 209>; 1214 resets = <&cpg 209>;
1278 #address-cells = <1>; 1215 #address-cells = <1>;
1279 #size-cells = <0>; 1216 #size-cells = <0>;
1280 status = "disabled"; 1217 status = "disabled";
1281 }; 1218 };
1282 1219
1283 msiof3: spi@e6c10000 { 1220 msiof3: spi@e6c10000 {
1284 compatible = "renesas 1221 compatible = "renesas,msiof-r8a77990",
1285 "renesas 1222 "renesas,rcar-gen3-msiof";
1286 reg = <0 0xe6c10000 0 1223 reg = <0 0xe6c10000 0 0x0064>;
1287 interrupts = <GIC_SPI 1224 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1288 clocks = <&cpg CPG_MO 1225 clocks = <&cpg CPG_MOD 208>;
1289 dmas = <&dmac0 0x47>, 1226 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1290 dma-names = "tx", "rx 1227 dma-names = "tx", "rx";
1291 power-domains = <&sys 1228 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1292 resets = <&cpg 208>; 1229 resets = <&cpg 208>;
1293 #address-cells = <1>; 1230 #address-cells = <1>;
1294 #size-cells = <0>; 1231 #size-cells = <0>;
1295 status = "disabled"; 1232 status = "disabled";
1296 }; 1233 };
1297 1234
1298 vin4: video@e6ef4000 { 1235 vin4: video@e6ef4000 {
1299 compatible = "renesas 1236 compatible = "renesas,vin-r8a77990";
1300 reg = <0 0xe6ef4000 0 1237 reg = <0 0xe6ef4000 0 0x1000>;
1301 interrupts = <GIC_SPI 1238 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1302 clocks = <&cpg CPG_MO 1239 clocks = <&cpg CPG_MOD 807>;
1303 power-domains = <&sys 1240 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1304 resets = <&cpg 807>; 1241 resets = <&cpg 807>;
1305 renesas,id = <4>; 1242 renesas,id = <4>;
1306 status = "disabled"; 1243 status = "disabled";
1307 1244
1308 ports { 1245 ports {
1309 #address-cell 1246 #address-cells = <1>;
1310 #size-cells = 1247 #size-cells = <0>;
1311 1248
1312 port@1 { 1249 port@1 {
1313 #addr 1250 #address-cells = <1>;
1314 #size 1251 #size-cells = <0>;
1315 1252
1316 reg = 1253 reg = <1>;
1317 1254
1318 vin4c 1255 vin4csi40: endpoint@2 {
1319 1256 reg = <2>;
1320 !! 1257 remote-endpoint= <&csi40vin4>;
1321 }; 1258 };
1322 }; 1259 };
1323 }; 1260 };
1324 }; 1261 };
1325 1262
1326 vin5: video@e6ef5000 { 1263 vin5: video@e6ef5000 {
1327 compatible = "renesas 1264 compatible = "renesas,vin-r8a77990";
1328 reg = <0 0xe6ef5000 0 1265 reg = <0 0xe6ef5000 0 0x1000>;
1329 interrupts = <GIC_SPI 1266 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1330 clocks = <&cpg CPG_MO 1267 clocks = <&cpg CPG_MOD 806>;
1331 power-domains = <&sys 1268 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1332 resets = <&cpg 806>; 1269 resets = <&cpg 806>;
1333 renesas,id = <5>; 1270 renesas,id = <5>;
1334 status = "disabled"; 1271 status = "disabled";
1335 1272
1336 ports { 1273 ports {
1337 #address-cell 1274 #address-cells = <1>;
1338 #size-cells = 1275 #size-cells = <0>;
1339 1276
1340 port@1 { 1277 port@1 {
1341 #addr 1278 #address-cells = <1>;
1342 #size 1279 #size-cells = <0>;
1343 1280
1344 reg = 1281 reg = <1>;
1345 1282
1346 vin5c 1283 vin5csi40: endpoint@2 {
1347 1284 reg = <2>;
1348 !! 1285 remote-endpoint= <&csi40vin5>;
1349 }; 1286 };
1350 }; 1287 };
1351 }; 1288 };
1352 }; 1289 };
1353 1290
1354 drif00: rif@e6f40000 { <<
1355 compatible = "renesas <<
1356 "renesas <<
1357 reg = <0 0xe6f40000 0 <<
1358 interrupts = <GIC_SPI <<
1359 clocks = <&cpg CPG_MO <<
1360 clock-names = "fck"; <<
1361 dmas = <&dmac1 0x20>, <<
1362 dma-names = "rx", "rx <<
1363 power-domains = <&sys <<
1364 resets = <&cpg 515>; <<
1365 renesas,bonding = <&d <<
1366 status = "disabled"; <<
1367 }; <<
1368 <<
1369 drif01: rif@e6f50000 { <<
1370 compatible = "renesas <<
1371 "renesas <<
1372 reg = <0 0xe6f50000 0 <<
1373 interrupts = <GIC_SPI <<
1374 clocks = <&cpg CPG_MO <<
1375 clock-names = "fck"; <<
1376 dmas = <&dmac1 0x22>, <<
1377 dma-names = "rx", "rx <<
1378 power-domains = <&sys <<
1379 resets = <&cpg 514>; <<
1380 renesas,bonding = <&d <<
1381 status = "disabled"; <<
1382 }; <<
1383 <<
1384 drif10: rif@e6f60000 { <<
1385 compatible = "renesas <<
1386 "renesas <<
1387 reg = <0 0xe6f60000 0 <<
1388 interrupts = <GIC_SPI <<
1389 clocks = <&cpg CPG_MO <<
1390 clock-names = "fck"; <<
1391 dmas = <&dmac1 0x24>, <<
1392 dma-names = "rx", "rx <<
1393 power-domains = <&sys <<
1394 resets = <&cpg 513>; <<
1395 renesas,bonding = <&d <<
1396 status = "disabled"; <<
1397 }; <<
1398 <<
1399 drif11: rif@e6f70000 { <<
1400 compatible = "renesas <<
1401 "renesas <<
1402 reg = <0 0xe6f70000 0 <<
1403 interrupts = <GIC_SPI <<
1404 clocks = <&cpg CPG_MO <<
1405 clock-names = "fck"; <<
1406 dmas = <&dmac1 0x26>, <<
1407 dma-names = "rx", "rx <<
1408 power-domains = <&sys <<
1409 resets = <&cpg 512>; <<
1410 renesas,bonding = <&d <<
1411 status = "disabled"; <<
1412 }; <<
1413 <<
1414 drif20: rif@e6f80000 { <<
1415 compatible = "renesas <<
1416 "renesas <<
1417 reg = <0 0xe6f80000 0 <<
1418 interrupts = <GIC_SPI <<
1419 clocks = <&cpg CPG_MO <<
1420 clock-names = "fck"; <<
1421 dmas = <&dmac0 0x28>; <<
1422 dma-names = "rx"; <<
1423 power-domains = <&sys <<
1424 resets = <&cpg 511>; <<
1425 renesas,bonding = <&d <<
1426 status = "disabled"; <<
1427 }; <<
1428 <<
1429 drif21: rif@e6f90000 { <<
1430 compatible = "renesas <<
1431 "renesas <<
1432 reg = <0 0xe6f90000 0 <<
1433 interrupts = <GIC_SPI <<
1434 clocks = <&cpg CPG_MO <<
1435 clock-names = "fck"; <<
1436 dmas = <&dmac0 0x2a>; <<
1437 dma-names = "rx"; <<
1438 power-domains = <&sys <<
1439 resets = <&cpg 510>; <<
1440 renesas,bonding = <&d <<
1441 status = "disabled"; <<
1442 }; <<
1443 <<
1444 drif30: rif@e6fa0000 { <<
1445 compatible = "renesas <<
1446 "renesas <<
1447 reg = <0 0xe6fa0000 0 <<
1448 interrupts = <GIC_SPI <<
1449 clocks = <&cpg CPG_MO <<
1450 clock-names = "fck"; <<
1451 dmas = <&dmac0 0x2c>; <<
1452 dma-names = "rx"; <<
1453 power-domains = <&sys <<
1454 resets = <&cpg 509>; <<
1455 renesas,bonding = <&d <<
1456 status = "disabled"; <<
1457 }; <<
1458 <<
1459 drif31: rif@e6fb0000 { <<
1460 compatible = "renesas <<
1461 "renesas <<
1462 reg = <0 0xe6fb0000 0 <<
1463 interrupts = <GIC_SPI <<
1464 clocks = <&cpg CPG_MO <<
1465 clock-names = "fck"; <<
1466 dmas = <&dmac0 0x2e>; <<
1467 dma-names = "rx"; <<
1468 power-domains = <&sys <<
1469 resets = <&cpg 508>; <<
1470 renesas,bonding = <&d <<
1471 status = "disabled"; <<
1472 }; <<
1473 <<
1474 rcar_sound: sound@ec500000 { 1291 rcar_sound: sound@ec500000 {
1475 /* 1292 /*
1476 * #sound-dai-cells i !! 1293 * #sound-dai-cells is required
1477 * 1294 *
1478 * Single DAI : #soun 1295 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1479 * Multi DAI : #soun 1296 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1480 */ 1297 */
1481 /* 1298 /*
1482 * #clock-cells is re 1299 * #clock-cells is required for audio_clkout0/1/2/3
1483 * 1300 *
1484 * clkout : #cl 1301 * clkout : #clock-cells = <0>; <&rcar_sound>;
1485 * clkout0/1/2/3: #cl 1302 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1486 */ 1303 */
1487 compatible = "renesas !! 1304 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1488 reg = <0 0xec500000 0 !! 1305 reg = <0 0xec500000 0 0x1000>, /* SCU */
1489 <0 0xec5a0000 0 !! 1306 <0 0xec5a0000 0 0x100>, /* ADG */
1490 <0 0xec540000 0 !! 1307 <0 0xec540000 0 0x1000>, /* SSIU */
1491 <0 0xec541000 0 !! 1308 <0 0xec541000 0 0x280>, /* SSI */
1492 <0 0xec760000 0 !! 1309 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1493 reg-names = "scu", "a 1310 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1494 1311
1495 clocks = <&cpg CPG_MO 1312 clocks = <&cpg CPG_MOD 1005>,
1496 <&cpg CPG_MO 1313 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1497 <&cpg CPG_MO 1314 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1498 <&cpg CPG_MO 1315 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1499 <&cpg CPG_MO 1316 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1500 <&cpg CPG_MO 1317 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1501 <&cpg CPG_MO 1318 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1502 <&cpg CPG_MO 1319 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1503 <&cpg CPG_MO 1320 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1504 <&cpg CPG_MO 1321 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1505 <&cpg CPG_MO 1322 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1506 <&cpg CPG_MO 1323 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1507 <&cpg CPG_MO 1324 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1508 <&cpg CPG_MO 1325 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1509 <&audio_clk_ 1326 <&audio_clk_a>, <&audio_clk_b>,
1510 <&audio_clk_ 1327 <&audio_clk_c>,
1511 <&cpg CPG_MO !! 1328 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1512 clock-names = "ssi-al 1329 clock-names = "ssi-all",
1513 "ssi.9" 1330 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1514 "ssi.5" 1331 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1515 "ssi.1" 1332 "ssi.1", "ssi.0",
1516 "src.9" 1333 "src.9", "src.8", "src.7", "src.6",
1517 "src.5" 1334 "src.5", "src.4", "src.3", "src.2",
1518 "src.1" 1335 "src.1", "src.0",
1519 "mix.1" 1336 "mix.1", "mix.0",
1520 "ctu.1" 1337 "ctu.1", "ctu.0",
1521 "dvc.0" 1338 "dvc.0", "dvc.1",
1522 "clk_a" 1339 "clk_a", "clk_b", "clk_c", "clk_i";
1523 power-domains = <&sys 1340 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1524 resets = <&cpg 1005>, 1341 resets = <&cpg 1005>,
1525 <&cpg 1006>, 1342 <&cpg 1006>, <&cpg 1007>,
1526 <&cpg 1008>, 1343 <&cpg 1008>, <&cpg 1009>,
1527 <&cpg 1010>, 1344 <&cpg 1010>, <&cpg 1011>,
1528 <&cpg 1012>, 1345 <&cpg 1012>, <&cpg 1013>,
1529 <&cpg 1014>, 1346 <&cpg 1014>, <&cpg 1015>;
1530 reset-names = "ssi-al 1347 reset-names = "ssi-all",
1531 "ssi.9" 1348 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1532 "ssi.5" 1349 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1533 "ssi.1" 1350 "ssi.1", "ssi.0";
1534 status = "disabled"; 1351 status = "disabled";
1535 1352
1536 rcar_sound,ctu { 1353 rcar_sound,ctu {
1537 ctu00: ctu-0 1354 ctu00: ctu-0 { };
1538 ctu01: ctu-1 1355 ctu01: ctu-1 { };
1539 ctu02: ctu-2 1356 ctu02: ctu-2 { };
1540 ctu03: ctu-3 1357 ctu03: ctu-3 { };
1541 ctu10: ctu-4 1358 ctu10: ctu-4 { };
1542 ctu11: ctu-5 1359 ctu11: ctu-5 { };
1543 ctu12: ctu-6 1360 ctu12: ctu-6 { };
1544 ctu13: ctu-7 1361 ctu13: ctu-7 { };
1545 }; 1362 };
1546 1363
1547 rcar_sound,dvc { 1364 rcar_sound,dvc {
1548 dvc0: dvc-0 { 1365 dvc0: dvc-0 {
1549 dmas 1366 dmas = <&audma0 0xbc>;
1550 dma-n 1367 dma-names = "tx";
1551 }; 1368 };
1552 dvc1: dvc-1 { 1369 dvc1: dvc-1 {
1553 dmas 1370 dmas = <&audma0 0xbe>;
1554 dma-n 1371 dma-names = "tx";
1555 }; 1372 };
1556 }; 1373 };
1557 1374
1558 rcar_sound,mix { 1375 rcar_sound,mix {
1559 mix0: mix-0 { 1376 mix0: mix-0 { };
1560 mix1: mix-1 { 1377 mix1: mix-1 { };
1561 }; 1378 };
1562 1379
1563 rcar_sound,src { 1380 rcar_sound,src {
1564 src0: src-0 { 1381 src0: src-0 {
1565 inter 1382 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1566 dmas 1383 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1567 dma-n 1384 dma-names = "rx", "tx";
1568 }; 1385 };
1569 src1: src-1 { 1386 src1: src-1 {
1570 inter 1387 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1571 dmas 1388 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1572 dma-n 1389 dma-names = "rx", "tx";
1573 }; 1390 };
1574 src2: src-2 { 1391 src2: src-2 {
1575 inter 1392 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1576 dmas 1393 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1577 dma-n 1394 dma-names = "rx", "tx";
1578 }; 1395 };
1579 src3: src-3 { 1396 src3: src-3 {
1580 inter 1397 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1581 dmas 1398 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1582 dma-n 1399 dma-names = "rx", "tx";
1583 }; 1400 };
1584 src4: src-4 { 1401 src4: src-4 {
1585 inter 1402 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas 1403 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1587 dma-n 1404 dma-names = "rx", "tx";
1588 }; 1405 };
1589 src5: src-5 { 1406 src5: src-5 {
1590 inter 1407 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1591 dmas 1408 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1592 dma-n 1409 dma-names = "rx", "tx";
1593 }; 1410 };
1594 src6: src-6 { 1411 src6: src-6 {
1595 inter 1412 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1596 dmas 1413 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1597 dma-n 1414 dma-names = "rx", "tx";
1598 }; 1415 };
1599 src7: src-7 { 1416 src7: src-7 {
1600 inter 1417 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1601 dmas 1418 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1602 dma-n 1419 dma-names = "rx", "tx";
1603 }; 1420 };
1604 src8: src-8 { 1421 src8: src-8 {
1605 inter 1422 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1606 dmas 1423 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1607 dma-n 1424 dma-names = "rx", "tx";
1608 }; 1425 };
1609 src9: src-9 { 1426 src9: src-9 {
1610 inter 1427 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1611 dmas 1428 dmas = <&audma0 0x97>, <&audma0 0xba>;
1612 dma-n 1429 dma-names = "rx", "tx";
1613 }; 1430 };
1614 }; 1431 };
1615 1432
1616 rcar_sound,ssi { 1433 rcar_sound,ssi {
1617 ssi0: ssi-0 { 1434 ssi0: ssi-0 {
1618 inter 1435 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1619 dmas 1436 dmas = <&audma0 0x01>, <&audma0 0x02>,
1620 1437 <&audma0 0x15>, <&audma0 0x16>;
1621 dma-n 1438 dma-names = "rx", "tx", "rxu", "txu";
1622 }; 1439 };
1623 ssi1: ssi-1 { 1440 ssi1: ssi-1 {
1624 inter 1441 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1625 dmas 1442 dmas = <&audma0 0x03>, <&audma0 0x04>,
1626 1443 <&audma0 0x49>, <&audma0 0x4a>;
1627 dma-n 1444 dma-names = "rx", "tx", "rxu", "txu";
1628 }; 1445 };
1629 ssi2: ssi-2 { 1446 ssi2: ssi-2 {
1630 inter 1447 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1631 dmas 1448 dmas = <&audma0 0x05>, <&audma0 0x06>,
1632 1449 <&audma0 0x63>, <&audma0 0x64>;
1633 dma-n 1450 dma-names = "rx", "tx", "rxu", "txu";
1634 }; 1451 };
1635 ssi3: ssi-3 { 1452 ssi3: ssi-3 {
1636 inter 1453 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1637 dmas 1454 dmas = <&audma0 0x07>, <&audma0 0x08>,
1638 1455 <&audma0 0x6f>, <&audma0 0x70>;
1639 dma-n 1456 dma-names = "rx", "tx", "rxu", "txu";
1640 }; 1457 };
1641 ssi4: ssi-4 { 1458 ssi4: ssi-4 {
1642 inter 1459 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1643 dmas 1460 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1644 1461 <&audma0 0x71>, <&audma0 0x72>;
1645 dma-n 1462 dma-names = "rx", "tx", "rxu", "txu";
1646 }; 1463 };
1647 ssi5: ssi-5 { 1464 ssi5: ssi-5 {
1648 inter 1465 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1649 dmas 1466 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1650 1467 <&audma0 0x73>, <&audma0 0x74>;
1651 dma-n 1468 dma-names = "rx", "tx", "rxu", "txu";
1652 }; 1469 };
1653 ssi6: ssi-6 { 1470 ssi6: ssi-6 {
1654 inter 1471 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1655 dmas 1472 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1656 1473 <&audma0 0x75>, <&audma0 0x76>;
1657 dma-n 1474 dma-names = "rx", "tx", "rxu", "txu";
1658 }; 1475 };
1659 ssi7: ssi-7 { 1476 ssi7: ssi-7 {
1660 inter 1477 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1661 dmas 1478 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1662 1479 <&audma0 0x79>, <&audma0 0x7a>;
1663 dma-n 1480 dma-names = "rx", "tx", "rxu", "txu";
1664 }; 1481 };
1665 ssi8: ssi-8 { 1482 ssi8: ssi-8 {
1666 inter 1483 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1667 dmas 1484 dmas = <&audma0 0x11>, <&audma0 0x12>,
1668 1485 <&audma0 0x7b>, <&audma0 0x7c>;
1669 dma-n 1486 dma-names = "rx", "tx", "rxu", "txu";
1670 }; 1487 };
1671 ssi9: ssi-9 { 1488 ssi9: ssi-9 {
1672 inter 1489 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1673 dmas 1490 dmas = <&audma0 0x13>, <&audma0 0x14>,
1674 1491 <&audma0 0x7d>, <&audma0 0x7e>;
1675 dma-n 1492 dma-names = "rx", "tx", "rxu", "txu";
1676 }; 1493 };
1677 }; 1494 };
1678 }; 1495 };
1679 1496
1680 mlp: mlp@ec520000 { <<
1681 compatible = "renesas <<
1682 "renesas <<
1683 reg = <0 0xec520000 0 <<
1684 interrupts = <GIC_SPI <<
1685 <GIC_SPI 385 <<
1686 clocks = <&cpg CPG_MO <<
1687 power-domains = <&sys <<
1688 resets = <&cpg 802>; <<
1689 status = "disabled"; <<
1690 }; <<
1691 <<
1692 audma0: dma-controller@ec7000 1497 audma0: dma-controller@ec700000 {
1693 compatible = "renesas 1498 compatible = "renesas,dmac-r8a77990",
1694 "renesas 1499 "renesas,rcar-dmac";
1695 reg = <0 0xec700000 0 1500 reg = <0 0xec700000 0 0x10000>;
1696 interrupts = <GIC_SPI 1501 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1697 <GIC_SPI 1502 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1698 <GIC_SPI 1503 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1699 <GIC_SPI 1504 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1700 <GIC_SPI 1505 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1701 <GIC_SPI 1506 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1702 <GIC_SPI 1507 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1703 <GIC_SPI 1508 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1704 <GIC_SPI 1509 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1705 <GIC_SPI 1510 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1706 <GIC_SPI 1511 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1707 <GIC_SPI 1512 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1708 <GIC_SPI 1513 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1709 <GIC_SPI 1514 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1710 <GIC_SPI 1515 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1711 <GIC_SPI 1516 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1712 <GIC_SPI 1517 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1713 interrupt-names = "er 1518 interrupt-names = "error",
1714 "ch0" 1519 "ch0", "ch1", "ch2", "ch3",
1715 "ch4" 1520 "ch4", "ch5", "ch6", "ch7",
1716 "ch8" 1521 "ch8", "ch9", "ch10", "ch11",
1717 "ch12 1522 "ch12", "ch13", "ch14", "ch15";
1718 clocks = <&cpg CPG_MO 1523 clocks = <&cpg CPG_MOD 502>;
1719 clock-names = "fck"; 1524 clock-names = "fck";
1720 power-domains = <&sys 1525 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1721 resets = <&cpg 502>; 1526 resets = <&cpg 502>;
1722 #dma-cells = <1>; 1527 #dma-cells = <1>;
1723 dma-channels = <16>; 1528 dma-channels = <16>;
1724 iommus = <&ipmmu_mp 0 1529 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1725 <&ipmmu_mp 2 1530 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1726 <&ipmmu_mp 4 1531 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1727 <&ipmmu_mp 6 1532 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1728 <&ipmmu_mp 8 1533 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1729 <&ipmmu_mp 1 1534 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1730 <&ipmmu_mp 1 1535 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1731 <&ipmmu_mp 1 1536 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1732 }; 1537 };
1733 1538
1734 xhci0: usb@ee000000 { 1539 xhci0: usb@ee000000 {
1735 compatible = "renesas 1540 compatible = "renesas,xhci-r8a77990",
1736 "renesas 1541 "renesas,rcar-gen3-xhci";
1737 reg = <0 0xee000000 0 1542 reg = <0 0xee000000 0 0xc00>;
1738 interrupts = <GIC_SPI 1543 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1739 clocks = <&cpg CPG_MO 1544 clocks = <&cpg CPG_MOD 328>;
1740 power-domains = <&sys 1545 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1741 resets = <&cpg 328>; 1546 resets = <&cpg 328>;
1742 status = "disabled"; 1547 status = "disabled";
1743 }; 1548 };
1744 1549
1745 usb3_peri0: usb@ee020000 { 1550 usb3_peri0: usb@ee020000 {
1746 compatible = "renesas 1551 compatible = "renesas,r8a77990-usb3-peri",
1747 "renesas 1552 "renesas,rcar-gen3-usb3-peri";
1748 reg = <0 0xee020000 0 1553 reg = <0 0xee020000 0 0x400>;
1749 interrupts = <GIC_SPI 1554 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1750 clocks = <&cpg CPG_MO 1555 clocks = <&cpg CPG_MOD 328>;
1751 power-domains = <&sys 1556 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1752 resets = <&cpg 328>; 1557 resets = <&cpg 328>;
1753 status = "disabled"; 1558 status = "disabled";
1754 }; 1559 };
1755 1560
1756 ohci0: usb@ee080000 { 1561 ohci0: usb@ee080000 {
1757 compatible = "generic 1562 compatible = "generic-ohci";
1758 reg = <0 0xee080000 0 1563 reg = <0 0xee080000 0 0x100>;
1759 interrupts = <GIC_SPI 1564 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1760 clocks = <&cpg CPG_MO 1565 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1761 phys = <&usb2_phy0 1> 1566 phys = <&usb2_phy0 1>;
1762 phy-names = "usb"; 1567 phy-names = "usb";
1763 power-domains = <&sys 1568 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1764 resets = <&cpg 703>, 1569 resets = <&cpg 703>, <&cpg 704>;
1765 status = "disabled"; 1570 status = "disabled";
1766 }; 1571 };
1767 1572
1768 ehci0: usb@ee080100 { 1573 ehci0: usb@ee080100 {
1769 compatible = "generic 1574 compatible = "generic-ehci";
1770 reg = <0 0xee080100 0 1575 reg = <0 0xee080100 0 0x100>;
1771 interrupts = <GIC_SPI 1576 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1772 clocks = <&cpg CPG_MO 1577 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1773 phys = <&usb2_phy0 2> 1578 phys = <&usb2_phy0 2>;
1774 phy-names = "usb"; 1579 phy-names = "usb";
1775 companion = <&ohci0>; 1580 companion = <&ohci0>;
1776 power-domains = <&sys 1581 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1777 resets = <&cpg 703>, 1582 resets = <&cpg 703>, <&cpg 704>;
1778 status = "disabled"; 1583 status = "disabled";
1779 }; 1584 };
1780 1585
1781 usb2_phy0: usb-phy@ee080200 { 1586 usb2_phy0: usb-phy@ee080200 {
1782 compatible = "renesas 1587 compatible = "renesas,usb2-phy-r8a77990",
1783 "renesas 1588 "renesas,rcar-gen3-usb2-phy";
1784 reg = <0 0xee080200 0 1589 reg = <0 0xee080200 0 0x700>;
1785 interrupts = <GIC_SPI 1590 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1786 clocks = <&cpg CPG_MO 1591 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1787 power-domains = <&sys 1592 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1788 resets = <&cpg 703>, 1593 resets = <&cpg 703>, <&cpg 704>;
1789 #phy-cells = <1>; 1594 #phy-cells = <1>;
1790 status = "disabled"; 1595 status = "disabled";
1791 }; 1596 };
1792 1597
1793 sdhi0: mmc@ee100000 { 1598 sdhi0: mmc@ee100000 {
1794 compatible = "renesas 1599 compatible = "renesas,sdhi-r8a77990",
1795 "renesas 1600 "renesas,rcar-gen3-sdhi";
1796 reg = <0 0xee100000 0 1601 reg = <0 0xee100000 0 0x2000>;
1797 interrupts = <GIC_SPI 1602 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1798 clocks = <&cpg CPG_MO !! 1603 clocks = <&cpg CPG_MOD 314>;
1799 clock-names = "core", <<
1800 max-frequency = <2000 1604 max-frequency = <200000000>;
1801 power-domains = <&sys 1605 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1802 resets = <&cpg 314>; 1606 resets = <&cpg 314>;
1803 iommus = <&ipmmu_ds1 1607 iommus = <&ipmmu_ds1 32>;
1804 status = "disabled"; 1608 status = "disabled";
1805 }; 1609 };
1806 1610
1807 sdhi1: mmc@ee120000 { 1611 sdhi1: mmc@ee120000 {
1808 compatible = "renesas 1612 compatible = "renesas,sdhi-r8a77990",
1809 "renesas 1613 "renesas,rcar-gen3-sdhi";
1810 reg = <0 0xee120000 0 1614 reg = <0 0xee120000 0 0x2000>;
1811 interrupts = <GIC_SPI 1615 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1812 clocks = <&cpg CPG_MO !! 1616 clocks = <&cpg CPG_MOD 313>;
1813 clock-names = "core", <<
1814 max-frequency = <2000 1617 max-frequency = <200000000>;
1815 power-domains = <&sys 1618 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1816 resets = <&cpg 313>; 1619 resets = <&cpg 313>;
1817 iommus = <&ipmmu_ds1 1620 iommus = <&ipmmu_ds1 33>;
1818 status = "disabled"; 1621 status = "disabled";
1819 }; 1622 };
1820 1623
1821 sdhi3: mmc@ee160000 { 1624 sdhi3: mmc@ee160000 {
1822 compatible = "renesas 1625 compatible = "renesas,sdhi-r8a77990",
1823 "renesas 1626 "renesas,rcar-gen3-sdhi";
1824 reg = <0 0xee160000 0 1627 reg = <0 0xee160000 0 0x2000>;
1825 interrupts = <GIC_SPI 1628 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1826 clocks = <&cpg CPG_MO !! 1629 clocks = <&cpg CPG_MOD 311>;
1827 clock-names = "core", <<
1828 max-frequency = <2000 1630 max-frequency = <200000000>;
1829 power-domains = <&sys 1631 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1830 resets = <&cpg 311>; 1632 resets = <&cpg 311>;
1831 iommus = <&ipmmu_ds1 1633 iommus = <&ipmmu_ds1 35>;
1832 status = "disabled"; 1634 status = "disabled";
1833 }; 1635 };
1834 1636
1835 rpc: spi@ee200000 { <<
1836 compatible = "renesas <<
1837 "renesas <<
1838 reg = <0 0xee200000 0 <<
1839 <0 0x08000000 0 <<
1840 <0 0xee208000 0 <<
1841 reg-names = "regs", " <<
1842 interrupts = <GIC_SPI <<
1843 clocks = <&cpg CPG_MO <<
1844 power-domains = <&sys <<
1845 resets = <&cpg 917>; <<
1846 #address-cells = <1>; <<
1847 #size-cells = <0>; <<
1848 status = "disabled"; <<
1849 }; <<
1850 <<
1851 gic: interrupt-controller@f10 1637 gic: interrupt-controller@f1010000 {
1852 compatible = "arm,gic 1638 compatible = "arm,gic-400";
1853 #interrupt-cells = <3 1639 #interrupt-cells = <3>;
1854 #address-cells = <0>; 1640 #address-cells = <0>;
1855 interrupt-controller; 1641 interrupt-controller;
1856 reg = <0x0 0xf1010000 1642 reg = <0x0 0xf1010000 0 0x1000>,
1857 <0x0 0xf1020000 1643 <0x0 0xf1020000 0 0x20000>,
1858 <0x0 0xf1040000 1644 <0x0 0xf1040000 0 0x20000>,
1859 <0x0 0xf1060000 1645 <0x0 0xf1060000 0 0x20000>;
1860 interrupts = <GIC_PPI 1646 interrupts = <GIC_PPI 9
1861 (GIC_ 1647 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1862 clocks = <&cpg CPG_MO 1648 clocks = <&cpg CPG_MOD 408>;
1863 clock-names = "clk"; 1649 clock-names = "clk";
1864 power-domains = <&sys 1650 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1865 resets = <&cpg 408>; 1651 resets = <&cpg 408>;
1866 }; 1652 };
1867 1653
1868 pciec0: pcie@fe000000 { 1654 pciec0: pcie@fe000000 {
1869 compatible = "renesas 1655 compatible = "renesas,pcie-r8a77990",
1870 "renesas 1656 "renesas,pcie-rcar-gen3";
1871 reg = <0 0xfe000000 0 1657 reg = <0 0xfe000000 0 0x80000>;
1872 #address-cells = <3>; 1658 #address-cells = <3>;
1873 #size-cells = <2>; 1659 #size-cells = <2>;
1874 bus-range = <0x00 0xf 1660 bus-range = <0x00 0xff>;
1875 device_type = "pci"; 1661 device_type = "pci";
1876 ranges = <0x01000000 1662 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1877 <0x02000000 1663 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1878 <0x02000000 1664 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1879 <0x42000000 1665 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1880 /* Map all possible D !! 1666 /* Map all possible DDR as inbound ranges */
1881 dma-ranges = <0x42000 !! 1667 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1882 interrupts = <GIC_SPI 1668 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1883 <GIC_SPI 1669 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1884 <GIC_SPI 1670 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1885 #interrupt-cells = <1 1671 #interrupt-cells = <1>;
1886 interrupt-map-mask = 1672 interrupt-map-mask = <0 0 0 0>;
1887 interrupt-map = <0 0 1673 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1888 clocks = <&cpg CPG_MO 1674 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1889 clock-names = "pcie", 1675 clock-names = "pcie", "pcie_bus";
1890 power-domains = <&sys 1676 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1891 resets = <&cpg 319>; 1677 resets = <&cpg 319>;
1892 iommu-map = <0 &ipmmu <<
1893 iommu-map-mask = <0>; <<
1894 status = "disabled"; 1678 status = "disabled";
1895 }; 1679 };
1896 1680
1897 vspb0: vsp@fe960000 { 1681 vspb0: vsp@fe960000 {
1898 compatible = "renesas 1682 compatible = "renesas,vsp2";
1899 reg = <0 0xfe960000 0 1683 reg = <0 0xfe960000 0 0x8000>;
1900 interrupts = <GIC_SPI 1684 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1901 clocks = <&cpg CPG_MO 1685 clocks = <&cpg CPG_MOD 626>;
1902 power-domains = <&sys 1686 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1903 resets = <&cpg 626>; 1687 resets = <&cpg 626>;
1904 renesas,fcp = <&fcpvb 1688 renesas,fcp = <&fcpvb0>;
1905 }; 1689 };
1906 1690
1907 fcpvb0: fcp@fe96f000 { 1691 fcpvb0: fcp@fe96f000 {
1908 compatible = "renesas 1692 compatible = "renesas,fcpv";
1909 reg = <0 0xfe96f000 0 1693 reg = <0 0xfe96f000 0 0x200>;
1910 clocks = <&cpg CPG_MO 1694 clocks = <&cpg CPG_MOD 607>;
1911 power-domains = <&sys 1695 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1912 resets = <&cpg 607>; 1696 resets = <&cpg 607>;
1913 iommus = <&ipmmu_vp0 1697 iommus = <&ipmmu_vp0 5>;
1914 }; 1698 };
1915 1699
1916 vspi0: vsp@fe9a0000 { 1700 vspi0: vsp@fe9a0000 {
1917 compatible = "renesas 1701 compatible = "renesas,vsp2";
1918 reg = <0 0xfe9a0000 0 1702 reg = <0 0xfe9a0000 0 0x8000>;
1919 interrupts = <GIC_SPI 1703 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1920 clocks = <&cpg CPG_MO 1704 clocks = <&cpg CPG_MOD 631>;
1921 power-domains = <&sys 1705 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1922 resets = <&cpg 631>; 1706 resets = <&cpg 631>;
1923 renesas,fcp = <&fcpvi 1707 renesas,fcp = <&fcpvi0>;
1924 }; 1708 };
1925 1709
1926 fcpvi0: fcp@fe9af000 { 1710 fcpvi0: fcp@fe9af000 {
1927 compatible = "renesas 1711 compatible = "renesas,fcpv";
1928 reg = <0 0xfe9af000 0 1712 reg = <0 0xfe9af000 0 0x200>;
1929 clocks = <&cpg CPG_MO 1713 clocks = <&cpg CPG_MOD 611>;
1930 power-domains = <&sys 1714 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1931 resets = <&cpg 611>; 1715 resets = <&cpg 611>;
1932 iommus = <&ipmmu_vp0 1716 iommus = <&ipmmu_vp0 8>;
1933 }; 1717 };
1934 1718
1935 vspd0: vsp@fea20000 { 1719 vspd0: vsp@fea20000 {
1936 compatible = "renesas 1720 compatible = "renesas,vsp2";
1937 reg = <0 0xfea20000 0 1721 reg = <0 0xfea20000 0 0x7000>;
1938 interrupts = <GIC_SPI 1722 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1939 clocks = <&cpg CPG_MO 1723 clocks = <&cpg CPG_MOD 623>;
1940 power-domains = <&sys 1724 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1941 resets = <&cpg 623>; 1725 resets = <&cpg 623>;
1942 renesas,fcp = <&fcpvd 1726 renesas,fcp = <&fcpvd0>;
1943 }; 1727 };
1944 1728
1945 fcpvd0: fcp@fea27000 { 1729 fcpvd0: fcp@fea27000 {
1946 compatible = "renesas 1730 compatible = "renesas,fcpv";
1947 reg = <0 0xfea27000 0 1731 reg = <0 0xfea27000 0 0x200>;
1948 clocks = <&cpg CPG_MO 1732 clocks = <&cpg CPG_MOD 603>;
1949 power-domains = <&sys 1733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1950 resets = <&cpg 603>; 1734 resets = <&cpg 603>;
1951 iommus = <&ipmmu_vi0 1735 iommus = <&ipmmu_vi0 8>;
1952 }; 1736 };
1953 1737
1954 vspd1: vsp@fea28000 { 1738 vspd1: vsp@fea28000 {
1955 compatible = "renesas 1739 compatible = "renesas,vsp2";
1956 reg = <0 0xfea28000 0 1740 reg = <0 0xfea28000 0 0x7000>;
1957 interrupts = <GIC_SPI 1741 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1958 clocks = <&cpg CPG_MO 1742 clocks = <&cpg CPG_MOD 622>;
1959 power-domains = <&sys 1743 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1960 resets = <&cpg 622>; 1744 resets = <&cpg 622>;
1961 renesas,fcp = <&fcpvd 1745 renesas,fcp = <&fcpvd1>;
1962 }; 1746 };
1963 1747
1964 fcpvd1: fcp@fea2f000 { 1748 fcpvd1: fcp@fea2f000 {
1965 compatible = "renesas 1749 compatible = "renesas,fcpv";
1966 reg = <0 0xfea2f000 0 1750 reg = <0 0xfea2f000 0 0x200>;
1967 clocks = <&cpg CPG_MO 1751 clocks = <&cpg CPG_MOD 602>;
1968 power-domains = <&sys 1752 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1969 resets = <&cpg 602>; 1753 resets = <&cpg 602>;
1970 iommus = <&ipmmu_vi0 1754 iommus = <&ipmmu_vi0 9>;
1971 }; 1755 };
1972 1756
1973 cmm0: cmm@fea40000 { 1757 cmm0: cmm@fea40000 {
1974 compatible = "renesas 1758 compatible = "renesas,r8a77990-cmm",
1975 "renesas 1759 "renesas,rcar-gen3-cmm";
1976 reg = <0 0xfea40000 0 1760 reg = <0 0xfea40000 0 0x1000>;
1977 power-domains = <&sys 1761 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1978 clocks = <&cpg CPG_MO 1762 clocks = <&cpg CPG_MOD 711>;
1979 resets = <&cpg 711>; 1763 resets = <&cpg 711>;
1980 }; 1764 };
1981 1765
1982 cmm1: cmm@fea50000 { 1766 cmm1: cmm@fea50000 {
1983 compatible = "renesas 1767 compatible = "renesas,r8a77990-cmm",
1984 "renesas 1768 "renesas,rcar-gen3-cmm";
1985 reg = <0 0xfea50000 0 1769 reg = <0 0xfea50000 0 0x1000>;
1986 power-domains = <&sys 1770 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1987 clocks = <&cpg CPG_MO 1771 clocks = <&cpg CPG_MOD 710>;
1988 resets = <&cpg 710>; 1772 resets = <&cpg 710>;
1989 }; 1773 };
1990 1774
1991 csi40: csi2@feaa0000 { 1775 csi40: csi2@feaa0000 {
1992 compatible = "renesas 1776 compatible = "renesas,r8a77990-csi2";
1993 reg = <0 0xfeaa0000 0 1777 reg = <0 0xfeaa0000 0 0x10000>;
1994 interrupts = <GIC_SPI 1778 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1995 clocks = <&cpg CPG_MO 1779 clocks = <&cpg CPG_MOD 716>;
1996 power-domains = <&sys 1780 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1997 resets = <&cpg 716>; 1781 resets = <&cpg 716>;
1998 status = "disabled"; 1782 status = "disabled";
1999 1783
2000 ports { 1784 ports {
2001 #address-cell 1785 #address-cells = <1>;
2002 #size-cells = 1786 #size-cells = <0>;
2003 1787
2004 port@0 { <<
2005 reg = <<
2006 }; <<
2007 <<
2008 port@1 { 1788 port@1 {
2009 #addr 1789 #address-cells = <1>;
2010 #size 1790 #size-cells = <0>;
2011 1791
2012 reg = 1792 reg = <1>;
2013 1793
2014 csi40 1794 csi40vin4: endpoint@0 {
2015 1795 reg = <0>;
2016 1796 remote-endpoint = <&vin4csi40>;
2017 }; 1797 };
2018 csi40 1798 csi40vin5: endpoint@1 {
2019 1799 reg = <1>;
2020 1800 remote-endpoint = <&vin5csi40>;
2021 }; 1801 };
2022 }; 1802 };
2023 }; 1803 };
2024 }; 1804 };
2025 1805
2026 du: display@feb00000 { 1806 du: display@feb00000 {
2027 compatible = "renesas 1807 compatible = "renesas,du-r8a77990";
2028 reg = <0 0xfeb00000 0 1808 reg = <0 0xfeb00000 0 0x40000>;
2029 interrupts = <GIC_SPI 1809 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2030 <GIC_SPI 1810 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
2031 clocks = <&cpg CPG_MO 1811 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2032 clock-names = "du.0", 1812 clock-names = "du.0", "du.1";
2033 resets = <&cpg 724>; 1813 resets = <&cpg 724>;
2034 reset-names = "du.0"; 1814 reset-names = "du.0";
2035 1815
2036 renesas,cmms = <&cmm0 1816 renesas,cmms = <&cmm0>, <&cmm1>;
2037 renesas,vsps = <&vspd 1817 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2038 1818
2039 status = "disabled"; 1819 status = "disabled";
2040 1820
2041 ports { 1821 ports {
2042 #address-cell 1822 #address-cells = <1>;
2043 #size-cells = 1823 #size-cells = <0>;
2044 1824
2045 port@0 { 1825 port@0 {
2046 reg = 1826 reg = <0>;
>> 1827 du_out_rgb: endpoint {
>> 1828 };
2047 }; 1829 };
2048 1830
2049 port@1 { 1831 port@1 {
2050 reg = 1832 reg = <1>;
2051 du_ou 1833 du_out_lvds0: endpoint {
2052 1834 remote-endpoint = <&lvds0_in>;
2053 }; 1835 };
2054 }; 1836 };
2055 1837
2056 port@2 { 1838 port@2 {
2057 reg = 1839 reg = <2>;
2058 du_ou 1840 du_out_lvds1: endpoint {
2059 1841 remote-endpoint = <&lvds1_in>;
2060 }; 1842 };
2061 }; 1843 };
2062 }; 1844 };
2063 }; 1845 };
2064 1846
2065 lvds0: lvds-encoder@feb90000 1847 lvds0: lvds-encoder@feb90000 {
2066 compatible = "renesas 1848 compatible = "renesas,r8a77990-lvds";
2067 reg = <0 0xfeb90000 0 1849 reg = <0 0xfeb90000 0 0x20>;
2068 clocks = <&cpg CPG_MO 1850 clocks = <&cpg CPG_MOD 727>;
2069 power-domains = <&sys 1851 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2070 resets = <&cpg 727>; 1852 resets = <&cpg 727>;
2071 status = "disabled"; 1853 status = "disabled";
2072 1854
2073 renesas,companion = < 1855 renesas,companion = <&lvds1>;
2074 1856
2075 ports { 1857 ports {
2076 #address-cell 1858 #address-cells = <1>;
2077 #size-cells = 1859 #size-cells = <0>;
2078 1860
2079 port@0 { 1861 port@0 {
2080 reg = 1862 reg = <0>;
2081 lvds0 1863 lvds0_in: endpoint {
2082 1864 remote-endpoint = <&du_out_lvds0>;
2083 }; 1865 };
2084 }; 1866 };
2085 1867
2086 port@1 { 1868 port@1 {
2087 reg = 1869 reg = <1>;
>> 1870 lvds0_out: endpoint {
>> 1871 };
2088 }; 1872 };
2089 }; 1873 };
2090 }; 1874 };
2091 1875
2092 lvds1: lvds-encoder@feb90100 1876 lvds1: lvds-encoder@feb90100 {
2093 compatible = "renesas 1877 compatible = "renesas,r8a77990-lvds";
2094 reg = <0 0xfeb90100 0 1878 reg = <0 0xfeb90100 0 0x20>;
2095 clocks = <&cpg CPG_MO 1879 clocks = <&cpg CPG_MOD 727>;
2096 power-domains = <&sys 1880 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2097 resets = <&cpg 726>; 1881 resets = <&cpg 726>;
2098 status = "disabled"; 1882 status = "disabled";
2099 1883
2100 ports { 1884 ports {
2101 #address-cell 1885 #address-cells = <1>;
2102 #size-cells = 1886 #size-cells = <0>;
2103 1887
2104 port@0 { 1888 port@0 {
2105 reg = 1889 reg = <0>;
2106 lvds1 1890 lvds1_in: endpoint {
2107 1891 remote-endpoint = <&du_out_lvds1>;
2108 }; 1892 };
2109 }; 1893 };
2110 1894
2111 port@1 { 1895 port@1 {
2112 reg = 1896 reg = <1>;
>> 1897 lvds1_out: endpoint {
>> 1898 };
2113 }; 1899 };
2114 }; 1900 };
2115 }; 1901 };
2116 1902
2117 prr: chipid@fff00044 { 1903 prr: chipid@fff00044 {
2118 compatible = "renesas 1904 compatible = "renesas,prr";
2119 reg = <0 0xfff00044 0 1905 reg = <0 0xfff00044 0 4>;
2120 }; 1906 };
2121 }; 1907 };
2122 1908
2123 thermal-zones { 1909 thermal-zones {
2124 cpu-thermal { 1910 cpu-thermal {
2125 polling-delay-passive 1911 polling-delay-passive = <250>;
2126 polling-delay = <0>; 1912 polling-delay = <0>;
2127 thermal-sensors = <&t !! 1913 thermal-sensors = <&thermal 0>;
2128 sustainable-power = < 1914 sustainable-power = <717>;
2129 1915
2130 cooling-maps { 1916 cooling-maps {
2131 map0 { 1917 map0 {
2132 trip 1918 trip = <&target>;
2133 cooli 1919 cooling-device = <&a53_0 0 2>;
2134 contr 1920 contribution = <1024>;
2135 }; 1921 };
2136 }; 1922 };
2137 1923
2138 trips { 1924 trips {
2139 sensor1_crit: 1925 sensor1_crit: sensor1-crit {
2140 tempe 1926 temperature = <120000>;
2141 hyste 1927 hysteresis = <2000>;
2142 type 1928 type = "critical";
2143 }; 1929 };
2144 1930
2145 target: trip- 1931 target: trip-point1 {
2146 tempe 1932 temperature = <100000>;
2147 hyste 1933 hysteresis = <2000>;
2148 type 1934 type = "passive";
2149 }; 1935 };
2150 }; 1936 };
2151 }; 1937 };
2152 }; 1938 };
2153 1939
2154 timer { 1940 timer {
2155 compatible = "arm,armv8-timer 1941 compatible = "arm,armv8-timer";
2156 interrupts-extended = <&gic G 1942 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2157 <&gic G 1943 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2158 <&gic G 1944 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2159 <&gic G 1945 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2160 interrupt-names = "sec-phys", <<
2161 }; 1946 };
2162 }; 1947 };
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