1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car E3 (R8A779 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 * 4 *
5 * Copyright (C) 2018-2019 Renesas Electronics 5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */ 6 */
7 7
8 #include <dt-bindings/clock/r8a77990-cpg-mssr. 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h> 10 #include <dt-bindings/power/r8a77990-sysc.h>
11 11
12 / { 12 / {
13 compatible = "renesas,r8a77990"; 13 compatible = "renesas,r8a77990";
14 #address-cells = <2>; 14 #address-cells = <2>;
15 #size-cells = <2>; 15 #size-cells = <2>;
16 16
17 /* 17 /*
18 * The external audio clocks are confi 18 * The external audio clocks are configured as 0 Hz fixed frequency
19 * clocks by default. 19 * clocks by default.
20 * Boards that provide audio clocks sh 20 * Boards that provide audio clocks should override them.
21 */ 21 */
22 audio_clk_a: audio_clk_a { 22 audio_clk_a: audio_clk_a {
23 compatible = "fixed-clock"; 23 compatible = "fixed-clock";
24 #clock-cells = <0>; 24 #clock-cells = <0>;
25 clock-frequency = <0>; 25 clock-frequency = <0>;
26 }; 26 };
27 27
28 audio_clk_b: audio_clk_b { 28 audio_clk_b: audio_clk_b {
29 compatible = "fixed-clock"; 29 compatible = "fixed-clock";
30 #clock-cells = <0>; 30 #clock-cells = <0>;
31 clock-frequency = <0>; 31 clock-frequency = <0>;
32 }; 32 };
33 33
34 audio_clk_c: audio_clk_c { 34 audio_clk_c: audio_clk_c {
35 compatible = "fixed-clock"; 35 compatible = "fixed-clock";
36 #clock-cells = <0>; 36 #clock-cells = <0>;
37 clock-frequency = <0>; 37 clock-frequency = <0>;
38 }; 38 };
39 39
40 /* External CAN clock - to be overridd 40 /* External CAN clock - to be overridden by boards that provide it */
41 can_clk: can { 41 can_clk: can {
42 compatible = "fixed-clock"; 42 compatible = "fixed-clock";
43 #clock-cells = <0>; 43 #clock-cells = <0>;
44 clock-frequency = <0>; 44 clock-frequency = <0>;
45 }; 45 };
46 46
47 cluster1_opp: opp-table-1 { 47 cluster1_opp: opp-table-1 {
48 compatible = "operating-points 48 compatible = "operating-points-v2";
49 opp-shared; 49 opp-shared;
50 opp-800000000 { 50 opp-800000000 {
51 opp-hz = /bits/ 64 <80 51 opp-hz = /bits/ 64 <800000000>;
52 clock-latency-ns = <30 52 clock-latency-ns = <300000>;
53 }; 53 };
54 opp-1000000000 { 54 opp-1000000000 {
55 opp-hz = /bits/ 64 <10 55 opp-hz = /bits/ 64 <1000000000>;
56 clock-latency-ns = <30 56 clock-latency-ns = <300000>;
57 }; 57 };
58 opp-1200000000 { 58 opp-1200000000 {
59 opp-hz = /bits/ 64 <12 59 opp-hz = /bits/ 64 <1200000000>;
60 clock-latency-ns = <30 60 clock-latency-ns = <300000>;
61 opp-suspend; 61 opp-suspend;
62 }; 62 };
63 }; 63 };
64 64
65 cpus { 65 cpus {
66 #address-cells = <1>; 66 #address-cells = <1>;
67 #size-cells = <0>; 67 #size-cells = <0>;
68 68
69 a53_0: cpu@0 { 69 a53_0: cpu@0 {
70 compatible = "arm,cort 70 compatible = "arm,cortex-a53";
71 reg = <0>; 71 reg = <0>;
72 device_type = "cpu"; 72 device_type = "cpu";
73 #cooling-cells = <2>; 73 #cooling-cells = <2>;
74 power-domains = <&sysc 74 power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
75 next-level-cache = <&L 75 next-level-cache = <&L2_CA53>;
76 enable-method = "psci" 76 enable-method = "psci";
77 cpu-idle-states = <&CP 77 cpu-idle-states = <&CPU_SLEEP_0>;
78 dynamic-power-coeffici 78 dynamic-power-coefficient = <277>;
79 clocks = <&cpg CPG_COR !! 79 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
80 operating-points-v2 = 80 operating-points-v2 = <&cluster1_opp>;
81 }; 81 };
82 82
83 a53_1: cpu@1 { 83 a53_1: cpu@1 {
84 compatible = "arm,cort 84 compatible = "arm,cortex-a53";
85 reg = <1>; 85 reg = <1>;
86 device_type = "cpu"; 86 device_type = "cpu";
87 power-domains = <&sysc 87 power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
88 next-level-cache = <&L 88 next-level-cache = <&L2_CA53>;
89 enable-method = "psci" 89 enable-method = "psci";
90 cpu-idle-states = <&CP 90 cpu-idle-states = <&CPU_SLEEP_0>;
91 clocks = <&cpg CPG_COR !! 91 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
92 operating-points-v2 = 92 operating-points-v2 = <&cluster1_opp>;
93 }; 93 };
94 94
95 L2_CA53: cache-controller-0 { 95 L2_CA53: cache-controller-0 {
96 compatible = "cache"; 96 compatible = "cache";
97 power-domains = <&sysc 97 power-domains = <&sysc R8A77990_PD_CA53_SCU>;
98 cache-unified; 98 cache-unified;
99 cache-level = <2>; 99 cache-level = <2>;
100 }; 100 };
101 101
102 idle-states { 102 idle-states {
103 entry-method = "psci"; 103 entry-method = "psci";
104 104
105 CPU_SLEEP_0: cpu-sleep 105 CPU_SLEEP_0: cpu-sleep-0 {
106 compatible = " 106 compatible = "arm,idle-state";
107 arm,psci-suspe 107 arm,psci-suspend-param = <0x0010000>;
108 local-timer-st 108 local-timer-stop;
109 entry-latency- 109 entry-latency-us = <700>;
110 exit-latency-u 110 exit-latency-us = <700>;
111 min-residency- 111 min-residency-us = <5000>;
112 }; 112 };
113 }; 113 };
114 }; 114 };
115 115
116 extal_clk: extal { 116 extal_clk: extal {
117 compatible = "fixed-clock"; 117 compatible = "fixed-clock";
118 #clock-cells = <0>; 118 #clock-cells = <0>;
119 /* This value must be overridd 119 /* This value must be overridden by the board */
120 clock-frequency = <0>; 120 clock-frequency = <0>;
121 }; 121 };
122 122
123 /* External PCIe clock - can be overri 123 /* External PCIe clock - can be overridden by the board */
124 pcie_bus_clk: pcie_bus { 124 pcie_bus_clk: pcie_bus {
125 compatible = "fixed-clock"; 125 compatible = "fixed-clock";
126 #clock-cells = <0>; 126 #clock-cells = <0>;
127 clock-frequency = <0>; 127 clock-frequency = <0>;
128 }; 128 };
129 129
130 pmu_a53 { 130 pmu_a53 {
131 compatible = "arm,cortex-a53-p 131 compatible = "arm,cortex-a53-pmu";
132 interrupts-extended = <&gic GI 132 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
133 <&gic GI 133 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-affinity = <&a53_0>, 134 interrupt-affinity = <&a53_0>, <&a53_1>;
135 }; 135 };
136 136
137 psci { 137 psci {
138 compatible = "arm,psci-1.0", " 138 compatible = "arm,psci-1.0", "arm,psci-0.2";
139 method = "smc"; 139 method = "smc";
140 }; 140 };
141 141
142 /* External SCIF clock - to be overrid 142 /* External SCIF clock - to be overridden by boards that provide it */
143 scif_clk: scif { 143 scif_clk: scif {
144 compatible = "fixed-clock"; 144 compatible = "fixed-clock";
145 #clock-cells = <0>; 145 #clock-cells = <0>;
146 clock-frequency = <0>; 146 clock-frequency = <0>;
147 }; 147 };
148 148
149 soc: soc { 149 soc: soc {
150 compatible = "simple-bus"; 150 compatible = "simple-bus";
151 interrupt-parent = <&gic>; 151 interrupt-parent = <&gic>;
152 #address-cells = <2>; 152 #address-cells = <2>;
153 #size-cells = <2>; 153 #size-cells = <2>;
154 ranges; 154 ranges;
155 155
156 rwdt: watchdog@e6020000 { 156 rwdt: watchdog@e6020000 {
157 compatible = "renesas, 157 compatible = "renesas,r8a77990-wdt",
158 "renesas, 158 "renesas,rcar-gen3-wdt";
159 reg = <0 0xe6020000 0 159 reg = <0 0xe6020000 0 0x0c>;
160 interrupts = <GIC_SPI 160 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
161 clocks = <&cpg CPG_MOD 161 clocks = <&cpg CPG_MOD 402>;
162 power-domains = <&sysc 162 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
163 resets = <&cpg 402>; 163 resets = <&cpg 402>;
164 status = "disabled"; 164 status = "disabled";
165 }; 165 };
166 166
167 gpio0: gpio@e6050000 { 167 gpio0: gpio@e6050000 {
168 compatible = "renesas, 168 compatible = "renesas,gpio-r8a77990",
169 "renesas, 169 "renesas,rcar-gen3-gpio";
170 reg = <0 0xe6050000 0 170 reg = <0 0xe6050000 0 0x50>;
171 interrupts = <GIC_SPI 171 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
172 #gpio-cells = <2>; 172 #gpio-cells = <2>;
173 gpio-controller; 173 gpio-controller;
174 gpio-ranges = <&pfc 0 174 gpio-ranges = <&pfc 0 0 18>;
175 #interrupt-cells = <2> 175 #interrupt-cells = <2>;
176 interrupt-controller; 176 interrupt-controller;
177 clocks = <&cpg CPG_MOD 177 clocks = <&cpg CPG_MOD 912>;
178 power-domains = <&sysc 178 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
179 resets = <&cpg 912>; 179 resets = <&cpg 912>;
180 }; 180 };
181 181
182 gpio1: gpio@e6051000 { 182 gpio1: gpio@e6051000 {
183 compatible = "renesas, 183 compatible = "renesas,gpio-r8a77990",
184 "renesas, 184 "renesas,rcar-gen3-gpio";
185 reg = <0 0xe6051000 0 185 reg = <0 0xe6051000 0 0x50>;
186 interrupts = <GIC_SPI 186 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
187 #gpio-cells = <2>; 187 #gpio-cells = <2>;
188 gpio-controller; 188 gpio-controller;
189 gpio-ranges = <&pfc 0 189 gpio-ranges = <&pfc 0 32 23>;
190 #interrupt-cells = <2> 190 #interrupt-cells = <2>;
191 interrupt-controller; 191 interrupt-controller;
192 clocks = <&cpg CPG_MOD 192 clocks = <&cpg CPG_MOD 911>;
193 power-domains = <&sysc 193 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
194 resets = <&cpg 911>; 194 resets = <&cpg 911>;
195 }; 195 };
196 196
197 gpio2: gpio@e6052000 { 197 gpio2: gpio@e6052000 {
198 compatible = "renesas, 198 compatible = "renesas,gpio-r8a77990",
199 "renesas, 199 "renesas,rcar-gen3-gpio";
200 reg = <0 0xe6052000 0 200 reg = <0 0xe6052000 0 0x50>;
201 interrupts = <GIC_SPI 201 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
202 #gpio-cells = <2>; 202 #gpio-cells = <2>;
203 gpio-controller; 203 gpio-controller;
204 gpio-ranges = <&pfc 0 204 gpio-ranges = <&pfc 0 64 26>;
205 #interrupt-cells = <2> 205 #interrupt-cells = <2>;
206 interrupt-controller; 206 interrupt-controller;
207 clocks = <&cpg CPG_MOD 207 clocks = <&cpg CPG_MOD 910>;
208 power-domains = <&sysc 208 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
209 resets = <&cpg 910>; 209 resets = <&cpg 910>;
210 }; 210 };
211 211
212 gpio3: gpio@e6053000 { 212 gpio3: gpio@e6053000 {
213 compatible = "renesas, 213 compatible = "renesas,gpio-r8a77990",
214 "renesas, 214 "renesas,rcar-gen3-gpio";
215 reg = <0 0xe6053000 0 215 reg = <0 0xe6053000 0 0x50>;
216 interrupts = <GIC_SPI 216 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
217 #gpio-cells = <2>; 217 #gpio-cells = <2>;
218 gpio-controller; 218 gpio-controller;
219 gpio-ranges = <&pfc 0 219 gpio-ranges = <&pfc 0 96 16>;
220 #interrupt-cells = <2> 220 #interrupt-cells = <2>;
221 interrupt-controller; 221 interrupt-controller;
222 clocks = <&cpg CPG_MOD 222 clocks = <&cpg CPG_MOD 909>;
223 power-domains = <&sysc 223 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
224 resets = <&cpg 909>; 224 resets = <&cpg 909>;
225 }; 225 };
226 226
227 gpio4: gpio@e6054000 { 227 gpio4: gpio@e6054000 {
228 compatible = "renesas, 228 compatible = "renesas,gpio-r8a77990",
229 "renesas, 229 "renesas,rcar-gen3-gpio";
230 reg = <0 0xe6054000 0 230 reg = <0 0xe6054000 0 0x50>;
231 interrupts = <GIC_SPI 231 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
232 #gpio-cells = <2>; 232 #gpio-cells = <2>;
233 gpio-controller; 233 gpio-controller;
234 gpio-ranges = <&pfc 0 234 gpio-ranges = <&pfc 0 128 11>;
235 #interrupt-cells = <2> 235 #interrupt-cells = <2>;
236 interrupt-controller; 236 interrupt-controller;
237 clocks = <&cpg CPG_MOD 237 clocks = <&cpg CPG_MOD 908>;
238 power-domains = <&sysc 238 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
239 resets = <&cpg 908>; 239 resets = <&cpg 908>;
240 }; 240 };
241 241
242 gpio5: gpio@e6055000 { 242 gpio5: gpio@e6055000 {
243 compatible = "renesas, 243 compatible = "renesas,gpio-r8a77990",
244 "renesas, 244 "renesas,rcar-gen3-gpio";
245 reg = <0 0xe6055000 0 245 reg = <0 0xe6055000 0 0x50>;
246 interrupts = <GIC_SPI 246 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
247 #gpio-cells = <2>; 247 #gpio-cells = <2>;
248 gpio-controller; 248 gpio-controller;
249 gpio-ranges = <&pfc 0 249 gpio-ranges = <&pfc 0 160 20>;
250 #interrupt-cells = <2> 250 #interrupt-cells = <2>;
251 interrupt-controller; 251 interrupt-controller;
252 clocks = <&cpg CPG_MOD 252 clocks = <&cpg CPG_MOD 907>;
253 power-domains = <&sysc 253 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
254 resets = <&cpg 907>; 254 resets = <&cpg 907>;
255 }; 255 };
256 256
257 gpio6: gpio@e6055400 { 257 gpio6: gpio@e6055400 {
258 compatible = "renesas, 258 compatible = "renesas,gpio-r8a77990",
259 "renesas, 259 "renesas,rcar-gen3-gpio";
260 reg = <0 0xe6055400 0 260 reg = <0 0xe6055400 0 0x50>;
261 interrupts = <GIC_SPI 261 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
262 #gpio-cells = <2>; 262 #gpio-cells = <2>;
263 gpio-controller; 263 gpio-controller;
264 gpio-ranges = <&pfc 0 264 gpio-ranges = <&pfc 0 192 18>;
265 #interrupt-cells = <2> 265 #interrupt-cells = <2>;
266 interrupt-controller; 266 interrupt-controller;
267 clocks = <&cpg CPG_MOD 267 clocks = <&cpg CPG_MOD 906>;
268 power-domains = <&sysc 268 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
269 resets = <&cpg 906>; 269 resets = <&cpg 906>;
270 }; 270 };
271 271
272 pfc: pinctrl@e6060000 { 272 pfc: pinctrl@e6060000 {
273 compatible = "renesas, 273 compatible = "renesas,pfc-r8a77990";
274 reg = <0 0xe6060000 0 274 reg = <0 0xe6060000 0 0x508>;
275 }; 275 };
276 276
277 i2c_dvfs: i2c@e60b0000 { 277 i2c_dvfs: i2c@e60b0000 {
278 #address-cells = <1>; 278 #address-cells = <1>;
279 #size-cells = <0>; 279 #size-cells = <0>;
280 compatible = "renesas, 280 compatible = "renesas,iic-r8a77990",
281 "renesas, 281 "renesas,rcar-gen3-iic",
282 "renesas, 282 "renesas,rmobile-iic";
283 reg = <0 0xe60b0000 0 283 reg = <0 0xe60b0000 0 0x425>;
284 interrupts = <GIC_SPI 284 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&cpg CPG_MOD 285 clocks = <&cpg CPG_MOD 926>;
286 power-domains = <&sysc 286 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
287 resets = <&cpg 926>; 287 resets = <&cpg 926>;
288 dmas = <&dmac0 0x11>, 288 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
289 dma-names = "tx", "rx" 289 dma-names = "tx", "rx";
290 status = "disabled"; 290 status = "disabled";
291 }; 291 };
292 292
293 cmt0: timer@e60f0000 { 293 cmt0: timer@e60f0000 {
294 compatible = "renesas, 294 compatible = "renesas,r8a77990-cmt0",
295 "renesas, 295 "renesas,rcar-gen3-cmt0";
296 reg = <0 0xe60f0000 0 296 reg = <0 0xe60f0000 0 0x1004>;
297 interrupts = <GIC_SPI 297 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 298 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
299 clocks = <&cpg CPG_MOD 299 clocks = <&cpg CPG_MOD 303>;
300 clock-names = "fck"; 300 clock-names = "fck";
301 power-domains = <&sysc 301 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
302 resets = <&cpg 303>; 302 resets = <&cpg 303>;
303 status = "disabled"; 303 status = "disabled";
304 }; 304 };
305 305
306 cmt1: timer@e6130000 { 306 cmt1: timer@e6130000 {
307 compatible = "renesas, 307 compatible = "renesas,r8a77990-cmt1",
308 "renesas, 308 "renesas,rcar-gen3-cmt1";
309 reg = <0 0xe6130000 0 309 reg = <0 0xe6130000 0 0x1004>;
310 interrupts = <GIC_SPI 310 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
311 <GIC_SPI 311 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
312 <GIC_SPI 312 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
313 <GIC_SPI 313 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
314 <GIC_SPI 314 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
315 <GIC_SPI 315 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
316 <GIC_SPI 316 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 317 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
318 clocks = <&cpg CPG_MOD 318 clocks = <&cpg CPG_MOD 302>;
319 clock-names = "fck"; 319 clock-names = "fck";
320 power-domains = <&sysc 320 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
321 resets = <&cpg 302>; 321 resets = <&cpg 302>;
322 status = "disabled"; 322 status = "disabled";
323 }; 323 };
324 324
325 cmt2: timer@e6140000 { 325 cmt2: timer@e6140000 {
326 compatible = "renesas, 326 compatible = "renesas,r8a77990-cmt1",
327 "renesas, 327 "renesas,rcar-gen3-cmt1";
328 reg = <0 0xe6140000 0 328 reg = <0 0xe6140000 0 0x1004>;
329 interrupts = <GIC_SPI 329 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 330 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 331 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 332 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
333 <GIC_SPI 333 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 334 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
335 <GIC_SPI 335 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 336 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
337 clocks = <&cpg CPG_MOD 337 clocks = <&cpg CPG_MOD 301>;
338 clock-names = "fck"; 338 clock-names = "fck";
339 power-domains = <&sysc 339 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
340 resets = <&cpg 301>; 340 resets = <&cpg 301>;
341 status = "disabled"; 341 status = "disabled";
342 }; 342 };
343 343
344 cmt3: timer@e6148000 { 344 cmt3: timer@e6148000 {
345 compatible = "renesas, 345 compatible = "renesas,r8a77990-cmt1",
346 "renesas, 346 "renesas,rcar-gen3-cmt1";
347 reg = <0 0xe6148000 0 347 reg = <0 0xe6148000 0 0x1004>;
348 interrupts = <GIC_SPI 348 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 349 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
350 <GIC_SPI 350 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
351 <GIC_SPI 351 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 352 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 353 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 354 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 355 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
356 clocks = <&cpg CPG_MOD 356 clocks = <&cpg CPG_MOD 300>;
357 clock-names = "fck"; 357 clock-names = "fck";
358 power-domains = <&sysc 358 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
359 resets = <&cpg 300>; 359 resets = <&cpg 300>;
360 status = "disabled"; 360 status = "disabled";
361 }; 361 };
362 362
363 cpg: clock-controller@e6150000 363 cpg: clock-controller@e6150000 {
364 compatible = "renesas, 364 compatible = "renesas,r8a77990-cpg-mssr";
365 reg = <0 0xe6150000 0 365 reg = <0 0xe6150000 0 0x1000>;
366 clocks = <&extal_clk>; 366 clocks = <&extal_clk>;
367 clock-names = "extal"; 367 clock-names = "extal";
368 #clock-cells = <2>; 368 #clock-cells = <2>;
369 #power-domain-cells = 369 #power-domain-cells = <0>;
370 #reset-cells = <1>; 370 #reset-cells = <1>;
371 }; 371 };
372 372
373 rst: reset-controller@e6160000 373 rst: reset-controller@e6160000 {
374 compatible = "renesas, 374 compatible = "renesas,r8a77990-rst";
375 reg = <0 0xe6160000 0 375 reg = <0 0xe6160000 0 0x0200>;
376 }; 376 };
377 377
378 sysc: system-controller@e61800 378 sysc: system-controller@e6180000 {
379 compatible = "renesas, 379 compatible = "renesas,r8a77990-sysc";
380 reg = <0 0xe6180000 0 380 reg = <0 0xe6180000 0 0x0400>;
381 #power-domain-cells = 381 #power-domain-cells = <1>;
382 }; 382 };
383 383
384 thermal: thermal@e6190000 { 384 thermal: thermal@e6190000 {
385 compatible = "renesas, 385 compatible = "renesas,thermal-r8a77990";
386 reg = <0 0xe6190000 0 386 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
387 interrupts = <GIC_SPI 387 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
388 <GIC_SPI 388 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
389 <GIC_SPI 389 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
390 clocks = <&cpg CPG_MOD 390 clocks = <&cpg CPG_MOD 522>;
391 power-domains = <&sysc 391 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
392 resets = <&cpg 522>; 392 resets = <&cpg 522>;
393 #thermal-sensor-cells 393 #thermal-sensor-cells = <0>;
394 }; 394 };
395 395
396 intc_ex: interrupt-controller@ 396 intc_ex: interrupt-controller@e61c0000 {
397 compatible = "renesas, 397 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
398 #interrupt-cells = <2> 398 #interrupt-cells = <2>;
399 interrupt-controller; 399 interrupt-controller;
400 reg = <0 0xe61c0000 0 400 reg = <0 0xe61c0000 0 0x200>;
401 interrupts = <GIC_SPI 401 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
402 <GIC_SPI 402 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
403 <GIC_SPI 403 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
404 <GIC_SPI 404 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
405 <GIC_SPI 405 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
406 <GIC_SPI 406 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 407 clocks = <&cpg CPG_MOD 407>;
408 power-domains = <&sysc 408 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
409 resets = <&cpg 407>; 409 resets = <&cpg 407>;
410 }; 410 };
411 411
412 tmu0: timer@e61e0000 { 412 tmu0: timer@e61e0000 {
413 compatible = "renesas, 413 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
414 reg = <0 0xe61e0000 0 414 reg = <0 0xe61e0000 0 0x30>;
415 interrupts = <GIC_SPI 415 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
416 <GIC_SPI 416 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
417 <GIC_SPI 417 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
418 interrupt-names = "tun <<
419 clocks = <&cpg CPG_MOD 418 clocks = <&cpg CPG_MOD 125>;
420 clock-names = "fck"; 419 clock-names = "fck";
421 power-domains = <&sysc 420 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
422 resets = <&cpg 125>; 421 resets = <&cpg 125>;
423 status = "disabled"; 422 status = "disabled";
424 }; 423 };
425 424
426 tmu1: timer@e6fc0000 { 425 tmu1: timer@e6fc0000 {
427 compatible = "renesas, 426 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
428 reg = <0 0xe6fc0000 0 427 reg = <0 0xe6fc0000 0 0x30>;
429 interrupts = <GIC_SPI 428 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
430 <GIC_SPI 429 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
431 <GIC_SPI !! 430 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
432 <GIC_SPI <<
433 interrupt-names = "tun <<
434 clocks = <&cpg CPG_MOD 431 clocks = <&cpg CPG_MOD 124>;
435 clock-names = "fck"; 432 clock-names = "fck";
436 power-domains = <&sysc 433 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
437 resets = <&cpg 124>; 434 resets = <&cpg 124>;
438 status = "disabled"; 435 status = "disabled";
439 }; 436 };
440 437
441 tmu2: timer@e6fd0000 { 438 tmu2: timer@e6fd0000 {
442 compatible = "renesas, 439 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
443 reg = <0 0xe6fd0000 0 440 reg = <0 0xe6fd0000 0 0x30>;
444 interrupts = <GIC_SPI 441 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
445 <GIC_SPI 442 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
446 <GIC_SPI !! 443 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
447 <GIC_SPI <<
448 interrupt-names = "tun <<
449 clocks = <&cpg CPG_MOD 444 clocks = <&cpg CPG_MOD 123>;
450 clock-names = "fck"; 445 clock-names = "fck";
451 power-domains = <&sysc 446 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
452 resets = <&cpg 123>; 447 resets = <&cpg 123>;
453 status = "disabled"; 448 status = "disabled";
454 }; 449 };
455 450
456 tmu3: timer@e6fe0000 { 451 tmu3: timer@e6fe0000 {
457 compatible = "renesas, 452 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
458 reg = <0 0xe6fe0000 0 453 reg = <0 0xe6fe0000 0 0x30>;
459 interrupts = <GIC_SPI 454 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
460 <GIC_SPI 455 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
461 <GIC_SPI 456 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
462 interrupt-names = "tun <<
463 clocks = <&cpg CPG_MOD 457 clocks = <&cpg CPG_MOD 122>;
464 clock-names = "fck"; 458 clock-names = "fck";
465 power-domains = <&sysc 459 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
466 resets = <&cpg 122>; 460 resets = <&cpg 122>;
467 status = "disabled"; 461 status = "disabled";
468 }; 462 };
469 463
470 tmu4: timer@ffc00000 { 464 tmu4: timer@ffc00000 {
471 compatible = "renesas, 465 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
472 reg = <0 0xffc00000 0 466 reg = <0 0xffc00000 0 0x30>;
473 interrupts = <GIC_SPI 467 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
474 <GIC_SPI 468 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
475 <GIC_SPI 469 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
476 interrupt-names = "tun <<
477 clocks = <&cpg CPG_MOD 470 clocks = <&cpg CPG_MOD 121>;
478 clock-names = "fck"; 471 clock-names = "fck";
479 power-domains = <&sysc 472 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
480 resets = <&cpg 121>; 473 resets = <&cpg 121>;
481 status = "disabled"; 474 status = "disabled";
482 }; 475 };
483 476
484 i2c0: i2c@e6500000 { 477 i2c0: i2c@e6500000 {
485 #address-cells = <1>; 478 #address-cells = <1>;
486 #size-cells = <0>; 479 #size-cells = <0>;
487 compatible = "renesas, 480 compatible = "renesas,i2c-r8a77990",
488 "renesas, 481 "renesas,rcar-gen3-i2c";
489 reg = <0 0xe6500000 0 482 reg = <0 0xe6500000 0 0x40>;
490 interrupts = <GIC_SPI 483 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&cpg CPG_MOD 484 clocks = <&cpg CPG_MOD 931>;
492 power-domains = <&sysc 485 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
493 resets = <&cpg 931>; 486 resets = <&cpg 931>;
494 dmas = <&dmac1 0x91>, 487 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
495 <&dmac2 0x91>, 488 <&dmac2 0x91>, <&dmac2 0x90>;
496 dma-names = "tx", "rx" 489 dma-names = "tx", "rx", "tx", "rx";
497 i2c-scl-internal-delay 490 i2c-scl-internal-delay-ns = <110>;
498 status = "disabled"; 491 status = "disabled";
499 }; 492 };
500 493
501 i2c1: i2c@e6508000 { 494 i2c1: i2c@e6508000 {
502 #address-cells = <1>; 495 #address-cells = <1>;
503 #size-cells = <0>; 496 #size-cells = <0>;
504 compatible = "renesas, 497 compatible = "renesas,i2c-r8a77990",
505 "renesas, 498 "renesas,rcar-gen3-i2c";
506 reg = <0 0xe6508000 0 499 reg = <0 0xe6508000 0 0x40>;
507 interrupts = <GIC_SPI 500 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 501 clocks = <&cpg CPG_MOD 930>;
509 power-domains = <&sysc 502 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
510 resets = <&cpg 930>; 503 resets = <&cpg 930>;
511 dmas = <&dmac1 0x93>, 504 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
512 <&dmac2 0x93>, 505 <&dmac2 0x93>, <&dmac2 0x92>;
513 dma-names = "tx", "rx" 506 dma-names = "tx", "rx", "tx", "rx";
514 i2c-scl-internal-delay 507 i2c-scl-internal-delay-ns = <6>;
515 status = "disabled"; 508 status = "disabled";
516 }; 509 };
517 510
518 i2c2: i2c@e6510000 { 511 i2c2: i2c@e6510000 {
519 #address-cells = <1>; 512 #address-cells = <1>;
520 #size-cells = <0>; 513 #size-cells = <0>;
521 compatible = "renesas, 514 compatible = "renesas,i2c-r8a77990",
522 "renesas, 515 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6510000 0 516 reg = <0 0xe6510000 0 0x40>;
524 interrupts = <GIC_SPI 517 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 518 clocks = <&cpg CPG_MOD 929>;
526 power-domains = <&sysc 519 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
527 resets = <&cpg 929>; 520 resets = <&cpg 929>;
528 dmas = <&dmac1 0x95>, 521 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
529 <&dmac2 0x95>, 522 <&dmac2 0x95>, <&dmac2 0x94>;
530 dma-names = "tx", "rx" 523 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay 524 i2c-scl-internal-delay-ns = <6>;
532 status = "disabled"; 525 status = "disabled";
533 }; 526 };
534 527
535 i2c3: i2c@e66d0000 { 528 i2c3: i2c@e66d0000 {
536 #address-cells = <1>; 529 #address-cells = <1>;
537 #size-cells = <0>; 530 #size-cells = <0>;
538 compatible = "renesas, 531 compatible = "renesas,i2c-r8a77990",
539 "renesas, 532 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe66d0000 0 533 reg = <0 0xe66d0000 0 0x40>;
541 interrupts = <GIC_SPI 534 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 535 clocks = <&cpg CPG_MOD 928>;
543 power-domains = <&sysc 536 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
544 resets = <&cpg 928>; 537 resets = <&cpg 928>;
545 dmas = <&dmac0 0x97>, 538 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
546 dma-names = "tx", "rx" 539 dma-names = "tx", "rx";
547 i2c-scl-internal-delay 540 i2c-scl-internal-delay-ns = <110>;
548 status = "disabled"; 541 status = "disabled";
549 }; 542 };
550 543
551 i2c4: i2c@e66d8000 { 544 i2c4: i2c@e66d8000 {
552 #address-cells = <1>; 545 #address-cells = <1>;
553 #size-cells = <0>; 546 #size-cells = <0>;
554 compatible = "renesas, 547 compatible = "renesas,i2c-r8a77990",
555 "renesas, 548 "renesas,rcar-gen3-i2c";
556 reg = <0 0xe66d8000 0 549 reg = <0 0xe66d8000 0 0x40>;
557 interrupts = <GIC_SPI 550 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 551 clocks = <&cpg CPG_MOD 927>;
559 power-domains = <&sysc 552 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
560 resets = <&cpg 927>; 553 resets = <&cpg 927>;
561 dmas = <&dmac0 0x99>, 554 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
562 dma-names = "tx", "rx" 555 dma-names = "tx", "rx";
563 i2c-scl-internal-delay 556 i2c-scl-internal-delay-ns = <6>;
564 status = "disabled"; 557 status = "disabled";
565 }; 558 };
566 559
567 i2c5: i2c@e66e0000 { 560 i2c5: i2c@e66e0000 {
568 #address-cells = <1>; 561 #address-cells = <1>;
569 #size-cells = <0>; 562 #size-cells = <0>;
570 compatible = "renesas, 563 compatible = "renesas,i2c-r8a77990",
571 "renesas, 564 "renesas,rcar-gen3-i2c";
572 reg = <0 0xe66e0000 0 565 reg = <0 0xe66e0000 0 0x40>;
573 interrupts = <GIC_SPI 566 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&cpg CPG_MOD 567 clocks = <&cpg CPG_MOD 919>;
575 power-domains = <&sysc 568 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
576 resets = <&cpg 919>; 569 resets = <&cpg 919>;
577 dmas = <&dmac0 0x9b>, 570 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
578 dma-names = "tx", "rx" 571 dma-names = "tx", "rx";
579 i2c-scl-internal-delay 572 i2c-scl-internal-delay-ns = <6>;
580 status = "disabled"; 573 status = "disabled";
581 }; 574 };
582 575
583 i2c6: i2c@e66e8000 { 576 i2c6: i2c@e66e8000 {
584 #address-cells = <1>; 577 #address-cells = <1>;
585 #size-cells = <0>; 578 #size-cells = <0>;
586 compatible = "renesas, 579 compatible = "renesas,i2c-r8a77990",
587 "renesas, 580 "renesas,rcar-gen3-i2c";
588 reg = <0 0xe66e8000 0 581 reg = <0 0xe66e8000 0 0x40>;
589 interrupts = <GIC_SPI 582 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&cpg CPG_MOD 583 clocks = <&cpg CPG_MOD 918>;
591 power-domains = <&sysc 584 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
592 resets = <&cpg 918>; 585 resets = <&cpg 918>;
593 dmas = <&dmac0 0x9d>, 586 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
594 dma-names = "tx", "rx" 587 dma-names = "tx", "rx";
595 i2c-scl-internal-delay 588 i2c-scl-internal-delay-ns = <6>;
596 status = "disabled"; 589 status = "disabled";
597 }; 590 };
598 591
599 i2c7: i2c@e6690000 { 592 i2c7: i2c@e6690000 {
600 #address-cells = <1>; 593 #address-cells = <1>;
601 #size-cells = <0>; 594 #size-cells = <0>;
602 compatible = "renesas, 595 compatible = "renesas,i2c-r8a77990",
603 "renesas, 596 "renesas,rcar-gen3-i2c";
604 reg = <0 0xe6690000 0 597 reg = <0 0xe6690000 0 0x40>;
605 interrupts = <GIC_SPI 598 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&cpg CPG_MOD 599 clocks = <&cpg CPG_MOD 1003>;
607 power-domains = <&sysc 600 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
608 resets = <&cpg 1003>; 601 resets = <&cpg 1003>;
609 i2c-scl-internal-delay 602 i2c-scl-internal-delay-ns = <6>;
610 status = "disabled"; 603 status = "disabled";
611 }; 604 };
612 605
613 hscif0: serial@e6540000 { 606 hscif0: serial@e6540000 {
614 compatible = "renesas, 607 compatible = "renesas,hscif-r8a77990",
615 "renesas, 608 "renesas,rcar-gen3-hscif",
616 "renesas, 609 "renesas,hscif";
617 reg = <0 0xe6540000 0 610 reg = <0 0xe6540000 0 0x60>;
618 interrupts = <GIC_SPI 611 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&cpg CPG_MOD 612 clocks = <&cpg CPG_MOD 520>,
620 <&cpg CPG_COR 613 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
621 <&scif_clk>; 614 <&scif_clk>;
622 clock-names = "fck", " 615 clock-names = "fck", "brg_int", "scif_clk";
623 dmas = <&dmac1 0x31>, 616 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
624 <&dmac2 0x31>, 617 <&dmac2 0x31>, <&dmac2 0x30>;
625 dma-names = "tx", "rx" 618 dma-names = "tx", "rx", "tx", "rx";
626 power-domains = <&sysc 619 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
627 resets = <&cpg 520>; 620 resets = <&cpg 520>;
628 status = "disabled"; 621 status = "disabled";
629 }; 622 };
630 623
631 hscif1: serial@e6550000 { 624 hscif1: serial@e6550000 {
632 compatible = "renesas, 625 compatible = "renesas,hscif-r8a77990",
633 "renesas, 626 "renesas,rcar-gen3-hscif",
634 "renesas, 627 "renesas,hscif";
635 reg = <0 0xe6550000 0 628 reg = <0 0xe6550000 0 0x60>;
636 interrupts = <GIC_SPI 629 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&cpg CPG_MOD 630 clocks = <&cpg CPG_MOD 519>,
638 <&cpg CPG_COR 631 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
639 <&scif_clk>; 632 <&scif_clk>;
640 clock-names = "fck", " 633 clock-names = "fck", "brg_int", "scif_clk";
641 dmas = <&dmac1 0x33>, 634 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
642 <&dmac2 0x33>, 635 <&dmac2 0x33>, <&dmac2 0x32>;
643 dma-names = "tx", "rx" 636 dma-names = "tx", "rx", "tx", "rx";
644 power-domains = <&sysc 637 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
645 resets = <&cpg 519>; 638 resets = <&cpg 519>;
646 status = "disabled"; 639 status = "disabled";
647 }; 640 };
648 641
649 hscif2: serial@e6560000 { 642 hscif2: serial@e6560000 {
650 compatible = "renesas, 643 compatible = "renesas,hscif-r8a77990",
651 "renesas, 644 "renesas,rcar-gen3-hscif",
652 "renesas, 645 "renesas,hscif";
653 reg = <0 0xe6560000 0 646 reg = <0 0xe6560000 0 0x60>;
654 interrupts = <GIC_SPI 647 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 648 clocks = <&cpg CPG_MOD 518>,
656 <&cpg CPG_COR 649 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
657 <&scif_clk>; 650 <&scif_clk>;
658 clock-names = "fck", " 651 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x35>, 652 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
660 <&dmac2 0x35>, 653 <&dmac2 0x35>, <&dmac2 0x34>;
661 dma-names = "tx", "rx" 654 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc 655 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
663 resets = <&cpg 518>; 656 resets = <&cpg 518>;
664 status = "disabled"; 657 status = "disabled";
665 }; 658 };
666 659
667 hscif3: serial@e66a0000 { 660 hscif3: serial@e66a0000 {
668 compatible = "renesas, 661 compatible = "renesas,hscif-r8a77990",
669 "renesas, 662 "renesas,rcar-gen3-hscif",
670 "renesas, 663 "renesas,hscif";
671 reg = <0 0xe66a0000 0 664 reg = <0 0xe66a0000 0 0x60>;
672 interrupts = <GIC_SPI 665 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 666 clocks = <&cpg CPG_MOD 517>,
674 <&cpg CPG_COR 667 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
675 <&scif_clk>; 668 <&scif_clk>;
676 clock-names = "fck", " 669 clock-names = "fck", "brg_int", "scif_clk";
677 dmas = <&dmac0 0x37>, 670 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
678 dma-names = "tx", "rx" 671 dma-names = "tx", "rx";
679 power-domains = <&sysc 672 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
680 resets = <&cpg 517>; 673 resets = <&cpg 517>;
681 status = "disabled"; 674 status = "disabled";
682 }; 675 };
683 676
684 hscif4: serial@e66b0000 { 677 hscif4: serial@e66b0000 {
685 compatible = "renesas, 678 compatible = "renesas,hscif-r8a77990",
686 "renesas, 679 "renesas,rcar-gen3-hscif",
687 "renesas, 680 "renesas,hscif";
688 reg = <0 0xe66b0000 0 681 reg = <0 0xe66b0000 0 0x60>;
689 interrupts = <GIC_SPI 682 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&cpg CPG_MOD 683 clocks = <&cpg CPG_MOD 516>,
691 <&cpg CPG_COR 684 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
692 <&scif_clk>; 685 <&scif_clk>;
693 clock-names = "fck", " 686 clock-names = "fck", "brg_int", "scif_clk";
694 dmas = <&dmac0 0x39>, 687 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
695 dma-names = "tx", "rx" 688 dma-names = "tx", "rx";
696 power-domains = <&sysc 689 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
697 resets = <&cpg 516>; 690 resets = <&cpg 516>;
698 status = "disabled"; 691 status = "disabled";
699 }; 692 };
700 693
701 hsusb: usb@e6590000 { 694 hsusb: usb@e6590000 {
702 compatible = "renesas, 695 compatible = "renesas,usbhs-r8a77990",
703 "renesas, 696 "renesas,rcar-gen3-usbhs";
704 reg = <0 0xe6590000 0 697 reg = <0 0xe6590000 0 0x200>;
705 interrupts = <GIC_SPI 698 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
706 clocks = <&cpg CPG_MOD 699 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
707 dmas = <&usb_dmac0 0>, 700 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
708 <&usb_dmac1 0>, 701 <&usb_dmac1 0>, <&usb_dmac1 1>;
709 dma-names = "ch0", "ch 702 dma-names = "ch0", "ch1", "ch2", "ch3";
710 renesas,buswait = <11> 703 renesas,buswait = <11>;
711 phys = <&usb2_phy0 3>; 704 phys = <&usb2_phy0 3>;
712 phy-names = "usb"; 705 phy-names = "usb";
713 power-domains = <&sysc 706 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
714 resets = <&cpg 704>, < 707 resets = <&cpg 704>, <&cpg 703>;
715 status = "disabled"; 708 status = "disabled";
716 }; 709 };
717 710
718 usb_dmac0: dma-controller@e65a 711 usb_dmac0: dma-controller@e65a0000 {
719 compatible = "renesas, 712 compatible = "renesas,r8a77990-usb-dmac",
720 "renesas, 713 "renesas,usb-dmac";
721 reg = <0 0xe65a0000 0 714 reg = <0 0xe65a0000 0 0x100>;
722 interrupts = <GIC_SPI 715 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
723 <GIC_SPI 716 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
724 interrupt-names = "ch0 717 interrupt-names = "ch0", "ch1";
725 clocks = <&cpg CPG_MOD 718 clocks = <&cpg CPG_MOD 330>;
726 power-domains = <&sysc 719 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
727 resets = <&cpg 330>; 720 resets = <&cpg 330>;
728 #dma-cells = <1>; 721 #dma-cells = <1>;
729 dma-channels = <2>; 722 dma-channels = <2>;
730 }; 723 };
731 724
732 usb_dmac1: dma-controller@e65b 725 usb_dmac1: dma-controller@e65b0000 {
733 compatible = "renesas, 726 compatible = "renesas,r8a77990-usb-dmac",
734 "renesas, 727 "renesas,usb-dmac";
735 reg = <0 0xe65b0000 0 728 reg = <0 0xe65b0000 0 0x100>;
736 interrupts = <GIC_SPI 729 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
737 <GIC_SPI 730 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
738 interrupt-names = "ch0 731 interrupt-names = "ch0", "ch1";
739 clocks = <&cpg CPG_MOD 732 clocks = <&cpg CPG_MOD 331>;
740 power-domains = <&sysc 733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
741 resets = <&cpg 331>; 734 resets = <&cpg 331>;
742 #dma-cells = <1>; 735 #dma-cells = <1>;
743 dma-channels = <2>; 736 dma-channels = <2>;
744 }; 737 };
745 738
746 arm_cc630p: crypto@e6601000 { 739 arm_cc630p: crypto@e6601000 {
747 compatible = "arm,cryp 740 compatible = "arm,cryptocell-630p-ree";
748 interrupts = <GIC_SPI 741 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
749 reg = <0x0 0xe6601000 742 reg = <0x0 0xe6601000 0 0x1000>;
750 clocks = <&cpg CPG_MOD 743 clocks = <&cpg CPG_MOD 229>;
751 resets = <&cpg 229>; 744 resets = <&cpg 229>;
752 power-domains = <&sysc 745 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
753 }; 746 };
754 747
755 dmac0: dma-controller@e6700000 748 dmac0: dma-controller@e6700000 {
756 compatible = "renesas, 749 compatible = "renesas,dmac-r8a77990",
757 "renesas, 750 "renesas,rcar-dmac";
758 reg = <0 0xe6700000 0 751 reg = <0 0xe6700000 0 0x10000>;
759 interrupts = <GIC_SPI 752 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 753 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 754 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 755 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
763 <GIC_SPI 756 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
764 <GIC_SPI 757 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
765 <GIC_SPI 758 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
766 <GIC_SPI 759 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
767 <GIC_SPI 760 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
768 <GIC_SPI 761 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
769 <GIC_SPI 762 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 763 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_SPI 764 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
772 <GIC_SPI 765 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 766 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
774 <GIC_SPI 767 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
775 <GIC_SPI 768 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
776 interrupt-names = "err 769 interrupt-names = "error",
777 "ch0", 770 "ch0", "ch1", "ch2", "ch3",
778 "ch4", 771 "ch4", "ch5", "ch6", "ch7",
779 "ch8", 772 "ch8", "ch9", "ch10", "ch11",
780 "ch12" 773 "ch12", "ch13", "ch14", "ch15";
781 clocks = <&cpg CPG_MOD 774 clocks = <&cpg CPG_MOD 219>;
782 clock-names = "fck"; 775 clock-names = "fck";
783 power-domains = <&sysc 776 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
784 resets = <&cpg 219>; 777 resets = <&cpg 219>;
785 #dma-cells = <1>; 778 #dma-cells = <1>;
786 dma-channels = <16>; 779 dma-channels = <16>;
787 iommus = <&ipmmu_ds0 0 780 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
788 <&ipmmu_ds0 2>, 781 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
789 <&ipmmu_ds0 4>, 782 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
790 <&ipmmu_ds0 6>, 783 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
791 <&ipmmu_ds0 8>, 784 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
792 <&ipmmu_ds0 10> 785 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
793 <&ipmmu_ds0 12> 786 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
794 <&ipmmu_ds0 14> 787 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
795 }; 788 };
796 789
797 dmac1: dma-controller@e7300000 790 dmac1: dma-controller@e7300000 {
798 compatible = "renesas, 791 compatible = "renesas,dmac-r8a77990",
799 "renesas, 792 "renesas,rcar-dmac";
800 reg = <0 0xe7300000 0 793 reg = <0 0xe7300000 0 0x10000>;
801 interrupts = <GIC_SPI 794 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 795 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 796 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 797 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 798 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 799 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
807 <GIC_SPI 800 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
808 <GIC_SPI 801 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 802 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 803 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 804 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 805 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 806 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 807 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 808 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 809 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 810 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
818 interrupt-names = "err 811 interrupt-names = "error",
819 "ch0", 812 "ch0", "ch1", "ch2", "ch3",
820 "ch4", 813 "ch4", "ch5", "ch6", "ch7",
821 "ch8", 814 "ch8", "ch9", "ch10", "ch11",
822 "ch12" 815 "ch12", "ch13", "ch14", "ch15";
823 clocks = <&cpg CPG_MOD 816 clocks = <&cpg CPG_MOD 218>;
824 clock-names = "fck"; 817 clock-names = "fck";
825 power-domains = <&sysc 818 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
826 resets = <&cpg 218>; 819 resets = <&cpg 218>;
827 #dma-cells = <1>; 820 #dma-cells = <1>;
828 dma-channels = <16>; 821 dma-channels = <16>;
829 iommus = <&ipmmu_ds1 0 822 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
830 <&ipmmu_ds1 2>, 823 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
831 <&ipmmu_ds1 4>, 824 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
832 <&ipmmu_ds1 6>, 825 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
833 <&ipmmu_ds1 8>, 826 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
834 <&ipmmu_ds1 10> 827 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
835 <&ipmmu_ds1 12> 828 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
836 <&ipmmu_ds1 14> 829 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
837 }; 830 };
838 831
839 dmac2: dma-controller@e7310000 832 dmac2: dma-controller@e7310000 {
840 compatible = "renesas, 833 compatible = "renesas,dmac-r8a77990",
841 "renesas, 834 "renesas,rcar-dmac";
842 reg = <0 0xe7310000 0 835 reg = <0 0xe7310000 0 0x10000>;
843 interrupts = <GIC_SPI 836 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
844 <GIC_SPI 837 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 838 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
846 <GIC_SPI 839 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
847 <GIC_SPI 840 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 841 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
849 <GIC_SPI 842 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
850 <GIC_SPI 843 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 844 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 845 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 846 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 847 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 848 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 849 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 850 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 851 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 852 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
860 interrupt-names = "err 853 interrupt-names = "error",
861 "ch0", 854 "ch0", "ch1", "ch2", "ch3",
862 "ch4", 855 "ch4", "ch5", "ch6", "ch7",
863 "ch8", 856 "ch8", "ch9", "ch10", "ch11",
864 "ch12" 857 "ch12", "ch13", "ch14", "ch15";
865 clocks = <&cpg CPG_MOD 858 clocks = <&cpg CPG_MOD 217>;
866 clock-names = "fck"; 859 clock-names = "fck";
867 power-domains = <&sysc 860 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
868 resets = <&cpg 217>; 861 resets = <&cpg 217>;
869 #dma-cells = <1>; 862 #dma-cells = <1>;
870 dma-channels = <16>; 863 dma-channels = <16>;
871 iommus = <&ipmmu_ds1 1 864 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
872 <&ipmmu_ds1 18> 865 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
873 <&ipmmu_ds1 20> 866 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
874 <&ipmmu_ds1 22> 867 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
875 <&ipmmu_ds1 24> 868 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
876 <&ipmmu_ds1 26> 869 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
877 <&ipmmu_ds1 28> 870 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
878 <&ipmmu_ds1 30> 871 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
879 }; 872 };
880 873
881 ipmmu_ds0: iommu@e6740000 { 874 ipmmu_ds0: iommu@e6740000 {
882 compatible = "renesas, 875 compatible = "renesas,ipmmu-r8a77990";
883 reg = <0 0xe6740000 0 876 reg = <0 0xe6740000 0 0x1000>;
884 renesas,ipmmu-main = < 877 renesas,ipmmu-main = <&ipmmu_mm 0>;
885 power-domains = <&sysc 878 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
886 #iommu-cells = <1>; 879 #iommu-cells = <1>;
887 }; 880 };
888 881
889 ipmmu_ds1: iommu@e7740000 { 882 ipmmu_ds1: iommu@e7740000 {
890 compatible = "renesas, 883 compatible = "renesas,ipmmu-r8a77990";
891 reg = <0 0xe7740000 0 884 reg = <0 0xe7740000 0 0x1000>;
892 renesas,ipmmu-main = < 885 renesas,ipmmu-main = <&ipmmu_mm 1>;
893 power-domains = <&sysc 886 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
894 #iommu-cells = <1>; 887 #iommu-cells = <1>;
895 }; 888 };
896 889
897 ipmmu_hc: iommu@e6570000 { 890 ipmmu_hc: iommu@e6570000 {
898 compatible = "renesas, 891 compatible = "renesas,ipmmu-r8a77990";
899 reg = <0 0xe6570000 0 892 reg = <0 0xe6570000 0 0x1000>;
900 renesas,ipmmu-main = < 893 renesas,ipmmu-main = <&ipmmu_mm 2>;
901 power-domains = <&sysc 894 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
902 #iommu-cells = <1>; 895 #iommu-cells = <1>;
903 }; 896 };
904 897
905 ipmmu_mm: iommu@e67b0000 { 898 ipmmu_mm: iommu@e67b0000 {
906 compatible = "renesas, 899 compatible = "renesas,ipmmu-r8a77990";
907 reg = <0 0xe67b0000 0 900 reg = <0 0xe67b0000 0 0x1000>;
908 interrupts = <GIC_SPI 901 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
909 <GIC_SPI 902 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
910 power-domains = <&sysc 903 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
911 #iommu-cells = <1>; 904 #iommu-cells = <1>;
912 }; 905 };
913 906
914 ipmmu_mp: iommu@ec670000 { 907 ipmmu_mp: iommu@ec670000 {
915 compatible = "renesas, 908 compatible = "renesas,ipmmu-r8a77990";
916 reg = <0 0xec670000 0 909 reg = <0 0xec670000 0 0x1000>;
917 renesas,ipmmu-main = < 910 renesas,ipmmu-main = <&ipmmu_mm 4>;
918 power-domains = <&sysc 911 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
919 #iommu-cells = <1>; 912 #iommu-cells = <1>;
920 }; 913 };
921 914
922 ipmmu_pv0: iommu@fd800000 { 915 ipmmu_pv0: iommu@fd800000 {
923 compatible = "renesas, 916 compatible = "renesas,ipmmu-r8a77990";
924 reg = <0 0xfd800000 0 917 reg = <0 0xfd800000 0 0x1000>;
925 renesas,ipmmu-main = < 918 renesas,ipmmu-main = <&ipmmu_mm 6>;
926 power-domains = <&sysc 919 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
927 #iommu-cells = <1>; 920 #iommu-cells = <1>;
928 }; 921 };
929 922
930 ipmmu_rt: iommu@ffc80000 { 923 ipmmu_rt: iommu@ffc80000 {
931 compatible = "renesas, 924 compatible = "renesas,ipmmu-r8a77990";
932 reg = <0 0xffc80000 0 925 reg = <0 0xffc80000 0 0x1000>;
933 renesas,ipmmu-main = < 926 renesas,ipmmu-main = <&ipmmu_mm 10>;
934 power-domains = <&sysc 927 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
935 #iommu-cells = <1>; 928 #iommu-cells = <1>;
936 }; 929 };
937 930
938 ipmmu_vc0: iommu@fe6b0000 { 931 ipmmu_vc0: iommu@fe6b0000 {
939 compatible = "renesas, 932 compatible = "renesas,ipmmu-r8a77990";
940 reg = <0 0xfe6b0000 0 933 reg = <0 0xfe6b0000 0 0x1000>;
941 renesas,ipmmu-main = < 934 renesas,ipmmu-main = <&ipmmu_mm 12>;
942 power-domains = <&sysc 935 power-domains = <&sysc R8A77990_PD_A3VC>;
943 #iommu-cells = <1>; 936 #iommu-cells = <1>;
944 }; 937 };
945 938
946 ipmmu_vi0: iommu@febd0000 { 939 ipmmu_vi0: iommu@febd0000 {
947 compatible = "renesas, 940 compatible = "renesas,ipmmu-r8a77990";
948 reg = <0 0xfebd0000 0 941 reg = <0 0xfebd0000 0 0x1000>;
949 renesas,ipmmu-main = < 942 renesas,ipmmu-main = <&ipmmu_mm 14>;
950 power-domains = <&sysc 943 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
951 #iommu-cells = <1>; 944 #iommu-cells = <1>;
952 }; 945 };
953 946
954 ipmmu_vp0: iommu@fe990000 { 947 ipmmu_vp0: iommu@fe990000 {
955 compatible = "renesas, 948 compatible = "renesas,ipmmu-r8a77990";
956 reg = <0 0xfe990000 0 949 reg = <0 0xfe990000 0 0x1000>;
957 renesas,ipmmu-main = < 950 renesas,ipmmu-main = <&ipmmu_mm 16>;
958 power-domains = <&sysc 951 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
959 #iommu-cells = <1>; 952 #iommu-cells = <1>;
960 }; 953 };
961 954
962 avb: ethernet@e6800000 { 955 avb: ethernet@e6800000 {
963 compatible = "renesas, 956 compatible = "renesas,etheravb-r8a77990",
964 "renesas, 957 "renesas,etheravb-rcar-gen3";
965 reg = <0 0xe6800000 0 958 reg = <0 0xe6800000 0 0x800>;
966 interrupts = <GIC_SPI 959 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 960 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 961 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 962 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 963 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 964 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 965 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
973 <GIC_SPI 966 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
974 <GIC_SPI 967 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 968 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 969 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
977 <GIC_SPI 970 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
978 <GIC_SPI 971 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
979 <GIC_SPI 972 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
980 <GIC_SPI 973 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
981 <GIC_SPI 974 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
982 <GIC_SPI 975 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
983 <GIC_SPI 976 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
984 <GIC_SPI 977 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
985 <GIC_SPI 978 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
986 <GIC_SPI 979 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
987 <GIC_SPI 980 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
988 <GIC_SPI 981 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
989 <GIC_SPI 982 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
990 <GIC_SPI 983 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
991 interrupt-names = "ch0 984 interrupt-names = "ch0", "ch1", "ch2", "ch3",
992 "ch4 985 "ch4", "ch5", "ch6", "ch7",
993 "ch8 986 "ch8", "ch9", "ch10", "ch11",
994 "ch1 987 "ch12", "ch13", "ch14", "ch15",
995 "ch1 988 "ch16", "ch17", "ch18", "ch19",
996 "ch2 989 "ch20", "ch21", "ch22", "ch23",
997 "ch2 990 "ch24";
998 clocks = <&cpg CPG_MOD 991 clocks = <&cpg CPG_MOD 812>;
999 clock-names = "fck"; 992 clock-names = "fck";
1000 power-domains = <&sys 993 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1001 resets = <&cpg 812>; 994 resets = <&cpg 812>;
1002 phy-mode = "rgmii"; 995 phy-mode = "rgmii";
1003 rx-internal-delay-ps 996 rx-internal-delay-ps = <0>;
1004 iommus = <&ipmmu_ds0 997 iommus = <&ipmmu_ds0 16>;
1005 #address-cells = <1>; 998 #address-cells = <1>;
1006 #size-cells = <0>; 999 #size-cells = <0>;
1007 status = "disabled"; 1000 status = "disabled";
1008 }; 1001 };
1009 1002
1010 can0: can@e6c30000 { 1003 can0: can@e6c30000 {
1011 compatible = "renesas 1004 compatible = "renesas,can-r8a77990",
1012 "renesas 1005 "renesas,rcar-gen3-can";
1013 reg = <0 0xe6c30000 0 1006 reg = <0 0xe6c30000 0 0x1000>;
1014 interrupts = <GIC_SPI 1007 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1015 clocks = <&cpg CPG_MO 1008 clocks = <&cpg CPG_MOD 916>,
1016 <&cpg CPG_CORE 1009 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1017 <&can_clk>; 1010 <&can_clk>;
1018 clock-names = "clkp1" 1011 clock-names = "clkp1", "clkp2", "can_clk";
1019 assigned-clocks = <&c 1012 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1020 assigned-clock-rates 1013 assigned-clock-rates = <40000000>;
1021 power-domains = <&sys 1014 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1022 resets = <&cpg 916>; 1015 resets = <&cpg 916>;
1023 status = "disabled"; 1016 status = "disabled";
1024 }; 1017 };
1025 1018
1026 can1: can@e6c38000 { 1019 can1: can@e6c38000 {
1027 compatible = "renesas 1020 compatible = "renesas,can-r8a77990",
1028 "renesas 1021 "renesas,rcar-gen3-can";
1029 reg = <0 0xe6c38000 0 1022 reg = <0 0xe6c38000 0 0x1000>;
1030 interrupts = <GIC_SPI 1023 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&cpg CPG_MO 1024 clocks = <&cpg CPG_MOD 915>,
1032 <&cpg CPG_CORE 1025 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1033 <&can_clk>; 1026 <&can_clk>;
1034 clock-names = "clkp1" 1027 clock-names = "clkp1", "clkp2", "can_clk";
1035 assigned-clocks = <&c 1028 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1036 assigned-clock-rates 1029 assigned-clock-rates = <40000000>;
1037 power-domains = <&sys 1030 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1038 resets = <&cpg 915>; 1031 resets = <&cpg 915>;
1039 status = "disabled"; 1032 status = "disabled";
1040 }; 1033 };
1041 1034
1042 canfd: can@e66c0000 { 1035 canfd: can@e66c0000 {
1043 compatible = "renesas 1036 compatible = "renesas,r8a77990-canfd",
1044 "renesas 1037 "renesas,rcar-gen3-canfd";
1045 reg = <0 0xe66c0000 0 1038 reg = <0 0xe66c0000 0 0x8000>;
1046 interrupts = <GIC_SPI 1039 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1047 <GIC_SPI 3 1040 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1048 interrupt-names = "ch 1041 interrupt-names = "ch_int", "g_int";
1049 clocks = <&cpg CPG_MO 1042 clocks = <&cpg CPG_MOD 914>,
1050 <&cpg CPG_CORE 1043 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1051 <&can_clk>; 1044 <&can_clk>;
1052 clock-names = "fck", 1045 clock-names = "fck", "canfd", "can_clk";
1053 assigned-clocks = <&c 1046 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1054 assigned-clock-rates 1047 assigned-clock-rates = <40000000>;
1055 power-domains = <&sys 1048 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1056 resets = <&cpg 914>; 1049 resets = <&cpg 914>;
1057 status = "disabled"; 1050 status = "disabled";
1058 1051
1059 channel0 { 1052 channel0 {
1060 status = "dis 1053 status = "disabled";
1061 }; 1054 };
1062 1055
1063 channel1 { 1056 channel1 {
1064 status = "dis 1057 status = "disabled";
1065 }; 1058 };
1066 }; 1059 };
1067 1060
1068 pwm0: pwm@e6e30000 { 1061 pwm0: pwm@e6e30000 {
1069 compatible = "renesas 1062 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1070 reg = <0 0xe6e30000 0 1063 reg = <0 0xe6e30000 0 0x8>;
1071 clocks = <&cpg CPG_MO 1064 clocks = <&cpg CPG_MOD 523>;
1072 power-domains = <&sys 1065 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1073 resets = <&cpg 523>; 1066 resets = <&cpg 523>;
1074 #pwm-cells = <2>; 1067 #pwm-cells = <2>;
1075 status = "disabled"; 1068 status = "disabled";
1076 }; 1069 };
1077 1070
1078 pwm1: pwm@e6e31000 { 1071 pwm1: pwm@e6e31000 {
1079 compatible = "renesas 1072 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1080 reg = <0 0xe6e31000 0 1073 reg = <0 0xe6e31000 0 0x8>;
1081 clocks = <&cpg CPG_MO 1074 clocks = <&cpg CPG_MOD 523>;
1082 power-domains = <&sys 1075 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1083 resets = <&cpg 523>; 1076 resets = <&cpg 523>;
1084 #pwm-cells = <2>; 1077 #pwm-cells = <2>;
1085 status = "disabled"; 1078 status = "disabled";
1086 }; 1079 };
1087 1080
1088 pwm2: pwm@e6e32000 { 1081 pwm2: pwm@e6e32000 {
1089 compatible = "renesas 1082 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1090 reg = <0 0xe6e32000 0 1083 reg = <0 0xe6e32000 0 0x8>;
1091 clocks = <&cpg CPG_MO 1084 clocks = <&cpg CPG_MOD 523>;
1092 power-domains = <&sys 1085 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1093 resets = <&cpg 523>; 1086 resets = <&cpg 523>;
1094 #pwm-cells = <2>; 1087 #pwm-cells = <2>;
1095 status = "disabled"; 1088 status = "disabled";
1096 }; 1089 };
1097 1090
1098 pwm3: pwm@e6e33000 { 1091 pwm3: pwm@e6e33000 {
1099 compatible = "renesas 1092 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1100 reg = <0 0xe6e33000 0 1093 reg = <0 0xe6e33000 0 0x8>;
1101 clocks = <&cpg CPG_MO 1094 clocks = <&cpg CPG_MOD 523>;
1102 power-domains = <&sys 1095 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1103 resets = <&cpg 523>; 1096 resets = <&cpg 523>;
1104 #pwm-cells = <2>; 1097 #pwm-cells = <2>;
1105 status = "disabled"; 1098 status = "disabled";
1106 }; 1099 };
1107 1100
1108 pwm4: pwm@e6e34000 { 1101 pwm4: pwm@e6e34000 {
1109 compatible = "renesas 1102 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1110 reg = <0 0xe6e34000 0 1103 reg = <0 0xe6e34000 0 0x8>;
1111 clocks = <&cpg CPG_MO 1104 clocks = <&cpg CPG_MOD 523>;
1112 power-domains = <&sys 1105 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1113 resets = <&cpg 523>; 1106 resets = <&cpg 523>;
1114 #pwm-cells = <2>; 1107 #pwm-cells = <2>;
1115 status = "disabled"; 1108 status = "disabled";
1116 }; 1109 };
1117 1110
1118 pwm5: pwm@e6e35000 { 1111 pwm5: pwm@e6e35000 {
1119 compatible = "renesas 1112 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1120 reg = <0 0xe6e35000 0 1113 reg = <0 0xe6e35000 0 0x8>;
1121 clocks = <&cpg CPG_MO 1114 clocks = <&cpg CPG_MOD 523>;
1122 power-domains = <&sys 1115 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1123 resets = <&cpg 523>; 1116 resets = <&cpg 523>;
1124 #pwm-cells = <2>; 1117 #pwm-cells = <2>;
1125 status = "disabled"; 1118 status = "disabled";
1126 }; 1119 };
1127 1120
1128 pwm6: pwm@e6e36000 { 1121 pwm6: pwm@e6e36000 {
1129 compatible = "renesas 1122 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1130 reg = <0 0xe6e36000 0 1123 reg = <0 0xe6e36000 0 0x8>;
1131 clocks = <&cpg CPG_MO 1124 clocks = <&cpg CPG_MOD 523>;
1132 power-domains = <&sys 1125 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1133 resets = <&cpg 523>; 1126 resets = <&cpg 523>;
1134 #pwm-cells = <2>; 1127 #pwm-cells = <2>;
1135 status = "disabled"; 1128 status = "disabled";
1136 }; 1129 };
1137 1130
1138 scif0: serial@e6e60000 { 1131 scif0: serial@e6e60000 {
1139 compatible = "renesas 1132 compatible = "renesas,scif-r8a77990",
1140 "renesas 1133 "renesas,rcar-gen3-scif", "renesas,scif";
1141 reg = <0 0xe6e60000 0 1134 reg = <0 0xe6e60000 0 64>;
1142 interrupts = <GIC_SPI 1135 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1143 clocks = <&cpg CPG_MO 1136 clocks = <&cpg CPG_MOD 207>,
1144 <&cpg CPG_CO 1137 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1145 <&scif_clk>; 1138 <&scif_clk>;
1146 clock-names = "fck", 1139 clock-names = "fck", "brg_int", "scif_clk";
1147 dmas = <&dmac1 0x51>, 1140 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1148 <&dmac2 0x51>, 1141 <&dmac2 0x51>, <&dmac2 0x50>;
1149 dma-names = "tx", "rx 1142 dma-names = "tx", "rx", "tx", "rx";
1150 power-domains = <&sys 1143 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1151 resets = <&cpg 207>; 1144 resets = <&cpg 207>;
1152 status = "disabled"; 1145 status = "disabled";
1153 }; 1146 };
1154 1147
1155 scif1: serial@e6e68000 { 1148 scif1: serial@e6e68000 {
1156 compatible = "renesas 1149 compatible = "renesas,scif-r8a77990",
1157 "renesas 1150 "renesas,rcar-gen3-scif", "renesas,scif";
1158 reg = <0 0xe6e68000 0 1151 reg = <0 0xe6e68000 0 64>;
1159 interrupts = <GIC_SPI 1152 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1160 clocks = <&cpg CPG_MO 1153 clocks = <&cpg CPG_MOD 206>,
1161 <&cpg CPG_CO 1154 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1162 <&scif_clk>; 1155 <&scif_clk>;
1163 clock-names = "fck", 1156 clock-names = "fck", "brg_int", "scif_clk";
1164 dmas = <&dmac1 0x53>, 1157 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1165 <&dmac2 0x53>, 1158 <&dmac2 0x53>, <&dmac2 0x52>;
1166 dma-names = "tx", "rx 1159 dma-names = "tx", "rx", "tx", "rx";
1167 power-domains = <&sys 1160 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1168 resets = <&cpg 206>; 1161 resets = <&cpg 206>;
1169 status = "disabled"; 1162 status = "disabled";
1170 }; 1163 };
1171 1164
1172 scif2: serial@e6e88000 { 1165 scif2: serial@e6e88000 {
1173 compatible = "renesas 1166 compatible = "renesas,scif-r8a77990",
1174 "renesas 1167 "renesas,rcar-gen3-scif", "renesas,scif";
1175 reg = <0 0xe6e88000 0 1168 reg = <0 0xe6e88000 0 64>;
1176 interrupts = <GIC_SPI 1169 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1177 clocks = <&cpg CPG_MO 1170 clocks = <&cpg CPG_MOD 310>,
1178 <&cpg CPG_CO 1171 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1179 <&scif_clk>; 1172 <&scif_clk>;
1180 clock-names = "fck", 1173 clock-names = "fck", "brg_int", "scif_clk";
1181 dmas = <&dmac1 0x13>, 1174 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1182 <&dmac2 0x13>, 1175 <&dmac2 0x13>, <&dmac2 0x12>;
1183 dma-names = "tx", "rx 1176 dma-names = "tx", "rx", "tx", "rx";
1184 power-domains = <&sys 1177 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1185 resets = <&cpg 310>; 1178 resets = <&cpg 310>;
1186 status = "disabled"; 1179 status = "disabled";
1187 }; 1180 };
1188 1181
1189 scif3: serial@e6c50000 { 1182 scif3: serial@e6c50000 {
1190 compatible = "renesas 1183 compatible = "renesas,scif-r8a77990",
1191 "renesas 1184 "renesas,rcar-gen3-scif", "renesas,scif";
1192 reg = <0 0xe6c50000 0 1185 reg = <0 0xe6c50000 0 64>;
1193 interrupts = <GIC_SPI 1186 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1194 clocks = <&cpg CPG_MO 1187 clocks = <&cpg CPG_MOD 204>,
1195 <&cpg CPG_CO 1188 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1196 <&scif_clk>; 1189 <&scif_clk>;
1197 clock-names = "fck", 1190 clock-names = "fck", "brg_int", "scif_clk";
1198 dmas = <&dmac0 0x57>, 1191 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1199 dma-names = "tx", "rx 1192 dma-names = "tx", "rx";
1200 power-domains = <&sys 1193 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1201 resets = <&cpg 204>; 1194 resets = <&cpg 204>;
1202 status = "disabled"; 1195 status = "disabled";
1203 }; 1196 };
1204 1197
1205 scif4: serial@e6c40000 { 1198 scif4: serial@e6c40000 {
1206 compatible = "renesas 1199 compatible = "renesas,scif-r8a77990",
1207 "renesas 1200 "renesas,rcar-gen3-scif", "renesas,scif";
1208 reg = <0 0xe6c40000 0 1201 reg = <0 0xe6c40000 0 64>;
1209 interrupts = <GIC_SPI 1202 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1203 clocks = <&cpg CPG_MOD 203>,
1211 <&cpg CPG_CO 1204 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1212 <&scif_clk>; 1205 <&scif_clk>;
1213 clock-names = "fck", 1206 clock-names = "fck", "brg_int", "scif_clk";
1214 dmas = <&dmac0 0x59>, 1207 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1215 dma-names = "tx", "rx 1208 dma-names = "tx", "rx";
1216 power-domains = <&sys 1209 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1217 resets = <&cpg 203>; 1210 resets = <&cpg 203>;
1218 status = "disabled"; 1211 status = "disabled";
1219 }; 1212 };
1220 1213
1221 scif5: serial@e6f30000 { 1214 scif5: serial@e6f30000 {
1222 compatible = "renesas 1215 compatible = "renesas,scif-r8a77990",
1223 "renesas 1216 "renesas,rcar-gen3-scif", "renesas,scif";
1224 reg = <0 0xe6f30000 0 1217 reg = <0 0xe6f30000 0 64>;
1225 interrupts = <GIC_SPI 1218 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1226 clocks = <&cpg CPG_MO 1219 clocks = <&cpg CPG_MOD 202>,
1227 <&cpg CPG_CO 1220 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1228 <&scif_clk>; 1221 <&scif_clk>;
1229 clock-names = "fck", 1222 clock-names = "fck", "brg_int", "scif_clk";
1230 dmas = <&dmac0 0x5b>, 1223 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1231 dma-names = "tx", "rx 1224 dma-names = "tx", "rx";
1232 power-domains = <&sys 1225 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1233 resets = <&cpg 202>; 1226 resets = <&cpg 202>;
1234 status = "disabled"; 1227 status = "disabled";
1235 }; 1228 };
1236 1229
1237 msiof0: spi@e6e90000 { 1230 msiof0: spi@e6e90000 {
1238 compatible = "renesas 1231 compatible = "renesas,msiof-r8a77990",
1239 "renesas 1232 "renesas,rcar-gen3-msiof";
1240 reg = <0 0xe6e90000 0 1233 reg = <0 0xe6e90000 0 0x0064>;
1241 interrupts = <GIC_SPI 1234 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1242 clocks = <&cpg CPG_MO 1235 clocks = <&cpg CPG_MOD 211>;
1243 dmas = <&dmac1 0x41>, 1236 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1244 <&dmac2 0x41>, 1237 <&dmac2 0x41>, <&dmac2 0x40>;
1245 dma-names = "tx", "rx 1238 dma-names = "tx", "rx", "tx", "rx";
1246 power-domains = <&sys 1239 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1247 resets = <&cpg 211>; 1240 resets = <&cpg 211>;
1248 #address-cells = <1>; 1241 #address-cells = <1>;
1249 #size-cells = <0>; 1242 #size-cells = <0>;
1250 status = "disabled"; 1243 status = "disabled";
1251 }; 1244 };
1252 1245
1253 msiof1: spi@e6ea0000 { 1246 msiof1: spi@e6ea0000 {
1254 compatible = "renesas 1247 compatible = "renesas,msiof-r8a77990",
1255 "renesas 1248 "renesas,rcar-gen3-msiof";
1256 reg = <0 0xe6ea0000 0 1249 reg = <0 0xe6ea0000 0 0x0064>;
1257 interrupts = <GIC_SPI 1250 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1258 clocks = <&cpg CPG_MO 1251 clocks = <&cpg CPG_MOD 210>;
1259 dmas = <&dmac0 0x43>, 1252 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1260 dma-names = "tx", "rx 1253 dma-names = "tx", "rx";
1261 power-domains = <&sys 1254 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1262 resets = <&cpg 210>; 1255 resets = <&cpg 210>;
1263 #address-cells = <1>; 1256 #address-cells = <1>;
1264 #size-cells = <0>; 1257 #size-cells = <0>;
1265 status = "disabled"; 1258 status = "disabled";
1266 }; 1259 };
1267 1260
1268 msiof2: spi@e6c00000 { 1261 msiof2: spi@e6c00000 {
1269 compatible = "renesas 1262 compatible = "renesas,msiof-r8a77990",
1270 "renesas 1263 "renesas,rcar-gen3-msiof";
1271 reg = <0 0xe6c00000 0 1264 reg = <0 0xe6c00000 0 0x0064>;
1272 interrupts = <GIC_SPI 1265 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1273 clocks = <&cpg CPG_MO 1266 clocks = <&cpg CPG_MOD 209>;
1274 dmas = <&dmac0 0x45>, 1267 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1275 dma-names = "tx", "rx 1268 dma-names = "tx", "rx";
1276 power-domains = <&sys 1269 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1277 resets = <&cpg 209>; 1270 resets = <&cpg 209>;
1278 #address-cells = <1>; 1271 #address-cells = <1>;
1279 #size-cells = <0>; 1272 #size-cells = <0>;
1280 status = "disabled"; 1273 status = "disabled";
1281 }; 1274 };
1282 1275
1283 msiof3: spi@e6c10000 { 1276 msiof3: spi@e6c10000 {
1284 compatible = "renesas 1277 compatible = "renesas,msiof-r8a77990",
1285 "renesas 1278 "renesas,rcar-gen3-msiof";
1286 reg = <0 0xe6c10000 0 1279 reg = <0 0xe6c10000 0 0x0064>;
1287 interrupts = <GIC_SPI 1280 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1288 clocks = <&cpg CPG_MO 1281 clocks = <&cpg CPG_MOD 208>;
1289 dmas = <&dmac0 0x47>, 1282 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1290 dma-names = "tx", "rx 1283 dma-names = "tx", "rx";
1291 power-domains = <&sys 1284 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1292 resets = <&cpg 208>; 1285 resets = <&cpg 208>;
1293 #address-cells = <1>; 1286 #address-cells = <1>;
1294 #size-cells = <0>; 1287 #size-cells = <0>;
1295 status = "disabled"; 1288 status = "disabled";
1296 }; 1289 };
1297 1290
1298 vin4: video@e6ef4000 { 1291 vin4: video@e6ef4000 {
1299 compatible = "renesas 1292 compatible = "renesas,vin-r8a77990";
1300 reg = <0 0xe6ef4000 0 1293 reg = <0 0xe6ef4000 0 0x1000>;
1301 interrupts = <GIC_SPI 1294 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1302 clocks = <&cpg CPG_MO 1295 clocks = <&cpg CPG_MOD 807>;
1303 power-domains = <&sys 1296 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1304 resets = <&cpg 807>; 1297 resets = <&cpg 807>;
1305 renesas,id = <4>; 1298 renesas,id = <4>;
1306 status = "disabled"; 1299 status = "disabled";
1307 1300
1308 ports { 1301 ports {
1309 #address-cell 1302 #address-cells = <1>;
1310 #size-cells = 1303 #size-cells = <0>;
1311 1304
1312 port@1 { 1305 port@1 {
1313 #addr 1306 #address-cells = <1>;
1314 #size 1307 #size-cells = <0>;
1315 1308
1316 reg = 1309 reg = <1>;
1317 1310
1318 vin4c 1311 vin4csi40: endpoint@2 {
1319 1312 reg = <2>;
1320 1313 remote-endpoint = <&csi40vin4>;
1321 }; 1314 };
1322 }; 1315 };
1323 }; 1316 };
1324 }; 1317 };
1325 1318
1326 vin5: video@e6ef5000 { 1319 vin5: video@e6ef5000 {
1327 compatible = "renesas 1320 compatible = "renesas,vin-r8a77990";
1328 reg = <0 0xe6ef5000 0 1321 reg = <0 0xe6ef5000 0 0x1000>;
1329 interrupts = <GIC_SPI 1322 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1330 clocks = <&cpg CPG_MO 1323 clocks = <&cpg CPG_MOD 806>;
1331 power-domains = <&sys 1324 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1332 resets = <&cpg 806>; 1325 resets = <&cpg 806>;
1333 renesas,id = <5>; 1326 renesas,id = <5>;
1334 status = "disabled"; 1327 status = "disabled";
1335 1328
1336 ports { 1329 ports {
1337 #address-cell 1330 #address-cells = <1>;
1338 #size-cells = 1331 #size-cells = <0>;
1339 1332
1340 port@1 { 1333 port@1 {
1341 #addr 1334 #address-cells = <1>;
1342 #size 1335 #size-cells = <0>;
1343 1336
1344 reg = 1337 reg = <1>;
1345 1338
1346 vin5c 1339 vin5csi40: endpoint@2 {
1347 1340 reg = <2>;
1348 1341 remote-endpoint = <&csi40vin5>;
1349 }; 1342 };
1350 }; 1343 };
1351 }; 1344 };
1352 }; 1345 };
1353 1346
1354 drif00: rif@e6f40000 { 1347 drif00: rif@e6f40000 {
1355 compatible = "renesas 1348 compatible = "renesas,r8a77990-drif",
1356 "renesas 1349 "renesas,rcar-gen3-drif";
1357 reg = <0 0xe6f40000 0 1350 reg = <0 0xe6f40000 0 0x84>;
1358 interrupts = <GIC_SPI 1351 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1359 clocks = <&cpg CPG_MO 1352 clocks = <&cpg CPG_MOD 515>;
1360 clock-names = "fck"; 1353 clock-names = "fck";
1361 dmas = <&dmac1 0x20>, 1354 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1362 dma-names = "rx", "rx 1355 dma-names = "rx", "rx";
1363 power-domains = <&sys 1356 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1364 resets = <&cpg 515>; 1357 resets = <&cpg 515>;
1365 renesas,bonding = <&d 1358 renesas,bonding = <&drif01>;
1366 status = "disabled"; 1359 status = "disabled";
1367 }; 1360 };
1368 1361
1369 drif01: rif@e6f50000 { 1362 drif01: rif@e6f50000 {
1370 compatible = "renesas 1363 compatible = "renesas,r8a77990-drif",
1371 "renesas 1364 "renesas,rcar-gen3-drif";
1372 reg = <0 0xe6f50000 0 1365 reg = <0 0xe6f50000 0 0x84>;
1373 interrupts = <GIC_SPI 1366 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1374 clocks = <&cpg CPG_MO 1367 clocks = <&cpg CPG_MOD 514>;
1375 clock-names = "fck"; 1368 clock-names = "fck";
1376 dmas = <&dmac1 0x22>, 1369 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1377 dma-names = "rx", "rx 1370 dma-names = "rx", "rx";
1378 power-domains = <&sys 1371 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1379 resets = <&cpg 514>; 1372 resets = <&cpg 514>;
1380 renesas,bonding = <&d 1373 renesas,bonding = <&drif00>;
1381 status = "disabled"; 1374 status = "disabled";
1382 }; 1375 };
1383 1376
1384 drif10: rif@e6f60000 { 1377 drif10: rif@e6f60000 {
1385 compatible = "renesas 1378 compatible = "renesas,r8a77990-drif",
1386 "renesas 1379 "renesas,rcar-gen3-drif";
1387 reg = <0 0xe6f60000 0 1380 reg = <0 0xe6f60000 0 0x84>;
1388 interrupts = <GIC_SPI 1381 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1389 clocks = <&cpg CPG_MO 1382 clocks = <&cpg CPG_MOD 513>;
1390 clock-names = "fck"; 1383 clock-names = "fck";
1391 dmas = <&dmac1 0x24>, 1384 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1392 dma-names = "rx", "rx 1385 dma-names = "rx", "rx";
1393 power-domains = <&sys 1386 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1394 resets = <&cpg 513>; 1387 resets = <&cpg 513>;
1395 renesas,bonding = <&d 1388 renesas,bonding = <&drif11>;
1396 status = "disabled"; 1389 status = "disabled";
1397 }; 1390 };
1398 1391
1399 drif11: rif@e6f70000 { 1392 drif11: rif@e6f70000 {
1400 compatible = "renesas 1393 compatible = "renesas,r8a77990-drif",
1401 "renesas 1394 "renesas,rcar-gen3-drif";
1402 reg = <0 0xe6f70000 0 1395 reg = <0 0xe6f70000 0 0x84>;
1403 interrupts = <GIC_SPI 1396 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1404 clocks = <&cpg CPG_MO 1397 clocks = <&cpg CPG_MOD 512>;
1405 clock-names = "fck"; 1398 clock-names = "fck";
1406 dmas = <&dmac1 0x26>, 1399 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1407 dma-names = "rx", "rx 1400 dma-names = "rx", "rx";
1408 power-domains = <&sys 1401 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1409 resets = <&cpg 512>; 1402 resets = <&cpg 512>;
1410 renesas,bonding = <&d 1403 renesas,bonding = <&drif10>;
1411 status = "disabled"; 1404 status = "disabled";
1412 }; 1405 };
1413 1406
1414 drif20: rif@e6f80000 { 1407 drif20: rif@e6f80000 {
1415 compatible = "renesas 1408 compatible = "renesas,r8a77990-drif",
1416 "renesas 1409 "renesas,rcar-gen3-drif";
1417 reg = <0 0xe6f80000 0 1410 reg = <0 0xe6f80000 0 0x84>;
1418 interrupts = <GIC_SPI 1411 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1419 clocks = <&cpg CPG_MO 1412 clocks = <&cpg CPG_MOD 511>;
1420 clock-names = "fck"; 1413 clock-names = "fck";
1421 dmas = <&dmac0 0x28>; 1414 dmas = <&dmac0 0x28>;
1422 dma-names = "rx"; 1415 dma-names = "rx";
1423 power-domains = <&sys 1416 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1424 resets = <&cpg 511>; 1417 resets = <&cpg 511>;
1425 renesas,bonding = <&d 1418 renesas,bonding = <&drif21>;
1426 status = "disabled"; 1419 status = "disabled";
1427 }; 1420 };
1428 1421
1429 drif21: rif@e6f90000 { 1422 drif21: rif@e6f90000 {
1430 compatible = "renesas 1423 compatible = "renesas,r8a77990-drif",
1431 "renesas 1424 "renesas,rcar-gen3-drif";
1432 reg = <0 0xe6f90000 0 1425 reg = <0 0xe6f90000 0 0x84>;
1433 interrupts = <GIC_SPI 1426 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1434 clocks = <&cpg CPG_MO 1427 clocks = <&cpg CPG_MOD 510>;
1435 clock-names = "fck"; 1428 clock-names = "fck";
1436 dmas = <&dmac0 0x2a>; 1429 dmas = <&dmac0 0x2a>;
1437 dma-names = "rx"; 1430 dma-names = "rx";
1438 power-domains = <&sys 1431 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1439 resets = <&cpg 510>; 1432 resets = <&cpg 510>;
1440 renesas,bonding = <&d 1433 renesas,bonding = <&drif20>;
1441 status = "disabled"; 1434 status = "disabled";
1442 }; 1435 };
1443 1436
1444 drif30: rif@e6fa0000 { 1437 drif30: rif@e6fa0000 {
1445 compatible = "renesas 1438 compatible = "renesas,r8a77990-drif",
1446 "renesas 1439 "renesas,rcar-gen3-drif";
1447 reg = <0 0xe6fa0000 0 1440 reg = <0 0xe6fa0000 0 0x84>;
1448 interrupts = <GIC_SPI 1441 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1449 clocks = <&cpg CPG_MO 1442 clocks = <&cpg CPG_MOD 509>;
1450 clock-names = "fck"; 1443 clock-names = "fck";
1451 dmas = <&dmac0 0x2c>; 1444 dmas = <&dmac0 0x2c>;
1452 dma-names = "rx"; 1445 dma-names = "rx";
1453 power-domains = <&sys 1446 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1454 resets = <&cpg 509>; 1447 resets = <&cpg 509>;
1455 renesas,bonding = <&d 1448 renesas,bonding = <&drif31>;
1456 status = "disabled"; 1449 status = "disabled";
1457 }; 1450 };
1458 1451
1459 drif31: rif@e6fb0000 { 1452 drif31: rif@e6fb0000 {
1460 compatible = "renesas 1453 compatible = "renesas,r8a77990-drif",
1461 "renesas 1454 "renesas,rcar-gen3-drif";
1462 reg = <0 0xe6fb0000 0 1455 reg = <0 0xe6fb0000 0 0x84>;
1463 interrupts = <GIC_SPI 1456 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1464 clocks = <&cpg CPG_MO 1457 clocks = <&cpg CPG_MOD 508>;
1465 clock-names = "fck"; 1458 clock-names = "fck";
1466 dmas = <&dmac0 0x2e>; 1459 dmas = <&dmac0 0x2e>;
1467 dma-names = "rx"; 1460 dma-names = "rx";
1468 power-domains = <&sys 1461 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1469 resets = <&cpg 508>; 1462 resets = <&cpg 508>;
1470 renesas,bonding = <&d 1463 renesas,bonding = <&drif30>;
1471 status = "disabled"; 1464 status = "disabled";
1472 }; 1465 };
1473 1466
1474 rcar_sound: sound@ec500000 { 1467 rcar_sound: sound@ec500000 {
1475 /* 1468 /*
1476 * #sound-dai-cells i 1469 * #sound-dai-cells is required if simple-card
1477 * 1470 *
1478 * Single DAI : #soun 1471 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1479 * Multi DAI : #soun 1472 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1480 */ 1473 */
1481 /* 1474 /*
1482 * #clock-cells is re 1475 * #clock-cells is required for audio_clkout0/1/2/3
1483 * 1476 *
1484 * clkout : #cl 1477 * clkout : #clock-cells = <0>; <&rcar_sound>;
1485 * clkout0/1/2/3: #cl 1478 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1486 */ 1479 */
1487 compatible = "renesas 1480 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1488 reg = <0 0xec500000 0 1481 reg = <0 0xec500000 0 0x1000>, /* SCU */
1489 <0 0xec5a0000 0 1482 <0 0xec5a0000 0 0x100>, /* ADG */
1490 <0 0xec540000 0 1483 <0 0xec540000 0 0x1000>, /* SSIU */
1491 <0 0xec541000 0 1484 <0 0xec541000 0 0x280>, /* SSI */
1492 <0 0xec760000 0 1485 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1493 reg-names = "scu", "a 1486 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1494 1487
1495 clocks = <&cpg CPG_MO 1488 clocks = <&cpg CPG_MOD 1005>,
1496 <&cpg CPG_MO 1489 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1497 <&cpg CPG_MO 1490 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1498 <&cpg CPG_MO 1491 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1499 <&cpg CPG_MO 1492 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1500 <&cpg CPG_MO 1493 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1501 <&cpg CPG_MO 1494 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1502 <&cpg CPG_MO 1495 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1503 <&cpg CPG_MO 1496 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1504 <&cpg CPG_MO 1497 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1505 <&cpg CPG_MO 1498 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1506 <&cpg CPG_MO 1499 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1507 <&cpg CPG_MO 1500 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1508 <&cpg CPG_MO 1501 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1509 <&audio_clk_ 1502 <&audio_clk_a>, <&audio_clk_b>,
1510 <&audio_clk_ 1503 <&audio_clk_c>,
1511 <&cpg CPG_MO !! 1504 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1512 clock-names = "ssi-al 1505 clock-names = "ssi-all",
1513 "ssi.9" 1506 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1514 "ssi.5" 1507 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1515 "ssi.1" 1508 "ssi.1", "ssi.0",
1516 "src.9" 1509 "src.9", "src.8", "src.7", "src.6",
1517 "src.5" 1510 "src.5", "src.4", "src.3", "src.2",
1518 "src.1" 1511 "src.1", "src.0",
1519 "mix.1" 1512 "mix.1", "mix.0",
1520 "ctu.1" 1513 "ctu.1", "ctu.0",
1521 "dvc.0" 1514 "dvc.0", "dvc.1",
1522 "clk_a" 1515 "clk_a", "clk_b", "clk_c", "clk_i";
1523 power-domains = <&sys 1516 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1524 resets = <&cpg 1005>, 1517 resets = <&cpg 1005>,
1525 <&cpg 1006>, 1518 <&cpg 1006>, <&cpg 1007>,
1526 <&cpg 1008>, 1519 <&cpg 1008>, <&cpg 1009>,
1527 <&cpg 1010>, 1520 <&cpg 1010>, <&cpg 1011>,
1528 <&cpg 1012>, 1521 <&cpg 1012>, <&cpg 1013>,
1529 <&cpg 1014>, 1522 <&cpg 1014>, <&cpg 1015>;
1530 reset-names = "ssi-al 1523 reset-names = "ssi-all",
1531 "ssi.9" 1524 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1532 "ssi.5" 1525 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1533 "ssi.1" 1526 "ssi.1", "ssi.0";
1534 status = "disabled"; 1527 status = "disabled";
1535 1528
1536 rcar_sound,ctu { 1529 rcar_sound,ctu {
1537 ctu00: ctu-0 1530 ctu00: ctu-0 { };
1538 ctu01: ctu-1 1531 ctu01: ctu-1 { };
1539 ctu02: ctu-2 1532 ctu02: ctu-2 { };
1540 ctu03: ctu-3 1533 ctu03: ctu-3 { };
1541 ctu10: ctu-4 1534 ctu10: ctu-4 { };
1542 ctu11: ctu-5 1535 ctu11: ctu-5 { };
1543 ctu12: ctu-6 1536 ctu12: ctu-6 { };
1544 ctu13: ctu-7 1537 ctu13: ctu-7 { };
1545 }; 1538 };
1546 1539
1547 rcar_sound,dvc { 1540 rcar_sound,dvc {
1548 dvc0: dvc-0 { 1541 dvc0: dvc-0 {
1549 dmas 1542 dmas = <&audma0 0xbc>;
1550 dma-n 1543 dma-names = "tx";
1551 }; 1544 };
1552 dvc1: dvc-1 { 1545 dvc1: dvc-1 {
1553 dmas 1546 dmas = <&audma0 0xbe>;
1554 dma-n 1547 dma-names = "tx";
1555 }; 1548 };
1556 }; 1549 };
1557 1550
1558 rcar_sound,mix { 1551 rcar_sound,mix {
1559 mix0: mix-0 { 1552 mix0: mix-0 { };
1560 mix1: mix-1 { 1553 mix1: mix-1 { };
1561 }; 1554 };
1562 1555
1563 rcar_sound,src { 1556 rcar_sound,src {
1564 src0: src-0 { 1557 src0: src-0 {
1565 inter 1558 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1566 dmas 1559 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1567 dma-n 1560 dma-names = "rx", "tx";
1568 }; 1561 };
1569 src1: src-1 { 1562 src1: src-1 {
1570 inter 1563 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1571 dmas 1564 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1572 dma-n 1565 dma-names = "rx", "tx";
1573 }; 1566 };
1574 src2: src-2 { 1567 src2: src-2 {
1575 inter 1568 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1576 dmas 1569 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1577 dma-n 1570 dma-names = "rx", "tx";
1578 }; 1571 };
1579 src3: src-3 { 1572 src3: src-3 {
1580 inter 1573 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1581 dmas 1574 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1582 dma-n 1575 dma-names = "rx", "tx";
1583 }; 1576 };
1584 src4: src-4 { 1577 src4: src-4 {
1585 inter 1578 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas 1579 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1587 dma-n 1580 dma-names = "rx", "tx";
1588 }; 1581 };
1589 src5: src-5 { 1582 src5: src-5 {
1590 inter 1583 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1591 dmas 1584 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1592 dma-n 1585 dma-names = "rx", "tx";
1593 }; 1586 };
1594 src6: src-6 { 1587 src6: src-6 {
1595 inter 1588 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1596 dmas 1589 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1597 dma-n 1590 dma-names = "rx", "tx";
1598 }; 1591 };
1599 src7: src-7 { 1592 src7: src-7 {
1600 inter 1593 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1601 dmas 1594 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1602 dma-n 1595 dma-names = "rx", "tx";
1603 }; 1596 };
1604 src8: src-8 { 1597 src8: src-8 {
1605 inter 1598 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1606 dmas 1599 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1607 dma-n 1600 dma-names = "rx", "tx";
1608 }; 1601 };
1609 src9: src-9 { 1602 src9: src-9 {
1610 inter 1603 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1611 dmas 1604 dmas = <&audma0 0x97>, <&audma0 0xba>;
1612 dma-n 1605 dma-names = "rx", "tx";
1613 }; 1606 };
1614 }; 1607 };
1615 1608
1616 rcar_sound,ssi { 1609 rcar_sound,ssi {
1617 ssi0: ssi-0 { 1610 ssi0: ssi-0 {
1618 inter 1611 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1619 dmas 1612 dmas = <&audma0 0x01>, <&audma0 0x02>,
1620 1613 <&audma0 0x15>, <&audma0 0x16>;
1621 dma-n 1614 dma-names = "rx", "tx", "rxu", "txu";
1622 }; 1615 };
1623 ssi1: ssi-1 { 1616 ssi1: ssi-1 {
1624 inter 1617 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1625 dmas 1618 dmas = <&audma0 0x03>, <&audma0 0x04>,
1626 1619 <&audma0 0x49>, <&audma0 0x4a>;
1627 dma-n 1620 dma-names = "rx", "tx", "rxu", "txu";
1628 }; 1621 };
1629 ssi2: ssi-2 { 1622 ssi2: ssi-2 {
1630 inter 1623 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1631 dmas 1624 dmas = <&audma0 0x05>, <&audma0 0x06>,
1632 1625 <&audma0 0x63>, <&audma0 0x64>;
1633 dma-n 1626 dma-names = "rx", "tx", "rxu", "txu";
1634 }; 1627 };
1635 ssi3: ssi-3 { 1628 ssi3: ssi-3 {
1636 inter 1629 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1637 dmas 1630 dmas = <&audma0 0x07>, <&audma0 0x08>,
1638 1631 <&audma0 0x6f>, <&audma0 0x70>;
1639 dma-n 1632 dma-names = "rx", "tx", "rxu", "txu";
1640 }; 1633 };
1641 ssi4: ssi-4 { 1634 ssi4: ssi-4 {
1642 inter 1635 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1643 dmas 1636 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1644 1637 <&audma0 0x71>, <&audma0 0x72>;
1645 dma-n 1638 dma-names = "rx", "tx", "rxu", "txu";
1646 }; 1639 };
1647 ssi5: ssi-5 { 1640 ssi5: ssi-5 {
1648 inter 1641 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1649 dmas 1642 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1650 1643 <&audma0 0x73>, <&audma0 0x74>;
1651 dma-n 1644 dma-names = "rx", "tx", "rxu", "txu";
1652 }; 1645 };
1653 ssi6: ssi-6 { 1646 ssi6: ssi-6 {
1654 inter 1647 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1655 dmas 1648 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1656 1649 <&audma0 0x75>, <&audma0 0x76>;
1657 dma-n 1650 dma-names = "rx", "tx", "rxu", "txu";
1658 }; 1651 };
1659 ssi7: ssi-7 { 1652 ssi7: ssi-7 {
1660 inter 1653 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1661 dmas 1654 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1662 1655 <&audma0 0x79>, <&audma0 0x7a>;
1663 dma-n 1656 dma-names = "rx", "tx", "rxu", "txu";
1664 }; 1657 };
1665 ssi8: ssi-8 { 1658 ssi8: ssi-8 {
1666 inter 1659 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1667 dmas 1660 dmas = <&audma0 0x11>, <&audma0 0x12>,
1668 1661 <&audma0 0x7b>, <&audma0 0x7c>;
1669 dma-n 1662 dma-names = "rx", "tx", "rxu", "txu";
1670 }; 1663 };
1671 ssi9: ssi-9 { 1664 ssi9: ssi-9 {
1672 inter 1665 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1673 dmas 1666 dmas = <&audma0 0x13>, <&audma0 0x14>,
1674 1667 <&audma0 0x7d>, <&audma0 0x7e>;
1675 dma-n 1668 dma-names = "rx", "tx", "rxu", "txu";
1676 }; 1669 };
1677 }; 1670 };
1678 }; 1671 };
1679 1672
1680 mlp: mlp@ec520000 { 1673 mlp: mlp@ec520000 {
1681 compatible = "renesas 1674 compatible = "renesas,r8a77990-mlp",
1682 "renesas 1675 "renesas,rcar-gen3-mlp";
1683 reg = <0 0xec520000 0 1676 reg = <0 0xec520000 0 0x800>;
1684 interrupts = <GIC_SPI 1677 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
1685 <GIC_SPI 385 1678 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
1686 clocks = <&cpg CPG_MO 1679 clocks = <&cpg CPG_MOD 802>;
1687 power-domains = <&sys 1680 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1688 resets = <&cpg 802>; 1681 resets = <&cpg 802>;
1689 status = "disabled"; 1682 status = "disabled";
1690 }; 1683 };
1691 1684
1692 audma0: dma-controller@ec7000 1685 audma0: dma-controller@ec700000 {
1693 compatible = "renesas 1686 compatible = "renesas,dmac-r8a77990",
1694 "renesas 1687 "renesas,rcar-dmac";
1695 reg = <0 0xec700000 0 1688 reg = <0 0xec700000 0 0x10000>;
1696 interrupts = <GIC_SPI 1689 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1697 <GIC_SPI 1690 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1698 <GIC_SPI 1691 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1699 <GIC_SPI 1692 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1700 <GIC_SPI 1693 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1701 <GIC_SPI 1694 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1702 <GIC_SPI 1695 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1703 <GIC_SPI 1696 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1704 <GIC_SPI 1697 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1705 <GIC_SPI 1698 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1706 <GIC_SPI 1699 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1707 <GIC_SPI 1700 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1708 <GIC_SPI 1701 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1709 <GIC_SPI 1702 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1710 <GIC_SPI 1703 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1711 <GIC_SPI 1704 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1712 <GIC_SPI 1705 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1713 interrupt-names = "er 1706 interrupt-names = "error",
1714 "ch0" 1707 "ch0", "ch1", "ch2", "ch3",
1715 "ch4" 1708 "ch4", "ch5", "ch6", "ch7",
1716 "ch8" 1709 "ch8", "ch9", "ch10", "ch11",
1717 "ch12 1710 "ch12", "ch13", "ch14", "ch15";
1718 clocks = <&cpg CPG_MO 1711 clocks = <&cpg CPG_MOD 502>;
1719 clock-names = "fck"; 1712 clock-names = "fck";
1720 power-domains = <&sys 1713 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1721 resets = <&cpg 502>; 1714 resets = <&cpg 502>;
1722 #dma-cells = <1>; 1715 #dma-cells = <1>;
1723 dma-channels = <16>; 1716 dma-channels = <16>;
1724 iommus = <&ipmmu_mp 0 1717 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1725 <&ipmmu_mp 2 1718 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1726 <&ipmmu_mp 4 1719 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1727 <&ipmmu_mp 6 1720 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1728 <&ipmmu_mp 8 1721 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1729 <&ipmmu_mp 1 1722 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1730 <&ipmmu_mp 1 1723 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1731 <&ipmmu_mp 1 1724 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1732 }; 1725 };
1733 1726
1734 xhci0: usb@ee000000 { 1727 xhci0: usb@ee000000 {
1735 compatible = "renesas 1728 compatible = "renesas,xhci-r8a77990",
1736 "renesas 1729 "renesas,rcar-gen3-xhci";
1737 reg = <0 0xee000000 0 1730 reg = <0 0xee000000 0 0xc00>;
1738 interrupts = <GIC_SPI 1731 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1739 clocks = <&cpg CPG_MO 1732 clocks = <&cpg CPG_MOD 328>;
1740 power-domains = <&sys 1733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1741 resets = <&cpg 328>; 1734 resets = <&cpg 328>;
1742 status = "disabled"; 1735 status = "disabled";
1743 }; 1736 };
1744 1737
1745 usb3_peri0: usb@ee020000 { 1738 usb3_peri0: usb@ee020000 {
1746 compatible = "renesas 1739 compatible = "renesas,r8a77990-usb3-peri",
1747 "renesas 1740 "renesas,rcar-gen3-usb3-peri";
1748 reg = <0 0xee020000 0 1741 reg = <0 0xee020000 0 0x400>;
1749 interrupts = <GIC_SPI 1742 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1750 clocks = <&cpg CPG_MO 1743 clocks = <&cpg CPG_MOD 328>;
1751 power-domains = <&sys 1744 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1752 resets = <&cpg 328>; 1745 resets = <&cpg 328>;
1753 status = "disabled"; 1746 status = "disabled";
1754 }; 1747 };
1755 1748
1756 ohci0: usb@ee080000 { 1749 ohci0: usb@ee080000 {
1757 compatible = "generic 1750 compatible = "generic-ohci";
1758 reg = <0 0xee080000 0 1751 reg = <0 0xee080000 0 0x100>;
1759 interrupts = <GIC_SPI 1752 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1760 clocks = <&cpg CPG_MO 1753 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1761 phys = <&usb2_phy0 1> 1754 phys = <&usb2_phy0 1>;
1762 phy-names = "usb"; 1755 phy-names = "usb";
1763 power-domains = <&sys 1756 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1764 resets = <&cpg 703>, 1757 resets = <&cpg 703>, <&cpg 704>;
1765 status = "disabled"; 1758 status = "disabled";
1766 }; 1759 };
1767 1760
1768 ehci0: usb@ee080100 { 1761 ehci0: usb@ee080100 {
1769 compatible = "generic 1762 compatible = "generic-ehci";
1770 reg = <0 0xee080100 0 1763 reg = <0 0xee080100 0 0x100>;
1771 interrupts = <GIC_SPI 1764 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1772 clocks = <&cpg CPG_MO 1765 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1773 phys = <&usb2_phy0 2> 1766 phys = <&usb2_phy0 2>;
1774 phy-names = "usb"; 1767 phy-names = "usb";
1775 companion = <&ohci0>; 1768 companion = <&ohci0>;
1776 power-domains = <&sys 1769 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1777 resets = <&cpg 703>, 1770 resets = <&cpg 703>, <&cpg 704>;
1778 status = "disabled"; 1771 status = "disabled";
1779 }; 1772 };
1780 1773
1781 usb2_phy0: usb-phy@ee080200 { 1774 usb2_phy0: usb-phy@ee080200 {
1782 compatible = "renesas 1775 compatible = "renesas,usb2-phy-r8a77990",
1783 "renesas 1776 "renesas,rcar-gen3-usb2-phy";
1784 reg = <0 0xee080200 0 1777 reg = <0 0xee080200 0 0x700>;
1785 interrupts = <GIC_SPI 1778 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1786 clocks = <&cpg CPG_MO 1779 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1787 power-domains = <&sys 1780 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1788 resets = <&cpg 703>, 1781 resets = <&cpg 703>, <&cpg 704>;
1789 #phy-cells = <1>; 1782 #phy-cells = <1>;
1790 status = "disabled"; 1783 status = "disabled";
1791 }; 1784 };
1792 1785
1793 sdhi0: mmc@ee100000 { 1786 sdhi0: mmc@ee100000 {
1794 compatible = "renesas 1787 compatible = "renesas,sdhi-r8a77990",
1795 "renesas 1788 "renesas,rcar-gen3-sdhi";
1796 reg = <0 0xee100000 0 1789 reg = <0 0xee100000 0 0x2000>;
1797 interrupts = <GIC_SPI 1790 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1798 clocks = <&cpg CPG_MO 1791 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>;
1799 clock-names = "core", 1792 clock-names = "core", "clkh";
1800 max-frequency = <2000 1793 max-frequency = <200000000>;
1801 power-domains = <&sys 1794 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1802 resets = <&cpg 314>; 1795 resets = <&cpg 314>;
1803 iommus = <&ipmmu_ds1 1796 iommus = <&ipmmu_ds1 32>;
1804 status = "disabled"; 1797 status = "disabled";
1805 }; 1798 };
1806 1799
1807 sdhi1: mmc@ee120000 { 1800 sdhi1: mmc@ee120000 {
1808 compatible = "renesas 1801 compatible = "renesas,sdhi-r8a77990",
1809 "renesas 1802 "renesas,rcar-gen3-sdhi";
1810 reg = <0 0xee120000 0 1803 reg = <0 0xee120000 0 0x2000>;
1811 interrupts = <GIC_SPI 1804 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1812 clocks = <&cpg CPG_MO 1805 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>;
1813 clock-names = "core", 1806 clock-names = "core", "clkh";
1814 max-frequency = <2000 1807 max-frequency = <200000000>;
1815 power-domains = <&sys 1808 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1816 resets = <&cpg 313>; 1809 resets = <&cpg 313>;
1817 iommus = <&ipmmu_ds1 1810 iommus = <&ipmmu_ds1 33>;
1818 status = "disabled"; 1811 status = "disabled";
1819 }; 1812 };
1820 1813
1821 sdhi3: mmc@ee160000 { 1814 sdhi3: mmc@ee160000 {
1822 compatible = "renesas 1815 compatible = "renesas,sdhi-r8a77990",
1823 "renesas 1816 "renesas,rcar-gen3-sdhi";
1824 reg = <0 0xee160000 0 1817 reg = <0 0xee160000 0 0x2000>;
1825 interrupts = <GIC_SPI 1818 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1826 clocks = <&cpg CPG_MO 1819 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>;
1827 clock-names = "core", 1820 clock-names = "core", "clkh";
1828 max-frequency = <2000 1821 max-frequency = <200000000>;
1829 power-domains = <&sys 1822 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1830 resets = <&cpg 311>; 1823 resets = <&cpg 311>;
1831 iommus = <&ipmmu_ds1 1824 iommus = <&ipmmu_ds1 35>;
1832 status = "disabled"; 1825 status = "disabled";
1833 }; 1826 };
1834 1827
1835 rpc: spi@ee200000 { 1828 rpc: spi@ee200000 {
1836 compatible = "renesas 1829 compatible = "renesas,r8a77990-rpc-if",
1837 "renesas 1830 "renesas,rcar-gen3-rpc-if";
1838 reg = <0 0xee200000 0 1831 reg = <0 0xee200000 0 0x200>,
1839 <0 0x08000000 0 1832 <0 0x08000000 0 0x04000000>,
1840 <0 0xee208000 0 1833 <0 0xee208000 0 0x100>;
1841 reg-names = "regs", " 1834 reg-names = "regs", "dirmap", "wbuf";
1842 interrupts = <GIC_SPI 1835 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1843 clocks = <&cpg CPG_MO 1836 clocks = <&cpg CPG_MOD 917>;
1844 power-domains = <&sys 1837 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1845 resets = <&cpg 917>; 1838 resets = <&cpg 917>;
1846 #address-cells = <1>; 1839 #address-cells = <1>;
1847 #size-cells = <0>; 1840 #size-cells = <0>;
1848 status = "disabled"; 1841 status = "disabled";
1849 }; 1842 };
1850 1843
1851 gic: interrupt-controller@f10 1844 gic: interrupt-controller@f1010000 {
1852 compatible = "arm,gic 1845 compatible = "arm,gic-400";
1853 #interrupt-cells = <3 1846 #interrupt-cells = <3>;
1854 #address-cells = <0>; 1847 #address-cells = <0>;
1855 interrupt-controller; 1848 interrupt-controller;
1856 reg = <0x0 0xf1010000 1849 reg = <0x0 0xf1010000 0 0x1000>,
1857 <0x0 0xf1020000 1850 <0x0 0xf1020000 0 0x20000>,
1858 <0x0 0xf1040000 1851 <0x0 0xf1040000 0 0x20000>,
1859 <0x0 0xf1060000 1852 <0x0 0xf1060000 0 0x20000>;
1860 interrupts = <GIC_PPI 1853 interrupts = <GIC_PPI 9
1861 (GIC_ 1854 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1862 clocks = <&cpg CPG_MO 1855 clocks = <&cpg CPG_MOD 408>;
1863 clock-names = "clk"; 1856 clock-names = "clk";
1864 power-domains = <&sys 1857 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1865 resets = <&cpg 408>; 1858 resets = <&cpg 408>;
1866 }; 1859 };
1867 1860
1868 pciec0: pcie@fe000000 { 1861 pciec0: pcie@fe000000 {
1869 compatible = "renesas 1862 compatible = "renesas,pcie-r8a77990",
1870 "renesas 1863 "renesas,pcie-rcar-gen3";
1871 reg = <0 0xfe000000 0 1864 reg = <0 0xfe000000 0 0x80000>;
1872 #address-cells = <3>; 1865 #address-cells = <3>;
1873 #size-cells = <2>; 1866 #size-cells = <2>;
1874 bus-range = <0x00 0xf 1867 bus-range = <0x00 0xff>;
1875 device_type = "pci"; 1868 device_type = "pci";
1876 ranges = <0x01000000 1869 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1877 <0x02000000 1870 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1878 <0x02000000 1871 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1879 <0x42000000 1872 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1880 /* Map all possible D !! 1873 /* Map all possible DDR as inbound ranges */
1881 dma-ranges = <0x42000 !! 1874 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1882 interrupts = <GIC_SPI 1875 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1883 <GIC_SPI 1876 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1884 <GIC_SPI 1877 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1885 #interrupt-cells = <1 1878 #interrupt-cells = <1>;
1886 interrupt-map-mask = 1879 interrupt-map-mask = <0 0 0 0>;
1887 interrupt-map = <0 0 1880 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1888 clocks = <&cpg CPG_MO 1881 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1889 clock-names = "pcie", 1882 clock-names = "pcie", "pcie_bus";
1890 power-domains = <&sys 1883 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1891 resets = <&cpg 319>; 1884 resets = <&cpg 319>;
1892 iommu-map = <0 &ipmmu <<
1893 iommu-map-mask = <0>; <<
1894 status = "disabled"; 1885 status = "disabled";
1895 }; 1886 };
1896 1887
1897 vspb0: vsp@fe960000 { 1888 vspb0: vsp@fe960000 {
1898 compatible = "renesas 1889 compatible = "renesas,vsp2";
1899 reg = <0 0xfe960000 0 1890 reg = <0 0xfe960000 0 0x8000>;
1900 interrupts = <GIC_SPI 1891 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1901 clocks = <&cpg CPG_MO 1892 clocks = <&cpg CPG_MOD 626>;
1902 power-domains = <&sys 1893 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1903 resets = <&cpg 626>; 1894 resets = <&cpg 626>;
1904 renesas,fcp = <&fcpvb 1895 renesas,fcp = <&fcpvb0>;
1905 }; 1896 };
1906 1897
1907 fcpvb0: fcp@fe96f000 { 1898 fcpvb0: fcp@fe96f000 {
1908 compatible = "renesas 1899 compatible = "renesas,fcpv";
1909 reg = <0 0xfe96f000 0 1900 reg = <0 0xfe96f000 0 0x200>;
1910 clocks = <&cpg CPG_MO 1901 clocks = <&cpg CPG_MOD 607>;
1911 power-domains = <&sys 1902 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1912 resets = <&cpg 607>; 1903 resets = <&cpg 607>;
1913 iommus = <&ipmmu_vp0 1904 iommus = <&ipmmu_vp0 5>;
1914 }; 1905 };
1915 1906
1916 vspi0: vsp@fe9a0000 { 1907 vspi0: vsp@fe9a0000 {
1917 compatible = "renesas 1908 compatible = "renesas,vsp2";
1918 reg = <0 0xfe9a0000 0 1909 reg = <0 0xfe9a0000 0 0x8000>;
1919 interrupts = <GIC_SPI 1910 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1920 clocks = <&cpg CPG_MO 1911 clocks = <&cpg CPG_MOD 631>;
1921 power-domains = <&sys 1912 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1922 resets = <&cpg 631>; 1913 resets = <&cpg 631>;
1923 renesas,fcp = <&fcpvi 1914 renesas,fcp = <&fcpvi0>;
1924 }; 1915 };
1925 1916
1926 fcpvi0: fcp@fe9af000 { 1917 fcpvi0: fcp@fe9af000 {
1927 compatible = "renesas 1918 compatible = "renesas,fcpv";
1928 reg = <0 0xfe9af000 0 1919 reg = <0 0xfe9af000 0 0x200>;
1929 clocks = <&cpg CPG_MO 1920 clocks = <&cpg CPG_MOD 611>;
1930 power-domains = <&sys 1921 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1931 resets = <&cpg 611>; 1922 resets = <&cpg 611>;
1932 iommus = <&ipmmu_vp0 1923 iommus = <&ipmmu_vp0 8>;
1933 }; 1924 };
1934 1925
1935 vspd0: vsp@fea20000 { 1926 vspd0: vsp@fea20000 {
1936 compatible = "renesas 1927 compatible = "renesas,vsp2";
1937 reg = <0 0xfea20000 0 1928 reg = <0 0xfea20000 0 0x7000>;
1938 interrupts = <GIC_SPI 1929 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1939 clocks = <&cpg CPG_MO 1930 clocks = <&cpg CPG_MOD 623>;
1940 power-domains = <&sys 1931 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1941 resets = <&cpg 623>; 1932 resets = <&cpg 623>;
1942 renesas,fcp = <&fcpvd 1933 renesas,fcp = <&fcpvd0>;
1943 }; 1934 };
1944 1935
1945 fcpvd0: fcp@fea27000 { 1936 fcpvd0: fcp@fea27000 {
1946 compatible = "renesas 1937 compatible = "renesas,fcpv";
1947 reg = <0 0xfea27000 0 1938 reg = <0 0xfea27000 0 0x200>;
1948 clocks = <&cpg CPG_MO 1939 clocks = <&cpg CPG_MOD 603>;
1949 power-domains = <&sys 1940 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1950 resets = <&cpg 603>; 1941 resets = <&cpg 603>;
1951 iommus = <&ipmmu_vi0 1942 iommus = <&ipmmu_vi0 8>;
1952 }; 1943 };
1953 1944
1954 vspd1: vsp@fea28000 { 1945 vspd1: vsp@fea28000 {
1955 compatible = "renesas 1946 compatible = "renesas,vsp2";
1956 reg = <0 0xfea28000 0 1947 reg = <0 0xfea28000 0 0x7000>;
1957 interrupts = <GIC_SPI 1948 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1958 clocks = <&cpg CPG_MO 1949 clocks = <&cpg CPG_MOD 622>;
1959 power-domains = <&sys 1950 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1960 resets = <&cpg 622>; 1951 resets = <&cpg 622>;
1961 renesas,fcp = <&fcpvd 1952 renesas,fcp = <&fcpvd1>;
1962 }; 1953 };
1963 1954
1964 fcpvd1: fcp@fea2f000 { 1955 fcpvd1: fcp@fea2f000 {
1965 compatible = "renesas 1956 compatible = "renesas,fcpv";
1966 reg = <0 0xfea2f000 0 1957 reg = <0 0xfea2f000 0 0x200>;
1967 clocks = <&cpg CPG_MO 1958 clocks = <&cpg CPG_MOD 602>;
1968 power-domains = <&sys 1959 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1969 resets = <&cpg 602>; 1960 resets = <&cpg 602>;
1970 iommus = <&ipmmu_vi0 1961 iommus = <&ipmmu_vi0 9>;
1971 }; 1962 };
1972 1963
1973 cmm0: cmm@fea40000 { 1964 cmm0: cmm@fea40000 {
1974 compatible = "renesas 1965 compatible = "renesas,r8a77990-cmm",
1975 "renesas 1966 "renesas,rcar-gen3-cmm";
1976 reg = <0 0xfea40000 0 1967 reg = <0 0xfea40000 0 0x1000>;
1977 power-domains = <&sys 1968 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1978 clocks = <&cpg CPG_MO 1969 clocks = <&cpg CPG_MOD 711>;
1979 resets = <&cpg 711>; 1970 resets = <&cpg 711>;
1980 }; 1971 };
1981 1972
1982 cmm1: cmm@fea50000 { 1973 cmm1: cmm@fea50000 {
1983 compatible = "renesas 1974 compatible = "renesas,r8a77990-cmm",
1984 "renesas 1975 "renesas,rcar-gen3-cmm";
1985 reg = <0 0xfea50000 0 1976 reg = <0 0xfea50000 0 0x1000>;
1986 power-domains = <&sys 1977 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1987 clocks = <&cpg CPG_MO 1978 clocks = <&cpg CPG_MOD 710>;
1988 resets = <&cpg 710>; 1979 resets = <&cpg 710>;
1989 }; 1980 };
1990 1981
1991 csi40: csi2@feaa0000 { 1982 csi40: csi2@feaa0000 {
1992 compatible = "renesas 1983 compatible = "renesas,r8a77990-csi2";
1993 reg = <0 0xfeaa0000 0 1984 reg = <0 0xfeaa0000 0 0x10000>;
1994 interrupts = <GIC_SPI 1985 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1995 clocks = <&cpg CPG_MO 1986 clocks = <&cpg CPG_MOD 716>;
1996 power-domains = <&sys 1987 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1997 resets = <&cpg 716>; 1988 resets = <&cpg 716>;
1998 status = "disabled"; 1989 status = "disabled";
1999 1990
2000 ports { 1991 ports {
2001 #address-cell 1992 #address-cells = <1>;
2002 #size-cells = 1993 #size-cells = <0>;
2003 1994
2004 port@0 { 1995 port@0 {
2005 reg = 1996 reg = <0>;
2006 }; 1997 };
2007 1998
2008 port@1 { 1999 port@1 {
2009 #addr 2000 #address-cells = <1>;
2010 #size 2001 #size-cells = <0>;
2011 2002
2012 reg = 2003 reg = <1>;
2013 2004
2014 csi40 2005 csi40vin4: endpoint@0 {
2015 2006 reg = <0>;
2016 2007 remote-endpoint = <&vin4csi40>;
2017 }; 2008 };
2018 csi40 2009 csi40vin5: endpoint@1 {
2019 2010 reg = <1>;
2020 2011 remote-endpoint = <&vin5csi40>;
2021 }; 2012 };
2022 }; 2013 };
2023 }; 2014 };
2024 }; 2015 };
2025 2016
2026 du: display@feb00000 { 2017 du: display@feb00000 {
2027 compatible = "renesas 2018 compatible = "renesas,du-r8a77990";
2028 reg = <0 0xfeb00000 0 2019 reg = <0 0xfeb00000 0 0x40000>;
2029 interrupts = <GIC_SPI 2020 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2030 <GIC_SPI 2021 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
2031 clocks = <&cpg CPG_MO 2022 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2032 clock-names = "du.0", 2023 clock-names = "du.0", "du.1";
2033 resets = <&cpg 724>; 2024 resets = <&cpg 724>;
2034 reset-names = "du.0"; 2025 reset-names = "du.0";
2035 2026
2036 renesas,cmms = <&cmm0 2027 renesas,cmms = <&cmm0>, <&cmm1>;
2037 renesas,vsps = <&vspd 2028 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2038 2029
2039 status = "disabled"; 2030 status = "disabled";
2040 2031
2041 ports { 2032 ports {
2042 #address-cell 2033 #address-cells = <1>;
2043 #size-cells = 2034 #size-cells = <0>;
2044 2035
2045 port@0 { 2036 port@0 {
2046 reg = 2037 reg = <0>;
2047 }; 2038 };
2048 2039
2049 port@1 { 2040 port@1 {
2050 reg = 2041 reg = <1>;
2051 du_ou 2042 du_out_lvds0: endpoint {
2052 2043 remote-endpoint = <&lvds0_in>;
2053 }; 2044 };
2054 }; 2045 };
2055 2046
2056 port@2 { 2047 port@2 {
2057 reg = 2048 reg = <2>;
2058 du_ou 2049 du_out_lvds1: endpoint {
2059 2050 remote-endpoint = <&lvds1_in>;
2060 }; 2051 };
2061 }; 2052 };
2062 }; 2053 };
2063 }; 2054 };
2064 2055
2065 lvds0: lvds-encoder@feb90000 2056 lvds0: lvds-encoder@feb90000 {
2066 compatible = "renesas 2057 compatible = "renesas,r8a77990-lvds";
2067 reg = <0 0xfeb90000 0 2058 reg = <0 0xfeb90000 0 0x20>;
2068 clocks = <&cpg CPG_MO 2059 clocks = <&cpg CPG_MOD 727>;
2069 power-domains = <&sys 2060 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2070 resets = <&cpg 727>; 2061 resets = <&cpg 727>;
2071 status = "disabled"; 2062 status = "disabled";
2072 2063
2073 renesas,companion = < 2064 renesas,companion = <&lvds1>;
2074 2065
2075 ports { 2066 ports {
2076 #address-cell 2067 #address-cells = <1>;
2077 #size-cells = 2068 #size-cells = <0>;
2078 2069
2079 port@0 { 2070 port@0 {
2080 reg = 2071 reg = <0>;
2081 lvds0 2072 lvds0_in: endpoint {
2082 2073 remote-endpoint = <&du_out_lvds0>;
2083 }; 2074 };
2084 }; 2075 };
2085 2076
2086 port@1 { 2077 port@1 {
2087 reg = 2078 reg = <1>;
2088 }; 2079 };
2089 }; 2080 };
2090 }; 2081 };
2091 2082
2092 lvds1: lvds-encoder@feb90100 2083 lvds1: lvds-encoder@feb90100 {
2093 compatible = "renesas 2084 compatible = "renesas,r8a77990-lvds";
2094 reg = <0 0xfeb90100 0 2085 reg = <0 0xfeb90100 0 0x20>;
2095 clocks = <&cpg CPG_MO 2086 clocks = <&cpg CPG_MOD 727>;
2096 power-domains = <&sys 2087 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2097 resets = <&cpg 726>; 2088 resets = <&cpg 726>;
2098 status = "disabled"; 2089 status = "disabled";
2099 2090
2100 ports { 2091 ports {
2101 #address-cell 2092 #address-cells = <1>;
2102 #size-cells = 2093 #size-cells = <0>;
2103 2094
2104 port@0 { 2095 port@0 {
2105 reg = 2096 reg = <0>;
2106 lvds1 2097 lvds1_in: endpoint {
2107 2098 remote-endpoint = <&du_out_lvds1>;
2108 }; 2099 };
2109 }; 2100 };
2110 2101
2111 port@1 { 2102 port@1 {
2112 reg = 2103 reg = <1>;
2113 }; 2104 };
2114 }; 2105 };
2115 }; 2106 };
2116 2107
2117 prr: chipid@fff00044 { 2108 prr: chipid@fff00044 {
2118 compatible = "renesas 2109 compatible = "renesas,prr";
2119 reg = <0 0xfff00044 0 2110 reg = <0 0xfff00044 0 4>;
2120 }; 2111 };
2121 }; 2112 };
2122 2113
2123 thermal-zones { 2114 thermal-zones {
2124 cpu-thermal { 2115 cpu-thermal {
2125 polling-delay-passive 2116 polling-delay-passive = <250>;
2126 polling-delay = <0>; 2117 polling-delay = <0>;
2127 thermal-sensors = <&t 2118 thermal-sensors = <&thermal>;
2128 sustainable-power = < 2119 sustainable-power = <717>;
2129 2120
2130 cooling-maps { 2121 cooling-maps {
2131 map0 { 2122 map0 {
2132 trip 2123 trip = <&target>;
2133 cooli 2124 cooling-device = <&a53_0 0 2>;
2134 contr 2125 contribution = <1024>;
2135 }; 2126 };
2136 }; 2127 };
2137 2128
2138 trips { 2129 trips {
2139 sensor1_crit: 2130 sensor1_crit: sensor1-crit {
2140 tempe 2131 temperature = <120000>;
2141 hyste 2132 hysteresis = <2000>;
2142 type 2133 type = "critical";
2143 }; 2134 };
2144 2135
2145 target: trip- 2136 target: trip-point1 {
2146 tempe 2137 temperature = <100000>;
2147 hyste 2138 hysteresis = <2000>;
2148 type 2139 type = "passive";
2149 }; 2140 };
2150 }; 2141 };
2151 }; 2142 };
2152 }; 2143 };
2153 2144
2154 timer { 2145 timer {
2155 compatible = "arm,armv8-timer 2146 compatible = "arm,armv8-timer";
2156 interrupts-extended = <&gic G 2147 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2157 <&gic G 2148 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2158 <&gic G 2149 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2159 <&gic G 2150 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2160 interrupt-names = "sec-phys", <<
2161 }; 2151 };
2162 }; 2152 };
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