1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the R-Car V3U (R8A77 3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC
4 * 4 *
5 * Copyright (C) 2020 Renesas Electronics Corp 5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */ 6 */
7 7
8 #include <dt-bindings/clock/r8a779a0-cpg-mssr. 8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779a0-sysc.h> 10 #include <dt-bindings/power/r8a779a0-sysc.h>
11 11
12 / { 12 / {
13 compatible = "renesas,r8a779a0"; 13 compatible = "renesas,r8a779a0";
14 #address-cells = <2>; 14 #address-cells = <2>;
15 #size-cells = <2>; 15 #size-cells = <2>;
16 16
17 /* External CAN clock - to be overridd 17 /* External CAN clock - to be overridden by boards that provide it */
18 can_clk: can { 18 can_clk: can {
19 compatible = "fixed-clock"; 19 compatible = "fixed-clock";
20 #clock-cells = <0>; 20 #clock-cells = <0>;
21 clock-frequency = <0>; 21 clock-frequency = <0>;
22 }; 22 };
23 23
24 cpus { 24 cpus {
25 #address-cells = <1>; 25 #address-cells = <1>;
26 #size-cells = <0>; 26 #size-cells = <0>;
27 27
28 a76_0: cpu@0 { 28 a76_0: cpu@0 {
29 compatible = "arm,cort 29 compatible = "arm,cortex-a76";
30 reg = <0>; 30 reg = <0>;
31 device_type = "cpu"; 31 device_type = "cpu";
32 power-domains = <&sysc 32 power-domains = <&sysc R8A779A0_PD_A1E0D0C0>;
33 next-level-cache = <&L 33 next-level-cache = <&L3_CA76_0>;
34 clocks = <&cpg CPG_COR 34 clocks = <&cpg CPG_CORE R8A779A0_CLK_Z0>;
35 }; 35 };
36 36
37 L3_CA76_0: cache-controller-0 37 L3_CA76_0: cache-controller-0 {
38 compatible = "cache"; 38 compatible = "cache";
39 power-domains = <&sysc 39 power-domains = <&sysc R8A779A0_PD_A2E0D0>;
40 cache-unified; 40 cache-unified;
41 cache-level = <3>; 41 cache-level = <3>;
42 }; 42 };
43 }; 43 };
44 44
45 extal_clk: extal { 45 extal_clk: extal {
46 compatible = "fixed-clock"; 46 compatible = "fixed-clock";
47 #clock-cells = <0>; 47 #clock-cells = <0>;
48 /* This value must be overridd 48 /* This value must be overridden by the board */
49 clock-frequency = <0>; 49 clock-frequency = <0>;
50 }; 50 };
51 51
52 extalr_clk: extalr { 52 extalr_clk: extalr {
53 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
54 #clock-cells = <0>; 54 #clock-cells = <0>;
55 /* This value must be overridd 55 /* This value must be overridden by the board */
56 clock-frequency = <0>; 56 clock-frequency = <0>;
57 }; 57 };
58 58
59 pmu_a76 { 59 pmu_a76 {
60 compatible = "arm,cortex-a76-p 60 compatible = "arm,cortex-a76-pmu";
61 interrupts-extended = <&gic GI 61 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
62 }; 62 };
63 63
64 /* External SCIF clock - to be overrid 64 /* External SCIF clock - to be overridden by boards that provide it */
65 scif_clk: scif { 65 scif_clk: scif {
66 compatible = "fixed-clock"; 66 compatible = "fixed-clock";
67 #clock-cells = <0>; 67 #clock-cells = <0>;
68 clock-frequency = <0>; 68 clock-frequency = <0>;
69 }; 69 };
70 70
71 soc: soc { 71 soc: soc {
72 compatible = "simple-bus"; 72 compatible = "simple-bus";
73 interrupt-parent = <&gic>; 73 interrupt-parent = <&gic>;
74 #address-cells = <2>; 74 #address-cells = <2>;
75 #size-cells = <2>; 75 #size-cells = <2>;
76 ranges; 76 ranges;
77 77
78 rwdt: watchdog@e6020000 { 78 rwdt: watchdog@e6020000 {
79 compatible = "renesas, 79 compatible = "renesas,r8a779a0-wdt",
80 "renesas, 80 "renesas,rcar-gen4-wdt";
81 reg = <0 0xe6020000 0 81 reg = <0 0xe6020000 0 0x0c>;
82 interrupts = <GIC_SPI 82 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
83 clocks = <&cpg CPG_MOD 83 clocks = <&cpg CPG_MOD 907>;
84 power-domains = <&sysc 84 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
85 resets = <&cpg 907>; 85 resets = <&cpg 907>;
86 status = "disabled"; 86 status = "disabled";
87 }; 87 };
88 88
89 pfc: pinctrl@e6050000 { 89 pfc: pinctrl@e6050000 {
90 compatible = "renesas, 90 compatible = "renesas,pfc-r8a779a0";
91 reg = <0 0xe6050000 0 91 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
92 <0 0xe6058000 0 92 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
93 <0 0xe6060000 0 93 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
94 <0 0xe6068000 0 94 <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>,
95 <0 0xe6069000 0 95 <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>;
96 }; 96 };
97 97
98 gpio0: gpio@e6058180 { 98 gpio0: gpio@e6058180 {
99 compatible = "renesas, 99 compatible = "renesas,gpio-r8a779a0",
100 "renesas, 100 "renesas,rcar-gen4-gpio";
101 reg = <0 0xe6058180 0 101 reg = <0 0xe6058180 0 0x54>;
102 interrupts = <GIC_SPI 102 interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>;
103 clocks = <&cpg CPG_MOD 103 clocks = <&cpg CPG_MOD 916>;
104 power-domains = <&sysc 104 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
105 resets = <&cpg 916>; 105 resets = <&cpg 916>;
106 gpio-controller; 106 gpio-controller;
107 #gpio-cells = <2>; 107 #gpio-cells = <2>;
108 gpio-ranges = <&pfc 0 108 gpio-ranges = <&pfc 0 0 28>;
109 interrupt-controller; 109 interrupt-controller;
110 #interrupt-cells = <2> 110 #interrupt-cells = <2>;
111 }; 111 };
112 112
113 gpio1: gpio@e6050180 { 113 gpio1: gpio@e6050180 {
114 compatible = "renesas, 114 compatible = "renesas,gpio-r8a779a0",
115 "renesas, 115 "renesas,rcar-gen4-gpio";
116 reg = <0 0xe6050180 0 116 reg = <0 0xe6050180 0 0x54>;
117 interrupts = <GIC_SPI 117 interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>;
118 clocks = <&cpg CPG_MOD 118 clocks = <&cpg CPG_MOD 915>;
119 power-domains = <&sysc 119 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
120 resets = <&cpg 915>; 120 resets = <&cpg 915>;
121 gpio-controller; 121 gpio-controller;
122 #gpio-cells = <2>; 122 #gpio-cells = <2>;
123 gpio-ranges = <&pfc 0 123 gpio-ranges = <&pfc 0 32 31>;
124 interrupt-controller; 124 interrupt-controller;
125 #interrupt-cells = <2> 125 #interrupt-cells = <2>;
126 }; 126 };
127 127
128 gpio2: gpio@e6050980 { 128 gpio2: gpio@e6050980 {
129 compatible = "renesas, 129 compatible = "renesas,gpio-r8a779a0",
130 "renesas, 130 "renesas,rcar-gen4-gpio";
131 reg = <0 0xe6050980 0 131 reg = <0 0xe6050980 0 0x54>;
132 interrupts = <GIC_SPI 132 interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
133 clocks = <&cpg CPG_MOD 133 clocks = <&cpg CPG_MOD 915>;
134 power-domains = <&sysc 134 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
135 resets = <&cpg 915>; 135 resets = <&cpg 915>;
136 gpio-controller; 136 gpio-controller;
137 #gpio-cells = <2>; 137 #gpio-cells = <2>;
138 gpio-ranges = <&pfc 0 138 gpio-ranges = <&pfc 0 64 25>;
139 interrupt-controller; 139 interrupt-controller;
140 #interrupt-cells = <2> 140 #interrupt-cells = <2>;
141 }; 141 };
142 142
143 gpio3: gpio@e6058980 { 143 gpio3: gpio@e6058980 {
144 compatible = "renesas, 144 compatible = "renesas,gpio-r8a779a0",
145 "renesas, 145 "renesas,rcar-gen4-gpio";
146 reg = <0 0xe6058980 0 146 reg = <0 0xe6058980 0 0x54>;
147 interrupts = <GIC_SPI 147 interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>;
148 clocks = <&cpg CPG_MOD 148 clocks = <&cpg CPG_MOD 916>;
149 power-domains = <&sysc 149 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
150 resets = <&cpg 916>; 150 resets = <&cpg 916>;
151 gpio-controller; 151 gpio-controller;
152 #gpio-cells = <2>; 152 #gpio-cells = <2>;
153 gpio-ranges = <&pfc 0 153 gpio-ranges = <&pfc 0 96 17>;
154 interrupt-controller; 154 interrupt-controller;
155 #interrupt-cells = <2> 155 #interrupt-cells = <2>;
156 }; 156 };
157 157
158 gpio4: gpio@e6060180 { 158 gpio4: gpio@e6060180 {
159 compatible = "renesas, 159 compatible = "renesas,gpio-r8a779a0",
160 "renesas, 160 "renesas,rcar-gen4-gpio";
161 reg = <0 0xe6060180 0 161 reg = <0 0xe6060180 0 0x54>;
162 interrupts = <GIC_SPI 162 interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
163 clocks = <&cpg CPG_MOD 163 clocks = <&cpg CPG_MOD 917>;
164 power-domains = <&sysc 164 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
165 resets = <&cpg 917>; 165 resets = <&cpg 917>;
166 gpio-controller; 166 gpio-controller;
167 #gpio-cells = <2>; 167 #gpio-cells = <2>;
168 gpio-ranges = <&pfc 0 168 gpio-ranges = <&pfc 0 128 27>;
169 interrupt-controller; 169 interrupt-controller;
170 #interrupt-cells = <2> 170 #interrupt-cells = <2>;
171 }; 171 };
172 172
173 gpio5: gpio@e6060980 { 173 gpio5: gpio@e6060980 {
174 compatible = "renesas, 174 compatible = "renesas,gpio-r8a779a0",
175 "renesas, 175 "renesas,rcar-gen4-gpio";
176 reg = <0 0xe6060980 0 176 reg = <0 0xe6060980 0 0x54>;
177 interrupts = <GIC_SPI 177 interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>;
178 clocks = <&cpg CPG_MOD 178 clocks = <&cpg CPG_MOD 917>;
179 power-domains = <&sysc 179 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
180 resets = <&cpg 917>; 180 resets = <&cpg 917>;
181 gpio-controller; 181 gpio-controller;
182 #gpio-cells = <2>; 182 #gpio-cells = <2>;
183 gpio-ranges = <&pfc 0 183 gpio-ranges = <&pfc 0 160 21>;
184 interrupt-controller; 184 interrupt-controller;
185 #interrupt-cells = <2> 185 #interrupt-cells = <2>;
186 }; 186 };
187 187
188 gpio6: gpio@e6068180 { 188 gpio6: gpio@e6068180 {
189 compatible = "renesas, 189 compatible = "renesas,gpio-r8a779a0",
190 "renesas, 190 "renesas,rcar-gen4-gpio";
191 reg = <0 0xe6068180 0 191 reg = <0 0xe6068180 0 0x54>;
192 interrupts = <GIC_SPI 192 interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>;
193 clocks = <&cpg CPG_MOD 193 clocks = <&cpg CPG_MOD 918>;
194 power-domains = <&sysc 194 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
195 resets = <&cpg 918>; 195 resets = <&cpg 918>;
196 gpio-controller; 196 gpio-controller;
197 #gpio-cells = <2>; 197 #gpio-cells = <2>;
198 gpio-ranges = <&pfc 0 198 gpio-ranges = <&pfc 0 192 21>;
199 interrupt-controller; 199 interrupt-controller;
200 #interrupt-cells = <2> 200 #interrupt-cells = <2>;
201 }; 201 };
202 202
203 gpio7: gpio@e6068980 { 203 gpio7: gpio@e6068980 {
204 compatible = "renesas, 204 compatible = "renesas,gpio-r8a779a0",
205 "renesas, 205 "renesas,rcar-gen4-gpio";
206 reg = <0 0xe6068980 0 206 reg = <0 0xe6068980 0 0x54>;
207 interrupts = <GIC_SPI 207 interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>;
208 clocks = <&cpg CPG_MOD 208 clocks = <&cpg CPG_MOD 918>;
209 power-domains = <&sysc 209 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
210 resets = <&cpg 918>; 210 resets = <&cpg 918>;
211 gpio-controller; 211 gpio-controller;
212 #gpio-cells = <2>; 212 #gpio-cells = <2>;
213 gpio-ranges = <&pfc 0 213 gpio-ranges = <&pfc 0 224 21>;
214 interrupt-controller; 214 interrupt-controller;
215 #interrupt-cells = <2> 215 #interrupt-cells = <2>;
216 }; 216 };
217 217
218 gpio8: gpio@e6069180 { 218 gpio8: gpio@e6069180 {
219 compatible = "renesas, 219 compatible = "renesas,gpio-r8a779a0",
220 "renesas, 220 "renesas,rcar-gen4-gpio";
221 reg = <0 0xe6069180 0 221 reg = <0 0xe6069180 0 0x54>;
222 interrupts = <GIC_SPI 222 interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>;
223 clocks = <&cpg CPG_MOD 223 clocks = <&cpg CPG_MOD 918>;
224 power-domains = <&sysc 224 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
225 resets = <&cpg 918>; 225 resets = <&cpg 918>;
226 gpio-controller; 226 gpio-controller;
227 #gpio-cells = <2>; 227 #gpio-cells = <2>;
228 gpio-ranges = <&pfc 0 228 gpio-ranges = <&pfc 0 256 21>;
229 interrupt-controller; 229 interrupt-controller;
230 #interrupt-cells = <2> 230 #interrupt-cells = <2>;
231 }; 231 };
232 232
233 gpio9: gpio@e6069980 { 233 gpio9: gpio@e6069980 {
234 compatible = "renesas, 234 compatible = "renesas,gpio-r8a779a0",
235 "renesas, 235 "renesas,rcar-gen4-gpio";
236 reg = <0 0xe6069980 0 236 reg = <0 0xe6069980 0 0x54>;
237 interrupts = <GIC_SPI 237 interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>;
238 clocks = <&cpg CPG_MOD 238 clocks = <&cpg CPG_MOD 918>;
239 power-domains = <&sysc 239 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
240 resets = <&cpg 918>; 240 resets = <&cpg 918>;
241 gpio-controller; 241 gpio-controller;
242 #gpio-cells = <2>; 242 #gpio-cells = <2>;
243 gpio-ranges = <&pfc 0 243 gpio-ranges = <&pfc 0 288 21>;
244 interrupt-controller; 244 interrupt-controller;
245 #interrupt-cells = <2> 245 #interrupt-cells = <2>;
246 }; 246 };
247 247
248 cmt0: timer@e60f0000 { 248 cmt0: timer@e60f0000 {
249 compatible = "renesas, 249 compatible = "renesas,r8a779a0-cmt0",
250 "renesas, 250 "renesas,rcar-gen4-cmt0";
251 reg = <0 0xe60f0000 0 251 reg = <0 0xe60f0000 0 0x1004>;
252 interrupts = <GIC_SPI 252 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
253 <GIC_SPI 253 <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>;
254 clocks = <&cpg CPG_MOD 254 clocks = <&cpg CPG_MOD 910>;
255 clock-names = "fck"; 255 clock-names = "fck";
256 power-domains = <&sysc 256 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
257 resets = <&cpg 910>; 257 resets = <&cpg 910>;
258 status = "disabled"; 258 status = "disabled";
259 }; 259 };
260 260
261 cmt1: timer@e6130000 { 261 cmt1: timer@e6130000 {
262 compatible = "renesas, 262 compatible = "renesas,r8a779a0-cmt1",
263 "renesas, 263 "renesas,rcar-gen4-cmt1";
264 reg = <0 0xe6130000 0 264 reg = <0 0xe6130000 0 0x1004>;
265 interrupts = <GIC_SPI 265 interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
266 <GIC_SPI 266 <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
267 <GIC_SPI 267 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
268 <GIC_SPI 268 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
269 <GIC_SPI 269 <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
270 <GIC_SPI 270 <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
271 <GIC_SPI 271 <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
272 <GIC_SPI 272 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>;
273 clocks = <&cpg CPG_MOD 273 clocks = <&cpg CPG_MOD 911>;
274 clock-names = "fck"; 274 clock-names = "fck";
275 power-domains = <&sysc 275 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
276 resets = <&cpg 911>; 276 resets = <&cpg 911>;
277 status = "disabled"; 277 status = "disabled";
278 }; 278 };
279 279
280 cmt2: timer@e6140000 { 280 cmt2: timer@e6140000 {
281 compatible = "renesas, 281 compatible = "renesas,r8a779a0-cmt1",
282 "renesas, 282 "renesas,rcar-gen4-cmt1";
283 reg = <0 0xe6140000 0 283 reg = <0 0xe6140000 0 0x1004>;
284 interrupts = <GIC_SPI 284 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 285 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
286 <GIC_SPI 286 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
287 <GIC_SPI 287 <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
288 <GIC_SPI 288 <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
289 <GIC_SPI 289 <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
290 <GIC_SPI 290 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
291 <GIC_SPI 291 <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
292 clocks = <&cpg CPG_MOD 292 clocks = <&cpg CPG_MOD 912>;
293 clock-names = "fck"; 293 clock-names = "fck";
294 power-domains = <&sysc 294 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
295 resets = <&cpg 912>; 295 resets = <&cpg 912>;
296 status = "disabled"; 296 status = "disabled";
297 }; 297 };
298 298
299 cmt3: timer@e6148000 { 299 cmt3: timer@e6148000 {
300 compatible = "renesas, 300 compatible = "renesas,r8a779a0-cmt1",
301 "renesas, 301 "renesas,rcar-gen4-cmt1";
302 reg = <0 0xe6148000 0 302 reg = <0 0xe6148000 0 0x1004>;
303 interrupts = <GIC_SPI 303 interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
304 <GIC_SPI 304 <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
305 <GIC_SPI 305 <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
306 <GIC_SPI 306 <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
307 <GIC_SPI 307 <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
308 <GIC_SPI 308 <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
309 <GIC_SPI 309 <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
310 <GIC_SPI 310 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>;
311 clocks = <&cpg CPG_MOD 311 clocks = <&cpg CPG_MOD 913>;
312 clock-names = "fck"; 312 clock-names = "fck";
313 power-domains = <&sysc 313 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
314 resets = <&cpg 913>; 314 resets = <&cpg 913>;
315 status = "disabled"; 315 status = "disabled";
316 }; 316 };
317 317
318 cpg: clock-controller@e6150000 318 cpg: clock-controller@e6150000 {
319 compatible = "renesas, 319 compatible = "renesas,r8a779a0-cpg-mssr";
320 reg = <0 0xe6150000 0 320 reg = <0 0xe6150000 0 0x4000>;
321 clocks = <&extal_clk>, 321 clocks = <&extal_clk>, <&extalr_clk>;
322 clock-names = "extal", 322 clock-names = "extal", "extalr";
323 #clock-cells = <2>; 323 #clock-cells = <2>;
324 #power-domain-cells = 324 #power-domain-cells = <0>;
325 #reset-cells = <1>; 325 #reset-cells = <1>;
326 }; 326 };
327 327
328 rst: reset-controller@e6160000 328 rst: reset-controller@e6160000 {
329 compatible = "renesas, 329 compatible = "renesas,r8a779a0-rst";
330 reg = <0 0xe6160000 0 330 reg = <0 0xe6160000 0 0x4000>;
331 }; 331 };
332 332
333 sysc: system-controller@e61800 333 sysc: system-controller@e6180000 {
334 compatible = "renesas, 334 compatible = "renesas,r8a779a0-sysc";
335 reg = <0 0xe6180000 0 335 reg = <0 0xe6180000 0 0x4000>;
336 #power-domain-cells = 336 #power-domain-cells = <1>;
337 }; 337 };
338 338
339 tsc: thermal@e6190000 { 339 tsc: thermal@e6190000 {
340 compatible = "renesas, 340 compatible = "renesas,r8a779a0-thermal";
341 reg = <0 0xe6190000 0 341 reg = <0 0xe6190000 0 0x200>,
342 <0 0xe6198000 0 342 <0 0xe6198000 0 0x200>,
343 <0 0xe61a0000 0 343 <0 0xe61a0000 0 0x200>,
344 <0 0xe61a8000 0 344 <0 0xe61a8000 0 0x200>,
345 <0 0xe61b0000 0 345 <0 0xe61b0000 0 0x200>;
346 clocks = <&cpg CPG_MOD 346 clocks = <&cpg CPG_MOD 919>;
347 power-domains = <&sysc 347 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
348 resets = <&cpg 919>; 348 resets = <&cpg 919>;
349 #thermal-sensor-cells 349 #thermal-sensor-cells = <1>;
350 }; 350 };
351 351
352 intc_ex: interrupt-controller@ 352 intc_ex: interrupt-controller@e61c0000 {
353 compatible = "renesas, 353 compatible = "renesas,intc-ex-r8a779a0", "renesas,irqc";
354 #interrupt-cells = <2> 354 #interrupt-cells = <2>;
355 interrupt-controller; 355 interrupt-controller;
356 reg = <0 0xe61c0000 0 356 reg = <0 0xe61c0000 0 0x200>;
357 interrupts = <GIC_SPI 357 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
358 <GIC_SPI 358 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
359 <GIC_SPI 359 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
360 <GIC_SPI 360 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
361 <GIC_SPI 361 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 362 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
363 clocks = <&cpg CPG_COR 363 clocks = <&cpg CPG_CORE R8A779A0_CLK_CP>;
364 power-domains = <&sysc 364 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
365 }; 365 };
366 366
367 tmu0: timer@e61e0000 { 367 tmu0: timer@e61e0000 {
368 compatible = "renesas, 368 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
369 reg = <0 0xe61e0000 0 369 reg = <0 0xe61e0000 0 0x30>;
370 interrupts = <GIC_SPI 370 interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
371 <GIC_SPI 371 <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
372 <GIC_SPI 372 <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
373 interrupt-names = "tun 373 interrupt-names = "tuni0", "tuni1", "tuni2";
374 clocks = <&cpg CPG_MOD 374 clocks = <&cpg CPG_MOD 713>;
375 clock-names = "fck"; 375 clock-names = "fck";
376 power-domains = <&sysc 376 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
377 resets = <&cpg 713>; 377 resets = <&cpg 713>;
378 status = "disabled"; 378 status = "disabled";
379 }; 379 };
380 380
381 tmu1: timer@e6fc0000 { 381 tmu1: timer@e6fc0000 {
382 compatible = "renesas, 382 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
383 reg = <0 0xe6fc0000 0 383 reg = <0 0xe6fc0000 0 0x30>;
384 interrupts = <GIC_SPI 384 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 385 <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 386 <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 387 <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>;
388 interrupt-names = "tun 388 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
389 clocks = <&cpg CPG_MOD 389 clocks = <&cpg CPG_MOD 714>;
390 clock-names = "fck"; 390 clock-names = "fck";
391 power-domains = <&sysc 391 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
392 resets = <&cpg 714>; 392 resets = <&cpg 714>;
393 status = "disabled"; 393 status = "disabled";
394 }; 394 };
395 395
396 tmu2: timer@e6fd0000 { 396 tmu2: timer@e6fd0000 {
397 compatible = "renesas, 397 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
398 reg = <0 0xe6fd0000 0 398 reg = <0 0xe6fd0000 0 0x30>;
399 interrupts = <GIC_SPI 399 interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
400 <GIC_SPI 400 <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
401 <GIC_SPI 401 <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>,
402 <GIC_SPI 402 <GIC_SPI 511 IRQ_TYPE_LEVEL_HIGH>;
403 interrupt-names = "tun 403 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
404 clocks = <&cpg CPG_MOD 404 clocks = <&cpg CPG_MOD 715>;
405 clock-names = "fck"; 405 clock-names = "fck";
406 power-domains = <&sysc 406 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
407 resets = <&cpg 715>; 407 resets = <&cpg 715>;
408 status = "disabled"; 408 status = "disabled";
409 }; 409 };
410 410
411 tmu3: timer@e6fe0000 { 411 tmu3: timer@e6fe0000 {
412 compatible = "renesas, 412 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
413 reg = <0 0xe6fe0000 0 413 reg = <0 0xe6fe0000 0 0x30>;
414 interrupts = <GIC_SPI 414 interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
415 <GIC_SPI 415 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
416 <GIC_SPI 416 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
417 <GIC_SPI 417 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
418 interrupt-names = "tun 418 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
419 clocks = <&cpg CPG_MOD 419 clocks = <&cpg CPG_MOD 716>;
420 clock-names = "fck"; 420 clock-names = "fck";
421 power-domains = <&sysc 421 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
422 resets = <&cpg 716>; 422 resets = <&cpg 716>;
423 status = "disabled"; 423 status = "disabled";
424 }; 424 };
425 425
426 tmu4: timer@ffc00000 { 426 tmu4: timer@ffc00000 {
427 compatible = "renesas, 427 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
428 reg = <0 0xffc00000 0 428 reg = <0 0xffc00000 0 0x30>;
429 interrupts = <GIC_SPI 429 interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
430 <GIC_SPI 430 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
431 <GIC_SPI 431 <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
432 <GIC_SPI 432 <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>;
433 interrupt-names = "tun 433 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
434 clocks = <&cpg CPG_MOD 434 clocks = <&cpg CPG_MOD 717>;
435 clock-names = "fck"; 435 clock-names = "fck";
436 power-domains = <&sysc 436 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
437 resets = <&cpg 717>; 437 resets = <&cpg 717>;
438 status = "disabled"; 438 status = "disabled";
439 }; 439 };
440 440
441 i2c0: i2c@e6500000 { 441 i2c0: i2c@e6500000 {
442 compatible = "renesas, 442 compatible = "renesas,i2c-r8a779a0",
443 "renesas, 443 "renesas,rcar-gen4-i2c";
444 reg = <0 0xe6500000 0 444 reg = <0 0xe6500000 0 0x40>;
445 interrupts = <GIC_SPI 445 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
446 clocks = <&cpg CPG_MOD 446 clocks = <&cpg CPG_MOD 518>;
447 power-domains = <&sysc 447 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
448 resets = <&cpg 518>; 448 resets = <&cpg 518>;
449 dmas = <&dmac1 0x91>, 449 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
450 dma-names = "tx", "rx" 450 dma-names = "tx", "rx";
451 i2c-scl-internal-delay 451 i2c-scl-internal-delay-ns = <110>;
452 #address-cells = <1>; 452 #address-cells = <1>;
453 #size-cells = <0>; 453 #size-cells = <0>;
454 status = "disabled"; 454 status = "disabled";
455 }; 455 };
456 456
457 i2c1: i2c@e6508000 { 457 i2c1: i2c@e6508000 {
458 compatible = "renesas, 458 compatible = "renesas,i2c-r8a779a0",
459 "renesas, 459 "renesas,rcar-gen4-i2c";
460 reg = <0 0xe6508000 0 460 reg = <0 0xe6508000 0 0x40>;
461 interrupts = <GIC_SPI 461 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
462 clocks = <&cpg CPG_MOD 462 clocks = <&cpg CPG_MOD 519>;
463 power-domains = <&sysc 463 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
464 resets = <&cpg 519>; 464 resets = <&cpg 519>;
465 dmas = <&dmac1 0x93>, 465 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
466 dma-names = "tx", "rx" 466 dma-names = "tx", "rx";
467 i2c-scl-internal-delay 467 i2c-scl-internal-delay-ns = <110>;
468 #address-cells = <1>; 468 #address-cells = <1>;
469 #size-cells = <0>; 469 #size-cells = <0>;
470 status = "disabled"; 470 status = "disabled";
471 }; 471 };
472 472
473 i2c2: i2c@e6510000 { 473 i2c2: i2c@e6510000 {
474 compatible = "renesas, 474 compatible = "renesas,i2c-r8a779a0",
475 "renesas, 475 "renesas,rcar-gen4-i2c";
476 reg = <0 0xe6510000 0 476 reg = <0 0xe6510000 0 0x40>;
477 interrupts = <GIC_SPI 477 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
478 clocks = <&cpg CPG_MOD 478 clocks = <&cpg CPG_MOD 520>;
479 power-domains = <&sysc 479 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
480 resets = <&cpg 520>; 480 resets = <&cpg 520>;
481 dmas = <&dmac1 0x95>, 481 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
482 dma-names = "tx", "rx" 482 dma-names = "tx", "rx";
483 i2c-scl-internal-delay 483 i2c-scl-internal-delay-ns = <110>;
484 #address-cells = <1>; 484 #address-cells = <1>;
485 #size-cells = <0>; 485 #size-cells = <0>;
486 status = "disabled"; 486 status = "disabled";
487 }; 487 };
488 488
489 i2c3: i2c@e66d0000 { 489 i2c3: i2c@e66d0000 {
490 compatible = "renesas, 490 compatible = "renesas,i2c-r8a779a0",
491 "renesas, 491 "renesas,rcar-gen4-i2c";
492 reg = <0 0xe66d0000 0 492 reg = <0 0xe66d0000 0 0x40>;
493 interrupts = <GIC_SPI 493 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
494 clocks = <&cpg CPG_MOD 494 clocks = <&cpg CPG_MOD 521>;
495 power-domains = <&sysc 495 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
496 resets = <&cpg 521>; 496 resets = <&cpg 521>;
497 dmas = <&dmac1 0x97>, 497 dmas = <&dmac1 0x97>, <&dmac1 0x96>;
498 dma-names = "tx", "rx" 498 dma-names = "tx", "rx";
499 i2c-scl-internal-delay 499 i2c-scl-internal-delay-ns = <110>;
500 #address-cells = <1>; 500 #address-cells = <1>;
501 #size-cells = <0>; 501 #size-cells = <0>;
502 status = "disabled"; 502 status = "disabled";
503 }; 503 };
504 504
505 i2c4: i2c@e66d8000 { 505 i2c4: i2c@e66d8000 {
506 compatible = "renesas, 506 compatible = "renesas,i2c-r8a779a0",
507 "renesas, 507 "renesas,rcar-gen4-i2c";
508 reg = <0 0xe66d8000 0 508 reg = <0 0xe66d8000 0 0x40>;
509 interrupts = <GIC_SPI 509 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
510 clocks = <&cpg CPG_MOD 510 clocks = <&cpg CPG_MOD 522>;
511 power-domains = <&sysc 511 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
512 resets = <&cpg 522>; 512 resets = <&cpg 522>;
513 dmas = <&dmac1 0x99>, 513 dmas = <&dmac1 0x99>, <&dmac1 0x98>;
514 dma-names = "tx", "rx" 514 dma-names = "tx", "rx";
515 i2c-scl-internal-delay 515 i2c-scl-internal-delay-ns = <110>;
516 #address-cells = <1>; 516 #address-cells = <1>;
517 #size-cells = <0>; 517 #size-cells = <0>;
518 status = "disabled"; 518 status = "disabled";
519 }; 519 };
520 520
521 i2c5: i2c@e66e0000 { 521 i2c5: i2c@e66e0000 {
522 compatible = "renesas, 522 compatible = "renesas,i2c-r8a779a0",
523 "renesas, 523 "renesas,rcar-gen4-i2c";
524 reg = <0 0xe66e0000 0 524 reg = <0 0xe66e0000 0 0x40>;
525 interrupts = <GIC_SPI 525 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
526 clocks = <&cpg CPG_MOD 526 clocks = <&cpg CPG_MOD 523>;
527 power-domains = <&sysc 527 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
528 resets = <&cpg 523>; 528 resets = <&cpg 523>;
529 dmas = <&dmac1 0x9b>, 529 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>;
530 dma-names = "tx", "rx" 530 dma-names = "tx", "rx";
531 i2c-scl-internal-delay 531 i2c-scl-internal-delay-ns = <110>;
532 #address-cells = <1>; 532 #address-cells = <1>;
533 #size-cells = <0>; 533 #size-cells = <0>;
534 status = "disabled"; 534 status = "disabled";
535 }; 535 };
536 536
537 i2c6: i2c@e66e8000 { 537 i2c6: i2c@e66e8000 {
538 compatible = "renesas, 538 compatible = "renesas,i2c-r8a779a0",
539 "renesas, 539 "renesas,rcar-gen4-i2c";
540 reg = <0 0xe66e8000 0 540 reg = <0 0xe66e8000 0 0x40>;
541 interrupts = <GIC_SPI 541 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 542 clocks = <&cpg CPG_MOD 524>;
543 power-domains = <&sysc 543 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
544 resets = <&cpg 524>; 544 resets = <&cpg 524>;
545 dmas = <&dmac1 0x9d>, 545 dmas = <&dmac1 0x9d>, <&dmac1 0x9c>;
546 dma-names = "tx", "rx" 546 dma-names = "tx", "rx";
547 i2c-scl-internal-delay 547 i2c-scl-internal-delay-ns = <110>;
548 #address-cells = <1>; 548 #address-cells = <1>;
549 #size-cells = <0>; 549 #size-cells = <0>;
550 status = "disabled"; 550 status = "disabled";
551 }; 551 };
552 552
553 hscif0: serial@e6540000 { 553 hscif0: serial@e6540000 {
554 compatible = "renesas, 554 compatible = "renesas,hscif-r8a779a0",
555 "renesas, 555 "renesas,rcar-gen4-hscif", "renesas,hscif";
556 reg = <0 0xe6540000 0 556 reg = <0 0xe6540000 0 0x60>;
557 interrupts = <GIC_SPI 557 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 558 clocks = <&cpg CPG_MOD 514>,
559 <&cpg CPG_COR 559 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
560 <&scif_clk>; 560 <&scif_clk>;
561 clock-names = "fck", " 561 clock-names = "fck", "brg_int", "scif_clk";
562 dmas = <&dmac1 0x31>, 562 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
563 dma-names = "tx", "rx" 563 dma-names = "tx", "rx";
564 power-domains = <&sysc 564 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
565 resets = <&cpg 514>; 565 resets = <&cpg 514>;
566 status = "disabled"; 566 status = "disabled";
567 }; 567 };
568 568
569 hscif1: serial@e6550000 { 569 hscif1: serial@e6550000 {
570 compatible = "renesas, 570 compatible = "renesas,hscif-r8a779a0",
571 "renesas, 571 "renesas,rcar-gen4-hscif", "renesas,hscif";
572 reg = <0 0xe6550000 0 572 reg = <0 0xe6550000 0 0x60>;
573 interrupts = <GIC_SPI 573 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&cpg CPG_MOD 574 clocks = <&cpg CPG_MOD 515>,
575 <&cpg CPG_COR 575 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
576 <&scif_clk>; 576 <&scif_clk>;
577 clock-names = "fck", " 577 clock-names = "fck", "brg_int", "scif_clk";
578 dmas = <&dmac1 0x33>, 578 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
579 dma-names = "tx", "rx" 579 dma-names = "tx", "rx";
580 power-domains = <&sysc 580 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
581 resets = <&cpg 515>; 581 resets = <&cpg 515>;
582 status = "disabled"; 582 status = "disabled";
583 }; 583 };
584 584
585 hscif2: serial@e6560000 { 585 hscif2: serial@e6560000 {
586 compatible = "renesas, 586 compatible = "renesas,hscif-r8a779a0",
587 "renesas, 587 "renesas,rcar-gen4-hscif", "renesas,hscif";
588 reg = <0 0xe6560000 0 588 reg = <0 0xe6560000 0 0x60>;
589 interrupts = <GIC_SPI 589 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&cpg CPG_MOD 590 clocks = <&cpg CPG_MOD 516>,
591 <&cpg CPG_COR 591 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
592 <&scif_clk>; 592 <&scif_clk>;
593 clock-names = "fck", " 593 clock-names = "fck", "brg_int", "scif_clk";
594 dmas = <&dmac1 0x35>, 594 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
595 dma-names = "tx", "rx" 595 dma-names = "tx", "rx";
596 power-domains = <&sysc 596 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
597 resets = <&cpg 516>; 597 resets = <&cpg 516>;
598 status = "disabled"; 598 status = "disabled";
599 }; 599 };
600 600
601 hscif3: serial@e66a0000 { 601 hscif3: serial@e66a0000 {
602 compatible = "renesas, 602 compatible = "renesas,hscif-r8a779a0",
603 "renesas, 603 "renesas,rcar-gen4-hscif", "renesas,hscif";
604 reg = <0 0xe66a0000 0 604 reg = <0 0xe66a0000 0 0x60>;
605 interrupts = <GIC_SPI 605 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&cpg CPG_MOD 606 clocks = <&cpg CPG_MOD 517>,
607 <&cpg CPG_COR 607 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
608 <&scif_clk>; 608 <&scif_clk>;
609 clock-names = "fck", " 609 clock-names = "fck", "brg_int", "scif_clk";
610 dmas = <&dmac1 0x37>, 610 dmas = <&dmac1 0x37>, <&dmac1 0x36>;
611 dma-names = "tx", "rx" 611 dma-names = "tx", "rx";
612 power-domains = <&sysc 612 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
613 resets = <&cpg 517>; 613 resets = <&cpg 517>;
614 status = "disabled"; 614 status = "disabled";
615 }; 615 };
616 616
617 canfd: can@e6660000 { 617 canfd: can@e6660000 {
618 compatible = "renesas, 618 compatible = "renesas,r8a779a0-canfd",
619 "renesas, 619 "renesas,rcar-gen4-canfd";
620 reg = <0 0xe6660000 0 620 reg = <0 0xe6660000 0 0x8000>;
621 interrupts = <GIC_SPI 621 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
622 <GIC_S 622 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
623 interrupt-names = "ch_ 623 interrupt-names = "ch_int", "g_int";
624 clocks = <&cpg CPG_MOD 624 clocks = <&cpg CPG_MOD 328>,
625 <&cpg CPG_COR 625 <&cpg CPG_CORE R8A779A0_CLK_CANFD>,
626 <&can_clk>; 626 <&can_clk>;
627 clock-names = "fck", " 627 clock-names = "fck", "canfd", "can_clk";
628 assigned-clocks = <&cp 628 assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>;
629 assigned-clock-rates = 629 assigned-clock-rates = <80000000>;
630 power-domains = <&sysc 630 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
631 resets = <&cpg 328>; 631 resets = <&cpg 328>;
632 status = "disabled"; 632 status = "disabled";
633 633
634 channel0 { 634 channel0 {
635 status = "disa 635 status = "disabled";
636 }; 636 };
637 637
638 channel1 { 638 channel1 {
639 status = "disa 639 status = "disabled";
640 }; 640 };
641 641
642 channel2 { 642 channel2 {
643 status = "disa 643 status = "disabled";
644 }; 644 };
645 645
646 channel3 { 646 channel3 {
647 status = "disa 647 status = "disabled";
648 }; 648 };
649 649
650 channel4 { 650 channel4 {
651 status = "disa 651 status = "disabled";
652 }; 652 };
653 653
654 channel5 { 654 channel5 {
655 status = "disa 655 status = "disabled";
656 }; 656 };
657 657
658 channel6 { 658 channel6 {
659 status = "disa 659 status = "disabled";
660 }; 660 };
661 661
662 channel7 { 662 channel7 {
663 status = "disa 663 status = "disabled";
664 }; 664 };
665 }; 665 };
666 666
667 avb0: ethernet@e6800000 { 667 avb0: ethernet@e6800000 {
668 compatible = "renesas, 668 compatible = "renesas,etheravb-r8a779a0",
669 "renesas, 669 "renesas,etheravb-rcar-gen4";
670 reg = <0 0xe6800000 0 670 reg = <0 0xe6800000 0 0x1000>;
671 interrupts = <GIC_SPI 671 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
672 <GIC_SPI 672 <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
673 <GIC_SPI 673 <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
674 <GIC_SPI 674 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
675 <GIC_SPI 675 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
676 <GIC_SPI 676 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
677 <GIC_SPI 677 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
678 <GIC_SPI 678 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
679 <GIC_SPI 679 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
680 <GIC_SPI 680 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
681 <GIC_SPI 681 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
682 <GIC_SPI 682 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
683 <GIC_SPI 683 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
684 <GIC_SPI 684 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
685 <GIC_SPI 685 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
686 <GIC_SPI 686 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
687 <GIC_SPI 687 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
688 <GIC_SPI 688 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
689 <GIC_SPI 689 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
690 <GIC_SPI 690 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
691 <GIC_SPI 691 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
692 <GIC_SPI 692 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
693 <GIC_SPI 693 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
694 <GIC_SPI 694 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
695 <GIC_SPI 695 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
696 interrupt-names = "ch0 696 interrupt-names = "ch0", "ch1", "ch2", "ch3",
697 "ch4 697 "ch4", "ch5", "ch6", "ch7",
698 "ch8 698 "ch8", "ch9", "ch10", "ch11",
699 "ch1 699 "ch12", "ch13", "ch14", "ch15",
700 "ch1 700 "ch16", "ch17", "ch18", "ch19",
701 "ch2 701 "ch20", "ch21", "ch22", "ch23",
702 "ch2 702 "ch24";
703 clocks = <&cpg CPG_MOD 703 clocks = <&cpg CPG_MOD 211>;
704 clock-names = "fck"; 704 clock-names = "fck";
705 power-domains = <&sysc 705 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
706 resets = <&cpg 211>; 706 resets = <&cpg 211>;
707 phy-mode = "rgmii"; 707 phy-mode = "rgmii";
708 rx-internal-delay-ps = 708 rx-internal-delay-ps = <0>;
709 tx-internal-delay-ps = 709 tx-internal-delay-ps = <0>;
710 iommus = <&ipmmu_ds1 0 710 iommus = <&ipmmu_ds1 0>;
711 #address-cells = <1>; 711 #address-cells = <1>;
712 #size-cells = <0>; 712 #size-cells = <0>;
713 status = "disabled"; 713 status = "disabled";
714 }; 714 };
715 715
716 avb1: ethernet@e6810000 { 716 avb1: ethernet@e6810000 {
717 compatible = "renesas, 717 compatible = "renesas,etheravb-r8a779a0",
718 "renesas, 718 "renesas,etheravb-rcar-gen4";
719 reg = <0 0xe6810000 0 719 reg = <0 0xe6810000 0 0x1000>;
720 interrupts = <GIC_SPI 720 interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
721 <GIC_SPI 721 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
722 <GIC_SPI 722 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
723 <GIC_SPI 723 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
724 <GIC_SPI 724 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>,
725 <GIC_SPI 725 <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,
726 <GIC_SPI 726 <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
727 <GIC_SPI 727 <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,
728 <GIC_SPI 728 <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
729 <GIC_SPI 729 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
730 <GIC_SPI 730 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>,
731 <GIC_SPI 731 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
732 <GIC_SPI 732 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
733 <GIC_SPI 733 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
734 <GIC_SPI 734 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
735 <GIC_SPI 735 <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
736 <GIC_SPI 736 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
737 <GIC_SPI 737 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
738 <GIC_SPI 738 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
739 <GIC_SPI 739 <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
740 <GIC_SPI 740 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
741 <GIC_SPI 741 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
742 <GIC_SPI 742 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
743 <GIC_SPI 743 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
744 <GIC_SPI 744 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
745 interrupt-names = "ch0 745 interrupt-names = "ch0", "ch1", "ch2", "ch3",
746 "ch4 746 "ch4", "ch5", "ch6", "ch7",
747 "ch8 747 "ch8", "ch9", "ch10", "ch11",
748 "ch1 748 "ch12", "ch13", "ch14", "ch15",
749 "ch1 749 "ch16", "ch17", "ch18", "ch19",
750 "ch2 750 "ch20", "ch21", "ch22", "ch23",
751 "ch2 751 "ch24";
752 clocks = <&cpg CPG_MOD 752 clocks = <&cpg CPG_MOD 212>;
753 clock-names = "fck"; 753 clock-names = "fck";
754 power-domains = <&sysc 754 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
755 resets = <&cpg 212>; 755 resets = <&cpg 212>;
756 phy-mode = "rgmii"; 756 phy-mode = "rgmii";
757 rx-internal-delay-ps = 757 rx-internal-delay-ps = <0>;
758 tx-internal-delay-ps = 758 tx-internal-delay-ps = <0>;
759 iommus = <&ipmmu_ds1 1 759 iommus = <&ipmmu_ds1 1>;
760 #address-cells = <1>; 760 #address-cells = <1>;
761 #size-cells = <0>; 761 #size-cells = <0>;
762 status = "disabled"; 762 status = "disabled";
763 }; 763 };
764 764
765 avb2: ethernet@e6820000 { 765 avb2: ethernet@e6820000 {
766 compatible = "renesas, 766 compatible = "renesas,etheravb-r8a779a0",
767 "renesas, 767 "renesas,etheravb-rcar-gen4";
768 reg = <0 0xe6820000 0 768 reg = <0 0xe6820000 0 0x1000>;
769 interrupts = <GIC_SPI 769 interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_S 770 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_S 771 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
772 <GIC_S 772 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_S 773 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
774 <GIC_S 774 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
775 <GIC_S 775 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
776 <GIC_S 776 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
777 <GIC_S 777 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
778 <GIC_S 778 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
779 <GIC_S 779 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
780 <GIC_S 780 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
781 <GIC_S 781 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
782 <GIC_S 782 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
783 <GIC_S 783 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
784 <GIC_S 784 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
785 <GIC_S 785 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
786 <GIC_S 786 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
787 <GIC_S 787 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_S 788 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
789 <GIC_S 789 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
790 <GIC_S 790 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
791 <GIC_S 791 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
792 <GIC_S 792 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
793 <GIC_S 793 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
794 interrupt-names = "ch0 794 interrupt-names = "ch0", "ch1", "ch2", "ch3",
795 "ch4", 795 "ch4", "ch5", "ch6", "ch7",
796 "ch8", 796 "ch8", "ch9", "ch10", "ch11",
797 "ch12" 797 "ch12", "ch13", "ch14", "ch15",
798 "ch16" 798 "ch16", "ch17", "ch18", "ch19",
799 "ch20" 799 "ch20", "ch21", "ch22", "ch23",
800 "ch24" 800 "ch24";
801 clocks = <&cpg CPG_MOD 801 clocks = <&cpg CPG_MOD 213>;
802 clock-names = "fck"; 802 clock-names = "fck";
803 power-domains = <&sysc 803 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
804 resets = <&cpg 213>; 804 resets = <&cpg 213>;
805 phy-mode = "rgmii"; 805 phy-mode = "rgmii";
806 rx-internal-delay-ps = 806 rx-internal-delay-ps = <0>;
807 tx-internal-delay-ps = 807 tx-internal-delay-ps = <0>;
808 iommus = <&ipmmu_ds1 2 808 iommus = <&ipmmu_ds1 2>;
809 #address-cells = <1>; 809 #address-cells = <1>;
810 #size-cells = <0>; 810 #size-cells = <0>;
811 status = "disabled"; 811 status = "disabled";
812 }; 812 };
813 813
814 avb3: ethernet@e6830000 { 814 avb3: ethernet@e6830000 {
815 compatible = "renesas, 815 compatible = "renesas,etheravb-r8a779a0",
816 "renesas, 816 "renesas,etheravb-rcar-gen4";
817 reg = <0 0xe6830000 0 817 reg = <0 0xe6830000 0 0x1000>;
818 interrupts = <GIC_SPI 818 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_S 819 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_S 820 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_S 821 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_S 822 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_S 823 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_S 824 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
825 <GIC_S 825 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
826 <GIC_S 826 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
827 <GIC_S 827 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
828 <GIC_S 828 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
829 <GIC_S 829 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
830 <GIC_S 830 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
831 <GIC_S 831 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
832 <GIC_S 832 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
833 <GIC_S 833 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
834 <GIC_S 834 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
835 <GIC_S 835 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
836 <GIC_S 836 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
837 <GIC_S 837 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
838 <GIC_S 838 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
839 <GIC_S 839 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
840 <GIC_S 840 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
841 <GIC_S 841 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
842 <GIC_S 842 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
843 interrupt-names = "ch0 843 interrupt-names = "ch0", "ch1", "ch2", "ch3",
844 "ch4", 844 "ch4", "ch5", "ch6", "ch7",
845 "ch8", 845 "ch8", "ch9", "ch10", "ch11",
846 "ch12" 846 "ch12", "ch13", "ch14", "ch15",
847 "ch16" 847 "ch16", "ch17", "ch18", "ch19",
848 "ch20" 848 "ch20", "ch21", "ch22", "ch23",
849 "ch24" 849 "ch24";
850 clocks = <&cpg CPG_MOD 850 clocks = <&cpg CPG_MOD 214>;
851 clock-names = "fck"; 851 clock-names = "fck";
852 power-domains = <&sysc 852 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
853 resets = <&cpg 214>; 853 resets = <&cpg 214>;
854 phy-mode = "rgmii"; 854 phy-mode = "rgmii";
855 rx-internal-delay-ps = 855 rx-internal-delay-ps = <0>;
856 tx-internal-delay-ps = 856 tx-internal-delay-ps = <0>;
857 iommus = <&ipmmu_ds1 3 857 iommus = <&ipmmu_ds1 3>;
858 #address-cells = <1>; 858 #address-cells = <1>;
859 #size-cells = <0>; 859 #size-cells = <0>;
860 status = "disabled"; 860 status = "disabled";
861 }; 861 };
862 862
863 avb4: ethernet@e6840000 { 863 avb4: ethernet@e6840000 {
864 compatible = "renesas, 864 compatible = "renesas,etheravb-r8a779a0",
865 "renesas, 865 "renesas,etheravb-rcar-gen4";
866 reg = <0 0xe6840000 0 866 reg = <0 0xe6840000 0 0x1000>;
867 interrupts = <GIC_SPI 867 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
868 <GIC_S 868 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
869 <GIC_S 869 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
870 <GIC_S 870 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
871 <GIC_S 871 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
872 <GIC_S 872 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
873 <GIC_S 873 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
874 <GIC_S 874 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
875 <GIC_S 875 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
876 <GIC_S 876 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
877 <GIC_S 877 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
878 <GIC_S 878 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
879 <GIC_S 879 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
880 <GIC_S 880 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
881 <GIC_S 881 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
882 <GIC_S 882 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
883 <GIC_S 883 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
884 <GIC_S 884 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,
885 <GIC_S 885 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
886 <GIC_S 886 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
887 <GIC_S 887 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
888 <GIC_S 888 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
889 <GIC_S 889 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
890 <GIC_S 890 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
891 <GIC_S 891 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>;
892 interrupt-names = "ch0 892 interrupt-names = "ch0", "ch1", "ch2", "ch3",
893 "ch4", 893 "ch4", "ch5", "ch6", "ch7",
894 "ch8", 894 "ch8", "ch9", "ch10", "ch11",
895 "ch12" 895 "ch12", "ch13", "ch14", "ch15",
896 "ch16" 896 "ch16", "ch17", "ch18", "ch19",
897 "ch20" 897 "ch20", "ch21", "ch22", "ch23",
898 "ch24" 898 "ch24";
899 clocks = <&cpg CPG_MOD 899 clocks = <&cpg CPG_MOD 215>;
900 clock-names = "fck"; 900 clock-names = "fck";
901 power-domains = <&sysc 901 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
902 resets = <&cpg 215>; 902 resets = <&cpg 215>;
903 phy-mode = "rgmii"; 903 phy-mode = "rgmii";
904 rx-internal-delay-ps = 904 rx-internal-delay-ps = <0>;
905 tx-internal-delay-ps = 905 tx-internal-delay-ps = <0>;
906 iommus = <&ipmmu_ds1 4 906 iommus = <&ipmmu_ds1 4>;
907 #address-cells = <1>; 907 #address-cells = <1>;
908 #size-cells = <0>; 908 #size-cells = <0>;
909 status = "disabled"; 909 status = "disabled";
910 }; 910 };
911 911
912 avb5: ethernet@e6850000 { 912 avb5: ethernet@e6850000 {
913 compatible = "renesas, 913 compatible = "renesas,etheravb-r8a779a0",
914 "renesas, 914 "renesas,etheravb-rcar-gen4";
915 reg = <0 0xe6850000 0 915 reg = <0 0xe6850000 0 0x1000>;
916 interrupts = <GIC_SPI 916 interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
917 <GIC_S 917 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
918 <GIC_S 918 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
919 <GIC_S 919 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
920 <GIC_S 920 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
921 <GIC_S 921 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
922 <GIC_S 922 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
923 <GIC_S 923 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
924 <GIC_S 924 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
925 <GIC_S 925 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
926 <GIC_S 926 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
927 <GIC_S 927 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
928 <GIC_S 928 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
929 <GIC_S 929 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
930 <GIC_S 930 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
931 <GIC_S 931 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
932 <GIC_S 932 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
933 <GIC_S 933 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
934 <GIC_S 934 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
935 <GIC_S 935 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
936 <GIC_S 936 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
937 <GIC_S 937 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
938 <GIC_S 938 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
939 <GIC_S 939 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
940 <GIC_S 940 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
941 interrupt-names = "ch0 941 interrupt-names = "ch0", "ch1", "ch2", "ch3",
942 "ch4", 942 "ch4", "ch5", "ch6", "ch7",
943 "ch8", 943 "ch8", "ch9", "ch10", "ch11",
944 "ch12" 944 "ch12", "ch13", "ch14", "ch15",
945 "ch16" 945 "ch16", "ch17", "ch18", "ch19",
946 "ch20" 946 "ch20", "ch21", "ch22", "ch23",
947 "ch24" 947 "ch24";
948 clocks = <&cpg CPG_MOD 948 clocks = <&cpg CPG_MOD 216>;
949 clock-names = "fck"; 949 clock-names = "fck";
950 power-domains = <&sysc 950 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
951 resets = <&cpg 216>; 951 resets = <&cpg 216>;
952 phy-mode = "rgmii"; 952 phy-mode = "rgmii";
953 rx-internal-delay-ps = 953 rx-internal-delay-ps = <0>;
954 tx-internal-delay-ps = 954 tx-internal-delay-ps = <0>;
955 iommus = <&ipmmu_ds1 1 955 iommus = <&ipmmu_ds1 11>;
956 #address-cells = <1>; 956 #address-cells = <1>;
957 #size-cells = <0>; 957 #size-cells = <0>;
958 status = "disabled"; 958 status = "disabled";
959 }; 959 };
960 960
961 pwm0: pwm@e6e30000 { 961 pwm0: pwm@e6e30000 {
962 compatible = "renesas, 962 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
963 reg = <0 0xe6e30000 0 963 reg = <0 0xe6e30000 0 0x10>;
964 #pwm-cells = <2>; 964 #pwm-cells = <2>;
965 clocks = <&cpg CPG_MOD 965 clocks = <&cpg CPG_MOD 628>;
966 power-domains = <&sysc 966 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
967 resets = <&cpg 628>; 967 resets = <&cpg 628>;
968 status = "disabled"; 968 status = "disabled";
969 }; 969 };
970 970
971 pwm1: pwm@e6e31000 { 971 pwm1: pwm@e6e31000 {
972 compatible = "renesas, 972 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
973 reg = <0 0xe6e31000 0 973 reg = <0 0xe6e31000 0 0x10>;
974 #pwm-cells = <2>; 974 #pwm-cells = <2>;
975 clocks = <&cpg CPG_MOD 975 clocks = <&cpg CPG_MOD 628>;
976 power-domains = <&sysc 976 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
977 resets = <&cpg 628>; 977 resets = <&cpg 628>;
978 status = "disabled"; 978 status = "disabled";
979 }; 979 };
980 980
981 pwm2: pwm@e6e32000 { 981 pwm2: pwm@e6e32000 {
982 compatible = "renesas, 982 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
983 reg = <0 0xe6e32000 0 983 reg = <0 0xe6e32000 0 0x10>;
984 #pwm-cells = <2>; 984 #pwm-cells = <2>;
985 clocks = <&cpg CPG_MOD 985 clocks = <&cpg CPG_MOD 628>;
986 power-domains = <&sysc 986 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
987 resets = <&cpg 628>; 987 resets = <&cpg 628>;
988 status = "disabled"; 988 status = "disabled";
989 }; 989 };
990 990
991 pwm3: pwm@e6e33000 { 991 pwm3: pwm@e6e33000 {
992 compatible = "renesas, 992 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
993 reg = <0 0xe6e33000 0 993 reg = <0 0xe6e33000 0 0x10>;
994 #pwm-cells = <2>; 994 #pwm-cells = <2>;
995 clocks = <&cpg CPG_MOD 995 clocks = <&cpg CPG_MOD 628>;
996 power-domains = <&sysc 996 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
997 resets = <&cpg 628>; 997 resets = <&cpg 628>;
998 status = "disabled"; 998 status = "disabled";
999 }; 999 };
1000 1000
1001 pwm4: pwm@e6e34000 { 1001 pwm4: pwm@e6e34000 {
1002 compatible = "renesas 1002 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
1003 reg = <0 0xe6e34000 0 1003 reg = <0 0xe6e34000 0 0x10>;
1004 #pwm-cells = <2>; 1004 #pwm-cells = <2>;
1005 clocks = <&cpg CPG_MO 1005 clocks = <&cpg CPG_MOD 628>;
1006 power-domains = <&sys 1006 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1007 resets = <&cpg 628>; 1007 resets = <&cpg 628>;
1008 status = "disabled"; 1008 status = "disabled";
1009 }; 1009 };
1010 1010
1011 scif0: serial@e6e60000 { 1011 scif0: serial@e6e60000 {
1012 compatible = "renesas 1012 compatible = "renesas,scif-r8a779a0",
1013 "renesas 1013 "renesas,rcar-gen4-scif", "renesas,scif";
1014 reg = <0 0xe6e60000 0 1014 reg = <0 0xe6e60000 0 64>;
1015 interrupts = <GIC_SPI 1015 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
1016 clocks = <&cpg CPG_MO 1016 clocks = <&cpg CPG_MOD 702>,
1017 <&cpg CPG_CO 1017 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
1018 <&scif_clk>; 1018 <&scif_clk>;
1019 clock-names = "fck", 1019 clock-names = "fck", "brg_int", "scif_clk";
1020 dmas = <&dmac1 0x51>, 1020 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
1021 dma-names = "tx", "rx 1021 dma-names = "tx", "rx";
1022 power-domains = <&sys 1022 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1023 resets = <&cpg 702>; 1023 resets = <&cpg 702>;
1024 status = "disabled"; 1024 status = "disabled";
1025 }; 1025 };
1026 1026
1027 scif1: serial@e6e68000 { 1027 scif1: serial@e6e68000 {
1028 compatible = "renesas 1028 compatible = "renesas,scif-r8a779a0",
1029 "renesas 1029 "renesas,rcar-gen4-scif", "renesas,scif";
1030 reg = <0 0xe6e68000 0 1030 reg = <0 0xe6e68000 0 64>;
1031 interrupts = <GIC_SPI 1031 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
1032 clocks = <&cpg CPG_MO 1032 clocks = <&cpg CPG_MOD 703>,
1033 <&cpg CPG_CO 1033 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
1034 <&scif_clk>; 1034 <&scif_clk>;
1035 clock-names = "fck", 1035 clock-names = "fck", "brg_int", "scif_clk";
1036 dmas = <&dmac1 0x53>, 1036 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
1037 dma-names = "tx", "rx 1037 dma-names = "tx", "rx";
1038 power-domains = <&sys 1038 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1039 resets = <&cpg 703>; 1039 resets = <&cpg 703>;
1040 status = "disabled"; 1040 status = "disabled";
1041 }; 1041 };
1042 1042
1043 scif3: serial@e6c50000 { 1043 scif3: serial@e6c50000 {
1044 compatible = "renesas 1044 compatible = "renesas,scif-r8a779a0",
1045 "renesas 1045 "renesas,rcar-gen4-scif", "renesas,scif";
1046 reg = <0 0xe6c50000 0 1046 reg = <0 0xe6c50000 0 64>;
1047 interrupts = <GIC_SPI 1047 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
1048 clocks = <&cpg CPG_MO 1048 clocks = <&cpg CPG_MOD 704>,
1049 <&cpg CPG_CO 1049 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
1050 <&scif_clk>; 1050 <&scif_clk>;
1051 clock-names = "fck", 1051 clock-names = "fck", "brg_int", "scif_clk";
1052 dmas = <&dmac1 0x57>, 1052 dmas = <&dmac1 0x57>, <&dmac1 0x56>;
1053 dma-names = "tx", "rx 1053 dma-names = "tx", "rx";
1054 power-domains = <&sys 1054 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1055 resets = <&cpg 704>; 1055 resets = <&cpg 704>;
1056 status = "disabled"; 1056 status = "disabled";
1057 }; 1057 };
1058 1058
1059 scif4: serial@e6c40000 { 1059 scif4: serial@e6c40000 {
1060 compatible = "renesas 1060 compatible = "renesas,scif-r8a779a0",
1061 "renesas 1061 "renesas,rcar-gen4-scif", "renesas,scif";
1062 reg = <0 0xe6c40000 0 1062 reg = <0 0xe6c40000 0 64>;
1063 interrupts = <GIC_SPI 1063 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
1064 clocks = <&cpg CPG_MO 1064 clocks = <&cpg CPG_MOD 705>,
1065 <&cpg CPG_CO 1065 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
1066 <&scif_clk>; 1066 <&scif_clk>;
1067 clock-names = "fck", 1067 clock-names = "fck", "brg_int", "scif_clk";
1068 dmas = <&dmac1 0x59>, 1068 dmas = <&dmac1 0x59>, <&dmac1 0x58>;
1069 dma-names = "tx", "rx 1069 dma-names = "tx", "rx";
1070 power-domains = <&sys 1070 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1071 resets = <&cpg 705>; 1071 resets = <&cpg 705>;
1072 status = "disabled"; 1072 status = "disabled";
1073 }; 1073 };
1074 1074
1075 tpu: pwm@e6e80000 { 1075 tpu: pwm@e6e80000 {
1076 compatible = "renesas 1076 compatible = "renesas,tpu-r8a779a0", "renesas,tpu";
1077 reg = <0 0xe6e80000 0 1077 reg = <0 0xe6e80000 0 0x148>;
1078 interrupts = <GIC_SPI 1078 interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>;
1079 clocks = <&cpg CPG_MO 1079 clocks = <&cpg CPG_MOD 718>;
1080 power-domains = <&sys 1080 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1081 resets = <&cpg 718>; 1081 resets = <&cpg 718>;
1082 #pwm-cells = <3>; 1082 #pwm-cells = <3>;
1083 status = "disabled"; 1083 status = "disabled";
1084 }; 1084 };
1085 1085
1086 msiof0: spi@e6e90000 { 1086 msiof0: spi@e6e90000 {
1087 compatible = "renesas 1087 compatible = "renesas,msiof-r8a779a0",
1088 "renesas 1088 "renesas,rcar-gen4-msiof";
1089 reg = <0 0xe6e90000 0 1089 reg = <0 0xe6e90000 0 0x0064>;
1090 interrupts = <GIC_SPI 1090 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
1091 clocks = <&cpg CPG_MO 1091 clocks = <&cpg CPG_MOD 618>;
1092 power-domains = <&sys 1092 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1093 resets = <&cpg 618>; 1093 resets = <&cpg 618>;
1094 dmas = <&dmac1 0x41>, 1094 dmas = <&dmac1 0x41>, <&dmac1 0x40>;
1095 dma-names = "tx", "rx 1095 dma-names = "tx", "rx";
1096 #address-cells = <1>; 1096 #address-cells = <1>;
1097 #size-cells = <0>; 1097 #size-cells = <0>;
1098 status = "disabled"; 1098 status = "disabled";
1099 }; 1099 };
1100 1100
1101 msiof1: spi@e6ea0000 { 1101 msiof1: spi@e6ea0000 {
1102 compatible = "renesas 1102 compatible = "renesas,msiof-r8a779a0",
1103 "renesas 1103 "renesas,rcar-gen4-msiof";
1104 reg = <0 0xe6ea0000 0 1104 reg = <0 0xe6ea0000 0 0x0064>;
1105 interrupts = <GIC_SPI 1105 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1106 clocks = <&cpg CPG_MO 1106 clocks = <&cpg CPG_MOD 619>;
1107 power-domains = <&sys 1107 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1108 resets = <&cpg 619>; 1108 resets = <&cpg 619>;
1109 dmas = <&dmac1 0x43>, 1109 dmas = <&dmac1 0x43>, <&dmac1 0x42>;
1110 dma-names = "tx", "rx 1110 dma-names = "tx", "rx";
1111 #address-cells = <1>; 1111 #address-cells = <1>;
1112 #size-cells = <0>; 1112 #size-cells = <0>;
1113 status = "disabled"; 1113 status = "disabled";
1114 }; 1114 };
1115 1115
1116 msiof2: spi@e6c00000 { 1116 msiof2: spi@e6c00000 {
1117 compatible = "renesas 1117 compatible = "renesas,msiof-r8a779a0",
1118 "renesas 1118 "renesas,rcar-gen4-msiof";
1119 reg = <0 0xe6c00000 0 1119 reg = <0 0xe6c00000 0 0x0064>;
1120 interrupts = <GIC_SPI 1120 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1121 clocks = <&cpg CPG_MO 1121 clocks = <&cpg CPG_MOD 620>;
1122 power-domains = <&sys 1122 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1123 resets = <&cpg 620>; 1123 resets = <&cpg 620>;
1124 dmas = <&dmac1 0x45>, 1124 dmas = <&dmac1 0x45>, <&dmac1 0x44>;
1125 dma-names = "tx", "rx 1125 dma-names = "tx", "rx";
1126 #address-cells = <1>; 1126 #address-cells = <1>;
1127 #size-cells = <0>; 1127 #size-cells = <0>;
1128 status = "disabled"; 1128 status = "disabled";
1129 }; 1129 };
1130 1130
1131 msiof3: spi@e6c10000 { 1131 msiof3: spi@e6c10000 {
1132 compatible = "renesas 1132 compatible = "renesas,msiof-r8a779a0",
1133 "renesas 1133 "renesas,rcar-gen4-msiof";
1134 reg = <0 0xe6c10000 0 1134 reg = <0 0xe6c10000 0 0x0064>;
1135 interrupts = <GIC_SPI 1135 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
1136 clocks = <&cpg CPG_MO 1136 clocks = <&cpg CPG_MOD 621>;
1137 power-domains = <&sys 1137 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1138 resets = <&cpg 621>; 1138 resets = <&cpg 621>;
1139 dmas = <&dmac1 0x47>, 1139 dmas = <&dmac1 0x47>, <&dmac1 0x46>;
1140 dma-names = "tx", "rx 1140 dma-names = "tx", "rx";
1141 #address-cells = <1>; 1141 #address-cells = <1>;
1142 #size-cells = <0>; 1142 #size-cells = <0>;
1143 status = "disabled"; 1143 status = "disabled";
1144 }; 1144 };
1145 1145
1146 msiof4: spi@e6c20000 { 1146 msiof4: spi@e6c20000 {
1147 compatible = "renesas 1147 compatible = "renesas,msiof-r8a779a0",
1148 "renesas 1148 "renesas,rcar-gen4-msiof";
1149 reg = <0 0xe6c20000 0 1149 reg = <0 0xe6c20000 0 0x0064>;
1150 interrupts = <GIC_SPI 1150 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
1151 clocks = <&cpg CPG_MO 1151 clocks = <&cpg CPG_MOD 622>;
1152 power-domains = <&sys 1152 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1153 resets = <&cpg 622>; 1153 resets = <&cpg 622>;
1154 dmas = <&dmac1 0x49>, 1154 dmas = <&dmac1 0x49>, <&dmac1 0x48>;
1155 dma-names = "tx", "rx 1155 dma-names = "tx", "rx";
1156 #address-cells = <1>; 1156 #address-cells = <1>;
1157 #size-cells = <0>; 1157 #size-cells = <0>;
1158 status = "disabled"; 1158 status = "disabled";
1159 }; 1159 };
1160 1160
1161 msiof5: spi@e6c28000 { 1161 msiof5: spi@e6c28000 {
1162 compatible = "renesas 1162 compatible = "renesas,msiof-r8a779a0",
1163 "renesas 1163 "renesas,rcar-gen4-msiof";
1164 reg = <0 0xe6c28000 0 1164 reg = <0 0xe6c28000 0 0x0064>;
1165 interrupts = <GIC_SPI 1165 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
1166 clocks = <&cpg CPG_MO 1166 clocks = <&cpg CPG_MOD 623>;
1167 power-domains = <&sys 1167 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1168 resets = <&cpg 623>; 1168 resets = <&cpg 623>;
1169 dmas = <&dmac1 0x4b>, 1169 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>;
1170 dma-names = "tx", "rx 1170 dma-names = "tx", "rx";
1171 #address-cells = <1>; 1171 #address-cells = <1>;
1172 #size-cells = <0>; 1172 #size-cells = <0>;
1173 status = "disabled"; 1173 status = "disabled";
1174 }; 1174 };
1175 1175
1176 vin00: video@e6ef0000 { 1176 vin00: video@e6ef0000 {
1177 compatible = "renesas 1177 compatible = "renesas,vin-r8a779a0",
1178 "renesas 1178 "renesas,rcar-gen4-vin";
1179 reg = <0 0xe6ef0000 0 1179 reg = <0 0xe6ef0000 0 0x1000>;
1180 interrupts = <GIC_SPI 1180 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
1181 clocks = <&cpg CPG_MO 1181 clocks = <&cpg CPG_MOD 730>;
1182 power-domains = <&sys 1182 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1183 resets = <&cpg 730>; 1183 resets = <&cpg 730>;
1184 renesas,id = <0>; 1184 renesas,id = <0>;
1185 status = "disabled"; 1185 status = "disabled";
1186 1186
1187 ports { 1187 ports {
1188 #address-cell 1188 #address-cells = <1>;
1189 #size-cells = 1189 #size-cells = <0>;
1190 1190
1191 port@2 { 1191 port@2 {
1192 #addr 1192 #address-cells = <1>;
1193 #size 1193 #size-cells = <0>;
1194 1194
1195 reg = 1195 reg = <2>;
1196 1196
1197 vin00 1197 vin00isp0: endpoint@0 {
1198 1198 reg = <0>;
1199 1199 remote-endpoint = <&isp0vin00>;
1200 }; 1200 };
1201 }; 1201 };
1202 }; 1202 };
1203 }; 1203 };
1204 1204
1205 vin01: video@e6ef1000 { 1205 vin01: video@e6ef1000 {
1206 compatible = "renesas 1206 compatible = "renesas,vin-r8a779a0",
1207 "renesas 1207 "renesas,rcar-gen4-vin";
1208 reg = <0 0xe6ef1000 0 1208 reg = <0 0xe6ef1000 0 0x1000>;
1209 interrupts = <GIC_SPI 1209 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MO 1210 clocks = <&cpg CPG_MOD 731>;
1211 power-domains = <&sys 1211 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1212 resets = <&cpg 731>; 1212 resets = <&cpg 731>;
1213 renesas,id = <1>; 1213 renesas,id = <1>;
1214 status = "disabled"; 1214 status = "disabled";
1215 1215
1216 ports { 1216 ports {
1217 #address-cell 1217 #address-cells = <1>;
1218 #size-cells = 1218 #size-cells = <0>;
1219 1219
1220 port@2 { 1220 port@2 {
1221 #addr 1221 #address-cells = <1>;
1222 #size 1222 #size-cells = <0>;
1223 1223
1224 reg = 1224 reg = <2>;
1225 1225
1226 vin01 1226 vin01isp0: endpoint@0 {
1227 1227 reg = <0>;
1228 1228 remote-endpoint = <&isp0vin01>;
1229 }; 1229 };
1230 }; 1230 };
1231 }; 1231 };
1232 }; 1232 };
1233 1233
1234 vin02: video@e6ef2000 { 1234 vin02: video@e6ef2000 {
1235 compatible = "renesas 1235 compatible = "renesas,vin-r8a779a0",
1236 "renesas 1236 "renesas,rcar-gen4-vin";
1237 reg = <0 0xe6ef2000 0 1237 reg = <0 0xe6ef2000 0 0x1000>;
1238 interrupts = <GIC_SPI 1238 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1239 clocks = <&cpg CPG_MO 1239 clocks = <&cpg CPG_MOD 800>;
1240 power-domains = <&sys 1240 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1241 resets = <&cpg 800>; 1241 resets = <&cpg 800>;
1242 renesas,id = <2>; 1242 renesas,id = <2>;
1243 status = "disabled"; 1243 status = "disabled";
1244 1244
1245 ports { 1245 ports {
1246 #address-cell 1246 #address-cells = <1>;
1247 #size-cells = 1247 #size-cells = <0>;
1248 1248
1249 port@2 { 1249 port@2 {
1250 #addr 1250 #address-cells = <1>;
1251 #size 1251 #size-cells = <0>;
1252 1252
1253 reg = 1253 reg = <2>;
1254 1254
1255 vin02 1255 vin02isp0: endpoint@0 {
1256 1256 reg = <0>;
1257 1257 remote-endpoint = <&isp0vin02>;
1258 }; 1258 };
1259 }; 1259 };
1260 }; 1260 };
1261 }; 1261 };
1262 1262
1263 vin03: video@e6ef3000 { 1263 vin03: video@e6ef3000 {
1264 compatible = "renesas 1264 compatible = "renesas,vin-r8a779a0",
1265 "renesas 1265 "renesas,rcar-gen4-vin";
1266 reg = <0 0xe6ef3000 0 1266 reg = <0 0xe6ef3000 0 0x1000>;
1267 interrupts = <GIC_SPI 1267 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
1268 clocks = <&cpg CPG_MO 1268 clocks = <&cpg CPG_MOD 801>;
1269 power-domains = <&sys 1269 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1270 resets = <&cpg 801>; 1270 resets = <&cpg 801>;
1271 renesas,id = <3>; 1271 renesas,id = <3>;
1272 status = "disabled"; 1272 status = "disabled";
1273 1273
1274 ports { 1274 ports {
1275 #address-cell 1275 #address-cells = <1>;
1276 #size-cells = 1276 #size-cells = <0>;
1277 1277
1278 port@2 { 1278 port@2 {
1279 #addr 1279 #address-cells = <1>;
1280 #size 1280 #size-cells = <0>;
1281 1281
1282 reg = 1282 reg = <2>;
1283 1283
1284 vin03 1284 vin03isp0: endpoint@0 {
1285 1285 reg = <0>;
1286 1286 remote-endpoint = <&isp0vin03>;
1287 }; 1287 };
1288 }; 1288 };
1289 }; 1289 };
1290 }; 1290 };
1291 1291
1292 vin04: video@e6ef4000 { 1292 vin04: video@e6ef4000 {
1293 compatible = "renesas 1293 compatible = "renesas,vin-r8a779a0",
1294 "renesas 1294 "renesas,rcar-gen4-vin";
1295 reg = <0 0xe6ef4000 0 1295 reg = <0 0xe6ef4000 0 0x1000>;
1296 interrupts = <GIC_SPI 1296 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1297 clocks = <&cpg CPG_MO 1297 clocks = <&cpg CPG_MOD 802>;
1298 power-domains = <&sys 1298 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1299 resets = <&cpg 802>; 1299 resets = <&cpg 802>;
1300 renesas,id = <4>; 1300 renesas,id = <4>;
1301 status = "disabled"; 1301 status = "disabled";
1302 1302
1303 ports { 1303 ports {
1304 #address-cell 1304 #address-cells = <1>;
1305 #size-cells = 1305 #size-cells = <0>;
1306 1306
1307 port@2 { 1307 port@2 {
1308 #addr 1308 #address-cells = <1>;
1309 #size 1309 #size-cells = <0>;
1310 1310
1311 reg = 1311 reg = <2>;
1312 1312
1313 vin04 1313 vin04isp0: endpoint@0 {
1314 1314 reg = <0>;
1315 1315 remote-endpoint = <&isp0vin04>;
1316 }; 1316 };
1317 }; 1317 };
1318 }; 1318 };
1319 }; 1319 };
1320 1320
1321 vin05: video@e6ef5000 { 1321 vin05: video@e6ef5000 {
1322 compatible = "renesas 1322 compatible = "renesas,vin-r8a779a0",
1323 "renesas 1323 "renesas,rcar-gen4-vin";
1324 reg = <0 0xe6ef5000 0 1324 reg = <0 0xe6ef5000 0 0x1000>;
1325 interrupts = <GIC_SPI 1325 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1326 clocks = <&cpg CPG_MO 1326 clocks = <&cpg CPG_MOD 803>;
1327 power-domains = <&sys 1327 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1328 resets = <&cpg 803>; 1328 resets = <&cpg 803>;
1329 renesas,id = <5>; 1329 renesas,id = <5>;
1330 status = "disabled"; 1330 status = "disabled";
1331 1331
1332 ports { 1332 ports {
1333 #address-cell 1333 #address-cells = <1>;
1334 #size-cells = 1334 #size-cells = <0>;
1335 1335
1336 port@2 { 1336 port@2 {
1337 #addr 1337 #address-cells = <1>;
1338 #size 1338 #size-cells = <0>;
1339 1339
1340 reg = 1340 reg = <2>;
1341 1341
1342 vin05 1342 vin05isp0: endpoint@0 {
1343 1343 reg = <0>;
1344 1344 remote-endpoint = <&isp0vin05>;
1345 }; 1345 };
1346 }; 1346 };
1347 }; 1347 };
1348 }; 1348 };
1349 1349
1350 vin06: video@e6ef6000 { 1350 vin06: video@e6ef6000 {
1351 compatible = "renesas 1351 compatible = "renesas,vin-r8a779a0",
1352 "renesas 1352 "renesas,rcar-gen4-vin";
1353 reg = <0 0xe6ef6000 0 1353 reg = <0 0xe6ef6000 0 0x1000>;
1354 interrupts = <GIC_SPI 1354 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1355 clocks = <&cpg CPG_MO 1355 clocks = <&cpg CPG_MOD 804>;
1356 power-domains = <&sys 1356 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1357 resets = <&cpg 804>; 1357 resets = <&cpg 804>;
1358 renesas,id = <6>; 1358 renesas,id = <6>;
1359 status = "disabled"; 1359 status = "disabled";
1360 1360
1361 ports { 1361 ports {
1362 #address-cell 1362 #address-cells = <1>;
1363 #size-cells = 1363 #size-cells = <0>;
1364 1364
1365 port@2 { 1365 port@2 {
1366 #addr 1366 #address-cells = <1>;
1367 #size 1367 #size-cells = <0>;
1368 1368
1369 reg = 1369 reg = <2>;
1370 1370
1371 vin06 1371 vin06isp0: endpoint@0 {
1372 1372 reg = <0>;
1373 1373 remote-endpoint = <&isp0vin06>;
1374 }; 1374 };
1375 }; 1375 };
1376 }; 1376 };
1377 }; 1377 };
1378 1378
1379 vin07: video@e6ef7000 { 1379 vin07: video@e6ef7000 {
1380 compatible = "renesas 1380 compatible = "renesas,vin-r8a779a0",
1381 "renesas 1381 "renesas,rcar-gen4-vin";
1382 reg = <0 0xe6ef7000 0 1382 reg = <0 0xe6ef7000 0 0x1000>;
1383 interrupts = <GIC_SPI 1383 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1384 clocks = <&cpg CPG_MO 1384 clocks = <&cpg CPG_MOD 805>;
1385 power-domains = <&sys 1385 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1386 resets = <&cpg 805>; 1386 resets = <&cpg 805>;
1387 renesas,id = <7>; 1387 renesas,id = <7>;
1388 status = "disabled"; 1388 status = "disabled";
1389 1389
1390 ports { 1390 ports {
1391 #address-cell 1391 #address-cells = <1>;
1392 #size-cells = 1392 #size-cells = <0>;
1393 1393
1394 port@2 { 1394 port@2 {
1395 #addr 1395 #address-cells = <1>;
1396 #size 1396 #size-cells = <0>;
1397 1397
1398 reg = 1398 reg = <2>;
1399 1399
1400 vin07 1400 vin07isp0: endpoint@0 {
1401 1401 reg = <0>;
1402 1402 remote-endpoint = <&isp0vin07>;
1403 }; 1403 };
1404 }; 1404 };
1405 }; 1405 };
1406 }; 1406 };
1407 1407
1408 vin08: video@e6ef8000 { 1408 vin08: video@e6ef8000 {
1409 compatible = "renesas 1409 compatible = "renesas,vin-r8a779a0",
1410 "renesas 1410 "renesas,rcar-gen4-vin";
1411 reg = <0 0xe6ef8000 0 1411 reg = <0 0xe6ef8000 0 0x1000>;
1412 interrupts = <GIC_SPI 1412 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1413 clocks = <&cpg CPG_MO 1413 clocks = <&cpg CPG_MOD 806>;
1414 power-domains = <&sys 1414 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1415 resets = <&cpg 806>; 1415 resets = <&cpg 806>;
1416 renesas,id = <8>; 1416 renesas,id = <8>;
1417 status = "disabled"; 1417 status = "disabled";
1418 1418
1419 ports { 1419 ports {
1420 #address-cell 1420 #address-cells = <1>;
1421 #size-cells = 1421 #size-cells = <0>;
1422 1422
1423 port@2 { 1423 port@2 {
1424 #addr 1424 #address-cells = <1>;
1425 #size 1425 #size-cells = <0>;
1426 1426
1427 reg = 1427 reg = <2>;
1428 1428
1429 vin08 1429 vin08isp1: endpoint@1 {
1430 1430 reg = <1>;
1431 1431 remote-endpoint = <&isp1vin08>;
1432 }; 1432 };
1433 }; 1433 };
1434 }; 1434 };
1435 }; 1435 };
1436 1436
1437 vin09: video@e6ef9000 { 1437 vin09: video@e6ef9000 {
1438 compatible = "renesas 1438 compatible = "renesas,vin-r8a779a0",
1439 "renesas 1439 "renesas,rcar-gen4-vin";
1440 reg = <0 0xe6ef9000 0 1440 reg = <0 0xe6ef9000 0 0x1000>;
1441 interrupts = <GIC_SPI 1441 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1442 clocks = <&cpg CPG_MO 1442 clocks = <&cpg CPG_MOD 807>;
1443 power-domains = <&sys 1443 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1444 resets = <&cpg 807>; 1444 resets = <&cpg 807>;
1445 renesas,id = <9>; 1445 renesas,id = <9>;
1446 status = "disabled"; 1446 status = "disabled";
1447 1447
1448 ports { 1448 ports {
1449 #address-cell 1449 #address-cells = <1>;
1450 #size-cells = 1450 #size-cells = <0>;
1451 1451
1452 port@2 { 1452 port@2 {
1453 #addr 1453 #address-cells = <1>;
1454 #size 1454 #size-cells = <0>;
1455 1455
1456 reg = 1456 reg = <2>;
1457 1457
1458 vin09 1458 vin09isp1: endpoint@1 {
1459 1459 reg = <1>;
1460 1460 remote-endpoint = <&isp1vin09>;
1461 }; 1461 };
1462 }; 1462 };
1463 }; 1463 };
1464 }; 1464 };
1465 1465
1466 vin10: video@e6efa000 { 1466 vin10: video@e6efa000 {
1467 compatible = "renesas 1467 compatible = "renesas,vin-r8a779a0",
1468 "renesas 1468 "renesas,rcar-gen4-vin";
1469 reg = <0 0xe6efa000 0 1469 reg = <0 0xe6efa000 0 0x1000>;
1470 interrupts = <GIC_SPI 1470 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1471 clocks = <&cpg CPG_MO 1471 clocks = <&cpg CPG_MOD 808>;
1472 power-domains = <&sys 1472 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1473 resets = <&cpg 808>; 1473 resets = <&cpg 808>;
1474 renesas,id = <10>; 1474 renesas,id = <10>;
1475 status = "disabled"; 1475 status = "disabled";
1476 1476
1477 ports { 1477 ports {
1478 #address-cell 1478 #address-cells = <1>;
1479 #size-cells = 1479 #size-cells = <0>;
1480 1480
1481 port@2 { 1481 port@2 {
1482 #addr 1482 #address-cells = <1>;
1483 #size 1483 #size-cells = <0>;
1484 1484
1485 reg = 1485 reg = <2>;
1486 1486
1487 vin10 1487 vin10isp1: endpoint@1 {
1488 1488 reg = <1>;
1489 1489 remote-endpoint = <&isp1vin10>;
1490 }; 1490 };
1491 }; 1491 };
1492 }; 1492 };
1493 }; 1493 };
1494 1494
1495 vin11: video@e6efb000 { 1495 vin11: video@e6efb000 {
1496 compatible = "renesas 1496 compatible = "renesas,vin-r8a779a0",
1497 "renesas 1497 "renesas,rcar-gen4-vin";
1498 reg = <0 0xe6efb000 0 1498 reg = <0 0xe6efb000 0 0x1000>;
1499 interrupts = <GIC_SPI 1499 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1500 clocks = <&cpg CPG_MO 1500 clocks = <&cpg CPG_MOD 809>;
1501 power-domains = <&sys 1501 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1502 resets = <&cpg 809>; 1502 resets = <&cpg 809>;
1503 renesas,id = <11>; 1503 renesas,id = <11>;
1504 status = "disabled"; 1504 status = "disabled";
1505 1505
1506 ports { 1506 ports {
1507 #address-cell 1507 #address-cells = <1>;
1508 #size-cells = 1508 #size-cells = <0>;
1509 1509
1510 port@2 { 1510 port@2 {
1511 #addr 1511 #address-cells = <1>;
1512 #size 1512 #size-cells = <0>;
1513 1513
1514 reg = 1514 reg = <2>;
1515 1515
1516 vin11 1516 vin11isp1: endpoint@1 {
1517 1517 reg = <1>;
1518 1518 remote-endpoint = <&isp1vin11>;
1519 }; 1519 };
1520 }; 1520 };
1521 }; 1521 };
1522 }; 1522 };
1523 1523
1524 vin12: video@e6efc000 { 1524 vin12: video@e6efc000 {
1525 compatible = "renesas 1525 compatible = "renesas,vin-r8a779a0",
1526 "renesas 1526 "renesas,rcar-gen4-vin";
1527 reg = <0 0xe6efc000 0 1527 reg = <0 0xe6efc000 0 0x1000>;
1528 interrupts = <GIC_SPI 1528 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1529 clocks = <&cpg CPG_MO 1529 clocks = <&cpg CPG_MOD 810>;
1530 power-domains = <&sys 1530 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1531 resets = <&cpg 810>; 1531 resets = <&cpg 810>;
1532 renesas,id = <12>; 1532 renesas,id = <12>;
1533 status = "disabled"; 1533 status = "disabled";
1534 1534
1535 ports { 1535 ports {
1536 #address-cell 1536 #address-cells = <1>;
1537 #size-cells = 1537 #size-cells = <0>;
1538 1538
1539 port@2 { 1539 port@2 {
1540 #addr 1540 #address-cells = <1>;
1541 #size 1541 #size-cells = <0>;
1542 1542
1543 reg = 1543 reg = <2>;
1544 1544
1545 vin12 1545 vin12isp1: endpoint@1 {
1546 1546 reg = <1>;
1547 1547 remote-endpoint = <&isp1vin12>;
1548 }; 1548 };
1549 }; 1549 };
1550 }; 1550 };
1551 }; 1551 };
1552 1552
1553 vin13: video@e6efd000 { 1553 vin13: video@e6efd000 {
1554 compatible = "renesas 1554 compatible = "renesas,vin-r8a779a0",
1555 "renesas 1555 "renesas,rcar-gen4-vin";
1556 reg = <0 0xe6efd000 0 1556 reg = <0 0xe6efd000 0 0x1000>;
1557 interrupts = <GIC_SPI 1557 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
1558 clocks = <&cpg CPG_MO 1558 clocks = <&cpg CPG_MOD 811>;
1559 power-domains = <&sys 1559 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1560 resets = <&cpg 811>; 1560 resets = <&cpg 811>;
1561 renesas,id = <13>; 1561 renesas,id = <13>;
1562 status = "disabled"; 1562 status = "disabled";
1563 1563
1564 ports { 1564 ports {
1565 #address-cell 1565 #address-cells = <1>;
1566 #size-cells = 1566 #size-cells = <0>;
1567 1567
1568 port@2 { 1568 port@2 {
1569 #addr 1569 #address-cells = <1>;
1570 #size 1570 #size-cells = <0>;
1571 1571
1572 reg = 1572 reg = <2>;
1573 1573
1574 vin13 1574 vin13isp1: endpoint@1 {
1575 1575 reg = <1>;
1576 1576 remote-endpoint = <&isp1vin13>;
1577 }; 1577 };
1578 }; 1578 };
1579 }; 1579 };
1580 }; 1580 };
1581 1581
1582 vin14: video@e6efe000 { 1582 vin14: video@e6efe000 {
1583 compatible = "renesas 1583 compatible = "renesas,vin-r8a779a0",
1584 "renesas 1584 "renesas,rcar-gen4-vin";
1585 reg = <0 0xe6efe000 0 1585 reg = <0 0xe6efe000 0 0x1000>;
1586 interrupts = <GIC_SPI 1586 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1587 clocks = <&cpg CPG_MO 1587 clocks = <&cpg CPG_MOD 812>;
1588 power-domains = <&sys 1588 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1589 resets = <&cpg 812>; 1589 resets = <&cpg 812>;
1590 renesas,id = <14>; 1590 renesas,id = <14>;
1591 status = "disabled"; 1591 status = "disabled";
1592 1592
1593 ports { 1593 ports {
1594 #address-cell 1594 #address-cells = <1>;
1595 #size-cells = 1595 #size-cells = <0>;
1596 1596
1597 port@2 { 1597 port@2 {
1598 #addr 1598 #address-cells = <1>;
1599 #size 1599 #size-cells = <0>;
1600 1600
1601 reg = 1601 reg = <2>;
1602 1602
1603 vin14 1603 vin14isp1: endpoint@1 {
1604 1604 reg = <1>;
1605 1605 remote-endpoint = <&isp1vin14>;
1606 }; 1606 };
1607 }; 1607 };
1608 }; 1608 };
1609 }; 1609 };
1610 1610
1611 vin15: video@e6eff000 { 1611 vin15: video@e6eff000 {
1612 compatible = "renesas 1612 compatible = "renesas,vin-r8a779a0",
1613 "renesas 1613 "renesas,rcar-gen4-vin";
1614 reg = <0 0xe6eff000 0 1614 reg = <0 0xe6eff000 0 0x1000>;
1615 interrupts = <GIC_SPI 1615 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1616 clocks = <&cpg CPG_MO 1616 clocks = <&cpg CPG_MOD 813>;
1617 power-domains = <&sys 1617 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1618 resets = <&cpg 813>; 1618 resets = <&cpg 813>;
1619 renesas,id = <15>; 1619 renesas,id = <15>;
1620 status = "disabled"; 1620 status = "disabled";
1621 1621
1622 ports { 1622 ports {
1623 #address-cell 1623 #address-cells = <1>;
1624 #size-cells = 1624 #size-cells = <0>;
1625 1625
1626 port@2 { 1626 port@2 {
1627 #addr 1627 #address-cells = <1>;
1628 #size 1628 #size-cells = <0>;
1629 1629
1630 reg = 1630 reg = <2>;
1631 1631
1632 vin15 1632 vin15isp1: endpoint@1 {
1633 1633 reg = <1>;
1634 1634 remote-endpoint = <&isp1vin15>;
1635 }; 1635 };
1636 }; 1636 };
1637 }; 1637 };
1638 }; 1638 };
1639 1639
1640 vin16: video@e6ed0000 { 1640 vin16: video@e6ed0000 {
1641 compatible = "renesas 1641 compatible = "renesas,vin-r8a779a0",
1642 "renesas 1642 "renesas,rcar-gen4-vin";
1643 reg = <0 0xe6ed0000 0 1643 reg = <0 0xe6ed0000 0 0x1000>;
1644 interrupts = <GIC_SPI 1644 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1645 clocks = <&cpg CPG_MO 1645 clocks = <&cpg CPG_MOD 814>;
1646 power-domains = <&sys 1646 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1647 resets = <&cpg 814>; 1647 resets = <&cpg 814>;
1648 renesas,id = <16>; 1648 renesas,id = <16>;
1649 status = "disabled"; 1649 status = "disabled";
1650 1650
1651 ports { 1651 ports {
1652 #address-cell 1652 #address-cells = <1>;
1653 #size-cells = 1653 #size-cells = <0>;
1654 1654
1655 port@2 { 1655 port@2 {
1656 #addr 1656 #address-cells = <1>;
1657 #size 1657 #size-cells = <0>;
1658 1658
1659 reg = 1659 reg = <2>;
1660 1660
1661 vin16 1661 vin16isp2: endpoint@2 {
1662 1662 reg = <2>;
1663 1663 remote-endpoint = <&isp2vin16>;
1664 }; 1664 };
1665 }; 1665 };
1666 }; 1666 };
1667 }; 1667 };
1668 1668
1669 vin17: video@e6ed1000 { 1669 vin17: video@e6ed1000 {
1670 compatible = "renesas 1670 compatible = "renesas,vin-r8a779a0",
1671 "renesas 1671 "renesas,rcar-gen4-vin";
1672 reg = <0 0xe6ed1000 0 1672 reg = <0 0xe6ed1000 0 0x1000>;
1673 interrupts = <GIC_SPI 1673 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
1674 clocks = <&cpg CPG_MO 1674 clocks = <&cpg CPG_MOD 815>;
1675 power-domains = <&sys 1675 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1676 resets = <&cpg 815>; 1676 resets = <&cpg 815>;
1677 renesas,id = <17>; 1677 renesas,id = <17>;
1678 status = "disabled"; 1678 status = "disabled";
1679 1679
1680 ports { 1680 ports {
1681 #address-cell 1681 #address-cells = <1>;
1682 #size-cells = 1682 #size-cells = <0>;
1683 1683
1684 port@2 { 1684 port@2 {
1685 #addr 1685 #address-cells = <1>;
1686 #size 1686 #size-cells = <0>;
1687 1687
1688 reg = 1688 reg = <2>;
1689 1689
1690 vin17 1690 vin17isp2: endpoint@2 {
1691 1691 reg = <2>;
1692 1692 remote-endpoint = <&isp2vin17>;
1693 }; 1693 };
1694 }; 1694 };
1695 }; 1695 };
1696 }; 1696 };
1697 1697
1698 vin18: video@e6ed2000 { 1698 vin18: video@e6ed2000 {
1699 compatible = "renesas 1699 compatible = "renesas,vin-r8a779a0",
1700 "renesas 1700 "renesas,rcar-gen4-vin";
1701 reg = <0 0xe6ed2000 0 1701 reg = <0 0xe6ed2000 0 0x1000>;
1702 interrupts = <GIC_SPI 1702 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1703 clocks = <&cpg CPG_MO 1703 clocks = <&cpg CPG_MOD 816>;
1704 power-domains = <&sys 1704 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1705 resets = <&cpg 816>; 1705 resets = <&cpg 816>;
1706 renesas,id = <18>; 1706 renesas,id = <18>;
1707 status = "disabled"; 1707 status = "disabled";
1708 1708
1709 ports { 1709 ports {
1710 #address-cell 1710 #address-cells = <1>;
1711 #size-cells = 1711 #size-cells = <0>;
1712 1712
1713 port@2 { 1713 port@2 {
1714 #addr 1714 #address-cells = <1>;
1715 #size 1715 #size-cells = <0>;
1716 1716
1717 reg = 1717 reg = <2>;
1718 1718
1719 vin18 1719 vin18isp2: endpoint@2 {
1720 1720 reg = <2>;
1721 1721 remote-endpoint = <&isp2vin18>;
1722 }; 1722 };
1723 }; 1723 };
1724 }; 1724 };
1725 }; 1725 };
1726 1726
1727 vin19: video@e6ed3000 { 1727 vin19: video@e6ed3000 {
1728 compatible = "renesas 1728 compatible = "renesas,vin-r8a779a0",
1729 "renesas 1729 "renesas,rcar-gen4-vin";
1730 reg = <0 0xe6ed3000 0 1730 reg = <0 0xe6ed3000 0 0x1000>;
1731 interrupts = <GIC_SPI 1731 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
1732 clocks = <&cpg CPG_MO 1732 clocks = <&cpg CPG_MOD 817>;
1733 power-domains = <&sys 1733 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1734 resets = <&cpg 817>; 1734 resets = <&cpg 817>;
1735 renesas,id = <19>; 1735 renesas,id = <19>;
1736 status = "disabled"; 1736 status = "disabled";
1737 1737
1738 ports { 1738 ports {
1739 #address-cell 1739 #address-cells = <1>;
1740 #size-cells = 1740 #size-cells = <0>;
1741 1741
1742 port@2 { 1742 port@2 {
1743 #addr 1743 #address-cells = <1>;
1744 #size 1744 #size-cells = <0>;
1745 1745
1746 reg = 1746 reg = <2>;
1747 1747
1748 vin19 1748 vin19isp2: endpoint@2 {
1749 1749 reg = <2>;
1750 1750 remote-endpoint = <&isp2vin19>;
1751 }; 1751 };
1752 }; 1752 };
1753 }; 1753 };
1754 }; 1754 };
1755 1755
1756 vin20: video@e6ed4000 { 1756 vin20: video@e6ed4000 {
1757 compatible = "renesas 1757 compatible = "renesas,vin-r8a779a0",
1758 "renesas 1758 "renesas,rcar-gen4-vin";
1759 reg = <0 0xe6ed4000 0 1759 reg = <0 0xe6ed4000 0 0x1000>;
1760 interrupts = <GIC_SPI 1760 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
1761 clocks = <&cpg CPG_MO 1761 clocks = <&cpg CPG_MOD 818>;
1762 power-domains = <&sys 1762 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1763 resets = <&cpg 818>; 1763 resets = <&cpg 818>;
1764 renesas,id = <20>; 1764 renesas,id = <20>;
1765 status = "disabled"; 1765 status = "disabled";
1766 1766
1767 ports { 1767 ports {
1768 #address-cell 1768 #address-cells = <1>;
1769 #size-cells = 1769 #size-cells = <0>;
1770 1770
1771 port@2 { 1771 port@2 {
1772 #addr 1772 #address-cells = <1>;
1773 #size 1773 #size-cells = <0>;
1774 1774
1775 reg = 1775 reg = <2>;
1776 1776
1777 vin20 1777 vin20isp2: endpoint@2 {
1778 1778 reg = <2>;
1779 1779 remote-endpoint = <&isp2vin20>;
1780 }; 1780 };
1781 }; 1781 };
1782 }; 1782 };
1783 }; 1783 };
1784 1784
1785 vin21: video@e6ed5000 { 1785 vin21: video@e6ed5000 {
1786 compatible = "renesas 1786 compatible = "renesas,vin-r8a779a0",
1787 "renesas 1787 "renesas,rcar-gen4-vin";
1788 reg = <0 0xe6ed5000 0 1788 reg = <0 0xe6ed5000 0 0x1000>;
1789 interrupts = <GIC_SPI 1789 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
1790 clocks = <&cpg CPG_MO 1790 clocks = <&cpg CPG_MOD 819>;
1791 power-domains = <&sys 1791 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1792 resets = <&cpg 819>; 1792 resets = <&cpg 819>;
1793 renesas,id = <21>; 1793 renesas,id = <21>;
1794 status = "disabled"; 1794 status = "disabled";
1795 1795
1796 ports { 1796 ports {
1797 #address-cell 1797 #address-cells = <1>;
1798 #size-cells = 1798 #size-cells = <0>;
1799 1799
1800 port@2 { 1800 port@2 {
1801 #addr 1801 #address-cells = <1>;
1802 #size 1802 #size-cells = <0>;
1803 1803
1804 reg = 1804 reg = <2>;
1805 1805
1806 vin21 1806 vin21isp2: endpoint@2 {
1807 1807 reg = <2>;
1808 1808 remote-endpoint = <&isp2vin21>;
1809 }; 1809 };
1810 }; 1810 };
1811 }; 1811 };
1812 }; 1812 };
1813 1813
1814 vin22: video@e6ed6000 { 1814 vin22: video@e6ed6000 {
1815 compatible = "renesas 1815 compatible = "renesas,vin-r8a779a0",
1816 "renesas 1816 "renesas,rcar-gen4-vin";
1817 reg = <0 0xe6ed6000 0 1817 reg = <0 0xe6ed6000 0 0x1000>;
1818 interrupts = <GIC_SPI 1818 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
1819 clocks = <&cpg CPG_MO 1819 clocks = <&cpg CPG_MOD 820>;
1820 power-domains = <&sys 1820 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1821 resets = <&cpg 820>; 1821 resets = <&cpg 820>;
1822 renesas,id = <22>; 1822 renesas,id = <22>;
1823 status = "disabled"; 1823 status = "disabled";
1824 1824
1825 ports { 1825 ports {
1826 #address-cell 1826 #address-cells = <1>;
1827 #size-cells = 1827 #size-cells = <0>;
1828 1828
1829 port@2 { 1829 port@2 {
1830 #addr 1830 #address-cells = <1>;
1831 #size 1831 #size-cells = <0>;
1832 1832
1833 reg = 1833 reg = <2>;
1834 1834
1835 vin22 1835 vin22isp2: endpoint@2 {
1836 1836 reg = <2>;
1837 1837 remote-endpoint = <&isp2vin22>;
1838 }; 1838 };
1839 }; 1839 };
1840 }; 1840 };
1841 }; 1841 };
1842 1842
1843 vin23: video@e6ed7000 { 1843 vin23: video@e6ed7000 {
1844 compatible = "renesas 1844 compatible = "renesas,vin-r8a779a0",
1845 "renesas 1845 "renesas,rcar-gen4-vin";
1846 reg = <0 0xe6ed7000 0 1846 reg = <0 0xe6ed7000 0 0x1000>;
1847 interrupts = <GIC_SPI 1847 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
1848 clocks = <&cpg CPG_MO 1848 clocks = <&cpg CPG_MOD 821>;
1849 power-domains = <&sys 1849 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1850 resets = <&cpg 821>; 1850 resets = <&cpg 821>;
1851 renesas,id = <23>; 1851 renesas,id = <23>;
1852 status = "disabled"; 1852 status = "disabled";
1853 1853
1854 ports { 1854 ports {
1855 #address-cell 1855 #address-cells = <1>;
1856 #size-cells = 1856 #size-cells = <0>;
1857 1857
1858 port@2 { 1858 port@2 {
1859 #addr 1859 #address-cells = <1>;
1860 #size 1860 #size-cells = <0>;
1861 1861
1862 reg = 1862 reg = <2>;
1863 1863
1864 vin23 1864 vin23isp2: endpoint@2 {
1865 1865 reg = <2>;
1866 1866 remote-endpoint = <&isp2vin23>;
1867 }; 1867 };
1868 }; 1868 };
1869 }; 1869 };
1870 }; 1870 };
1871 1871
1872 vin24: video@e6ed8000 { 1872 vin24: video@e6ed8000 {
1873 compatible = "renesas 1873 compatible = "renesas,vin-r8a779a0",
1874 "renesas 1874 "renesas,rcar-gen4-vin";
1875 reg = <0 0xe6ed8000 0 1875 reg = <0 0xe6ed8000 0 0x1000>;
1876 interrupts = <GIC_SPI 1876 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1877 clocks = <&cpg CPG_MO 1877 clocks = <&cpg CPG_MOD 822>;
1878 power-domains = <&sys 1878 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1879 resets = <&cpg 822>; 1879 resets = <&cpg 822>;
1880 renesas,id = <24>; 1880 renesas,id = <24>;
1881 status = "disabled"; 1881 status = "disabled";
1882 1882
1883 ports { 1883 ports {
1884 #address-cell 1884 #address-cells = <1>;
1885 #size-cells = 1885 #size-cells = <0>;
1886 1886
1887 port@2 { 1887 port@2 {
1888 #addr 1888 #address-cells = <1>;
1889 #size 1889 #size-cells = <0>;
1890 1890
1891 reg = 1891 reg = <2>;
1892 1892
1893 vin24 1893 vin24isp3: endpoint@3 {
1894 1894 reg = <3>;
1895 1895 remote-endpoint = <&isp3vin24>;
1896 }; 1896 };
1897 }; 1897 };
1898 }; 1898 };
1899 }; 1899 };
1900 1900
1901 vin25: video@e6ed9000 { 1901 vin25: video@e6ed9000 {
1902 compatible = "renesas 1902 compatible = "renesas,vin-r8a779a0",
1903 "renesas 1903 "renesas,rcar-gen4-vin";
1904 reg = <0 0xe6ed9000 0 1904 reg = <0 0xe6ed9000 0 0x1000>;
1905 interrupts = <GIC_SPI 1905 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
1906 clocks = <&cpg CPG_MO 1906 clocks = <&cpg CPG_MOD 823>;
1907 power-domains = <&sys 1907 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1908 resets = <&cpg 823>; 1908 resets = <&cpg 823>;
1909 renesas,id = <25>; 1909 renesas,id = <25>;
1910 status = "disabled"; 1910 status = "disabled";
1911 1911
1912 ports { 1912 ports {
1913 #address-cell 1913 #address-cells = <1>;
1914 #size-cells = 1914 #size-cells = <0>;
1915 1915
1916 port@2 { 1916 port@2 {
1917 #addr 1917 #address-cells = <1>;
1918 #size 1918 #size-cells = <0>;
1919 1919
1920 reg = 1920 reg = <2>;
1921 1921
1922 vin25 1922 vin25isp3: endpoint@3 {
1923 1923 reg = <3>;
1924 1924 remote-endpoint = <&isp3vin25>;
1925 }; 1925 };
1926 }; 1926 };
1927 }; 1927 };
1928 }; 1928 };
1929 1929
1930 vin26: video@e6eda000 { 1930 vin26: video@e6eda000 {
1931 compatible = "renesas 1931 compatible = "renesas,vin-r8a779a0",
1932 "renesas 1932 "renesas,rcar-gen4-vin";
1933 reg = <0 0xe6eda000 0 1933 reg = <0 0xe6eda000 0 0x1000>;
1934 interrupts = <GIC_SPI 1934 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1935 clocks = <&cpg CPG_MO 1935 clocks = <&cpg CPG_MOD 824>;
1936 power-domains = <&sys 1936 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1937 resets = <&cpg 824>; 1937 resets = <&cpg 824>;
1938 renesas,id = <26>; 1938 renesas,id = <26>;
1939 status = "disabled"; 1939 status = "disabled";
1940 1940
1941 ports { 1941 ports {
1942 #address-cell 1942 #address-cells = <1>;
1943 #size-cells = 1943 #size-cells = <0>;
1944 1944
1945 port@2 { 1945 port@2 {
1946 #addr 1946 #address-cells = <1>;
1947 #size 1947 #size-cells = <0>;
1948 1948
1949 reg = 1949 reg = <2>;
1950 1950
1951 vin26 1951 vin26isp3: endpoint@3 {
1952 1952 reg = <3>;
1953 1953 remote-endpoint = <&isp3vin26>;
1954 }; 1954 };
1955 }; 1955 };
1956 }; 1956 };
1957 }; 1957 };
1958 1958
1959 vin27: video@e6edb000 { 1959 vin27: video@e6edb000 {
1960 compatible = "renesas 1960 compatible = "renesas,vin-r8a779a0",
1961 "renesas 1961 "renesas,rcar-gen4-vin";
1962 reg = <0 0xe6edb000 0 1962 reg = <0 0xe6edb000 0 0x1000>;
1963 interrupts = <GIC_SPI 1963 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1964 clocks = <&cpg CPG_MO 1964 clocks = <&cpg CPG_MOD 825>;
1965 power-domains = <&sys 1965 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1966 resets = <&cpg 825>; 1966 resets = <&cpg 825>;
1967 renesas,id = <27>; 1967 renesas,id = <27>;
1968 status = "disabled"; 1968 status = "disabled";
1969 1969
1970 ports { 1970 ports {
1971 #address-cell 1971 #address-cells = <1>;
1972 #size-cells = 1972 #size-cells = <0>;
1973 1973
1974 port@2 { 1974 port@2 {
1975 #addr 1975 #address-cells = <1>;
1976 #size 1976 #size-cells = <0>;
1977 1977
1978 reg = 1978 reg = <2>;
1979 1979
1980 vin27 1980 vin27isp3: endpoint@3 {
1981 1981 reg = <3>;
1982 1982 remote-endpoint = <&isp3vin27>;
1983 }; 1983 };
1984 }; 1984 };
1985 }; 1985 };
1986 }; 1986 };
1987 1987
1988 vin28: video@e6edc000 { 1988 vin28: video@e6edc000 {
1989 compatible = "renesas 1989 compatible = "renesas,vin-r8a779a0",
1990 "renesas 1990 "renesas,rcar-gen4-vin";
1991 reg = <0 0xe6edc000 0 1991 reg = <0 0xe6edc000 0 0x1000>;
1992 interrupts = <GIC_SPI 1992 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1993 clocks = <&cpg CPG_MO 1993 clocks = <&cpg CPG_MOD 826>;
1994 power-domains = <&sys 1994 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1995 resets = <&cpg 826>; 1995 resets = <&cpg 826>;
1996 renesas,id = <28>; 1996 renesas,id = <28>;
1997 status = "disabled"; 1997 status = "disabled";
1998 1998
1999 ports { 1999 ports {
2000 #address-cell 2000 #address-cells = <1>;
2001 #size-cells = 2001 #size-cells = <0>;
2002 2002
2003 port@2 { 2003 port@2 {
2004 #addr 2004 #address-cells = <1>;
2005 #size 2005 #size-cells = <0>;
2006 2006
2007 reg = 2007 reg = <2>;
2008 2008
2009 vin28 2009 vin28isp3: endpoint@3 {
2010 2010 reg = <3>;
2011 2011 remote-endpoint = <&isp3vin28>;
2012 }; 2012 };
2013 }; 2013 };
2014 }; 2014 };
2015 }; 2015 };
2016 2016
2017 vin29: video@e6edd000 { 2017 vin29: video@e6edd000 {
2018 compatible = "renesas 2018 compatible = "renesas,vin-r8a779a0",
2019 "renesas 2019 "renesas,rcar-gen4-vin";
2020 reg = <0 0xe6edd000 0 2020 reg = <0 0xe6edd000 0 0x1000>;
2021 interrupts = <GIC_SPI 2021 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
2022 clocks = <&cpg CPG_MO 2022 clocks = <&cpg CPG_MOD 827>;
2023 power-domains = <&sys 2023 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2024 resets = <&cpg 827>; 2024 resets = <&cpg 827>;
2025 renesas,id = <29>; 2025 renesas,id = <29>;
2026 status = "disabled"; 2026 status = "disabled";
2027 2027
2028 ports { 2028 ports {
2029 #address-cell 2029 #address-cells = <1>;
2030 #size-cells = 2030 #size-cells = <0>;
2031 2031
2032 port@2 { 2032 port@2 {
2033 #addr 2033 #address-cells = <1>;
2034 #size 2034 #size-cells = <0>;
2035 2035
2036 reg = 2036 reg = <2>;
2037 2037
2038 vin29 2038 vin29isp3: endpoint@3 {
2039 2039 reg = <3>;
2040 2040 remote-endpoint = <&isp3vin29>;
2041 }; 2041 };
2042 }; 2042 };
2043 }; 2043 };
2044 }; 2044 };
2045 2045
2046 vin30: video@e6ede000 { 2046 vin30: video@e6ede000 {
2047 compatible = "renesas 2047 compatible = "renesas,vin-r8a779a0",
2048 "renesas 2048 "renesas,rcar-gen4-vin";
2049 reg = <0 0xe6ede000 0 2049 reg = <0 0xe6ede000 0 0x1000>;
2050 interrupts = <GIC_SPI 2050 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
2051 clocks = <&cpg CPG_MO 2051 clocks = <&cpg CPG_MOD 828>;
2052 power-domains = <&sys 2052 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2053 resets = <&cpg 828>; 2053 resets = <&cpg 828>;
2054 renesas,id = <30>; 2054 renesas,id = <30>;
2055 status = "disabled"; 2055 status = "disabled";
2056 2056
2057 ports { 2057 ports {
2058 #address-cell 2058 #address-cells = <1>;
2059 #size-cells = 2059 #size-cells = <0>;
2060 2060
2061 port@2 { 2061 port@2 {
2062 #addr 2062 #address-cells = <1>;
2063 #size 2063 #size-cells = <0>;
2064 2064
2065 reg = 2065 reg = <2>;
2066 2066
2067 vin30 2067 vin30isp3: endpoint@3 {
2068 2068 reg = <3>;
2069 2069 remote-endpoint = <&isp3vin30>;
2070 }; 2070 };
2071 }; 2071 };
2072 }; 2072 };
2073 }; 2073 };
2074 2074
2075 vin31: video@e6edf000 { 2075 vin31: video@e6edf000 {
2076 compatible = "renesas 2076 compatible = "renesas,vin-r8a779a0",
2077 "renesas 2077 "renesas,rcar-gen4-vin";
2078 reg = <0 0xe6edf000 0 2078 reg = <0 0xe6edf000 0 0x1000>;
2079 interrupts = <GIC_SPI 2079 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
2080 clocks = <&cpg CPG_MO 2080 clocks = <&cpg CPG_MOD 829>;
2081 power-domains = <&sys 2081 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2082 resets = <&cpg 829>; 2082 resets = <&cpg 829>;
2083 renesas,id = <31>; 2083 renesas,id = <31>;
2084 status = "disabled"; 2084 status = "disabled";
2085 2085
2086 ports { 2086 ports {
2087 #address-cell 2087 #address-cells = <1>;
2088 #size-cells = 2088 #size-cells = <0>;
2089 2089
2090 port@2 { 2090 port@2 {
2091 #addr 2091 #address-cells = <1>;
2092 #size 2092 #size-cells = <0>;
2093 2093
2094 reg = 2094 reg = <2>;
2095 2095
2096 vin31 2096 vin31isp3: endpoint@3 {
2097 2097 reg = <3>;
2098 2098 remote-endpoint = <&isp3vin31>;
2099 }; 2099 };
2100 }; 2100 };
2101 }; 2101 };
2102 }; 2102 };
2103 2103
2104 dmac1: dma-controller@e735000 2104 dmac1: dma-controller@e7350000 {
2105 compatible = "renesas 2105 compatible = "renesas,dmac-r8a779a0",
2106 "renesas 2106 "renesas,rcar-gen4-dmac";
2107 reg = <0 0xe7350000 0 2107 reg = <0 0xe7350000 0 0x1000>,
2108 <0 0xe7300000 0 2108 <0 0xe7300000 0 0x10000>;
2109 interrupts = <GIC_SPI 2109 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
2110 <GIC_SPI 2110 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
2111 <GIC_SPI 2111 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
2112 <GIC_SPI 2112 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
2113 <GIC_SPI 2113 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
2114 <GIC_SPI 2114 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
2115 <GIC_SPI 2115 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
2116 <GIC_SPI 2116 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
2117 <GIC_SPI 2117 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
2118 <GIC_SPI 2118 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
2119 <GIC_SPI 2119 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
2120 <GIC_SPI 2120 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
2121 <GIC_SPI 2121 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
2122 <GIC_SPI 2122 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
2123 <GIC_SPI 2123 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
2124 <GIC_SPI 2124 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
2125 <GIC_SPI 2125 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
2126 interrupt-names = "er 2126 interrupt-names = "error",
2127 "ch 2127 "ch0", "ch1", "ch2", "ch3", "ch4",
2128 "ch 2128 "ch5", "ch6", "ch7", "ch8", "ch9",
2129 "ch 2129 "ch10", "ch11", "ch12", "ch13",
2130 "ch 2130 "ch14", "ch15";
2131 clocks = <&cpg CPG_MO 2131 clocks = <&cpg CPG_MOD 709>;
2132 clock-names = "fck"; 2132 clock-names = "fck";
2133 power-domains = <&sys 2133 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2134 resets = <&cpg 709>; 2134 resets = <&cpg 709>;
2135 #dma-cells = <1>; 2135 #dma-cells = <1>;
2136 dma-channels = <16>; 2136 dma-channels = <16>;
2137 iommus = <&ipmmu_ds0 2137 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
2138 <&ipmmu_ds0 2138 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
2139 <&ipmmu_ds0 2139 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
2140 <&ipmmu_ds0 2140 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
2141 <&ipmmu_ds0 2141 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
2142 <&ipmmu_ds0 2142 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
2143 <&ipmmu_ds0 2143 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
2144 <&ipmmu_ds0 2144 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
2145 }; 2145 };
2146 2146
2147 dmac2: dma-controller@e735100 2147 dmac2: dma-controller@e7351000 {
2148 compatible = "renesas 2148 compatible = "renesas,dmac-r8a779a0",
2149 "renesas 2149 "renesas,rcar-gen4-dmac";
2150 reg = <0 0xe7351000 0 2150 reg = <0 0xe7351000 0 0x1000>,
2151 <0 0xe7310000 0 2151 <0 0xe7310000 0 0x10000>;
2152 interrupts = <GIC_SPI 2152 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
2153 <GIC_SPI 2153 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
2154 <GIC_SPI 2154 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
2155 <GIC_SPI 2155 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
2156 <GIC_SPI 2156 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
2157 <GIC_SPI 2157 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
2158 <GIC_SPI 2158 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
2159 <GIC_SPI 2159 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
2160 <GIC_SPI 2160 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
2161 interrupt-names = "er 2161 interrupt-names = "error",
2162 "ch 2162 "ch0", "ch1", "ch2", "ch3", "ch4",
2163 "ch 2163 "ch5", "ch6", "ch7";
2164 clocks = <&cpg CPG_MO 2164 clocks = <&cpg CPG_MOD 710>;
2165 clock-names = "fck"; 2165 clock-names = "fck";
2166 power-domains = <&sys 2166 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2167 resets = <&cpg 710>; 2167 resets = <&cpg 710>;
2168 #dma-cells = <1>; 2168 #dma-cells = <1>;
2169 dma-channels = <8>; 2169 dma-channels = <8>;
2170 iommus = <&ipmmu_ds0 2170 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>,
2171 <&ipmmu_ds0 2171 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>,
2172 <&ipmmu_ds0 2172 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>,
2173 <&ipmmu_ds0 2173 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>;
2174 }; 2174 };
2175 2175
2176 mmc0: mmc@ee140000 { 2176 mmc0: mmc@ee140000 {
2177 compatible = "renesas 2177 compatible = "renesas,sdhi-r8a779a0",
2178 "renesas 2178 "renesas,rcar-gen4-sdhi";
2179 reg = <0 0xee140000 0 2179 reg = <0 0xee140000 0 0x2000>;
2180 interrupts = <GIC_SPI 2180 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
2181 clocks = <&cpg CPG_MO 2181 clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>;
2182 clock-names = "core", 2182 clock-names = "core", "clkh";
2183 power-domains = <&sys 2183 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2184 resets = <&cpg 706>; 2184 resets = <&cpg 706>;
2185 max-frequency = <2000 2185 max-frequency = <200000000>;
2186 iommus = <&ipmmu_ds0 2186 iommus = <&ipmmu_ds0 32>;
2187 status = "disabled"; 2187 status = "disabled";
2188 }; 2188 };
2189 2189
2190 rpc: spi@ee200000 { 2190 rpc: spi@ee200000 {
2191 compatible = "renesas 2191 compatible = "renesas,r8a779a0-rpc-if",
2192 "renesas 2192 "renesas,rcar-gen3-rpc-if";
2193 reg = <0 0xee200000 0 2193 reg = <0 0xee200000 0 0x200>,
2194 <0 0x08000000 0 2194 <0 0x08000000 0 0x04000000>,
2195 <0 0xee208000 0 2195 <0 0xee208000 0 0x100>;
2196 reg-names = "regs", " 2196 reg-names = "regs", "dirmap", "wbuf";
2197 interrupts = <GIC_SPI 2197 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
2198 clocks = <&cpg CPG_MO 2198 clocks = <&cpg CPG_MOD 629>;
2199 power-domains = <&sys 2199 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2200 resets = <&cpg 629>; 2200 resets = <&cpg 629>;
2201 #address-cells = <1>; 2201 #address-cells = <1>;
2202 #size-cells = <0>; 2202 #size-cells = <0>;
2203 status = "disabled"; 2203 status = "disabled";
2204 }; 2204 };
2205 2205
2206 ipmmu_rt0: iommu@ee480000 { 2206 ipmmu_rt0: iommu@ee480000 {
2207 compatible = "renesas 2207 compatible = "renesas,ipmmu-r8a779a0",
2208 "renesas 2208 "renesas,rcar-gen4-ipmmu-vmsa";
2209 reg = <0 0xee480000 0 2209 reg = <0 0xee480000 0 0x20000>;
2210 renesas,ipmmu-main = 2210 renesas,ipmmu-main = <&ipmmu_mm>;
2211 power-domains = <&sys 2211 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2212 #iommu-cells = <1>; 2212 #iommu-cells = <1>;
2213 }; 2213 };
2214 2214
2215 ipmmu_rt1: iommu@ee4c0000 { 2215 ipmmu_rt1: iommu@ee4c0000 {
2216 compatible = "renesas 2216 compatible = "renesas,ipmmu-r8a779a0",
2217 "renesas 2217 "renesas,rcar-gen4-ipmmu-vmsa";
2218 reg = <0 0xee4c0000 0 2218 reg = <0 0xee4c0000 0 0x20000>;
2219 renesas,ipmmu-main = 2219 renesas,ipmmu-main = <&ipmmu_mm>;
2220 power-domains = <&sys 2220 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2221 #iommu-cells = <1>; 2221 #iommu-cells = <1>;
2222 }; 2222 };
2223 2223
2224 ipmmu_ds0: iommu@eed00000 { 2224 ipmmu_ds0: iommu@eed00000 {
2225 compatible = "renesas 2225 compatible = "renesas,ipmmu-r8a779a0",
2226 "renesas 2226 "renesas,rcar-gen4-ipmmu-vmsa";
2227 reg = <0 0xeed00000 0 2227 reg = <0 0xeed00000 0 0x20000>;
2228 renesas,ipmmu-main = 2228 renesas,ipmmu-main = <&ipmmu_mm>;
2229 power-domains = <&sys 2229 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2230 #iommu-cells = <1>; 2230 #iommu-cells = <1>;
2231 }; 2231 };
2232 2232
2233 ipmmu_ds1: iommu@eed40000 { 2233 ipmmu_ds1: iommu@eed40000 {
2234 compatible = "renesas 2234 compatible = "renesas,ipmmu-r8a779a0",
2235 "renesas 2235 "renesas,rcar-gen4-ipmmu-vmsa";
2236 reg = <0 0xeed40000 0 2236 reg = <0 0xeed40000 0 0x20000>;
2237 renesas,ipmmu-main = 2237 renesas,ipmmu-main = <&ipmmu_mm>;
2238 power-domains = <&sys 2238 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2239 #iommu-cells = <1>; 2239 #iommu-cells = <1>;
2240 }; 2240 };
2241 2241
2242 ipmmu_ir: iommu@eed80000 { 2242 ipmmu_ir: iommu@eed80000 {
2243 compatible = "renesas 2243 compatible = "renesas,ipmmu-r8a779a0",
2244 "renesas 2244 "renesas,rcar-gen4-ipmmu-vmsa";
2245 reg = <0 0xeed80000 0 2245 reg = <0 0xeed80000 0 0x20000>;
2246 renesas,ipmmu-main = 2246 renesas,ipmmu-main = <&ipmmu_mm>;
2247 power-domains = <&sys 2247 power-domains = <&sysc R8A779A0_PD_A3IR>;
2248 #iommu-cells = <1>; 2248 #iommu-cells = <1>;
2249 }; 2249 };
2250 2250
2251 ipmmu_vc0: iommu@eedc0000 { 2251 ipmmu_vc0: iommu@eedc0000 {
2252 compatible = "renesas 2252 compatible = "renesas,ipmmu-r8a779a0",
2253 "renesas 2253 "renesas,rcar-gen4-ipmmu-vmsa";
2254 reg = <0 0xeedc0000 0 2254 reg = <0 0xeedc0000 0 0x20000>;
2255 renesas,ipmmu-main = 2255 renesas,ipmmu-main = <&ipmmu_mm>;
2256 power-domains = <&sys 2256 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2257 #iommu-cells = <1>; 2257 #iommu-cells = <1>;
2258 }; 2258 };
2259 2259
2260 ipmmu_vi0: iommu@eee80000 { 2260 ipmmu_vi0: iommu@eee80000 {
2261 compatible = "renesas 2261 compatible = "renesas,ipmmu-r8a779a0",
2262 "renesas 2262 "renesas,rcar-gen4-ipmmu-vmsa";
2263 reg = <0 0xeee80000 0 2263 reg = <0 0xeee80000 0 0x20000>;
2264 renesas,ipmmu-main = 2264 renesas,ipmmu-main = <&ipmmu_mm>;
2265 power-domains = <&sys 2265 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2266 #iommu-cells = <1>; 2266 #iommu-cells = <1>;
2267 }; 2267 };
2268 2268
2269 ipmmu_vi1: iommu@eeec0000 { 2269 ipmmu_vi1: iommu@eeec0000 {
2270 compatible = "renesas 2270 compatible = "renesas,ipmmu-r8a779a0",
2271 "renesas 2271 "renesas,rcar-gen4-ipmmu-vmsa";
2272 reg = <0 0xeeec0000 0 2272 reg = <0 0xeeec0000 0 0x20000>;
2273 renesas,ipmmu-main = 2273 renesas,ipmmu-main = <&ipmmu_mm>;
2274 power-domains = <&sys 2274 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2275 #iommu-cells = <1>; 2275 #iommu-cells = <1>;
2276 }; 2276 };
2277 2277
2278 ipmmu_3dg: iommu@eee00000 { 2278 ipmmu_3dg: iommu@eee00000 {
2279 compatible = "renesas 2279 compatible = "renesas,ipmmu-r8a779a0",
2280 "renesas 2280 "renesas,rcar-gen4-ipmmu-vmsa";
2281 reg = <0 0xeee00000 0 2281 reg = <0 0xeee00000 0 0x20000>;
2282 renesas,ipmmu-main = 2282 renesas,ipmmu-main = <&ipmmu_mm>;
2283 power-domains = <&sys 2283 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2284 #iommu-cells = <1>; 2284 #iommu-cells = <1>;
2285 }; 2285 };
2286 2286
2287 ipmmu_vip0: iommu@eef00000 { 2287 ipmmu_vip0: iommu@eef00000 {
2288 compatible = "renesas 2288 compatible = "renesas,ipmmu-r8a779a0",
2289 "renesas 2289 "renesas,rcar-gen4-ipmmu-vmsa";
2290 reg = <0 0xeef00000 0 2290 reg = <0 0xeef00000 0 0x20000>;
2291 renesas,ipmmu-main = 2291 renesas,ipmmu-main = <&ipmmu_mm>;
2292 power-domains = <&sys 2292 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2293 #iommu-cells = <1>; 2293 #iommu-cells = <1>;
2294 }; 2294 };
2295 2295
2296 ipmmu_vip1: iommu@eef40000 { 2296 ipmmu_vip1: iommu@eef40000 {
2297 compatible = "renesas 2297 compatible = "renesas,ipmmu-r8a779a0",
2298 "renesas 2298 "renesas,rcar-gen4-ipmmu-vmsa";
2299 reg = <0 0xeef40000 0 2299 reg = <0 0xeef40000 0 0x20000>;
2300 renesas,ipmmu-main = 2300 renesas,ipmmu-main = <&ipmmu_mm>;
2301 power-domains = <&sys 2301 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2302 #iommu-cells = <1>; 2302 #iommu-cells = <1>;
2303 }; 2303 };
2304 2304
2305 ipmmu_mm: iommu@eefc0000 { 2305 ipmmu_mm: iommu@eefc0000 {
2306 compatible = "renesas 2306 compatible = "renesas,ipmmu-r8a779a0",
2307 "renesas 2307 "renesas,rcar-gen4-ipmmu-vmsa";
2308 reg = <0 0xeefc0000 0 2308 reg = <0 0xeefc0000 0 0x20000>;
2309 interrupts = <GIC_SPI 2309 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
2310 <GIC_SPI 2310 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
2311 power-domains = <&sys 2311 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2312 #iommu-cells = <1>; 2312 #iommu-cells = <1>;
2313 }; 2313 };
2314 2314
2315 gic: interrupt-controller@f10 2315 gic: interrupt-controller@f1000000 {
2316 compatible = "arm,gic 2316 compatible = "arm,gic-v3";
2317 #interrupt-cells = <3 2317 #interrupt-cells = <3>;
2318 #address-cells = <0>; 2318 #address-cells = <0>;
2319 interrupt-controller; 2319 interrupt-controller;
2320 reg = <0x0 0xf1000000 2320 reg = <0x0 0xf1000000 0 0x20000>,
2321 <0x0 0xf1060000 2321 <0x0 0xf1060000 0 0x110000>;
2322 interrupts = <GIC_PPI 2322 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
2323 }; 2323 };
2324 2324
2325 fcpvd0: fcp@fea10000 { 2325 fcpvd0: fcp@fea10000 {
2326 compatible = "renesas 2326 compatible = "renesas,fcpv";
2327 reg = <0 0xfea10000 0 2327 reg = <0 0xfea10000 0 0x200>;
2328 clocks = <&cpg CPG_MO 2328 clocks = <&cpg CPG_MOD 508>;
2329 power-domains = <&sys 2329 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2330 resets = <&cpg 508>; 2330 resets = <&cpg 508>;
2331 iommus = <&ipmmu_vi1 2331 iommus = <&ipmmu_vi1 6>;
2332 }; 2332 };
2333 2333
2334 fcpvd1: fcp@fea11000 { 2334 fcpvd1: fcp@fea11000 {
2335 compatible = "renesas 2335 compatible = "renesas,fcpv";
2336 reg = <0 0xfea11000 0 2336 reg = <0 0xfea11000 0 0x200>;
2337 clocks = <&cpg CPG_MO 2337 clocks = <&cpg CPG_MOD 509>;
2338 power-domains = <&sys 2338 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2339 resets = <&cpg 509>; 2339 resets = <&cpg 509>;
2340 iommus = <&ipmmu_vi1 2340 iommus = <&ipmmu_vi1 7>;
2341 }; 2341 };
2342 2342
2343 vspd0: vsp@fea20000 { 2343 vspd0: vsp@fea20000 {
2344 compatible = "renesas 2344 compatible = "renesas,vsp2";
2345 reg = <0 0xfea20000 0 2345 reg = <0 0xfea20000 0 0x5000>;
2346 interrupts = <GIC_SPI 2346 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
2347 clocks = <&cpg CPG_MO 2347 clocks = <&cpg CPG_MOD 830>;
2348 power-domains = <&sys 2348 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2349 resets = <&cpg 830>; 2349 resets = <&cpg 830>;
2350 2350
2351 renesas,fcp = <&fcpvd 2351 renesas,fcp = <&fcpvd0>;
2352 }; 2352 };
2353 2353
2354 vspd1: vsp@fea28000 { 2354 vspd1: vsp@fea28000 {
2355 compatible = "renesas 2355 compatible = "renesas,vsp2";
2356 reg = <0 0xfea28000 0 2356 reg = <0 0xfea28000 0 0x5000>;
2357 interrupts = <GIC_SPI 2357 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
2358 clocks = <&cpg CPG_MO 2358 clocks = <&cpg CPG_MOD 831>;
2359 power-domains = <&sys 2359 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2360 resets = <&cpg 831>; 2360 resets = <&cpg 831>;
2361 2361
2362 renesas,fcp = <&fcpvd 2362 renesas,fcp = <&fcpvd1>;
2363 }; 2363 };
2364 2364
2365 csi40: csi2@feaa0000 { 2365 csi40: csi2@feaa0000 {
2366 compatible = "renesas 2366 compatible = "renesas,r8a779a0-csi2";
2367 reg = <0 0xfeaa0000 0 2367 reg = <0 0xfeaa0000 0 0x10000>;
2368 interrupts = <GIC_SPI 2368 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2369 clocks = <&cpg CPG_MO 2369 clocks = <&cpg CPG_MOD 331>;
2370 power-domains = <&sys 2370 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2371 resets = <&cpg 331>; 2371 resets = <&cpg 331>;
2372 status = "disabled"; 2372 status = "disabled";
2373 2373
2374 ports { 2374 ports {
2375 #address-cell 2375 #address-cells = <1>;
2376 #size-cells = 2376 #size-cells = <0>;
2377 2377
2378 port@0 { 2378 port@0 {
2379 reg = 2379 reg = <0>;
2380 }; 2380 };
2381 2381
2382 port@1 { 2382 port@1 {
2383 reg = 2383 reg = <1>;
2384 csi40 2384 csi40isp0: endpoint {
2385 2385 remote-endpoint = <&isp0csi40>;
2386 }; 2386 };
2387 }; 2387 };
2388 }; 2388 };
2389 }; 2389 };
2390 2390
2391 csi41: csi2@feab0000 { 2391 csi41: csi2@feab0000 {
2392 compatible = "renesas 2392 compatible = "renesas,r8a779a0-csi2";
2393 reg = <0 0xfeab0000 0 2393 reg = <0 0xfeab0000 0 0x10000>;
2394 interrupts = <GIC_SPI 2394 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2395 clocks = <&cpg CPG_MO 2395 clocks = <&cpg CPG_MOD 400>;
2396 power-domains = <&sys 2396 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2397 resets = <&cpg 400>; 2397 resets = <&cpg 400>;
2398 status = "disabled"; 2398 status = "disabled";
2399 2399
2400 ports { 2400 ports {
2401 #address-cell 2401 #address-cells = <1>;
2402 #size-cells = 2402 #size-cells = <0>;
2403 2403
2404 port@0 { 2404 port@0 {
2405 reg = 2405 reg = <0>;
2406 }; 2406 };
2407 2407
2408 port@1 { 2408 port@1 {
2409 reg = 2409 reg = <1>;
2410 csi41 2410 csi41isp1: endpoint {
2411 2411 remote-endpoint = <&isp1csi41>;
2412 }; 2412 };
2413 }; 2413 };
2414 }; 2414 };
2415 }; 2415 };
2416 2416
2417 csi42: csi2@fed60000 { 2417 csi42: csi2@fed60000 {
2418 compatible = "renesas 2418 compatible = "renesas,r8a779a0-csi2";
2419 reg = <0 0xfed60000 0 2419 reg = <0 0xfed60000 0 0x10000>;
2420 interrupts = <GIC_SPI 2420 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2421 clocks = <&cpg CPG_MO 2421 clocks = <&cpg CPG_MOD 401>;
2422 power-domains = <&sys 2422 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2423 resets = <&cpg 401>; 2423 resets = <&cpg 401>;
2424 status = "disabled"; 2424 status = "disabled";
2425 2425
2426 ports { 2426 ports {
2427 #address-cell 2427 #address-cells = <1>;
2428 #size-cells = 2428 #size-cells = <0>;
2429 2429
2430 port@0 { 2430 port@0 {
2431 reg = 2431 reg = <0>;
2432 }; 2432 };
2433 2433
2434 port@1 { 2434 port@1 {
2435 reg = 2435 reg = <1>;
2436 csi42 2436 csi42isp2: endpoint {
2437 2437 remote-endpoint = <&isp2csi42>;
2438 }; 2438 };
2439 }; 2439 };
2440 }; 2440 };
2441 }; 2441 };
2442 2442
2443 csi43: csi2@fed70000 { 2443 csi43: csi2@fed70000 {
2444 compatible = "renesas 2444 compatible = "renesas,r8a779a0-csi2";
2445 reg = <0 0xfed70000 0 2445 reg = <0 0xfed70000 0 0x10000>;
2446 interrupts = <GIC_SPI 2446 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2447 clocks = <&cpg CPG_MO 2447 clocks = <&cpg CPG_MOD 402>;
2448 power-domains = <&sys 2448 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2449 resets = <&cpg 402>; 2449 resets = <&cpg 402>;
2450 status = "disabled"; 2450 status = "disabled";
2451 2451
2452 ports { 2452 ports {
2453 #address-cell 2453 #address-cells = <1>;
2454 #size-cells = 2454 #size-cells = <0>;
2455 2455
2456 port@0 { 2456 port@0 {
2457 reg = 2457 reg = <0>;
2458 }; 2458 };
2459 2459
2460 port@1 { 2460 port@1 {
2461 reg = 2461 reg = <1>;
2462 csi43 2462 csi43isp3: endpoint {
2463 2463 remote-endpoint = <&isp3csi43>;
2464 }; 2464 };
2465 }; 2465 };
2466 }; 2466 };
2467 }; 2467 };
2468 2468
2469 du: display@feb00000 { 2469 du: display@feb00000 {
2470 compatible = "renesas 2470 compatible = "renesas,du-r8a779a0";
2471 reg = <0 0xfeb00000 0 2471 reg = <0 0xfeb00000 0 0x40000>;
2472 interrupts = <GIC_SPI 2472 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
2473 <GIC_SPI 2473 <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
2474 clocks = <&cpg CPG_MO 2474 clocks = <&cpg CPG_MOD 411>;
2475 clock-names = "du.0"; 2475 clock-names = "du.0";
2476 power-domains = <&sys 2476 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2477 resets = <&cpg 411>; 2477 resets = <&cpg 411>;
2478 reset-names = "du.0"; 2478 reset-names = "du.0";
2479 renesas,vsps = <&vspd 2479 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2480 2480
2481 status = "disabled"; 2481 status = "disabled";
2482 2482
2483 ports { 2483 ports {
2484 #address-cell 2484 #address-cells = <1>;
2485 #size-cells = 2485 #size-cells = <0>;
2486 2486
2487 port@0 { 2487 port@0 {
2488 reg = 2488 reg = <0>;
2489 du_ou 2489 du_out_dsi0: endpoint {
2490 2490 remote-endpoint = <&dsi0_in>;
2491 }; 2491 };
2492 }; 2492 };
2493 2493
2494 port@1 { 2494 port@1 {
2495 reg = 2495 reg = <1>;
2496 du_ou 2496 du_out_dsi1: endpoint {
2497 2497 remote-endpoint = <&dsi1_in>;
2498 }; 2498 };
2499 }; 2499 };
2500 }; 2500 };
2501 }; 2501 };
2502 2502
2503 isp0: isp@fed00000 { 2503 isp0: isp@fed00000 {
2504 compatible = "renesas 2504 compatible = "renesas,r8a779a0-isp",
2505 "renesas 2505 "renesas,rcar-gen4-isp";
2506 reg = <0 0xfed00000 0 2506 reg = <0 0xfed00000 0 0x10000>;
2507 interrupts = <GIC_SPI 2507 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
2508 clocks = <&cpg CPG_MO 2508 clocks = <&cpg CPG_MOD 612>;
2509 power-domains = <&sys 2509 power-domains = <&sysc R8A779A0_PD_A3ISP01>;
2510 resets = <&cpg 612>; 2510 resets = <&cpg 612>;
2511 status = "disabled"; 2511 status = "disabled";
2512 2512
2513 ports { 2513 ports {
2514 #address-cell 2514 #address-cells = <1>;
2515 #size-cells = 2515 #size-cells = <0>;
2516 2516
2517 port@0 { 2517 port@0 {
2518 #addr 2518 #address-cells = <1>;
2519 #size 2519 #size-cells = <0>;
2520 2520
2521 reg = 2521 reg = <0>;
2522 2522
2523 isp0c 2523 isp0csi40: endpoint@0 {
2524 2524 reg = <0>;
2525 2525 remote-endpoint = <&csi40isp0>;
2526 }; 2526 };
2527 }; 2527 };
2528 2528
2529 port@1 { 2529 port@1 {
2530 reg = 2530 reg = <1>;
2531 isp0v 2531 isp0vin00: endpoint {
2532 2532 remote-endpoint = <&vin00isp0>;
2533 }; 2533 };
2534 }; 2534 };
2535 2535
2536 port@2 { 2536 port@2 {
2537 reg = 2537 reg = <2>;
2538 isp0v 2538 isp0vin01: endpoint {
2539 2539 remote-endpoint = <&vin01isp0>;
2540 }; 2540 };
2541 }; 2541 };
2542 2542
2543 port@3 { 2543 port@3 {
2544 reg = 2544 reg = <3>;
2545 isp0v 2545 isp0vin02: endpoint {
2546 2546 remote-endpoint = <&vin02isp0>;
2547 }; 2547 };
2548 }; 2548 };
2549 2549
2550 port@4 { 2550 port@4 {
2551 reg = 2551 reg = <4>;
2552 isp0v 2552 isp0vin03: endpoint {
2553 2553 remote-endpoint = <&vin03isp0>;
2554 }; 2554 };
2555 }; 2555 };
2556 2556
2557 port@5 { 2557 port@5 {
2558 reg = 2558 reg = <5>;
2559 isp0v 2559 isp0vin04: endpoint {
2560 2560 remote-endpoint = <&vin04isp0>;
2561 }; 2561 };
2562 }; 2562 };
2563 2563
2564 port@6 { 2564 port@6 {
2565 reg = 2565 reg = <6>;
2566 isp0v 2566 isp0vin05: endpoint {
2567 2567 remote-endpoint = <&vin05isp0>;
2568 }; 2568 };
2569 }; 2569 };
2570 2570
2571 port@7 { 2571 port@7 {
2572 reg = 2572 reg = <7>;
2573 isp0v 2573 isp0vin06: endpoint {
2574 2574 remote-endpoint = <&vin06isp0>;
2575 }; 2575 };
2576 }; 2576 };
2577 2577
2578 port@8 { 2578 port@8 {
2579 reg = 2579 reg = <8>;
2580 isp0v 2580 isp0vin07: endpoint {
2581 2581 remote-endpoint = <&vin07isp0>;
2582 }; 2582 };
2583 }; 2583 };
2584 }; 2584 };
2585 }; 2585 };
2586 2586
2587 isp1: isp@fed20000 { 2587 isp1: isp@fed20000 {
2588 compatible = "renesas 2588 compatible = "renesas,r8a779a0-isp",
2589 "renesas 2589 "renesas,rcar-gen4-isp";
2590 reg = <0 0xfed20000 0 2590 reg = <0 0xfed20000 0 0x10000>;
2591 interrupts = <GIC_SPI 2591 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
2592 clocks = <&cpg CPG_MO 2592 clocks = <&cpg CPG_MOD 613>;
2593 power-domains = <&sys 2593 power-domains = <&sysc R8A779A0_PD_A3ISP01>;
2594 resets = <&cpg 613>; 2594 resets = <&cpg 613>;
2595 status = "disabled"; 2595 status = "disabled";
2596 2596
2597 ports { 2597 ports {
2598 #address-cell 2598 #address-cells = <1>;
2599 #size-cells = 2599 #size-cells = <0>;
2600 2600
2601 port@0 { 2601 port@0 {
2602 #addr 2602 #address-cells = <1>;
2603 #size 2603 #size-cells = <0>;
2604 2604
2605 reg = 2605 reg = <0>;
2606 2606
2607 isp1c 2607 isp1csi41: endpoint@1 {
2608 2608 reg = <1>;
2609 2609 remote-endpoint = <&csi41isp1>;
2610 }; 2610 };
2611 }; 2611 };
2612 2612
2613 port@1 { 2613 port@1 {
2614 reg = 2614 reg = <1>;
2615 isp1v 2615 isp1vin08: endpoint {
2616 2616 remote-endpoint = <&vin08isp1>;
2617 }; 2617 };
2618 }; 2618 };
2619 2619
2620 port@2 { 2620 port@2 {
2621 reg = 2621 reg = <2>;
2622 isp1v 2622 isp1vin09: endpoint {
2623 2623 remote-endpoint = <&vin09isp1>;
2624 }; 2624 };
2625 }; 2625 };
2626 2626
2627 port@3 { 2627 port@3 {
2628 reg = 2628 reg = <3>;
2629 isp1v 2629 isp1vin10: endpoint {
2630 2630 remote-endpoint = <&vin10isp1>;
2631 }; 2631 };
2632 }; 2632 };
2633 2633
2634 port@4 { 2634 port@4 {
2635 reg = 2635 reg = <4>;
2636 isp1v 2636 isp1vin11: endpoint {
2637 2637 remote-endpoint = <&vin11isp1>;
2638 }; 2638 };
2639 }; 2639 };
2640 2640
2641 port@5 { 2641 port@5 {
2642 reg = 2642 reg = <5>;
2643 isp1v 2643 isp1vin12: endpoint {
2644 2644 remote-endpoint = <&vin12isp1>;
2645 }; 2645 };
2646 }; 2646 };
2647 2647
2648 port@6 { 2648 port@6 {
2649 reg = 2649 reg = <6>;
2650 isp1v 2650 isp1vin13: endpoint {
2651 2651 remote-endpoint = <&vin13isp1>;
2652 }; 2652 };
2653 }; 2653 };
2654 2654
2655 port@7 { 2655 port@7 {
2656 reg = 2656 reg = <7>;
2657 isp1v 2657 isp1vin14: endpoint {
2658 2658 remote-endpoint = <&vin14isp1>;
2659 }; 2659 };
2660 }; 2660 };
2661 2661
2662 port@8 { 2662 port@8 {
2663 reg = 2663 reg = <8>;
2664 isp1v 2664 isp1vin15: endpoint {
2665 2665 remote-endpoint = <&vin15isp1>;
2666 }; 2666 };
2667 }; 2667 };
2668 }; 2668 };
2669 }; 2669 };
2670 2670
2671 isp2: isp@fed30000 { 2671 isp2: isp@fed30000 {
2672 compatible = "renesas 2672 compatible = "renesas,r8a779a0-isp",
2673 "renesas 2673 "renesas,rcar-gen4-isp";
2674 reg = <0 0xfed30000 0 2674 reg = <0 0xfed30000 0 0x10000>;
2675 interrupts = <GIC_SPI 2675 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
2676 clocks = <&cpg CPG_MO 2676 clocks = <&cpg CPG_MOD 614>;
2677 power-domains = <&sys 2677 power-domains = <&sysc R8A779A0_PD_A3ISP23>;
2678 resets = <&cpg 614>; 2678 resets = <&cpg 614>;
2679 status = "disabled"; 2679 status = "disabled";
2680 2680
2681 ports { 2681 ports {
2682 #address-cell 2682 #address-cells = <1>;
2683 #size-cells = 2683 #size-cells = <0>;
2684 2684
2685 port@0 { 2685 port@0 {
2686 #addr 2686 #address-cells = <1>;
2687 #size 2687 #size-cells = <0>;
2688 2688
2689 reg = 2689 reg = <0>;
2690 2690
2691 isp2c 2691 isp2csi42: endpoint@0 {
2692 2692 reg = <0>;
2693 2693 remote-endpoint = <&csi42isp2>;
2694 }; 2694 };
2695 }; 2695 };
2696 2696
2697 port@1 { 2697 port@1 {
2698 reg = 2698 reg = <1>;
2699 isp2v 2699 isp2vin16: endpoint {
2700 2700 remote-endpoint = <&vin16isp2>;
2701 }; 2701 };
2702 }; 2702 };
2703 2703
2704 port@2 { 2704 port@2 {
2705 reg = 2705 reg = <2>;
2706 isp2v 2706 isp2vin17: endpoint {
2707 2707 remote-endpoint = <&vin17isp2>;
2708 }; 2708 };
2709 }; 2709 };
2710 2710
2711 port@3 { 2711 port@3 {
2712 reg = 2712 reg = <3>;
2713 isp2v 2713 isp2vin18: endpoint {
2714 2714 remote-endpoint = <&vin18isp2>;
2715 }; 2715 };
2716 }; 2716 };
2717 2717
2718 port@4 { 2718 port@4 {
2719 reg = 2719 reg = <4>;
2720 isp2v 2720 isp2vin19: endpoint {
2721 2721 remote-endpoint = <&vin19isp2>;
2722 }; 2722 };
2723 }; 2723 };
2724 2724
2725 port@5 { 2725 port@5 {
2726 reg = 2726 reg = <5>;
2727 isp2v 2727 isp2vin20: endpoint {
2728 2728 remote-endpoint = <&vin20isp2>;
2729 }; 2729 };
2730 }; 2730 };
2731 2731
2732 port@6 { 2732 port@6 {
2733 reg = 2733 reg = <6>;
2734 isp2v 2734 isp2vin21: endpoint {
2735 2735 remote-endpoint = <&vin21isp2>;
2736 }; 2736 };
2737 }; 2737 };
2738 2738
2739 port@7 { 2739 port@7 {
2740 reg = 2740 reg = <7>;
2741 isp2v 2741 isp2vin22: endpoint {
2742 2742 remote-endpoint = <&vin22isp2>;
2743 }; 2743 };
2744 }; 2744 };
2745 2745
2746 port@8 { 2746 port@8 {
2747 reg = 2747 reg = <8>;
2748 isp2v 2748 isp2vin23: endpoint {
2749 2749 remote-endpoint = <&vin23isp2>;
2750 }; 2750 };
2751 }; 2751 };
2752 }; 2752 };
2753 }; 2753 };
2754 2754
2755 isp3: isp@fed40000 { 2755 isp3: isp@fed40000 {
2756 compatible = "renesas 2756 compatible = "renesas,r8a779a0-isp",
2757 "renesas 2757 "renesas,rcar-gen4-isp";
2758 reg = <0 0xfed40000 0 2758 reg = <0 0xfed40000 0 0x10000>;
2759 interrupts = <GIC_SPI 2759 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
2760 clocks = <&cpg CPG_MO 2760 clocks = <&cpg CPG_MOD 615>;
2761 power-domains = <&sys 2761 power-domains = <&sysc R8A779A0_PD_A3ISP23>;
2762 resets = <&cpg 615>; 2762 resets = <&cpg 615>;
2763 status = "disabled"; 2763 status = "disabled";
2764 2764
2765 ports { 2765 ports {
2766 #address-cell 2766 #address-cells = <1>;
2767 #size-cells = 2767 #size-cells = <0>;
2768 2768
2769 port@0 { 2769 port@0 {
2770 #addr 2770 #address-cells = <1>;
2771 #size 2771 #size-cells = <0>;
2772 2772
2773 reg = 2773 reg = <0>;
2774 2774
2775 isp3c 2775 isp3csi43: endpoint@1 {
2776 2776 reg = <1>;
2777 2777 remote-endpoint = <&csi43isp3>;
2778 }; 2778 };
2779 }; 2779 };
2780 2780
2781 port@1 { 2781 port@1 {
2782 reg = 2782 reg = <1>;
2783 isp3v 2783 isp3vin24: endpoint {
2784 2784 remote-endpoint = <&vin24isp3>;
2785 }; 2785 };
2786 }; 2786 };
2787 2787
2788 port@2 { 2788 port@2 {
2789 reg = 2789 reg = <2>;
2790 isp3v 2790 isp3vin25: endpoint {
2791 2791 remote-endpoint = <&vin25isp3>;
2792 }; 2792 };
2793 }; 2793 };
2794 2794
2795 port@3 { 2795 port@3 {
2796 reg = 2796 reg = <3>;
2797 isp3v 2797 isp3vin26: endpoint {
2798 2798 remote-endpoint = <&vin26isp3>;
2799 }; 2799 };
2800 }; 2800 };
2801 2801
2802 port@4 { 2802 port@4 {
2803 reg = 2803 reg = <4>;
2804 isp3v 2804 isp3vin27: endpoint {
2805 2805 remote-endpoint = <&vin27isp3>;
2806 }; 2806 };
2807 }; 2807 };
2808 2808
2809 port@5 { 2809 port@5 {
2810 reg = 2810 reg = <5>;
2811 isp3v 2811 isp3vin28: endpoint {
2812 2812 remote-endpoint = <&vin28isp3>;
2813 }; 2813 };
2814 }; 2814 };
2815 2815
2816 port@6 { 2816 port@6 {
2817 reg = 2817 reg = <6>;
2818 isp3v 2818 isp3vin29: endpoint {
2819 2819 remote-endpoint = <&vin29isp3>;
2820 }; 2820 };
2821 }; 2821 };
2822 2822
2823 port@7 { 2823 port@7 {
2824 reg = 2824 reg = <7>;
2825 isp3v 2825 isp3vin30: endpoint {
2826 2826 remote-endpoint = <&vin30isp3>;
2827 }; 2827 };
2828 }; 2828 };
2829 2829
2830 port@8 { 2830 port@8 {
2831 reg = 2831 reg = <8>;
2832 isp3v 2832 isp3vin31: endpoint {
2833 2833 remote-endpoint = <&vin31isp3>;
2834 }; 2834 };
2835 }; 2835 };
2836 }; 2836 };
2837 }; 2837 };
2838 2838
2839 dsi0: dsi-encoder@fed80000 { 2839 dsi0: dsi-encoder@fed80000 {
2840 compatible = "renesas 2840 compatible = "renesas,r8a779a0-dsi-csi2-tx";
2841 reg = <0 0xfed80000 0 2841 reg = <0 0xfed80000 0 0x10000>;
2842 power-domains = <&sys 2842 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2843 clocks = <&cpg CPG_MO 2843 clocks = <&cpg CPG_MOD 415>,
2844 <&cpg CPG_CO 2844 <&cpg CPG_CORE R8A779A0_CLK_DSI>,
2845 <&cpg CPG_CO 2845 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
2846 clock-names = "fck", 2846 clock-names = "fck", "dsi", "pll";
2847 resets = <&cpg 415>; 2847 resets = <&cpg 415>;
2848 status = "disabled"; 2848 status = "disabled";
2849 2849
2850 ports { 2850 ports {
2851 #address-cell 2851 #address-cells = <1>;
2852 #size-cells = 2852 #size-cells = <0>;
2853 2853
2854 port@0 { 2854 port@0 {
2855 reg = 2855 reg = <0>;
2856 dsi0_ 2856 dsi0_in: endpoint {
2857 2857 remote-endpoint = <&du_out_dsi0>;
2858 }; 2858 };
2859 }; 2859 };
2860 2860
2861 port@1 { 2861 port@1 {
2862 reg = 2862 reg = <1>;
2863 }; 2863 };
2864 }; 2864 };
2865 }; 2865 };
2866 2866
2867 dsi1: dsi-encoder@fed90000 { 2867 dsi1: dsi-encoder@fed90000 {
2868 compatible = "renesas 2868 compatible = "renesas,r8a779a0-dsi-csi2-tx";
2869 reg = <0 0xfed90000 0 2869 reg = <0 0xfed90000 0 0x10000>;
2870 power-domains = <&sys 2870 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2871 clocks = <&cpg CPG_MO 2871 clocks = <&cpg CPG_MOD 416>,
2872 <&cpg CPG_CO 2872 <&cpg CPG_CORE R8A779A0_CLK_DSI>,
2873 <&cpg CPG_CO 2873 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
2874 clock-names = "fck", 2874 clock-names = "fck", "dsi", "pll";
2875 resets = <&cpg 416>; 2875 resets = <&cpg 416>;
2876 status = "disabled"; 2876 status = "disabled";
2877 2877
2878 ports { 2878 ports {
2879 #address-cell 2879 #address-cells = <1>;
2880 #size-cells = 2880 #size-cells = <0>;
2881 2881
2882 port@0 { 2882 port@0 {
2883 reg = 2883 reg = <0>;
2884 dsi1_ 2884 dsi1_in: endpoint {
2885 2885 remote-endpoint = <&du_out_dsi1>;
2886 }; 2886 };
2887 }; 2887 };
2888 2888
2889 port@1 { 2889 port@1 {
2890 reg = 2890 reg = <1>;
2891 }; 2891 };
2892 }; 2892 };
2893 }; 2893 };
2894 2894
2895 prr: chipid@fff00044 { 2895 prr: chipid@fff00044 {
2896 compatible = "renesas 2896 compatible = "renesas,prr";
2897 reg = <0 0xfff00044 0 2897 reg = <0 0xfff00044 0 4>;
2898 }; 2898 };
2899 }; 2899 };
2900 2900
2901 thermal-zones { 2901 thermal-zones {
2902 sensor1_thermal: sensor1-ther 2902 sensor1_thermal: sensor1-thermal {
2903 polling-delay-passive 2903 polling-delay-passive = <250>;
2904 polling-delay = <1000 2904 polling-delay = <1000>;
2905 thermal-sensors = <&t 2905 thermal-sensors = <&tsc 0>;
2906 2906
2907 trips { 2907 trips {
2908 sensor1_crit: 2908 sensor1_crit: sensor1-crit {
2909 tempe 2909 temperature = <120000>;
2910 hyste 2910 hysteresis = <1000>;
2911 type 2911 type = "critical";
2912 }; 2912 };
2913 }; 2913 };
2914 }; 2914 };
2915 2915
2916 sensor2_thermal: sensor2-ther 2916 sensor2_thermal: sensor2-thermal {
2917 polling-delay-passive 2917 polling-delay-passive = <250>;
2918 polling-delay = <1000 2918 polling-delay = <1000>;
2919 thermal-sensors = <&t 2919 thermal-sensors = <&tsc 1>;
2920 2920
2921 trips { 2921 trips {
2922 sensor2_crit: 2922 sensor2_crit: sensor2-crit {
2923 tempe 2923 temperature = <120000>;
2924 hyste 2924 hysteresis = <1000>;
2925 type 2925 type = "critical";
2926 }; 2926 };
2927 }; 2927 };
2928 }; 2928 };
2929 2929
2930 sensor3_thermal: sensor3-ther 2930 sensor3_thermal: sensor3-thermal {
2931 polling-delay-passive 2931 polling-delay-passive = <250>;
2932 polling-delay = <1000 2932 polling-delay = <1000>;
2933 thermal-sensors = <&t 2933 thermal-sensors = <&tsc 2>;
2934 2934
2935 trips { 2935 trips {
2936 sensor3_crit: 2936 sensor3_crit: sensor3-crit {
2937 tempe 2937 temperature = <120000>;
2938 hyste 2938 hysteresis = <1000>;
2939 type 2939 type = "critical";
2940 }; 2940 };
2941 }; 2941 };
2942 }; 2942 };
2943 2943
2944 sensor4_thermal: sensor4-ther 2944 sensor4_thermal: sensor4-thermal {
2945 polling-delay-passive 2945 polling-delay-passive = <250>;
2946 polling-delay = <1000 2946 polling-delay = <1000>;
2947 thermal-sensors = <&t 2947 thermal-sensors = <&tsc 3>;
2948 2948
2949 trips { 2949 trips {
2950 sensor4_crit: 2950 sensor4_crit: sensor4-crit {
2951 tempe 2951 temperature = <120000>;
2952 hyste 2952 hysteresis = <1000>;
2953 type 2953 type = "critical";
2954 }; 2954 };
2955 }; 2955 };
2956 }; 2956 };
2957 2957
2958 sensor5_thermal: sensor5-ther 2958 sensor5_thermal: sensor5-thermal {
2959 polling-delay-passive 2959 polling-delay-passive = <250>;
2960 polling-delay = <1000 2960 polling-delay = <1000>;
2961 thermal-sensors = <&t 2961 thermal-sensors = <&tsc 4>;
2962 2962
2963 trips { 2963 trips {
2964 sensor5_crit: 2964 sensor5_crit: sensor5-crit {
2965 tempe 2965 temperature = <120000>;
2966 hyste 2966 hysteresis = <1000>;
2967 type 2967 type = "critical";
2968 }; 2968 };
2969 }; 2969 };
2970 }; 2970 };
2971 }; 2971 };
2972 2972
2973 timer { 2973 timer {
2974 compatible = "arm,armv8-timer 2974 compatible = "arm,armv8-timer";
2975 interrupts-extended = <&gic G 2975 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
2976 <&gic G 2976 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
2977 <&gic G 2977 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
2978 <&gic G 2978 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
2979 <&gic G 2979 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
2980 interrupt-names = "sec-phys", 2980 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
2981 "hyp-virt"; 2981 "hyp-virt";
2982 }; 2982 };
2983 }; 2983 };
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