1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0 2 /* 2 /* 3 * Device Tree Source for the Spider Ethernet 3 * Device Tree Source for the Spider Ethernet sub-board 4 * 4 * 5 * Copyright (C) 2021 Renesas Electronics Corp 5 * Copyright (C) 2021 Renesas Electronics Corp. 6 */ 6 */ 7 7 8 ð_serdes { << 9 status = "okay"; << 10 }; << 11 << 12 &i2c4 { 8 &i2c4 { 13 eeprom@52 { 9 eeprom@52 { 14 compatible = "rohm,br24g01", " 10 compatible = "rohm,br24g01", "atmel,24c01"; 15 label = "ethernet-sub-board"; 11 label = "ethernet-sub-board"; 16 reg = <0x52>; 12 reg = <0x52>; 17 pagesize = <8>; 13 pagesize = <8>; 18 }; << 19 }; << 20 << 21 &pfc { << 22 tsn0_pins: tsn0 { << 23 groups = "tsn0_mdio_b", "tsn0_ << 24 function = "tsn0"; << 25 power-source = <1800>; << 26 }; << 27 << 28 tsn1_pins: tsn1 { << 29 groups = "tsn1_mdio_b", "tsn1_ << 30 function = "tsn1"; << 31 power-source = <1800>; << 32 }; << 33 << 34 tsn2_pins: tsn2 { << 35 groups = "tsn2_mdio_b", "tsn2_ << 36 function = "tsn2"; << 37 power-source = <1800>; << 38 }; << 39 }; << 40 << 41 &rswitch { << 42 pinctrl-0 = <&tsn0_pins>, <&tsn1_pins> << 43 pinctrl-names = "default"; << 44 status = "okay"; << 45 << 46 ethernet-ports { << 47 #address-cells = <1>; << 48 #size-cells = <0>; << 49 << 50 port@0 { << 51 reg = <0>; << 52 phy-handle = <&u101>; << 53 phy-mode = "sgmii"; << 54 phys = <ð_serdes 0> << 55 << 56 mdio { << 57 #address-cells << 58 #size-cells = << 59 << 60 u101: ethernet << 61 reg = << 62 compat << 63 interr << 64 interr << 65 }; << 66 }; << 67 }; << 68 port@1 { << 69 reg = <1>; << 70 phy-handle = <&u201>; << 71 phy-mode = "sgmii"; << 72 phys = <ð_serdes 1> << 73 << 74 mdio { << 75 #address-cells << 76 #size-cells = << 77 << 78 u201: ethernet << 79 reg = << 80 compat << 81 interr << 82 interr << 83 }; << 84 }; << 85 }; << 86 port@2 { << 87 reg = <2>; << 88 phy-handle = <&u301>; << 89 phy-mode = "sgmii"; << 90 phys = <ð_serdes 2> << 91 << 92 mdio { << 93 #address-cells << 94 #size-cells = << 95 << 96 u301: ethernet << 97 reg = << 98 compat << 99 interr << 100 interr << 101 }; << 102 }; << 103 }; << 104 }; 14 }; 105 }; 15 };
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