1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Device Tree Source for the R-Car S4 Starter
4 *
5 * Copyright (C) 2023 Renesas Electronics Corp
6 */
7
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include "r8a779f4.dtsi"
11
12 / {
13 model = "R-Car S4 Starter Kit board";
14 compatible = "renesas,s4sk", "renesas,
15
16 aliases {
17 i2c0 = &i2c0;
18 i2c1 = &i2c1;
19 i2c2 = &i2c2;
20 i2c3 = &i2c3;
21 i2c4 = &i2c4;
22 i2c5 = &i2c5;
23 serial0 = &hscif0;
24 serial1 = &hscif1;
25 ethernet0 = &rswitch;
26 };
27
28 chosen {
29 bootargs = "ignore_loglevel rw
30 stdout-path = "serial0:921600n
31 };
32
33 memory@48000000 {
34 device_type = "memory";
35 /* first 128MB is reserved for
36 /* The last 512MB is reserved
37 reg = <0x0 0x48000000 0x0 0x58
38 };
39
40 memory@480000000 {
41 device_type = "memory";
42 reg = <0x4 0x80000000 0x0 0x80
43 };
44
45 vcc_sdhi: regulator-vcc-sdhi {
46 compatible = "regulator-fixed"
47 regulator-name = "SDHI Vcc";
48 regulator-min-microvolt = <330
49 regulator-max-microvolt = <330
50 gpio = <&gpio1 24 GPIO_ACTIVE_
51 enable-active-high;
52 };
53 };
54
55 ð_serdes {
56 status = "okay";
57 };
58
59 &extal_clk {
60 clock-frequency = <20000000>;
61 };
62
63 &extalr_clk {
64 clock-frequency = <32768>;
65 };
66
67 &hscif0 {
68 pinctrl-0 = <&hscif0_pins>;
69 pinctrl-names = "default";
70
71 uart-has-rtscts;
72 status = "okay";
73 };
74
75 &hscif1 {
76 pinctrl-0 = <&hscif1_pins>;
77 pinctrl-names = "default";
78
79 uart-has-rtscts;
80 status = "okay";
81 };
82
83 &i2c2 {
84 pinctrl-0 = <&i2c2_pins>;
85 pinctrl-names = "default";
86
87 status = "okay";
88 clock-frequency = <400000>;
89 };
90
91 &i2c4 {
92 pinctrl-0 = <&i2c4_pins>;
93 pinctrl-names = "default";
94
95 status = "okay";
96 clock-frequency = <400000>;
97 };
98
99 &i2c5 {
100 pinctrl-0 = <&i2c5_pins>;
101 pinctrl-names = "default";
102
103 status = "okay";
104 clock-frequency = <400000>;
105
106 eeprom@50 {
107 compatible = "st,24c16", "atme
108 reg = <0x50>;
109 pagesize = <16>;
110 };
111 };
112
113 &mmc0 {
114 pinctrl-0 = <&sd_pins>;
115 pinctrl-names = "default";
116
117 vmmc-supply = <&vcc_sdhi>;
118 cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>
119 bus-width = <4>;
120 status = "okay";
121 };
122
123 &pfc {
124 pinctrl-0 = <&scif_clk_pins>;
125 pinctrl-names = "default";
126
127 hscif0_pins: hscif0 {
128 groups = "hscif0_data", "hscif
129 function = "hscif0";
130 };
131
132 hscif1_pins: hscif1 {
133 groups = "hscif1_data", "hscif
134 function = "hscif1";
135 };
136
137 i2c2_pins: i2c2 {
138 groups = "i2c2";
139 function = "i2c2";
140 };
141
142 i2c4_pins: i2c4 {
143 groups = "i2c4";
144 function = "i2c4";
145 };
146
147 i2c5_pins: i2c5 {
148 groups = "i2c5";
149 function = "i2c5";
150 };
151
152 scif_clk_pins: scif_clk {
153 groups = "scif_clk";
154 function = "scif_clk";
155 };
156
157 sd_pins: sd {
158 groups = "mmc_data4", "mmc_ctr
159 function = "mmc";
160 power-source = <3300>;
161 };
162
163 tsn0_pins: tsn0 {
164 groups = "tsn0_mdio_b", "tsn0_
165 function = "tsn0";
166 drive-strength = <18>;
167 power-source = <3300>;
168 };
169
170 tsn1_pins: tsn1 {
171 groups = "tsn1_mdio_b", "tsn1_
172 function = "tsn1";
173 drive-strength = <18>;
174 power-source = <3300>;
175 };
176 };
177
178 &rswitch {
179 pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>
180 pinctrl-names = "default";
181 status = "okay";
182
183 ethernet-ports {
184 #address-cells = <1>;
185 #size-cells = <0>;
186
187 port@0 {
188 reg = <0>;
189 phy-handle = <&ic99>;
190 phy-mode = "sgmii";
191 phys = <ð_serdes 0>
192
193 mdio {
194 #address-cells
195 #size-cells =
196
197 ic99: ethernet
198 reg =
199 compat
200 interr
201 interr
202 };
203 };
204 };
205
206 port@1 {
207 reg = <1>;
208 phy-handle = <&ic102>;
209 phy-mode = "sgmii";
210 phys = <ð_serdes 1>
211
212 mdio {
213 #address-cells
214 #size-cells =
215
216 ic102: etherne
217 reg =
218 compat
219 interr
220 interr
221 };
222 };
223 };
224
225 port@2 {
226 status = "disabled";
227 };
228 };
229 };
230
231 &rwdt {
232 timeout-sec = <60>;
233 status = "okay";
234 };
235
236 &scif_clk {
237 clock-frequency = <24000000>;
238 };
239
240 &ufs {
241 status = "okay";
242 };
243
244 &ufs30_clk {
245 clock-frequency = <38400000>;
246 };
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