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Linux/scripts/dtc/include-prefixes/arm64/renesas/r8a779f4-s4sk.dts

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/renesas/r8a779f4-s4sk.dts (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/renesas/r8a779f4-s4sk.dts (Version linux-6.8.12)


  1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)        1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2 /*                                                  2 /*
  3  * Device Tree Source for the R-Car S4 Starter      3  * Device Tree Source for the R-Car S4 Starter Kit board
  4  *                                                  4  *
  5  * Copyright (C) 2023 Renesas Electronics Corp      5  * Copyright (C) 2023 Renesas Electronics Corp.
  6  */                                                 6  */
  7                                                     7 
  8 /dts-v1/;                                           8 /dts-v1/;
  9 #include <dt-bindings/gpio/gpio.h>                  9 #include <dt-bindings/gpio/gpio.h>
 10 #include "r8a779f4.dtsi"                           10 #include "r8a779f4.dtsi"
 11                                                    11 
 12 / {                                                12 / {
 13         model = "R-Car S4 Starter Kit board";      13         model = "R-Car S4 Starter Kit board";
 14         compatible = "renesas,s4sk", "renesas,     14         compatible = "renesas,s4sk", "renesas,r8a779f4", "renesas,r8a779f0";
 15                                                    15 
 16         aliases {                                  16         aliases {
 17                 i2c0 = &i2c0;                  !!  17                 serial0 = &hscif0;
 18                 i2c1 = &i2c1;                  !!  18                 serial1 = &hscif1;
 19                 i2c2 = &i2c2;                  !!  19                 eth0    = &rswitch;
 20                 i2c3 = &i2c3;                  << 
 21                 i2c4 = &i2c4;                  << 
 22                 i2c5 = &i2c5;                  << 
 23                 serial0 = &hscif0;             << 
 24                 serial1 = &hscif1;             << 
 25                 ethernet0 = &rswitch;          << 
 26         };                                         20         };
 27                                                    21 
 28         chosen {                                   22         chosen {
 29                 bootargs = "ignore_loglevel rw     23                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 30                 stdout-path = "serial0:921600n     24                 stdout-path = "serial0:921600n8";
 31         };                                         25         };
 32                                                    26 
 33         memory@48000000 {                          27         memory@48000000 {
 34                 device_type = "memory";            28                 device_type = "memory";
 35                 /* first 128MB is reserved for     29                 /* first 128MB is reserved for secure area. */
 36                 /* The last 512MB is reserved      30                 /* The last 512MB is reserved for CR. */
 37                 reg = <0x0 0x48000000 0x0 0x58     31                 reg = <0x0 0x48000000 0x0 0x58000000>;
 38         };                                         32         };
 39                                                    33 
 40         memory@480000000 {                         34         memory@480000000 {
 41                 device_type = "memory";            35                 device_type = "memory";
 42                 reg = <0x4 0x80000000 0x0 0x80     36                 reg = <0x4 0x80000000 0x0 0x80000000>;
 43         };                                         37         };
 44                                                    38 
 45         vcc_sdhi: regulator-vcc-sdhi {             39         vcc_sdhi: regulator-vcc-sdhi {
 46                 compatible = "regulator-fixed"     40                 compatible = "regulator-fixed";
 47                 regulator-name = "SDHI Vcc";       41                 regulator-name = "SDHI Vcc";
 48                 regulator-min-microvolt = <330     42                 regulator-min-microvolt = <3300000>;
 49                 regulator-max-microvolt = <330     43                 regulator-max-microvolt = <3300000>;
 50                 gpio = <&gpio1 24 GPIO_ACTIVE_     44                 gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
 51                 enable-active-high;                45                 enable-active-high;
 52         };                                         46         };
 53 };                                                 47 };
 54                                                    48 
 55 &eth_serdes {                                      49 &eth_serdes {
 56         status = "okay";                           50         status = "okay";
 57 };                                                 51 };
 58                                                    52 
 59 &extal_clk {                                       53 &extal_clk {
 60         clock-frequency = <20000000>;              54         clock-frequency = <20000000>;
 61 };                                                 55 };
 62                                                    56 
 63 &extalr_clk {                                      57 &extalr_clk {
 64         clock-frequency = <32768>;                 58         clock-frequency = <32768>;
 65 };                                                 59 };
 66                                                    60 
 67 &hscif0 {                                          61 &hscif0 {
 68         pinctrl-0 = <&hscif0_pins>;                62         pinctrl-0 = <&hscif0_pins>;
 69         pinctrl-names = "default";                 63         pinctrl-names = "default";
 70                                                    64 
 71         uart-has-rtscts;                           65         uart-has-rtscts;
 72         status = "okay";                           66         status = "okay";
 73 };                                                 67 };
 74                                                    68 
 75 &hscif1 {                                          69 &hscif1 {
 76         pinctrl-0 = <&hscif1_pins>;                70         pinctrl-0 = <&hscif1_pins>;
 77         pinctrl-names = "default";                 71         pinctrl-names = "default";
 78                                                    72 
 79         uart-has-rtscts;                           73         uart-has-rtscts;
 80         status = "okay";                           74         status = "okay";
 81 };                                                 75 };
 82                                                    76 
 83 &i2c2 {                                            77 &i2c2 {
 84         pinctrl-0 = <&i2c2_pins>;                  78         pinctrl-0 = <&i2c2_pins>;
 85         pinctrl-names = "default";                 79         pinctrl-names = "default";
 86                                                    80 
 87         status = "okay";                           81         status = "okay";
 88         clock-frequency = <400000>;                82         clock-frequency = <400000>;
 89 };                                                 83 };
 90                                                    84 
 91 &i2c4 {                                            85 &i2c4 {
 92         pinctrl-0 = <&i2c4_pins>;                  86         pinctrl-0 = <&i2c4_pins>;
 93         pinctrl-names = "default";                 87         pinctrl-names = "default";
 94                                                    88 
 95         status = "okay";                           89         status = "okay";
 96         clock-frequency = <400000>;                90         clock-frequency = <400000>;
 97 };                                                 91 };
 98                                                    92 
 99 &i2c5 {                                            93 &i2c5 {
100         pinctrl-0 = <&i2c5_pins>;                  94         pinctrl-0 = <&i2c5_pins>;
101         pinctrl-names = "default";                 95         pinctrl-names = "default";
102                                                    96 
103         status = "okay";                           97         status = "okay";
104         clock-frequency = <400000>;                98         clock-frequency = <400000>;
105                                                    99 
106         eeprom@50 {                               100         eeprom@50 {
107                 compatible = "st,24c16", "atme    101                 compatible = "st,24c16", "atmel,24c16";
108                 reg = <0x50>;                     102                 reg = <0x50>;
109                 pagesize = <16>;                  103                 pagesize = <16>;
110         };                                        104         };
111 };                                                105 };
112                                                   106 
113 &mmc0 {                                           107 &mmc0 {
114         pinctrl-0 = <&sd_pins>;                   108         pinctrl-0 = <&sd_pins>;
115         pinctrl-names = "default";                109         pinctrl-names = "default";
116                                                   110 
117         vmmc-supply = <&vcc_sdhi>;                111         vmmc-supply = <&vcc_sdhi>;
118         cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>    112         cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
119         bus-width = <4>;                          113         bus-width = <4>;
120         status = "okay";                          114         status = "okay";
121 };                                                115 };
122                                                   116 
123 &pfc {                                            117 &pfc {
124         pinctrl-0 = <&scif_clk_pins>;             118         pinctrl-0 = <&scif_clk_pins>;
125         pinctrl-names = "default";                119         pinctrl-names = "default";
126                                                   120 
127         hscif0_pins: hscif0 {                     121         hscif0_pins: hscif0 {
128                 groups = "hscif0_data", "hscif    122                 groups = "hscif0_data", "hscif0_ctrl";
129                 function = "hscif0";              123                 function = "hscif0";
130         };                                        124         };
131                                                   125 
132         hscif1_pins: hscif1 {                     126         hscif1_pins: hscif1 {
133                 groups = "hscif1_data", "hscif    127                 groups = "hscif1_data", "hscif1_ctrl";
134                 function = "hscif1";              128                 function = "hscif1";
135         };                                        129         };
136                                                   130 
137         i2c2_pins: i2c2 {                         131         i2c2_pins: i2c2 {
138                 groups = "i2c2";                  132                 groups = "i2c2";
139                 function = "i2c2";                133                 function = "i2c2";
140         };                                        134         };
141                                                   135 
142         i2c4_pins: i2c4 {                         136         i2c4_pins: i2c4 {
143                 groups = "i2c4";                  137                 groups = "i2c4";
144                 function = "i2c4";                138                 function = "i2c4";
145         };                                        139         };
146                                                   140 
147         i2c5_pins: i2c5 {                         141         i2c5_pins: i2c5 {
148                 groups = "i2c5";                  142                 groups = "i2c5";
149                 function = "i2c5";                143                 function = "i2c5";
150         };                                        144         };
151                                                   145 
152         scif_clk_pins: scif_clk {                 146         scif_clk_pins: scif_clk {
153                 groups = "scif_clk";              147                 groups = "scif_clk";
154                 function = "scif_clk";            148                 function = "scif_clk";
155         };                                        149         };
156                                                   150 
157         sd_pins: sd {                             151         sd_pins: sd {
158                 groups = "mmc_data4", "mmc_ctr    152                 groups = "mmc_data4", "mmc_ctrl";
159                 function = "mmc";                 153                 function = "mmc";
160                 power-source = <3300>;            154                 power-source = <3300>;
161         };                                        155         };
162                                                   156 
163         tsn0_pins: tsn0 {                         157         tsn0_pins: tsn0 {
164                 groups = "tsn0_mdio_b", "tsn0_    158                 groups = "tsn0_mdio_b", "tsn0_link_b";
165                 function = "tsn0";                159                 function = "tsn0";
166                 drive-strength = <18>;            160                 drive-strength = <18>;
167                 power-source = <3300>;            161                 power-source = <3300>;
168         };                                        162         };
169                                                   163 
170         tsn1_pins: tsn1 {                         164         tsn1_pins: tsn1 {
171                 groups = "tsn1_mdio_b", "tsn1_    165                 groups = "tsn1_mdio_b", "tsn1_link_b";
172                 function = "tsn1";                166                 function = "tsn1";
173                 drive-strength = <18>;            167                 drive-strength = <18>;
174                 power-source = <3300>;            168                 power-source = <3300>;
175         };                                        169         };
176 };                                                170 };
177                                                   171 
178 &rswitch {                                        172 &rswitch {
179         pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>    173         pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>;
180         pinctrl-names = "default";                174         pinctrl-names = "default";
181         status = "okay";                          175         status = "okay";
182                                                   176 
183         ethernet-ports {                          177         ethernet-ports {
184                 #address-cells = <1>;             178                 #address-cells = <1>;
185                 #size-cells = <0>;                179                 #size-cells = <0>;
186                                                   180 
187                 port@0 {                          181                 port@0 {
188                         reg = <0>;                182                         reg = <0>;
189                         phy-handle = <&ic99>;     183                         phy-handle = <&ic99>;
190                         phy-mode = "sgmii";       184                         phy-mode = "sgmii";
191                         phys = <&eth_serdes 0>    185                         phys = <&eth_serdes 0>;
192                                                   186 
193                         mdio {                    187                         mdio {
194                                 #address-cells    188                                 #address-cells = <1>;
195                                 #size-cells =     189                                 #size-cells = <0>;
196                                                   190 
197                                 ic99: ethernet    191                                 ic99: ethernet-phy@1 {
198                                         reg =     192                                         reg = <1>;
199                                         compat    193                                         compatible = "ethernet-phy-ieee802.3-c45";
200                                         interr    194                                         interrupt-parent = <&gpio3>;
201                                         interr    195                                         interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
202                                 };                196                                 };
203                         };                        197                         };
204                 };                                198                 };
205                                                   199 
206                 port@1 {                          200                 port@1 {
207                         reg = <1>;                201                         reg = <1>;
208                         phy-handle = <&ic102>;    202                         phy-handle = <&ic102>;
209                         phy-mode = "sgmii";       203                         phy-mode = "sgmii";
210                         phys = <&eth_serdes 1>    204                         phys = <&eth_serdes 1>;
211                                                   205 
212                         mdio {                    206                         mdio {
213                                 #address-cells    207                                 #address-cells = <1>;
214                                 #size-cells =     208                                 #size-cells = <0>;
215                                                   209 
216                                 ic102: etherne    210                                 ic102: ethernet-phy@2 {
217                                         reg =     211                                         reg = <2>;
218                                         compat    212                                         compatible = "ethernet-phy-ieee802.3-c45";
219                                         interr    213                                         interrupt-parent = <&gpio3>;
220                                         interr    214                                         interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
221                                 };                215                                 };
222                         };                        216                         };
223                 };                                217                 };
224                                                   218 
225                 port@2 {                          219                 port@2 {
226                         status = "disabled";      220                         status = "disabled";
227                 };                                221                 };
228         };                                        222         };
229 };                                                223 };
230                                                   224 
231 &rwdt {                                           225 &rwdt {
232         timeout-sec = <60>;                       226         timeout-sec = <60>;
233         status = "okay";                          227         status = "okay";
234 };                                                228 };
235                                                   229 
236 &scif_clk {                                       230 &scif_clk {
237         clock-frequency = <24000000>;             231         clock-frequency = <24000000>;
238 };                                                232 };
239                                                   233 
240 &ufs {                                            234 &ufs {
241         status = "okay";                          235         status = "okay";
242 };                                                236 };
243                                                   237 
244 &ufs30_clk {                                      238 &ufs30_clk {
245         clock-frequency = <38400000>;             239         clock-frequency = <38400000>;
246 };                                                240 };
                                                      

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