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Linux/scripts/dtc/include-prefixes/arm64/renesas/r8a779f4-s4sk.dts

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/renesas/r8a779f4-s4sk.dts (Architecture i386) and /scripts/dtc/include-prefixes/arm64/renesas/r8a779f4-s4sk.dts (Architecture sparc64)


  1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)        1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2 /*                                                  2 /*
  3  * Device Tree Source for the R-Car S4 Starter      3  * Device Tree Source for the R-Car S4 Starter Kit board
  4  *                                                  4  *
  5  * Copyright (C) 2023 Renesas Electronics Corp      5  * Copyright (C) 2023 Renesas Electronics Corp.
  6  */                                                 6  */
  7                                                     7 
  8 /dts-v1/;                                           8 /dts-v1/;
  9 #include <dt-bindings/gpio/gpio.h>                  9 #include <dt-bindings/gpio/gpio.h>
 10 #include "r8a779f4.dtsi"                           10 #include "r8a779f4.dtsi"
 11                                                    11 
 12 / {                                                12 / {
 13         model = "R-Car S4 Starter Kit board";      13         model = "R-Car S4 Starter Kit board";
 14         compatible = "renesas,s4sk", "renesas,     14         compatible = "renesas,s4sk", "renesas,r8a779f4", "renesas,r8a779f0";
 15                                                    15 
 16         aliases {                                  16         aliases {
 17                 i2c0 = &i2c0;                      17                 i2c0 = &i2c0;
 18                 i2c1 = &i2c1;                      18                 i2c1 = &i2c1;
 19                 i2c2 = &i2c2;                      19                 i2c2 = &i2c2;
 20                 i2c3 = &i2c3;                      20                 i2c3 = &i2c3;
 21                 i2c4 = &i2c4;                      21                 i2c4 = &i2c4;
 22                 i2c5 = &i2c5;                      22                 i2c5 = &i2c5;
 23                 serial0 = &hscif0;                 23                 serial0 = &hscif0;
 24                 serial1 = &hscif1;                 24                 serial1 = &hscif1;
 25                 ethernet0 = &rswitch;              25                 ethernet0 = &rswitch;
 26         };                                         26         };
 27                                                    27 
 28         chosen {                                   28         chosen {
 29                 bootargs = "ignore_loglevel rw     29                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 30                 stdout-path = "serial0:921600n     30                 stdout-path = "serial0:921600n8";
 31         };                                         31         };
 32                                                    32 
 33         memory@48000000 {                          33         memory@48000000 {
 34                 device_type = "memory";            34                 device_type = "memory";
 35                 /* first 128MB is reserved for     35                 /* first 128MB is reserved for secure area. */
 36                 /* The last 512MB is reserved      36                 /* The last 512MB is reserved for CR. */
 37                 reg = <0x0 0x48000000 0x0 0x58     37                 reg = <0x0 0x48000000 0x0 0x58000000>;
 38         };                                         38         };
 39                                                    39 
 40         memory@480000000 {                         40         memory@480000000 {
 41                 device_type = "memory";            41                 device_type = "memory";
 42                 reg = <0x4 0x80000000 0x0 0x80     42                 reg = <0x4 0x80000000 0x0 0x80000000>;
 43         };                                         43         };
 44                                                    44 
 45         vcc_sdhi: regulator-vcc-sdhi {             45         vcc_sdhi: regulator-vcc-sdhi {
 46                 compatible = "regulator-fixed"     46                 compatible = "regulator-fixed";
 47                 regulator-name = "SDHI Vcc";       47                 regulator-name = "SDHI Vcc";
 48                 regulator-min-microvolt = <330     48                 regulator-min-microvolt = <3300000>;
 49                 regulator-max-microvolt = <330     49                 regulator-max-microvolt = <3300000>;
 50                 gpio = <&gpio1 24 GPIO_ACTIVE_     50                 gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
 51                 enable-active-high;                51                 enable-active-high;
 52         };                                         52         };
 53 };                                                 53 };
 54                                                    54 
 55 &eth_serdes {                                      55 &eth_serdes {
 56         status = "okay";                           56         status = "okay";
 57 };                                                 57 };
 58                                                    58 
 59 &extal_clk {                                       59 &extal_clk {
 60         clock-frequency = <20000000>;              60         clock-frequency = <20000000>;
 61 };                                                 61 };
 62                                                    62 
 63 &extalr_clk {                                      63 &extalr_clk {
 64         clock-frequency = <32768>;                 64         clock-frequency = <32768>;
 65 };                                                 65 };
 66                                                    66 
 67 &hscif0 {                                          67 &hscif0 {
 68         pinctrl-0 = <&hscif0_pins>;                68         pinctrl-0 = <&hscif0_pins>;
 69         pinctrl-names = "default";                 69         pinctrl-names = "default";
 70                                                    70 
 71         uart-has-rtscts;                           71         uart-has-rtscts;
 72         status = "okay";                           72         status = "okay";
 73 };                                                 73 };
 74                                                    74 
 75 &hscif1 {                                          75 &hscif1 {
 76         pinctrl-0 = <&hscif1_pins>;                76         pinctrl-0 = <&hscif1_pins>;
 77         pinctrl-names = "default";                 77         pinctrl-names = "default";
 78                                                    78 
 79         uart-has-rtscts;                           79         uart-has-rtscts;
 80         status = "okay";                           80         status = "okay";
 81 };                                                 81 };
 82                                                    82 
 83 &i2c2 {                                            83 &i2c2 {
 84         pinctrl-0 = <&i2c2_pins>;                  84         pinctrl-0 = <&i2c2_pins>;
 85         pinctrl-names = "default";                 85         pinctrl-names = "default";
 86                                                    86 
 87         status = "okay";                           87         status = "okay";
 88         clock-frequency = <400000>;                88         clock-frequency = <400000>;
 89 };                                                 89 };
 90                                                    90 
 91 &i2c4 {                                            91 &i2c4 {
 92         pinctrl-0 = <&i2c4_pins>;                  92         pinctrl-0 = <&i2c4_pins>;
 93         pinctrl-names = "default";                 93         pinctrl-names = "default";
 94                                                    94 
 95         status = "okay";                           95         status = "okay";
 96         clock-frequency = <400000>;                96         clock-frequency = <400000>;
 97 };                                                 97 };
 98                                                    98 
 99 &i2c5 {                                            99 &i2c5 {
100         pinctrl-0 = <&i2c5_pins>;                 100         pinctrl-0 = <&i2c5_pins>;
101         pinctrl-names = "default";                101         pinctrl-names = "default";
102                                                   102 
103         status = "okay";                          103         status = "okay";
104         clock-frequency = <400000>;               104         clock-frequency = <400000>;
105                                                   105 
106         eeprom@50 {                               106         eeprom@50 {
107                 compatible = "st,24c16", "atme    107                 compatible = "st,24c16", "atmel,24c16";
108                 reg = <0x50>;                     108                 reg = <0x50>;
109                 pagesize = <16>;                  109                 pagesize = <16>;
110         };                                        110         };
111 };                                                111 };
112                                                   112 
113 &mmc0 {                                           113 &mmc0 {
114         pinctrl-0 = <&sd_pins>;                   114         pinctrl-0 = <&sd_pins>;
115         pinctrl-names = "default";                115         pinctrl-names = "default";
116                                                   116 
117         vmmc-supply = <&vcc_sdhi>;                117         vmmc-supply = <&vcc_sdhi>;
118         cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>    118         cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
119         bus-width = <4>;                          119         bus-width = <4>;
120         status = "okay";                          120         status = "okay";
121 };                                                121 };
122                                                   122 
123 &pfc {                                            123 &pfc {
124         pinctrl-0 = <&scif_clk_pins>;             124         pinctrl-0 = <&scif_clk_pins>;
125         pinctrl-names = "default";                125         pinctrl-names = "default";
126                                                   126 
127         hscif0_pins: hscif0 {                     127         hscif0_pins: hscif0 {
128                 groups = "hscif0_data", "hscif    128                 groups = "hscif0_data", "hscif0_ctrl";
129                 function = "hscif0";              129                 function = "hscif0";
130         };                                        130         };
131                                                   131 
132         hscif1_pins: hscif1 {                     132         hscif1_pins: hscif1 {
133                 groups = "hscif1_data", "hscif    133                 groups = "hscif1_data", "hscif1_ctrl";
134                 function = "hscif1";              134                 function = "hscif1";
135         };                                        135         };
136                                                   136 
137         i2c2_pins: i2c2 {                         137         i2c2_pins: i2c2 {
138                 groups = "i2c2";                  138                 groups = "i2c2";
139                 function = "i2c2";                139                 function = "i2c2";
140         };                                        140         };
141                                                   141 
142         i2c4_pins: i2c4 {                         142         i2c4_pins: i2c4 {
143                 groups = "i2c4";                  143                 groups = "i2c4";
144                 function = "i2c4";                144                 function = "i2c4";
145         };                                        145         };
146                                                   146 
147         i2c5_pins: i2c5 {                         147         i2c5_pins: i2c5 {
148                 groups = "i2c5";                  148                 groups = "i2c5";
149                 function = "i2c5";                149                 function = "i2c5";
150         };                                        150         };
151                                                   151 
152         scif_clk_pins: scif_clk {                 152         scif_clk_pins: scif_clk {
153                 groups = "scif_clk";              153                 groups = "scif_clk";
154                 function = "scif_clk";            154                 function = "scif_clk";
155         };                                        155         };
156                                                   156 
157         sd_pins: sd {                             157         sd_pins: sd {
158                 groups = "mmc_data4", "mmc_ctr    158                 groups = "mmc_data4", "mmc_ctrl";
159                 function = "mmc";                 159                 function = "mmc";
160                 power-source = <3300>;            160                 power-source = <3300>;
161         };                                        161         };
162                                                   162 
163         tsn0_pins: tsn0 {                         163         tsn0_pins: tsn0 {
164                 groups = "tsn0_mdio_b", "tsn0_    164                 groups = "tsn0_mdio_b", "tsn0_link_b";
165                 function = "tsn0";                165                 function = "tsn0";
166                 drive-strength = <18>;            166                 drive-strength = <18>;
167                 power-source = <3300>;            167                 power-source = <3300>;
168         };                                        168         };
169                                                   169 
170         tsn1_pins: tsn1 {                         170         tsn1_pins: tsn1 {
171                 groups = "tsn1_mdio_b", "tsn1_    171                 groups = "tsn1_mdio_b", "tsn1_link_b";
172                 function = "tsn1";                172                 function = "tsn1";
173                 drive-strength = <18>;            173                 drive-strength = <18>;
174                 power-source = <3300>;            174                 power-source = <3300>;
175         };                                        175         };
176 };                                                176 };
177                                                   177 
178 &rswitch {                                        178 &rswitch {
179         pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>    179         pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>;
180         pinctrl-names = "default";                180         pinctrl-names = "default";
181         status = "okay";                          181         status = "okay";
182                                                   182 
183         ethernet-ports {                          183         ethernet-ports {
184                 #address-cells = <1>;             184                 #address-cells = <1>;
185                 #size-cells = <0>;                185                 #size-cells = <0>;
186                                                   186 
187                 port@0 {                          187                 port@0 {
188                         reg = <0>;                188                         reg = <0>;
189                         phy-handle = <&ic99>;     189                         phy-handle = <&ic99>;
190                         phy-mode = "sgmii";       190                         phy-mode = "sgmii";
191                         phys = <&eth_serdes 0>    191                         phys = <&eth_serdes 0>;
192                                                   192 
193                         mdio {                    193                         mdio {
194                                 #address-cells    194                                 #address-cells = <1>;
195                                 #size-cells =     195                                 #size-cells = <0>;
196                                                   196 
197                                 ic99: ethernet    197                                 ic99: ethernet-phy@1 {
198                                         reg =     198                                         reg = <1>;
199                                         compat    199                                         compatible = "ethernet-phy-ieee802.3-c45";
200                                         interr    200                                         interrupt-parent = <&gpio3>;
201                                         interr    201                                         interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
202                                 };                202                                 };
203                         };                        203                         };
204                 };                                204                 };
205                                                   205 
206                 port@1 {                          206                 port@1 {
207                         reg = <1>;                207                         reg = <1>;
208                         phy-handle = <&ic102>;    208                         phy-handle = <&ic102>;
209                         phy-mode = "sgmii";       209                         phy-mode = "sgmii";
210                         phys = <&eth_serdes 1>    210                         phys = <&eth_serdes 1>;
211                                                   211 
212                         mdio {                    212                         mdio {
213                                 #address-cells    213                                 #address-cells = <1>;
214                                 #size-cells =     214                                 #size-cells = <0>;
215                                                   215 
216                                 ic102: etherne    216                                 ic102: ethernet-phy@2 {
217                                         reg =     217                                         reg = <2>;
218                                         compat    218                                         compatible = "ethernet-phy-ieee802.3-c45";
219                                         interr    219                                         interrupt-parent = <&gpio3>;
220                                         interr    220                                         interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
221                                 };                221                                 };
222                         };                        222                         };
223                 };                                223                 };
224                                                   224 
225                 port@2 {                          225                 port@2 {
226                         status = "disabled";      226                         status = "disabled";
227                 };                                227                 };
228         };                                        228         };
229 };                                                229 };
230                                                   230 
231 &rwdt {                                           231 &rwdt {
232         timeout-sec = <60>;                       232         timeout-sec = <60>;
233         status = "okay";                          233         status = "okay";
234 };                                                234 };
235                                                   235 
236 &scif_clk {                                       236 &scif_clk {
237         clock-frequency = <24000000>;             237         clock-frequency = <24000000>;
238 };                                                238 };
239                                                   239 
240 &ufs {                                            240 &ufs {
241         status = "okay";                          241         status = "okay";
242 };                                                242 };
243                                                   243 
244 &ufs30_clk {                                      244 &ufs30_clk {
245         clock-frequency = <38400000>;             245         clock-frequency = <38400000>;
246 };                                                246 };
                                                      

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