1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* 2 /*
3 * Device Tree Source for the M3ULCB (R-Car St 3 * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) with R-Car M3e-2G
4 * 4 *
5 * Copyright (C) 2021 Glider bv 5 * Copyright (C) 2021 Glider bv
6 * 6 *
7 * Based on r8a77961-ulcb.dts 7 * Based on r8a77961-ulcb.dts
8 * Copyright (C) 2020 Renesas Electronics Corp 8 * Copyright (C) 2020 Renesas Electronics Corp.
9 */ 9 */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 #include "r8a779m3.dtsi" 12 #include "r8a779m3.dtsi"
13 #include "ulcb.dtsi" 13 #include "ulcb.dtsi"
14 14
15 / { 15 / {
16 model = "Renesas M3ULCB board based on 16 model = "Renesas M3ULCB board based on r8a779m3";
17 compatible = "renesas,m3ulcb", "renesa 17 compatible = "renesas,m3ulcb", "renesas,r8a779m3", "renesas,r8a77961";
18 18
19 memory@48000000 { 19 memory@48000000 {
20 device_type = "memory"; 20 device_type = "memory";
21 /* first 128MB is reserved for 21 /* first 128MB is reserved for secure area. */
22 reg = <0x0 0x48000000 0x0 0x78 22 reg = <0x0 0x48000000 0x0 0x78000000>;
23 }; 23 };
24 24
25 memory@480000000 { 25 memory@480000000 {
26 device_type = "memory"; 26 device_type = "memory";
27 reg = <0x4 0x80000000 0x0 0x80 27 reg = <0x4 0x80000000 0x0 0x80000000>;
28 }; 28 };
29 29
30 memory@600000000 { 30 memory@600000000 {
31 device_type = "memory"; 31 device_type = "memory";
32 reg = <0x6 0x00000000 0x1 0x00 32 reg = <0x6 0x00000000 0x1 0x00000000>;
33 }; 33 };
34 }; 34 };
35 35
36 &du { 36 &du {
37 clocks = <&cpg CPG_MOD 724>, 37 clocks = <&cpg CPG_MOD 724>,
38 <&cpg CPG_MOD 723>, 38 <&cpg CPG_MOD 723>,
39 <&cpg CPG_MOD 722>, 39 <&cpg CPG_MOD 722>,
40 <&versaclock5 1>, 40 <&versaclock5 1>,
41 <&versaclock5 3>, 41 <&versaclock5 3>,
42 <&versaclock5 2>; 42 <&versaclock5 2>;
43 clock-names = "du.0", "du.1", "du.2", 43 clock-names = "du.0", "du.1", "du.2",
44 "dclkin.0", "dclkin.1", 44 "dclkin.0", "dclkin.1", "dclkin.2";
45 }; 45 };
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