1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree overlay for the RZ/G2UL SMARC E 3 * Device Tree overlay for the RZ/G2UL SMARC EVK with ADV7513 transmitter
4 * connected to DU enabled. 4 * connected to DU enabled.
5 * 5 *
6 * Copyright (C) 2024 Renesas Electronics Corp 6 * Copyright (C) 2024 Renesas Electronics Corp.
7 */ 7 */
8 8
9 /dts-v1/; 9 /dts-v1/;
10 /plugin/; 10 /plugin/;
11 11
12 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 12 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
13 13
14 #define ADV7513_PARENT_I2C i2c1 14 #define ADV7513_PARENT_I2C i2c1
15 #include "rz-smarc-du-adv7513.dtsi" 15 #include "rz-smarc-du-adv7513.dtsi"
16 16
17 &pinctrl { 17 &pinctrl {
18 du_pins: du { 18 du_pins: du {
19 data { 19 data {
20 pinmux = <RZG2L_PORT_P 20 pinmux = <RZG2L_PORT_PINMUX(11, 2, 6)>,
21 <RZG2L_PORT_P 21 <RZG2L_PORT_PINMUX(13, 1, 6)>,
22 <RZG2L_PORT_P 22 <RZG2L_PORT_PINMUX(13, 0, 6)>,
23 <RZG2L_PORT_P 23 <RZG2L_PORT_PINMUX(13, 4, 6)>,
24 <RZG2L_PORT_P 24 <RZG2L_PORT_PINMUX(13, 3, 6)>,
25 <RZG2L_PORT_P 25 <RZG2L_PORT_PINMUX(12, 1, 6)>,
26 <RZG2L_PORT_P 26 <RZG2L_PORT_PINMUX(13, 2, 6)>,
27 <RZG2L_PORT_P 27 <RZG2L_PORT_PINMUX(14, 0, 6)>,
28 <RZG2L_PORT_P 28 <RZG2L_PORT_PINMUX(14, 2, 6)>,
29 <RZG2L_PORT_P 29 <RZG2L_PORT_PINMUX(14, 1, 6)>,
30 <RZG2L_PORT_P 30 <RZG2L_PORT_PINMUX(16, 0, 6)>,
31 <RZG2L_PORT_P 31 <RZG2L_PORT_PINMUX(15, 0, 6)>,
32 <RZG2L_PORT_P 32 <RZG2L_PORT_PINMUX(16, 1, 6)>,
33 <RZG2L_PORT_P 33 <RZG2L_PORT_PINMUX(15, 1, 6)>,
34 <RZG2L_PORT_P 34 <RZG2L_PORT_PINMUX(15, 3, 6)>,
35 <RZG2L_PORT_P 35 <RZG2L_PORT_PINMUX(18, 0, 6)>,
36 <RZG2L_PORT_P 36 <RZG2L_PORT_PINMUX(15, 2, 6)>,
37 <RZG2L_PORT_P 37 <RZG2L_PORT_PINMUX(17, 0, 6)>,
38 <RZG2L_PORT_P 38 <RZG2L_PORT_PINMUX(17, 2, 6)>,
39 <RZG2L_PORT_P 39 <RZG2L_PORT_PINMUX(17, 1, 6)>,
40 <RZG2L_PORT_P 40 <RZG2L_PORT_PINMUX(18, 1, 6)>,
41 <RZG2L_PORT_P 41 <RZG2L_PORT_PINMUX(18, 2, 6)>,
42 <RZG2L_PORT_P 42 <RZG2L_PORT_PINMUX(17, 3, 6)>,
43 <RZG2L_PORT_P 43 <RZG2L_PORT_PINMUX(18, 3, 6)>;
44 drive-strength = <2>; 44 drive-strength = <2>;
45 }; 45 };
46 46
47 sync { 47 sync {
48 pinmux = <RZG2L_PORT_P 48 pinmux = <RZG2L_PORT_PINMUX(11, 0, 6)>, /* HSYNC */
49 <RZG2L_PORT_P 49 <RZG2L_PORT_PINMUX(12, 0, 6)>; /* VSYNC */
50 drive-strength = <2>; 50 drive-strength = <2>;
51 }; 51 };
52 52
53 de { 53 de {
54 pinmux = <RZG2L_PORT_P 54 pinmux = <RZG2L_PORT_PINMUX(11, 1, 6)>; /* DE */
55 drive-strength = <2>; 55 drive-strength = <2>;
56 }; 56 };
57 57
58 clk { 58 clk {
59 pinmux = <RZG2L_PORT_P 59 pinmux = <RZG2L_PORT_PINMUX(11, 3, 6)>; /* CLK */
60 }; 60 };
61 }; 61 };
62 }; 62 };
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