1 // SPDX-License-Identifier: (GPL-2.0-only OR B 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /* 2 /*
3 * Device Tree Source for the RZ/V2H EVK board 3 * Device Tree Source for the RZ/V2H EVK board
4 * 4 *
5 * Copyright (C) 2024 Renesas Electronics Corp 5 * Copyright (C) 2024 Renesas Electronics Corp.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
11 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/gpio/gpio.h>
12 #include "r9a09g057.dtsi" 12 #include "r9a09g057.dtsi"
13 13
14 / { 14 / {
15 model = "Renesas RZ/V2H EVK Board base 15 model = "Renesas RZ/V2H EVK Board based on r9a09g057h44";
16 compatible = "renesas,rzv2h-evk", "ren 16 compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";
17 17
18 aliases { 18 aliases {
19 i2c0 = &i2c0; 19 i2c0 = &i2c0;
20 i2c1 = &i2c1; 20 i2c1 = &i2c1;
21 i2c2 = &i2c2; 21 i2c2 = &i2c2;
22 i2c3 = &i2c3; 22 i2c3 = &i2c3;
23 i2c6 = &i2c6; 23 i2c6 = &i2c6;
24 i2c7 = &i2c7; 24 i2c7 = &i2c7;
25 i2c8 = &i2c8; 25 i2c8 = &i2c8;
26 mmc1 = &sdhi1; 26 mmc1 = &sdhi1;
27 serial0 = &scif; 27 serial0 = &scif;
28 }; 28 };
29 29
30 chosen { 30 chosen {
31 bootargs = "ignore_loglevel"; 31 bootargs = "ignore_loglevel";
32 stdout-path = "serial0:115200n 32 stdout-path = "serial0:115200n8";
33 }; 33 };
34 34
35 memory@48000000 { 35 memory@48000000 {
36 device_type = "memory"; 36 device_type = "memory";
37 /* first 128MB is reserved for 37 /* first 128MB is reserved for secure area. */
38 reg = <0x0 0x48000000 0x1 0xF8 38 reg = <0x0 0x48000000 0x1 0xF8000000>;
39 }; 39 };
40 40
41 memory@240000000 { 41 memory@240000000 {
42 device_type = "memory"; 42 device_type = "memory";
43 reg = <0x2 0x40000000 0x2 0x00 43 reg = <0x2 0x40000000 0x2 0x00000000>;
44 }; 44 };
45 45
46 reg_3p3v: regulator1 { 46 reg_3p3v: regulator1 {
47 compatible = "regulator-fixed" 47 compatible = "regulator-fixed";
48 48
49 regulator-name = "fixed-3.3V"; 49 regulator-name = "fixed-3.3V";
50 regulator-min-microvolt = <330 50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <330 51 regulator-max-microvolt = <3300000>;
52 regulator-boot-on; 52 regulator-boot-on;
53 regulator-always-on; 53 regulator-always-on;
54 }; 54 };
55 55
56 vqmmc_sdhi1: regulator-vccq-sdhi1 { 56 vqmmc_sdhi1: regulator-vccq-sdhi1 {
57 compatible = "regulator-gpio"; 57 compatible = "regulator-gpio";
58 regulator-name = "SDHI1 VccQ"; 58 regulator-name = "SDHI1 VccQ";
59 gpios = <&pinctrl RZG2L_GPIO(1 59 gpios = <&pinctrl RZG2L_GPIO(10, 2) GPIO_ACTIVE_HIGH>;
60 regulator-min-microvolt = <180 60 regulator-min-microvolt = <1800000>;
61 regulator-max-microvolt = <330 61 regulator-max-microvolt = <3300000>;
62 gpios-states = <0>; 62 gpios-states = <0>;
63 states = <3300000 0>, <1800000 63 states = <3300000 0>, <1800000 1>;
64 }; 64 };
65 }; 65 };
66 66
67 &audio_extal_clk { 67 &audio_extal_clk {
68 clock-frequency = <22579200>; 68 clock-frequency = <22579200>;
69 }; 69 };
70 70
71 &i2c0 { 71 &i2c0 {
72 pinctrl-0 = <&i2c0_pins>; 72 pinctrl-0 = <&i2c0_pins>;
73 pinctrl-names = "default"; 73 pinctrl-names = "default";
74 clock-frequency = <400000>; 74 clock-frequency = <400000>;
75 75
76 status = "okay"; 76 status = "okay";
77 }; 77 };
78 78
79 &i2c1 { 79 &i2c1 {
80 pinctrl-0 = <&i2c1_pins>; 80 pinctrl-0 = <&i2c1_pins>;
81 pinctrl-names = "default"; 81 pinctrl-names = "default";
82 clock-frequency = <400000>; 82 clock-frequency = <400000>;
83 83
84 status = "okay"; 84 status = "okay";
85 }; 85 };
86 86
87 &i2c2 { 87 &i2c2 {
88 pinctrl-0 = <&i2c2_pins>; 88 pinctrl-0 = <&i2c2_pins>;
89 pinctrl-names = "default"; 89 pinctrl-names = "default";
90 clock-frequency = <400000>; 90 clock-frequency = <400000>;
91 91
92 status = "okay"; 92 status = "okay";
93 }; 93 };
94 94
95 &i2c3 { 95 &i2c3 {
96 pinctrl-0 = <&i2c3_pins>; 96 pinctrl-0 = <&i2c3_pins>;
97 pinctrl-names = "default"; 97 pinctrl-names = "default";
98 clock-frequency = <400000>; 98 clock-frequency = <400000>;
99 99
100 status = "okay"; 100 status = "okay";
101 }; 101 };
102 102
103 &i2c6 { 103 &i2c6 {
104 pinctrl-0 = <&i2c6_pins>; 104 pinctrl-0 = <&i2c6_pins>;
105 pinctrl-names = "default"; 105 pinctrl-names = "default";
106 clock-frequency = <400000>; 106 clock-frequency = <400000>;
107 107
108 status = "okay"; 108 status = "okay";
109 }; 109 };
110 110
111 &i2c7 { 111 &i2c7 {
112 pinctrl-0 = <&i2c7_pins>; 112 pinctrl-0 = <&i2c7_pins>;
113 pinctrl-names = "default"; 113 pinctrl-names = "default";
114 clock-frequency = <400000>; 114 clock-frequency = <400000>;
115 115
116 status = "okay"; 116 status = "okay";
117 }; 117 };
118 118
119 &i2c8 { 119 &i2c8 {
120 pinctrl-0 = <&i2c8_pins>; 120 pinctrl-0 = <&i2c8_pins>;
121 pinctrl-names = "default"; 121 pinctrl-names = "default";
122 clock-frequency = <400000>; 122 clock-frequency = <400000>;
123 123
124 status = "okay"; 124 status = "okay";
125 }; 125 };
126 126
127 &ostm0 { 127 &ostm0 {
128 status = "okay"; 128 status = "okay";
129 }; 129 };
130 130
131 &ostm1 { 131 &ostm1 {
132 status = "okay"; 132 status = "okay";
133 }; 133 };
134 134
135 &ostm2 { 135 &ostm2 {
136 status = "okay"; 136 status = "okay";
137 }; 137 };
138 138
139 &ostm3 { 139 &ostm3 {
140 status = "okay"; 140 status = "okay";
141 }; 141 };
142 142
143 &ostm4 { 143 &ostm4 {
144 status = "okay"; 144 status = "okay";
145 }; 145 };
146 146
147 &ostm5 { 147 &ostm5 {
148 status = "okay"; 148 status = "okay";
149 }; 149 };
150 150
151 &ostm6 { 151 &ostm6 {
152 status = "okay"; 152 status = "okay";
153 }; 153 };
154 154
155 &ostm7 { 155 &ostm7 {
156 status = "okay"; 156 status = "okay";
157 }; 157 };
158 158
159 &pinctrl { 159 &pinctrl {
160 i2c0_pins: i2c0 { 160 i2c0_pins: i2c0 {
161 pinmux = <RZG2L_PORT_PINMUX(3, 161 pinmux = <RZG2L_PORT_PINMUX(3, 0, 1)>, /* I2C0_SDA */
162 <RZG2L_PORT_PINMUX(3, 162 <RZG2L_PORT_PINMUX(3, 1, 1)>; /* I2C0_SCL */
163 }; 163 };
164 164
165 i2c1_pins: i2c1 { 165 i2c1_pins: i2c1 {
166 pinmux = <RZG2L_PORT_PINMUX(3, 166 pinmux = <RZG2L_PORT_PINMUX(3, 2, 1)>, /* I2C1_SDA */
167 <RZG2L_PORT_PINMUX(3, 167 <RZG2L_PORT_PINMUX(3, 3, 1)>; /* I2C1_SCL */
168 }; 168 };
169 169
170 i2c2_pins: i2c2 { 170 i2c2_pins: i2c2 {
171 pinmux = <RZG2L_PORT_PINMUX(2, 171 pinmux = <RZG2L_PORT_PINMUX(2, 0, 4)>, /* I2C2_SDA */
172 <RZG2L_PORT_PINMUX(2, 172 <RZG2L_PORT_PINMUX(2, 1, 4)>; /* I2C2_SCL */
173 }; 173 };
174 174
175 i2c3_pins: i2c3 { 175 i2c3_pins: i2c3 {
176 pinmux = <RZG2L_PORT_PINMUX(3, 176 pinmux = <RZG2L_PORT_PINMUX(3, 6, 1)>, /* I2C3_SDA */
177 <RZG2L_PORT_PINMUX(3, 177 <RZG2L_PORT_PINMUX(3, 7, 1)>; /* I2C3_SCL */
178 }; 178 };
179 179
180 i2c6_pins: i2c6 { 180 i2c6_pins: i2c6 {
181 pinmux = <RZG2L_PORT_PINMUX(4, 181 pinmux = <RZG2L_PORT_PINMUX(4, 4, 1)>, /* I2C6_SDA */
182 <RZG2L_PORT_PINMUX(4, 182 <RZG2L_PORT_PINMUX(4, 5, 1)>; /* I2C6_SCL */
183 }; 183 };
184 184
185 i2c7_pins: i2c7 { 185 i2c7_pins: i2c7 {
186 pinmux = <RZG2L_PORT_PINMUX(4, 186 pinmux = <RZG2L_PORT_PINMUX(4, 6, 1)>, /* I2C7_SDA */
187 <RZG2L_PORT_PINMUX(4, 187 <RZG2L_PORT_PINMUX(4, 7, 1)>; /* I2C7_SCL */
188 }; 188 };
189 189
190 i2c8_pins: i2c8 { 190 i2c8_pins: i2c8 {
191 pinmux = <RZG2L_PORT_PINMUX(0, 191 pinmux = <RZG2L_PORT_PINMUX(0, 6, 1)>, /* I2C8_SDA */
192 <RZG2L_PORT_PINMUX(0, 192 <RZG2L_PORT_PINMUX(0, 7, 1)>; /* I2C8_SCL */
193 }; 193 };
194 194
195 scif_pins: scif { 195 scif_pins: scif {
196 pins = "SCIF_TXD", "SCIF_RXD"; 196 pins = "SCIF_TXD", "SCIF_RXD";
197 renesas,output-impedance = <1> 197 renesas,output-impedance = <1>;
198 }; 198 };
199 199
200 sd1-pwr-en-hog { 200 sd1-pwr-en-hog {
201 gpio-hog; 201 gpio-hog;
202 gpios = <RZG2L_GPIO(10, 3) GPI 202 gpios = <RZG2L_GPIO(10, 3) GPIO_ACTIVE_HIGH>;
203 output-high; 203 output-high;
204 line-name = "sd1_pwr_en"; 204 line-name = "sd1_pwr_en";
205 }; 205 };
206 206
207 sdhi1_pins: sd1 { 207 sdhi1_pins: sd1 {
208 sd1_dat_cmd { 208 sd1_dat_cmd {
209 pins = "SD1DAT0", "SD1 209 pins = "SD1DAT0", "SD1DAT1", "SD1DAT2", "SD1DAT3", "SD1CMD";
210 input-enable; 210 input-enable;
211 renesas,output-impedan 211 renesas,output-impedance = <3>;
212 slew-rate = <0>; 212 slew-rate = <0>;
213 }; 213 };
214 214
215 sd1_clk { 215 sd1_clk {
216 pins = "SD1CLK"; 216 pins = "SD1CLK";
217 renesas,output-impedan 217 renesas,output-impedance = <3>;
218 slew-rate = <0>; 218 slew-rate = <0>;
219 }; 219 };
220 220
221 sd1_cd { 221 sd1_cd {
222 pinmux = <RZG2L_PORT_P 222 pinmux = <RZG2L_PORT_PINMUX(9, 4, 14)>; /* SD1_CD */
223 }; 223 };
224 }; 224 };
225 }; 225 };
226 226
227 &qextal_clk { 227 &qextal_clk {
228 clock-frequency = <24000000>; 228 clock-frequency = <24000000>;
229 }; 229 };
230 230
231 &rtxin_clk { 231 &rtxin_clk {
232 clock-frequency = <32768>; 232 clock-frequency = <32768>;
233 }; 233 };
234 234
235 &scif { 235 &scif {
236 pinctrl-0 = <&scif_pins>; 236 pinctrl-0 = <&scif_pins>;
237 pinctrl-names = "default"; 237 pinctrl-names = "default";
238 238
239 status = "okay"; 239 status = "okay";
240 }; 240 };
241 241
242 &sdhi1 { 242 &sdhi1 {
243 pinctrl-0 = <&sdhi1_pins>; 243 pinctrl-0 = <&sdhi1_pins>;
244 pinctrl-1 = <&sdhi1_pins>; 244 pinctrl-1 = <&sdhi1_pins>;
245 pinctrl-names = "default", "state_uhs" 245 pinctrl-names = "default", "state_uhs";
246 vmmc-supply = <®_3p3v>; 246 vmmc-supply = <®_3p3v>;
247 vqmmc-supply = <&vqmmc_sdhi1>; 247 vqmmc-supply = <&vqmmc_sdhi1>;
248 bus-width = <4>; 248 bus-width = <4>;
249 sd-uhs-sdr50; 249 sd-uhs-sdr50;
250 sd-uhs-sdr104; 250 sd-uhs-sdr104;
251 status = "okay"; 251 status = "okay";
252 }; 252 };
253 253
254 &wdt1 { 254 &wdt1 {
255 status = "okay"; 255 status = "okay";
256 }; 256 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.