1 // SPDX-License-Identifier: (GPL-2.0-only OR B
2 /*
3 * Device Tree Source for the RZ/{G2L,G2LC,V2L
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp
6 */
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11 /*
12 * SSI-WM8978
13 *
14 * This command is required when Playback/Capt
15 *
16 * amixer cset name='Left Input Mixer L2
17 * amixer cset name='Right Input Mixer R2
18 * amixer cset name='Headphone Playback V
19 * amixer cset name='PCM Volume' 100%
20 * amixer cset name='Input PGA Volume' 25
21 *
22 */
23
24 / {
25 aliases {
26 serial0 = &scif0;
27 i2c0 = &i2c0;
28 i2c1 = &i2c1;
29 };
30
31 chosen {
32 stdout-path = "serial0:115200n
33 };
34
35 snd_rzg2l: sound {
36 compatible = "simple-audio-car
37 simple-audio-card,format = "i2
38 simple-audio-card,bitclock-mas
39 simple-audio-card,frame-master
40 simple-audio-card,mclk-fs = <2
41
42 simple-audio-card,widgets = "M
43 simple-audio-card,routing =
44 "L2", "Mic Bias",
45 "R2", "Mic Bias",
46 "Mic Bias", "Micro
47
48 cpu_dai: simple-audio-card,cpu
49 };
50
51 codec_dai: simple-audio-card,c
52 clocks = <&versa3 2>;
53 sound-dai = <&wm8978>;
54 };
55 };
56
57 vccq_sdhi1: regulator-vccq-sdhi1 {
58 compatible = "regulator-gpio";
59 regulator-name = "SDHI1 VccQ";
60 regulator-min-microvolt = <180
61 regulator-max-microvolt = <330
62 gpios-states = <1>;
63 states = <3300000 1>, <1800000
64 };
65
66 x1: x1-clock {
67 compatible = "fixed-clock";
68 #clock-cells = <0>;
69 clock-frequency = <24000000>;
70 };
71 };
72
73 &audio_clk1 {
74 clock-frequency = <11289600>;
75 };
76
77 &audio_clk2 {
78 clock-frequency = <12288000>;
79 };
80
81 &canfd {
82 pinctrl-0 = <&can0_pins &can1_pins>;
83 pinctrl-names = "default";
84 status = "okay";
85
86 channel0 {
87 status = "okay";
88 };
89
90 channel1 {
91 status = "okay";
92 };
93 };
94
95 &ehci0 {
96 dr_mode = "otg";
97 status = "okay";
98 };
99
100 &ehci1 {
101 status = "okay";
102 };
103
104 &hsusb {
105 dr_mode = "otg";
106 status = "okay";
107 };
108
109 &i2c0 {
110 pinctrl-0 = <&i2c0_pins>;
111 pinctrl-names = "default";
112
113 status = "okay";
114 };
115
116 &i2c1 {
117 pinctrl-0 = <&i2c1_pins>;
118 pinctrl-names = "default";
119
120 status = "okay";
121 };
122
123 &ohci0 {
124 dr_mode = "otg";
125 status = "okay";
126 };
127
128 &ohci1 {
129 status = "okay";
130 };
131
132 &phyrst {
133 status = "okay";
134 };
135
136 &scif0 {
137 pinctrl-0 = <&scif0_pins>;
138 pinctrl-names = "default";
139 status = "okay";
140 };
141
142 &sdhi1 {
143 pinctrl-0 = <&sdhi1_pins>;
144 pinctrl-1 = <&sdhi1_pins_uhs>;
145 pinctrl-names = "default", "state_uhs"
146
147 vmmc-supply = <®_3p3v>;
148 vqmmc-supply = <&vccq_sdhi1>;
149 bus-width = <4>;
150 sd-uhs-sdr50;
151 sd-uhs-sdr104;
152 status = "okay";
153 };
154
155 &spi1 {
156 pinctrl-0 = <&spi1_pins>;
157 pinctrl-names = "default";
158
159 status = "okay";
160 };
161
162 &usb2_phy0 {
163 pinctrl-0 = <&usb0_pins>;
164 pinctrl-names = "default";
165
166 vbus-supply = <&usb0_vbus_otg>;
167 status = "okay";
168 };
169
170 &usb2_phy1 {
171 pinctrl-0 = <&usb1_pins>;
172 pinctrl-names = "default";
173
174 status = "okay";
175 };
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