1 // SPDX-License-Identifier: (GPL-2.0-only OR B 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /* 2 /*
3 * Device Tree Source for the RZ/G2LC SMARC pi 3 * Device Tree Source for the RZ/G2LC SMARC pincontrol parts
4 * 4 *
5 * Copyright (C) 2021 Renesas Electronics Corp 5 * Copyright (C) 2021 Renesas Electronics Corp.
6 */ 6 */
7 7
8 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10 10
11 &pinctrl { 11 &pinctrl {
12 pinctrl-0 = <&sound_clk_pins>; 12 pinctrl-0 = <&sound_clk_pins>;
13 pinctrl-names = "default"; 13 pinctrl-names = "default";
14 14
>> 15 scif0_pins: scif0 {
>> 16 pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
>> 17 <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
>> 18 };
>> 19
15 #if SW_SCIF_CAN 20 #if SW_SCIF_CAN
16 /* SW8 should be at position 2->1 */ 21 /* SW8 should be at position 2->1 */
17 can1_pins: can1 { 22 can1_pins: can1 {
18 pinmux = <RZG2L_PORT_PINMUX(40 23 pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */
19 <RZG2L_PORT_PINMUX(40 24 <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */
20 }; 25 };
21 #endif 26 #endif
22 27
>> 28 scif1_pins: scif1 {
>> 29 pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
>> 30 <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
>> 31 <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */
>> 32 <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
>> 33 };
>> 34
23 #if SW_RSPI_CAN 35 #if SW_RSPI_CAN
24 /* SW8 should be at position 2->3 so t 36 /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
25 can1-stb-hog { 37 can1-stb-hog {
26 gpio-hog; 38 gpio-hog;
27 gpios = <RZG2L_GPIO(44, 3) GPI 39 gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>;
28 output-low; 40 output-low;
29 line-name = "can1_stb"; 41 line-name = "can1_stb";
30 }; 42 };
31 43
32 can1_pins: can1 { 44 can1_pins: can1 {
33 pinmux = <RZG2L_PORT_PINMUX(44 45 pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */
34 <RZG2L_PORT_PINMUX(44 46 <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */
35 }; 47 };
36 #endif 48 #endif
37 49
38 i2c0_pins: i2c0 { <<
39 pins = "RIIC0_SDA", "RIIC0_SCL <<
40 input-enable; <<
41 }; <<
42 <<
43 i2c1_pins: i2c1 { <<
44 pins = "RIIC1_SDA", "RIIC1_SCL <<
45 input-enable; <<
46 }; <<
47 <<
48 i2c2_pins: i2c2 { <<
49 pinmux = <RZG2L_PORT_PINMUX(42 <<
50 <RZG2L_PORT_PINMUX(42 <<
51 }; <<
52 <<
53 mtu3_pins: mtu3 { <<
54 mtu3-pwm { <<
55 pinmux = <RZG2L_PORT_P <<
56 <RZG2L_PORT_P <<
57 <RZG2L_PORT_P <<
58 <RZG2L_PORT_P <<
59 }; <<
60 }; <<
61 <<
62 scif0_pins: scif0 { <<
63 pinmux = <RZG2L_PORT_PINMUX(38 <<
64 <RZG2L_PORT_PINMUX(38 <<
65 }; <<
66 <<
67 scif1_pins: scif1 { <<
68 pinmux = <RZG2L_PORT_PINMUX(40 <<
69 <RZG2L_PORT_PINMUX(40 <<
70 <RZG2L_PORT_PINMUX(41 <<
71 <RZG2L_PORT_PINMUX(41 <<
72 }; <<
73 <<
74 sd1-pwr-en-hog { 50 sd1-pwr-en-hog {
75 gpio-hog; 51 gpio-hog;
76 gpios = <RZG2L_GPIO(39, 2) GPI 52 gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
77 output-high; 53 output-high;
78 line-name = "sd1_pwr_en"; 54 line-name = "sd1_pwr_en";
79 }; 55 };
80 56
81 sdhi1_pins: sd1 { 57 sdhi1_pins: sd1 {
82 sd1_data { 58 sd1_data {
83 pins = "SD1_DATA0", "S 59 pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
84 power-source = <3300>; 60 power-source = <3300>;
85 }; 61 };
86 62
87 sd1_ctrl { 63 sd1_ctrl {
88 pins = "SD1_CLK", "SD1 64 pins = "SD1_CLK", "SD1_CMD";
89 power-source = <3300>; 65 power-source = <3300>;
90 }; 66 };
91 67
92 sd1_mux { 68 sd1_mux {
93 pinmux = <RZG2L_PORT_P 69 pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
94 }; 70 };
95 }; 71 };
96 72
97 sdhi1_pins_uhs: sd1_uhs { 73 sdhi1_pins_uhs: sd1_uhs {
98 sd1_data_uhs { 74 sd1_data_uhs {
99 pins = "SD1_DATA0", "S 75 pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
100 power-source = <1800>; 76 power-source = <1800>;
101 }; 77 };
102 78
103 sd1_ctrl_uhs { 79 sd1_ctrl_uhs {
104 pins = "SD1_CLK", "SD1 80 pins = "SD1_CLK", "SD1_CMD";
105 power-source = <1800>; 81 power-source = <1800>;
106 }; 82 };
107 83
108 sd1_mux_uhs { 84 sd1_mux_uhs {
109 pinmux = <RZG2L_PORT_P 85 pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
110 }; 86 };
111 }; 87 };
112 88
113 sound_clk_pins: sound_clk { 89 sound_clk_pins: sound_clk {
114 pins = "AUDIO_CLK1", "AUDIO_CL 90 pins = "AUDIO_CLK1", "AUDIO_CLK2";
115 input-enable; 91 input-enable;
116 }; <<
117 <<
118 spi1_pins: spi1 { <<
119 pinmux = <RZG2L_PORT_PINMUX(44 <<
120 <RZG2L_PORT_PINMUX(44 <<
121 <RZG2L_PORT_PINMUX(44 <<
122 <RZG2L_PORT_PINMUX(44 <<
123 }; <<
124 <<
125 ssi0_pins: ssi0 { <<
126 pinmux = <RZG2L_PORT_PINMUX(45 <<
127 <RZG2L_PORT_PINMUX(45 <<
128 <RZG2L_PORT_PINMUX(45 <<
129 <RZG2L_PORT_PINMUX(45 <<
130 }; <<
131 <<
132 usb0_pins: usb0 { <<
133 pinmux = <RZG2L_PORT_PINMUX(4, <<
134 <RZG2L_PORT_PINMUX(5, <<
135 <RZG2L_PORT_PINMUX(5, <<
136 }; <<
137 <<
138 usb1_pins: usb1 { <<
139 pinmux = <RZG2L_PORT_PINMUX(42 <<
140 <RZG2L_PORT_PINMUX(42 <<
141 }; 92 };
142 }; 93 };
143 94
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