1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2019 Hardkernel Co., Ltd
4 * Copyright (c) 2020 Theobroma Systems Design
5 * Copyright (c) 2022 Maya Matuszczyk <maccraft
6 */
7
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
13 #include "rk3326.dtsi"
14
15 / {
16 aliases {
17 mmc0 = &sdmmc;
18 };
19
20 chosen {
21 stdout-path = "serial2:115200n
22 };
23
24 backlight: backlight {
25 compatible = "pwm-backlight";
26 power-supply = <&vcc_bl>;
27 pwms = <&pwm1 0 25000 0>;
28 };
29
30 /*
31 * LED is a tri-state. Driven high it
32 * green, and not driven at all (pin s
33 * Additionally, there is a 2nd LED th
34 * that is on (red) when plugged in to
35 */
36 gpio_led: gpio-leds {
37 compatible = "gpio-leds";
38 pinctrl-names = "default";
39 pinctrl-0 = <&led_pin>;
40
41 red_green_led: led-0 {
42 color = <LED_COLOR_ID_
43 gpios = <&gpio2 RK_PB5
44 function = LED_FUNCTIO
45 };
46 };
47
48 rk817-sound {
49 compatible = "simple-audio-car
50 simple-audio-card,name = "rk81
51 simple-audio-card,format = "i2
52 simple-audio-card,hp-det-gpio
53 simple-audio-card,mclk-fs = <2
54 simple-audio-card,widgets =
55 "Microphone", "Mic Jac
56 "Headphone", "Headphon
57 "Speaker", "Speaker";
58 simple-audio-card,routing =
59 "MICL", "Mic Jack",
60 "Headphones", "HPOL",
61 "Headphones", "HPOR",
62 "Speaker", "SPKO";
63
64 simple-audio-card,codec {
65 sound-dai = <&rk817>;
66 };
67
68 simple-audio-card,cpu {
69 sound-dai = <&i2s1_2ch
70 };
71 };
72
73 vccsys: vccsys {
74 compatible = "regulator-fixed"
75 regulator-name = "vcc3v8_sys";
76 regulator-always-on;
77 regulator-min-microvolt = <380
78 regulator-max-microvolt = <380
79 };
80
81 vibrator {
82 compatible = "pwm-vibrator";
83 pwms = <&pwm0 0 1000000 0>;
84 pwm-names = "enable";
85 };
86 };
87
88 &cpu0 {
89 cpu-supply = <&vdd_arm>;
90 };
91
92 &cpu1 {
93 cpu-supply = <&vdd_arm>;
94 };
95
96 &cpu2 {
97 cpu-supply = <&vdd_arm>;
98 };
99
100 &cpu3 {
101 cpu-supply = <&vdd_arm>;
102 };
103
104 &cru {
105 assigned-clocks = <&cru PLL_NPLL>,
106 <&cru ACLK_BUS_PRE>, <&cru ACL
107 <&cru HCLK_BUS_PRE>, <&cru HCL
108 <&cru PCLK_BUS_PRE>, <&cru SCL
109
110 assigned-clock-rates = <1188000000>,
111 <200000000>, <200000000>,
112 <150000000>, <150000000>,
113 <100000000>, <200000000>;
114 };
115
116 &display_subsystem {
117 status = "okay";
118 };
119
120 &dsi {
121 status = "okay";
122
123 ports {
124 mipi_out: port@1 {
125 reg = <1>;
126
127 mipi_out_panel: endpoi
128 remote-endpoin
129 };
130 };
131 };
132
133 internal_display: panel@0 {
134 reg = <0>;
135 backlight = <&backlight>;
136 reset-gpios = <&gpio3 RK_PC0 G
137
138 port {
139 mipi_in_panel: endpoin
140 remote-endpoin
141 };
142 };
143 };
144 };
145
146 &dsi_dphy {
147 status = "okay";
148 };
149
150 &gpu {
151 mali-supply = <&vdd_logic>;
152 status = "okay";
153 };
154
155 &i2c0 {
156 clock-frequency = <400000>;
157 i2c-scl-falling-time-ns = <16>;
158 i2c-scl-rising-time-ns = <280>;
159 status = "okay";
160
161 rk817: pmic@20 {
162 compatible = "rockchip,rk817";
163 reg = <0x20>;
164 #clock-cells = <1>;
165 clock-names = "mclk";
166 clock-output-names = "rk808-cl
167 clocks = <&cru SCLK_I2S1_OUT>;
168 interrupt-parent = <&gpio0>;
169 interrupts = <RK_PB2 IRQ_TYPE_
170 pinctrl-0 = <&pmic_int>, <&i2s
171 pinctrl-names = "default";
172 #sound-dai-cells = <0>;
173 wakeup-source;
174
175 vcc1-supply = <&vccsys>;
176 vcc2-supply = <&vccsys>;
177 vcc3-supply = <&vccsys>;
178 vcc4-supply = <&vccsys>;
179 vcc5-supply = <&vccsys>;
180 vcc6-supply = <&vccsys>;
181 vcc7-supply = <&vccsys>;
182 vcc8-supply = <&vccsys>;
183
184 regulators {
185 vdd_logic: DCDC_REG1 {
186 regulator-alwa
187 regulator-boot
188 regulator-max-
189 regulator-min-
190 regulator-name
191 regulator-ramp
192
193 regulator-stat
194 regula
195 regula
196 };
197 };
198
199 vdd_arm: DCDC_REG2 {
200 regulator-alwa
201 regulator-boot
202 regulator-max-
203 regulator-min-
204 regulator-name
205 regulator-ramp
206
207 regulator-stat
208 regula
209 regula
210 };
211 };
212
213 vcc_ddr: DCDC_REG3 {
214 regulator-alwa
215 regulator-boot
216 regulator-name
217
218 regulator-stat
219 regula
220 };
221 };
222
223 vcc_3v3: DCDC_REG4 {
224 regulator-alwa
225 regulator-boot
226 regulator-max-
227 regulator-min-
228 regulator-name
229
230 regulator-stat
231 regula
232 regula
233 };
234 };
235
236 vcc_1v8: LDO_REG2 {
237 regulator-alwa
238 regulator-boot
239 regulator-max-
240 regulator-min-
241 regulator-name
242
243 regulator-stat
244 regula
245 regula
246 };
247 };
248
249 vdd_1v0: LDO_REG3 {
250 regulator-alwa
251 regulator-boot
252 regulator-max-
253 regulator-min-
254 regulator-name
255
256 regulator-stat
257 regula
258 regula
259 };
260 };
261
262 vcc3v3_pmu: LDO_REG4 {
263 regulator-alwa
264 regulator-boot
265 regulator-max-
266 regulator-min-
267 regulator-name
268
269 regulator-stat
270 regula
271 regula
272 };
273 };
274
275 vccio_sd: LDO_REG5 {
276 regulator-alwa
277 regulator-boot
278 regulator-max-
279 regulator-min-
280 regulator-name
281
282 regulator-stat
283 regula
284 regula
285 };
286 };
287
288 vcc_sd: LDO_REG6 {
289 regulator-boot
290 regulator-max-
291 regulator-min-
292 regulator-name
293
294 regulator-stat
295 regula
296 regula
297 };
298 };
299
300 vcc_bl: LDO_REG7 {
301 regulator-max-
302 regulator-min-
303 regulator-name
304
305 regulator-stat
306 regula
307 regula
308 };
309 };
310
311 vcc_lcd: LDO_REG8 {
312 regulator-max-
313 regulator-min-
314 regulator-name
315
316 regulator-stat
317 regula
318 regula
319 };
320 };
321
322 vcc_wifi: LDO_REG9 {
323 regulator-max-
324 regulator-min-
325 regulator-name
326
327 regulator-stat
328 regula
329 regula
330 };
331 };
332
333 usb_midu: BOOST {
334 regulator-alwa
335 regulator-boot
336 regulator-max-
337 regulator-min-
338 regulator-name
339 };
340 };
341
342 rk817_codec: codec {
343 rockchip,mic-in-differ
344 };
345 };
346 };
347
348 &i2s1_2ch {
349 status = "okay";
350 };
351
352 &io_domains {
353 vccio1-supply = <&vcc_3v3>;
354 vccio2-supply = <&vccio_sd>;
355 vccio3-supply = <&vcc_3v3>;
356 vccio4-supply = <&vcc_3v3>;
357 vccio5-supply = <&vcc_3v3>;
358 vccio6-supply = <&vcc_3v3>;
359 status = "okay";
360 };
361
362 &pmu_io_domains {
363 pmuio1-supply = <&vcc3v3_pmu>;
364 pmuio2-supply = <&vcc3v3_pmu>;
365 status = "okay";
366 };
367
368 &pwm0 {
369 status = "okay";
370 };
371
372 &pwm1 {
373 status = "okay";
374 };
375
376 &saradc {
377 vref-supply = <&vcc_1v8>;
378 status = "okay";
379 };
380
381 &sdmmc {
382 cap-sd-highspeed;
383 card-detect-delay = <200>;
384 cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_
385 sd-uhs-sdr12;
386 sd-uhs-sdr25;
387 sd-uhs-sdr50;
388 sd-uhs-sdr104;
389 vmmc-supply = <&vcc_sd>;
390 vqmmc-supply = <&vccio_sd>;
391 status = "okay";
392 };
393
394 &sfc {
395 #address-cells = <1>;
396 pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bu
397 pinctrl-names = "default";
398 #size-cells = <0>;
399 status = "okay";
400
401 flash@0 {
402 compatible = "jedec,spi-nor";
403 reg = <0>;
404 spi-max-frequency = <108000000
405 spi-rx-bus-width = <2>;
406 spi-tx-bus-width = <1>;
407 };
408 };
409
410 &tsadc {
411 status = "okay";
412 };
413
414 &u2phy {
415 status = "okay";
416
417 u2phy_host: host-port {
418 status = "okay";
419 };
420
421 u2phy_otg: otg-port {
422 status = "disabled";
423 };
424 };
425
426 &usb20_otg {
427 status = "okay";
428 };
429
430 &uart2 {
431 pinctrl-0 = <&uart2m1_xfer>;
432 pinctrl-names = "default";
433 status = "okay";
434 };
435
436 &vopb {
437 status = "okay";
438 };
439
440 &vopb_mmu {
441 status = "okay";
442 };
443
444 &pinctrl {
445 headphone {
446 hp_det: hp-det {
447 rockchip,pins = <2 RK_
448 };
449 };
450
451 leds {
452 led_pin: led-pin {
453 rockchip,pins = <2 RK_
454 };
455 };
456
457 pmic {
458 dc_det: dc-det {
459 rockchip,pins = <0 RK_
460 };
461
462 pmic_int: pmic-int {
463 rockchip,pins = <0 RK_
464 };
465
466 soc_slppin_gpio: soc_slppin_gp
467 rockchip,pins = <0 RK_
468 };
469
470 soc_slppin_rst: soc_slppin_rst
471 rockchip,pins = <0 RK_
472 };
473
474 soc_slppin_slp: soc_slppin_slp
475 rockchip,pins = <0 RK_
476 };
477 };
478 };
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