1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2020 David Bauer <mail@david-b
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include "rk3328.dtsi"
11
12 / {
13 model = "FriendlyElec NanoPi R2S";
14 compatible = "friendlyarm,nanopi-r2s",
15
16 aliases {
17 ethernet0 = &gmac2io;
18 ethernet1 = &rtl8153;
19 mmc0 = &sdmmc;
20 };
21
22 chosen {
23 stdout-path = "serial2:1500000
24 };
25
26 gmac_clk: gmac-clock {
27 compatible = "fixed-clock";
28 clock-frequency = <125000000>;
29 clock-output-names = "gmac_clk
30 #clock-cells = <0>;
31 };
32
33 keys {
34 compatible = "gpio-keys";
35 pinctrl-0 = <&reset_button_pin
36 pinctrl-names = "default";
37
38 key-reset {
39 label = "reset";
40 gpios = <&gpio0 RK_PA0
41 linux,code = <KEY_REST
42 debounce-interval = <5
43 };
44 };
45
46 leds {
47 compatible = "gpio-leds";
48 pinctrl-0 = <&lan_led_pin>, <
49 pinctrl-names = "default";
50
51 lan_led: led-0 {
52 gpios = <&gpio2 RK_PB7
53 label = "nanopi-r2s:gr
54 };
55
56 sys_led: led-1 {
57 gpios = <&gpio0 RK_PA2
58 label = "nanopi-r2s:re
59 default-state = "on";
60 };
61
62 wan_led: led-2 {
63 gpios = <&gpio2 RK_PC2
64 label = "nanopi-r2s:gr
65 };
66 };
67
68 vcc_io_sdio: sdmmcio-regulator {
69 compatible = "regulator-gpio";
70 enable-active-high;
71 gpios = <&gpio1 RK_PD4 GPIO_AC
72 pinctrl-0 = <&sdio_vcc_pin>;
73 pinctrl-names = "default";
74 regulator-name = "vcc_io_sdio"
75 regulator-always-on;
76 regulator-min-microvolt = <180
77 regulator-max-microvolt = <330
78 regulator-settling-time-us = <
79 regulator-type = "voltage";
80 startup-delay-us = <2000>;
81 states = <1800000 0x1>,
82 <3300000 0x0>;
83 vin-supply = <&vcc_io_33>;
84 };
85
86 vcc_sd: sdmmc-regulator {
87 compatible = "regulator-fixed"
88 gpio = <&gpio0 RK_PD6 GPIO_ACT
89 pinctrl-0 = <&sdmmc0m1_pin>;
90 pinctrl-names = "default";
91 regulator-name = "vcc_sd";
92 regulator-boot-on;
93 regulator-min-microvolt = <330
94 regulator-max-microvolt = <330
95 vin-supply = <&vcc_io_33>;
96 };
97
98 vdd_5v: vdd-5v {
99 compatible = "regulator-fixed"
100 regulator-name = "vdd_5v";
101 regulator-always-on;
102 regulator-boot-on;
103 regulator-min-microvolt = <500
104 regulator-max-microvolt = <500
105 };
106
107 vdd_5v_lan: vdd-5v-lan {
108 compatible = "regulator-fixed"
109 enable-active-high;
110 gpio = <&gpio2 RK_PC6 GPIO_ACT
111 pinctrl-0 = <&lan_vdd_pin>;
112 pinctrl-names = "default";
113 regulator-name = "vdd_5v_lan";
114 regulator-always-on;
115 regulator-boot-on;
116 vin-supply = <&vdd_5v>;
117 };
118 };
119
120 &cpu0 {
121 cpu-supply = <&vdd_arm>;
122 };
123
124 &cpu1 {
125 cpu-supply = <&vdd_arm>;
126 };
127
128 &cpu2 {
129 cpu-supply = <&vdd_arm>;
130 };
131
132 &cpu3 {
133 cpu-supply = <&vdd_arm>;
134 };
135
136 &display_subsystem {
137 status = "disabled";
138 };
139
140 &gmac2io {
141 assigned-clocks = <&cru SCLK_MAC2IO>,
142 assigned-clock-parents = <&gmac_clk>,
143 clock_in_out = "input";
144 phy-handle = <&rtl8211e>;
145 phy-mode = "rgmii";
146 phy-supply = <&vcc_io_33>;
147 pinctrl-0 = <&rgmiim1_pins>;
148 pinctrl-names = "default";
149 rx_delay = <0x18>;
150 snps,aal;
151 tx_delay = <0x24>;
152 status = "okay";
153
154 mdio {
155 compatible = "snps,dwmac-mdio"
156 #address-cells = <1>;
157 #size-cells = <0>;
158
159 rtl8211e: ethernet-phy@1 {
160 reg = <1>;
161 pinctrl-0 = <ð_phy_
162 pinctrl-names = "defau
163 reset-assert-us = <100
164 reset-deassert-us = <5
165 reset-gpios = <&gpio1
166 };
167 };
168 };
169
170 &i2c1 {
171 status = "okay";
172
173 rk805: pmic@18 {
174 compatible = "rockchip,rk805";
175 reg = <0x18>;
176 interrupt-parent = <&gpio1>;
177 interrupts = <24 IRQ_TYPE_LEVE
178 #clock-cells = <1>;
179 clock-output-names = "xin32k",
180 gpio-controller;
181 #gpio-cells = <2>;
182 pinctrl-0 = <&pmic_int_l>;
183 pinctrl-names = "default";
184 rockchip,system-power-controll
185 wakeup-source;
186
187 vcc1-supply = <&vdd_5v>;
188 vcc2-supply = <&vdd_5v>;
189 vcc3-supply = <&vdd_5v>;
190 vcc4-supply = <&vdd_5v>;
191 vcc5-supply = <&vcc_io_33>;
192 vcc6-supply = <&vdd_5v>;
193
194 regulators {
195 vdd_log: DCDC_REG1 {
196 regulator-name
197 regulator-alwa
198 regulator-boot
199 regulator-min-
200 regulator-max-
201 regulator-ramp
202
203 regulator-stat
204 regula
205 regula
206 };
207 };
208
209 vdd_arm: DCDC_REG2 {
210 regulator-name
211 regulator-alwa
212 regulator-boot
213 regulator-min-
214 regulator-max-
215 regulator-ramp
216
217 regulator-stat
218 regula
219 regula
220 };
221 };
222
223 vcc_ddr: DCDC_REG3 {
224 regulator-name
225 regulator-alwa
226 regulator-boot
227
228 regulator-stat
229 regula
230 };
231 };
232
233 vcc_io_33: DCDC_REG4 {
234 regulator-name
235 regulator-alwa
236 regulator-boot
237 regulator-min-
238 regulator-max-
239
240 regulator-stat
241 regula
242 regula
243 };
244 };
245
246 vcc_18: LDO_REG1 {
247 regulator-name
248 regulator-alwa
249 regulator-boot
250 regulator-min-
251 regulator-max-
252
253 regulator-stat
254 regula
255 regula
256 };
257 };
258
259 vcc18_emmc: LDO_REG2 {
260 regulator-name
261 regulator-alwa
262 regulator-boot
263 regulator-min-
264 regulator-max-
265
266 regulator-stat
267 regula
268 regula
269 };
270 };
271
272 vdd_10: LDO_REG3 {
273 regulator-name
274 regulator-alwa
275 regulator-boot
276 regulator-min-
277 regulator-max-
278
279 regulator-stat
280 regula
281 regula
282 };
283 };
284 };
285 };
286 };
287
288 &io_domains {
289 pmuio-supply = <&vcc_io_33>;
290 vccio1-supply = <&vcc_io_33>;
291 vccio2-supply = <&vcc18_emmc>;
292 vccio3-supply = <&vcc_io_sdio>;
293 vccio4-supply = <&vcc_18>;
294 vccio5-supply = <&vcc_io_33>;
295 vccio6-supply = <&vcc_io_33>;
296 status = "okay";
297 };
298
299 &pinctrl {
300 button {
301 reset_button_pin: reset-button
302 rockchip,pins = <0 RK_
303 };
304 };
305
306 gmac2io {
307 eth_phy_reset_pin: eth-phy-res
308 rockchip,pins = <1 RK_
309 };
310 };
311
312 leds {
313 lan_led_pin: lan-led-pin {
314 rockchip,pins = <2 RK_
315 };
316
317 sys_led_pin: sys-led-pin {
318 rockchip,pins = <0 RK_
319 };
320
321 wan_led_pin: wan-led-pin {
322 rockchip,pins = <2 RK_
323 };
324 };
325
326 lan {
327 lan_vdd_pin: lan-vdd-pin {
328 rockchip,pins = <2 RK_
329 };
330 };
331
332 pmic {
333 pmic_int_l: pmic-int-l {
334 rockchip,pins = <1 RK_
335 };
336 };
337
338 sd {
339 sdio_vcc_pin: sdio-vcc-pin {
340 rockchip,pins = <1 RK_
341 };
342 };
343 };
344
345 &pwm2 {
346 status = "okay";
347 };
348
349 &sdmmc {
350 bus-width = <4>;
351 cap-sd-highspeed;
352 disable-wp;
353 pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cm
354 pinctrl-names = "default";
355 sd-uhs-sdr12;
356 sd-uhs-sdr25;
357 sd-uhs-sdr50;
358 sd-uhs-sdr104;
359 vmmc-supply = <&vcc_sd>;
360 vqmmc-supply = <&vcc_io_sdio>;
361 status = "okay";
362 };
363
364 &tsadc {
365 rockchip,hw-tshut-mode = <0>;
366 rockchip,hw-tshut-polarity = <0>;
367 status = "okay";
368 };
369
370 &u2phy {
371 status = "okay";
372 };
373
374 &u2phy_host {
375 status = "okay";
376 };
377
378 &u2phy_otg {
379 status = "okay";
380 };
381
382 &uart2 {
383 status = "okay";
384 };
385
386 &usb20_otg {
387 status = "okay";
388 dr_mode = "host";
389 };
390
391 &usbdrd3 {
392 dr_mode = "host";
393 status = "okay";
394 #address-cells = <1>;
395 #size-cells = <0>;
396
397 /* Second port is for USB 3.0 */
398 rtl8153: device@2 {
399 compatible = "usbbda,8153";
400 reg = <2>;
401 };
402 };
403
404 &usb_host0_ehci {
405 status = "okay";
406 };
407
408 &usb_host0_ohci {
409 status = "okay";
410 };
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