1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2018 Theobroma Systems Design
4 */
5
6 /dts-v1/;
7 #include "rk3368.dtsi"
8
9 / {
10 aliases {
11 ethernet0 = &gmac;
12 mmc0 = &emmc;
13 };
14
15 chosen {
16 stdout-path = "serial0:115200n
17 };
18
19 ext_gmac: gmac-clk {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac
23 #clock-cells = <0>;
24 };
25
26 i2cmux1 {
27 compatible = "i2c-mux-gpio";
28 #address-cells = <1>;
29 #size-cells = <0>;
30 i2c-parent = <&i2c1>;
31 mux-gpios = <&gpio1 RK_PA7 GPI
32
33 /* Q7_GP0_I2C */
34 i2c_gp0: i2c@0 {
35 reg = <0>;
36 #address-cells = <1>;
37 #size-cells = <0>;
38 };
39
40 /* Q7_SMB */
41 i2c_smb: i2c@1 {
42 reg = <1>;
43 #address-cells = <1>;
44 #size-cells = <0>;
45 };
46 };
47
48 i2cmux2 {
49 compatible = "i2c-mux-gpio";
50 #address-cells = <1>;
51 #size-cells = <0>;
52 i2c-parent = <&i2c2>;
53 mux-gpios = <&gpio1 RK_PB4 GPI
54
55 /* Q7_LVDS_BLC_I2C */
56 i2c_lvds_blc: i2c@0 {
57 reg = <0>;
58 #address-cells = <1>;
59 #size-cells = <0>;
60
61 fan: fan@18 {
62 compatible = "
63 reg = <0x18>;
64 };
65
66 rtc_twi: rtc@6f {
67 compatible = "
68 reg = <0x6f>;
69 };
70 };
71
72 /* Q7_GP2_I2C = LVDS_DID_CLK/D
73 i2c_gp2: i2c@1 {
74 reg = <1>;
75 #address-cells = <1>;
76 #size-cells = <0>;
77 };
78 };
79
80 leds {
81 compatible = "gpio-leds";
82 pinctrl-names = "default";
83 pinctrl-0 = <&module_led_pins>
84
85 module_led1: led-1 {
86 label = "module_led1";
87 gpios = <&gpio2 RK_PB5
88 linux,default-trigger
89 panic-indicator;
90 };
91
92 module_led2: led-2 {
93 label = "module_led2";
94 gpios = <&gpio3 RK_PA3
95 default-state = "off";
96 };
97 };
98
99 vcc_sys: vcc-sys-regulator {
100 compatible = "regulator-fixed"
101 regulator-name = "vcc_sys";
102 regulator-min-microvolt = <500
103 regulator-max-microvolt = <500
104 regulator-always-on;
105 regulator-boot-on;
106 };
107 };
108
109 &cpu_l0 {
110 cpu-supply = <&vdd_cpu>;
111 };
112
113 &cpu_l1 {
114 cpu-supply = <&vdd_cpu>;
115 };
116
117 &cpu_l2 {
118 cpu-supply = <&vdd_cpu>;
119 };
120
121 &cpu_l3 {
122 cpu-supply = <&vdd_cpu>;
123 };
124
125 &cpu_b0 {
126 cpu-supply = <&vdd_cpu>;
127 };
128
129 &cpu_b1 {
130 cpu-supply = <&vdd_cpu>;
131 };
132
133 &cpu_b2 {
134 cpu-supply = <&vdd_cpu>;
135 };
136
137 &cpu_b3 {
138 cpu-supply = <&vdd_cpu>;
139 };
140
141 &emmc {
142 bus-width = <8>;
143 clock-frequency = <150000000>;
144 mmc-hs200-1_8v;
145 non-removable;
146 vmmc-supply = <&vcc33_io>;
147 vqmmc-supply = <&vcc_18>;
148 pinctrl-names = "default";
149 pinctrl-0 = <&emmc_clk>, <&emmc_cmd>,
150 status = "okay";
151 };
152
153 &gmac {
154 assigned-clocks = <&cru SCLK_MAC>;
155 assigned-clock-parents = <&ext_gmac>;
156 clock_in_out = "input";
157 phy-supply = <&vcc33_io>;
158 phy-mode = "rgmii";
159 pinctrl-names = "default";
160 pinctrl-0 = <&rgmii_pins>;
161 snps,reset-active-low;
162 snps,reset-delays-us = <0 10000 50000>
163 snps,reset-gpio = <&gpio3 RK_PB3 GPIO_
164 tx_delay = <0x10>;
165 rx_delay = <0x10>;
166 status = "okay";
167 };
168
169 &i2c0 {
170 status = "okay";
171
172 rk808: pmic@1b {
173 compatible = "rockchip,rk808";
174 reg = <0x1b>;
175 interrupt-parent = <&gpio0>;
176 interrupts = <RK_PA5 IRQ_TYPE_
177 clock-output-names = "xin32k",
178 #clock-cells = <1>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pmic_int_l>, <&p
181 rockchip,system-power-controll
182 vcc1-supply = <&vcc_sys>;
183 vcc2-supply = <&vcc_sys>;
184 vcc3-supply = <&vcc_sys>;
185 vcc4-supply = <&vcc_sys>;
186 vcc6-supply = <&vcc_sys>;
187 vcc7-supply = <&vcc_sys>;
188 vcc8-supply = <&vcc_sys>;
189 vcc9-supply = <&vcc_sys>;
190 vcc10-supply = <&vcc_sys>;
191 vcc11-supply = <&vcc_sys>;
192 vcc12-supply = <&vcc_sys>;
193
194 regulators {
195 vdd_cpu: DCDC_REG1 {
196 regulator-name
197 regulator-min-
198 regulator-max-
199 regulator-alwa
200 regulator-boot
201 };
202
203 vdd_log: DCDC_REG2 {
204 regulator-name
205 regulator-min-
206 regulator-max-
207 regulator-alwa
208 regulator-boot
209 };
210
211 vcc_ddr: DCDC_REG3 {
212 regulator-name
213 regulator-alwa
214 regulator-boot
215 };
216
217 vcc33_io: DCDC_REG4 {
218 regulator-name
219 regulator-min-
220 regulator-max-
221 regulator-alwa
222 regulator-boot
223 };
224
225 vcc33_video: LDO_REG2
226 regulator-name
227 regulator-min-
228 regulator-max-
229 regulator-alwa
230 regulator-boot
231 };
232
233 vdd10_pll: LDO_REG3 {
234 regulator-name
235 regulator-min-
236 regulator-max-
237 regulator-alwa
238 regulator-boot
239 };
240
241 vdd10_video: LDO_REG6
242 regulator-name
243 regulator-min-
244 regulator-max-
245 regulator-alwa
246 regulator-boot
247 };
248
249 vcc_18: LDO_REG7 {
250 regulator-alwa
251 regulator-boot
252 regulator-min-
253 regulator-max-
254 regulator-name
255 };
256
257 vcc18_video: LDO_REG8
258 regulator-name
259 regulator-min-
260 regulator-max-
261 regulator-alwa
262 regulator-boot
263 };
264 };
265 };
266 };
267
268 &i2c1 {
269 status = "okay";
270 };
271
272 &i2c2 {
273 status = "okay";
274 };
275
276 /* The RK3368-uQ7 "Lion" has most IO voltages
277 &io_domains {
278 audio-supply = <&vcc33_io>;
279 dvp-supply = <&vcc33_io>;
280 flash0-supply = <&vcc_18>;
281 gpio30-supply = <&vcc33_io>;
282 gpio1830-supply = <&vcc33_io>;
283 sdcard-supply = <&vcc33_io>;
284 wifi-supply = <&vcc33_io>;
285 status = "okay";
286 };
287
288 &pinctrl {
289 leds {
290 module_led_pins: module-led-pi
291 rockchip,pins =
292 <2 RK_PB5 RK_F
293 <3 RK_PA3 RK_F
294 };
295 };
296 pmic {
297 pmic_int_l: pmic-int-l {
298 rockchip,pins = <0 RK_
299 };
300
301 pmic_sleep: pmic-sleep {
302 rockchip,pins = <0 RK_
303 };
304 };
305 };
306
307 &pmu_io_domains {
308 pmu-supply = <&vcc33_io>;
309 vop-supply = <&vcc33_io>;
310 status = "okay";
311 };
312
313 &spi1 {
314 status = "okay";
315
316 norflash: flash@0 {
317 compatible = "jedec,spi-nor";
318 reg = <0>;
319 spi-max-frequency = <50000000>
320 };
321 };
322
323 &uart1 {
324 status = "okay";
325 };
326
327 &uart3 {
328 status = "okay";
329 };
330
331 &usb_host0_ehci {
332 status = "okay";
333 };
334
335 &wdt {
336 status = "okay";
337 };
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