1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (c) 2016 Fuzhou Rockchip Electron 3 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h> 7 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-base.dtsi" !! 8 #include "rk3399.dtsi"
9 9
10 / { 10 / {
11 model = "Rockchip RK3399 Evaluation Bo 11 model = "Rockchip RK3399 Evaluation Board";
12 compatible = "rockchip,rk3399-evb", "r !! 12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
13 !! 13 "google,rk3399evb-rev2";
14 aliases { <<
15 ethernet0 = &gmac; <<
16 mmc0 = &sdhci; <<
17 }; <<
18 14
19 backlight: backlight { 15 backlight: backlight {
20 compatible = "pwm-backlight"; 16 compatible = "pwm-backlight";
21 brightness-levels = < 17 brightness-levels = <
22 0 1 2 3 4 18 0 1 2 3 4 5 6 7
23 8 9 10 11 12 1 19 8 9 10 11 12 13 14 15
24 16 17 18 19 20 2 20 16 17 18 19 20 21 22 23
25 24 25 26 27 28 2 21 24 25 26 27 28 29 30 31
26 32 33 34 35 36 3 22 32 33 34 35 36 37 38 39
27 40 41 42 43 44 4 23 40 41 42 43 44 45 46 47
28 48 49 50 51 52 5 24 48 49 50 51 52 53 54 55
29 56 57 58 59 60 6 25 56 57 58 59 60 61 62 63
30 64 65 66 67 68 6 26 64 65 66 67 68 69 70 71
31 72 73 74 75 76 7 27 72 73 74 75 76 77 78 79
32 80 81 82 83 84 8 28 80 81 82 83 84 85 86 87
33 88 89 90 91 92 9 29 88 89 90 91 92 93 94 95
34 96 97 98 99 100 10 30 96 97 98 99 100 101 102 103
35 104 105 106 107 108 10 31 104 105 106 107 108 109 110 111
36 112 113 114 115 116 11 32 112 113 114 115 116 117 118 119
37 120 121 122 123 124 12 33 120 121 122 123 124 125 126 127
38 128 129 130 131 132 13 34 128 129 130 131 132 133 134 135
39 136 137 138 139 140 14 35 136 137 138 139 140 141 142 143
40 144 145 146 147 148 14 36 144 145 146 147 148 149 150 151
41 152 153 154 155 156 15 37 152 153 154 155 156 157 158 159
42 160 161 162 163 164 16 38 160 161 162 163 164 165 166 167
43 168 169 170 171 172 17 39 168 169 170 171 172 173 174 175
44 176 177 178 179 180 18 40 176 177 178 179 180 181 182 183
45 184 185 186 187 188 18 41 184 185 186 187 188 189 190 191
46 192 193 194 195 196 19 42 192 193 194 195 196 197 198 199
47 200 201 202 203 204 20 43 200 201 202 203 204 205 206 207
48 208 209 210 211 212 21 44 208 209 210 211 212 213 214 215
49 216 217 218 219 220 22 45 216 217 218 219 220 221 222 223
50 224 225 226 227 228 22 46 224 225 226 227 228 229 230 231
51 232 233 234 235 236 23 47 232 233 234 235 236 237 238 239
52 240 241 242 243 244 24 48 240 241 242 243 244 245 246 247
53 248 249 250 251 252 25 49 248 249 250 251 252 253 254 255>;
54 default-brightness-level = <20 50 default-brightness-level = <200>;
55 pwms = <&pwm0 0 25000 0>; <<
56 }; <<
57 <<
58 edp_panel: edp-panel { <<
59 compatible = "lg,lp079qx1-sp0v <<
60 backlight = <&backlight>; <<
61 enable-gpios = <&gpio1 RK_PB5 51 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
62 power-supply = <&vcc3v3_s0>; !! 52 pwms = <&pwm0 0 25000 0>;
63 <<
64 port { <<
65 panel_in_edp: endpoint <<
66 remote-endpoin <<
67 }; <<
68 }; <<
69 }; 53 };
70 54
71 clkin_gmac: external-gmac-clock { 55 clkin_gmac: external-gmac-clock {
72 compatible = "fixed-clock"; 56 compatible = "fixed-clock";
73 clock-frequency = <125000000>; 57 clock-frequency = <125000000>;
74 clock-output-names = "clkin_gm 58 clock-output-names = "clkin_gmac";
75 #clock-cells = <0>; 59 #clock-cells = <0>;
76 }; 60 };
77 61
78 vdd_center: vdd-center { 62 vdd_center: vdd-center {
79 compatible = "pwm-regulator"; 63 compatible = "pwm-regulator";
80 pwms = <&pwm3 0 25000 0>; 64 pwms = <&pwm3 0 25000 0>;
81 regulator-name = "vdd_center"; 65 regulator-name = "vdd_center";
82 regulator-min-microvolt = <800 66 regulator-min-microvolt = <800000>;
83 regulator-max-microvolt = <140 67 regulator-max-microvolt = <1400000>;
84 regulator-always-on; 68 regulator-always-on;
85 regulator-boot-on; 69 regulator-boot-on;
86 status = "okay"; 70 status = "okay";
87 }; 71 };
88 72
89 vcc3v3_sys: vcc3v3-sys { 73 vcc3v3_sys: vcc3v3-sys {
90 compatible = "regulator-fixed" 74 compatible = "regulator-fixed";
91 regulator-name = "vcc3v3_sys"; 75 regulator-name = "vcc3v3_sys";
92 regulator-always-on; 76 regulator-always-on;
93 regulator-boot-on; 77 regulator-boot-on;
94 regulator-min-microvolt = <330 78 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <330 79 regulator-max-microvolt = <3300000>;
96 }; 80 };
97 81
98 vcc5v0_sys: vcc5v0-sys { 82 vcc5v0_sys: vcc5v0-sys {
99 compatible = "regulator-fixed" 83 compatible = "regulator-fixed";
100 regulator-name = "vcc5v0_sys"; 84 regulator-name = "vcc5v0_sys";
101 regulator-always-on; 85 regulator-always-on;
102 regulator-boot-on; 86 regulator-boot-on;
103 regulator-min-microvolt = <500 87 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <500 88 regulator-max-microvolt = <5000000>;
105 }; 89 };
106 90
107 vcc5v0_host: vcc5v0-host-regulator { 91 vcc5v0_host: vcc5v0-host-regulator {
108 compatible = "regulator-fixed" 92 compatible = "regulator-fixed";
109 enable-active-high; 93 enable-active-high;
110 gpio = <&gpio4 RK_PD1 GPIO_ACT 94 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
111 pinctrl-names = "default"; 95 pinctrl-names = "default";
112 pinctrl-0 = <&vcc5v0_host_en>; 96 pinctrl-0 = <&vcc5v0_host_en>;
113 regulator-name = "vcc5v0_host" 97 regulator-name = "vcc5v0_host";
114 vin-supply = <&vcc5v0_sys>; 98 vin-supply = <&vcc5v0_sys>;
115 }; 99 };
116 100
117 vcc_phy: vcc-phy-regulator { 101 vcc_phy: vcc-phy-regulator {
118 compatible = "regulator-fixed" 102 compatible = "regulator-fixed";
119 regulator-name = "vcc_phy"; 103 regulator-name = "vcc_phy";
120 regulator-always-on; 104 regulator-always-on;
121 regulator-boot-on; 105 regulator-boot-on;
122 }; 106 };
123 107
124 vcc_phy: vcc-phy-regulator { 108 vcc_phy: vcc-phy-regulator {
125 compatible = "regulator-fixed" 109 compatible = "regulator-fixed";
126 regulator-name = "vcc_phy"; 110 regulator-name = "vcc_phy";
127 regulator-always-on; 111 regulator-always-on;
128 regulator-boot-on; 112 regulator-boot-on;
129 }; 113 };
130 114
131 }; 115 };
132 116
133 &edp { <<
134 status = "okay"; <<
135 force-hpd; <<
136 <<
137 ports { <<
138 edp_out: port@1 { <<
139 reg = <1>; <<
140 #address-cells = <1>; <<
141 #size-cells = <0>; <<
142 <<
143 edp_out_panel: endpoin <<
144 reg = <0>; <<
145 remote-endpoin <<
146 }; <<
147 }; <<
148 }; <<
149 }; <<
150 <<
151 &emmc_phy { 117 &emmc_phy {
152 status = "okay"; 118 status = "okay";
153 }; 119 };
154 120
155 &gmac { 121 &gmac {
156 assigned-clocks = <&cru SCLK_RMII_SRC> 122 assigned-clocks = <&cru SCLK_RMII_SRC>;
157 assigned-clock-parents = <&clkin_gmac> 123 assigned-clock-parents = <&clkin_gmac>;
158 clock_in_out = "input"; 124 clock_in_out = "input";
159 phy-supply = <&vcc_phy>; 125 phy-supply = <&vcc_phy>;
160 phy-mode = "rgmii"; 126 phy-mode = "rgmii";
161 pinctrl-names = "default"; 127 pinctrl-names = "default";
162 pinctrl-0 = <&rgmii_pins>; 128 pinctrl-0 = <&rgmii_pins>;
163 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ 129 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
164 snps,reset-active-low; 130 snps,reset-active-low;
165 snps,reset-delays-us = <0 10000 50000> 131 snps,reset-delays-us = <0 10000 50000>;
166 tx_delay = <0x28>; 132 tx_delay = <0x28>;
167 rx_delay = <0x11>; 133 rx_delay = <0x11>;
168 status = "okay"; 134 status = "okay";
169 }; 135 };
170 136
171 &i2c0 { <<
172 status = "okay"; <<
173 <<
174 rk808: pmic@1b { <<
175 compatible = "rockchip,rk808"; <<
176 reg = <0x1b>; <<
177 interrupt-parent = <&gpio1>; <<
178 interrupts = <21 IRQ_TYPE_LEVE <<
179 pinctrl-names = "default"; <<
180 pinctrl-0 = <&pmic_int_l>; <<
181 rockchip,system-power-controll <<
182 wakeup-source; <<
183 #clock-cells = <1>; <<
184 clock-output-names = "rk808-cl <<
185 <<
186 vcc1-supply = <&vcc3v3_sys>; <<
187 vcc2-supply = <&vcc3v3_sys>; <<
188 vcc3-supply = <&vcc3v3_sys>; <<
189 vcc4-supply = <&vcc3v3_sys>; <<
190 vcc6-supply = <&vcc3v3_sys>; <<
191 vcc7-supply = <&vcc3v3_sys>; <<
192 vcc8-supply = <&vcc3v3_sys>; <<
193 vcc9-supply = <&vcc3v3_sys>; <<
194 vcc10-supply = <&vcc3v3_sys>; <<
195 vcc11-supply = <&vcc3v3_sys>; <<
196 vcc12-supply = <&vcc3v3_sys>; <<
197 vddio-supply = <&vcc1v8_pmu>; <<
198 <<
199 regulators { <<
200 vdd_log: DCDC_REG1 { <<
201 regulator-name <<
202 regulator-min- <<
203 regulator-max- <<
204 regulator-ramp <<
205 regulator-alwa <<
206 regulator-boot <<
207 regulator-stat <<
208 regula <<
209 regula <<
210 }; <<
211 }; <<
212 <<
213 vdd_cpu_l: DCDC_REG2 { <<
214 regulator-name <<
215 regulator-min- <<
216 regulator-max- <<
217 regulator-ramp <<
218 regulator-alwa <<
219 regulator-boot <<
220 regulator-stat <<
221 regula <<
222 }; <<
223 }; <<
224 <<
225 vcc_ddr: DCDC_REG3 { <<
226 regulator-name <<
227 regulator-alwa <<
228 regulator-boot <<
229 regulator-stat <<
230 regula <<
231 }; <<
232 }; <<
233 <<
234 vcc_1v8: DCDC_REG4 { <<
235 regulator-name <<
236 regulator-min- <<
237 regulator-max- <<
238 regulator-alwa <<
239 regulator-boot <<
240 regulator-stat <<
241 regula <<
242 regula <<
243 }; <<
244 }; <<
245 <<
246 vcc1v8_dvp: LDO_REG1 { <<
247 regulator-name <<
248 regulator-min- <<
249 regulator-max- <<
250 regulator-alwa <<
251 regulator-boot <<
252 regulator-stat <<
253 regula <<
254 }; <<
255 }; <<
256 <<
257 vcc3v0_tp: LDO_REG2 { <<
258 regulator-name <<
259 regulator-min- <<
260 regulator-max- <<
261 regulator-alwa <<
262 regulator-boot <<
263 regulator-stat <<
264 regula <<
265 }; <<
266 }; <<
267 <<
268 vcc1v8_pmu: LDO_REG3 { <<
269 regulator-name <<
270 regulator-min- <<
271 regulator-max- <<
272 regulator-alwa <<
273 regulator-boot <<
274 regulator-stat <<
275 regula <<
276 regula <<
277 }; <<
278 }; <<
279 <<
280 vcc_sd: LDO_REG4 { <<
281 regulator-name <<
282 regulator-min- <<
283 regulator-max- <<
284 regulator-alwa <<
285 regulator-boot <<
286 regulator-stat <<
287 regula <<
288 regula <<
289 }; <<
290 }; <<
291 <<
292 vcca3v0_codec: LDO_REG <<
293 regulator-name <<
294 regulator-min- <<
295 regulator-max- <<
296 regulator-alwa <<
297 regulator-boot <<
298 regulator-stat <<
299 regula <<
300 }; <<
301 }; <<
302 <<
303 vcc_1v5: LDO_REG6 { <<
304 regulator-name <<
305 regulator-min- <<
306 regulator-max- <<
307 regulator-alwa <<
308 regulator-boot <<
309 regulator-stat <<
310 regula <<
311 regula <<
312 }; <<
313 }; <<
314 <<
315 vcca1v8_codec: LDO_REG <<
316 regulator-name <<
317 regulator-min- <<
318 regulator-max- <<
319 regulator-alwa <<
320 regulator-boot <<
321 regulator-stat <<
322 regula <<
323 }; <<
324 }; <<
325 <<
326 vcc_3v0: LDO_REG8 { <<
327 regulator-name <<
328 regulator-min- <<
329 regulator-max- <<
330 regulator-alwa <<
331 regulator-boot <<
332 regulator-stat <<
333 regula <<
334 regula <<
335 }; <<
336 }; <<
337 <<
338 vcc3v3_s3: SWITCH_REG1 <<
339 regulator-name <<
340 regulator-alwa <<
341 regulator-boot <<
342 regulator-stat <<
343 regula <<
344 }; <<
345 }; <<
346 <<
347 vcc3v3_s0: SWITCH_REG2 <<
348 regulator-name <<
349 regulator-alwa <<
350 regulator-boot <<
351 regulator-stat <<
352 regula <<
353 }; <<
354 }; <<
355 }; <<
356 }; <<
357 <<
358 vdd_cpu_b: regulator@40 { <<
359 compatible = "silergy,syr827"; <<
360 reg = <0x40>; <<
361 fcs,suspend-voltage-selector = <<
362 regulator-name = "vdd_cpu_b"; <<
363 regulator-min-microvolt = <712 <<
364 regulator-max-microvolt = <150 <<
365 regulator-ramp-delay = <1000>; <<
366 regulator-always-on; <<
367 regulator-boot-on; <<
368 vin-supply = <&vcc5v0_sys>; <<
369 <<
370 regulator-state-mem { <<
371 regulator-off-in-suspe <<
372 }; <<
373 }; <<
374 <<
375 vdd_gpu: regulator@41 { <<
376 compatible = "silergy,syr828"; <<
377 reg = <0x41>; <<
378 fcs,suspend-voltage-selector = <<
379 regulator-name = "vdd_gpu"; <<
380 regulator-min-microvolt = <712 <<
381 regulator-max-microvolt = <150 <<
382 regulator-ramp-delay = <1000>; <<
383 regulator-always-on; <<
384 regulator-boot-on; <<
385 vin-supply = <&vcc5v0_sys>; <<
386 <<
387 regulator-state-mem { <<
388 regulator-off-in-suspe <<
389 }; <<
390 }; <<
391 }; <<
392 <<
393 &pwm0 { 137 &pwm0 {
394 status = "okay"; 138 status = "okay";
395 }; 139 };
396 140
397 &pwm2 { 141 &pwm2 {
398 status = "okay"; 142 status = "okay";
399 }; 143 };
400 144
401 &pwm3 { 145 &pwm3 {
402 status = "okay"; 146 status = "okay";
403 }; 147 };
404 148
405 &sdhci { 149 &sdhci {
406 bus-width = <8>; 150 bus-width = <8>;
407 mmc-hs400-1_8v; 151 mmc-hs400-1_8v;
408 mmc-hs400-enhanced-strobe; 152 mmc-hs400-enhanced-strobe;
409 non-removable; 153 non-removable;
410 status = "okay"; 154 status = "okay";
411 }; 155 };
412 156
413 &pcie_phy { 157 &pcie_phy {
414 status = "disabled"; 158 status = "disabled";
415 }; 159 };
416 160
417 &pcie0 { 161 &pcie0 {
418 ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_ 162 ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
419 num-lanes = <4>; 163 num-lanes = <4>;
420 pinctrl-names = "default"; 164 pinctrl-names = "default";
421 pinctrl-0 = <&pcie_clkreqn_cpm>; 165 pinctrl-0 = <&pcie_clkreqn_cpm>;
422 status = "disabled"; 166 status = "disabled";
423 }; 167 };
424 168
425 &u2phy0 { 169 &u2phy0 {
426 status = "okay"; 170 status = "okay";
427 }; 171 };
428 172
429 &u2phy0_host { 173 &u2phy0_host {
430 phy-supply = <&vcc5v0_host>; 174 phy-supply = <&vcc5v0_host>;
431 status = "okay"; 175 status = "okay";
432 }; 176 };
433 177
434 &u2phy1 { 178 &u2phy1 {
435 status = "okay"; 179 status = "okay";
436 }; 180 };
437 181
438 &u2phy1_host { 182 &u2phy1_host {
439 phy-supply = <&vcc5v0_host>; 183 phy-supply = <&vcc5v0_host>;
440 status = "okay"; 184 status = "okay";
441 }; 185 };
442 186
443 &uart2 { 187 &uart2 {
444 status = "okay"; 188 status = "okay";
445 }; 189 };
446 190
447 &usb_host0_ehci { 191 &usb_host0_ehci {
448 status = "okay"; 192 status = "okay";
449 }; 193 };
450 194
451 &usb_host0_ohci { 195 &usb_host0_ohci {
452 status = "okay"; 196 status = "okay";
453 }; 197 };
454 198
455 &usb_host1_ehci { 199 &usb_host1_ehci {
456 status = "okay"; 200 status = "okay";
457 }; 201 };
458 202
459 &usb_host1_ohci { 203 &usb_host1_ohci {
460 status = "okay"; 204 status = "okay";
461 }; 205 };
462 206
463 &pinctrl { 207 &pinctrl {
464 pmic { 208 pmic {
465 pmic_int_l: pmic-int-l { 209 pmic_int_l: pmic-int-l {
466 rockchip,pins = 210 rockchip,pins =
467 <1 RK_PC5 RK_F 211 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
468 }; 212 };
>> 213
>> 214 pmic_dvs2: pmic-dvs2 {
>> 215 rockchip,pins =
>> 216 <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
>> 217 };
469 }; 218 };
470 219
471 usb2 { 220 usb2 {
472 vcc5v0_host_en: vcc5v0-host-en 221 vcc5v0_host_en: vcc5v0-host-en {
473 rockchip,pins = 222 rockchip,pins =
474 <4 RK_PD1 RK_F 223 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
475 }; 224 };
476 }; 225 };
477 }; <<
478 <<
479 &vopb { <<
480 status = "okay"; <<
481 }; <<
482 <<
483 &vopb_mmu { <<
484 status = "okay"; <<
485 }; 226 };
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