1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Google Gru-Chromebook shared properties
4 *
5 * Copyright 2018 Google, Inc
6 */
7
8 #include "rk3399-gru.dtsi"
9
10 / {
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed"
13 regulator-name = "pp900_ap";
14
15 /* EC turns on w/ pp900_ap_en;
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900
19 regulator-max-microvolt = <900
20
21 vin-supply = <&ppvar_sys>;
22 };
23
24 /* EC turns on w/ pp900_usb_en */
25 pp900_usb: pp900-ap {
26 };
27
28 /* EC turns on w/ pp900_pcie_en */
29 pp900_pcie: pp900-ap {
30 };
31
32 pp3000: pp3000 {
33 compatible = "regulator-fixed"
34 regulator-name = "pp3000";
35 pinctrl-names = "default";
36 pinctrl-0 = <&pp3000_en>;
37
38 enable-active-high;
39 gpio = <&gpio0 12 GPIO_ACTIVE_
40
41 regulator-always-on;
42 regulator-boot-on;
43 regulator-min-microvolt = <300
44 regulator-max-microvolt = <300
45
46 vin-supply = <&ppvar_sys>;
47 };
48
49 ppvar_centerlogic_pwm: ppvar-centerlog
50 compatible = "pwm-regulator";
51 regulator-name = "ppvar_center
52
53 pwms = <&pwm3 0 3337 0>;
54 pwm-supply = <&ppvar_sys>;
55 pwm-dutycycle-range = <100 0>;
56 pwm-dutycycle-unit = <100>;
57
58 /* EC turns on w/ ppvar_center
59 regulator-always-on;
60 regulator-boot-on;
61 regulator-min-microvolt = <799
62 regulator-max-microvolt = <104
63 };
64
65 ppvar_centerlogic: ppvar-centerlogic {
66 compatible = "vctrl-regulator"
67 regulator-name = "ppvar_center
68
69 regulator-min-microvolt = <799
70 regulator-max-microvolt = <104
71
72 ctrl-supply = <&ppvar_centerlo
73 ctrl-voltage-range = <799434 1
74
75 regulator-settling-time-up-us
76 min-slew-down-rate = <225>;
77 ovp-threshold-percent = <16>;
78 };
79
80 /* Schematics call this PPVAR even tho
81 ppvar_logic: ppvar-logic {
82 compatible = "regulator-fixed"
83 regulator-name = "ppvar_logic"
84
85 /* EC turns on w/ ppvar_logic_
86 regulator-always-on;
87 regulator-boot-on;
88 regulator-min-microvolt = <900
89 regulator-max-microvolt = <900
90
91 vin-supply = <&ppvar_sys>;
92 };
93
94 pp1800_audio: pp1800-audio {
95 compatible = "regulator-fixed"
96 regulator-name = "pp1800_audio
97 pinctrl-names = "default";
98 pinctrl-0 = <&pp1800_audio_en>
99
100 enable-active-high;
101 gpio = <&gpio0 2 GPIO_ACTIVE_H
102
103 regulator-always-on;
104 regulator-boot-on;
105
106 vin-supply = <&pp1800>;
107 };
108
109 /* gpio is shared with pp3300_wifi_bt
110 pp1800_pcie: pp1800-pcie {
111 compatible = "regulator-fixed"
112 regulator-name = "pp1800_pcie"
113 pinctrl-names = "default";
114 pinctrl-0 = <&wlan_module_pd_l
115
116 enable-active-high;
117 gpio = <&gpio0 4 GPIO_ACTIVE_H
118
119 /*
120 * Need to wait 1ms + ramp-up
121 * This has been approximated
122 */
123 regulator-enable-ramp-delay =
124
125 vin-supply = <&pp1800>;
126 };
127
128 /* Always on; plain and simple */
129 pp3000_ap: pp3000_emmc: pp3000 {
130 };
131
132 pp1500_ap_io: pp1500-ap-io {
133 compatible = "regulator-fixed"
134 regulator-name = "pp1500_ap_io
135 pinctrl-names = "default";
136 pinctrl-0 = <&pp1500_en>;
137
138 enable-active-high;
139 gpio = <&gpio0 10 GPIO_ACTIVE_
140
141 regulator-always-on;
142 regulator-boot-on;
143 regulator-min-microvolt = <150
144 regulator-max-microvolt = <150
145
146 vin-supply = <&pp1800>;
147 };
148
149 pp3300_disp: pp3300-disp {
150 compatible = "regulator-fixed"
151 regulator-name = "pp3300_disp"
152 pinctrl-names = "default";
153 pinctrl-0 = <&pp3300_disp_en>;
154
155 enable-active-high;
156 gpio = <&gpio4 27 GPIO_ACTIVE_
157
158 startup-delay-us = <2000>;
159 vin-supply = <&pp3300>;
160 };
161
162 /* EC turns on w/ pp3300_usb_en_l */
163 pp3300_usb: pp3300 {
164 };
165
166 /* gpio is shared with pp1800_pcie and
167 pp3300_wifi_bt: pp3300-wifi-bt {
168 compatible = "regulator-fixed"
169 regulator-name = "pp3300_wifi_
170
171 enable-active-high;
172 gpio = <&gpio0 4 GPIO_ACTIVE_H
173
174 vin-supply = <&pp3300>;
175 };
176
177 /*
178 * This is a bit of a hack. The WiFi m
179 * 1ms after its regulators have rampe
180 * With some stretching of the imagina
181 * regulator a supply.
182 */
183 wlan_pd_n: wlan-pd-n {
184 compatible = "regulator-fixed"
185 regulator-name = "wlan_pd_n";
186 pinctrl-names = "default";
187 pinctrl-0 = <&wlan_module_rese
188
189 enable-active-high;
190 gpio = <&gpio1 11 GPIO_ACTIVE_
191
192 vin-supply = <&pp1800_pcie>;
193 };
194
195 backlight: backlight {
196 compatible = "pwm-backlight";
197 enable-gpios = <&gpio1 17 GPIO
198 power-supply = <&pp3300_disp>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&bl_en>;
201 };
202
203 gpio_keys: gpio-keys {
204 compatible = "gpio-keys";
205 pinctrl-names = "default";
206 pinctrl-0 = <&bt_host_wake_l>;
207
208 wake_on_bt: key-wake-on-bt {
209 label = "Wake-on-Bluet
210 gpios = <&gpio0 3 GPIO
211 linux,code = <KEY_WAKE
212 wakeup-source;
213 };
214 };
215 };
216
217 &ppvar_bigcpu {
218 min-slew-down-rate = <225>;
219 ovp-threshold-percent = <16>;
220 };
221
222 &ppvar_litcpu {
223 min-slew-down-rate = <225>;
224 ovp-threshold-percent = <16>;
225 };
226
227 &ppvar_gpu {
228 min-slew-down-rate = <225>;
229 ovp-threshold-percent = <16>;
230 };
231
232 &cdn_dp {
233 extcon = <&usbc_extcon0>, <&usbc_extco
234 };
235
236 &dmc {
237 center-supply = <&ppvar_centerlogic>;
238 rockchip,pd-idle-dis-freq-hz = <800000
239 rockchip,sr-idle-dis-freq-hz = <800000
240 rockchip,sr-mc-gate-idle-dis-freq-hz =
241 };
242
243 &edp {
244 status = "okay";
245
246 /*
247 * eDP PHY/clk don't sync reliably at
248 * set this here, because rk3399-gru.d
249 * off GPLL=600MHz, whereas some other
250 */
251 assigned-clocks = <&cru PCLK_EDP>;
252 assigned-clock-rates = <24000000>;
253
254 ports {
255 edp_out: port@1 {
256 reg = <1>;
257 #address-cells = <1>;
258 #size-cells = <0>;
259
260 edp_out_panel: endpoin
261 reg = <0>;
262 remote-endpoin
263 };
264 };
265 };
266 };
267
268 &gpio0 {
269 gpio-line-names = /* GPIO0 A 0-7 */
270 "AP_RTC_CLK_IN",
271 "EC_AP_INT_L",
272 "PP1800_AUDIO_EN",
273 "BT_HOST_WAKE_L",
274 "WLAN_MODULE_PD_L",
275 "H1_INT_OD_L",
276 "CENTERLOGIC_DVS_PWM
277 "",
278
279 /* GPIO0 B 0-4 */
280 "WIFI_HOST_WAKE_L",
281 "PMUIO2_33_18_L",
282 "PP1500_EN",
283 "AP_EC_WARM_RESET_RE
284 "PP3000_EN";
285 };
286
287 &gpio1 {
288 gpio-line-names = /* GPIO1 A 0-7 */
289 "",
290 "",
291 "SPK_PA_EN",
292 "",
293 "TRACKPAD_INT_L",
294 "AP_EC_S3_S0_L",
295 "AP_EC_OVERTEMP",
296 "AP_SPI_FLASH_MISO",
297
298 /* GPIO1 B 0-7 */
299 "AP_SPI_FLASH_MOSI_R
300 "AP_SPI_FLASH_CLK_R"
301 "AP_SPI_FLASH_CS_L_R
302 "WLAN_MODULE_RESET_L
303 "WIFI_DISABLE_L",
304 "MIC_INT",
305 "",
306 "AP_I2C_DVS_SDA",
307
308 /* GPIO1 C 0-7 */
309 "AP_I2C_DVS_SCL",
310 "AP_BL_EN",
311 /*
312 * AP_FLASH_WP is cr
313 * AP_FW_WP or CPU1_
314 */
315 "AP_FLASH_WP",
316 "LITCPU_DVS_PWM",
317 "AP_I2C_AUDIO_SDA",
318 "AP_I2C_AUDIO_SCL",
319 "",
320 "HEADSET_INT_L";
321 };
322
323 &gpio2 {
324 gpio-line-names = /* GPIO2 A 0-7 */
325 "",
326 "",
327 "SD_IO_PWR_EN",
328 "",
329 "",
330 "",
331 "",
332 "",
333
334 /* GPIO2 B 0-7 */
335 "",
336 "",
337 "",
338 "",
339 "",
340 "",
341 "",
342 "",
343
344 /* GPIO2 C 0-7 */
345 "",
346 "",
347 "",
348 "",
349 "AP_SPI_EC_MISO",
350 "AP_SPI_EC_MOSI",
351 "AP_SPI_EC_CLK",
352 "AP_SPI_EC_CS_L",
353
354 /* GPIO2 D 0-4 */
355 "BT_DEV_WAKE_L",
356 "",
357 "WIFI_PCIE_CLKREQ_L"
358 "WIFI_PERST_L",
359 "SD_PWR_3000_1800_L"
360 };
361
362 &gpio3 {
363 gpio-line-names = /* GPIO3 A 0-7 */
364 "",
365 "",
366 "",
367 "",
368 "AP_SPI_TPM_MISO",
369 "AP_SPI_TPM_MOSI_R",
370 "AP_SPI_TPM_CLK_R",
371 "AP_SPI_TPM_CS_L_R",
372
373 /* GPIO3 B 0-7 */
374 "EC_IN_RW",
375 "",
376 "AP_I2C_TP_SDA",
377 "AP_I2C_TP_SCL",
378 "AP_I2C_TP_PU_EN",
379 "TOUCH_INT_L",
380 "",
381 "",
382
383 /* GPIO3 C 0-7 */
384 "",
385 "",
386 "",
387 "",
388 "",
389 "",
390 "",
391 "",
392
393 /* GPIO3 D 0-7 */
394 "I2S0_SCLK",
395 "I2S0_LRCK_RX",
396 "I2S0_LRCK_TX",
397 "I2S0_SDI_0",
398 "I2S0_SDI_1",
399 "",
400 "I2S0_SDO_1",
401 "I2S0_SDO_0";
402 };
403
404 &gpio4 {
405 gpio-line-names = /* GPIO4 A 0-7 */
406 "I2S_MCLK",
407 "AP_I2C_MIC_SDA",
408 "AP_I2C_MIC_SCL",
409 "",
410 "",
411 "",
412 "",
413 "",
414
415 /* GPIO4 B 0-7 */
416 "",
417 "",
418 "",
419 "",
420 "",
421 "",
422 "",
423 "",
424
425 /* GPIO4 C 0-7 */
426 "AP_I2C_TS_SDA",
427 "AP_I2C_TS_SCL",
428 "GPU_DVS_PWM",
429 "UART_DBG_TX_AP_RX",
430 "UART_AP_TX_DBG_RX",
431 "",
432 "BIGCPU_DVS_PWM",
433 "EDP_HPD_3V0",
434
435 /* GPIO4 D 0-5 */
436 "SD_CARD_DET_L",
437 "USB_DP_HPD",
438 "TOUCH_RESET_L",
439 "PP3300_DISP_EN",
440 "",
441 "SD_SLOT_PWR_EN";
442 };
443
444 ap_i2c_mic: &i2c1 {
445 status = "okay";
446
447 clock-frequency = <400000>;
448
449 /* These are relatively safe rise/fall
450 i2c-scl-falling-time-ns = <50>;
451 i2c-scl-rising-time-ns = <300>;
452
453 headsetcodec: rt5514@57 {
454 compatible = "realtek,rt5514";
455 reg = <0x57>;
456 realtek,dmic-init-delay-ms = <
457 };
458 };
459
460 ap_i2c_tp: &i2c5 {
461 status = "okay";
462
463 clock-frequency = <400000>;
464
465 /* These are relatively safe rise/fall
466 i2c-scl-falling-time-ns = <50>;
467 i2c-scl-rising-time-ns = <300>;
468
469 /*
470 * Note strange pullup enable. Appare
471 * still allows us to get nice 4.7K pu
472 * transfers. Basically we want the p
473 * alive, so the "en" pin just gets se
474 */
475 pinctrl-0 = <&i2c5_xfer &ap_i2c_tp_pu_
476 };
477
478 &cros_ec {
479 cros_ec_pwm: pwm {
480 compatible = "google,cros-ec-p
481 #pwm-cells = <1>;
482 };
483
484 usbc_extcon1: extcon1 {
485 compatible = "google,extcon-us
486 google,usb-port-id = <1>;
487 };
488 };
489
490 &sound {
491 rockchip,codec = <&max98357a &headsetc
492 &codec &wacky_spi_au
493 };
494
495 &spi2 {
496 wacky_spi_audio: spi2@0 {
497 compatible = "realtek,rt5514";
498 reg = <0>;
499 interrupt-parent = <&gpio1>;
500 interrupts = <13 IRQ_TYPE_LEVE
501 pinctrl-names = "default";
502 pinctrl-0 = <&mic_int>;
503 /* May run faster once verifie
504 spi-max-frequency = <10000000>
505 wakeup-source;
506 };
507 };
508
509 &pci_rootport {
510 mvl_wifi: wifi@0,0 {
511 compatible = "pci1b4b,2b42";
512 reg = <0x0000 0x0 0x0 0x0 0x0>
513 interrupt-parent = <&gpio0>;
514 interrupts = <8 IRQ_TYPE_LEVEL
515 pinctrl-names = "default";
516 pinctrl-0 = <&wlan_host_wake_l
517 wakeup-source;
518 };
519 };
520
521 &tcphy1 {
522 status = "okay";
523 extcon = <&usbc_extcon1>;
524 };
525
526 &u2phy1 {
527 status = "okay";
528 };
529
530 &usb_host0_ehci {
531 status = "okay";
532 };
533
534 &usb_host1_ehci {
535 status = "okay";
536 };
537
538 &usb_host1_ohci {
539 status = "okay";
540 };
541
542 &usbdrd3_1 {
543 status = "okay";
544 extcon = <&usbc_extcon1>;
545 };
546
547 &usbdrd_dwc3_1 {
548 status = "okay";
549 dr_mode = "host";
550 };
551
552 &pinctrl {
553 discrete-regulators {
554 pp1500_en: pp1500-en {
555 rockchip,pins = <0 RK_
556 &pcfg
557 };
558
559 pp1800_audio_en: pp1800-audio-
560 rockchip,pins = <0 RK_
561 &pcfg
562 };
563
564 pp3000_en: pp3000-en {
565 rockchip,pins = <0 RK_
566 &pcfg
567 };
568
569 pp3300_disp_en: pp3300-disp-en
570 rockchip,pins = <4 RK_
571 &pcfg
572 };
573
574 wlan_module_pd_l: wlan-module-
575 rockchip,pins = <0 RK_
576 &pcfg
577 };
578 };
579 };
580
581 &wifi {
582 wifi_perst_l: wifi-perst-l {
583 rockchip,pins = <2 RK_PD3 RK_F
584 };
585
586 wlan_host_wake_l: wlan-host-wake-l {
587 /* Kevin has an external pull
588 rockchip,pins = <0 RK_PB0 RK_F
589 };
590 };
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