1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2020 Aditya Prayoga <aditya@ko
4 */
5
6 /*
7 * The Kobol Helios64 is a board designed to o
8 * ships with an enclosing that can host five
9 *
10 * See https://wiki.kobol.io/helios64/intro/ f
11 */
12
13 /dts-v1/;
14 #include "rk3399.dtsi"
15
16 / {
17 model = "Kobol Helios64";
18 compatible = "kobol,helios64", "rockch
19
20 aliases {
21 ethernet0 = &gmac;
22 mmc0 = &sdmmc;
23 mmc1 = &sdhci;
24 };
25
26 avdd_0v9_s0: avdd-0v9-s0 {
27 compatible = "regulator-fixed"
28 regulator-name = "avdd_0v9_s0"
29 regulator-always-on;
30 regulator-boot-on;
31 regulator-min-microvolt = <900
32 regulator-max-microvolt = <900
33 vin-supply = <&vcc1v8_sys_s3>;
34 };
35
36 avdd_1v8_s0: avdd-1v8-s0 {
37 compatible = "regulator-fixed"
38 regulator-name = "avdd_1v8_s0"
39 regulator-always-on;
40 regulator-boot-on;
41 regulator-min-microvolt = <180
42 regulator-max-microvolt = <180
43 vin-supply = <&vcc3v3_sys_s3>;
44 };
45
46 chosen {
47 stdout-path = "serial2:1500000
48 };
49
50 clkin_gmac: external-gmac-clock {
51 compatible = "fixed-clock";
52 clock-frequency = <125000000>;
53 clock-output-names = "clkin_gm
54 #clock-cells = <0>;
55 };
56
57 fan1 {
58 /* fan connected to P7 */
59 compatible = "pwm-fan";
60 pwms = <&pwm0 0 40000 0>;
61 cooling-levels = <0 80 170 255
62 };
63
64 fan2 {
65 /* fan connected to P6 */
66 compatible = "pwm-fan";
67 pwms = <&pwm1 0 40000 0>;
68 cooling-levels = <0 80 170 255
69 };
70
71 leds {
72 compatible = "gpio-leds";
73 pinctrl-names = "default";
74 pinctrl-0 = <&sys_grn_led_on &
75
76 led-0 {
77 label = "helios64:gree
78 gpios = <&gpio0 RK_PB4
79 default-state = "on";
80 };
81
82 led-1 {
83 label = "helios64:red:
84 gpios = <&gpio0 RK_PB5
85 default-state = "keep"
86 };
87 };
88
89 hdd_a_power: hdd-a-power {
90 compatible = "regulator-fixed"
91 enable-active-high;
92 gpio = <&gpio1 RK_PA0 GPIO_ACT
93 pinctrl-0 = <&hdd_a_power_en>;
94 pinctrl-names = "default";
95 regulator-always-on;
96 regulator-boot-on;
97 regulator-name = "hdd_a_power"
98 startup-delay-us = <2000000>;
99 };
100
101 hdd_b_power: hdd-b-power {
102 compatible = "regulator-fixed"
103 enable-active-high;
104 gpio = <&gpio1 RK_PA1 GPIO_ACT
105 pinctrl-0 = <&hdd_b_power_en>;
106 pinctrl-names = "default";
107 regulator-always-on;
108 regulator-boot-on;
109 regulator-name = "hdd_b_power"
110 startup-delay-us = <2000000>;
111 };
112
113 pcie_power: pcie-power {
114 compatible = "regulator-fixed"
115 enable-active-high;
116 gpio = <&gpio1 RK_PD0 GPIO_ACT
117 pinctrl-0 = <&pcie_pwr>;
118 pinctrl-names = "default";
119 regulator-boot-on;
120 regulator-name = "pcie_power";
121 startup-delay-us = <10000>;
122 vin-supply = <&vcc5v0_perdev>;
123 };
124
125 usblan_power: usblan-power {
126 compatible = "regulator-fixed"
127 enable-active-high;
128 gpio = <&gpio1 RK_PC7 GPIO_ACT
129 pinctrl-names = "default";
130 pinctrl-0 = <&usb_lan_en>;
131 regulator-name = "usblan_power
132 regulator-always-on;
133 regulator-boot-on;
134 vin-supply = <&vcc5v0_usb>;
135 };
136
137 vcc1v8_sys_s0: vcc1v8-sys-s0 {
138 compatible = "regulator-fixed"
139 regulator-name = "vcc1v8_sys_s
140 regulator-always-on;
141 regulator-boot-on;
142 regulator-min-microvolt = <180
143 regulator-max-microvolt = <180
144 vin-supply = <&vcc1v8_sys_s3>;
145 };
146
147 vcc3v0_sd: vcc3v0-sd {
148 compatible = "regulator-fixed"
149 enable-active-high;
150 gpio = <&gpio0 RK_PA1 GPIO_ACT
151 regulator-name = "vcc3v0_sd";
152 regulator-boot-on;
153 regulator-min-microvolt = <300
154 regulator-max-microvolt = <300
155 pinctrl-names = "default";
156 pinctrl-0 = <&sdmmc0_pwr_h>;
157 vin-supply = <&vcc3v3_sys_s3>;
158 };
159
160 vcc3v3_sys_s3: vcc_lan: vcc3v3-sys-s3
161 compatible = "regulator-fixed"
162 regulator-name = "vcc3v3_sys_s
163 regulator-always-on;
164 regulator-boot-on;
165 regulator-min-microvolt = <330
166 regulator-max-microvolt = <330
167 vin-supply = <&vcc5v0_sys>;
168
169 regulator-state-mem {
170 regulator-on-in-suspen
171 };
172 };
173
174 vcc5v0_perdev: vcc5v0-perdev {
175 compatible = "regulator-fixed"
176 regulator-name = "vcc5v0_perde
177 regulator-always-on;
178 regulator-boot-on;
179 regulator-min-microvolt = <500
180 regulator-max-microvolt = <500
181 vin-supply = <&vcc12v_dcin_bku
182 };
183
184 vcc5v0_sys: vcc5v0-sys {
185 compatible = "regulator-fixed"
186 regulator-name = "vcc5v0_sys";
187 regulator-always-on;
188 regulator-boot-on;
189 regulator-min-microvolt = <500
190 regulator-max-microvolt = <500
191 vin-supply = <&vcc12v_dcin_bku
192
193 regulator-state-mem {
194 regulator-on-in-suspen
195 };
196 };
197
198 vcc5v0_usb: vcc5v0-usb {
199 compatible = "regulator-fixed"
200 enable-active-high;
201 gpio = <&gpio1 RK_PC6 GPIO_ACT
202 pinctrl-names = "default";
203 pinctrl-0 = <&vcc5v0_usb_en>;
204 regulator-name = "vcc5v0_usb";
205 regulator-always-on;
206 regulator-boot-on;
207 regulator-min-microvolt = <500
208 regulator-max-microvolt = <500
209 vin-supply = <&vcc5v0_perdev>;
210 };
211
212 vcc12v_dcin: vcc12v-dcin {
213 compatible = "regulator-fixed"
214 regulator-name = "vcc12v_dcin"
215 regulator-always-on;
216 regulator-boot-on;
217 regulator-min-microvolt = <120
218 regulator-max-microvolt = <120
219 };
220
221 vcc12v_dcin_bkup: vcc12v-dcin-bkup {
222 compatible = "regulator-fixed"
223 regulator-name = "vcc12v_dcin_
224 regulator-always-on;
225 regulator-boot-on;
226 regulator-min-microvolt = <120
227 regulator-max-microvolt = <120
228 vin-supply = <&vcc12v_dcin>;
229 };
230 };
231
232 /*
233 * The system doesn't run stable with cpu freq
234 * frequencies until this problem is properly
235 */
236 &cluster0_opp {
237 /delete-node/ opp00;
238 /delete-node/ opp01;
239 /delete-node/ opp02;
240 /delete-node/ opp03;
241 /delete-node/ opp04;
242 };
243
244 &cluster1_opp {
245 /delete-node/ opp00;
246 /delete-node/ opp01;
247 /delete-node/ opp02;
248 /delete-node/ opp03;
249 /delete-node/ opp04;
250 /delete-node/ opp05;
251 /delete-node/ opp06;
252 };
253
254 &cpu_b0 {
255 cpu-supply = <&vdd_cpu_b>;
256 };
257
258 &cpu_b1 {
259 cpu-supply = <&vdd_cpu_b>;
260 };
261
262 &cpu_l0 {
263 cpu-supply = <&vdd_cpu_l>;
264 };
265
266 &cpu_l1 {
267 cpu-supply = <&vdd_cpu_l>;
268 };
269
270 &cpu_l2 {
271 cpu-supply = <&vdd_cpu_l>;
272 };
273
274 &cpu_l3 {
275 cpu-supply = <&vdd_cpu_l>;
276 };
277
278 &emmc_phy {
279 status = "okay";
280 };
281
282 &gmac {
283 assigned-clock-parents = <&clkin_gmac>
284 assigned-clocks = <&cru SCLK_RMII_SRC>
285 clock_in_out = "input";
286 phy-mode = "rgmii";
287 phy-supply = <&vcc_lan>;
288 pinctrl-names = "default";
289 pinctrl-0 = <&rgmii_pins &gphy_reset>;
290 rx_delay = <0x20>;
291 tx_delay = <0x28>;
292 snps,reset-active-low;
293 snps,reset-delays-us = <0 10000 50000>
294 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_
295 status = "okay";
296 };
297
298 &i2c0 {
299 clock-frequency = <400000>;
300 i2c-scl-rising-time-ns = <168>;
301 i2c-scl-falling-time-ns = <4>;
302 status = "okay";
303
304 rk808: pmic@1b {
305 compatible = "rockchip,rk808";
306 reg = <0x1b>;
307 interrupt-parent = <&gpio0>;
308 interrupts = <10 IRQ_TYPE_LEVE
309 clock-output-names = "xin32k",
310 pinctrl-names = "default";
311 pinctrl-0 = <&pmic_int_l>;
312 rockchip,system-power-controll
313 vcc1-supply = <&vcc5v0_sys>;
314 vcc2-supply = <&vcc5v0_sys>;
315 vcc3-supply = <&vcc5v0_sys>;
316 vcc4-supply = <&vcc5v0_sys>;
317 vcc6-supply = <&vcc5v0_sys>;
318 vcc7-supply = <&vcc5v0_sys>;
319 vcc8-supply = <&vcc3v3_sys_s3>
320 vcc9-supply = <&vcc5v0_sys>;
321 vcc10-supply = <&vcc5v0_sys>;
322 vcc11-supply = <&vcc5v0_sys>;
323 vcc12-supply = <&vcc3v3_sys_s3
324 vddio-supply = <&vcc3v0_s3>;
325 wakeup-source;
326 #clock-cells = <1>;
327
328 regulators {
329 vdd_cpu_l: DCDC_REG2 {
330 regulator-name
331 regulator-alwa
332 regulator-boot
333 regulator-min-
334 regulator-max-
335 regulator-ramp
336
337 regulator-stat
338 regula
339 };
340 };
341
342 vcc1v8_sys_s3: DCDC_RE
343 regulator-name
344 regulator-alwa
345 regulator-boot
346 regulator-min-
347 regulator-max-
348
349 regulator-stat
350 regula
351 regula
352 };
353 };
354
355 vcc_sdio_s0: LDO_REG4
356 regulator-name
357 regulator-alwa
358 regulator-boot
359 regulator-min-
360 regulator-max-
361
362 regulator-stat
363 regula
364 regula
365 };
366 };
367
368 vcc3v0_s3: LDO_REG8 {
369 regulator-name
370 regulator-alwa
371 regulator-boot
372 regulator-min-
373 regulator-max-
374
375 regulator-stat
376 regula
377 regula
378 };
379 };
380 };
381 };
382
383 vdd_cpu_b: regulator@40 {
384 compatible = "silergy,syr827";
385 reg = <0x40>;
386 fcs,suspend-voltage-selector =
387 regulator-name = "vdd_cpu_b";
388 regulator-always-on;
389 regulator-boot-on;
390 regulator-min-microvolt = <712
391 regulator-max-microvolt = <150
392 regulator-ramp-delay = <1000>;
393 vin-supply = <&vcc5v0_sys>;
394
395 regulator-state-mem {
396 regulator-off-in-suspe
397 };
398 };
399 };
400
401 &i2c2 {
402 clock-frequency = <400000>;
403 i2c-scl-rising-time-ns = <160>;
404 i2c-scl-falling-time-ns = <30>;
405 status = "okay";
406
407 temp@4c {
408 compatible = "national,lm75";
409 reg = <0x4c>;
410 };
411 };
412
413 &io_domains {
414 audio-supply = <&vcc1v8_sys_s0>;
415 bt656-supply = <&vcc1v8_sys_s0>;
416 gpio1830-supply = <&vcc3v0_s3>;
417 sdmmc-supply = <&vcc_sdio_s0>;
418 status = "okay";
419 };
420
421 &pcie_phy {
422 status = "okay";
423 };
424
425 &pcie0 {
426 ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_
427 max-link-speed = <2>;
428 num-lanes = <2>;
429 pinctrl-names = "default";
430 status = "okay";
431
432 vpcie12v-supply = <&vcc12v_dcin>;
433 vpcie3v3-supply = <&pcie_power>;
434 vpcie1v8-supply = <&avdd_1v8_s0>;
435 vpcie0v9-supply = <&avdd_0v9_s0>;
436 };
437
438 &pinctrl {
439 gmac {
440 gphy_reset: gphy-reset {
441 rockchip,pins = <3 RK_
442 };
443 };
444
445 leds {
446 sys_grn_led_on: sys-grn-led-on
447 rockchip,pins = <0 RK_
448 };
449
450 sys_red_led_on: sys-red-led-on
451 rockchip,pins = <0 RK_
452 };
453 };
454
455 pcie {
456 pcie_pwr: pcie-pwr {
457 rockchip,pins =
458 <1 RK_PD0 RK_F
459 };
460 };
461
462 pmic {
463 pmic_int_l: pmic-int-l {
464 rockchip,pins = <0 RK_
465 };
466 };
467
468 power {
469 hdd_a_power_en: hdd-a-power-en
470 rockchip,pins = <1 RK_
471 };
472
473 hdd_b_power_en: hdd-b-power-en
474 rockchip,pins = <1 RK_
475 };
476
477 vcc5v0_usb_en: vcc5v0-usb-en {
478 rockchip,pins = <1 RK_
479 };
480
481 usb_lan_en: usb-lan-en {
482 rockchip,pins = <1 RK_
483 };
484 };
485
486 vcc3v0-sd {
487 sdmmc0_pwr_h: sdmmc0-pwr-h {
488 rockchip,pins = <0 RK_
489 };
490 };
491 };
492
493 &pmu_io_domains {
494 pmu1830-supply = <&vcc3v0_s3>;
495 status = "okay";
496 };
497
498 &pwm0 {
499 /* pwm-fan on P7 */
500 status = "okay";
501 };
502
503 &pwm1 {
504 /* pwm-fan on P6 */
505 status = "okay";
506 };
507
508 &sdhci {
509 bus-width = <8>;
510 mmc-hs200-1_8v;
511 non-removable;
512 vqmmc-supply = <&vcc1v8_sys_s0>;
513 status = "okay";
514 };
515
516 &sdmmc {
517 bus-width = <4>;
518 cap-sd-highspeed;
519 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_
520 disable-wp;
521 pinctrl-names = "default";
522 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sd
523 vmmc-supply = <&vcc3v0_sd>;
524 vqmmc-supply = <&vcc_sdio_s0>;
525 status = "okay";
526 };
527
528 &spi1 {
529 status = "okay";
530
531 spiflash: flash@0 {
532 compatible = "jedec,spi-nor";
533 reg = <0x0>;
534 spi-max-frequency = <25000000>
535 status = "okay";
536 m25p,fast-read;
537 };
538 };
539
540 /* UEXT connector */
541 &spi2 {
542 status = "okay";
543 };
544
545 &spi5 {
546 status = "okay";
547 };
548
549 &tcphy1 {
550 /* phy for &usbdrd_dwc3_1 */
551 status = "okay";
552 };
553
554 &tsadc {
555 /* tshut mode 0:CRU 1:GPIO */
556 rockchip,hw-tshut-mode = <1>;
557 /* tshut polarity 0:LOW 1:HIGH */
558 rockchip,hw-tshut-polarity = <1>;
559 status = "okay";
560 };
561
562 &u2phy1 {
563 status = "okay";
564
565 otg-port {
566 /* phy for &usbdrd_dwc3_1 */
567 phy-supply = <&vcc5v0_usb>;
568 status = "okay";
569 };
570 };
571
572 &uart2 {
573 status = "okay";
574 };
575
576 &usbdrd3_1 {
577 status = "okay";
578
579 usb@fe900000 {
580 dr_mode = "host";
581 status = "okay";
582 #address-cells = <1>;
583 #size-cells = <0>;
584
585 hub@1 {
586 compatible = "usb2109,
587 reg = <1>;
588 #address-cells = <1>;
589 #size-cells = <0>;
590
591 port@1 {
592 reg = <1>;
593 #trigger-sourc
594 };
595
596 port@2 {
597 reg = <2>;
598 #trigger-sourc
599 };
600
601 port@3 {
602 reg = <3>;
603 #trigger-sourc
604 };
605
606 device@4 {
607 compatible = "
608 reg = <4>;
609 #address-cells
610 #size-cells =
611
612 interface@0 {
613 compat
614 reg =
615 };
616 };
617 };
618 };
619 };
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