1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 2 /* 3 * Copyright (c) 2019 Andy Yan <andy.yan@gmail. 3 * Copyright (c) 2019 Andy Yan <andy.yan@gmail.com> 4 */ 4 */ 5 5 6 /dts-v1/; 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes. 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/pwm/pwm.h> 9 #include <dt-bindings/pwm/pwm.h> 10 #include "rk3399.dtsi" 10 #include "rk3399.dtsi" >> 11 #include "rk3399-opp.dtsi" 11 12 12 / { 13 / { 13 model = "Leez RK3399 P710"; 14 model = "Leez RK3399 P710"; 14 compatible = "leez,p710", "rockchip,rk 15 compatible = "leez,p710", "rockchip,rk3399"; 15 16 16 aliases { 17 aliases { 17 ethernet0 = &gmac; 18 ethernet0 = &gmac; 18 mmc0 = &sdio0; 19 mmc0 = &sdio0; 19 mmc1 = &sdmmc; 20 mmc1 = &sdmmc; 20 mmc2 = &sdhci; 21 mmc2 = &sdhci; 21 }; 22 }; 22 23 23 chosen { 24 chosen { 24 stdout-path = "serial2:1500000 25 stdout-path = "serial2:1500000n8"; 25 }; 26 }; 26 27 27 clkin_gmac: external-gmac-clock { 28 clkin_gmac: external-gmac-clock { 28 compatible = "fixed-clock"; 29 compatible = "fixed-clock"; 29 clock-frequency = <125000000>; 30 clock-frequency = <125000000>; 30 clock-output-names = "clkin_gm 31 clock-output-names = "clkin_gmac"; 31 #clock-cells = <0>; 32 #clock-cells = <0>; 32 }; 33 }; 33 34 34 sdio_pwrseq: sdio-pwrseq { 35 sdio_pwrseq: sdio-pwrseq { 35 compatible = "mmc-pwrseq-simpl 36 compatible = "mmc-pwrseq-simple"; 36 clocks = <&rk808 1>; 37 clocks = <&rk808 1>; 37 clock-names = "ext_clock"; 38 clock-names = "ext_clock"; 38 pinctrl-names = "default"; 39 pinctrl-names = "default"; 39 pinctrl-0 = <&wifi_reg_on_h>; 40 pinctrl-0 = <&wifi_reg_on_h>; 40 reset-gpios = <&gpio0 RK_PB2 G 41 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 41 }; 42 }; 42 43 43 dc5v_adp: dc5v-adp { 44 dc5v_adp: dc5v-adp { 44 compatible = "regulator-fixed" 45 compatible = "regulator-fixed"; 45 regulator-name = "dc5v_adapter 46 regulator-name = "dc5v_adapter"; 46 regulator-always-on; 47 regulator-always-on; 47 regulator-boot-on; 48 regulator-boot-on; 48 regulator-min-microvolt = <500 49 regulator-min-microvolt = <5000000>; 49 regulator-max-microvolt = <500 50 regulator-max-microvolt = <5000000>; 50 }; 51 }; 51 52 52 vcc3v3_lan: vcc3v3-lan { 53 vcc3v3_lan: vcc3v3-lan { 53 compatible = "regulator-fixed" 54 compatible = "regulator-fixed"; 54 regulator-name = "vcc3v3_lan"; 55 regulator-name = "vcc3v3_lan"; 55 regulator-always-on; 56 regulator-always-on; 56 regulator-boot-on; 57 regulator-boot-on; 57 regulator-min-microvolt = <330 58 regulator-min-microvolt = <3300000>; 58 regulator-max-microvolt = <330 59 regulator-max-microvolt = <3300000>; 59 vin-supply = <&vcc3v3_sys>; 60 vin-supply = <&vcc3v3_sys>; 60 }; 61 }; 61 62 62 vcc3v3_sys: vcc3v3-sys { 63 vcc3v3_sys: vcc3v3-sys { 63 compatible = "regulator-fixed" 64 compatible = "regulator-fixed"; 64 regulator-name = "vcc3v3_sys"; 65 regulator-name = "vcc3v3_sys"; 65 regulator-always-on; 66 regulator-always-on; 66 regulator-boot-on; 67 regulator-boot-on; 67 regulator-min-microvolt = <330 68 regulator-min-microvolt = <3300000>; 68 regulator-max-microvolt = <330 69 regulator-max-microvolt = <3300000>; 69 vin-supply = <&vcc5v0_sys>; 70 vin-supply = <&vcc5v0_sys>; 70 }; 71 }; 71 72 72 vcc5v0_host0: vcc5v0_host1: vcc5v0-hos 73 vcc5v0_host0: vcc5v0_host1: vcc5v0-host { 73 compatible = "regulator-fixed" 74 compatible = "regulator-fixed"; 74 regulator-name = "vcc5v0_host" 75 regulator-name = "vcc5v0_host"; 75 regulator-boot-on; 76 regulator-boot-on; 76 regulator-always-on; 77 regulator-always-on; 77 regulator-min-microvolt = <550 78 regulator-min-microvolt = <5500000>; 78 regulator-max-microvolt = <550 79 regulator-max-microvolt = <5500000>; 79 vin-supply = <&vcc5v0_sys>; 80 vin-supply = <&vcc5v0_sys>; 80 }; 81 }; 81 82 82 vcc5v0_host3: vcc5v0-host3 { 83 vcc5v0_host3: vcc5v0-host3 { 83 compatible = "regulator-fixed" 84 compatible = "regulator-fixed"; 84 regulator-name = "vcc5v0_host3 85 regulator-name = "vcc5v0_host3"; 85 enable-active-high; 86 enable-active-high; 86 gpio = <&gpio2 RK_PA2 GPIO_ACT 87 gpio = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; 87 pinctrl-names = "default"; 88 pinctrl-names = "default"; 88 pinctrl-0 = <&vcc5v0_host3_en> 89 pinctrl-0 = <&vcc5v0_host3_en>; 89 regulator-always-on; 90 regulator-always-on; 90 vin-supply = <&vcc5v0_sys>; 91 vin-supply = <&vcc5v0_sys>; 91 }; 92 }; 92 93 93 vcc5v0_sys: vcc5v0-sys { 94 vcc5v0_sys: vcc5v0-sys { 94 compatible = "regulator-fixed" 95 compatible = "regulator-fixed"; 95 regulator-name = "vcc5v0_sys"; 96 regulator-name = "vcc5v0_sys"; 96 regulator-always-on; 97 regulator-always-on; 97 regulator-boot-on; 98 regulator-boot-on; 98 regulator-min-microvolt = <500 99 regulator-min-microvolt = <5000000>; 99 regulator-max-microvolt = <500 100 regulator-max-microvolt = <5000000>; 100 vin-supply = <&dc5v_adp>; 101 vin-supply = <&dc5v_adp>; 101 }; 102 }; 102 103 103 vdd_log: vdd-log { 104 vdd_log: vdd-log { 104 compatible = "pwm-regulator"; 105 compatible = "pwm-regulator"; 105 pwms = <&pwm2 0 25000 1>; 106 pwms = <&pwm2 0 25000 1>; 106 pwm-supply = <&vcc5v0_sys>; 107 pwm-supply = <&vcc5v0_sys>; 107 regulator-name = "vdd_log"; 108 regulator-name = "vdd_log"; 108 regulator-always-on; 109 regulator-always-on; 109 regulator-boot-on; 110 regulator-boot-on; 110 regulator-min-microvolt = <800 111 regulator-min-microvolt = <800000>; 111 regulator-max-microvolt = <140 112 regulator-max-microvolt = <1400000>; 112 }; 113 }; 113 }; 114 }; 114 115 115 &cpu_l0 { 116 &cpu_l0 { 116 cpu-supply = <&vdd_cpu_l>; 117 cpu-supply = <&vdd_cpu_l>; 117 }; 118 }; 118 119 119 &cpu_l1 { 120 &cpu_l1 { 120 cpu-supply = <&vdd_cpu_l>; 121 cpu-supply = <&vdd_cpu_l>; 121 }; 122 }; 122 123 123 &cpu_l2 { 124 &cpu_l2 { 124 cpu-supply = <&vdd_cpu_l>; 125 cpu-supply = <&vdd_cpu_l>; 125 }; 126 }; 126 127 127 &cpu_l3 { 128 &cpu_l3 { 128 cpu-supply = <&vdd_cpu_l>; 129 cpu-supply = <&vdd_cpu_l>; 129 }; 130 }; 130 131 131 &cpu_b0 { 132 &cpu_b0 { 132 cpu-supply = <&vdd_cpu_b>; 133 cpu-supply = <&vdd_cpu_b>; 133 }; 134 }; 134 135 135 &cpu_b1 { 136 &cpu_b1 { 136 cpu-supply = <&vdd_cpu_b>; 137 cpu-supply = <&vdd_cpu_b>; 137 }; 138 }; 138 139 139 &emmc_phy { 140 &emmc_phy { 140 status = "okay"; 141 status = "okay"; 141 }; 142 }; 142 143 143 &gmac { 144 &gmac { 144 assigned-clocks = <&cru SCLK_RMII_SRC> 145 assigned-clocks = <&cru SCLK_RMII_SRC>; 145 assigned-clock-parents = <&clkin_gmac> 146 assigned-clock-parents = <&clkin_gmac>; 146 clock_in_out = "input"; 147 clock_in_out = "input"; 147 phy-supply = <&vcc3v3_lan>; 148 phy-supply = <&vcc3v3_lan>; 148 phy-mode = "rgmii"; 149 phy-mode = "rgmii"; 149 pinctrl-names = "default"; 150 pinctrl-names = "default"; 150 pinctrl-0 = <&rgmii_pins>; 151 pinctrl-0 = <&rgmii_pins>; 151 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ 152 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 152 snps,reset-active-low; 153 snps,reset-active-low; 153 snps,reset-delays-us = <0 10000 50000> 154 snps,reset-delays-us = <0 10000 50000>; 154 tx_delay = <0x28>; 155 tx_delay = <0x28>; 155 rx_delay = <0x11>; 156 rx_delay = <0x11>; 156 status = "okay"; 157 status = "okay"; 157 }; 158 }; 158 159 159 &gpu { 160 &gpu { 160 mali-supply = <&vdd_gpu>; 161 mali-supply = <&vdd_gpu>; 161 status = "okay"; 162 status = "okay"; 162 }; 163 }; 163 164 164 &hdmi { 165 &hdmi { 165 ddc-i2c-bus = <&i2c7>; 166 ddc-i2c-bus = <&i2c7>; 166 pinctrl-names = "default"; 167 pinctrl-names = "default"; 167 pinctrl-0 = <&hdmi_cec>; 168 pinctrl-0 = <&hdmi_cec>; 168 status = "okay"; 169 status = "okay"; 169 }; 170 }; 170 171 171 &hdmi_sound { 172 &hdmi_sound { 172 status = "okay"; 173 status = "okay"; 173 }; 174 }; 174 175 175 &i2c0 { 176 &i2c0 { 176 clock-frequency = <400000>; 177 clock-frequency = <400000>; 177 i2c-scl-rising-time-ns = <168>; 178 i2c-scl-rising-time-ns = <168>; 178 i2c-scl-falling-time-ns = <4>; 179 i2c-scl-falling-time-ns = <4>; 179 status = "okay"; 180 status = "okay"; 180 181 181 rk808: pmic@1b { 182 rk808: pmic@1b { 182 compatible = "rockchip,rk808"; 183 compatible = "rockchip,rk808"; 183 reg = <0x1b>; 184 reg = <0x1b>; 184 interrupt-parent = <&gpio1>; 185 interrupt-parent = <&gpio1>; 185 interrupts = <21 IRQ_TYPE_LEVE 186 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 186 #clock-cells = <1>; 187 #clock-cells = <1>; 187 clock-output-names = "xin32k", 188 clock-output-names = "xin32k", "rk808-clkout2"; 188 pinctrl-names = "default"; 189 pinctrl-names = "default"; 189 pinctrl-0 = <&pmic_int_l>; 190 pinctrl-0 = <&pmic_int_l>; 190 rockchip,system-power-controll 191 rockchip,system-power-controller; 191 wakeup-source; 192 wakeup-source; 192 193 193 vcc1-supply = <&vcc5v0_sys>; 194 vcc1-supply = <&vcc5v0_sys>; 194 vcc2-supply = <&vcc5v0_sys>; 195 vcc2-supply = <&vcc5v0_sys>; 195 vcc3-supply = <&vcc5v0_sys>; 196 vcc3-supply = <&vcc5v0_sys>; 196 vcc4-supply = <&vcc5v0_sys>; 197 vcc4-supply = <&vcc5v0_sys>; 197 vcc6-supply = <&vcc5v0_sys>; 198 vcc6-supply = <&vcc5v0_sys>; 198 vcc7-supply = <&vcc5v0_sys>; 199 vcc7-supply = <&vcc5v0_sys>; 199 vcc8-supply = <&vcc3v3_sys>; 200 vcc8-supply = <&vcc3v3_sys>; 200 vcc9-supply = <&vcc5v0_sys>; 201 vcc9-supply = <&vcc5v0_sys>; 201 vcc10-supply = <&vcc5v0_sys>; 202 vcc10-supply = <&vcc5v0_sys>; 202 vcc11-supply = <&vcc5v0_sys>; 203 vcc11-supply = <&vcc5v0_sys>; 203 vcc12-supply = <&vcc3v3_sys>; 204 vcc12-supply = <&vcc3v3_sys>; 204 vddio-supply = <&vcc_1v8>; 205 vddio-supply = <&vcc_1v8>; 205 206 206 regulators { 207 regulators { 207 vdd_center: DCDC_REG1 208 vdd_center: DCDC_REG1 { 208 regulator-name 209 regulator-name = "vdd_center"; 209 regulator-alwa 210 regulator-always-on; 210 regulator-boot 211 regulator-boot-on; 211 regulator-min- 212 regulator-min-microvolt = <750000>; 212 regulator-max- 213 regulator-max-microvolt = <1350000>; 213 regulator-ramp 214 regulator-ramp-delay = <6001>; 214 regulator-stat 215 regulator-state-mem { 215 regula 216 regulator-off-in-suspend; 216 }; 217 }; 217 }; 218 }; 218 219 219 vdd_cpu_l: DCDC_REG2 { 220 vdd_cpu_l: DCDC_REG2 { 220 regulator-name 221 regulator-name = "vdd_cpu_l"; 221 regulator-alwa 222 regulator-always-on; 222 regulator-boot 223 regulator-boot-on; 223 regulator-min- 224 regulator-min-microvolt = <750000>; 224 regulator-max- 225 regulator-max-microvolt = <1350000>; 225 regulator-ramp 226 regulator-ramp-delay = <6001>; 226 regulator-stat 227 regulator-state-mem { 227 regula 228 regulator-off-in-suspend; 228 }; 229 }; 229 }; 230 }; 230 231 231 vcc_ddr: DCDC_REG3 { 232 vcc_ddr: DCDC_REG3 { 232 regulator-name 233 regulator-name = "vcc_ddr"; 233 regulator-alwa 234 regulator-always-on; 234 regulator-boot 235 regulator-boot-on; 235 regulator-stat 236 regulator-state-mem { 236 regula 237 regulator-on-in-suspend; 237 }; 238 }; 238 }; 239 }; 239 240 240 vcc_1v8: DCDC_REG4 { 241 vcc_1v8: DCDC_REG4 { 241 regulator-name 242 regulator-name = "vcc_1v8"; 242 regulator-alwa 243 regulator-always-on; 243 regulator-boot 244 regulator-boot-on; 244 regulator-min- 245 regulator-min-microvolt = <1800000>; 245 regulator-max- 246 regulator-max-microvolt = <1800000>; 246 regulator-stat 247 regulator-state-mem { 247 regula 248 regulator-on-in-suspend; 248 regula 249 regulator-suspend-microvolt = <1800000>; 249 }; 250 }; 250 }; 251 }; 251 252 252 vcc1v8_dvp: LDO_REG1 { 253 vcc1v8_dvp: LDO_REG1 { 253 regulator-name 254 regulator-name = "vcc1v8_dvp"; 254 regulator-alwa 255 regulator-always-on; 255 regulator-boot 256 regulator-boot-on; 256 regulator-min- 257 regulator-min-microvolt = <1800000>; 257 regulator-max- 258 regulator-max-microvolt = <1800000>; 258 regulator-stat 259 regulator-state-mem { 259 regula 260 regulator-off-in-suspend; 260 }; 261 }; 261 }; 262 }; 262 263 263 vcc1v8_hdmi: LDO_REG2 264 vcc1v8_hdmi: LDO_REG2 { 264 regulator-name 265 regulator-name = "vcc1v8_hdmi"; 265 regulator-alwa 266 regulator-always-on; 266 regulator-boot 267 regulator-boot-on; 267 regulator-min- 268 regulator-min-microvolt = <1800000>; 268 regulator-max- 269 regulator-max-microvolt = <1800000>; 269 regulator-stat 270 regulator-state-mem { 270 regula 271 regulator-off-in-suspend; 271 }; 272 }; 272 }; 273 }; 273 274 274 vcca_1v8: LDO_REG3 { 275 vcca_1v8: LDO_REG3 { 275 regulator-name 276 regulator-name = "vcca_1v8"; 276 regulator-alwa 277 regulator-always-on; 277 regulator-boot 278 regulator-boot-on; 278 regulator-min- 279 regulator-min-microvolt = <1800000>; 279 regulator-max- 280 regulator-max-microvolt = <1800000>; 280 regulator-stat 281 regulator-state-mem { 281 regula 282 regulator-on-in-suspend; 282 regula 283 regulator-suspend-microvolt = <1800000>; 283 }; 284 }; 284 }; 285 }; 285 286 286 vccio_sd: LDO_REG4 { 287 vccio_sd: LDO_REG4 { 287 regulator-name 288 regulator-name = "vccio_sd"; 288 regulator-alwa 289 regulator-always-on; 289 regulator-boot 290 regulator-boot-on; 290 regulator-min- 291 regulator-min-microvolt = <3000000>; 291 regulator-max- 292 regulator-max-microvolt = <3000000>; 292 regulator-stat 293 regulator-state-mem { 293 regula 294 regulator-on-in-suspend; 294 regula 295 regulator-suspend-microvolt = <3000000>; 295 }; 296 }; 296 }; 297 }; 297 298 298 vcca3v0_codec: LDO_REG 299 vcca3v0_codec: LDO_REG5 { 299 regulator-name 300 regulator-name = "vcca3v0_codec"; 300 regulator-alwa 301 regulator-always-on; 301 regulator-boot 302 regulator-boot-on; 302 regulator-min- 303 regulator-min-microvolt = <3000000>; 303 regulator-max- 304 regulator-max-microvolt = <3000000>; 304 regulator-stat 305 regulator-state-mem { 305 regula 306 regulator-off-in-suspend; 306 }; 307 }; 307 }; 308 }; 308 309 309 vcc_1v5: LDO_REG6 { 310 vcc_1v5: LDO_REG6 { 310 regulator-name 311 regulator-name = "vcc_1v5"; 311 regulator-alwa 312 regulator-always-on; 312 regulator-boot 313 regulator-boot-on; 313 regulator-min- 314 regulator-min-microvolt = <1500000>; 314 regulator-max- 315 regulator-max-microvolt = <1500000>; 315 regulator-stat 316 regulator-state-mem { 316 regula 317 regulator-on-in-suspend; 317 regula 318 regulator-suspend-microvolt = <1500000>; 318 }; 319 }; 319 }; 320 }; 320 321 321 vcc0v9_hdmi: LDO_REG7 322 vcc0v9_hdmi: LDO_REG7 { 322 regulator-name 323 regulator-name = "vcc0v9_hdmi"; 323 regulator-alwa 324 regulator-always-on; 324 regulator-boot 325 regulator-boot-on; 325 regulator-min- 326 regulator-min-microvolt = <900000>; 326 regulator-max- 327 regulator-max-microvolt = <900000>; 327 regulator-stat 328 regulator-state-mem { 328 regula 329 regulator-off-in-suspend; 329 }; 330 }; 330 }; 331 }; 331 332 332 vcc_3v0: LDO_REG8 { 333 vcc_3v0: LDO_REG8 { 333 regulator-name 334 regulator-name = "vcc_3v0"; 334 regulator-alwa 335 regulator-always-on; 335 regulator-boot 336 regulator-boot-on; 336 regulator-min- 337 regulator-min-microvolt = <3000000>; 337 regulator-max- 338 regulator-max-microvolt = <3000000>; 338 regulator-stat 339 regulator-state-mem { 339 regula 340 regulator-on-in-suspend; 340 regula 341 regulator-suspend-microvolt = <3000000>; 341 }; 342 }; 342 }; 343 }; 343 }; 344 }; 344 }; 345 }; 345 346 346 vdd_cpu_b: regulator@40 { 347 vdd_cpu_b: regulator@40 { 347 compatible = "silergy,syr827"; 348 compatible = "silergy,syr827"; 348 reg = <0x40>; 349 reg = <0x40>; 349 fcs,suspend-voltage-selector = 350 fcs,suspend-voltage-selector = <1>; 350 pinctrl-names = "default"; 351 pinctrl-names = "default"; 351 pinctrl-0 = <&vsel1_pin>; 352 pinctrl-0 = <&vsel1_pin>; 352 regulator-name = "vdd_cpu_b"; 353 regulator-name = "vdd_cpu_b"; 353 regulator-min-microvolt = <712 354 regulator-min-microvolt = <712500>; 354 regulator-max-microvolt = <150 355 regulator-max-microvolt = <1500000>; 355 regulator-ramp-delay = <1000>; 356 regulator-ramp-delay = <1000>; 356 regulator-always-on; 357 regulator-always-on; 357 regulator-boot-on; 358 regulator-boot-on; 358 vin-supply = <&vcc5v0_sys>; 359 vin-supply = <&vcc5v0_sys>; 359 360 360 regulator-state-mem { 361 regulator-state-mem { 361 regulator-off-in-suspe 362 regulator-off-in-suspend; 362 }; 363 }; 363 }; 364 }; 364 365 365 vdd_gpu: regulator@41 { 366 vdd_gpu: regulator@41 { 366 compatible = "silergy,syr828"; 367 compatible = "silergy,syr828"; 367 reg = <0x41>; 368 reg = <0x41>; 368 fcs,suspend-voltage-selector = 369 fcs,suspend-voltage-selector = <1>; 369 pinctrl-names = "default"; 370 pinctrl-names = "default"; 370 pinctrl-0 = <&vsel2_pin>; 371 pinctrl-0 = <&vsel2_pin>; 371 regulator-name = "vdd_gpu"; 372 regulator-name = "vdd_gpu"; 372 regulator-min-microvolt = <712 373 regulator-min-microvolt = <712500>; 373 regulator-max-microvolt = <150 374 regulator-max-microvolt = <1500000>; 374 regulator-ramp-delay = <1000>; 375 regulator-ramp-delay = <1000>; 375 regulator-always-on; 376 regulator-always-on; 376 regulator-boot-on; 377 regulator-boot-on; 377 vin-supply = <&vcc5v0_sys>; 378 vin-supply = <&vcc5v0_sys>; 378 379 379 regulator-state-mem { 380 regulator-state-mem { 380 regulator-off-in-suspe 381 regulator-off-in-suspend; 381 }; 382 }; 382 }; 383 }; 383 }; 384 }; 384 385 385 &i2c1 { 386 &i2c1 { 386 i2c-scl-rising-time-ns = <300>; 387 i2c-scl-rising-time-ns = <300>; 387 i2c-scl-falling-time-ns = <15>; 388 i2c-scl-falling-time-ns = <15>; 388 status = "okay"; 389 status = "okay"; 389 }; 390 }; 390 391 391 &i2c3 { 392 &i2c3 { 392 i2c-scl-rising-time-ns = <450>; 393 i2c-scl-rising-time-ns = <450>; 393 i2c-scl-falling-time-ns = <15>; 394 i2c-scl-falling-time-ns = <15>; 394 status = "okay"; 395 status = "okay"; 395 }; 396 }; 396 397 397 &i2c4 { 398 &i2c4 { 398 i2c-scl-rising-time-ns = <600>; 399 i2c-scl-rising-time-ns = <600>; 399 i2c-scl-falling-time-ns = <20>; 400 i2c-scl-falling-time-ns = <20>; 400 status = "okay"; 401 status = "okay"; 401 }; 402 }; 402 403 403 &i2c7 { 404 &i2c7 { 404 status = "okay"; 405 status = "okay"; 405 }; 406 }; 406 407 407 &i2s0 { 408 &i2s0 { 408 rockchip,playback-channels = <8>; 409 rockchip,playback-channels = <8>; 409 rockchip,capture-channels = <8>; 410 rockchip,capture-channels = <8>; 410 status = "okay"; 411 status = "okay"; 411 }; 412 }; 412 413 413 &i2s1 { 414 &i2s1 { 414 rockchip,playback-channels = <2>; 415 rockchip,playback-channels = <2>; 415 rockchip,capture-channels = <2>; 416 rockchip,capture-channels = <2>; 416 status = "okay"; 417 status = "okay"; 417 }; 418 }; 418 419 419 &i2s2 { 420 &i2s2 { 420 status = "okay"; 421 status = "okay"; 421 }; 422 }; 422 423 423 &io_domains { 424 &io_domains { 424 status = "okay"; 425 status = "okay"; 425 426 426 bt656-supply = <&vcc1v8_dvp>; 427 bt656-supply = <&vcc1v8_dvp>; 427 audio-supply = <&vcc_1v8>; 428 audio-supply = <&vcc_1v8>; 428 sdmmc-supply = <&vccio_sd>; 429 sdmmc-supply = <&vccio_sd>; 429 gpio1830-supply = <&vcc_3v0>; 430 gpio1830-supply = <&vcc_3v0>; 430 }; 431 }; 431 432 432 &pmu_io_domains { 433 &pmu_io_domains { 433 status = "okay"; 434 status = "okay"; 434 pmu1830-supply = <&vcc_3v0>; 435 pmu1830-supply = <&vcc_3v0>; 435 }; 436 }; 436 437 437 &pinctrl { 438 &pinctrl { 438 bt { 439 bt { 439 bt_reg_on_h: bt-reg-on-h { 440 bt_reg_on_h: bt-reg-on-h { 440 rockchip,pins = <0 RK_ 441 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 441 }; 442 }; 442 443 443 bt_host_wake_l: bt-host-wake-l 444 bt_host_wake_l: bt-host-wake-l { 444 rockchip,pins = <0 RK_ 445 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 445 }; 446 }; 446 447 447 bt_wake_l: bt-wake-l { 448 bt_wake_l: bt-wake-l { 448 rockchip,pins = <2 RK_ 449 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 449 }; 450 }; 450 }; 451 }; 451 452 452 pmic { 453 pmic { 453 pmic_int_l: pmic-int-l { 454 pmic_int_l: pmic-int-l { 454 rockchip,pins = <1 RK_ 455 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 455 }; 456 }; 456 457 457 vsel1_pin: vsel1-pin { 458 vsel1_pin: vsel1-pin { 458 rockchip,pins = <1 RK_ 459 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 459 }; 460 }; 460 461 461 vsel2_pin: vsel2-pin { 462 vsel2_pin: vsel2-pin { 462 rockchip,pins = <1 RK_ 463 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 463 }; 464 }; 464 }; 465 }; 465 466 466 usb2 { 467 usb2 { 467 vcc5v0_host3_en: vcc5v0-host3- 468 vcc5v0_host3_en: vcc5v0-host3-en { 468 rockchip,pins = <2 RK_ 469 rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 469 }; 470 }; 470 }; 471 }; 471 472 472 wifi { 473 wifi { 473 wifi_reg_on_h: wifi-reg-on-h { 474 wifi_reg_on_h: wifi-reg-on-h { 474 rockchip,pins = 475 rockchip,pins = 475 <0 RK_PB2 RK_F 476 <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 476 }; 477 }; 477 478 478 wifi_host_wake_l: wifi-host-wa 479 wifi_host_wake_l: wifi-host-wake-l { 479 rockchip,pins = <0 RK_ 480 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 480 }; 481 }; 481 }; 482 }; 482 }; 483 }; 483 484 484 &pwm2 { 485 &pwm2 { 485 status = "okay"; 486 status = "okay"; 486 }; 487 }; 487 488 488 &saradc { 489 &saradc { 489 status = "okay"; 490 status = "okay"; 490 491 491 vref-supply = <&vcc_1v8>; 492 vref-supply = <&vcc_1v8>; 492 }; 493 }; 493 494 494 &sdio0 { 495 &sdio0 { 495 #address-cells = <1>; 496 #address-cells = <1>; 496 #size-cells = <0>; 497 #size-cells = <0>; 497 bus-width = <4>; 498 bus-width = <4>; 498 clock-frequency = <50000000>; 499 clock-frequency = <50000000>; 499 cap-sdio-irq; 500 cap-sdio-irq; 500 cap-sd-highspeed; 501 cap-sd-highspeed; 501 keep-power-in-suspend; 502 keep-power-in-suspend; 502 mmc-pwrseq = <&sdio_pwrseq>; 503 mmc-pwrseq = <&sdio_pwrseq>; 503 non-removable; 504 non-removable; 504 pinctrl-names = "default"; 505 pinctrl-names = "default"; 505 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s 506 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 506 sd-uhs-sdr104; 507 sd-uhs-sdr104; 507 status = "okay"; 508 status = "okay"; 508 509 509 brcmf: wifi@1 { 510 brcmf: wifi@1 { 510 compatible = "brcm,bcm4329-fma 511 compatible = "brcm,bcm4329-fmac"; 511 reg = <1>; 512 reg = <1>; 512 interrupt-parent = <&gpio0>; 513 interrupt-parent = <&gpio0>; 513 interrupts = <RK_PA3 IRQ_TYPE_ 514 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; 514 interrupt-names = "host-wake"; 515 interrupt-names = "host-wake"; 515 pinctrl-names = "default"; 516 pinctrl-names = "default"; 516 pinctrl-0 = <&wifi_host_wake_l 517 pinctrl-0 = <&wifi_host_wake_l>; 517 }; 518 }; 518 }; 519 }; 519 520 520 &sdhci { 521 &sdhci { 521 bus-width = <8>; 522 bus-width = <8>; 522 mmc-hs400-1_8v; 523 mmc-hs400-1_8v; 523 mmc-hs400-enhanced-strobe; 524 mmc-hs400-enhanced-strobe; 524 non-removable; 525 non-removable; 525 status = "okay"; 526 status = "okay"; 526 }; 527 }; 527 528 528 &sdmmc { 529 &sdmmc { 529 bus-width = <4>; 530 bus-width = <4>; 530 cap-mmc-highspeed; 531 cap-mmc-highspeed; 531 cap-sd-highspeed; 532 cap-sd-highspeed; 532 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_ 533 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 533 disable-wp; 534 disable-wp; 534 max-frequency = <150000000>; 535 max-frequency = <150000000>; 535 pinctrl-names = "default"; 536 pinctrl-names = "default"; 536 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdm 537 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; 537 status = "okay"; 538 status = "okay"; 538 }; 539 }; 539 540 540 &tcphy0 { 541 &tcphy0 { 541 status = "okay"; 542 status = "okay"; 542 }; 543 }; 543 544 544 &tcphy1 { 545 &tcphy1 { 545 status = "okay"; 546 status = "okay"; 546 }; 547 }; 547 548 548 &tsadc { 549 &tsadc { 549 status = "okay"; 550 status = "okay"; 550 551 551 /* tshut mode 0:CRU 1:GPIO */ 552 /* tshut mode 0:CRU 1:GPIO */ 552 rockchip,hw-tshut-mode = <1>; 553 rockchip,hw-tshut-mode = <1>; 553 /* tshut polarity 0:LOW 1:HIGH */ 554 /* tshut polarity 0:LOW 1:HIGH */ 554 rockchip,hw-tshut-polarity = <1>; 555 rockchip,hw-tshut-polarity = <1>; 555 }; 556 }; 556 557 557 &u2phy0 { 558 &u2phy0 { 558 status = "okay"; 559 status = "okay"; 559 560 560 u2phy0_otg: otg-port { 561 u2phy0_otg: otg-port { 561 status = "okay"; 562 status = "okay"; 562 }; 563 }; 563 564 564 u2phy0_host: host-port { 565 u2phy0_host: host-port { 565 phy-supply = <&vcc5v0_host0>; 566 phy-supply = <&vcc5v0_host0>; 566 status = "okay"; 567 status = "okay"; 567 }; 568 }; 568 }; 569 }; 569 570 570 &u2phy1 { 571 &u2phy1 { 571 status = "okay"; 572 status = "okay"; 572 573 573 u2phy1_otg: otg-port { 574 u2phy1_otg: otg-port { 574 status = "okay"; 575 status = "okay"; 575 }; 576 }; 576 577 577 u2phy1_host: host-port { 578 u2phy1_host: host-port { 578 phy-supply = <&vcc5v0_host1>; 579 phy-supply = <&vcc5v0_host1>; 579 status = "okay"; 580 status = "okay"; 580 }; 581 }; 581 }; 582 }; 582 583 583 &uart0 { 584 &uart0 { 584 pinctrl-names = "default"; 585 pinctrl-names = "default"; 585 pinctrl-0 = <&uart0_xfer &uart0_cts &u 586 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 586 status = "okay"; 587 status = "okay"; 587 588 588 bluetooth { 589 bluetooth { 589 compatible = "brcm,bcm43438-bt 590 compatible = "brcm,bcm43438-bt"; 590 clocks = <&rk808 1>; 591 clocks = <&rk808 1>; 591 clock-names = "ext_clock"; 592 clock-names = "ext_clock"; 592 device-wakeup-gpios = <&gpio2 593 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 593 host-wakeup-gpios = <&gpio0 RK 594 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 594 shutdown-gpios = <&gpio0 RK_PB 595 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 595 pinctrl-names = "default"; 596 pinctrl-names = "default"; 596 pinctrl-0 = <&bt_host_wake_l & 597 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>; 597 }; 598 }; 598 }; 599 }; 599 600 600 &uart2 { 601 &uart2 { 601 status = "okay"; 602 status = "okay"; 602 }; 603 }; 603 604 604 &usb_host0_ehci { 605 &usb_host0_ehci { 605 status = "okay"; 606 status = "okay"; 606 }; 607 }; 607 608 608 &usb_host0_ohci { 609 &usb_host0_ohci { 609 status = "okay"; 610 status = "okay"; 610 }; 611 }; 611 612 612 &usb_host1_ehci { 613 &usb_host1_ehci { 613 status = "okay"; 614 status = "okay"; 614 }; 615 }; 615 616 616 &usb_host1_ohci { 617 &usb_host1_ohci { 617 status = "okay"; 618 status = "okay"; 618 }; 619 }; 619 620 620 &usbdrd3_0 { 621 &usbdrd3_0 { 621 status = "okay"; 622 status = "okay"; 622 }; 623 }; 623 624 624 &usbdrd_dwc3_0 { 625 &usbdrd_dwc3_0 { 625 status = "okay"; 626 status = "okay"; 626 dr_mode = "otg"; 627 dr_mode = "otg"; 627 }; 628 }; 628 629 629 &usbdrd3_1 { 630 &usbdrd3_1 { 630 status = "okay"; 631 status = "okay"; 631 }; 632 }; 632 633 633 &usbdrd_dwc3_1 { 634 &usbdrd_dwc3_1 { 634 status = "okay"; 635 status = "okay"; 635 dr_mode = "host"; 636 dr_mode = "host"; 636 }; 637 }; 637 638 638 &vopb { 639 &vopb { 639 status = "okay"; 640 status = "okay"; 640 }; 641 }; 641 642 642 &vopb_mmu { 643 &vopb_mmu { 643 status = "okay"; 644 status = "okay"; 644 }; 645 }; 645 646 646 &vopl { 647 &vopl { 647 status = "okay"; 648 status = "okay"; 648 }; 649 }; 649 650 650 &vopl_mmu { 651 &vopl_mmu { 651 status = "okay"; 652 status = "okay"; 652 }; 653 };
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