1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * RK3399-based FriendlyElec boards device tre
4 *
5 * Copyright (c) 2016 Fuzhou Rockchip Electron
6 *
7 * Copyright (c) 2018 FriendlyElec Computer Te
8 * (http://www.friendlyarm.com)
9 *
10 * Copyright (c) 2018 Collabora Ltd.
11 * Copyright (c) 2019 Arm Ltd.
12 */
13
14 /dts-v1/;
15 #include <dt-bindings/input/linux-event-codes.
16 #include "rk3399.dtsi"
17
18 / {
19 aliases {
20 ethernet0 = &gmac;
21 mmc0 = &sdio0;
22 mmc1 = &sdmmc;
23 mmc2 = &sdhci;
24 };
25
26 chosen {
27 stdout-path = "serial2:1500000
28 };
29
30 clkin_gmac: external-gmac-clock {
31 compatible = "fixed-clock";
32 clock-frequency = <125000000>;
33 clock-output-names = "clkin_gm
34 #clock-cells = <0>;
35 };
36
37 vcc3v3_sys: vcc3v3-sys {
38 compatible = "regulator-fixed"
39 regulator-always-on;
40 regulator-boot-on;
41 regulator-min-microvolt = <330
42 regulator-max-microvolt = <330
43 regulator-name = "vcc3v3_sys";
44 };
45
46 vcc5v0_sys: vcc5v0-sys {
47 compatible = "regulator-fixed"
48 regulator-always-on;
49 regulator-boot-on;
50 regulator-min-microvolt = <500
51 regulator-max-microvolt = <500
52 regulator-name = "vcc5v0_sys";
53 vin-supply = <&vdd_5v>;
54 };
55
56 /* switched by pmic_sleep */
57 vcc1v8_s3: vcc1v8-s3 {
58 compatible = "regulator-fixed"
59 regulator-always-on;
60 regulator-boot-on;
61 regulator-min-microvolt = <180
62 regulator-max-microvolt = <180
63 regulator-name = "vcc1v8_s3";
64 vin-supply = <&vcc_1v8>;
65 };
66
67 vcc3v0_sd: vcc3v0-sd {
68 compatible = "regulator-fixed"
69 enable-active-high;
70 gpio = <&gpio0 RK_PA1 GPIO_ACT
71 pinctrl-names = "default";
72 pinctrl-0 = <&sdmmc0_pwr_h>;
73 regulator-always-on;
74 regulator-min-microvolt = <300
75 regulator-max-microvolt = <300
76 regulator-name = "vcc3v0_sd";
77 vin-supply = <&vcc3v3_sys>;
78 };
79
80 /*
81 * Really, this is supplied by vcc_1v8
82 * drives the enable pin, but we can't
83 */
84 vcca0v9_s3: vcca0v9-s3 {
85 compatible = "regulator-fixed"
86 regulator-min-microvolt = <900
87 regulator-max-microvolt = <900
88 regulator-name = "vcca0v9_s3";
89 vin-supply = <&vcc1v8_s3>;
90 };
91
92 /* As above, actually supplied by vcc3
93 vcca1v8_s3: vcca1v8-s3 {
94 compatible = "regulator-fixed"
95 regulator-min-microvolt = <180
96 regulator-max-microvolt = <180
97 regulator-name = "vcca1v8_s3";
98 vin-supply = <&vcc1v8_s3>;
99 };
100
101 vbus_typec: vbus-typec {
102 compatible = "regulator-fixed"
103 regulator-min-microvolt = <500
104 regulator-max-microvolt = <500
105 regulator-name = "vbus_typec";
106 };
107
108 gpio-keys {
109 compatible = "gpio-keys";
110 autorepeat;
111 pinctrl-names = "default";
112 pinctrl-0 = <&power_key>;
113
114 key-power {
115 debounce-interval = <1
116 gpios = <&gpio0 RK_PA5
117 label = "GPIO Key Powe
118 linux,code = <KEY_POWE
119 wakeup-source;
120 };
121 };
122
123 leds: gpio-leds {
124 compatible = "gpio-leds";
125 pinctrl-names = "default";
126 pinctrl-0 = <&status_led_pin>;
127
128 status_led: led-0 {
129 gpios = <&gpio0 RK_PB5
130 label = "status_led";
131 linux,default-trigger
132 };
133 };
134
135 sdio_pwrseq: sdio-pwrseq {
136 compatible = "mmc-pwrseq-simpl
137 clocks = <&rk808 1>;
138 clock-names = "ext_clock";
139 pinctrl-names = "default";
140 pinctrl-0 = <&wifi_reg_on_h>;
141 reset-gpios = <&gpio0 RK_PB2 G
142 };
143 };
144
145 &cpu_b0 {
146 cpu-supply = <&vdd_cpu_b>;
147 };
148
149 &cpu_b1 {
150 cpu-supply = <&vdd_cpu_b>;
151 };
152
153 &cpu_l0 {
154 cpu-supply = <&vdd_cpu_l>;
155 };
156
157 &cpu_l1 {
158 cpu-supply = <&vdd_cpu_l>;
159 };
160
161 &cpu_l2 {
162 cpu-supply = <&vdd_cpu_l>;
163 };
164
165 &cpu_l3 {
166 cpu-supply = <&vdd_cpu_l>;
167 };
168
169 &emmc_phy {
170 rockchip,enable-strobe-pulldown;
171 status = "okay";
172 };
173
174 &gmac {
175 assigned-clock-parents = <&clkin_gmac>
176 assigned-clocks = <&cru SCLK_RMII_SRC>
177 clock_in_out = "input";
178 pinctrl-names = "default";
179 pinctrl-0 = <&rgmii_pins>, <&phy_intb>
180 phy-handle = <&rtl8211e>;
181 phy-mode = "rgmii";
182 phy-supply = <&vcc3v3_s3>;
183 tx_delay = <0x28>;
184 rx_delay = <0x11>;
185 status = "okay";
186
187 mdio {
188 compatible = "snps,dwmac-mdio"
189 #address-cells = <1>;
190 #size-cells = <0>;
191
192 rtl8211e: ethernet-phy@1 {
193 reg = <1>;
194 interrupt-parent = <&g
195 interrupts = <RK_PB2 I
196 reset-assert-us = <100
197 reset-deassert-us = <3
198 reset-gpios = <&gpio3
199 };
200 };
201 };
202
203 &gpu {
204 mali-supply = <&vdd_gpu>;
205 status = "okay";
206 };
207
208 &hdmi {
209 ddc-i2c-bus = <&i2c7>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&hdmi_cec>;
212 status = "okay";
213 };
214
215 &hdmi_sound {
216 status = "okay";
217 };
218
219 &i2c0 {
220 clock-frequency = <400000>;
221 i2c-scl-rising-time-ns = <160>;
222 i2c-scl-falling-time-ns = <30>;
223 status = "okay";
224
225 vdd_cpu_b: regulator@40 {
226 compatible = "silergy,syr827";
227 reg = <0x40>;
228 fcs,suspend-voltage-selector =
229 pinctrl-names = "default";
230 pinctrl-0 = <&cpu_b_sleep>;
231 regulator-always-on;
232 regulator-boot-on;
233 regulator-min-microvolt = <712
234 regulator-max-microvolt = <150
235 regulator-name = "vdd_cpu_b";
236 regulator-ramp-delay = <1000>;
237 vin-supply = <&vcc3v3_sys>;
238
239 regulator-state-mem {
240 regulator-off-in-suspe
241 };
242 };
243
244 vdd_gpu: regulator@41 {
245 compatible = "silergy,syr828";
246 reg = <0x41>;
247 fcs,suspend-voltage-selector =
248 pinctrl-names = "default";
249 pinctrl-0 = <&gpu_sleep>;
250 regulator-always-on;
251 regulator-boot-on;
252 regulator-min-microvolt = <712
253 regulator-max-microvolt = <150
254 regulator-name = "vdd_gpu";
255 regulator-ramp-delay = <1000>;
256 vin-supply = <&vcc3v3_sys>;
257
258 regulator-state-mem {
259 regulator-off-in-suspe
260 };
261 };
262
263 rk808: pmic@1b {
264 compatible = "rockchip,rk808";
265 reg = <0x1b>;
266 clock-output-names = "xin32k",
267 #clock-cells = <1>;
268 interrupt-parent = <&gpio1>;
269 interrupts = <21 IRQ_TYPE_LEVE
270 pinctrl-names = "default";
271 pinctrl-0 = <&pmic_int_l>, <&a
272 rockchip,system-power-controll
273 wakeup-source;
274
275 vcc1-supply = <&vcc3v3_sys>;
276 vcc2-supply = <&vcc3v3_sys>;
277 vcc3-supply = <&vcc3v3_sys>;
278 vcc4-supply = <&vcc3v3_sys>;
279 vcc6-supply = <&vcc3v3_sys>;
280 vcc7-supply = <&vcc3v3_sys>;
281 vcc8-supply = <&vcc3v3_sys>;
282 vcc9-supply = <&vcc3v3_sys>;
283 vcc10-supply = <&vcc3v3_sys>;
284 vcc11-supply = <&vcc3v3_sys>;
285 vcc12-supply = <&vcc3v3_sys>;
286 vddio-supply = <&vcc_3v0>;
287
288 regulators {
289 vdd_center: DCDC_REG1
290 regulator-alwa
291 regulator-boot
292 regulator-min-
293 regulator-max-
294 regulator-name
295 regulator-ramp
296
297 regulator-stat
298 regula
299 };
300 };
301
302 vdd_cpu_l: DCDC_REG2 {
303 regulator-alwa
304 regulator-boot
305 regulator-min-
306 regulator-max-
307 regulator-name
308 regulator-ramp
309
310 regulator-stat
311 regula
312 };
313 };
314
315 vcc_ddr: DCDC_REG3 {
316 regulator-alwa
317 regulator-boot
318 regulator-name
319
320 regulator-stat
321 regula
322 };
323 };
324
325 vcc_1v8: DCDC_REG4 {
326 regulator-alwa
327 regulator-boot
328 regulator-min-
329 regulator-max-
330 regulator-name
331
332 regulator-stat
333 regula
334 regula
335 };
336 };
337
338 vcc1v8_cam: LDO_REG1 {
339 regulator-alwa
340 regulator-boot
341 regulator-min-
342 regulator-max-
343 regulator-name
344
345 regulator-stat
346 regula
347 };
348 };
349
350 vcc3v0_touch: LDO_REG2
351 regulator-alwa
352 regulator-boot
353 regulator-min-
354 regulator-max-
355 regulator-name
356
357 regulator-stat
358 regula
359 };
360 };
361
362 vcc1v8_pmupll: LDO_REG
363 regulator-alwa
364 regulator-boot
365 regulator-min-
366 regulator-max-
367 regulator-name
368
369 regulator-stat
370 regula
371 regula
372 };
373 };
374
375 vcc_sdio: LDO_REG4 {
376 regulator-alwa
377 regulator-boot
378 regulator-min-
379 regulator-max-
380 regulator-name
381
382 regulator-stat
383 regula
384 regula
385 };
386 };
387
388 vcca3v0_codec: LDO_REG
389 regulator-alwa
390 regulator-boot
391 regulator-min-
392 regulator-max-
393 regulator-name
394
395 regulator-stat
396 regula
397 };
398 };
399
400 vcc_1v5: LDO_REG6 {
401 regulator-alwa
402 regulator-boot
403 regulator-min-
404 regulator-max-
405 regulator-name
406
407 regulator-stat
408 regula
409 regula
410 };
411 };
412
413 vcca1v8_codec: LDO_REG
414 regulator-alwa
415 regulator-boot
416 regulator-min-
417 regulator-max-
418 regulator-name
419
420 regulator-stat
421 regula
422 };
423 };
424
425 vcc_3v0: LDO_REG8 {
426 regulator-alwa
427 regulator-boot
428 regulator-min-
429 regulator-max-
430 regulator-name
431
432 regulator-stat
433 regula
434 regula
435 };
436 };
437
438 vcc3v3_s3: SWITCH_REG1
439 regulator-alwa
440 regulator-boot
441 regulator-name
442
443 regulator-stat
444 regula
445 };
446 };
447
448 vcc3v3_s0: SWITCH_REG2
449 regulator-alwa
450 regulator-boot
451 regulator-name
452
453 regulator-stat
454 regula
455 };
456 };
457 };
458 };
459 };
460
461 &i2c1 {
462 clock-frequency = <200000>;
463 i2c-scl-rising-time-ns = <150>;
464 i2c-scl-falling-time-ns = <30>;
465 status = "okay";
466 };
467
468 &i2c2 {
469 status = "okay";
470 };
471
472 &i2c4 {
473 clock-frequency = <400000>;
474 i2c-scl-rising-time-ns = <160>;
475 i2c-scl-falling-time-ns = <30>;
476 status = "okay";
477
478 fusb0: typec-portc@22 {
479 compatible = "fcs,fusb302";
480 reg = <0x22>;
481 interrupt-parent = <&gpio1>;
482 interrupts = <RK_PA2 IRQ_TYPE_
483 pinctrl-names = "default";
484 pinctrl-0 = <&fusb0_int>;
485 vbus-supply = <&vbus_typec>;
486 };
487 };
488
489 &i2c7 {
490 status = "okay";
491 };
492
493 &i2s2 {
494 status = "okay";
495 };
496
497 &io_domains {
498 bt656-supply = <&vcc_1v8>;
499 audio-supply = <&vcca1v8_codec>;
500 sdmmc-supply = <&vcc_sdio>;
501 gpio1830-supply = <&vcc_3v0>;
502 status = "okay";
503 };
504
505 &pcie_phy {
506 assigned-clock-parents = <&cru SCLK_PC
507 assigned-clock-rates = <100000000>;
508 assigned-clocks = <&cru SCLK_PCIEPHY_R
509 status = "okay";
510 };
511
512 &pcie0 {
513 num-lanes = <2>;
514 vpcie0v9-supply = <&vcca0v9_s3>;
515 vpcie1v8-supply = <&vcca1v8_s3>;
516 status = "okay";
517 };
518
519 &pinctrl {
520 fusb30x {
521 fusb0_int: fusb0-int {
522 rockchip,pins = <1 RK_
523 };
524 };
525
526 gpio-leds {
527 status_led_pin: status-led-pin
528 rockchip,pins = <0 RK_
529 };
530 };
531
532 gmac {
533 phy_intb: phy-intb {
534 rockchip,pins = <3 RK_
535 };
536
537 phy_rstb: phy-rstb {
538 rockchip,pins = <3 RK_
539 };
540 };
541
542 pmic {
543 cpu_b_sleep: cpu-b-sleep {
544 rockchip,pins = <1 RK_
545 };
546
547 gpu_sleep: gpu-sleep {
548 rockchip,pins = <1 RK_
549 };
550
551 pmic_int_l: pmic-int-l {
552 rockchip,pins = <1 RK_
553 };
554 };
555
556 rockchip-key {
557 power_key: power-key {
558 rockchip,pins = <0 RK_
559 };
560 };
561
562 sdio {
563 bt_host_wake_l: bt-host-wake-l
564 rockchip,pins = <0 RK_
565 };
566
567 bt_reg_on_h: bt-reg-on-h {
568 /* external pullup to
569 rockchip,pins = <0 RK_
570 };
571
572 bt_wake_l: bt-wake-l {
573 rockchip,pins = <2 RK_
574 };
575
576 wifi_reg_on_h: wifi-reg_on-h {
577 rockchip,pins = <0 RK_
578 };
579 };
580
581 sdmmc {
582 sdmmc0_det_l: sdmmc0-det-l {
583 rockchip,pins = <0 RK_
584 };
585
586 sdmmc0_pwr_h: sdmmc0-pwr-h {
587 rockchip,pins = <0 RK_
588 };
589 };
590 };
591
592 &pmu_io_domains {
593 pmu1830-supply = <&vcc_3v0>;
594 status = "okay";
595 };
596
597 &pwm0 {
598 status = "okay";
599 };
600
601 &pwm1 {
602 status = "okay";
603 };
604
605 &pwm2 {
606 pinctrl-names = "active";
607 pinctrl-0 = <&pwm2_pin_pull_down>;
608 status = "okay";
609 };
610
611 &saradc {
612 vref-supply = <&vcca1v8_s3>;
613 status = "okay";
614 };
615
616 &sdhci {
617 bus-width = <8>;
618 mmc-hs200-1_8v;
619 non-removable;
620 status = "okay";
621 };
622
623 &sdio0 {
624 bus-width = <4>;
625 cap-sd-highspeed;
626 cap-sdio-irq;
627 keep-power-in-suspend;
628 mmc-pwrseq = <&sdio_pwrseq>;
629 non-removable;
630 pinctrl-names = "default";
631 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s
632 sd-uhs-sdr104;
633 status = "okay";
634 };
635
636 &sdmmc {
637 bus-width = <4>;
638 cap-sd-highspeed;
639 cap-mmc-highspeed;
640 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_
641 disable-wp;
642 pinctrl-names = "default";
643 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &s
644 sd-uhs-sdr104;
645 vmmc-supply = <&vcc3v0_sd>;
646 vqmmc-supply = <&vcc_sdio>;
647 status = "okay";
648 };
649
650 &tcphy0 {
651 status = "okay";
652 };
653
654 &tcphy1 {
655 status = "okay";
656 };
657
658 &tsadc {
659 /* tshut mode 0:CRU 1:GPIO */
660 rockchip,hw-tshut-mode = <1>;
661 /* tshut polarity 0:LOW 1:HIGH */
662 rockchip,hw-tshut-polarity = <1>;
663 status = "okay";
664 };
665
666 &u2phy0 {
667 status = "okay";
668 };
669
670 &u2phy0_host {
671 status = "okay";
672 };
673
674 &u2phy0_otg {
675 status = "okay";
676 };
677
678 &u2phy1 {
679 status = "okay";
680 };
681
682 &u2phy1_host {
683 status = "okay";
684 };
685
686 &u2phy1_otg {
687 status = "okay";
688 };
689
690 &uart0 {
691 pinctrl-names = "default";
692 pinctrl-0 = <&uart0_xfer &uart0_rts &u
693 status = "okay";
694
695 bluetooth {
696 compatible = "brcm,bcm43438-bt
697 clocks = <&rk808 1>;
698 clock-names = "lpo";
699 device-wakeup-gpios = <&gpio2
700 host-wakeup-gpios = <&gpio0 RK
701 shutdown-gpios = <&gpio0 RK_PB
702 max-speed = <4000000>;
703 pinctrl-names = "default";
704 pinctrl-0 = <&bt_reg_on_h &bt_
705 vbat-supply = <&vcc3v3_sys>;
706 vddio-supply = <&vcc_1v8>;
707 };
708 };
709
710 &uart2 {
711 status = "okay";
712 };
713
714 &usbdrd3_0 {
715 status = "okay";
716 };
717
718 &usbdrd3_1 {
719 status = "okay";
720 };
721
722 &usbdrd_dwc3_0 {
723 status = "okay";
724 };
725
726 &usbdrd_dwc3_1 {
727 dr_mode = "host";
728 status = "okay";
729 };
730
731 &usb_host0_ehci {
732 status = "okay";
733 };
734
735 &usb_host0_ohci {
736 status = "okay";
737 };
738
739 &usb_host1_ehci {
740 status = "okay";
741 };
742
743 &usb_host1_ohci {
744 status = "okay";
745 };
746
747 &vopb {
748 status = "okay";
749 };
750
751 &vopb_mmu {
752 status = "okay";
753 };
754
755 &vopl {
756 status = "okay";
757 };
758
759 &vopl_mmu {
760 status = "okay";
761 };
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