1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * RK3399-based FriendlyElec boards device tre 3 * RK3399-based FriendlyElec boards device tree source
4 * 4 *
5 * Copyright (c) 2016 Fuzhou Rockchip Electron 5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
6 * 6 *
7 * Copyright (c) 2018 FriendlyElec Computer Te 7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
8 * (http://www.friendlyarm.com) 8 * (http://www.friendlyarm.com)
9 * 9 *
10 * Copyright (c) 2018 Collabora Ltd. 10 * Copyright (c) 2018 Collabora Ltd.
11 * Copyright (c) 2019 Arm Ltd. 11 * Copyright (c) 2019 Arm Ltd.
12 */ 12 */
13 13
14 /dts-v1/; 14 /dts-v1/;
15 #include <dt-bindings/input/linux-event-codes. 15 #include <dt-bindings/input/linux-event-codes.h>
16 #include "rk3399.dtsi" 16 #include "rk3399.dtsi"
>> 17 #include "rk3399-opp.dtsi"
17 18
18 / { 19 / {
19 aliases { 20 aliases {
20 ethernet0 = &gmac; <<
21 mmc0 = &sdio0; 21 mmc0 = &sdio0;
22 mmc1 = &sdmmc; 22 mmc1 = &sdmmc;
23 mmc2 = &sdhci; 23 mmc2 = &sdhci;
24 }; 24 };
25 25
26 chosen { 26 chosen {
27 stdout-path = "serial2:1500000 27 stdout-path = "serial2:1500000n8";
28 }; 28 };
29 29
30 clkin_gmac: external-gmac-clock { 30 clkin_gmac: external-gmac-clock {
31 compatible = "fixed-clock"; 31 compatible = "fixed-clock";
32 clock-frequency = <125000000>; 32 clock-frequency = <125000000>;
33 clock-output-names = "clkin_gm 33 clock-output-names = "clkin_gmac";
34 #clock-cells = <0>; 34 #clock-cells = <0>;
35 }; 35 };
36 36
37 vcc3v3_sys: vcc3v3-sys { 37 vcc3v3_sys: vcc3v3-sys {
38 compatible = "regulator-fixed" 38 compatible = "regulator-fixed";
39 regulator-always-on; 39 regulator-always-on;
40 regulator-boot-on; 40 regulator-boot-on;
41 regulator-min-microvolt = <330 41 regulator-min-microvolt = <3300000>;
42 regulator-max-microvolt = <330 42 regulator-max-microvolt = <3300000>;
43 regulator-name = "vcc3v3_sys"; 43 regulator-name = "vcc3v3_sys";
44 }; 44 };
45 45
46 vcc5v0_sys: vcc5v0-sys { 46 vcc5v0_sys: vcc5v0-sys {
47 compatible = "regulator-fixed" 47 compatible = "regulator-fixed";
48 regulator-always-on; 48 regulator-always-on;
49 regulator-boot-on; 49 regulator-boot-on;
50 regulator-min-microvolt = <500 50 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <500 51 regulator-max-microvolt = <5000000>;
52 regulator-name = "vcc5v0_sys"; 52 regulator-name = "vcc5v0_sys";
53 vin-supply = <&vdd_5v>; 53 vin-supply = <&vdd_5v>;
54 }; 54 };
55 55
56 /* switched by pmic_sleep */ 56 /* switched by pmic_sleep */
57 vcc1v8_s3: vcc1v8-s3 { 57 vcc1v8_s3: vcc1v8-s3 {
58 compatible = "regulator-fixed" 58 compatible = "regulator-fixed";
59 regulator-always-on; 59 regulator-always-on;
60 regulator-boot-on; 60 regulator-boot-on;
61 regulator-min-microvolt = <180 61 regulator-min-microvolt = <1800000>;
62 regulator-max-microvolt = <180 62 regulator-max-microvolt = <1800000>;
63 regulator-name = "vcc1v8_s3"; 63 regulator-name = "vcc1v8_s3";
64 vin-supply = <&vcc_1v8>; 64 vin-supply = <&vcc_1v8>;
65 }; 65 };
66 66
67 vcc3v0_sd: vcc3v0-sd { 67 vcc3v0_sd: vcc3v0-sd {
68 compatible = "regulator-fixed" 68 compatible = "regulator-fixed";
69 enable-active-high; 69 enable-active-high;
70 gpio = <&gpio0 RK_PA1 GPIO_ACT 70 gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
71 pinctrl-names = "default"; 71 pinctrl-names = "default";
72 pinctrl-0 = <&sdmmc0_pwr_h>; 72 pinctrl-0 = <&sdmmc0_pwr_h>;
73 regulator-always-on; 73 regulator-always-on;
74 regulator-min-microvolt = <300 74 regulator-min-microvolt = <3000000>;
75 regulator-max-microvolt = <300 75 regulator-max-microvolt = <3000000>;
76 regulator-name = "vcc3v0_sd"; 76 regulator-name = "vcc3v0_sd";
77 vin-supply = <&vcc3v3_sys>; 77 vin-supply = <&vcc3v3_sys>;
78 }; 78 };
79 79
80 /* 80 /*
81 * Really, this is supplied by vcc_1v8 81 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
82 * drives the enable pin, but we can't 82 * drives the enable pin, but we can't quite model that.
83 */ 83 */
84 vcca0v9_s3: vcca0v9-s3 { 84 vcca0v9_s3: vcca0v9-s3 {
85 compatible = "regulator-fixed" 85 compatible = "regulator-fixed";
86 regulator-min-microvolt = <900 86 regulator-min-microvolt = <900000>;
87 regulator-max-microvolt = <900 87 regulator-max-microvolt = <900000>;
88 regulator-name = "vcca0v9_s3"; 88 regulator-name = "vcca0v9_s3";
89 vin-supply = <&vcc1v8_s3>; 89 vin-supply = <&vcc1v8_s3>;
90 }; 90 };
91 91
92 /* As above, actually supplied by vcc3 92 /* As above, actually supplied by vcc3v3_sys */
93 vcca1v8_s3: vcca1v8-s3 { 93 vcca1v8_s3: vcca1v8-s3 {
94 compatible = "regulator-fixed" 94 compatible = "regulator-fixed";
95 regulator-min-microvolt = <180 95 regulator-min-microvolt = <1800000>;
96 regulator-max-microvolt = <180 96 regulator-max-microvolt = <1800000>;
97 regulator-name = "vcca1v8_s3"; 97 regulator-name = "vcca1v8_s3";
98 vin-supply = <&vcc1v8_s3>; 98 vin-supply = <&vcc1v8_s3>;
99 }; 99 };
100 100
101 vbus_typec: vbus-typec { 101 vbus_typec: vbus-typec {
102 compatible = "regulator-fixed" 102 compatible = "regulator-fixed";
103 regulator-min-microvolt = <500 103 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <500 104 regulator-max-microvolt = <5000000>;
105 regulator-name = "vbus_typec"; 105 regulator-name = "vbus_typec";
106 }; 106 };
107 107
108 gpio-keys { 108 gpio-keys {
109 compatible = "gpio-keys"; 109 compatible = "gpio-keys";
110 autorepeat; 110 autorepeat;
111 pinctrl-names = "default"; 111 pinctrl-names = "default";
112 pinctrl-0 = <&power_key>; 112 pinctrl-0 = <&power_key>;
113 113
114 key-power { 114 key-power {
115 debounce-interval = <1 115 debounce-interval = <100>;
116 gpios = <&gpio0 RK_PA5 116 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
117 label = "GPIO Key Powe 117 label = "GPIO Key Power";
118 linux,code = <KEY_POWE 118 linux,code = <KEY_POWER>;
119 wakeup-source; 119 wakeup-source;
120 }; 120 };
121 }; 121 };
122 122
123 leds: gpio-leds { 123 leds: gpio-leds {
124 compatible = "gpio-leds"; 124 compatible = "gpio-leds";
125 pinctrl-names = "default"; 125 pinctrl-names = "default";
126 pinctrl-0 = <&status_led_pin>; 126 pinctrl-0 = <&status_led_pin>;
127 127
128 status_led: led-0 { 128 status_led: led-0 {
129 gpios = <&gpio0 RK_PB5 129 gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
130 label = "status_led"; 130 label = "status_led";
131 linux,default-trigger 131 linux,default-trigger = "heartbeat";
132 }; 132 };
133 }; 133 };
134 134
135 sdio_pwrseq: sdio-pwrseq { 135 sdio_pwrseq: sdio-pwrseq {
136 compatible = "mmc-pwrseq-simpl 136 compatible = "mmc-pwrseq-simple";
137 clocks = <&rk808 1>; 137 clocks = <&rk808 1>;
138 clock-names = "ext_clock"; 138 clock-names = "ext_clock";
139 pinctrl-names = "default"; 139 pinctrl-names = "default";
140 pinctrl-0 = <&wifi_reg_on_h>; 140 pinctrl-0 = <&wifi_reg_on_h>;
141 reset-gpios = <&gpio0 RK_PB2 G 141 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
142 }; 142 };
143 }; 143 };
144 144
145 &cpu_b0 { 145 &cpu_b0 {
146 cpu-supply = <&vdd_cpu_b>; 146 cpu-supply = <&vdd_cpu_b>;
147 }; 147 };
148 148
149 &cpu_b1 { 149 &cpu_b1 {
150 cpu-supply = <&vdd_cpu_b>; 150 cpu-supply = <&vdd_cpu_b>;
151 }; 151 };
152 152
153 &cpu_l0 { 153 &cpu_l0 {
154 cpu-supply = <&vdd_cpu_l>; 154 cpu-supply = <&vdd_cpu_l>;
155 }; 155 };
156 156
157 &cpu_l1 { 157 &cpu_l1 {
158 cpu-supply = <&vdd_cpu_l>; 158 cpu-supply = <&vdd_cpu_l>;
159 }; 159 };
160 160
161 &cpu_l2 { 161 &cpu_l2 {
162 cpu-supply = <&vdd_cpu_l>; 162 cpu-supply = <&vdd_cpu_l>;
163 }; 163 };
164 164
165 &cpu_l3 { 165 &cpu_l3 {
166 cpu-supply = <&vdd_cpu_l>; 166 cpu-supply = <&vdd_cpu_l>;
167 }; 167 };
168 168
169 &emmc_phy { 169 &emmc_phy {
170 rockchip,enable-strobe-pulldown; 170 rockchip,enable-strobe-pulldown;
171 status = "okay"; 171 status = "okay";
172 }; 172 };
173 173
174 &gmac { 174 &gmac {
175 assigned-clock-parents = <&clkin_gmac> 175 assigned-clock-parents = <&clkin_gmac>;
176 assigned-clocks = <&cru SCLK_RMII_SRC> 176 assigned-clocks = <&cru SCLK_RMII_SRC>;
177 clock_in_out = "input"; 177 clock_in_out = "input";
178 pinctrl-names = "default"; 178 pinctrl-names = "default";
179 pinctrl-0 = <&rgmii_pins>, <&phy_intb> 179 pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
180 phy-handle = <&rtl8211e>; 180 phy-handle = <&rtl8211e>;
181 phy-mode = "rgmii"; 181 phy-mode = "rgmii";
182 phy-supply = <&vcc3v3_s3>; 182 phy-supply = <&vcc3v3_s3>;
183 tx_delay = <0x28>; 183 tx_delay = <0x28>;
184 rx_delay = <0x11>; 184 rx_delay = <0x11>;
185 status = "okay"; 185 status = "okay";
186 186
187 mdio { 187 mdio {
188 compatible = "snps,dwmac-mdio" 188 compatible = "snps,dwmac-mdio";
189 #address-cells = <1>; 189 #address-cells = <1>;
190 #size-cells = <0>; 190 #size-cells = <0>;
191 191
192 rtl8211e: ethernet-phy@1 { 192 rtl8211e: ethernet-phy@1 {
193 reg = <1>; 193 reg = <1>;
194 interrupt-parent = <&g 194 interrupt-parent = <&gpio3>;
195 interrupts = <RK_PB2 I 195 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
196 reset-assert-us = <100 196 reset-assert-us = <10000>;
197 reset-deassert-us = <3 197 reset-deassert-us = <30000>;
198 reset-gpios = <&gpio3 198 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
199 }; 199 };
200 }; 200 };
201 }; 201 };
202 202
203 &gpu { 203 &gpu {
204 mali-supply = <&vdd_gpu>; 204 mali-supply = <&vdd_gpu>;
205 status = "okay"; 205 status = "okay";
206 }; 206 };
207 207
208 &hdmi { 208 &hdmi {
209 ddc-i2c-bus = <&i2c7>; 209 ddc-i2c-bus = <&i2c7>;
210 pinctrl-names = "default"; 210 pinctrl-names = "default";
211 pinctrl-0 = <&hdmi_cec>; 211 pinctrl-0 = <&hdmi_cec>;
212 status = "okay"; 212 status = "okay";
213 }; 213 };
214 214
215 &hdmi_sound { 215 &hdmi_sound {
216 status = "okay"; 216 status = "okay";
217 }; 217 };
218 218
219 &i2c0 { 219 &i2c0 {
220 clock-frequency = <400000>; 220 clock-frequency = <400000>;
221 i2c-scl-rising-time-ns = <160>; 221 i2c-scl-rising-time-ns = <160>;
222 i2c-scl-falling-time-ns = <30>; 222 i2c-scl-falling-time-ns = <30>;
223 status = "okay"; 223 status = "okay";
224 224
225 vdd_cpu_b: regulator@40 { 225 vdd_cpu_b: regulator@40 {
226 compatible = "silergy,syr827"; 226 compatible = "silergy,syr827";
227 reg = <0x40>; 227 reg = <0x40>;
228 fcs,suspend-voltage-selector = 228 fcs,suspend-voltage-selector = <1>;
229 pinctrl-names = "default"; 229 pinctrl-names = "default";
230 pinctrl-0 = <&cpu_b_sleep>; 230 pinctrl-0 = <&cpu_b_sleep>;
231 regulator-always-on; 231 regulator-always-on;
232 regulator-boot-on; 232 regulator-boot-on;
233 regulator-min-microvolt = <712 233 regulator-min-microvolt = <712500>;
234 regulator-max-microvolt = <150 234 regulator-max-microvolt = <1500000>;
235 regulator-name = "vdd_cpu_b"; 235 regulator-name = "vdd_cpu_b";
236 regulator-ramp-delay = <1000>; 236 regulator-ramp-delay = <1000>;
237 vin-supply = <&vcc3v3_sys>; 237 vin-supply = <&vcc3v3_sys>;
238 238
239 regulator-state-mem { 239 regulator-state-mem {
240 regulator-off-in-suspe 240 regulator-off-in-suspend;
241 }; 241 };
242 }; 242 };
243 243
244 vdd_gpu: regulator@41 { 244 vdd_gpu: regulator@41 {
245 compatible = "silergy,syr828"; 245 compatible = "silergy,syr828";
246 reg = <0x41>; 246 reg = <0x41>;
247 fcs,suspend-voltage-selector = 247 fcs,suspend-voltage-selector = <1>;
248 pinctrl-names = "default"; 248 pinctrl-names = "default";
249 pinctrl-0 = <&gpu_sleep>; 249 pinctrl-0 = <&gpu_sleep>;
250 regulator-always-on; 250 regulator-always-on;
251 regulator-boot-on; 251 regulator-boot-on;
252 regulator-min-microvolt = <712 252 regulator-min-microvolt = <712500>;
253 regulator-max-microvolt = <150 253 regulator-max-microvolt = <1500000>;
254 regulator-name = "vdd_gpu"; 254 regulator-name = "vdd_gpu";
255 regulator-ramp-delay = <1000>; 255 regulator-ramp-delay = <1000>;
256 vin-supply = <&vcc3v3_sys>; 256 vin-supply = <&vcc3v3_sys>;
257 257
258 regulator-state-mem { 258 regulator-state-mem {
259 regulator-off-in-suspe 259 regulator-off-in-suspend;
260 }; 260 };
261 }; 261 };
262 262
263 rk808: pmic@1b { 263 rk808: pmic@1b {
264 compatible = "rockchip,rk808"; 264 compatible = "rockchip,rk808";
265 reg = <0x1b>; 265 reg = <0x1b>;
266 clock-output-names = "xin32k", 266 clock-output-names = "xin32k", "rtc_clko_wifi";
267 #clock-cells = <1>; 267 #clock-cells = <1>;
268 interrupt-parent = <&gpio1>; 268 interrupt-parent = <&gpio1>;
269 interrupts = <21 IRQ_TYPE_LEVE 269 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
270 pinctrl-names = "default"; 270 pinctrl-names = "default";
271 pinctrl-0 = <&pmic_int_l>, <&a 271 pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>;
272 rockchip,system-power-controll 272 rockchip,system-power-controller;
273 wakeup-source; 273 wakeup-source;
274 274
275 vcc1-supply = <&vcc3v3_sys>; 275 vcc1-supply = <&vcc3v3_sys>;
276 vcc2-supply = <&vcc3v3_sys>; 276 vcc2-supply = <&vcc3v3_sys>;
277 vcc3-supply = <&vcc3v3_sys>; 277 vcc3-supply = <&vcc3v3_sys>;
278 vcc4-supply = <&vcc3v3_sys>; 278 vcc4-supply = <&vcc3v3_sys>;
279 vcc6-supply = <&vcc3v3_sys>; 279 vcc6-supply = <&vcc3v3_sys>;
280 vcc7-supply = <&vcc3v3_sys>; 280 vcc7-supply = <&vcc3v3_sys>;
281 vcc8-supply = <&vcc3v3_sys>; 281 vcc8-supply = <&vcc3v3_sys>;
282 vcc9-supply = <&vcc3v3_sys>; 282 vcc9-supply = <&vcc3v3_sys>;
283 vcc10-supply = <&vcc3v3_sys>; 283 vcc10-supply = <&vcc3v3_sys>;
284 vcc11-supply = <&vcc3v3_sys>; 284 vcc11-supply = <&vcc3v3_sys>;
285 vcc12-supply = <&vcc3v3_sys>; 285 vcc12-supply = <&vcc3v3_sys>;
286 vddio-supply = <&vcc_3v0>; 286 vddio-supply = <&vcc_3v0>;
287 287
288 regulators { 288 regulators {
289 vdd_center: DCDC_REG1 289 vdd_center: DCDC_REG1 {
290 regulator-alwa 290 regulator-always-on;
291 regulator-boot 291 regulator-boot-on;
292 regulator-min- 292 regulator-min-microvolt = <750000>;
293 regulator-max- 293 regulator-max-microvolt = <1350000>;
294 regulator-name 294 regulator-name = "vdd_center";
295 regulator-ramp 295 regulator-ramp-delay = <6001>;
296 296
297 regulator-stat 297 regulator-state-mem {
298 regula 298 regulator-off-in-suspend;
299 }; 299 };
300 }; 300 };
301 301
302 vdd_cpu_l: DCDC_REG2 { 302 vdd_cpu_l: DCDC_REG2 {
303 regulator-alwa 303 regulator-always-on;
304 regulator-boot 304 regulator-boot-on;
305 regulator-min- 305 regulator-min-microvolt = <750000>;
306 regulator-max- 306 regulator-max-microvolt = <1350000>;
307 regulator-name 307 regulator-name = "vdd_cpu_l";
308 regulator-ramp 308 regulator-ramp-delay = <6001>;
309 309
310 regulator-stat 310 regulator-state-mem {
311 regula 311 regulator-off-in-suspend;
312 }; 312 };
313 }; 313 };
314 314
315 vcc_ddr: DCDC_REG3 { 315 vcc_ddr: DCDC_REG3 {
316 regulator-alwa 316 regulator-always-on;
317 regulator-boot 317 regulator-boot-on;
318 regulator-name 318 regulator-name = "vcc_ddr";
319 319
320 regulator-stat 320 regulator-state-mem {
321 regula 321 regulator-on-in-suspend;
322 }; 322 };
323 }; 323 };
324 324
325 vcc_1v8: DCDC_REG4 { 325 vcc_1v8: DCDC_REG4 {
326 regulator-alwa 326 regulator-always-on;
327 regulator-boot 327 regulator-boot-on;
328 regulator-min- 328 regulator-min-microvolt = <1800000>;
329 regulator-max- 329 regulator-max-microvolt = <1800000>;
330 regulator-name 330 regulator-name = "vcc_1v8";
331 331
332 regulator-stat 332 regulator-state-mem {
333 regula 333 regulator-on-in-suspend;
334 regula 334 regulator-suspend-microvolt = <1800000>;
335 }; 335 };
336 }; 336 };
337 337
338 vcc1v8_cam: LDO_REG1 { 338 vcc1v8_cam: LDO_REG1 {
339 regulator-alwa 339 regulator-always-on;
340 regulator-boot 340 regulator-boot-on;
341 regulator-min- 341 regulator-min-microvolt = <1800000>;
342 regulator-max- 342 regulator-max-microvolt = <1800000>;
343 regulator-name 343 regulator-name = "vcc1v8_cam";
344 344
345 regulator-stat 345 regulator-state-mem {
346 regula 346 regulator-off-in-suspend;
347 }; 347 };
348 }; 348 };
349 349
350 vcc3v0_touch: LDO_REG2 350 vcc3v0_touch: LDO_REG2 {
351 regulator-alwa 351 regulator-always-on;
352 regulator-boot 352 regulator-boot-on;
353 regulator-min- 353 regulator-min-microvolt = <3000000>;
354 regulator-max- 354 regulator-max-microvolt = <3000000>;
355 regulator-name 355 regulator-name = "vcc3v0_touch";
356 356
357 regulator-stat 357 regulator-state-mem {
358 regula 358 regulator-off-in-suspend;
359 }; 359 };
360 }; 360 };
361 361
362 vcc1v8_pmupll: LDO_REG 362 vcc1v8_pmupll: LDO_REG3 {
363 regulator-alwa 363 regulator-always-on;
364 regulator-boot 364 regulator-boot-on;
365 regulator-min- 365 regulator-min-microvolt = <1800000>;
366 regulator-max- 366 regulator-max-microvolt = <1800000>;
367 regulator-name 367 regulator-name = "vcc1v8_pmupll";
368 368
369 regulator-stat 369 regulator-state-mem {
370 regula 370 regulator-on-in-suspend;
371 regula 371 regulator-suspend-microvolt = <1800000>;
372 }; 372 };
373 }; 373 };
374 374
375 vcc_sdio: LDO_REG4 { 375 vcc_sdio: LDO_REG4 {
376 regulator-alwa 376 regulator-always-on;
377 regulator-boot 377 regulator-boot-on;
378 regulator-min- 378 regulator-min-microvolt = <1800000>;
379 regulator-max- 379 regulator-max-microvolt = <3300000>;
380 regulator-name 380 regulator-name = "vcc_sdio";
381 381
382 regulator-stat 382 regulator-state-mem {
383 regula 383 regulator-on-in-suspend;
384 regula 384 regulator-suspend-microvolt = <3000000>;
385 }; 385 };
386 }; 386 };
387 387
388 vcca3v0_codec: LDO_REG 388 vcca3v0_codec: LDO_REG5 {
389 regulator-alwa 389 regulator-always-on;
390 regulator-boot 390 regulator-boot-on;
391 regulator-min- 391 regulator-min-microvolt = <3000000>;
392 regulator-max- 392 regulator-max-microvolt = <3000000>;
393 regulator-name 393 regulator-name = "vcca3v0_codec";
394 394
395 regulator-stat 395 regulator-state-mem {
396 regula 396 regulator-off-in-suspend;
397 }; 397 };
398 }; 398 };
399 399
400 vcc_1v5: LDO_REG6 { 400 vcc_1v5: LDO_REG6 {
401 regulator-alwa 401 regulator-always-on;
402 regulator-boot 402 regulator-boot-on;
403 regulator-min- 403 regulator-min-microvolt = <1500000>;
404 regulator-max- 404 regulator-max-microvolt = <1500000>;
405 regulator-name 405 regulator-name = "vcc_1v5";
406 406
407 regulator-stat 407 regulator-state-mem {
408 regula 408 regulator-on-in-suspend;
409 regula 409 regulator-suspend-microvolt = <1500000>;
410 }; 410 };
411 }; 411 };
412 412
413 vcca1v8_codec: LDO_REG 413 vcca1v8_codec: LDO_REG7 {
414 regulator-alwa 414 regulator-always-on;
415 regulator-boot 415 regulator-boot-on;
416 regulator-min- 416 regulator-min-microvolt = <1800000>;
417 regulator-max- 417 regulator-max-microvolt = <1800000>;
418 regulator-name 418 regulator-name = "vcca1v8_codec";
419 419
420 regulator-stat 420 regulator-state-mem {
421 regula 421 regulator-off-in-suspend;
422 }; 422 };
423 }; 423 };
424 424
425 vcc_3v0: LDO_REG8 { 425 vcc_3v0: LDO_REG8 {
426 regulator-alwa 426 regulator-always-on;
427 regulator-boot 427 regulator-boot-on;
428 regulator-min- 428 regulator-min-microvolt = <3000000>;
429 regulator-max- 429 regulator-max-microvolt = <3000000>;
430 regulator-name 430 regulator-name = "vcc_3v0";
431 431
432 regulator-stat 432 regulator-state-mem {
433 regula 433 regulator-on-in-suspend;
434 regula 434 regulator-suspend-microvolt = <3000000>;
435 }; 435 };
436 }; 436 };
437 437
438 vcc3v3_s3: SWITCH_REG1 438 vcc3v3_s3: SWITCH_REG1 {
439 regulator-alwa 439 regulator-always-on;
440 regulator-boot 440 regulator-boot-on;
441 regulator-name 441 regulator-name = "vcc3v3_s3";
442 442
443 regulator-stat 443 regulator-state-mem {
444 regula 444 regulator-off-in-suspend;
445 }; 445 };
446 }; 446 };
447 447
448 vcc3v3_s0: SWITCH_REG2 448 vcc3v3_s0: SWITCH_REG2 {
449 regulator-alwa 449 regulator-always-on;
450 regulator-boot 450 regulator-boot-on;
451 regulator-name 451 regulator-name = "vcc3v3_s0";
452 452
453 regulator-stat 453 regulator-state-mem {
454 regula 454 regulator-off-in-suspend;
455 }; 455 };
456 }; 456 };
457 }; 457 };
458 }; 458 };
459 }; 459 };
460 460
461 &i2c1 { 461 &i2c1 {
462 clock-frequency = <200000>; 462 clock-frequency = <200000>;
463 i2c-scl-rising-time-ns = <150>; 463 i2c-scl-rising-time-ns = <150>;
464 i2c-scl-falling-time-ns = <30>; 464 i2c-scl-falling-time-ns = <30>;
465 status = "okay"; 465 status = "okay";
466 }; 466 };
467 467
468 &i2c2 { 468 &i2c2 {
469 status = "okay"; 469 status = "okay";
470 }; 470 };
471 471
472 &i2c4 { 472 &i2c4 {
473 clock-frequency = <400000>; 473 clock-frequency = <400000>;
474 i2c-scl-rising-time-ns = <160>; 474 i2c-scl-rising-time-ns = <160>;
475 i2c-scl-falling-time-ns = <30>; 475 i2c-scl-falling-time-ns = <30>;
476 status = "okay"; 476 status = "okay";
477 477
478 fusb0: typec-portc@22 { 478 fusb0: typec-portc@22 {
479 compatible = "fcs,fusb302"; 479 compatible = "fcs,fusb302";
480 reg = <0x22>; 480 reg = <0x22>;
481 interrupt-parent = <&gpio1>; 481 interrupt-parent = <&gpio1>;
482 interrupts = <RK_PA2 IRQ_TYPE_ 482 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
483 pinctrl-names = "default"; 483 pinctrl-names = "default";
484 pinctrl-0 = <&fusb0_int>; 484 pinctrl-0 = <&fusb0_int>;
485 vbus-supply = <&vbus_typec>; 485 vbus-supply = <&vbus_typec>;
486 }; 486 };
487 }; 487 };
488 488
489 &i2c7 { 489 &i2c7 {
490 status = "okay"; 490 status = "okay";
491 }; 491 };
492 492
493 &i2s2 { 493 &i2s2 {
494 status = "okay"; 494 status = "okay";
495 }; 495 };
496 496
497 &io_domains { 497 &io_domains {
498 bt656-supply = <&vcc_1v8>; 498 bt656-supply = <&vcc_1v8>;
499 audio-supply = <&vcca1v8_codec>; 499 audio-supply = <&vcca1v8_codec>;
500 sdmmc-supply = <&vcc_sdio>; 500 sdmmc-supply = <&vcc_sdio>;
501 gpio1830-supply = <&vcc_3v0>; 501 gpio1830-supply = <&vcc_3v0>;
502 status = "okay"; 502 status = "okay";
503 }; 503 };
504 504
505 &pcie_phy { 505 &pcie_phy {
506 assigned-clock-parents = <&cru SCLK_PC 506 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
507 assigned-clock-rates = <100000000>; 507 assigned-clock-rates = <100000000>;
508 assigned-clocks = <&cru SCLK_PCIEPHY_R 508 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
509 status = "okay"; 509 status = "okay";
510 }; 510 };
511 511
512 &pcie0 { 512 &pcie0 {
513 num-lanes = <2>; 513 num-lanes = <2>;
514 vpcie0v9-supply = <&vcca0v9_s3>; 514 vpcie0v9-supply = <&vcca0v9_s3>;
515 vpcie1v8-supply = <&vcca1v8_s3>; 515 vpcie1v8-supply = <&vcca1v8_s3>;
516 status = "okay"; 516 status = "okay";
517 }; 517 };
518 518
519 &pinctrl { 519 &pinctrl {
520 fusb30x { 520 fusb30x {
521 fusb0_int: fusb0-int { 521 fusb0_int: fusb0-int {
522 rockchip,pins = <1 RK_ 522 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
523 }; 523 };
524 }; 524 };
525 525
526 gpio-leds { 526 gpio-leds {
527 status_led_pin: status-led-pin 527 status_led_pin: status-led-pin {
528 rockchip,pins = <0 RK_ 528 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
529 }; 529 };
530 }; 530 };
531 531
532 gmac { 532 gmac {
533 phy_intb: phy-intb { 533 phy_intb: phy-intb {
534 rockchip,pins = <3 RK_ 534 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
535 }; 535 };
536 536
537 phy_rstb: phy-rstb { 537 phy_rstb: phy-rstb {
538 rockchip,pins = <3 RK_ 538 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
539 }; 539 };
540 }; 540 };
541 541
542 pmic { 542 pmic {
543 cpu_b_sleep: cpu-b-sleep { 543 cpu_b_sleep: cpu-b-sleep {
544 rockchip,pins = <1 RK_ 544 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
545 }; 545 };
546 546
547 gpu_sleep: gpu-sleep { 547 gpu_sleep: gpu-sleep {
548 rockchip,pins = <1 RK_ 548 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
549 }; 549 };
550 550
551 pmic_int_l: pmic-int-l { 551 pmic_int_l: pmic-int-l {
552 rockchip,pins = <1 RK_ 552 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
553 }; 553 };
554 }; 554 };
555 555
556 rockchip-key { 556 rockchip-key {
557 power_key: power-key { 557 power_key: power-key {
558 rockchip,pins = <0 RK_ 558 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
559 }; 559 };
560 }; 560 };
561 561
562 sdio { 562 sdio {
563 bt_host_wake_l: bt-host-wake-l 563 bt_host_wake_l: bt-host-wake-l {
564 rockchip,pins = <0 RK_ 564 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
565 }; 565 };
566 566
567 bt_reg_on_h: bt-reg-on-h { 567 bt_reg_on_h: bt-reg-on-h {
568 /* external pullup to 568 /* external pullup to VCC1V8_PMUPLL */
569 rockchip,pins = <0 RK_ 569 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
570 }; 570 };
571 571
572 bt_wake_l: bt-wake-l { 572 bt_wake_l: bt-wake-l {
573 rockchip,pins = <2 RK_ 573 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
574 }; 574 };
575 575
576 wifi_reg_on_h: wifi-reg_on-h { 576 wifi_reg_on_h: wifi-reg_on-h {
577 rockchip,pins = <0 RK_ 577 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
578 }; 578 };
579 }; 579 };
580 580
581 sdmmc { 581 sdmmc {
582 sdmmc0_det_l: sdmmc0-det-l { 582 sdmmc0_det_l: sdmmc0-det-l {
583 rockchip,pins = <0 RK_ 583 rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
584 }; 584 };
585 585
586 sdmmc0_pwr_h: sdmmc0-pwr-h { 586 sdmmc0_pwr_h: sdmmc0-pwr-h {
587 rockchip,pins = <0 RK_ 587 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
588 }; 588 };
589 }; 589 };
590 }; 590 };
591 591
592 &pmu_io_domains { 592 &pmu_io_domains {
593 pmu1830-supply = <&vcc_3v0>; 593 pmu1830-supply = <&vcc_3v0>;
594 status = "okay"; 594 status = "okay";
595 }; 595 };
596 596
597 &pwm0 { 597 &pwm0 {
598 status = "okay"; 598 status = "okay";
599 }; 599 };
600 600
601 &pwm1 { 601 &pwm1 {
602 status = "okay"; 602 status = "okay";
603 }; 603 };
604 604
605 &pwm2 { 605 &pwm2 {
606 pinctrl-names = "active"; 606 pinctrl-names = "active";
607 pinctrl-0 = <&pwm2_pin_pull_down>; 607 pinctrl-0 = <&pwm2_pin_pull_down>;
608 status = "okay"; 608 status = "okay";
609 }; 609 };
610 610
611 &saradc { 611 &saradc {
612 vref-supply = <&vcca1v8_s3>; 612 vref-supply = <&vcca1v8_s3>;
613 status = "okay"; 613 status = "okay";
614 }; 614 };
615 615
616 &sdhci { 616 &sdhci {
617 bus-width = <8>; 617 bus-width = <8>;
618 mmc-hs200-1_8v; 618 mmc-hs200-1_8v;
619 non-removable; 619 non-removable;
620 status = "okay"; 620 status = "okay";
621 }; 621 };
622 622
623 &sdio0 { 623 &sdio0 {
624 bus-width = <4>; 624 bus-width = <4>;
625 cap-sd-highspeed; 625 cap-sd-highspeed;
626 cap-sdio-irq; 626 cap-sdio-irq;
627 keep-power-in-suspend; 627 keep-power-in-suspend;
628 mmc-pwrseq = <&sdio_pwrseq>; 628 mmc-pwrseq = <&sdio_pwrseq>;
629 non-removable; 629 non-removable;
630 pinctrl-names = "default"; 630 pinctrl-names = "default";
631 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s 631 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
632 sd-uhs-sdr104; 632 sd-uhs-sdr104;
633 status = "okay"; 633 status = "okay";
634 }; 634 };
635 635
636 &sdmmc { 636 &sdmmc {
637 bus-width = <4>; 637 bus-width = <4>;
638 cap-sd-highspeed; 638 cap-sd-highspeed;
639 cap-mmc-highspeed; 639 cap-mmc-highspeed;
640 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_ 640 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
641 disable-wp; 641 disable-wp;
642 pinctrl-names = "default"; 642 pinctrl-names = "default";
643 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &s 643 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
644 sd-uhs-sdr104; 644 sd-uhs-sdr104;
645 vmmc-supply = <&vcc3v0_sd>; 645 vmmc-supply = <&vcc3v0_sd>;
646 vqmmc-supply = <&vcc_sdio>; 646 vqmmc-supply = <&vcc_sdio>;
647 status = "okay"; 647 status = "okay";
648 }; 648 };
649 649
650 &tcphy0 { 650 &tcphy0 {
651 status = "okay"; 651 status = "okay";
652 }; 652 };
653 653
654 &tcphy1 { 654 &tcphy1 {
655 status = "okay"; 655 status = "okay";
656 }; 656 };
657 657
658 &tsadc { 658 &tsadc {
659 /* tshut mode 0:CRU 1:GPIO */ 659 /* tshut mode 0:CRU 1:GPIO */
660 rockchip,hw-tshut-mode = <1>; 660 rockchip,hw-tshut-mode = <1>;
661 /* tshut polarity 0:LOW 1:HIGH */ 661 /* tshut polarity 0:LOW 1:HIGH */
662 rockchip,hw-tshut-polarity = <1>; 662 rockchip,hw-tshut-polarity = <1>;
663 status = "okay"; 663 status = "okay";
664 }; 664 };
665 665
666 &u2phy0 { 666 &u2phy0 {
667 status = "okay"; 667 status = "okay";
668 }; 668 };
669 669
670 &u2phy0_host { 670 &u2phy0_host {
671 status = "okay"; 671 status = "okay";
672 }; 672 };
673 673
674 &u2phy0_otg { 674 &u2phy0_otg {
675 status = "okay"; 675 status = "okay";
676 }; 676 };
677 677
678 &u2phy1 { 678 &u2phy1 {
679 status = "okay"; 679 status = "okay";
680 }; 680 };
681 681
682 &u2phy1_host { 682 &u2phy1_host {
683 status = "okay"; 683 status = "okay";
684 }; 684 };
685 685
686 &u2phy1_otg { 686 &u2phy1_otg {
687 status = "okay"; 687 status = "okay";
688 }; 688 };
689 689
690 &uart0 { 690 &uart0 {
691 pinctrl-names = "default"; 691 pinctrl-names = "default";
692 pinctrl-0 = <&uart0_xfer &uart0_rts &u 692 pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
693 status = "okay"; 693 status = "okay";
694 694
695 bluetooth { 695 bluetooth {
696 compatible = "brcm,bcm43438-bt 696 compatible = "brcm,bcm43438-bt";
697 clocks = <&rk808 1>; 697 clocks = <&rk808 1>;
698 clock-names = "lpo"; 698 clock-names = "lpo";
699 device-wakeup-gpios = <&gpio2 699 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
700 host-wakeup-gpios = <&gpio0 RK 700 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
701 shutdown-gpios = <&gpio0 RK_PB 701 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
702 max-speed = <4000000>; 702 max-speed = <4000000>;
703 pinctrl-names = "default"; 703 pinctrl-names = "default";
704 pinctrl-0 = <&bt_reg_on_h &bt_ 704 pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
705 vbat-supply = <&vcc3v3_sys>; 705 vbat-supply = <&vcc3v3_sys>;
706 vddio-supply = <&vcc_1v8>; 706 vddio-supply = <&vcc_1v8>;
707 }; 707 };
708 }; 708 };
709 709
710 &uart2 { 710 &uart2 {
711 status = "okay"; 711 status = "okay";
712 }; 712 };
713 713
714 &usbdrd3_0 { 714 &usbdrd3_0 {
715 status = "okay"; 715 status = "okay";
716 }; 716 };
717 717
718 &usbdrd3_1 { 718 &usbdrd3_1 {
719 status = "okay"; 719 status = "okay";
720 }; 720 };
721 721
722 &usbdrd_dwc3_0 { 722 &usbdrd_dwc3_0 {
723 status = "okay"; 723 status = "okay";
724 }; 724 };
725 725
726 &usbdrd_dwc3_1 { 726 &usbdrd_dwc3_1 {
727 dr_mode = "host"; 727 dr_mode = "host";
728 status = "okay"; 728 status = "okay";
729 }; 729 };
730 730
731 &usb_host0_ehci { 731 &usb_host0_ehci {
732 status = "okay"; 732 status = "okay";
733 }; 733 };
734 734
735 &usb_host0_ohci { 735 &usb_host0_ohci {
736 status = "okay"; 736 status = "okay";
737 }; 737 };
738 738
739 &usb_host1_ehci { 739 &usb_host1_ehci {
740 status = "okay"; 740 status = "okay";
741 }; 741 };
742 742
743 &usb_host1_ohci { 743 &usb_host1_ohci {
744 status = "okay"; 744 status = "okay";
745 }; 745 };
746 746
747 &vopb { 747 &vopb {
748 status = "okay"; 748 status = "okay";
749 }; 749 };
750 750
751 &vopb_mmu { 751 &vopb_mmu {
752 status = "okay"; 752 status = "okay";
753 }; 753 };
754 754
755 &vopl { 755 &vopl {
756 status = "okay"; 756 status = "okay";
757 }; 757 };
758 758
759 &vopl_mmu { 759 &vopl_mmu {
760 status = "okay"; 760 status = "okay";
761 }; 761 };
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