1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * RK3399-based FriendlyElec boards device tre 3 * RK3399-based FriendlyElec boards device tree source
4 * 4 *
5 * Copyright (c) 2016 Fuzhou Rockchip Electron 5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
6 * 6 *
7 * Copyright (c) 2018 FriendlyElec Computer Te 7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
8 * (http://www.friendlyarm.com) 8 * (http://www.friendlyarm.com)
9 * 9 *
10 * Copyright (c) 2018 Collabora Ltd. 10 * Copyright (c) 2018 Collabora Ltd.
11 * Copyright (c) 2019 Arm Ltd. 11 * Copyright (c) 2019 Arm Ltd.
12 */ 12 */
13 13
14 /dts-v1/; 14 /dts-v1/;
15 #include <dt-bindings/input/linux-event-codes. 15 #include <dt-bindings/input/linux-event-codes.h>
16 #include "rk3399.dtsi" 16 #include "rk3399.dtsi"
>> 17 #include "rk3399-opp.dtsi"
17 18
18 / { 19 / {
19 aliases { 20 aliases {
20 ethernet0 = &gmac; 21 ethernet0 = &gmac;
21 mmc0 = &sdio0; 22 mmc0 = &sdio0;
22 mmc1 = &sdmmc; 23 mmc1 = &sdmmc;
23 mmc2 = &sdhci; 24 mmc2 = &sdhci;
24 }; 25 };
25 26
26 chosen { 27 chosen {
27 stdout-path = "serial2:1500000 28 stdout-path = "serial2:1500000n8";
28 }; 29 };
29 30
30 clkin_gmac: external-gmac-clock { 31 clkin_gmac: external-gmac-clock {
31 compatible = "fixed-clock"; 32 compatible = "fixed-clock";
32 clock-frequency = <125000000>; 33 clock-frequency = <125000000>;
33 clock-output-names = "clkin_gm 34 clock-output-names = "clkin_gmac";
34 #clock-cells = <0>; 35 #clock-cells = <0>;
35 }; 36 };
36 37
37 vcc3v3_sys: vcc3v3-sys { 38 vcc3v3_sys: vcc3v3-sys {
38 compatible = "regulator-fixed" 39 compatible = "regulator-fixed";
39 regulator-always-on; 40 regulator-always-on;
40 regulator-boot-on; 41 regulator-boot-on;
41 regulator-min-microvolt = <330 42 regulator-min-microvolt = <3300000>;
42 regulator-max-microvolt = <330 43 regulator-max-microvolt = <3300000>;
43 regulator-name = "vcc3v3_sys"; 44 regulator-name = "vcc3v3_sys";
44 }; 45 };
45 46
46 vcc5v0_sys: vcc5v0-sys { 47 vcc5v0_sys: vcc5v0-sys {
47 compatible = "regulator-fixed" 48 compatible = "regulator-fixed";
48 regulator-always-on; 49 regulator-always-on;
49 regulator-boot-on; 50 regulator-boot-on;
50 regulator-min-microvolt = <500 51 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <500 52 regulator-max-microvolt = <5000000>;
52 regulator-name = "vcc5v0_sys"; 53 regulator-name = "vcc5v0_sys";
53 vin-supply = <&vdd_5v>; 54 vin-supply = <&vdd_5v>;
54 }; 55 };
55 56
56 /* switched by pmic_sleep */ 57 /* switched by pmic_sleep */
57 vcc1v8_s3: vcc1v8-s3 { 58 vcc1v8_s3: vcc1v8-s3 {
58 compatible = "regulator-fixed" 59 compatible = "regulator-fixed";
59 regulator-always-on; 60 regulator-always-on;
60 regulator-boot-on; 61 regulator-boot-on;
61 regulator-min-microvolt = <180 62 regulator-min-microvolt = <1800000>;
62 regulator-max-microvolt = <180 63 regulator-max-microvolt = <1800000>;
63 regulator-name = "vcc1v8_s3"; 64 regulator-name = "vcc1v8_s3";
64 vin-supply = <&vcc_1v8>; 65 vin-supply = <&vcc_1v8>;
65 }; 66 };
66 67
67 vcc3v0_sd: vcc3v0-sd { 68 vcc3v0_sd: vcc3v0-sd {
68 compatible = "regulator-fixed" 69 compatible = "regulator-fixed";
69 enable-active-high; 70 enable-active-high;
70 gpio = <&gpio0 RK_PA1 GPIO_ACT 71 gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
71 pinctrl-names = "default"; 72 pinctrl-names = "default";
72 pinctrl-0 = <&sdmmc0_pwr_h>; 73 pinctrl-0 = <&sdmmc0_pwr_h>;
73 regulator-always-on; 74 regulator-always-on;
74 regulator-min-microvolt = <300 75 regulator-min-microvolt = <3000000>;
75 regulator-max-microvolt = <300 76 regulator-max-microvolt = <3000000>;
76 regulator-name = "vcc3v0_sd"; 77 regulator-name = "vcc3v0_sd";
77 vin-supply = <&vcc3v3_sys>; 78 vin-supply = <&vcc3v3_sys>;
78 }; 79 };
79 80
80 /* 81 /*
81 * Really, this is supplied by vcc_1v8 82 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
82 * drives the enable pin, but we can't 83 * drives the enable pin, but we can't quite model that.
83 */ 84 */
84 vcca0v9_s3: vcca0v9-s3 { 85 vcca0v9_s3: vcca0v9-s3 {
85 compatible = "regulator-fixed" 86 compatible = "regulator-fixed";
86 regulator-min-microvolt = <900 87 regulator-min-microvolt = <900000>;
87 regulator-max-microvolt = <900 88 regulator-max-microvolt = <900000>;
88 regulator-name = "vcca0v9_s3"; 89 regulator-name = "vcca0v9_s3";
89 vin-supply = <&vcc1v8_s3>; 90 vin-supply = <&vcc1v8_s3>;
90 }; 91 };
91 92
92 /* As above, actually supplied by vcc3 93 /* As above, actually supplied by vcc3v3_sys */
93 vcca1v8_s3: vcca1v8-s3 { 94 vcca1v8_s3: vcca1v8-s3 {
94 compatible = "regulator-fixed" 95 compatible = "regulator-fixed";
95 regulator-min-microvolt = <180 96 regulator-min-microvolt = <1800000>;
96 regulator-max-microvolt = <180 97 regulator-max-microvolt = <1800000>;
97 regulator-name = "vcca1v8_s3"; 98 regulator-name = "vcca1v8_s3";
98 vin-supply = <&vcc1v8_s3>; 99 vin-supply = <&vcc1v8_s3>;
99 }; 100 };
100 101
101 vbus_typec: vbus-typec { 102 vbus_typec: vbus-typec {
102 compatible = "regulator-fixed" 103 compatible = "regulator-fixed";
103 regulator-min-microvolt = <500 104 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <500 105 regulator-max-microvolt = <5000000>;
105 regulator-name = "vbus_typec"; 106 regulator-name = "vbus_typec";
106 }; 107 };
107 108
108 gpio-keys { 109 gpio-keys {
109 compatible = "gpio-keys"; 110 compatible = "gpio-keys";
110 autorepeat; 111 autorepeat;
111 pinctrl-names = "default"; 112 pinctrl-names = "default";
112 pinctrl-0 = <&power_key>; 113 pinctrl-0 = <&power_key>;
113 114
114 key-power { 115 key-power {
115 debounce-interval = <1 116 debounce-interval = <100>;
116 gpios = <&gpio0 RK_PA5 117 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
117 label = "GPIO Key Powe 118 label = "GPIO Key Power";
118 linux,code = <KEY_POWE 119 linux,code = <KEY_POWER>;
119 wakeup-source; 120 wakeup-source;
120 }; 121 };
121 }; 122 };
122 123
123 leds: gpio-leds { 124 leds: gpio-leds {
124 compatible = "gpio-leds"; 125 compatible = "gpio-leds";
125 pinctrl-names = "default"; 126 pinctrl-names = "default";
126 pinctrl-0 = <&status_led_pin>; 127 pinctrl-0 = <&status_led_pin>;
127 128
128 status_led: led-0 { 129 status_led: led-0 {
129 gpios = <&gpio0 RK_PB5 130 gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
130 label = "status_led"; 131 label = "status_led";
131 linux,default-trigger 132 linux,default-trigger = "heartbeat";
132 }; 133 };
133 }; 134 };
134 135
135 sdio_pwrseq: sdio-pwrseq { 136 sdio_pwrseq: sdio-pwrseq {
136 compatible = "mmc-pwrseq-simpl 137 compatible = "mmc-pwrseq-simple";
137 clocks = <&rk808 1>; 138 clocks = <&rk808 1>;
138 clock-names = "ext_clock"; 139 clock-names = "ext_clock";
139 pinctrl-names = "default"; 140 pinctrl-names = "default";
140 pinctrl-0 = <&wifi_reg_on_h>; 141 pinctrl-0 = <&wifi_reg_on_h>;
141 reset-gpios = <&gpio0 RK_PB2 G 142 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
142 }; 143 };
143 }; 144 };
144 145
145 &cpu_b0 { 146 &cpu_b0 {
146 cpu-supply = <&vdd_cpu_b>; 147 cpu-supply = <&vdd_cpu_b>;
147 }; 148 };
148 149
149 &cpu_b1 { 150 &cpu_b1 {
150 cpu-supply = <&vdd_cpu_b>; 151 cpu-supply = <&vdd_cpu_b>;
151 }; 152 };
152 153
153 &cpu_l0 { 154 &cpu_l0 {
154 cpu-supply = <&vdd_cpu_l>; 155 cpu-supply = <&vdd_cpu_l>;
155 }; 156 };
156 157
157 &cpu_l1 { 158 &cpu_l1 {
158 cpu-supply = <&vdd_cpu_l>; 159 cpu-supply = <&vdd_cpu_l>;
159 }; 160 };
160 161
161 &cpu_l2 { 162 &cpu_l2 {
162 cpu-supply = <&vdd_cpu_l>; 163 cpu-supply = <&vdd_cpu_l>;
163 }; 164 };
164 165
165 &cpu_l3 { 166 &cpu_l3 {
166 cpu-supply = <&vdd_cpu_l>; 167 cpu-supply = <&vdd_cpu_l>;
167 }; 168 };
168 169
169 &emmc_phy { 170 &emmc_phy {
170 rockchip,enable-strobe-pulldown; 171 rockchip,enable-strobe-pulldown;
171 status = "okay"; 172 status = "okay";
172 }; 173 };
173 174
174 &gmac { 175 &gmac {
175 assigned-clock-parents = <&clkin_gmac> 176 assigned-clock-parents = <&clkin_gmac>;
176 assigned-clocks = <&cru SCLK_RMII_SRC> 177 assigned-clocks = <&cru SCLK_RMII_SRC>;
177 clock_in_out = "input"; 178 clock_in_out = "input";
178 pinctrl-names = "default"; 179 pinctrl-names = "default";
179 pinctrl-0 = <&rgmii_pins>, <&phy_intb> 180 pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
180 phy-handle = <&rtl8211e>; 181 phy-handle = <&rtl8211e>;
181 phy-mode = "rgmii"; 182 phy-mode = "rgmii";
182 phy-supply = <&vcc3v3_s3>; 183 phy-supply = <&vcc3v3_s3>;
183 tx_delay = <0x28>; 184 tx_delay = <0x28>;
184 rx_delay = <0x11>; 185 rx_delay = <0x11>;
185 status = "okay"; 186 status = "okay";
186 187
187 mdio { 188 mdio {
188 compatible = "snps,dwmac-mdio" 189 compatible = "snps,dwmac-mdio";
189 #address-cells = <1>; 190 #address-cells = <1>;
190 #size-cells = <0>; 191 #size-cells = <0>;
191 192
192 rtl8211e: ethernet-phy@1 { 193 rtl8211e: ethernet-phy@1 {
193 reg = <1>; 194 reg = <1>;
194 interrupt-parent = <&g 195 interrupt-parent = <&gpio3>;
195 interrupts = <RK_PB2 I 196 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
196 reset-assert-us = <100 197 reset-assert-us = <10000>;
197 reset-deassert-us = <3 198 reset-deassert-us = <30000>;
198 reset-gpios = <&gpio3 199 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
199 }; 200 };
200 }; 201 };
201 }; 202 };
202 203
203 &gpu { 204 &gpu {
204 mali-supply = <&vdd_gpu>; 205 mali-supply = <&vdd_gpu>;
205 status = "okay"; 206 status = "okay";
206 }; 207 };
207 208
208 &hdmi { 209 &hdmi {
209 ddc-i2c-bus = <&i2c7>; 210 ddc-i2c-bus = <&i2c7>;
210 pinctrl-names = "default"; 211 pinctrl-names = "default";
211 pinctrl-0 = <&hdmi_cec>; 212 pinctrl-0 = <&hdmi_cec>;
212 status = "okay"; 213 status = "okay";
213 }; 214 };
214 215
215 &hdmi_sound { 216 &hdmi_sound {
216 status = "okay"; 217 status = "okay";
217 }; 218 };
218 219
219 &i2c0 { 220 &i2c0 {
220 clock-frequency = <400000>; 221 clock-frequency = <400000>;
221 i2c-scl-rising-time-ns = <160>; 222 i2c-scl-rising-time-ns = <160>;
222 i2c-scl-falling-time-ns = <30>; 223 i2c-scl-falling-time-ns = <30>;
223 status = "okay"; 224 status = "okay";
224 225
225 vdd_cpu_b: regulator@40 { 226 vdd_cpu_b: regulator@40 {
226 compatible = "silergy,syr827"; 227 compatible = "silergy,syr827";
227 reg = <0x40>; 228 reg = <0x40>;
228 fcs,suspend-voltage-selector = 229 fcs,suspend-voltage-selector = <1>;
229 pinctrl-names = "default"; 230 pinctrl-names = "default";
230 pinctrl-0 = <&cpu_b_sleep>; 231 pinctrl-0 = <&cpu_b_sleep>;
231 regulator-always-on; 232 regulator-always-on;
232 regulator-boot-on; 233 regulator-boot-on;
233 regulator-min-microvolt = <712 234 regulator-min-microvolt = <712500>;
234 regulator-max-microvolt = <150 235 regulator-max-microvolt = <1500000>;
235 regulator-name = "vdd_cpu_b"; 236 regulator-name = "vdd_cpu_b";
236 regulator-ramp-delay = <1000>; 237 regulator-ramp-delay = <1000>;
237 vin-supply = <&vcc3v3_sys>; 238 vin-supply = <&vcc3v3_sys>;
238 239
239 regulator-state-mem { 240 regulator-state-mem {
240 regulator-off-in-suspe 241 regulator-off-in-suspend;
241 }; 242 };
242 }; 243 };
243 244
244 vdd_gpu: regulator@41 { 245 vdd_gpu: regulator@41 {
245 compatible = "silergy,syr828"; 246 compatible = "silergy,syr828";
246 reg = <0x41>; 247 reg = <0x41>;
247 fcs,suspend-voltage-selector = 248 fcs,suspend-voltage-selector = <1>;
248 pinctrl-names = "default"; 249 pinctrl-names = "default";
249 pinctrl-0 = <&gpu_sleep>; 250 pinctrl-0 = <&gpu_sleep>;
250 regulator-always-on; 251 regulator-always-on;
251 regulator-boot-on; 252 regulator-boot-on;
252 regulator-min-microvolt = <712 253 regulator-min-microvolt = <712500>;
253 regulator-max-microvolt = <150 254 regulator-max-microvolt = <1500000>;
254 regulator-name = "vdd_gpu"; 255 regulator-name = "vdd_gpu";
255 regulator-ramp-delay = <1000>; 256 regulator-ramp-delay = <1000>;
256 vin-supply = <&vcc3v3_sys>; 257 vin-supply = <&vcc3v3_sys>;
257 258
258 regulator-state-mem { 259 regulator-state-mem {
259 regulator-off-in-suspe 260 regulator-off-in-suspend;
260 }; 261 };
261 }; 262 };
262 263
263 rk808: pmic@1b { 264 rk808: pmic@1b {
264 compatible = "rockchip,rk808"; 265 compatible = "rockchip,rk808";
265 reg = <0x1b>; 266 reg = <0x1b>;
266 clock-output-names = "xin32k", 267 clock-output-names = "xin32k", "rtc_clko_wifi";
267 #clock-cells = <1>; 268 #clock-cells = <1>;
268 interrupt-parent = <&gpio1>; 269 interrupt-parent = <&gpio1>;
269 interrupts = <21 IRQ_TYPE_LEVE 270 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
270 pinctrl-names = "default"; 271 pinctrl-names = "default";
271 pinctrl-0 = <&pmic_int_l>, <&a 272 pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>;
272 rockchip,system-power-controll 273 rockchip,system-power-controller;
273 wakeup-source; 274 wakeup-source;
274 275
275 vcc1-supply = <&vcc3v3_sys>; 276 vcc1-supply = <&vcc3v3_sys>;
276 vcc2-supply = <&vcc3v3_sys>; 277 vcc2-supply = <&vcc3v3_sys>;
277 vcc3-supply = <&vcc3v3_sys>; 278 vcc3-supply = <&vcc3v3_sys>;
278 vcc4-supply = <&vcc3v3_sys>; 279 vcc4-supply = <&vcc3v3_sys>;
279 vcc6-supply = <&vcc3v3_sys>; 280 vcc6-supply = <&vcc3v3_sys>;
280 vcc7-supply = <&vcc3v3_sys>; 281 vcc7-supply = <&vcc3v3_sys>;
281 vcc8-supply = <&vcc3v3_sys>; 282 vcc8-supply = <&vcc3v3_sys>;
282 vcc9-supply = <&vcc3v3_sys>; 283 vcc9-supply = <&vcc3v3_sys>;
283 vcc10-supply = <&vcc3v3_sys>; 284 vcc10-supply = <&vcc3v3_sys>;
284 vcc11-supply = <&vcc3v3_sys>; 285 vcc11-supply = <&vcc3v3_sys>;
285 vcc12-supply = <&vcc3v3_sys>; 286 vcc12-supply = <&vcc3v3_sys>;
286 vddio-supply = <&vcc_3v0>; 287 vddio-supply = <&vcc_3v0>;
287 288
288 regulators { 289 regulators {
289 vdd_center: DCDC_REG1 290 vdd_center: DCDC_REG1 {
290 regulator-alwa 291 regulator-always-on;
291 regulator-boot 292 regulator-boot-on;
292 regulator-min- 293 regulator-min-microvolt = <750000>;
293 regulator-max- 294 regulator-max-microvolt = <1350000>;
294 regulator-name 295 regulator-name = "vdd_center";
295 regulator-ramp 296 regulator-ramp-delay = <6001>;
296 297
297 regulator-stat 298 regulator-state-mem {
298 regula 299 regulator-off-in-suspend;
299 }; 300 };
300 }; 301 };
301 302
302 vdd_cpu_l: DCDC_REG2 { 303 vdd_cpu_l: DCDC_REG2 {
303 regulator-alwa 304 regulator-always-on;
304 regulator-boot 305 regulator-boot-on;
305 regulator-min- 306 regulator-min-microvolt = <750000>;
306 regulator-max- 307 regulator-max-microvolt = <1350000>;
307 regulator-name 308 regulator-name = "vdd_cpu_l";
308 regulator-ramp 309 regulator-ramp-delay = <6001>;
309 310
310 regulator-stat 311 regulator-state-mem {
311 regula 312 regulator-off-in-suspend;
312 }; 313 };
313 }; 314 };
314 315
315 vcc_ddr: DCDC_REG3 { 316 vcc_ddr: DCDC_REG3 {
316 regulator-alwa 317 regulator-always-on;
317 regulator-boot 318 regulator-boot-on;
318 regulator-name 319 regulator-name = "vcc_ddr";
319 320
320 regulator-stat 321 regulator-state-mem {
321 regula 322 regulator-on-in-suspend;
322 }; 323 };
323 }; 324 };
324 325
325 vcc_1v8: DCDC_REG4 { 326 vcc_1v8: DCDC_REG4 {
326 regulator-alwa 327 regulator-always-on;
327 regulator-boot 328 regulator-boot-on;
328 regulator-min- 329 regulator-min-microvolt = <1800000>;
329 regulator-max- 330 regulator-max-microvolt = <1800000>;
330 regulator-name 331 regulator-name = "vcc_1v8";
331 332
332 regulator-stat 333 regulator-state-mem {
333 regula 334 regulator-on-in-suspend;
334 regula 335 regulator-suspend-microvolt = <1800000>;
335 }; 336 };
336 }; 337 };
337 338
338 vcc1v8_cam: LDO_REG1 { 339 vcc1v8_cam: LDO_REG1 {
339 regulator-alwa 340 regulator-always-on;
340 regulator-boot 341 regulator-boot-on;
341 regulator-min- 342 regulator-min-microvolt = <1800000>;
342 regulator-max- 343 regulator-max-microvolt = <1800000>;
343 regulator-name 344 regulator-name = "vcc1v8_cam";
344 345
345 regulator-stat 346 regulator-state-mem {
346 regula 347 regulator-off-in-suspend;
347 }; 348 };
348 }; 349 };
349 350
350 vcc3v0_touch: LDO_REG2 351 vcc3v0_touch: LDO_REG2 {
351 regulator-alwa 352 regulator-always-on;
352 regulator-boot 353 regulator-boot-on;
353 regulator-min- 354 regulator-min-microvolt = <3000000>;
354 regulator-max- 355 regulator-max-microvolt = <3000000>;
355 regulator-name 356 regulator-name = "vcc3v0_touch";
356 357
357 regulator-stat 358 regulator-state-mem {
358 regula 359 regulator-off-in-suspend;
359 }; 360 };
360 }; 361 };
361 362
362 vcc1v8_pmupll: LDO_REG 363 vcc1v8_pmupll: LDO_REG3 {
363 regulator-alwa 364 regulator-always-on;
364 regulator-boot 365 regulator-boot-on;
365 regulator-min- 366 regulator-min-microvolt = <1800000>;
366 regulator-max- 367 regulator-max-microvolt = <1800000>;
367 regulator-name 368 regulator-name = "vcc1v8_pmupll";
368 369
369 regulator-stat 370 regulator-state-mem {
370 regula 371 regulator-on-in-suspend;
371 regula 372 regulator-suspend-microvolt = <1800000>;
372 }; 373 };
373 }; 374 };
374 375
375 vcc_sdio: LDO_REG4 { 376 vcc_sdio: LDO_REG4 {
376 regulator-alwa 377 regulator-always-on;
377 regulator-boot 378 regulator-boot-on;
378 regulator-min- 379 regulator-min-microvolt = <1800000>;
379 regulator-max- 380 regulator-max-microvolt = <3300000>;
380 regulator-name 381 regulator-name = "vcc_sdio";
381 382
382 regulator-stat 383 regulator-state-mem {
383 regula 384 regulator-on-in-suspend;
384 regula 385 regulator-suspend-microvolt = <3000000>;
385 }; 386 };
386 }; 387 };
387 388
388 vcca3v0_codec: LDO_REG 389 vcca3v0_codec: LDO_REG5 {
389 regulator-alwa 390 regulator-always-on;
390 regulator-boot 391 regulator-boot-on;
391 regulator-min- 392 regulator-min-microvolt = <3000000>;
392 regulator-max- 393 regulator-max-microvolt = <3000000>;
393 regulator-name 394 regulator-name = "vcca3v0_codec";
394 395
395 regulator-stat 396 regulator-state-mem {
396 regula 397 regulator-off-in-suspend;
397 }; 398 };
398 }; 399 };
399 400
400 vcc_1v5: LDO_REG6 { 401 vcc_1v5: LDO_REG6 {
401 regulator-alwa 402 regulator-always-on;
402 regulator-boot 403 regulator-boot-on;
403 regulator-min- 404 regulator-min-microvolt = <1500000>;
404 regulator-max- 405 regulator-max-microvolt = <1500000>;
405 regulator-name 406 regulator-name = "vcc_1v5";
406 407
407 regulator-stat 408 regulator-state-mem {
408 regula 409 regulator-on-in-suspend;
409 regula 410 regulator-suspend-microvolt = <1500000>;
410 }; 411 };
411 }; 412 };
412 413
413 vcca1v8_codec: LDO_REG 414 vcca1v8_codec: LDO_REG7 {
414 regulator-alwa 415 regulator-always-on;
415 regulator-boot 416 regulator-boot-on;
416 regulator-min- 417 regulator-min-microvolt = <1800000>;
417 regulator-max- 418 regulator-max-microvolt = <1800000>;
418 regulator-name 419 regulator-name = "vcca1v8_codec";
419 420
420 regulator-stat 421 regulator-state-mem {
421 regula 422 regulator-off-in-suspend;
422 }; 423 };
423 }; 424 };
424 425
425 vcc_3v0: LDO_REG8 { 426 vcc_3v0: LDO_REG8 {
426 regulator-alwa 427 regulator-always-on;
427 regulator-boot 428 regulator-boot-on;
428 regulator-min- 429 regulator-min-microvolt = <3000000>;
429 regulator-max- 430 regulator-max-microvolt = <3000000>;
430 regulator-name 431 regulator-name = "vcc_3v0";
431 432
432 regulator-stat 433 regulator-state-mem {
433 regula 434 regulator-on-in-suspend;
434 regula 435 regulator-suspend-microvolt = <3000000>;
435 }; 436 };
436 }; 437 };
437 438
438 vcc3v3_s3: SWITCH_REG1 439 vcc3v3_s3: SWITCH_REG1 {
439 regulator-alwa 440 regulator-always-on;
440 regulator-boot 441 regulator-boot-on;
441 regulator-name 442 regulator-name = "vcc3v3_s3";
442 443
443 regulator-stat 444 regulator-state-mem {
444 regula 445 regulator-off-in-suspend;
445 }; 446 };
446 }; 447 };
447 448
448 vcc3v3_s0: SWITCH_REG2 449 vcc3v3_s0: SWITCH_REG2 {
449 regulator-alwa 450 regulator-always-on;
450 regulator-boot 451 regulator-boot-on;
451 regulator-name 452 regulator-name = "vcc3v3_s0";
452 453
453 regulator-stat 454 regulator-state-mem {
454 regula 455 regulator-off-in-suspend;
455 }; 456 };
456 }; 457 };
457 }; 458 };
458 }; 459 };
459 }; 460 };
460 461
461 &i2c1 { 462 &i2c1 {
462 clock-frequency = <200000>; 463 clock-frequency = <200000>;
463 i2c-scl-rising-time-ns = <150>; 464 i2c-scl-rising-time-ns = <150>;
464 i2c-scl-falling-time-ns = <30>; 465 i2c-scl-falling-time-ns = <30>;
465 status = "okay"; 466 status = "okay";
466 }; 467 };
467 468
468 &i2c2 { 469 &i2c2 {
469 status = "okay"; 470 status = "okay";
470 }; 471 };
471 472
472 &i2c4 { 473 &i2c4 {
473 clock-frequency = <400000>; 474 clock-frequency = <400000>;
474 i2c-scl-rising-time-ns = <160>; 475 i2c-scl-rising-time-ns = <160>;
475 i2c-scl-falling-time-ns = <30>; 476 i2c-scl-falling-time-ns = <30>;
476 status = "okay"; 477 status = "okay";
477 478
478 fusb0: typec-portc@22 { 479 fusb0: typec-portc@22 {
479 compatible = "fcs,fusb302"; 480 compatible = "fcs,fusb302";
480 reg = <0x22>; 481 reg = <0x22>;
481 interrupt-parent = <&gpio1>; 482 interrupt-parent = <&gpio1>;
482 interrupts = <RK_PA2 IRQ_TYPE_ 483 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
483 pinctrl-names = "default"; 484 pinctrl-names = "default";
484 pinctrl-0 = <&fusb0_int>; 485 pinctrl-0 = <&fusb0_int>;
485 vbus-supply = <&vbus_typec>; 486 vbus-supply = <&vbus_typec>;
486 }; 487 };
487 }; 488 };
488 489
489 &i2c7 { 490 &i2c7 {
490 status = "okay"; 491 status = "okay";
491 }; 492 };
492 493
493 &i2s2 { 494 &i2s2 {
494 status = "okay"; 495 status = "okay";
495 }; 496 };
496 497
497 &io_domains { 498 &io_domains {
498 bt656-supply = <&vcc_1v8>; 499 bt656-supply = <&vcc_1v8>;
499 audio-supply = <&vcca1v8_codec>; 500 audio-supply = <&vcca1v8_codec>;
500 sdmmc-supply = <&vcc_sdio>; 501 sdmmc-supply = <&vcc_sdio>;
501 gpio1830-supply = <&vcc_3v0>; 502 gpio1830-supply = <&vcc_3v0>;
502 status = "okay"; 503 status = "okay";
503 }; 504 };
504 505
505 &pcie_phy { 506 &pcie_phy {
506 assigned-clock-parents = <&cru SCLK_PC 507 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
507 assigned-clock-rates = <100000000>; 508 assigned-clock-rates = <100000000>;
508 assigned-clocks = <&cru SCLK_PCIEPHY_R 509 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
509 status = "okay"; 510 status = "okay";
510 }; 511 };
511 512
512 &pcie0 { 513 &pcie0 {
513 num-lanes = <2>; 514 num-lanes = <2>;
514 vpcie0v9-supply = <&vcca0v9_s3>; 515 vpcie0v9-supply = <&vcca0v9_s3>;
515 vpcie1v8-supply = <&vcca1v8_s3>; 516 vpcie1v8-supply = <&vcca1v8_s3>;
516 status = "okay"; 517 status = "okay";
517 }; 518 };
518 519
519 &pinctrl { 520 &pinctrl {
520 fusb30x { 521 fusb30x {
521 fusb0_int: fusb0-int { 522 fusb0_int: fusb0-int {
522 rockchip,pins = <1 RK_ 523 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
523 }; 524 };
524 }; 525 };
525 526
526 gpio-leds { 527 gpio-leds {
527 status_led_pin: status-led-pin 528 status_led_pin: status-led-pin {
528 rockchip,pins = <0 RK_ 529 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
529 }; 530 };
530 }; 531 };
531 532
532 gmac { 533 gmac {
533 phy_intb: phy-intb { 534 phy_intb: phy-intb {
534 rockchip,pins = <3 RK_ 535 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
535 }; 536 };
536 537
537 phy_rstb: phy-rstb { 538 phy_rstb: phy-rstb {
538 rockchip,pins = <3 RK_ 539 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
539 }; 540 };
540 }; 541 };
541 542
542 pmic { 543 pmic {
543 cpu_b_sleep: cpu-b-sleep { 544 cpu_b_sleep: cpu-b-sleep {
544 rockchip,pins = <1 RK_ 545 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
545 }; 546 };
546 547
547 gpu_sleep: gpu-sleep { 548 gpu_sleep: gpu-sleep {
548 rockchip,pins = <1 RK_ 549 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
549 }; 550 };
550 551
551 pmic_int_l: pmic-int-l { 552 pmic_int_l: pmic-int-l {
552 rockchip,pins = <1 RK_ 553 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
553 }; 554 };
554 }; 555 };
555 556
556 rockchip-key { 557 rockchip-key {
557 power_key: power-key { 558 power_key: power-key {
558 rockchip,pins = <0 RK_ 559 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
559 }; 560 };
560 }; 561 };
561 562
562 sdio { 563 sdio {
563 bt_host_wake_l: bt-host-wake-l 564 bt_host_wake_l: bt-host-wake-l {
564 rockchip,pins = <0 RK_ 565 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
565 }; 566 };
566 567
567 bt_reg_on_h: bt-reg-on-h { 568 bt_reg_on_h: bt-reg-on-h {
568 /* external pullup to 569 /* external pullup to VCC1V8_PMUPLL */
569 rockchip,pins = <0 RK_ 570 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
570 }; 571 };
571 572
572 bt_wake_l: bt-wake-l { 573 bt_wake_l: bt-wake-l {
573 rockchip,pins = <2 RK_ 574 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
574 }; 575 };
575 576
576 wifi_reg_on_h: wifi-reg_on-h { 577 wifi_reg_on_h: wifi-reg_on-h {
577 rockchip,pins = <0 RK_ 578 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
578 }; 579 };
579 }; 580 };
580 581
581 sdmmc { 582 sdmmc {
582 sdmmc0_det_l: sdmmc0-det-l { 583 sdmmc0_det_l: sdmmc0-det-l {
583 rockchip,pins = <0 RK_ 584 rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
584 }; 585 };
585 586
586 sdmmc0_pwr_h: sdmmc0-pwr-h { 587 sdmmc0_pwr_h: sdmmc0-pwr-h {
587 rockchip,pins = <0 RK_ 588 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
588 }; 589 };
589 }; 590 };
590 }; 591 };
591 592
592 &pmu_io_domains { 593 &pmu_io_domains {
593 pmu1830-supply = <&vcc_3v0>; 594 pmu1830-supply = <&vcc_3v0>;
594 status = "okay"; 595 status = "okay";
595 }; 596 };
596 597
597 &pwm0 { 598 &pwm0 {
598 status = "okay"; 599 status = "okay";
599 }; 600 };
600 601
601 &pwm1 { 602 &pwm1 {
602 status = "okay"; 603 status = "okay";
603 }; 604 };
604 605
605 &pwm2 { 606 &pwm2 {
606 pinctrl-names = "active"; 607 pinctrl-names = "active";
607 pinctrl-0 = <&pwm2_pin_pull_down>; 608 pinctrl-0 = <&pwm2_pin_pull_down>;
608 status = "okay"; 609 status = "okay";
609 }; 610 };
610 611
611 &saradc { 612 &saradc {
612 vref-supply = <&vcca1v8_s3>; 613 vref-supply = <&vcca1v8_s3>;
613 status = "okay"; 614 status = "okay";
614 }; 615 };
615 616
616 &sdhci { 617 &sdhci {
617 bus-width = <8>; 618 bus-width = <8>;
618 mmc-hs200-1_8v; 619 mmc-hs200-1_8v;
619 non-removable; 620 non-removable;
620 status = "okay"; 621 status = "okay";
621 }; 622 };
622 623
623 &sdio0 { 624 &sdio0 {
624 bus-width = <4>; 625 bus-width = <4>;
625 cap-sd-highspeed; 626 cap-sd-highspeed;
626 cap-sdio-irq; 627 cap-sdio-irq;
627 keep-power-in-suspend; 628 keep-power-in-suspend;
628 mmc-pwrseq = <&sdio_pwrseq>; 629 mmc-pwrseq = <&sdio_pwrseq>;
629 non-removable; 630 non-removable;
630 pinctrl-names = "default"; 631 pinctrl-names = "default";
631 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s 632 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
632 sd-uhs-sdr104; 633 sd-uhs-sdr104;
633 status = "okay"; 634 status = "okay";
634 }; 635 };
635 636
636 &sdmmc { 637 &sdmmc {
637 bus-width = <4>; 638 bus-width = <4>;
638 cap-sd-highspeed; 639 cap-sd-highspeed;
639 cap-mmc-highspeed; 640 cap-mmc-highspeed;
640 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_ 641 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
641 disable-wp; 642 disable-wp;
642 pinctrl-names = "default"; 643 pinctrl-names = "default";
643 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &s 644 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
644 sd-uhs-sdr104; 645 sd-uhs-sdr104;
645 vmmc-supply = <&vcc3v0_sd>; 646 vmmc-supply = <&vcc3v0_sd>;
646 vqmmc-supply = <&vcc_sdio>; 647 vqmmc-supply = <&vcc_sdio>;
647 status = "okay"; 648 status = "okay";
648 }; 649 };
649 650
650 &tcphy0 { 651 &tcphy0 {
651 status = "okay"; 652 status = "okay";
652 }; 653 };
653 654
654 &tcphy1 { 655 &tcphy1 {
655 status = "okay"; 656 status = "okay";
656 }; 657 };
657 658
658 &tsadc { 659 &tsadc {
659 /* tshut mode 0:CRU 1:GPIO */ 660 /* tshut mode 0:CRU 1:GPIO */
660 rockchip,hw-tshut-mode = <1>; 661 rockchip,hw-tshut-mode = <1>;
661 /* tshut polarity 0:LOW 1:HIGH */ 662 /* tshut polarity 0:LOW 1:HIGH */
662 rockchip,hw-tshut-polarity = <1>; 663 rockchip,hw-tshut-polarity = <1>;
663 status = "okay"; 664 status = "okay";
664 }; 665 };
665 666
666 &u2phy0 { 667 &u2phy0 {
667 status = "okay"; 668 status = "okay";
668 }; 669 };
669 670
670 &u2phy0_host { 671 &u2phy0_host {
671 status = "okay"; 672 status = "okay";
672 }; 673 };
673 674
674 &u2phy0_otg { 675 &u2phy0_otg {
675 status = "okay"; 676 status = "okay";
676 }; 677 };
677 678
678 &u2phy1 { 679 &u2phy1 {
679 status = "okay"; 680 status = "okay";
680 }; 681 };
681 682
682 &u2phy1_host { 683 &u2phy1_host {
683 status = "okay"; 684 status = "okay";
684 }; 685 };
685 686
686 &u2phy1_otg { 687 &u2phy1_otg {
687 status = "okay"; 688 status = "okay";
688 }; 689 };
689 690
690 &uart0 { 691 &uart0 {
691 pinctrl-names = "default"; 692 pinctrl-names = "default";
692 pinctrl-0 = <&uart0_xfer &uart0_rts &u 693 pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
693 status = "okay"; 694 status = "okay";
694 695
695 bluetooth { 696 bluetooth {
696 compatible = "brcm,bcm43438-bt 697 compatible = "brcm,bcm43438-bt";
697 clocks = <&rk808 1>; 698 clocks = <&rk808 1>;
698 clock-names = "lpo"; 699 clock-names = "lpo";
699 device-wakeup-gpios = <&gpio2 700 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
700 host-wakeup-gpios = <&gpio0 RK 701 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
701 shutdown-gpios = <&gpio0 RK_PB 702 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
702 max-speed = <4000000>; 703 max-speed = <4000000>;
703 pinctrl-names = "default"; 704 pinctrl-names = "default";
704 pinctrl-0 = <&bt_reg_on_h &bt_ 705 pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
705 vbat-supply = <&vcc3v3_sys>; 706 vbat-supply = <&vcc3v3_sys>;
706 vddio-supply = <&vcc_1v8>; 707 vddio-supply = <&vcc_1v8>;
707 }; 708 };
708 }; 709 };
709 710
710 &uart2 { 711 &uart2 {
711 status = "okay"; 712 status = "okay";
712 }; 713 };
713 714
714 &usbdrd3_0 { 715 &usbdrd3_0 {
715 status = "okay"; 716 status = "okay";
716 }; 717 };
717 718
718 &usbdrd3_1 { 719 &usbdrd3_1 {
719 status = "okay"; 720 status = "okay";
720 }; 721 };
721 722
722 &usbdrd_dwc3_0 { 723 &usbdrd_dwc3_0 {
723 status = "okay"; 724 status = "okay";
724 }; 725 };
725 726
726 &usbdrd_dwc3_1 { 727 &usbdrd_dwc3_1 {
727 dr_mode = "host"; 728 dr_mode = "host";
728 status = "okay"; 729 status = "okay";
729 }; 730 };
730 731
731 &usb_host0_ehci { 732 &usb_host0_ehci {
732 status = "okay"; 733 status = "okay";
733 }; 734 };
734 735
735 &usb_host0_ohci { 736 &usb_host0_ohci {
736 status = "okay"; 737 status = "okay";
737 }; 738 };
738 739
739 &usb_host1_ehci { 740 &usb_host1_ehci {
740 status = "okay"; 741 status = "okay";
741 }; 742 };
742 743
743 &usb_host1_ohci { 744 &usb_host1_ohci {
744 status = "okay"; 745 status = "okay";
745 }; 746 };
746 747
747 &vopb { 748 &vopb {
748 status = "okay"; 749 status = "okay";
749 }; 750 };
750 751
751 &vopb_mmu { 752 &vopb_mmu {
752 status = "okay"; 753 status = "okay";
753 }; 754 };
754 755
755 &vopl { 756 &vopl {
756 status = "okay"; 757 status = "okay";
757 }; 758 };
758 759
759 &vopl_mmu { 760 &vopl_mmu {
760 status = "okay"; 761 status = "okay";
761 }; 762 };
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