1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajja
4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_
5 */
6
7 #include <dt-bindings/input/linux-event-codes.
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
10
11 / {
12 aliases {
13 ethernet0 = &gmac;
14 mmc0 = &sdhci;
15 mmc1 = &sdmmc;
16 };
17
18 chosen {
19 stdout-path = "serial2:1500000
20 };
21
22 clkin_gmac: external-gmac-clock {
23 compatible = "fixed-clock";
24 clock-frequency = <125000000>;
25 clock-output-names = "clkin_gm
26 #clock-cells = <0>;
27 };
28
29 leds {
30 compatible = "gpio-leds";
31 pinctrl-names = "default";
32 pinctrl-0 = <&user_led2>;
33
34 /* USER_LED2 */
35 led-0 {
36 function = LED_FUNCTIO
37 color = <LED_COLOR_ID_
38 gpios = <&gpio3 RK_PD5
39 linux,default-trigger
40 };
41 };
42
43 sdio_pwrseq: sdio-pwrseq {
44 compatible = "mmc-pwrseq-simpl
45 clocks = <&rk808 1>;
46 clock-names = "lpo";
47 pinctrl-names = "default";
48 pinctrl-0 = <&wifi_enable_h>;
49 reset-gpios = <&gpio0 RK_PB2 G
50 };
51
52 sound: sound {
53 compatible = "audio-graph-card
54 label = "Analog";
55 dais = <&i2s0_p0>;
56 };
57
58 sound-dit {
59 compatible = "audio-graph-card
60 label = "SPDIF";
61 dais = <&spdif_p0>;
62 };
63
64 spdif-dit {
65 compatible = "linux,spdif-dit"
66 #sound-dai-cells = <0>;
67
68 port {
69 dit_p0_0: endpoint {
70 remote-endpoin
71 };
72 };
73 };
74
75 vbus_typec: vbus-typec-regulator {
76 compatible = "regulator-fixed"
77 enable-active-high;
78 gpio = <&gpio1 RK_PA3 GPIO_ACT
79 pinctrl-names = "default";
80 pinctrl-0 = <&vcc5v0_typec_en>
81 regulator-name = "vbus_typec";
82 regulator-always-on;
83 vin-supply = <&vcc5v0_sys>;
84 };
85
86 vcc12v_dcin: dc-12v {
87 compatible = "regulator-fixed"
88 regulator-name = "vcc12v_dcin"
89 regulator-always-on;
90 regulator-boot-on;
91 regulator-min-microvolt = <120
92 regulator-max-microvolt = <120
93 };
94
95 vcc3v3_lan: vcc3v3-lan-regulator {
96 compatible = "regulator-fixed"
97 regulator-name = "vcc3v3_lan";
98 regulator-always-on;
99 regulator-boot-on;
100 regulator-min-microvolt = <330
101 regulator-max-microvolt = <330
102 vin-supply = <&vcc3v3_sys>;
103 };
104
105 vcc3v3_pcie: vcc3v3-pcie-regulator {
106 compatible = "regulator-fixed"
107 enable-active-high;
108 gpio = <&gpio2 RK_PD2 GPIO_ACT
109 pinctrl-names = "default";
110 pinctrl-0 = <&pcie_pwr_en>;
111 regulator-name = "vcc3v3_pcie"
112 regulator-always-on;
113 regulator-boot-on;
114 vin-supply = <&vcc5v0_sys>;
115 };
116
117 vcc3v3_sys: vcc3v3-sys {
118 compatible = "regulator-fixed"
119 regulator-name = "vcc3v3_sys";
120 regulator-always-on;
121 regulator-boot-on;
122 regulator-min-microvolt = <330
123 regulator-max-microvolt = <330
124 vin-supply = <&vcc5v0_sys>;
125 };
126
127 vcc5v0_host: vcc5v0-host-regulator {
128 compatible = "regulator-fixed"
129 enable-active-high;
130 gpio = <&gpio4 RK_PD1 GPIO_ACT
131 pinctrl-names = "default";
132 pinctrl-0 = <&vcc5v0_host_en>;
133 regulator-name = "vcc5v0_host"
134 regulator-always-on;
135 vin-supply = <&vcc5v0_sys>;
136 };
137
138 vcc5v0_sys: vcc-sys {
139 compatible = "regulator-fixed"
140 regulator-name = "vcc5v0_sys";
141 regulator-always-on;
142 regulator-boot-on;
143 regulator-min-microvolt = <500
144 regulator-max-microvolt = <500
145 vin-supply = <&vcc12v_dcin>;
146 };
147
148 vcc_0v9: vcc-0v9 {
149 compatible = "regulator-fixed"
150 regulator-name = "vcc_0v9";
151 regulator-always-on;
152 regulator-boot-on;
153 regulator-min-microvolt = <900
154 regulator-max-microvolt = <900
155 vin-supply = <&vcc3v3_sys>;
156 };
157
158 vdd_log: vdd-log {
159 compatible = "pwm-regulator";
160 pwms = <&pwm2 0 25000 1>;
161 pwm-supply = <&vcc5v0_sys>;
162 regulator-name = "vdd_log";
163 regulator-always-on;
164 regulator-boot-on;
165 regulator-min-microvolt = <800
166 regulator-max-microvolt = <140
167 };
168 };
169
170 &cpu_l0 {
171 cpu-supply = <&vdd_cpu_l>;
172 };
173
174 &cpu_l1 {
175 cpu-supply = <&vdd_cpu_l>;
176 };
177
178 &cpu_l2 {
179 cpu-supply = <&vdd_cpu_l>;
180 };
181
182 &cpu_l3 {
183 cpu-supply = <&vdd_cpu_l>;
184 };
185
186 &cpu_b0 {
187 cpu-supply = <&vdd_cpu_b>;
188 };
189
190 &cpu_b1 {
191 cpu-supply = <&vdd_cpu_b>;
192 };
193
194 &emmc_phy {
195 rockchip,enable-strobe-pulldown;
196 status = "okay";
197 };
198
199 &gmac {
200 assigned-clocks = <&cru SCLK_RMII_SRC>
201 assigned-clock-parents = <&clkin_gmac>
202 clock_in_out = "input";
203 phy-supply = <&vcc3v3_lan>;
204 phy-mode = "rgmii";
205 pinctrl-names = "default";
206 pinctrl-0 = <&rgmii_pins>;
207 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_
208 snps,reset-active-low;
209 snps,reset-delays-us = <0 10000 50000>
210 tx_delay = <0x28>;
211 rx_delay = <0x11>;
212 status = "okay";
213 };
214
215 &gpu {
216 mali-supply = <&vdd_gpu>;
217 status = "okay";
218 };
219
220 &hdmi {
221 avdd-0v9-supply = <&vcca0v9_hdmi>;
222 avdd-1v8-supply = <&vcca1v8_hdmi>;
223 ddc-i2c-bus = <&i2c3>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&hdmi_cec>;
226 status = "okay";
227 };
228
229 &hdmi_sound {
230 status = "okay";
231 };
232
233 &i2c0 {
234 clock-frequency = <400000>;
235 i2c-scl-rising-time-ns = <168>;
236 i2c-scl-falling-time-ns = <4>;
237 status = "okay";
238
239 rk808: pmic@1b {
240 compatible = "rockchip,rk808";
241 reg = <0x1b>;
242 interrupt-parent = <&gpio1>;
243 interrupts = <21 IRQ_TYPE_LEVE
244 #clock-cells = <1>;
245 clock-output-names = "xin32k",
246 pinctrl-names = "default";
247 pinctrl-0 = <&pmic_int_l>;
248 rockchip,system-power-controll
249 wakeup-source;
250
251 vcc1-supply = <&vcc5v0_sys>;
252 vcc2-supply = <&vcc5v0_sys>;
253 vcc3-supply = <&vcc5v0_sys>;
254 vcc4-supply = <&vcc5v0_sys>;
255 vcc6-supply = <&vcc5v0_sys>;
256 vcc7-supply = <&vcc5v0_sys>;
257 vcc8-supply = <&vcc3v3_sys>;
258 vcc9-supply = <&vcc5v0_sys>;
259 vcc10-supply = <&vcc5v0_sys>;
260 vcc11-supply = <&vcc5v0_sys>;
261 vcc12-supply = <&vcc3v3_sys>;
262 vddio-supply = <&vcc_1v8>;
263
264 regulators {
265 vdd_center: DCDC_REG1
266 regulator-name
267 regulator-alwa
268 regulator-boot
269 regulator-min-
270 regulator-max-
271 regulator-ramp
272 regulator-stat
273 regula
274 };
275 };
276
277 vdd_cpu_l: DCDC_REG2 {
278 regulator-name
279 regulator-alwa
280 regulator-boot
281 regulator-min-
282 regulator-max-
283 regulator-ramp
284 regulator-stat
285 regula
286 };
287 };
288
289 vcc_ddr: DCDC_REG3 {
290 regulator-name
291 regulator-alwa
292 regulator-boot
293 regulator-stat
294 regula
295 };
296 };
297
298 vcc_1v8: DCDC_REG4 {
299 regulator-name
300 regulator-alwa
301 regulator-boot
302 regulator-min-
303 regulator-max-
304 regulator-stat
305 regula
306 regula
307 };
308 };
309
310 vcca1v8_codec: LDO_REG
311 regulator-name
312 regulator-alwa
313 regulator-boot
314 regulator-min-
315 regulator-max-
316 regulator-stat
317 regula
318 };
319 };
320
321 vcca1v8_hdmi: LDO_REG2
322 regulator-name
323 regulator-alwa
324 regulator-boot
325 regulator-min-
326 regulator-max-
327 regulator-stat
328 regula
329 };
330 };
331
332 vcca_1v8: LDO_REG3 {
333 regulator-name
334 regulator-alwa
335 regulator-boot
336 regulator-min-
337 regulator-max-
338 regulator-stat
339 regula
340 regula
341 };
342 };
343
344 vcc_sdio: LDO_REG4 {
345 regulator-name
346 regulator-alwa
347 regulator-boot
348 regulator-min-
349 regulator-max-
350 regulator-stat
351 regula
352 regula
353 };
354 };
355
356 vcca3v0_codec: LDO_REG
357 regulator-name
358 regulator-alwa
359 regulator-boot
360 regulator-min-
361 regulator-max-
362 regulator-stat
363 regula
364 };
365 };
366
367 vcc_1v5: LDO_REG6 {
368 regulator-name
369 regulator-alwa
370 regulator-boot
371 regulator-min-
372 regulator-max-
373 regulator-stat
374 regula
375 regula
376 };
377 };
378
379 vcca0v9_hdmi: LDO_REG7
380 regulator-name
381 regulator-alwa
382 regulator-boot
383 regulator-min-
384 regulator-max-
385 regulator-stat
386 regula
387 };
388 };
389
390 vcc_3v0: LDO_REG8 {
391 regulator-name
392 regulator-alwa
393 regulator-boot
394 regulator-min-
395 regulator-max-
396 regulator-stat
397 regula
398 regula
399 };
400 };
401
402 vcc_cam: SWITCH_REG1 {
403 regulator-name
404 regulator-alwa
405 regulator-boot
406 regulator-stat
407 regula
408 };
409 };
410
411 vcc_mipi: SWITCH_REG2
412 regulator-name
413 regulator-alwa
414 regulator-boot
415 regulator-stat
416 regula
417 };
418 };
419 };
420 };
421
422 vdd_cpu_b: regulator@40 {
423 compatible = "silergy,syr827";
424 reg = <0x40>;
425 fcs,suspend-voltage-selector =
426 pinctrl-names = "default";
427 pinctrl-0 = <&vsel1_pin>;
428 regulator-name = "vdd_cpu_b";
429 regulator-min-microvolt = <712
430 regulator-max-microvolt = <150
431 regulator-ramp-delay = <1000>;
432 regulator-always-on;
433 regulator-boot-on;
434 vin-supply = <&vcc5v0_sys>;
435
436 regulator-state-mem {
437 regulator-off-in-suspe
438 };
439 };
440
441 vdd_gpu: regulator@41 {
442 compatible = "silergy,syr828";
443 reg = <0x41>;
444 fcs,suspend-voltage-selector =
445 pinctrl-names = "default";
446 pinctrl-0 = <&vsel2_pin>;
447 regulator-name = "vdd_gpu";
448 regulator-min-microvolt = <712
449 regulator-max-microvolt = <150
450 regulator-ramp-delay = <1000>;
451 regulator-always-on;
452 regulator-boot-on;
453 vin-supply = <&vcc5v0_sys>;
454
455 regulator-state-mem {
456 regulator-off-in-suspe
457 };
458 };
459 };
460
461 &i2c1 {
462 i2c-scl-rising-time-ns = <300>;
463 i2c-scl-falling-time-ns = <15>;
464 status = "okay";
465
466 es8316: codec@11 {
467 compatible = "everest,es8316";
468 reg = <0x11>;
469 clocks = <&cru SCLK_I2S_8CH_OU
470 clock-names = "mclk";
471 #sound-dai-cells = <0>;
472
473 port {
474 es8316_p0_0: endpoint
475 remote-endpoin
476 };
477 };
478 };
479 };
480
481 &i2c3 {
482 i2c-scl-rising-time-ns = <450>;
483 i2c-scl-falling-time-ns = <15>;
484 status = "okay";
485 };
486
487 &i2c4 {
488 i2c-scl-rising-time-ns = <600>;
489 i2c-scl-falling-time-ns = <20>;
490 status = "okay";
491 };
492
493 &i2s0 {
494 pinctrl-0 = <&i2s0_2ch_bus>;
495 pinctrl-1 = <&i2s0_2ch_bus_bclk_off>;
496 rockchip,capture-channels = <2>;
497 rockchip,playback-channels = <2>;
498 status = "okay";
499
500 i2s0_p0: port {
501 i2s0_p0_0: endpoint {
502 dai-format = "i2s";
503 mclk-fs = <256>;
504 remote-endpoint = <&es
505 };
506 };
507 };
508
509 &i2s1 {
510 rockchip,playback-channels = <2>;
511 rockchip,capture-channels = <2>;
512 };
513
514 &i2s2 {
515 status = "okay";
516 };
517
518 &io_domains {
519 audio-supply = <&vcca1v8_codec>;
520 bt656-supply = <&vcc_3v0>;
521 gpio1830-supply = <&vcc_3v0>;
522 sdmmc-supply = <&vcc_sdio>;
523 status = "okay";
524 };
525
526 &pcie0 {
527 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_
528 num-lanes = <4>;
529 pinctrl-0 = <&pcie_clkreqnb_cpm>;
530 pinctrl-names = "default";
531 vpcie0v9-supply = <&vcc_0v9>;
532 vpcie1v8-supply = <&vcc_1v8>;
533 vpcie3v3-supply = <&vcc3v3_pcie>;
534 status = "okay";
535 };
536
537 &pcie_phy {
538 status = "okay";
539 };
540
541 &pinctrl {
542 bt {
543 bt_enable_h: bt-enable-h {
544 rockchip,pins = <0 RK_
545 };
546
547 bt_host_wake_l: bt-host-wake-l
548 rockchip,pins = <0 RK_
549 };
550
551 bt_wake_l: bt-wake-l {
552 rockchip,pins = <2 RK_
553 };
554 };
555
556 es8316 {
557 hp_detect: hp-detect {
558 rockchip,pins = <1 RK_
559 };
560
561 hp_int: hp-int {
562 rockchip,pins = <1 RK_
563 };
564 };
565
566 leds {
567 user_led2: user-led2 {
568 rockchip,pins = <3 RK_
569 };
570 };
571
572 pcie {
573 pcie_pwr_en: pcie-pwr-en {
574 rockchip,pins = <2 RK_
575 };
576 };
577
578 pmic {
579 pmic_int_l: pmic-int-l {
580 rockchip,pins = <1 RK_
581 };
582
583 vsel1_pin: vsel1-pin {
584 rockchip,pins = <1 RK_
585 };
586
587 vsel2_pin: vsel2-pin {
588 rockchip,pins = <1 RK_
589 };
590 };
591
592 sdio0 {
593 sdio0_bus4: sdio0-bus4 {
594 rockchip,pins = <2 RK_
595 <2 RK_
596 <2 RK_
597 <2 RK_
598 };
599
600 sdio0_cmd: sdio0-cmd {
601 rockchip,pins = <2 RK_
602 };
603
604 sdio0_clk: sdio0-clk {
605 rockchip,pins = <2 RK_
606 };
607 };
608
609 usb-typec {
610 vcc5v0_typec_en: vcc5v0-typec-
611 rockchip,pins = <1 RK_
612 };
613 };
614
615 usb2 {
616 vcc5v0_host_en: vcc5v0-host-en
617 rockchip,pins = <4 RK_
618 };
619 };
620
621 wifi {
622 wifi_enable_h: wifi-enable-h {
623 rockchip,pins = <0 RK_
624 };
625
626 wifi_host_wake_l: wifi-host-wa
627 rockchip,pins = <0 RK_
628 };
629 };
630 };
631
632 &pmu_io_domains {
633 pmu1830-supply = <&vcc_3v0>;
634 status = "okay";
635 };
636
637 &pwm2 {
638 status = "okay";
639 };
640
641 &saradc {
642 status = "okay";
643
644 vref-supply = <&vcc_1v8>;
645 };
646
647 &sdhci {
648 max-frequency = <150000000>;
649 bus-width = <8>;
650 mmc-hs400-1_8v;
651 mmc-hs400-enhanced-strobe;
652 non-removable;
653 status = "okay";
654 };
655
656 &sdio0 {
657 #address-cells = <1>;
658 #size-cells = <0>;
659 bus-width = <4>;
660 clock-frequency = <50000000>;
661 cap-sdio-irq;
662 cap-sd-highspeed;
663 keep-power-in-suspend;
664 mmc-pwrseq = <&sdio_pwrseq>;
665 non-removable;
666 pinctrl-names = "default";
667 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s
668 sd-uhs-sdr104;
669 };
670
671 &sdmmc {
672 bus-width = <4>;
673 cap-mmc-highspeed;
674 cap-sd-highspeed;
675 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_
676 disable-wp;
677 max-frequency = <150000000>;
678 pinctrl-names = "default";
679 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdm
680 status = "okay";
681 };
682
683 &spdif {
684
685 spdif_p0: port {
686 spdif_p0_0: endpoint {
687 remote-endpoint = <&di
688 };
689 };
690 };
691
692 &tcphy0 {
693 status = "okay";
694 };
695
696 &tcphy1 {
697 status = "okay";
698 };
699
700 &tsadc {
701 status = "okay";
702
703 /* tshut mode 0:CRU 1:GPIO */
704 rockchip,hw-tshut-mode = <1>;
705 /* tshut polarity 0:LOW 1:HIGH */
706 rockchip,hw-tshut-polarity = <1>;
707 };
708
709 &u2phy0 {
710 status = "okay";
711
712 u2phy0_otg: otg-port {
713 status = "okay";
714 };
715
716 u2phy0_host: host-port {
717 phy-supply = <&vcc5v0_host>;
718 status = "okay";
719 };
720 };
721
722 &u2phy1 {
723 status = "okay";
724
725 u2phy1_otg: otg-port {
726 status = "okay";
727 };
728
729 u2phy1_host: host-port {
730 phy-supply = <&vcc5v0_host>;
731 status = "okay";
732 };
733 };
734
735 &uart0 {
736 pinctrl-names = "default";
737 pinctrl-0 = <&uart0_xfer &uart0_cts &u
738 };
739
740 &uart2 {
741 status = "okay";
742 };
743
744 &usb_host0_ehci {
745 status = "okay";
746 };
747
748 &usb_host0_ohci {
749 status = "okay";
750 };
751
752 &usb_host1_ehci {
753 status = "okay";
754 };
755
756 &usb_host1_ohci {
757 status = "okay";
758 };
759
760 &usbdrd3_0 {
761 status = "okay";
762 };
763
764 &usbdrd3_1 {
765 status = "okay";
766 };
767
768 &usbdrd_dwc3_0 {
769 status = "okay";
770 dr_mode = "host";
771 };
772
773 &usbdrd_dwc3_1 {
774 status = "okay";
775 dr_mode = "host";
776 };
777
778 &vopb {
779 status = "okay";
780 };
781
782 &vopb_mmu {
783 status = "okay";
784 };
785
786 &vopl {
787 status = "okay";
788 };
789
790 &vopl_mmu {
791 status = "okay";
792 };
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